Quantum bit device, method for manufacturing quantum bit device, and method for measuring quantum bit device

Abstract

This quantum bit device comprises: a substrate; a quantum bit provided on the substrate; signal wiring provided on the substrate and electrically connected to the quantum bit; and a semiconductor film provided in contact with a portion of the signal wiring, and having a width wider than the width of the signal wiring. The quantum bit device makes it possible to measure the characteristics of the signal wiring without affecting the quantum bit, by applying a measurement terminal to the semiconductor film in a normal temperature environment and measuring the characteristics of the signal wiring.

Description

Quantum bit device, method for manufacturing a quantum bit device, and method for measuring a quantum bit device

[0001] The present invention relates to a quantum bit device, a method for manufacturing a quantum bit device, and a method for measuring a quantum bit device.

[0002] Quantum bit devices are known that have a substrate on which quantum bits and signal wiring electrically connected to the quantum bits are provided. For example, signal wiring having a two-layer structure of superconducting material (e.g., Patent Documents 1 and 2) or a two-layer structure of a superconductor layer and a normal-conducting metal layer (e.g., Patent Document 3) is known. It is also known that signal wiring is formed of a superconductor layer and an antiferromagnetic insulator layer covering the surface of the superconductor layer (e.g., Patent Document 4).

[0003] Patent Document 1: JP-T-2020-533804 A, US Patent Application Publication No. 2020 / 0012961 A, JP-A-2009-302219 A, JP-A-2011-44631 A

[0004] Generally, the characteristics of quantum bit devices are measured at extremely low temperatures of several tens of millikelvins (mK). This method poses challenges, such as the long time it takes to cool the device to extremely low temperatures and the difficulty of changing the measurement terminals inside the cooling device.

[0005] Therefore, it is desirable to measure the characteristics of signal wiring in a room temperature environment. However, because the width of the signal wiring is narrow, it is difficult to measure the characteristics by directly contacting the measurement terminal with the signal wiring. Furthermore, even if one attempts to measure the characteristics of the signal wiring via a quantum bit, it is difficult to measure the characteristics of the signal wiring because the quantum bit has a high DC resistance of several thousand ohms at room temperature.

[0006] In one aspect, an object of the present invention is to enable measurement of the characteristics of signal wiring in a room temperature environment.

[0007] In one aspect, a quantum bit device includes a substrate, a quantum bit provided on the substrate, a signal wiring provided on the substrate and electrically connected to the quantum bit, and a semiconductor film provided over a portion of the signal wiring and having a width wider than a width of the signal wiring.

[0008] In one aspect, a method for manufacturing a quantum bit device includes the steps of forming a signal wiring on a substrate, forming a semiconductor film that overlaps a portion of the signal wiring and has a width wider than that of the signal wiring, and forming a quantum bit on the substrate that is electrically connected to the signal wiring.

[0009] In one aspect, a method for measuring a quantum bit device includes a substrate on which a quantum bit and a signal wiring electrically connected to the quantum bit are provided, and a semiconductor film overlapping a portion of the signal wiring and having a width greater than that of the signal wiring is provided, and the method measures the characteristics of the signal wiring by applying a measurement terminal to the semiconductor film.

[0010] As one aspect, it becomes possible to measure the characteristics of signal wiring in a room temperature environment.

[0011] FIG. 1( a) is a plan view of a quantum bit device according to a first embodiment, and FIG. 1( b) is an enlarged plan view of the vicinity of a resonator. FIG. 2( a) is a plan view of the vicinity of an end of a signal wiring of the quantum bit device according to the first embodiment, and FIG. 2( b) is a cross-sectional view taken along the line A-A of FIG. 2( a). FIGS. 3( a) to 3( d) are cross-sectional views (part 1) illustrating a method for manufacturing a quantum bit device according to the first embodiment. FIGS. 4( a) and 4( b) are cross-sectional views (part 2) illustrating a method for manufacturing a quantum bit device according to the first embodiment. FIGS. 5( a) and 5( b) are cross-sectional and plan views illustrating a method for measuring the DC resistance of a signal wiring in the first embodiment. FIGS. 6( a) and 6( b) are cross-sectional and plan views illustrating a method for measuring the high-frequency characteristics of a signal wiring in the first embodiment. FIG. 7 is a circuit schematic diagram of a quantum bit device according to the first embodiment. FIGS. 8( a) to 8( c) are diagrams (part 1) illustrating simulation results of the resonance waveform of the signal wiring in the first embodiment. 9(a) and 9(b) are diagrams (part 2) showing simulation results of the resonance waveform of the signal wiring in Example 1. FIGS. 10(a) to 10(c) are diagrams showing simulation results of the resonance waveform when the resonance frequency is changed in the signal wiring in Example 1. FIGS. 11(a) to 11(d) are diagrams showing simulation results of the TDR waveform of the signal wiring in Example 1. FIG. 12(a) is a plan view of the vicinity of an end of the signal wiring of a quantum bit device in Example 2, and FIG. 12(b) is a cross-sectional view taken along the line A-A of FIG. 12(a). FIG. 13(a) is a cross-sectional view showing a method for measuring the DC resistance of the signal wiring in Example 2, and FIG. 13(b) is a cross-sectional view showing a method for measuring the high-frequency characteristics. FIG. 14 is a cross-sectional view of the vicinity of the end of the signal wiring of a quantum bit device in Example 3. FIGS. 15(a) to 15(c) are cross-sectional views showing a method for manufacturing the quantum bit device in Example 3. FIG. 16 is a cross-sectional view of the vicinity of the end of the signal wiring of a quantum bit device in Example 4. Fig. 17(a) is a plan view of a quantum bit device according to a fifth embodiment, Fig. 17(b) is an enlarged plan view of the vicinity of a resonator and a band-pass filter, Fig. 18(a) is a plan view of the vicinity of an end of a signal wiring of the quantum bit device according to the fifth embodiment, and Fig. 18(b) is a cross-sectional view taken along line A-A of Fig. 18(a).

[0012] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0013] Fig. 1(a) is a plan view of a quantum bit device 100 according to a first embodiment, and Fig. 1(b) is an enlarged plan view of the vicinity of a resonator 40. In Fig. 1(a) and Fig. 1(b), for clarity of the drawings, the superconductor film and the semiconductor film provided on the substrate 10 are hatched. In addition, for clarity of the drawings, the ground layer 44 shown in Fig. 1(b) is omitted in Fig. 1(a), and the insulating film 46 shown in Fig. 2(a) and Fig. 2(b) is omitted in Fig. 1(a) and Fig. 1(b).

[0014] 1( a) and 1(b), a quantum bit device 100 according to a first embodiment includes a substrate 10 on which a plurality of quantum bits 20, a plurality of resonators 40, a plurality of coupling wires 60, and a readout terminal 62 are provided. The quantum bit device 100 is used in a quantum computer that operates in a superconducting state at an extremely low temperature of, for example, several tens of millikelvins (mK).

[0015] Each of the multiple resonators 40 is electrostatically coupled to a corresponding one of the multiple quantum bits 20. The multiple resonators 40 are also electrostatically coupled to a single readout terminal 62. The resonators 40 interact with the quantum bits 20 to read out the state of the quantum bits 20. The readout state of the quantum bits 20 is output to the outside via the readout terminal 62. The resonators 40 are, for example, LC resonators that are lumped constant circuits, λ / 2 resonators that are distributed constant circuits, or λ / 4 resonators that are distributed constant circuits. The coupling wiring 60 is electrostatically coupled to the quantum bits 20 and couples adjacent quantum bits 20 together. High-frequency connections are established between the quantum bits 20 and the resonators 40, between the resonators 40 and the readout terminal 62, and between the quantum bits 20 and the coupling wiring 60.

[0016] The quantum bit 20 includes a Josephson junction element 26 joined between the central electrode 22 and the peripheral electrode 24, and a capacitor 28 formed by the central electrode 22 and the peripheral electrode 24 facing each other. The Josephson junction element 26 is connected between the central electrode 22 and the peripheral electrode 24, with the superconductor film 30 connected to the central electrode 22 and the superconductor film 32 connected to the peripheral electrode 24. In the region where the superconductor films 30 and 32 intersect, an insulating film (not shown) is provided between the superconductor films 30 and 32.

[0017] The resonator 40 has a meander-structured coplanar line in which a signal wiring 42 is sandwiched between ground layers 44. A high-frequency signal for readout, for example, in the gigahertz band (e.g., 2 GHz to 10 GHz), propagates through the signal wiring 42. A semiconductor film 50 is provided overlapping both ends of the signal wiring 42. The semiconductor film 50 is not provided anywhere on the signal wiring 42 other than both ends. The semiconductor film 50 is provided in contact with both ends of the signal wiring 42. The semiconductor film 50 is provided away from the quantum bit 20 and is not in contact with the peripheral electrode 24 and the like that constitute the quantum bit 20. Note that while FIG. 1B shows an example in which a ground layer 44 is provided between the quantum bit 20 and the resonator 40, the ground layer 44 may not be provided between the quantum bit 20 and the resonator 40.

[0018] FIG. 2( a ) is a plan view of the vicinity of an end of a signal wiring 42 of the quantum bit device 100 according to the first embodiment, and FIG. 2( b ) is a cross-sectional view taken along the line A-A in FIG. 2( a ). For clarity, the signal wiring 42, the ground layer 44, the insulating film 46, and the semiconductor film 50 are hatched in FIG. 2( a ). As shown in FIGS. 2( a ) and 2( b ), the semiconductor film 50 has a width greater than that of the signal wiring 42 and is provided to cover the entire width of the signal wiring 42. The width X of the signal wiring 42 is, for example, 10 μm to 30 μm. The semiconductor film 50 has, for example, a rectangular shape in plan view, and the width Y1 in the width direction of the signal wiring 42 and the width Y2 in the direction perpendicular to the width direction of the signal wiring 42 are greater than the width of the signal wiring 42, being 50 μm to 500 μm. In this way, the semiconductor film 50 has an outer shape greater than the width of the signal wiring 42.

[0019] The upper surface of the signal wiring 42 is exposed without being covered, and an insulating film 46 is provided on the ground layer 44 and in the gap between the signal wiring 42 and the ground layer 44. The semiconductor film 50 is in contact with the upper surface of the signal wiring 42 and is provided from the signal wiring 42 to the insulating film 46. Therefore, the semiconductor film 50 is not in contact with the ground layer 44. The signal wiring 42 and the ground layer 44 have the same thickness T1, which is, for example, 0.01 μm to 20 μm. The thickness T2 of the insulating film 46 is, for example, 1 μm to 20 μm. The thickness T3 of the semiconductor film 50 is, for example, 5 μm to 30 μm.

[0020] The substrate 10 is an insulating substrate such as a silicon substrate or a sapphire substrate. The signal wiring 42 and the ground layer 44 are made of a superconducting material, such as aluminum (Al), titanium nitride (TiN), niobium (Nb), or tantalum (Ta). The insulating film 46 is made of a resin material or an inorganic insulating material, such as solder resist. The semiconductor film 50 has an electrical resistivity of 10 at an extremely low temperature of 20 millikelvin (mK). ４ The semiconductor film 50 is made of a semiconductor material having an insulating property of Ω·m or more. For example, the semiconductor film 50 is made of amorphous silicon, indium oxide (In ２ O ３ ), titanium oxide (TiO ２ The semiconductor film 50 is formed of an oxide semiconductor such as zinc oxide (ZnO), a III-V group compound semiconductor such as gallium arsenide (GaAs) or indium phosphide (InP), or a II-VI group compound semiconductor such as cadmium telluride (CdTe) or cadmium sulfide (CdS). The semiconductor film 50 may also be doped with materials such as phosphorus (P) and boron (B).

[0021] 3(a) to 4(b) are cross-sectional views showing a method for manufacturing the quantum bit device 100 according to Example 1. As shown in Fig. 3(a), a superconductor film 80 is formed on a substrate 10 by, for example, sputtering or vapor deposition.

[0022] As shown in Fig. 3(b), the superconductor film 80 is patterned using, for example, photolithography and etching. This forms the signal wiring 42 and ground layer 44 that constitute the resonator 40. Furthermore, as shown in Fig. 4(a), the central electrode 22 and the peripheral electrode 24 are also formed. Furthermore, although not shown, the coupling wiring 60 and the readout terminal 62 are also formed.

[0023] 3C, an insulating film 46 is formed on the substrate 10 by, for example, printing, sputtering, vapor deposition, or CVD (Chemical Vapor Deposition). The insulating film 46 is then patterned by, for example, photolithography and etching. This forms the insulating film 46 that extends from above the ground layer 44 to the gap between the ground layer 44 and the signal wiring 42, exposing the upper surface of the signal wiring 42.

[0024] 3( d ), a semiconductor film 50 is formed on the substrate 10 using, for example, sputtering, vapor deposition, or CVD. The semiconductor film 50 is then patterned using, for example, photolithography and etching. As a result, the semiconductor film 50 is formed on both ends of the signal wiring 42, contacting the upper surfaces of the signal wiring 42 and covering the signal wiring 42. The semiconductor film 50 is formed from above the signal wiring 42 to above the insulating film 46.

[0025] 4A, a superconductor film 30 is formed to connect to the central electrode 22. The superconductor film 30 is formed by, for example, oblique deposition and lift-off. Thereafter, the surface of the superconductor film 30 is oxidized to form an insulating film 34 on the surface of the superconductor film 30.

[0026] 4B, a superconductor film 32 is formed to connect to the peripheral electrode 24. The superconductor film 32 is formed by, for example, oblique deposition and lift-off. This forms a Josephson junction device 26 having a Josephson junction, which is a region where the superconductor film 30 and the superconductor film 32 overlap with each other via the insulating film 34.

[0027] [Measurement Method] FIGS. 5( a) and 5(b) are cross-sectional and plan views illustrating a method for measuring the DC resistance of the signal wiring 42 in Example 1. In FIG. 5(b), for clarity, the signal wiring 42 is shown as a straight line, and the insulating film 46 is omitted. The DC resistance may be measured at room temperature (e.g., 20°C ± 15°C) before or after the Josephson junction elements 26 are formed. As shown in FIGS. 5(a) and 5(b), the DC resistance of the signal wiring 42 is measured by contacting a measurement terminal 82 with the semiconductor film 50 provided on the end of the signal wiring 42. For example, a semiconductor parameter analyzer is used to measure the DC resistance. For example, if the signal wiring 42 has an open circuit, the DC resistance value will be infinite. If the signal wiring 42 has a short circuit, the DC resistance value will be such that the resistance of the semiconductor film 50 is dominant.

[0028] As an example, assume that the width X of the signal wiring 42 is 30 μm, the widths Y1 and Y2 of the semiconductor film 50 are 100 μm, the thickness T3 of the semiconductor film 50 is 10 μm, and the conductivity of the semiconductor film 50 is 20 S / m (see FIGS. 2A and 2B for the widths X, Y1, Y2, and thickness T3). In this case, the resistance R of the semiconductor film 50 with respect to the current flowing between the measurement terminal 82 and the signal wiring 42 is R=(10×10 －６ ) / 20 x (100 x 10 －６ ) x (50 x 10 －６ ) and is about 100Ω. －６ ) is the thickness of the semiconductor film 50. 20 is the conductivity of the semiconductor film 50. (100×10 －６ ) is the overlap length between the signal wiring 42 and the semiconductor film 50. (50×10 －６ ) is the approximate width of the current that gathers in the signal wiring 42 having a width of 30 μm.

[0029] FIGS. 6A and 6B are cross-sectional and plan views illustrating a method for measuring the high-frequency characteristics of the signal wiring 42 in Example 1. In FIG. 6B, for clarity, the signal wiring 42 is shown as a straight line, and the insulating film 46 is omitted. Similar to the measurement of DC resistance, the measurement of the high-frequency characteristics may be performed at room temperature (e.g., 20°C ± 15°C) before or after the formation of the Josephson junction elements 26. As shown in FIGS. 6A and 6B, the high-frequency characteristics of the signal wiring 42 are measured by bringing a measurement terminal 82 into contact with the semiconductor film 50 and the ground layers 44 on both sides of the semiconductor film 50, which are provided on the end of the signal wiring 42. In measuring the high-frequency characteristics, the measurement terminal 82 may be brought into contact with the semiconductor film 50 and the ground layers 44 on both sides of the semiconductor film 50 at both ends of the signal wiring 42, or may be brought into contact with only one end of the semiconductor film 50 and the ground layers 44 on both sides of the semiconductor film 50. For example, a resonance waveform or a TDR (Time Domain Reflectometry) waveform is measured as the high-frequency characteristics. For example, a vector network analyzer is used as a measuring device for measuring the resonance waveform. For example, a TDR oscilloscope or a TDR conversion of a vector network analyzer is used as a measuring device for measuring the TDR waveform.

[0030] 7 is a schematic circuit diagram of a quantum bit device 100 according to a first embodiment. As shown in FIG. 7 , a quantum bit 20 and a resonator 40 are coupled via a capacitor 74. Measuring the characteristics of a signal wiring 42 by bringing a measurement terminal 82 into contact with a semiconductor film 50 provided at the end of the signal wiring 42 is equivalent to measuring the characteristics of the signal wiring 42 by bringing the measurement terminal 82 into contact with the location indicated by arrow A. Therefore, the characteristics of the signal wiring 42 can be measured without being affected by the quantum bit 20 coupled via the capacitor 74.

[0031] For example, if the resonator 40 is a resonator of a distributed constant circuit, the signal wiring 42 will be thin and long, and the DC resistance of the signal wiring 42 will be high, possibly reaching several hundred ohms. In such a case, it is desirable to measure the DC resistance as a characteristic of the signal wiring 42. If the resonator 40 is a resonator of a lumped constant circuit, the signal wiring 42 will be short, and the DC resistance will be small. In such a case, it is desirable to measure high-frequency characteristics such as a resonance waveform and / or a TDR waveform as a characteristic of the signal wiring 42.

[0032] 8(a) to 9(b) are diagrams showing simulation results of the resonance waveform of the signal wiring 42 in Example 1. In FIGS. 8(a) to 9(b), the horizontal axis represents frequency in GHz, and the vertical axis represents reflection characteristic |S11| in dB. Also, in FIGS. 8(a) to 9(b), the dotted line shows the waveform when the total DC resistance of the signal wiring 42 and the semiconductor films 50 provided at both ends of the signal wiring 42 is 0 Ω, and the solid lines show the waveforms when the total DC resistance is 1 Ω, 10 Ω, 30 Ω, 100 Ω, and 300 Ω. The resistance of the semiconductor film 50 was calculated as 0028 steps. The simulation conditions were as follows: Substrate 10: silicon substrate Signal wiring 42 and ground layer 44: aluminum layer Insulating film 46: solder resist Semiconductor film 50: amorphous silicon Average relative dielectric constant of air and silicon substrate: 6.25 Length of signal wiring 42: 6 mm Width X of signal wiring 42: 0.02 mm Resonant frequency: 10 GHz

[0033] 8(a) to 9(b), resonance was confirmed when the total DC resistance of the signal wiring 42 and the semiconductor film 50 was up to 30 Ω, but resonance was not confirmed when it was 100 Ω or more. From these results, it can be seen that resonance was confirmed when the total DC resistance of the signal wiring 42 and the semiconductor film 50 was less than 100 Ω, and that a resistance of 30 Ω or less is preferable.

[0034] 10(a) to 10(c) are diagrams showing simulation results of resonance waveforms when the resonance frequency of the signal wiring 42 in Example 1 is varied. In FIGS. 10(a) to 10(c), the horizontal axis represents frequency in GHz, and the vertical axis represents reflection characteristic |S11| in dB. In FIGS. 10(a) to 10(c), the dotted line represents the waveform when the total DC resistance of the signal wiring 42 and the semiconductor film 50 is 0 Ω, and the solid line represents the waveform when the total DC resistance is 30 Ω. The simulation conditions for FIG. 10(a) are the same as those for the 0032 stage. The simulation conditions for FIG. 10(b) are the same as those for the 0032 stage, except that the average relative dielectric constant of air and the silicon substrate is 6.25, the length of the signal wiring 42 is 7 mm, and the resonance frequency is 8.33 GHz. The simulation conditions for FIG. 10C are the same as those for paragraph 0032, except that the average relative dielectric constant of air and the silicon substrate is 6.25, the length of the signal wiring 42 is 5 mm, and the resonance frequency is 11.67 GHz.

[0035] As shown in FIG. 10( a), when the resonant frequency was 10 GHz when the total DC resistance of the signal wiring 42 and the semiconductor film 50 was 0 Ω, the resonant frequency shifted to 12.3 GHz when the DC resistance was 30 Ω. As shown in FIG. 10( b), when the resonant frequency was 9 GHz when the DC resistance was 0 Ω, the resonant frequency shifted to 10.7 GHz when the DC resistance was 30 Ω. As shown in FIG. 10( c), when the resonant frequency was 11 GHz when the DC resistance was 0 Ω, the resonant frequency shifted to 14.4 GHz when the DC resistance was 30 Ω. Thus, even when the resonant frequency at 0 Ω was different, the resonant frequency at 30 Ω was higher than the resonant frequency at 0 Ω. This shows that if the total DC resistance of the signal wiring 42 and the semiconductor film 50 is known, it can be determined whether the resonant frequency at 0 Ω is shifted to a lower frequency or a higher frequency relative to the desired frequency.

[0036] 11(a) to 11(d) are diagrams showing the results of a simulation of the TDR waveform of the signal wiring 42 in Example 1. In FIGS. 11(a) to 11(d), the horizontal axis represents time in ns, and the vertical axis represents impedance in ohms. In FIGS. 11(a) to 11(d), the dotted line represents the waveform when the total DC resistance of the signal wiring 42 and the semiconductor film 50 is 0 Ω, and the solid lines represent the waveforms when the total DC resistance of the signal wiring 42 and the semiconductor film 50 is 10 Ω, 30 Ω, 100 Ω, and 300 Ω. The simulation conditions are the same as in paragraph 0032. The TDR measurement reveals the level of the characteristic impedance at each position on the signal wiring 42. For example, the thicker the signal wiring 42, the lower the characteristic impedance, and the thinner the signal wiring 42, the higher the characteristic impedance.

[0037] 11(a) to 11(d), when the total DC resistance of the signal wiring 42 and the semiconductor film 50 is 0Ω, the impedance is low near 0.05 ns and high near 0.15 ns. When the DC resistance is 10Ω or 30Ω, the impedance is low near 0.05 ns and high near 0.15 ns, similar to the case of 0Ω. However, when the DC resistance is 100Ω or 300Ω, it was not possible to distinguish between high and low impedance. From these results, it can be seen that in TDR measurement, the total DC resistance of the signal wiring 42 and the semiconductor film 50 must be less than 100Ω, and preferably 30Ω or less, in order to be able to distinguish between high and low impedance.

[0038] From the above simulation results, it is possible to measure high-frequency characteristics when the total DC resistance of the signal wiring 42 and the semiconductor film 50 is less than 100Ω, preferably 80Ω or less, more preferably 50Ω or less, and even more preferably 30Ω or less. The DC resistance of one semiconductor film 50 alone is preferably 30Ω or less, more preferably 20Ω or less, and even more preferably 10Ω or less.

[0039] As described above, according to the first embodiment, as shown in FIGS. 1A to 2B, a semiconductor film 50 having a width wider than the width of the signal wiring 42 is provided overlapping a portion of the signal wiring 42 electrically connected to the quantum bit 20. This allows the measurement terminal 82 to be placed on the semiconductor film 50 to measure the characteristics of the signal wiring 42, as shown in FIGS. 5A to 6B. Therefore, as shown in FIG. 7, the characteristics of the signal wiring 42 can be measured without being affected by the quantum bit 20, making it possible to measure the characteristics of the signal wiring 42 in a room temperature environment. Generally, the lower the temperature, the greater the electrical resistance of a semiconductor. Therefore, even when the semiconductor film 50 is provided overlapping the signal wiring 42, the semiconductor film 50 has a high electrical resistance and functions as an insulator at the extremely low temperatures of several tens of mK or less at which the quantum bit device 100 operates. This reduces the effect on the characteristics of the quantum bit device 100.

[0040] 1A and 1B, the semiconductor film 50 is provided so as to overlap both end portions of the signal wiring 42. This makes it possible to measure the overall characteristics of the signal wiring 42. When measuring the high-frequency characteristics of the signal wiring 42, the measurement terminal 82 can be placed in contact with only one end portion of the signal wiring 42. In such a case, it is sufficient that the semiconductor film 50 is provided so as to overlap only one end portion of the signal wiring 42. Therefore, it is sufficient that the semiconductor film 50 is provided so as to overlap at least one end portion of the signal wiring 42.

[0041] 1(a) and 1(b), the signal wiring 42 constitutes the resonator 40 that is electrically connected to the quantum bit 20. As a result, the characteristics of the signal wiring 42 can be measured, thereby measuring the characteristics of the resonator 40.

[0042] 2(a) and 2(b), in Example 1, the semiconductor film 50 is provided on the substrate 10 in contact with a portion of the signal wiring 42. This allows the semiconductor film 50 to be thinner than in Example 3, which will be described later, and therefore the total DC resistance value of the signal wiring 42 and the semiconductor film 50 can be kept low.

[0043] In Example 1, as shown in FIGS. 2A and 2B , ground layers 44 are provided on both sides of the signal wiring 42, and an insulating film 46 is provided from above the ground layer 44 to the gap between the ground layer 44 and the signal wiring 42. The semiconductor film 50 is provided from above the signal wiring 42 to above the insulating film 46. This facilitates obtaining a semiconductor film 50 large enough to allow contact with the measurement terminal 82. In order to ensure an area for contact with the measurement terminal 82, the widths Y1 and Y2 of the semiconductor film 50 (see FIG. 2A for the widths Y1 and Y2) are preferably 50 μm or more and 500 μm or less. Considering the need to ensure a contact area for the measurement terminal 82 and the impact of providing the semiconductor film 50 on other aspects, the widths Y1 and Y2 of the semiconductor film 50 may be 80 μm or more and 300 μm or less, or 100 μm or more and 200 μm or less.

[0044] In addition, in Example 1, the semiconductor film 50 is formed of a semiconductor material that is insulating at a temperature of 20 millikelvin (mK). This increases the electrical resistance of the semiconductor film 50 at the extremely low temperatures at which the quantum bit device 100 operates, so even if the semiconductor film 50 is provided, the influence on the characteristics of the quantum bit device 100 can be kept small. Here, being insulating means that the electrical resistivity is 10 ４ This refers to the case where the resistivity is Ω·m or more. Examples of such a semiconductor film 50 include semiconductor films formed from amorphous silicon, indium oxide, titanium oxide, and zinc oxide.

[0045] 1A, the quantum bit 20 includes a Josephson junction device 26. As shown in FIG. 4B, the Josephson junction device 26 has a structure in which an insulating film 34 is provided between a superconductor film 30 and a superconductor film 32, and therefore the direct current resistance value tends to be high, for example, several thousand ohms. However, even when such a quantum bit 20 is included, in the first embodiment, the characteristics of the signal wiring 42 can be measured without being affected by the quantum bit 20, as shown in FIG. 7, and therefore the characteristics of the signal wiring 42 can be measured with high accuracy.

[0046] Furthermore, in Example 1, the semiconductor film 50 is not in contact with the quantum bit 20, but is provided at a distance from the quantum bit 20. A high Q value is required for the quantum bit 20, but if the semiconductor film 50 comes into contact with the quantum bit 20, the Q value of the quantum bit 20 will decrease. By providing the semiconductor film 50 at a distance from the quantum bit 20, it is possible to suppress the decrease in the Q value of the quantum bit 20.

[0047] In Example 1, when the characteristics of the signal wiring 42 are measured by placing the measurement terminal 82 on the semiconductor film 50, the measurement may be performed while irradiating the semiconductor film 50 with light or while heating the substrate 10 to, for example, about 50° C. This allows the total DC resistance value of the signal wiring 42 and the semiconductor film 50 to be reduced.

[0048] 12(a) is a plan view of the vicinity of an end of a signal wiring 42 of a quantum bit device 200 according to Example 2, and FIG. 12(b) is a cross-sectional view taken along the line A-A in FIG. 12(a). As shown in FIGS. 12(a) and 12(b), Example 2 provides a metal film 52 that contacts and covers a semiconductor film 50. The metal film 52 is, for example, a single layer film such as a copper film, an aluminum film, or a gold film, or a laminated film thereof. The rest of the configuration is the same as Example 1, and therefore a description thereof will be omitted.

[0049] 13(a) is a cross-sectional view showing a method for measuring the DC resistance of the signal wiring 42 in Example 2, and Fig. 13(b) is a cross-sectional view showing a method for measuring the high-frequency characteristics. As shown in Figs. 13(a) and 13(b), in Example 2, the characteristics of the signal wiring 42 are measured by bringing the measurement terminal 82 into contact with the metal film 52.

[0050] According to the second embodiment, a metal film 52 is provided in contact with and overlapping with the semiconductor film 50. As a result, when the measurement terminal 82 is placed on the semiconductor film 50 to measure the characteristics of the signal wiring 42, the measurement terminal 82 comes into contact with the metal film 52, and the current spreads in the in-plane direction of the metal film 52 and flows into the semiconductor film 50. Therefore, when the metal film 52 is provided, the DC resistance value of the current flowing between the measurement terminal 82 and the signal wiring 42 is smaller than when the metal film 52 is not provided.

[0051] 14 is a cross-sectional view of the vicinity of an end of a signal wiring 42 of a quantum bit device 300 according to Example 3. As shown in FIG. 14 , in Example 3, an insulating film 46 and a semiconductor film 50 are not provided on a substrate 10, and a semiconductor film 50a is embedded in the substrate 10. The upper surface of the semiconductor film 50a is exposed from the upper surface of the substrate 10 and in contact with the signal wiring 42, and the lower surface is exposed from the lower surface of the substrate 10. An insulating film 54 embedded in the substrate 10 is provided between the substrate 10 and the ground layer 44 and the semiconductor film 50a. Like the semiconductor film 50, the semiconductor film 50a has a rectangular shape in a plan view and has a width greater than that of the signal wiring 42. The other configurations are the same as those of Example 1, and therefore description thereof will be omitted.

[0052] 15( a ) to 15 ( c ) are cross-sectional views showing a manufacturing method of a quantum bit device 300 according to Example 3. As shown in FIG. 15( a ), after a through-hole 11 is formed in a substrate 10, an insulating film 54 and a semiconductor film 50 a are embedded in the through-hole 11. The through-hole 11 is formed by, for example, etching or laser processing. The insulating film 54 and the semiconductor film 50 a are formed by depositing films by, for example, a vapor deposition method or a CVD method, and then removing unnecessary portions formed on the upper surface of the substrate 10 by polishing or the like.

[0053] As shown in FIG. 15B, a superconductor film 80 is formed on the substrate 10 by, for example, sputtering or vapor deposition.

[0054] As shown in Figure 15(c), the superconductor film 80 is patterned using, for example, photolithography and etching. This forms the signal wiring 42 and ground layer 44 that constitute the resonator 40. The semiconductor film 50a contacts and overlaps both ends of the signal wiring 42. Although not shown, the central electrode 22, the peripheral electrode 24, the coupling wiring 60, and the readout terminal 62 are also formed. Thereafter, the Josephson junction element 26 is formed by the same method as in Figures 4(a) and 4(b) of Example 1.

[0055] In the third embodiment, the characteristics of the signal wiring 42 are measured by bringing the measurement terminal 82 into contact with the semiconductor film 50 a from the lower surface side of the substrate 10 .

[0056] According to the third embodiment, a semiconductor film 50a having a width greater than that of the signal wiring 42 is provided so as to overlap a portion of the signal wiring 42. This makes it possible to measure the characteristics of the signal wiring 42 without being affected by the quantum bit 20, as in the first embodiment, and makes it possible to measure the characteristics of the signal wiring 42 in a room temperature environment.

[0057] In addition, in Example 3, the semiconductor film 50a is embedded in the substrate 10 and is provided in contact with a portion of the signal wiring 42. This allows the measurement terminal 82 to be placed on the semiconductor film 50 from the underside of the substrate 10 to measure the characteristics of the signal wiring 42.

[0058] 16 is a cross-sectional view of the vicinity of an end of a signal wiring 42 of a quantum bit device 400 according to Example 4. As shown in FIG. 16 , in Example 4, similar to Example 3, a semiconductor film 50a in contact with the signal wiring 42 and an insulating film 54 that electrically isolates the semiconductor film 50a from the substrate 10 and the ground layer 44 are embedded in the substrate 10. Unlike Example 3, a metal film 52a is provided in contact with the surface of the semiconductor film 50a opposite the signal wiring 42 and overlaps the semiconductor film 50a. The other configurations are the same as those of Example 1, and therefore will not be described again.

[0059] In the fourth embodiment, the characteristics of the signal wiring 42 are measured by bringing a measurement terminal 82 into contact with the metal film 52 a from the lower surface side of the substrate 10 .

[0060] According to Example 4, a metal film 52a is provided in contact with and overlapping with the semiconductor film 50a. As a result, similar to Example 2, when the measurement terminal 82 is placed on the semiconductor film 50a to measure the characteristics of the signal wiring 42, the measurement terminal 82 is in contact with the metal film 52a, so that the current spreads in the in-plane direction of the metal film 52a and flows into the semiconductor film 50a. As a result, the DC resistance value of the current flowing between the measurement terminal 82 and the signal wiring 42 is reduced.

[0061] Fig. 17(a) is a plan view of a quantum bit device 500 according to a fifth embodiment, and Fig. 17(b) is an enlarged plan view of the vicinity of the resonator 40 and the bandpass filter 70. In Figs. 17(a) and 17(b), for clarity, the superconductor film and the semiconductor film provided on the substrate 10 are hatched. In addition, for clarity, the ground layer 44 shown in Fig. 17(b) is omitted in Fig. 17(a), and the insulating film 46 shown in Figs. 18(a) and 18(b) is omitted in Figs. 17(a) and 17(b).

[0062] 17( a) and 17(b), in Example 5, in addition to a plurality of quantum bits 20, a plurality of resonators 40, a plurality of coupling wires 60, and a readout terminal 62, a plurality of band-pass filters 70 are provided on a substrate 10. Each of the plurality of band-pass filters 70 is electrostatically coupled to a respective one of the plurality of resonators 40. Furthermore, the plurality of band-pass filters 70 are electrostatically coupled to one readout terminal 62. In this manner, the band-pass filters 70 are connected between the resonators 40 and the readout terminal 62. A high-frequency connection is made between the resonators 40 and the band-pass filters 70, and between the band-pass filters 70 and the readout terminal 62.

[0063] Similar to the resonator 40, the bandpass filter 70 has a meander-structured coplanar line in which a signal wiring 72 is sandwiched between ground layers 44. A high-frequency signal for readout, for example, in the gigahertz band (e.g., 2 GHz to 10 GHz), propagates through the signal wiring 72. Like the signal wiring 42, the signal wiring 72 is formed of a superconducting material, such as aluminum (Al), titanium nitride (TiN), niobium (Nb), or tantalum (Ta). The semiconductor film 50 is provided on both ends of the signal wiring 42 of the resonator 40 and on both ends of the signal wiring 72 of the bandpass filter 70. The semiconductor film 50 is not provided on any portion of the signal wiring 42 other than the ends, and on any portion of the signal wiring 72 other than the ends. The other configurations are the same as those of the first embodiment, and therefore description thereof will be omitted.

[0064] FIG. 18( a) is a plan view of the vicinity of the ends of the signal wirings 42, 72 of a quantum bit device 500 according to Example 5, and FIG. 18( b) is a cross-sectional view taken along the line A-A of FIG. 18( a). As shown in FIGS. 18( a) and 18(b), the semiconductor film 50 has a width greater than the width of the signal wirings 42, 72 and is provided to cover the entire width of the signal wirings 42, 72. The width of the signal wiring 72 is approximately the same as the width of the signal wiring 42, e.g., 10 μm to 30 μm. The upper surfaces of the signal wirings 42, 72 are left uncovered and an insulating film 46 is provided on the ground layer 44 to cover the gap between the signal wirings 42, 72 and the ground layer 44. The semiconductor film 50 is in contact with the upper surfaces of the signal wirings 42, 72 and is provided from the signal wirings 42, 72 to the insulating film 46.

[0065] According to the fifth embodiment, a semiconductor film 50 having a width greater than the width of the signal wirings 42, 72 is provided so as to overlap a portion of the signal wirings 42, 72. This allows the characteristics of the signal wirings 42, 72 to be measured by placing the measurement terminal 82 on the semiconductor film 50. This makes it possible to measure the characteristics of the signal wirings 42, 72 without being affected by the quantum bit 20, and makes it possible to measure the characteristics of the signal wirings 42, 72 in a room temperature environment.

[0066] In addition, in Example 5, signal wiring 42 constitutes resonator 40 electrically connected to quantum bit 20, and signal wiring 72 constitutes band-pass filter 70 electrically connected to quantum bit 20. Thus, by measuring the characteristics of signal wiring 42, 72, the characteristics of resonator 40 and band-pass filter 70 can be measured.

[0067] Although the fifth embodiment has been described with reference to an example in which the semiconductor film 50 is provided on the substrate 10 and is in contact with the end of the signal wiring 72, the semiconductor film 50a may be embedded in the substrate 10 and in contact with the end of the signal wiring 72, as in the third embodiment. In this case, the metal film 52a may be provided so as to overlap the semiconductor film 50a, as in the fourth embodiment.

[0068] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention described in the claims.

[0069] REFERENCE SIGNS LIST 10 substrate 20 quantum bit 22 central electrode 24 peripheral electrode 26 Josephson junction element 28 capacitor 30, 32 superconductor film 34 insulating film 40 resonator 42 signal wiring 44 ground layer 46 insulating film 50, 50a semiconductor film 52, 52a metal film 54 insulating film 60 coupling wiring 62 readout terminal 70 bandpass filter 72 signal wiring 80 superconductor film 82 measurement terminal 100, 200, 300, 400, 500 quantum bit device

Claims

1. A substrate; A quantum bit provided on the substrate; A signal wiring provided on the substrate and electrically connected to the quantum bit; a semiconductor film that is provided so as to overlap a portion of the signal wiring and has a width greater than a width of the signal wiring.

2. The quantum bit device of claim 1 , wherein the portion of the signal wiring is at least one of both ends of the signal wiring.

3. The quantum bit device of claim 1 , further comprising a metal film in contact with and overlapping the semiconductor film.

4. The quantum bit device according to claim 1 , wherein the signal wiring includes a resonator or a bandpass filter electrically connected to the quantum bit.

5. The quantum bit device according to claim 1 , wherein the semiconductor film is provided on the substrate in contact with the portion of the signal wiring.

6. ground layers provided on both sides of the signal wiring on the substrate; an insulating film provided on the ground layer and extending to a gap between the ground layer and the signal wiring; The quantum bit device according to claim 5 , wherein the semiconductor film is provided over the signal wiring and the insulating film.

7. The quantum bit device according to claim 1 , wherein the semiconductor film is embedded in the substrate and is provided in contact with the portion of the signal wiring.

8. 3. The quantum bit device according to claim 1, wherein the semiconductor film is made of a semiconductor material that is insulating at a temperature of 20 millikelvin.

9. 3. The quantum bit device according to claim 1, wherein the semiconductor film is made of amorphous silicon, indium oxide, titanium oxide, zinc oxide, gallium arsenide, indium phosphide, cadmium telluride, or cadmium sulfide.

10. The quantum bit device of claim 1 , wherein the quantum bit comprises a Josephson junction element.

11. The quantum bit device according to claim 1 , wherein the signal wiring is made of a superconducting material.

12. forming signal wiring on a substrate; forming a semiconductor film overlapping a portion of the signal wiring and having a width greater than a width of the signal wiring; and forming a quantum bit on the substrate, the quantum bit being electrically connected to the signal wiring.

13. A method for measuring a quantum bit device comprising: a substrate on which a quantum bit and a signal wiring electrically connected to the quantum bit are provided; and a semiconductor film overlapping a portion of the signal wiring and having a width greater than a width of the signal wiring, the method comprising the steps of: A method for measuring a quantum bit device, comprising applying a measurement terminal to the semiconductor film and measuring characteristics of the signal wiring.

14. The method for measuring a quantum bit device according to claim 13 , wherein the characteristics of the signal wiring are measured in a room temperature environment.