Semiconductor device

Abstract

The present invention provides a semiconductor device which is provided with a semiconductor substrate, wherein: the semiconductor substrate comprises transistor parts and diode parts, which are alternately arranged in a first direction and are long in a second direction, and current sense parts that are arranged so as to face the transistor parts in the second direction; the transistor parts, the diode parts and the current sense parts each have a drift region that has a first conductivity type and a base region that has a second conductivity type and is provided between the drift region and an upper surface of the semiconductor substrate; when viewed from above, the current sense parts are each surrounded by a sense well region that has the second conductivity type and has a higher concentration than the base region, and that is formed deeper from the upper surface than the base region; and in the first direction, the width of the sense well region is greater than the width of the transistor parts that face the current sense parts.

Description

Semiconductor Devices

[0001] The present invention relates to a semiconductor device.

[0002] Conventionally, a semiconductor device having a current sensing unit has been known (see, for example, Patent Document 1). [Prior art documents] [Patent documents] [Patent document 1] JP 2021-192447 A Problem to be solved

[0003] In the current sensing section, it is preferable to suppress the influence of holes that sneak in from the active section. General disclosure

[0004] A first aspect of the present invention provides a semiconductor device including a semiconductor substrate. The semiconductor substrate may have transistor portions and diode portions alternately arranged along a first direction and elongated in a second direction. The semiconductor substrate may have a current sense portion arranged opposite the transistor portion in the second direction. In any of the above semiconductor devices, the transistor portion, diode portion, and current sense portion may have a drift region of a first conductivity type. In any of the above semiconductor devices, the transistor portion, diode portion, and current sense portion may have a base region of a second conductivity type provided between the drift region and an upper surface of the semiconductor substrate. In a top view of any of the above semiconductor devices, the current sense portion may be surrounded by a sense well region of the second conductivity type that has a higher concentration than the base region and is provided deeper from the upper surface than the base region. In any of the above semiconductor devices, the width of the sense well region may be larger than the width of the transistor portion facing the current sense portion in the first direction.

[0005] In any of the above semiconductor devices, the semiconductor substrate may have an active well region surrounding the transistor portion and the diode portion in a top view, and the sense well region may be provided inside the active well region in a top view.

[0006] In any of the above semiconductor devices, a plurality of pad portions may be provided above the active well region, and the current sensing portion may be disposed between two pad portions in the first direction.

[0007] In any of the above semiconductor devices, at least a part of the transistor section facing the current sense section may be located between the pad sections.

[0008] In any of the above semiconductor devices, the transistor section may have an emitter region of a first conductivity type provided on its upper surface. In any of the above semiconductor devices, the transistor section may have a collector region of a second conductivity type provided on the lower surface of the semiconductor substrate. In any of the above semiconductor devices, the diode section may not have an emitter region on its upper surface. In any of the above semiconductor devices, the diode section may have a cathode region of the first conductivity type provided on its lower surface. In any of the above semiconductor devices, the semiconductor substrate may further have a boundary region provided between the transistor section and the diode section, which does not have an emitter region on its upper surface but has a collector region on its lower surface. In any of the above semiconductor devices, the position of the outer circumferential edge of the sense well region in the first direction may face the boundary region in the second direction.

[0009] In any of the above semiconductor devices, the transistor section and the current sense section may have a plurality of trench sections arranged along a first direction, elongated in a second direction, and extending from the top surface of the semiconductor substrate toward the interior. In any of the above semiconductor devices, the distance in the first direction between the trench section provided at the end of the current sense section in the first direction and the sense well region may be smaller than the distance in the first direction between the trench section provided at the end of the transistor section in the first direction and the active well region.

[0010] In any of the above semiconductor devices, the sense well region may have an inner peripheral end facing the current sensing portion in a top view and an outer peripheral end opposite the inner peripheral end. In any of the above semiconductor devices, the width between the inner peripheral end and the outer peripheral end of the sense well region may be larger than the distance between the active well region and the sense well region.

[0011] In any of the above semiconductor devices, the transistor section and the current sense section may have a plurality of trench sections extending from the upper surface of the semiconductor substrate toward the interior. In any of the above semiconductor devices, the transistor section and the current sense section may have mesa sections that are regions between the trench sections. In any of the above semiconductor devices, the transistor section and the current sense section may have a contact region of the second conductivity type that is provided between the base region and the upper surface of the semiconductor substrate and has a higher concentration than the base region. In any of the above semiconductor devices, the area ratio of the contact region to the area of ​​one mesa section of the current sense section may be greater than the area ratio of the transistor section.

[0012] In any of the above semiconductor devices, the length of the contact region of the current sensing portion in the second direction may be greater than the length of the contact region of the transistor portion in the second direction.

[0013] In any of the above semiconductor devices, the transistor section and the current sense section may have a plurality of trench sections arranged along a first direction, elongated in a second direction, and provided from the top surface of the semiconductor substrate toward the interior. In any of the above semiconductor devices, the spacing between the trench sections of the current sense section in the first direction may be greater than the spacing between the trench sections of the transistor section in the first direction.

[0014] In any of the above semiconductor devices, the distance between the current sense unit and the transistor unit facing the current sense unit in the second direction may be greater than the distance between the diode unit and the current sense unit in the second direction.

[0015] In any of the semiconductor devices described above, the semiconductor substrate may have a boundary region provided between the transistor portion and the diode portion. In any of the semiconductor devices described above, the distance between the transistor portion facing the current sense portion in the second direction and the current sense portion may be greater than the width of the boundary region in the first direction.

[0016] In any of the above semiconductor devices, a region of the first conductivity type may be provided on the underside of the semiconductor substrate between the transistor section and the current sensing section in the second direction.

[0017] In any of the above semiconductor devices, the distance between the transistor portion and the current sensing portion in the second direction may be 500 μm or more.

[0018] In any of the above semiconductor devices, the current sensing unit may have a plurality of trenches extending from the upper surface of the semiconductor substrate toward the interior. In any of the above semiconductor devices, the current sensing unit may have a mesa portion that is a region between the trenches. In any of the above semiconductor devices, at least one mesa portion may be provided with an emitter region of the first conductivity type that is provided between the drift region and the upper surface of the semiconductor substrate. In any of the above semiconductor devices, at least one mesa portion may be provided with a base region. In any of the above semiconductor devices, at least one mesa portion may be provided with a trench contact extending from the upper surface of the semiconductor substrate toward the interior.

[0019] In any of the above semiconductor devices, the transistor portion may have a plurality of trench portions. In any of the above semiconductor devices, the transistor portion may have a mesa portion. In any of the above semiconductor devices, the mesa portion of the transistor portion may not have a trench contact.

[0020] In any of the above semiconductor devices, the width of the current sense portion in the first direction may be smaller than the width of the transistor portion facing the current sense portion in the first direction.

[0021] In any of the above semiconductor devices, the inner circumferential end position of the sense well region in the first direction may face the transistor section in the second direction.

[0022] Any of the above semiconductor devices may include an interlayer insulating film provided on the upper surface of the semiconductor substrate. Any of the above semiconductor devices may include a sense emitter electrode provided above the interlayer insulating film. In any of the above semiconductor devices, the interlayer insulating film may have a contact hole between the transistor portion and the current sense portion in the second direction. In any of the above semiconductor devices, the sense emitter electrode and the sense well region may be connected via the contact hole.

[0023] Any of the above semiconductor devices may include an interlayer insulating film provided on the top surface of the semiconductor substrate. Any of the above semiconductor devices may include a top electrode provided above the interlayer insulating film. Any of the above semiconductor devices may include a well region of a second conductivity type provided between the transistor portion and the sense well region in the second direction. In any of the above semiconductor devices, the interlayer insulating film may have a contact hole between the transistor portion and the sense well region in the second direction. In any of the above semiconductor devices, the top electrode and the well region may be connected via the contact hole.

[0024] In any of the semiconductor devices described above, the well region may be an active well region surrounding the transistor portion and the diode portion in a top view, and the top electrode may be an emitter electrode provided above the transistor portion.

[0025] In any of the above semiconductor devices, the length of the contact hole in the first direction may be greater than at least one of the width of the transistor section facing the current sense section and the width of the current sense section.

[0026] In any of the above semiconductor devices, a trench contact for extraction may be provided at the lower end of the contact hole, the trench contact being formed from the upper surface of the semiconductor substrate toward the interior.

[0027] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also be inventions.

[0028] 14 is a diagram showing an equivalent circuit of a semiconductor device 100 according to an embodiment of the present invention. 15 is a top view showing an example of a semiconductor device 100 according to an embodiment of the present invention. 16 is an enlarged view of region A in FIG. 2. 17 is a diagram showing an example of an A-A' cross section in FIG. 3. 18 is a diagram showing an example of a B-B' cross section in FIG. 3. 19 is a diagram showing an example of a C-C' cross section in FIG. 2. 19 is a top view of a mesa portion 60 of a transistor portion 70 and a mesa portion 63 of a current sense portion 26. 19 is a diagram showing the layout around the current sense portion 26 of a sample with a large chip size. 19 is a diagram showing the layout around the current sense portion 26 of a measurement sample with a small chip size. 19 is a diagram showing measurement results of the active area dependency of short-circuit withstand capability. 19 is a diagram showing another example of region A in FIG. 3. 19 is a diagram showing an example of an A-B cross section in FIG. 3. 19 is a diagram showing another example of a B-B' cross section in FIG. 3. 19 is a diagram showing another example of an enlarged view of region A in FIG. 2. 19 is a diagram showing an example of an A-B cross section in FIG. 14.

[0029] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention. In this specification, the same parts in each drawing are given the same reference numerals, and their description may be omitted. Furthermore, for the sake of convenience, some components may not be illustrated.

[0030] In this specification, one side in a direction parallel to the depth direction of a semiconductor substrate is referred to as "upper" and the other side as "lower." Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the directions when the semiconductor device is mounted.

[0031] In this specification, technical matters may be explained using an orthogonal coordinate system of X, Y, and Z axes. The orthogonal coordinate system merely specifies the relative positions of components and does not limit a specific direction. For example, the Z-axis direction does not limit the height direction relative to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When the Z-axis direction is written without specifying positive or negative, it means the direction parallel to the +Z-axis and -Z-axis.

[0032] In this specification, orthogonal axes parallel to the upper and lower surfaces of the semiconductor substrate are referred to as the X-axis and Y-axis. Furthermore, an axis perpendicular to the upper and lower surfaces of the semiconductor substrate is referred to as the Z-axis. In this specification, the direction of the Z-axis may be referred to as the depth direction. Furthermore, in this specification, the direction parallel to the upper and lower surfaces of the semiconductor substrate, including the X-axis and Y-axis, may be referred to as the horizontal direction.

[0033] In this specification, when we say "same" or "equal," it may also include cases where there is an error due to manufacturing variations, etc. The error is, for example, within 10%.

[0034] In this specification, the conductivity type of a doped region doped with an impurity is described as P-type or N-type. In this specification, the term "impurity" may particularly refer to either an N-type donor or a P-type acceptor, and may be referred to as a "dopant." In this specification, "doping" means introducing a donor or an acceptor into a semiconductor substrate to form a semiconductor exhibiting an N-type conductivity type or a P-type conductivity type. In this specification, the doping concentration of an N-type region may be referred to as a "donor concentration," and the doping concentration of a P-type region may be referred to as an "acceptor concentration."

[0035] 1 is a diagram showing an equivalent circuit of a semiconductor device 100 according to one embodiment of the present invention. The semiconductor device 100 has a transistor section 70 and a current sense section 26. The current sense section 26 has a similar structure to the transistor section 70 and measures the current flowing through the transistor section 70. The transistor section 70 and the current sense section 26 may be IGBTs.

[0036] The collector electrode of the transistor section 70 and the collector electrode of the current sense section 26 are connected to each other and to a common collector terminal (C). The gate conductive section of the transistor section 70 and the gate conductive section of the current sense section 26 are connected to a common gate drive circuit. Meanwhile, the emitter electrode 52 of the transistor section 70 and the sense-emitter electrode of the current sense section 26 are electrically separated inside the semiconductor device 100. The emitter electrode 52 of the transistor section 70 is connected to an emitter terminal (E) and is supplied with an emitter potential. The sense-emitter electrode of the current sense section 26 is also connected to the emitter terminal, but the emitter potential is supplied via a sense resistor Rs branching from the emitter electrode 52.

[0037] When the semiconductor device 100 is operating, a predetermined current flows through the transistor section 70, and a current corresponding to the current value of the transistor section 70 flows through the current sense section 26. The value of the current flowing through the current sense section 26 is measured from the voltage drop across the sense resistor Rs at that time. The current value of the transistor section 70 is estimated based on the measurement results from the current sense section 26. This makes it possible to detect an overcurrent in the transistor section 70 and shut down the device. The inductance component of the wire is represented by L.

[0038] Fig. 2 is a top view showing an example of a semiconductor device 100 according to an embodiment of the present invention. Fig. 2 shows the positions of each component projected onto the top surface of the semiconductor substrate 10. Fig. 2 shows only some of the components of the semiconductor device 100, and some components are omitted.

[0039] The semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 is a substrate made of a semiconductor material. As an example, the semiconductor substrate 10 is a silicon substrate. In this specification, the outer peripheral edge of the semiconductor substrate 10 in a top view is referred to as an outer peripheral edge 140. The top view refers to a view parallel to the Z-axis from the top surface side of the semiconductor substrate 10. Furthermore, one of the edges of the outer peripheral edge 140 of the semiconductor substrate 10 in a top view is referred to as a first edge 142. In a top view, the direction parallel to the first edge 142 is referred to as the X-axis direction, and the direction perpendicular to the first edge 142 is referred to as the Y-axis direction.

[0040] An active portion 120 is provided in the semiconductor substrate 10. The active portion 120 is a region through which a main current flows in the depth direction between the upper and lower surfaces of the semiconductor substrate 10 when the semiconductor device 100 is in operation. An emitter electrode 52 is provided above the active portion 120, but is omitted in FIG. 2 .

[0041] The active section 120 is provided with at least one of a transistor section 70 including a transistor element such as an IGBT and a diode section 80 including a diode element such as a free wheel diode (FWD). In the example of FIG. 2 , the transistor sections 70 and the diode sections 80 are alternately arranged along a first direction. That is, the first direction is the arrangement direction of the transistor sections 70 and the diode sections 80. The first direction may also be the arrangement direction of trench sections, which will be described later. In this example, a transistor section is provided at an end of the active section in the first direction. In another example, the active section 120 may be provided with only one of the transistor section 70 and the diode section 80.

[0042] The transistor section 70 and the diode section 80 may each have a longitudinal direction in the second direction. In other words, the second direction is the extension direction of the transistor section 70 and the diode section 80. In this specification, the first direction is the X-axis direction, and the second direction is the Y-axis direction. The length of the transistor section 70 in the Y-axis direction is greater than its width in the X-axis direction. Similarly, the length of the diode section 80 in the Y-axis direction is greater than its width in the X-axis direction. The extension direction of the transistor section 70 and the diode section 80 may be the same as the longitudinal direction of each trench section, which will be described later.

[0043] The diode section 80 has an N+ type cathode region in a region that contacts the lower surface of the semiconductor substrate 10. In this specification, the region in which the cathode region is provided is referred to as the diode section 80. In other words, the diode section 80 is a region that overlaps with the cathode region in a top view. A P+ type collector region may be provided in a region other than the cathode region on the lower surface of the semiconductor substrate 10. In this specification, the region in which the diode section 80 is extended in the Y-axis direction up to the active well region 29 described below may also be included in the diode section 80. A collector region is provided on the lower surface of the extended region.

[0044] The transistor section 70 has a P+ type collector region in a region in contact with the lower surface of the semiconductor substrate 10. In addition, the transistor section 70 has a gate structure periodically arranged on the upper surface side of the semiconductor substrate 10, the gate structure having an N+ type emitter region, a P- type base region, a gate conductive portion, and a gate insulating film.

[0045] A plurality of pad sections 110 (in the example of FIG. 2 , a current control pad 114, an auxiliary emitter pad 115, a gate pad 116, a cathode pad 117, and an anode pad 118) are provided above the upper surface of the semiconductor substrate 10. The current control pad 114 is connected to the current sense section 26. The current sense section 26 has the same structure as the transistor section 70, but has a smaller area (corresponding to the channel area) in a top view than the transistor section 70. By detecting the current flowing in the current sense section 26, the current flowing throughout the semiconductor device 100 can be estimated. When wiring the output from the current sense section 26 to the emitter electrode 52, a wiring may be extended from the current control pad 114. The auxiliary emitter pad 115 is connected to the emitter electrode 52 arranged above the upper surface of the semiconductor substrate 10. The wiring extending from the current control pad 114 may be connected to the emitter electrode 52 by wire bonding at the auxiliary emitter pad 115 so as to have the same potential as the emitter electrode 52. The gate pad 116 is connected to the gate conductive portion of the transistor section 70 and the gate conductive portion of the current sense section 26. In this example, the gate pad 116 is connected to each gate conductive portion via a gate runner, which will be described later. The cathode pad 117 and the anode pad 118 are connected to the temperature sense section 111, which will be described later. The number and types of pad sections 110 provided on the semiconductor substrate 10 are not limited to the example shown in FIG. 2 .

[0046] Each pad is made of a metal material such as aluminum. The pad sections 110 are arranged in a predetermined direction between the active section 120 and a first edge 142 on the upper surface of the semiconductor substrate 10. The pad sections 110 in this example are sandwiched between the active section 120 and the first edge 142 in the Y-axis direction. The pad sections 110 in this example are provided above an active well region 29, which will be described later.

[0047] In the arrangement direction of the multiple pad sections 110, the current sense section 26 may be provided between any two pad sections 110. In this example, the current sense section 26 is arranged between the two pad sections 110 in the first direction. In this example, the first direction and the arrangement direction of the pad sections 110 are the same direction.

[0048] The semiconductor device 100 includes a gate runner that transmits a gate voltage to the transistor portion 70. The semiconductor device 100 of this example includes, as the gate runners, a first gate runner and a second gate runner 48. In this example, each gate runner is provided above the upper surface of the semiconductor substrate 10 and is insulated from the upper surface of the semiconductor substrate 10 by an interlayer insulating film.

[0049] 2 , the first gate runner is omitted. The first gate runner is provided to pass between a first edge 142 of the semiconductor substrate 10 and at least one pad portion 110 in a top view. The first gate runner in this example is provided parallel to the first edge 142, passing between the first edge 142 and each of the current control pad 114, auxiliary emitter pad 115, gate pad 116, cathode pad 117, and anode pad 118. The first gate runner is connected to the gate pad 116.

[0050] The first gate runner is provided between the other edge of the semiconductor substrate 10 and the active portion 120 so as to surround the active portion 120. That is, the first gate runner in this example is provided in a ring shape along each edge of the semiconductor substrate 10. The first gate runner may be a metal wiring such as aluminum, or a semiconductor wiring such as polysilicon doped with impurities. The first gate runner may have a structure in which a metal wiring and a semiconductor wiring are provided overlapping each other with an insulating film interposed therebetween. A contact hole for connecting the metal wiring and the semiconductor wiring is provided in the insulating film.

[0051] The second gate runner 48 may be provided to cross the active section 120. The second gate runner 48 may be semiconductor wiring. In this example, the second gate runner 48 crosses the active section 120 in the X-axis direction. The second gate runner 48 is electrically connected to the first gate runner. The gate voltage is transmitted from the gate pad 116 to the transistor section 70 and the current sense section 26 via the first gate runner and the second gate runner 48. By providing the second gate runner 48 in the active section 120, variations in the wiring length from the gate pad 116 in each region of the semiconductor substrate 10 can be reduced. The first gate runner or the second gate runner 48 may be provided around the pad section 110 and between the active section 120 and one of the pad sections 110.

[0052] The semiconductor substrate 10 has an active well region 29. The active well region 29 surrounds the transistor section 70 and the diode section 80 in a top view. The active well region 29 surrounds the active section 120 in a top view. The active well region 29 is a region of a second conductivity type having a higher doping concentration than the base region. In this example, the active well region 29 is of P+ type. The active well region 29 may surround the active section 120 along the gate runner. The active well region 29 is also provided around the pad section 110, but is omitted in FIG. 2 .

[0053] The edge termination structure 90 is provided on the top surface of the semiconductor substrate 10 between the active well region 29 and the outer periphery edge 140 of the semiconductor substrate 10. The edge termination structure 90 may be arranged in an annular shape to surround the active well region 29 on the top surface of the semiconductor substrate 10. In this example, the edge termination structure 90 is arranged along the outer periphery edge 140 of the semiconductor substrate 10. The edge termination structure 90 reduces electric field concentration on the top surface side of the semiconductor substrate 10. The edge termination structure 90 may have, for example, a guard ring, a field plate, a resurf structure, or a structure combining these.

[0054] The temperature sense wiring 112 is provided above the active section 120. The temperature sense wiring 112 may be semiconductor wiring. The temperature sense wiring 112 is connected to the temperature sense section 111. The temperature sense wiring 112 extends to a region between the active section 120 and the outer peripheral edge 140 on the upper surface of the semiconductor substrate 10, and is connected to the cathode pad 117 and the anode pad 118. Note that the semiconductor device 100 does not necessarily have to include the temperature sense section 111 and the temperature sense wiring 112.

[0055] 3 is an enlarged view of region A in FIG. 2. Region A is the region surrounding the current sense unit 26. In a top view, the current sense unit 26 is surrounded by a sense well region 28 of the second conductivity type. The sense well region 28 has a higher concentration than the base region and is provided deeper from the top surface of the semiconductor substrate 10 than the base region. The current sense unit 26 in this example is disposed opposite the transistor unit 70 in the second direction.

[0056] When the transistor section 70 and the current sense section 26 face each other, holes are likely to leak from the transistor section 70 into the current sense section 26. The holes that leak into the current sense section 26 accumulate in the current sense section 26, causing voltage oscillation. Because the current sense section 26 has a smaller capacitance than the transistor section 70, the trench in the current sense section 26 will be destroyed by the oscillation. Therefore, it is preferable to suppress the influence of holes leaking into the current sense section 26.

[0057] By providing the sense well region 28, holes that have infiltrated into the current sense unit 26 can be extracted, thereby suppressing hole accumulation in the current sense unit 26. In the semiconductor device 100 of this example, the width Wsu of the sense well region 28 is greater than the width Wt of the transistor unit 70 facing the current sense unit 26 in the first direction. The width Wt of the transistor unit 70 may be the distance from one trench portion to the other trench portion provided at the boundary between the transistor unit 70 and a boundary region 72 (described later). This allows for further extraction of the infiltrated holes, making it less likely for holes to accumulate as carriers, thereby suppressing oscillation of the current sense unit 26. In this case, a P+ contact region 17 (see FIG. 5 ) may be provided on the surface side of the base region 14 adjacent to the sense well region 28. For example, the P+ contact region 17 is provided in contact with the inner periphery of the sense well region 28 and surrounding the current sense unit 26. This makes it easier to extract holes that have flowed into the sense well region 28.

[0058] The width Ws of the current sense unit 26 in the first direction may be smaller than the width Wt of the transistor unit 70 in the first direction facing the current sense unit 26. This increases the area of ​​the sense well region 28 in top view, allowing the holes that have entered therethrough to be further extracted.

[0059] The sense well region 28 may be provided inside the active well region 29 when viewed from above. The potential of the current sensing unit 26 is different from that of the active well region 29 because the voltage drop is equal to the sense resistor. Therefore, the sense well region 28 in this example is separated from the active well region 29. It is sufficient that a distance be provided between the active well region 29 and the sense well region 28 that is large enough to withstand the potential difference caused by the voltage drop in the sense resistor. The distance D1 between the active well region 29 and the sense well region 28 may be 1 μm or more and 10 μm or less.

[0060] The sense well region 28 has an inner peripheral end 34 facing the current sensing unit 26 in a top view, and an outer peripheral end 36 on the opposite side to the inner peripheral end 34. The width Wu between the inner peripheral end 34 and the outer peripheral end 36 of the sense well region 28 may be larger than the distance D1 between the active well region 29 and the sense well region 28. This makes it possible to increase the area of ​​the sense well region 28 in a top view, and to further extract holes that have entered therethrough.

[0061] At least a portion of the transistor section 70 facing the current sense section 26 may be located between the pad sections 110. Located between the pad sections 110 means that the transistor section 70 has a longitudinal direction in the second direction up to a position where it overlaps with the pad sections 110 in the first direction. In this example, a portion of the transistor section 70 is provided between the current control pad 114 and the auxiliary emitter pad 115. This allows the area of ​​the active section 120 to be increased. Accordingly, the inner peripheral edge of the active well region 29 may also be provided between the pad sections 110. The transistor section 70 may extend further toward the first edge 142 than the diode section 80.

[0062] Two well regions, an active well region 29 and a sense well region 28, are provided between the transistor section 70 and the current sense section 26. The current sense section 26 may be provided between the pad sections 110 and closer to the first edge 142. When the region between the pad sections 110 is equally divided into a region on the active section 120 side and a region on the first edge 142 side, the area of ​​the current sense section 26 provided in the region on the first edge 142 side may be larger than the area provided in the region on the active section 120 side. This makes it possible to secure the area for the transistor section 70 provided between the pad sections 110.

[0063] The semiconductor substrate 10 may have a boundary region 72 provided between the transistor portion 70 and the diode portion 80. In this example, the boundary region 72 is provided between the transistor portion 70 and the diode portion 80 in the first direction. The boundary region 72 may not have an emitter region on the upper surface of the semiconductor substrate 10, but may have a collector region on the lower surface of the semiconductor substrate 10. By providing the boundary region 72, it is possible to suppress the intrusion of holes from the transistor portion 70 into the diode portion 80, and to suppress switching loss in the diode portion 80.

[0064] In this example, the outer peripheral edge position of the sense well region 28 in the first direction faces the boundary region 72 in the second direction. Holes that sneak into the current sense unit 26 of the active unit 120 only sneak into the transistor unit 70, and do not sneak into the diode unit 80. Therefore, the sense well region 28 that extracts the sneaking holes does not need to be located in a position facing the diode unit 80.

[0065] The position of the inner peripheral end of the sense well region 28 in the first direction may face the transistor section 70 in the second direction. This increases the area of ​​the sense well region 28 in top view, and allows the holes that have entered into the sense well region 28 to be further extracted.

[0066] 4 is a diagram showing an example of the AA' cross section in FIG. 3. The AA' cross section is an XZ cross section passing through the emitter region 12, boundary region 72, and diode section 80 of the transistor section 70. In the AA' cross section, the semiconductor device 100 includes a semiconductor substrate 10, a collector electrode 24, an interlayer insulating film 38, and an emitter electrode 52. The semiconductor substrate 10 has an upper surface 21 and a lower surface 23. The upper surface 21 and the lower surface 23 are the two main surfaces of the semiconductor substrate 10.

[0067] The interlayer insulating film 38 is provided on the upper surface 21 of the semiconductor substrate 10. The interlayer insulating film 38 is a film including at least one layer of an insulating film such as silicate glass doped with impurities such as boron or phosphorus, a thermal oxide film, and other insulating films. A contact hole 54 is provided in the interlayer insulating film 38.

[0068] The emitter electrode 52 is provided above the interlayer insulating film 38. The emitter electrode 52 passes through a contact hole 54 in the interlayer insulating film 38 and contacts the upper surface 21 of the semiconductor substrate 10. The collector electrode 24 is provided on the lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are made of a metal material such as aluminum. In this specification, the direction connecting the emitter electrode 52 and the collector electrode 24 (the Z-axis direction) is referred to as the depth direction.

[0069] The transistor section 70 and the diode section 80 each have a drift region 18 of the first conductivity type and a base region 14 of the second conductivity type provided between the drift region 18 and the upper surface 21 of the semiconductor substrate 10. The boundary region 72 also has a drift region 18 of the first conductivity type and a base region 14 of the second conductivity type provided between the drift region 18 and the upper surface 21 of the semiconductor substrate 10. In this example, the drift region 18 is N-type, and the base region 14 is P-type.

[0070] The transistor section 70 has multiple trench sections 40 extending from the upper surface 21 of the semiconductor substrate 10 toward the inside. In this example, the trench sections 40 are arranged along a first direction and extend longitudinally in a second direction. The spacing between the trench sections 40 of the transistor section 70 in the first direction is defined as D2. The trench section 40 has a trench, a gate insulating film 42, and a gate conductive section 44. The gate insulating film 42 is provided to cover the inner wall of the trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the trench. The gate conductive section 44 is provided inside the trench, further inward than the gate insulating film 42. In other words, the gate insulating film 42 insulates the gate conductive section 44 from the semiconductor substrate 10. The gate conductive section 44 is formed of a conductive material such as polysilicon. The diode section 80 and the boundary region 72 may also have trench sections 40. The trench portion 40 may function as a gate trench or as a dummy trench, or a plurality of trench portions 40 may have both functions.

[0071] A mesa portion 60 is provided between each trench portion 40 of the transistor portion 70 in the arrangement direction. The mesa portion 60 refers to a region between the trench portions 40 inside the semiconductor substrate 10. As an example, the upper end of the mesa portion 60 is the upper surface 21 of the semiconductor substrate 10. The depth position of the lower end of the mesa portion 60 is the same as the depth position of the lower end of the trench portion 40. In this example, the mesa portion 60 is provided on the upper surface 21 of the semiconductor substrate 10, extending in the second direction along the trench portion 40. Similarly, a mesa portion 61 is provided in the boundary region 72, and a mesa portion 62 is provided in the diode portion 80. In this specification, the mesa portion simply referred to as a mesa portion refers to each of the mesa portion 60, the mesa portion 61, and the mesa portion 62. A base region 14 is provided in each mesa portion.

[0072] The transistor section 70 has a first conductivity type emitter region 12 provided on the upper surface 21. The emitter region 12 is exposed at the upper surface 21 of the semiconductor substrate 10 and is provided in contact with the trench portion 40. The emitter region 12 may be in contact with the trench portion 40 on both sides of the mesa portion 60. The emitter region 12 has a higher doping concentration than the drift region 18. In this example, the emitter region 12 is N+ type.

[0073] The base region 14 is provided below the emitter region 12. In this example, the base region 14 is provided in contact with the emitter region 12. The base region 14 may be in contact with the trench portions 40 on both sides of the mesa portion 60.

[0074] The accumulation region 16 is provided below the base region 14. The accumulation region 16 is an N+ type region with a higher doping concentration than the drift region 18. In this example, the semiconductor substrate 10 is provided with accumulation region 16-1 and accumulation region 16-2, but the number of accumulation regions 16 is not limited to this. By providing a high-concentration accumulation region 16 between the drift region 18 and the base region 14, the carrier injection enhancement effect (IE effect) can be enhanced and the on-voltage can be reduced. The accumulation region 16 may be provided so as to cover the entire lower surface of the base region 14 in each mesa portion 60.

[0075] A P-type base region 14 is provided in the mesa portion 62 of the diode portion 80 in contact with the upper surface 21 of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. The diode portion 80 does not have an emitter region 12 on the upper surface 21 of the semiconductor substrate 10.

[0076] The semiconductor substrate 10 has a boundary region 72 provided between the transistor portion 70 and the diode portion 80. A P-type base region 14 is provided in the mesa portion 61 of the boundary region 72, in contact with the upper surface 21 of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. The boundary region 72 does not have an emitter region 12 on the upper surface 21 of the semiconductor substrate 10.

[0077] The transistor section 70 has a collector region 22 of the second conductivity type provided on the lower surface 23 of the semiconductor substrate 10. In this example, the collector region 22 is P+ type. The acceptor concentration of the collector region 22 is higher than the acceptor concentration of the base region 14. The collector region 22 may contain the same acceptor as the base region 14, or may contain a different acceptor. The acceptor of the collector region 22 is, for example, boron. The boundary region 72 also has a P+ type collector region 22 on the lower surface 23 of the semiconductor substrate 10.

[0078] The diode section 80 has a cathode region 82 of a first conductivity type provided on the lower surface 23 of the semiconductor substrate 10. In this example, the cathode region 82 is N+ type. The donor concentration of the cathode region 82 is higher than the donor concentration of the drift region 18. The donor of the cathode region 82 is, for example, hydrogen or phosphorus. Note that the elements that serve as donors and acceptors in each region are not limited to the above-mentioned examples. The collector region 22 and the cathode region 82 are exposed on the lower surface 23 of the semiconductor substrate 10 and are connected to the collector electrode 24. The collector electrode 24 may be in contact with the entire lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metal material such as aluminum.

[0079] In a cross section different from the A-A' cross section, a second conductivity type contact region may be provided in the transistor section 70, the boundary region 72, and the diode section 80. The contact region may be provided between the base region 14 and the upper surface 21. The contact region may be a P+ type region having a doping concentration higher than that of the base region 14.

[0080] The boundary between the transistor portion 70 and the boundary region 72 may be the center of the trench portion 40, whose lower surface 23 is the collector region 22, between the mesa portion 60 having the emitter region 12 and the mesa portion 61 having no emitter region 12. The boundary between the boundary region 72 and the diode portion 80 may be the boundary between the cathode region 82 and the collector region 22.

[0081] Each trench portion 40 extends from the upper surface 21 of the semiconductor substrate 10, penetrating the base region 14 and reaching the drift region 18. In regions where at least one of the emitter region 12, the contact region, and the accumulation region 16 is provided, each trench portion 40 also penetrates these doped regions and reaches the drift region 18. The trench portion 40 penetrating the doped region does not necessarily mean that the trench portion 40 is formed after the doped region is formed. The trench portion 40 penetrating the doped region also means that the doped region is formed between the trench portions 40 after the trench portions 40 are formed. The bottom of the trench portion 40 may have a downwardly convex curved shape (curved in cross section).

[0082] The gate conductive portion 44 may be provided longer in the depth direction than the base region 14. The trench portion 40 in this cross section is covered with an interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. Of the gate conductive portions 44 of the multiple trench portions 40, at least one gate conductive portion 44 of the transistor portion 70 is electrically connected to the gate wiring. When a predetermined gate voltage is applied to the gate conductive portion 44, a channel is formed by an electron inversion layer in the surface layer of the interface of the base region 14 that contacts the gate trench portion 40. As a result, a main current flows between the emitter electrode 52 and the collector electrode 24 in the transistor portion 70.

[0083] 5 is a diagram showing an example of the BB' cross section in Fig. 3. The BB' cross section is an XZ cross section passing through the emitter region 12, sense well region 28, and active well region 29 of the current sensing section 26. In the BB' cross section, the semiconductor device 100 includes a semiconductor substrate 10, a collector electrode 24, an interlayer insulating film 38, a gate insulating film 42, a current sensing gate runner 51, an emitter electrode 52, a sense emitter electrode 56, and a first gate runner 50.

[0084] The interlayer insulating film 38 is provided on the upper surface 21 of the semiconductor substrate 10. The emitter electrode 52, the sense emitter electrode 56, and the first gate runner 50 are provided above the interlayer insulating film 38. The sense emitter electrode 56 passes through a contact hole 54 in the interlayer insulating film 38 and is in contact with the upper surface 21 of the semiconductor substrate 10. The sense emitter electrode 56 is made of a metal material such as aluminum. The collector electrode 24 is provided on the lower surface 23 of the semiconductor substrate 10.

[0085] The sense emitter electrode 56 and the emitter electrode 52 are separated on the upper surface 21 of the semiconductor substrate 10. The sense emitter electrode 56 is connected to the emitter electrode 52 via a sense resistor. The first gate runner 50 is provided between the sense emitter electrode 56 and the emitter electrode 52.

[0086] A current sense gate runner 51 is provided between the sense emitter electrode 56, the first gate runner 50, and the emitter electrode 52 and the upper surface 21 of the semiconductor substrate 10 in the depth direction. The current sense gate runner 51 is electrically insulated from the semiconductor substrate 10 by a gate insulating film 42 extending to the upper surface 21 of the semiconductor substrate 10. In the B-B' cross section, the current sense gate runner 51 is insulated from the sense emitter electrode 56, the first gate runner 50, and the emitter electrode 52 by an interlayer insulating film 38. In other cross sections, the current sense gate runner 51 may be connected to the first gate runner 50. In other cross sections, the current sense gate runner 51 may be connected to the gate conductive portion 44 of the current sense section 26. The first gate runner 50 and the current sense gate runner 51 may apply a gate voltage to the gate conductive portion 44 of the current sense section 26.

[0087] The sense emitter electrode 56 is electrically connected to the sense well region 28 via a contact hole 54 provided in the interlayer insulating film 38 and the P+ contact region 17 or the base region 14. The first gate runner 50 is electrically insulated from the active well region 29 by the interlayer insulating film 38. The sense well region 28 and the active well region 29 are P+ type regions in contact with the upper surface 21 of the semiconductor substrate 10. In the depth direction, the sense well region 28 and the active well region 29 may be provided deeper than the base region 14 and may be provided deeper than the trench portion 40.

[0088] The current sensing unit 26 has a drift region 18 of a first conductivity type and a base region 14 of a second conductivity type provided between the drift region 18 and the upper surface 21 of the semiconductor substrate 10. The current sensing unit 26 has a plurality of trench portions 40 provided from the upper surface 21 of the semiconductor substrate 10 toward the inside. The trench portions 40 in this example are arranged along a first direction and have their elongated length in a second direction.

[0089] The current sense unit 26 has a mesa portion 63, which is a region between the trench portions 40. In this example, the mesa portion 63 is provided between the trench portions 40 in the first direction and extends in the second direction. Similar to the transistor portion 70, the mesa portion 63 has an emitter region 12, a base region 14, and an accumulation region 16 provided from the upper surface 21. The current sense unit 26 has a P+ type collector region 22 on the lower surface 23. The configuration of the current sense unit 26 and the functions of each component may be similar to those of the transistor portion 70.

[0090] The mesa portion 63 provided at the end of the current sense unit 26 in the first direction may not be provided with the emitter region 12 and the accumulation region 16. The region between the trench portion 40 provided at the end of the current sense unit 26 in the first direction and the sense well region 28 may also not be provided with the emitter region 12 and the accumulation region 16.

[0091] The distance in the first direction between the trench portion 40 at the end of the current sense unit 26 and the sense well region 28 is defined as D4. Distance D4 may be smaller than distance D5 (see FIG. 6 ) between the trench portion 40 at the end of the transistor unit 70 and the active well region 29. This reduces the distance between the current sense unit 26 and the sense well region 28, allowing holes that have leaked from the transistor unit 70 to be more easily extracted via the sense well region 28, thereby suppressing carrier accumulation. In this case, a P+ contact region 17 may be provided on the surface side of the base region 14 adjacent to the sense well region 28. For example, the P+ contact region 17 is provided in contact with the inner periphery of the sense well region 28 and surrounding the current sense unit 26. This makes it easier to extract holes that have flowed into the sense well region 28.

[0092] A contact region of the second conductivity type may be provided in the current sensing unit 26 in a cross section different from the B-B' cross section. The contact region may be provided between the base region 14 and the upper surface 21. The contact region may be a P+ type region with a higher doping concentration than the base region 14. By providing the contact region in the current sensing unit 26, holes that have leaked around from the transistor unit 70 can be extracted via the contact region.

[0093] The distance between the trench portions 40 of the current sensing unit 26 in the first direction is defined as D3. The distance D3 may be larger than the distance D2 (see FIG. 4) between the trench portions 40 of the transistor unit 70 in the first direction. This increases the area of ​​the contact region of the current sensing unit 26, allowing more holes to be extracted.

[0094] 6 is a diagram showing an example of the CC' cross section in FIG. 2. The CC' cross section is an XZ cross section passing through the emitter region 12, the active well region 29, and part of the edge termination structure 90 of the transistor section 70. In the CC' cross section, the semiconductor device 100 includes the semiconductor substrate 10, the collector electrode 24, the interlayer insulating film 38, the emitter electrode 52, the first gate runner 50, and the field plate 94. The configuration of the transistor section 70 may be the same as that of the transistor section 70 described in FIG. 4.

[0095] In the semiconductor substrate 10, an active well region 29 is provided between the edge termination structure 90 and the transistor portion 70. The active well region 29 is a P+ type region that contacts the upper surface 21 of the semiconductor substrate 10. A portion of the trench portion 40 may be disposed in a position that overlaps with the active well region 29.

[0096] An interlayer insulating film 38 covering the active well region 29 may be provided on the upper surface 21 of the semiconductor substrate 10. Electrodes and wiring, such as an emitter electrode 52 and a first gate runner 50, are provided above the interlayer insulating film 38. The emitter electrode 52 extends from above the active portion 120 to above the active well region 29. The emitter electrode 52 may be connected to the active well region 29 via a contact hole 54 provided in the interlayer insulating film 38.

[0097] The first gate runner 50 is disposed between the emitter electrode 52 and the edge termination structure 90. The emitter electrode 52 and the first gate runner 50 are disposed separately from each other. The first gate runner 50 is electrically insulated from the active well region 29 by the interlayer insulating film 38.

[0098] Edge termination structure 90 includes multiple guard rings 92, multiple high-concentration regions 202, and multiple field plates 94. In this example, guard rings 92 are P+ type semiconductor regions formed by ion implantation near top surface 21. Guard rings 92 can be formed by selectively implanting a P-type dopant, such as boron, from top surface 21 of semiconductor substrate 10, followed by heat treatment. The depth of the bottom of guard rings 92 may be the same as or different from the depth of the bottom of active well region 29.

[0099] The upper surface of the guard ring 92 is covered with the interlayer insulating film 38. The field plate 94 is made of a metal such as aluminum or a conductive material such as polysilicon. The field plate 94 may also be made of a metal alloy such as an aluminum-silicon alloy, e.g., AlSi or AlSiCu. The field plate 94 may be made of the same material as the first gate runner 50 or the emitter electrode 52. The field plate 94 is provided on the interlayer insulating film 38. In this example, the field plate 94 is connected to the guard ring 92 through a contact hole 54 provided in the interlayer insulating film 38.

[0100] In the edge termination structure 90, a collector region 22 may be provided in a region that contacts the lower surface 23. Each guard ring 92 may be provided on the upper surface 21 to surround the active portion 120. The multiple guard rings 92 may have the function of spreading a depletion layer generated in the active portion 120 outward from the semiconductor substrate 10. This makes it possible to prevent electric field concentration inside the semiconductor substrate 10, and improve the breakdown voltage of the semiconductor device 100.

[0101] The distance in the first direction between the trench portion 40 provided at the end of the transistor portion 70 in the first direction and the active well region 29 is defined as D5. The emitter region 12 and the accumulation region 16 do not have to be provided between the trench portion 40 provided at the end of the transistor portion 70 in the first direction and the active well region 29. A P+ contact region 17 may be provided on the surface side of the base region 14 between the trench portion 40 provided at the end of the transistor portion 70 in the first direction and the active well region 29.

[0102] 7 is a top view of the mesa portion 60 of the transistor portion 70 and the mesa portion 63 of the current sense portion 26. For comparison, the mesa portions are shown side by side in FIG. 7. The transistor portion 70 and the current sense portion 26 each have an emitter region 12 and a contact region 15. The contact region 15 is provided between the base region 14 and the upper surface 21 of the semiconductor substrate 10, and is a region of the second conductivity type with a higher concentration than the base region 14.

[0103] The area ratio of the contact region 15 to the area of ​​one mesa portion 63 of the current sense portion 26 may be larger than the area ratio of the contact region 15 to the area of ​​one mesa portion 60 of the transistor portion 70. This increases the area ratio of the contact region 15 of the current sense portion 26 compared to the transistor portion 70, and allows more holes to be extracted via the contact region 15.

[0104] In this example, the emitter regions 12 and the contact regions 15 are alternately arranged along the second direction (Y-axis direction). The length W2 of the contact regions 15 of the current sense unit 26 in the second direction may be greater than the length W1 of the contact regions 15 of the transistor unit 70 in the second direction. This allows the area ratio of the contact regions 15 of the current sense unit 26 to be higher compared to the transistor unit 70, and more holes can be extracted via the contact regions 15.

[0105] FIG. 8 shows the layout of the current sense unit 26 and its periphery in a measurement sample with a large chip size. FIG. 9 shows the layout of the current sense unit 26 and its periphery in a measurement sample with a small chip size. The inventors measured the samples shown in FIGS. 8 and 9 to investigate the active area dependence of short-circuit withstand capability. A large chip size means a large area of ​​the active unit 120. The area ratio between the area of ​​the active unit 120 and the area of ​​the current sense unit 26 is set to a predetermined ratio regardless of the chip size. Furthermore, the combined area of ​​the current sense unit 26 and the sense well region 28 is constant regardless of the chip size. Therefore, when the chip size is large, the area of ​​the current sense unit 26 also increases accordingly. Accordingly, the distance between the transistor unit 70 and the current sense unit 26 in the second direction decreases. On the other hand, when the chip size is small, the area of ​​the current sense unit 26 also decreases accordingly. Accordingly, the distance between the transistor unit 70 and the current sense unit 26 in the second direction increases accordingly.

[0106] 10 is a graph showing the measurement results of the dependency of short-circuit withstand voltage on the active area. The horizontal axis of FIG. 10 represents the area of ​​the transistor section 70, and the vertical axis represents the current density of the current sense section 26. There is a tendency for the withstand voltage to increase as the chip size decreases, that is, as the distance between the transistor section 70 and the current sense section 26 increases. This is thought to be because the greater the distance between the transistor section 70 and the current sense section 26, the less holes are able to sneak from the transistor section 70 to the current sense section 26.

[0107] 11 is a diagram showing another example of region A in FIG. 3 . The transistor section 70 does not have to be provided between the pad sections 110. The distance Dts between the transistor section 70 facing the current sense section 26 in the second direction and the current sense section 26 may be greater than the distance Dds between the diode section 80 and the current sense section 26 in the second direction. This ensures a sufficient distance between the transistor section 70 and the current sense section 26, thereby preventing holes from sneaking from the transistor section 70 to the current sense section 26. The distance Dts between the transistor section 70 and the current sense section 26 in the second direction may be 500 μm or greater.

[0108] If holes leak from the transistor section 70 to the diode section 80, switching loss increases, but some leakage is acceptable. On the other hand, if holes leak from the transistor section 70 to the current sense section 26, oscillation will occur, leading to destruction of the current sense section 26. Therefore, the distance Dts between the transistor section 70 and the current sense section 26 facing the current sense section 26 in the second direction may be greater than the width Wi of the boundary region 72 in the first direction. This makes it possible to more reliably suppress leakage of holes from the transistor section 70 to the current sense section 26 than leakage of holes from the transistor section 70 to the diode section 80. Note that the above-described relationship between distance and width may also hold true in FIG. 3 .

[0109] Fig. 12 is a diagram showing an example of the AB cross section in Fig. 3. The AB cross section is a YZ cross section passing through the transistor section 70 and the current sense section 26. The configurations of the transistor section 70 and the current sense section 26 may be the same as any of the configurations described in Figs. 1 to 11.

[0110] In the second direction, a region of the first conductivity type may be provided on the lower surface 23 of the semiconductor substrate 10 between the transistor portion 70 and the current sense portion 26. In this example, an N+ type cathode region 82 is provided on the lower surface 23 of the semiconductor substrate 10 between the transistor portion 70 and the current sense portion 26. This makes it possible to suppress the intrusion of holes from the transistor portion 70 into the current sense portion 26.

[0111] In the A-B cross section, the upper surfaces of the active well region 29 and the sense well region 28 are covered with an interlayer insulating film 38. In the A-B cross section, a P+ contact region 17 may be provided at the end of the transistor section 70 that contacts the active well region 29. In addition, a P+ contact region 17 may be provided at the end of the current sense section 26 that contacts the sense well region 28. The interlayer insulating film 38 may cover a portion of the P+ contact region 17.

[0112] FIG. 13 is a diagram showing another example of the cross section B-B' in FIG. 3. At least one mesa portion 63 of the current sensing unit 26 in this example includes a first-conductivity-type emitter region 12 or a second-conductivity-type P+ contact region 17 provided between the drift region 18 and the upper surface 21 of the semiconductor substrate 10, a second-conductivity-type base region 14 provided between the drift region 18 and the upper surface 21 of the semiconductor substrate 10, a trench contact 58 extending from the upper surface 21 of the semiconductor substrate 10 toward the interior, and a bottom P region 19 provided at the bottom of the trench contact 58 in the depth direction. Providing the trench contact 58 and the bottom P region 19 allows holes that have slipped around to be extracted, thereby suppressing carrier accumulation. The trench contact 58 may or may not penetrate the emitter region 12 or the P+ contact region 17. The bottom P region 19 may be in contact with the base region 14. A trench contact 58 and a bottom P region 19 may also be provided in a mesa portion 63 provided at the end of the current sense unit 26 in the first direction, where the emitter region 12 and the accumulation region 16 are not provided. The configuration other than the mesa portion 63 in Figure 13 may be the same as that in Figure 5. The mesa portion 60 of the transistor unit 70 does not need to have the trench contact 58 and the bottom P region 19.

[0113] Fig. 14 is a diagram showing another example of an enlarged view of region A in Fig. 2. Region A in this example differs from region A shown in Fig. 2 in that a contact hole 154 is provided in the region A when viewed from above. The other configurations are the same as those in Fig. 2, and therefore description thereof will be omitted.

[0114] A contact hole 154 may be provided between the transistor section 70 and the current sensing section 26 in the second direction. In this example, a contact hole 154-1 and a contact hole 154-2 are provided. The contact hole 154-1 connects the active well region 29 to an electrode. The contact hole 154-2 connects the sense well region 28 to an electrode.

[0115] Either the contact hole 154-1 or the contact hole 154-2 may be provided, or both may be provided. A plurality of the contact holes 154-1 may be provided in the X-axis direction.

[0116] Figure 15 is a diagram showing the AB cross section in Figure 14. The AB cross section of this example differs from the AB cross section shown in Figure 12 in that it has a contact hole 154 and an extraction trench contact 156, and in that the boundary between the emitter electrode 52 and the sense emitter electrode 56 is located on the negative side in the Y-axis direction. The other configurations are the same as those in Figure 12, so explanations will be omitted as appropriate.

[0117] The semiconductor device 100 of this example also includes an interlayer insulating film 38 provided on the upper surface 21 of the semiconductor substrate 10. A sense emitter electrode 56 is provided above the interlayer insulating film 38. The interlayer insulating film 38 has a contact hole 154-2 between the transistor portion 70 and the current sensing portion in the second direction. The contact hole 154-2 of this example is provided above the sense well region 28.

[0118] The sense emitter electrode 56 and the sense well region 28 are connected via a contact hole 154-2, which allows holes that have entered the current sensing section 26 to be further extracted.

[0119] An upper surface electrode may be provided above the interlayer insulating film 38. The upper surface electrode may be the emitter electrode 52 or the sense emitter electrode 56 provided above the transistor portion 70. The semiconductor device 100 may include a well region of the second conductivity type provided between the transistor portion 70 and the sense well region 28 in the second direction. The well region may be the active well region 29 that surrounds the transistor portion 70 and the diode portion 80 in top view, or may be an active well region 29 that does not surround the transistor portion 70 and the diode portion 80, or may be another region of the second conductivity type.

[0120] The interlayer insulating film 38 may have a contact hole 154-1 between the transistor section 70 and the sense well region 28 in the second direction. The upper electrode and the well region may be connected via the contact hole 154-1. This also makes it possible to further extract holes that have entered the current sense section 26.

[0121] In this example, the emitter electrode 52 and the active well region 29 are connected via a contact hole 154-1. In another example, the emitter electrode 52 may be connected to an active well region 29 that does not surround the transistor section 70 and the diode section 80, or the sense emitter electrode 56 may be connected to another region of the second conductivity type via the contact hole 154-1. The position of the contact hole 154-1 in the second direction may be adjusted as appropriate within the range between the transistor section 70 and the sense well region 28 depending on the top surface electrode to be connected.

[0122] At the lower ends of the contact holes 154-1 and 154-2, there are provided pull-out trench contacts 156-1 and 156-2, which are formed from the upper surface 21 of the semiconductor substrate 10 toward the inside. This further improves the hole extraction effect. The pull-out trench contacts 156 may have the same depth as or a different depth from the trench contacts provided in the active section 120. The pull-out trench contacts 156 may have the same depth as or a different depth from the trench contacts 58 (see FIG. 13 ) provided in the current sensing section 26. The width of the pull-out trench contacts 156 may be wider than or the same as the width of the trench contacts provided in the active section 120. The width of the pull-out trench contacts 156 may be wider than or the same as the trench contacts 58 provided in the current sensing section 26.

[0123] The length of contact hole 154-1 in the first direction is defined as L1 (see FIG. 14). Furthermore, the length of contact hole 154-2 in the first direction is defined as L2 (see FIG. 14). Lengths L1 and L2 may be greater than at least one of the width Wt of the transistor portion 70 facing the current sense portion 26 and the width Ws of the current sense portion 26. This allows holes that have slipped around from the transistor portion 70 to be extracted before they reach the current sense portion 26. Lengths L1 and L2 may be greater than either the width Wt of the transistor portion 70 facing the current sense portion 26 or the width Ws of the current sense portion 26. Furthermore, length L1 may be greater than length L2.

[0124] The contact hole 154-1 may be provided so as to surround the current sense unit 26. Similarly, the contact hole 154-2 may be provided so as to surround the current sense unit 26. This makes it possible to further extract holes that have entered the current sense unit 26. The contact holes 154-1 and 154-2 may be provided in the form of discrete dots.

[0125] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0126] 10...Semiconductor substrate, 12...Emitter region, 14...Base region, 15...Contact region, 16...Accumulation region, 17...P+contact region, 18...Drift region, 19...Bottom P region, 21...Upper surface, 22...Collector region, 23...Lower surface, 24...Collector electrode, 26...Current sense portion, 28...Sense well region, 29...Active well region, 34...Inner peripheral edge, 36...Outer peripheral edge, 38...Interlayer insulating film, 40...Trench portion, 42...Gate insulating film, 44...Gate conductive portion, 48...Second gate runner, 50...First gate runner, 51...Current sense gate runner, 52...Emitter electrode, 54...Contact hole, 56...Sense emitter electrode, 58... ..trench contact, 60...mesa portion, 61...mesa portion, 62...mesa portion, 63...mesa portion, 70...transistor portion, 72...boundary region, 80...diode portion, 82...cathode region, 90...edge termination structure portion, 92...guard ring, 94...field plate, 100...semiconductor device, 110...pad portion, 111...temperature sensing portion, 112...temperature sensing wiring, 114...current control pad, 115...auxiliary emitter pad, 116...gate pad, 117...cathode pad, 118...anode pad, 120...active portion, 140...peripheral edge, 142...first edge, 154...contact hole, 156...pulling trench contact, 202...high concentration region

Claims

1. A semiconductor device including a semiconductor substrate, The semiconductor substrate is a transistor portion and a diode portion alternately arranged along a first direction and having a longitudinal direction in a second direction; a current sensing portion disposed opposite the transistor portion in the second direction; The transistor section, the diode section, and the current sense section are a drift region of a first conductivity type; a base region of a second conductivity type provided between the drift region and an upper surface of the semiconductor substrate; When viewed from above, the current sensing portion is surrounded by a sense well region of a second conductivity type that is higher in concentration than the base region and is provided deeper from the upper surface than the base region; In the second direction, the width of the sense well region in the first direction is larger than the width of the transistor portion facing the current sense portion in the first direction. Semiconductor device.

2. the semiconductor substrate has an active well region surrounding the transistor portion and the diode portion in a top view, The sense well region is provided inside the active well region when viewed from above. The semiconductor device according to claim 1 .

3. A plurality of pad portions are provided above the active well region; The current sensing portion is disposed between the two pad portions in the first direction. The semiconductor device according to claim 2 .

4. At least a part of the transistor section facing the current sense section is between the pad sections. The semiconductor device according to claim 3 .

5. The transistor portion is an emitter region of a first conductivity type provided on the upper surface; a collector region of a second conductivity type provided on a lower surface of the semiconductor substrate; having The diode portion is The upper surface does not have the emitter region; a cathode region of a first conductivity type provided on the lower surface having The semiconductor substrate is a boundary region provided between the transistor portion and the diode portion, the boundary region not having the emitter region on the upper surface and having the collector region on the lower surface and An outer circumferential end position of the sense well region in the first direction faces the boundary region in the second direction. The semiconductor device according to claim 1 .

6. the transistor section and the current sense section have a plurality of trench sections arranged along the first direction, longitudinal directions of which extend in the second direction, and provided from the top surface of the semiconductor substrate toward the inside; A distance in the first direction between the trench portion provided at the end of the current sense portion in the first direction and the sense well region is smaller than a distance in the first direction between the trench portion provided at the end of the transistor portion in the first direction and the active well region. The semiconductor device according to claim 2 .

7. the sense well region has an inner circumferential end facing the current sense portion in a top view and an outer circumferential end opposite the inner circumferential end, A width between the inner and outer circumferential ends of the sense well region is greater than a distance between the active well region and the sense well region. The semiconductor device according to claim 2 .

8. The transistor section and the current sense section include A plurality of trenches provided from the top surface of the semiconductor substrate toward the inside thereof; a mesa portion which is a region between the trench portions; a contact region of a second conductivity type having a higher concentration than the base region, the contact region being provided between the base region and the upper surface of the semiconductor substrate; having The area ratio of the contact region to the area of ​​one of the mesa portions of the current sensing section is greater than the area ratio of the transistor section. The semiconductor device according to claim 1 .

9. The length of the contact region of the current sense portion in the second direction is greater than the length of the contact region of the transistor portion in the second direction. The semiconductor device according to claim 8.

10. the transistor section and the current sense section have a plurality of trench sections arranged along a first direction, longitudinal sides of which extend in a second direction, and extending from the top surface of the semiconductor substrate toward the inside; The interval between the trench portions of the current sense portion in the first direction is larger than the interval between the trench portions of the transistor portion in the first direction. The semiconductor device according to claim 1 .

11. The distance between the transistor portion facing the current sense portion and the current sense portion in the second direction is greater than the distance between the diode portion and the current sense portion in the second direction. The semiconductor device according to claim 1 .

12. The semiconductor substrate is a boundary region provided between the transistor portion and the diode portion; A distance between the transistor portion facing the current sense portion in the second direction and the current sense portion is greater than a width of the boundary region in the first direction. The semiconductor device according to claim 1 .

13. A first conductivity type region is provided on the lower surface of the semiconductor substrate between the transistor section and the current sensing section in the second direction. The semiconductor device according to claim 1 .

14. The distance between the transistor section and the current sensing section in the second direction is 500 μm or more. The semiconductor device according to claim 1 .

15. The current sensing unit A plurality of trenches provided from the top surface of the semiconductor substrate toward the inside thereof; a mesa portion which is a region between the trench portions; having At least one of the mesas has: an emitter region of a first conductivity type provided between the drift region and the upper surface of the semiconductor substrate; the base region; a trench contact provided from the top surface of the semiconductor substrate toward the inside; There is The semiconductor device according to claim 1 .

16. The transistor portion is A plurality of the trench portions; The mesa portion; having The mesa portion of the transistor portion does not have the trench contact. The semiconductor device according to claim 15.

17. The width of the current sense portion in the first direction is smaller than the width of the transistor portion facing the current sense portion in the first direction. The semiconductor device according to claim 1 .

18. An inner peripheral end position of the sense well region in the first direction faces the transistor portion in the second direction. The semiconductor device according to claim 1 .

19. an interlayer insulating film provided on the upper surface of the semiconductor substrate; a sense emitter electrode provided above the interlayer insulating film; Further comprising: the interlayer insulating film has a contact hole between the transistor portion and the current sensing portion in the second direction; The sense emitter electrode and the sense well region are connected via the contact hole. The semiconductor device according to claim 1 .

20. an interlayer insulating film provided on the upper surface of the semiconductor substrate; an upper electrode provided above the interlayer insulating film; a well region of a second conductivity type provided between the transistor portion and the sense well region in the second direction; Further comprising: the interlayer insulating film has a contact hole between the transistor portion and the sense well region in the second direction; The upper electrode and the well region are connected via the contact hole. The semiconductor device according to claim 1 .

21. the well region is an active well region surrounding the transistor portion and the diode portion in a top view, The upper electrode is an emitter electrode provided above the transistor portion. The semiconductor device according to claim 20.

22. In the first direction, the length of the contact hole is greater than at least one of the width of the transistor portion facing the current sense portion and the width of the current sense portion. The semiconductor device according to any one of claims 19 to 21.

23. A trench contact for drawing out is provided at the lower end of the contact hole, the trench contact being formed from the upper surface of the semiconductor substrate toward the inside. The semiconductor device according to any one of claims 19 to 21.

24. The current sensing section further includes an emitter region of a first conductivity type that is provided between the base region and an upper surface of the semiconductor substrate and has a doping concentration higher than that of the drift region. The semiconductor device according to claim 1 .