Semiconductor device manufacturing method
Patent Information
- Application Number
- JP2023550589
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-02-27
- Publication Date
- 2025-02-04
- Estimated Expiration
- 2043-02-27
AI Technical Summary
The generation of high resistance regions due to extra point defects caused by ion or electron beam irradiation in semiconductor substrates leads to reduced breakdown voltage and leakage current, deteriorating device characteristics in semiconductor devices like power diodes and IGBTs.
A method involving the introduction of hydrogen into the semiconductor substrate before activation annealing, followed by charged particle beam irradiation and subsequent annealing, to form a buffer layer that suppresses the formation of high resistance regions.
This approach results in a semiconductor device with a buffer layer that prevents the occurrence of high resistance regions, maintaining device characteristics and preventing deterioration.
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a method for manufacturing a semiconductor device. [Background technology]
[0002] Conventionally, semiconductor devices such as power diodes and insulated gate bipolar transistors (IGBTs) are known. Although thinning of these semiconductor devices is effective in reducing losses, problems such as a decrease in the margin for snap-off and oscillation may occur. In order to suppress the occurrence of such problems, a buffer layer is formed in the semiconductor device, for example, by proton irradiation and annealing. For example, a method for manufacturing a semiconductor device disclosed in International Publication No. 2021 / 181644 includes a step of irradiating an ion or electron beam so as to penetrate a semiconductor substrate doped with phosphorus or arsenic, and a step of irradiating the semiconductor substrate with hydrogen plasma to perform annealing. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] International Publication No. 2021 / 181644 Summary of the Invention [Problem to be solved by the invention]
[0004] However, when a semiconductor substrate is irradiated with an ion or electron beam, extra point defects are generated, and high-resistance regions may remain. Such high-resistance regions may cause a decrease in the breakdown voltage of a semiconductor device or the generation of a leakage current, resulting in a deterioration of device characteristics.
[0005] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to provide a semiconductor device including a buffer layer in which the occurrence of high-resistance regions is suppressed. [Means for solving the problem]
[0006] A method for manufacturing a semiconductor device according to the present disclosure includes the steps of preparing a semiconductor substrate, introducing hydrogen into the semiconductor substrate, irradiating the semiconductor substrate with a charged particle beam, and performing activation annealing on the semiconductor substrate after the step of irradiating the charged particle beam. The step of introducing hydrogen is performed before the step of performing activation annealing. Effect of the Invention
[0007] According to the above, a semiconductor device including a buffer layer in which the generation of a high-resistance region is suppressed can be obtained. [Brief description of the drawings]
[0008] [Figure 1] 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Diagram 2] 1 is a distribution diagram of carrier concentration in a semiconductor substrate not including a high-resistance region. [Diagram 3] 1 is a distribution diagram of hydrogen concentration in a semiconductor substrate not including a high-resistance region. [Figure 4] 1 is a distribution diagram of carrier concentration in a semiconductor substrate including a high-resistance region. [Diagram 5] 1 is a distribution diagram of hydrogen concentration in a semiconductor substrate including a high-resistance region. [Figure 6] 4 is a flowchart of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 7] 7 is a schematic distribution diagram of hydrogen concentration in a semiconductor device obtained by the manufacturing method of a semiconductor device shown in FIG. 6. [Figure 8] 7 is a cross-sectional view showing a modified example of the semiconductor device obtained by the manufacturing method of the semiconductor device shown in FIG. [Figure 9] 11 is a flowchart of a method for manufacturing a semiconductor device according to a second embodiment. [Figure 10] 1 is a diagram showing the distribution of carrier concentrations in semiconductor substrates containing different oxygen concentrations; [Figure 11] 10 is a schematic distribution diagram of hydrogen concentration in a semiconductor device obtained by the manufacturing method of a semiconductor device shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] Hereinafter, embodiments of the present disclosure will be described. Note that unless otherwise specified, the same or corresponding parts in the following drawings are given the same reference numerals, and the description thereof will not be repeated.
[0010] Embodiment 1 <Configuration of Semiconductor Device> Fig. 1 is a cross-sectional view of a semiconductor device 100 according to embodiment 1. Fig. 1 shows the semiconductor device 100 obtained by the manufacturing method of the semiconductor device 100 shown in Fig. 6, which will be described later.
[0011] The semiconductor device 100 shown in Fig. 1 is, for example, a vertical diode used as a power semiconductor device, and mainly includes a semiconductor substrate 200, a front surface electrode 10, and a back surface electrode 11. The semiconductor substrate 200 has a first main surface 1a and a second main surface 1b. The second main surface 1b is the surface opposite to the first main surface 1a. The front surface electrode 10 is connected to the first main surface 1a. The back surface electrode 11 is connected to the second main surface 1b.
[0012] The semiconductor substrate 200 is p + anode layer 22 and - A n-type drift layer 1, an n-type buffer layer 2, and an n + 1, if the direction in which the first main surface 1a is disposed as viewed from the second main surface 1b is defined as a first direction X, then in the semiconductor substrate 200, n + n-type cathode layer 21, n-type buffer layer 2, - 1, p-type drift layer + Specifically, a p-type anode layer 22 is formed on the first main surface 1a. + A type anode layer 22 is formed on the second main surface 1b. + A cathode layer 21 is formed on the cathode. + Anode layer 22 and n + Between the n-type cathode layer 21 - A type drift layer 1 is formed.+ The n-type anode layer 22 is in contact with the n-type anode layer 22. - The n-type drift layer 1 is formed. - Type drift layer 1 and n + An n-type buffer layer 2 is formed between the n-type cathode layer 21 and the n-type cathode layer 21. - Type drift layer 1 and n + The n-type buffer layer 2 is formed so as to be in contact with both the n-type cathode layer 21 and the n-type - The n-type impurity concentration is higher than that of the n-type drift layer 1. + The n-type cathode layer 21 has a higher n-type impurity concentration than the n-type buffer layer 2.
[0013] Here, the buffer layer included in the semiconductor substrate 200 will be described. As described later, the process of forming the buffer layer includes a step of irradiating a semiconductor substrate (silicon wafer) with a charged particle beam such as protons. Donors contribute to the formation of the buffer layer. The donors are formed by utilizing a process in which hydrogen and point defects included in the semiconductor substrate 200, which is a silicon wafer, are combined. Point defects are localized disturbances in the crystal lattice. There are two types of point defects: vacancy type and interstitial silicon type. In general, when a point defect is combined with hydrogen, the dangling bond of the point defect is shielded by hydrogen. As a result, the dangling bond does not show an intraband level. On the other hand, if the shielding effect of hydrogen is insufficient and the dangling bond of the point defect remains, a shallow donor type level is formed. By utilizing this physical phenomenon, the donors formed in the silicon wafer can be controlled to form a buffer layer so as to control the carrier concentration in the semiconductor substrate 200. As a result, the time change of the switching waveform during reverse recovery and turn-off of the power semiconductor device becomes gentle, and snap-off and oscillation can be suppressed. As described later, in the process of forming the buffer layer, a process of irradiating the semiconductor substrate with protons is often used, but for example, a process of irradiating the semiconductor substrate with a hydrogen isotope such as helium ions as a charged particle beam may also be used.
[0014] In the process of forming a buffer layer on a semiconductor substrate, a suitable annealing process is required after irradiation with a charged particle beam. When the semiconductor substrate is annealed after the back surface (second main surface 1b) of the semiconductor substrate is irradiated with a charged particle beam, a region in which donors are formed expands on the back surface side. As a result, a buffer layer having a desired thickness can be formed. However, the way in which the buffer layer expands (the thickness of the buffer layer in the first direction X) may differ depending on the type of semiconductor substrate. If the thickness of this buffer layer in the first direction X is small, a high resistance region remains on the back surface side of the semiconductor substrate. As a result, the high resistance region causes a decrease in the breakdown voltage of the semiconductor device and the generation of a leak current, leading to deterioration of device characteristics.
[0015] Here, we will explain the results of our investigation into high-resistance regions in semiconductor substrates. We measured the hydrogen concentration in the semiconductor substrates by secondary ion mass spectrometry, and the carrier concentration in the semiconductor substrates by spreading resistance measurement.
[0016] 2 is a distribution diagram of carrier concentration in a semiconductor substrate that does not include a high-resistance region. In FIG. 2, the horizontal axis indicates the distance (unit: μm) from the back surface of the semiconductor substrate, and the vertical axis indicates the carrier concentration (unit: cm -3 3 is a distribution diagram of hydrogen concentration in a semiconductor substrate that does not include a high-resistance region. In FIG. 3, the horizontal axis indicates the distance (unit: μm) from the back surface of the semiconductor substrate, and the vertical axis indicates the hydrogen concentration (unit: cm -3) is shown. FIG. 4 is a distribution diagram of the carrier concentration in a semiconductor substrate including a high-resistance region. In FIG. 4, the horizontal axis indicates the distance from the rear surface of the semiconductor substrate, and the vertical axis indicates the carrier concentration in the semiconductor substrate. FIG. 5 is a distribution diagram of the hydrogen concentration in a semiconductor substrate including a high-resistance region. In FIG. 5, the horizontal axis indicates the distance from the rear surface of the semiconductor substrate, and the vertical axis indicates the hydrogen concentration in the semiconductor substrate. Note that the semiconductor substrate including a high-resistance region and the semiconductor substrate not including a high-resistance region shown in FIG. 2 to FIG. 5 were manufactured by carrying out proton irradiation and annealing treatment under the same conditions. In addition, secondary ion mass spectrometry revealed a 5×10 16 cm -3 Because hydrogen concentrations below 5×10 cannot be detected, hydrogen concentrations below 5×10 16 cm -3 In the following region the background signal is shown.
[0017] As can be seen from FIG. 2 and FIG. 3, in the semiconductor substrate that does not include a high-resistance region, the hydrogen concentration is 5×10 16 cm -3 and hydrogen was detected. Meanwhile, as can be seen from FIG. 4, in the semiconductor substrate including the high-resistance region, the high-resistance region exists in a region that is 5 μm or less away from the back surface. The carrier concentration in the high-resistance region is lower than the carrier concentration in the donor generation region. Also, as can be seen from FIG. 5, the region that is 5 μm or less away from the back surface is a region where hydrogen was not detected. Note that the data on the hydrogen concentration in the region that is 5 μm or less away from the back surface in FIG. 5 indicates the background signal of secondary ion mass spectrometry, and the hydrogen concentration in the region is 5×10 16 cm -3 As can be seen from Figures 4 and 5, the distance from the back surface where the high resistance region was observed was almost the same as the distance from the back surface where no hydrogen was detected.
[0018] Even if the annealing temperature in the annealing process was changed, the result that the distance from the back surface of the periphery of this high resistance region (the boundary between the high resistance region and the donor generation region) and the distance from the back surface of the periphery of the region where hydrogen is not detected (the boundary between the region where hydrogen is not detected and the region where hydrogen is detected) were almost the same did not change. In other words, it is thought that a high resistance region occurs in a region of the semiconductor substrate where the concentration of hydrogen is low. In addition, as will be described later, it was revealed that the distance from the back surface indicating the high resistance region depends on the oxygen concentration of the semiconductor substrate.
[0019] Here, the manufacturing method of the semiconductor device 100 according to the present embodiment is characterized in that a step of introducing hydrogen into the semiconductor substrate is performed before the activation annealing step. Based on the above experimental results, a manufacturing method of the semiconductor device 100 described below can obtain the semiconductor device 100 including the buffer layer 2 in which the occurrence of high resistance regions is suppressed. As a result, a power semiconductor device in which deterioration of device characteristics is prevented can be obtained.
[0020] <Method of Manufacturing Semiconductor Device 100> FIG. 6 is a flowchart of a method for manufacturing the semiconductor device 100 according to the first embodiment. As an example of a method for manufacturing the semiconductor device 100, a method for manufacturing a vertical diode as shown in FIG. 1 will be described here. As shown in FIG. 6, in the method for manufacturing the semiconductor device 100 according to the present embodiment, first, a step (S1a) of preparing a semiconductor substrate 200 is performed. In this step (S1a), a silicon wafer is prepared as the semiconductor substrate 200 constituting the semiconductor device 100. The silicon wafer may be of n-type or n-type. - The silicon wafer is cut from a mold ingot. The silicon wafer has a front surface (first main surface 1a) and a back surface opposite the front surface. The hydrogen concentration in the silicon wafer is, for example, 1×10 13 cm -3 The following is the result.
[0021] Next, a step (S2a) of introducing hydrogen is performed. In this step (S2a), hydrogen is impregnated from the front surface to the back surface in the first direction X. Specifically, this step (S2a) includes a step of annealing the silicon wafer in at least one of a state in which the silicon wafer is in contact with a film containing hydrogen or a state in which the silicon wafer is exposed to a hydrogen atmosphere. For example, in a state in which the silicon wafer is exposed to a hydrogen atmosphere, the silicon wafer is annealed in a furnace such as a vertical furnace at a temperature range of 1000°C to 1300°C (627K to 1027K). For example, annealing the silicon wafer at 1100°C for 5 hours can impregnate the entire silicon wafer with a high concentration of hydrogen.
[0022] In this step (S2a), other methods may be used as long as hydrogen can be impregnated into the silicon wafer. Therefore, the step (S2a) of introducing hydrogen may include a step of exposing the silicon wafer to hydrogen plasma or a step of immersing the silicon wafer in a liquid containing hydrogen ions, in addition to a step of annealing the silicon wafer in at least one of a state in which the silicon wafer is in contact with a film containing hydrogen or a state in which the silicon wafer is exposed to a hydrogen atmosphere. In the step (S2a) of introducing hydrogen, hydrogen may be introduced not only from the front surface of the silicon wafer but also from the side surface connecting the front surface and the back surface.
[0023] Next, a step (S3a) of forming a surface structure is performed. In this step (S3a), a surface structure of the semiconductor device 100 is formed on the first main surface 1a of the silicon wafer. Specifically, p + A type anode layer 22 is formed on the first main surface 1a. + A surface electrode 10 (anode electrode) is formed which is connected to the mold anode layer.
[0024] Next, a step (S4a) of grinding the back surface is performed. In this step (S4a), the back surface of the silicon wafer is ground. Specifically, after protecting the surface structure, the back surface of the silicon wafer is ground using a grinding means such as CMP (Chemical Mechanical Polish). As a result, the thickness of the silicon wafer is thinned to a thickness required for the semiconductor device 100. Note that the back surface of the silicon wafer after grinding is the second main surface 1b, and the region from the first main surface 1a to the second main surface 1b is the semiconductor layer.
[0025] Next, a step (S5a) of forming a first buffer layer is performed. In this step (S5a), a first buffer layer is formed on the second main surface 1b of the silicon wafer. Specifically, an n-type layer is formed on the surface layer of the second main surface 1b by implanting n-type dopant ions such as phosphorus into the second main surface 1b. Note that the ion implantation may be performed multiple times. In addition, since the first buffer layer can be substituted with a second buffer layer described later, the step (S5a) of forming the first buffer layer may be omitted.
[0026] Next, a step (S6a) of forming a back surface structure is performed. In this step (S6a), a back surface structure of the semiconductor device 100 is formed on the second main surface 1b of the silicon wafer. Specifically, n + A type cathode layer 21 is formed. + In addition to the type cathode layer 21, for example, + A type cathode layer may be partially formed to produce a Relaxed Field of Cathode (RFC) diode.
[0027] Next, a step (S7a) of irradiating a charged particle beam is performed. In this step (S7a), point defects are formed in the silicon wafer. Specifically, the second main surface 1b of the silicon wafer is irradiated with a charged particle beam. The charged particle beam is, for example, protons. The protons are irradiated, for example, by using an accelerator. By using the accelerator, the protons are accelerated to several hundreds KeV to several tens MeV and irradiated onto the silicon wafer. The dose of protons is, for example, 1×1012 ~1×10 15 cm -2 In addition, helium ions may be used as the charged particle beam. In this way, point defects are locally formed in the silicon wafer.
[0028] Incidentally, even if the step (S7a) of irradiating the charged particle beam is not performed, the silicon wafer inherently contains some point defects. Therefore, if the silicon wafer has point defects, the step (S7a) of irradiating the charged particle beam does not have to be performed. Also, the step (S7a) of irradiating the charged particle beam may be performed before the step (S8a) of performing activation annealing, which will be described later. The step (S7a) of irradiating the charged particle beam is not limited to being performed immediately after the step (S6a) of forming the back surface structure, and may be performed, for example, after the step (S4a) of grinding the back surface.
[0029] Next, a step (S8a) of activation annealing is performed. In this step (S8a), the silicon wafer is annealed for the purpose of at least one of forming donors and eliminating point defects. Specifically, the silicon wafer is annealed at a temperature range of 200°C to 500°C while exposed to an inert gas atmosphere such as nitrogen. In this way, hydrogen in the silicon wafer reacts with point defects to form donors. As a result, the n-type buffer layer 2 shown in FIG. 1 is formed. The layer thus formed is the second buffer layer, and the step (S7a) of irradiating a charged particle beam and the step (S8a) of activation annealing are collectively referred to as a step of forming the second buffer layer.
[0030] In the activation annealing step (S8a), if the annealing time is increased, the thickness of the n-type buffer layer 2 in the first direction X increases. In the activation annealing step (S8a), the annealing temperature is preferably in the range of 200°C to 500°C. If the annealing temperature is lower than 200°C, the efficiency of donor formation decreases. If the annealing temperature is higher than 500°C, the annihilation of donors becomes significant. By forming the above-mentioned second buffer layer and other structures on the silicon wafer in this manner, the silicon wafer is used as the semiconductor substrate 200.
[0031] Next, a step (S9a) of forming an electrode on the back surface is carried out. In this step (S9a), an electrode is formed on the second main surface 1b. Specifically, a back surface electrode 11 (cathode electrode) is formed on the second main surface 1b. In this manner, a semiconductor device 100 including a buffer layer 2 in which the occurrence of a high resistance region as shown in FIG. 1 is suppressed can be obtained.
[0032] Here, a preferred range of hydrogen concentration in the semiconductor substrate will be described. Fig. 7 is a schematic distribution diagram of hydrogen concentration in the semiconductor device 100 obtained by the above-mentioned manufacturing method of the semiconductor device 100. In Fig. 7, the horizontal axis indicates the distance (unit: μm) from the surface of the semiconductor substrate 200, and the vertical axis indicates the hydrogen concentration (unit: cm -3 ) are shown. Example 1 is a silicon wafer in which the annealing temperature is low and the annealing time is short in the step (S2a) of introducing hydrogen. Example 2 is a silicon wafer in which the annealing temperature is sufficiently high and the annealing time is sufficiently long in the step (S2a) of introducing hydrogen.
[0033] As can be seen from FIG. 7, in the silicon wafer according to the second embodiment, the hydrogen concentration in the semiconductor substrate (semiconductor layer) when the semiconductor device 100 is formed is almost constant from the front surface to the back surface in the first direction X. On the other hand, in the silicon wafer according to the first embodiment, the hydrogen concentration monotonically decreases from the front and back surfaces of the silicon wafer toward the center of the silicon wafer. Therefore, the hydrogen concentration in the semiconductor substrate (semiconductor layer) when the semiconductor device 100 is formed is monotonically decreased from the first main surface 1a toward the center in the thickness direction of the semiconductor substrate. Also, the hydrogen concentration on the second main surface 1b side, which is the back surface of the semiconductor substrate, is lower than the hydrogen concentration on the first main surface 1a side. Thus, in the step (S2a) of introducing hydrogen, if the annealing time is sufficiently long or the annealing temperature is sufficiently high, the hydrogen concentration in the semiconductor substrate is almost constant from the front surface to the back surface in the first direction X. In order to sufficiently suppress the high resistance region in the buffer layer 2, the hydrogen concentration in the region in the semiconductor layer where the hydrogen concentration is constant should be 1×10 14 cm -3 It is preferable that the concentration is 1×10 or more. 15 cm -3 More preferably, the above is true.
[0034] The step (S2a) of introducing hydrogen may be performed before the step (S8a) of performing activation annealing. The step (S2a) of introducing hydrogen may be performed, for example, before the step (S7a) of irradiating a charged particle beam, or may be performed before the step (S3a) of forming a surface structure as in the manufacturing method of the semiconductor device 100 according to the first embodiment.
[0035] However, as described later, the profile of the buffer layer 2 is affected not only by the conditions for irradiation with the charged particle beam and the conditions for activation annealing, but also by the oxygen concentration contained in the silicon wafer. As in the manufacturing method of the semiconductor device 100 according to the first embodiment, the step of introducing hydrogen is performed immediately after the step (S1a) of preparing the semiconductor substrate 200, so that the semiconductor device 100 including the buffer layer 2 in which the occurrence of a high resistance region is suppressed can be obtained regardless of the oxygen concentration in the silicon wafer. In other words, a power semiconductor device in which deterioration of device characteristics is prevented can be obtained regardless of the type of silicon wafer.
[0036] In addition, in the above-mentioned method for manufacturing semiconductor device 100, the step (S3a) of forming a surface structure, the step (S5a) of forming a first buffer layer, the step (S6a) of forming a back surface structure, and the step (S9a) of forming an electrode on the back surface can be appropriately modified depending on the type of semiconductor device 100 (e.g., a diode, an IGBT, etc.).
[0037] (Configuration of Modified Example of Semiconductor Device 100) Fig. 8 is a cross-sectional view showing a modified example of the semiconductor device 100 obtained by the manufacturing method of the semiconductor device 100 shown in Fig. 1. Fig. 8 corresponds to Fig. 1. The semiconductor device 100 shown in Fig. 8 basically has the same configuration as the semiconductor device 100 shown in Fig. 1, but is different in that the semiconductor device 100 is an IGBT.
[0038] The semiconductor device 100 shown in Fig. 8 can be obtained by a manufacturing method similar to that of the semiconductor device 100 shown in Fig. 6. The semiconductor substrate 200 includes a p-type contact layer 4 and an n + a p-type emitter layer 6, a p-type base layer 5, and an n - A n-type drift layer 1, an n-type buffer layer 2, and a p + 8, the semiconductor substrate 200 includes a p-type collector layer 3, a gate electrode 8, and a gate insulating film 7. As shown in FIG. + n-type collector layer 3, n-type buffer layer 2, -A p-type drift layer 1, a p-type base layer 5, a p-type contact layer 4 and an n + A type emitter layer 6 is then formed.
[0039] Specifically, a plurality of p-type contact layers 4 and a plurality of n-type contact layers 5 are provided on the surface layer of the first main surface 1a. + The n-type emitter layer 6 is formed. + A trench is formed in the first main surface 1a between the n-type emitter layers 6. The trench is connected to the n-type base layer 5 via the p-type base layer 5. - The p-type contact layers 4 are formed so as to reach the n-type drift layer 1. A gate insulating film 7 is formed so as to cover the inner surface of the trench. A gate electrode 8 is formed so as to be in contact with the gate insulating film 7. The inside of the trench is filled with the gate electrode 8 and the gate insulating film 7. From a different point of view, the p-type contact layers 4 are configured as a pair, and the pair of p-type contact layers 4 is + The n-type emitter layer 6 is sandwiched between the pair of n + The n-type emitter layer 6 is formed to sandwich the gate electrode 8 and the gate insulating film 7. The gate electrode 8 is disposed to be surrounded by the gate insulating film 7 and the interlayer insulating film 9. The first main surface 1a and the n-type emitter layer 6 are - A p-type base layer 5 is formed between the second main surface 1b and the p-type drift layer 1. + The p-type collector layer 3 is formed on the p-type base layer 5. + Between the n-type collector layer 3 - The n-type drift layer 1 is formed. - The n-type drift layer 1 is in contact with the p-type base layer 5. - Type drift layer 1 and p + An n-type buffer layer 2 is formed between the n-type collector layer 3 and the n-type - Type drift layer 1 and p + The gate electrode 8 and the gate insulating film 7 are in contact with the first main surface 1a and the n-type collector layer 3. - The n-type buffer layer 2 and the n-type drift layer 1 are formed so as to extend in the first direction X. + The n-type emitter layer 6 -The n-type impurity concentration is higher than that of the n-type drift layer 1. + The p-type collector layer and the p-type contact layer 4 have a higher p-type impurity concentration than the p-type base layer 5 .
[0040] The semiconductor device 100 shown in FIG. 8 is obtained by a manufacturing method basically similar to that of the semiconductor device 100 shown in FIG. 1, but differs in the step (S3a) of forming a front surface structure, the step (S6a) of forming a back surface structure, and the step (S9a) of forming an electrode on the back surface.
[0041] In the method for manufacturing the semiconductor device 100 shown in FIG. 8, in the step (S3a) of forming a surface structure, a p-type base layer 5, a n-type base layer 6, and a n-type base layer 7 are formed on the surface layer of the first main surface 1a of the silicon wafer. + A n-type emitter layer 6 and a p-type contact layer 4 are formed. Furthermore, in order to form a trench gate, the first main surface 1a of the silicon wafer is dry etched to form a trench. A gate insulating film 7 and a gate electrode 8 are formed inside the trench. The gate electrode 8 is made of, for example, polysilicon. An interlayer insulating film 9 and a surface electrode 10 (emitter electrode) are formed on the first main surface 1a. The interlayer insulating film 9 is made of, for example, tetraethyl orthosilicate (TEOS).
[0042] In the method for manufacturing the semiconductor device 100 shown in FIG. 8, in the step (S6a) of forming a back surface structure, a p + A p-type collector layer 3 is formed. + In addition to the collector layer 3, for example, + A reverse conductive (RC) IGBT may be manufactured by partially forming a cathode layer.
[0043] In the manufacturing method of the semiconductor device 100 shown in Fig. 8, in the step (S9a) of forming an electrode on the back surface, a back surface electrode 11 (collector electrode) is formed on the second main surface 1b of the silicon wafer. In this manner, the semiconductor device 100 having the IGBT structure as shown in Fig. 8 can be obtained.
[0044] <Action and effect> A method for manufacturing a semiconductor device 100 according to the present disclosure includes a step (S1a) of preparing a semiconductor substrate 200, a step (S2a) of introducing hydrogen into the semiconductor substrate 200, a step (S7a) of irradiating the semiconductor substrate 200 with a charged particle beam, and, after the step (S7a) of irradiating the charged particle beam, a step (S8a) of performing activation annealing on the semiconductor substrate 200. The step (S2a) of introducing hydrogen is performed before the step (S8a) of performing activation annealing.
[0045] In this way, the semiconductor substrate 200 (silicon wafer) has a sufficient hydrogen concentration. As a result, the point defects formed in the step (S7a) of irradiating the charged particle beam are sufficiently compounded with hydrogen by the subsequent annealing process, so that the semiconductor device 100 including the buffer layer in which the occurrence of high resistance regions is suppressed can be obtained. In other words, a power semiconductor device in which deterioration of device characteristics is prevented can be obtained.
[0046] In the manufacturing method of the semiconductor device 100, the step (S2a) of introducing hydrogen includes any one of the steps of annealing the semiconductor substrate 200 in at least one of a state in which the semiconductor substrate 200 is in contact with a film containing hydrogen or a state in which the semiconductor substrate 200 is exposed to a hydrogen atmosphere, a step of exposing the semiconductor substrate 200 to hydrogen plasma, and a step of immersing the semiconductor substrate 200 in a liquid containing hydrogen ions. In this way, hydrogen can be introduced into the silicon wafer by any method.
[0047] In the manufacturing method of the semiconductor device 100, the step (S2a) of introducing hydrogen is performed before the step (S7a) of irradiating a charged particle beam. In this way, it is possible to obtain the semiconductor device 100 including the buffer layer in which the occurrence of a high resistance region is suppressed regardless of the oxygen concentration in the silicon wafer. In other words, it is possible to obtain a power semiconductor device in which the deterioration of device characteristics is prevented, regardless of the type of silicon wafer.
[0048] Embodiment 2 <Method of Manufacturing Semiconductor Device 100> Fig. 9 is a flowchart of a method for manufacturing a semiconductor device 100 according to embodiment 2. Fig. 9 corresponds to Fig. 6. The method for manufacturing the semiconductor device 100 shown in Fig. 9 basically has the same configuration as the method for manufacturing the semiconductor device 100 shown in Fig. 6, but differs in that the step of introducing hydrogen (S7b) is performed after the step of irradiating a charged particle beam (S6b).
[0049] As described in the first embodiment, the step of introducing hydrogen (S7b) may be performed before the step of performing activation annealing (S8b). However, when the step of introducing hydrogen (S7b) is performed after forming some device structure on the silicon wafer, there is a limit to the temperature and time of annealing in the step of introducing hydrogen (S7b) so as not to destroy the device structure. For example, aluminum is usually used as the surface electrode of a power semiconductor device. The melting point of aluminum is about 650°C. Therefore, for example, when an aluminum electrode is formed in the step of forming a surface structure (S2b) and then the step of introducing hydrogen (S7b) is performed, the melting point of the aluminum electrode is the upper limit of the temperature of annealing in the step of introducing hydrogen (S7b). In this case, the depth to which hydrogen penetrates in the silicon wafer is reduced. As a result, there is a possibility that the effect of suppressing the occurrence of a high resistance region becomes insufficient. In the second embodiment, a method of manufacturing a semiconductor device 100 that sets the depth to which hydrogen penetrates to a desired value is described.
[0050] As an example of a method for manufacturing the semiconductor device 100, a method for manufacturing a vertical diode as shown in Fig. 1 will be described. As shown in Fig. 9, in the method for manufacturing the semiconductor device 100 according to this embodiment, first, a step (S1b) of preparing a semiconductor substrate 200 is performed. In this step (S1b), a silicon wafer constituting the semiconductor device 100 is prepared. The silicon wafer may be of n-type or n-type. - The silicon wafer is cut from a mold ingot. The silicon wafer has a front surface (first main surface 1a) and a back surface opposite the front surface. The hydrogen concentration in the silicon wafer is, for example, 1×10 13 cm-3 The following is the result.
[0051] Next, a step (S2b) of forming a surface structure is carried out. In this step (S2b), a surface structure of the semiconductor device 100 is formed on the first main surface 1a of the silicon wafer. Specifically, the surface layer of the first main surface 1a of the silicon wafer is provided with p + A type anode layer 22 is formed on the first main surface 1a. + A surface electrode 10 (anode electrode) connected to the mold anode layer 22 is formed.
[0052] Next, a step (S3b) of grinding the back surface is performed. In this step (S3b), the back surface of the silicon wafer is ground. Specifically, after protecting the surface structure, the back surface of the silicon wafer is ground using a grinding means such as CMP (Chemical Mechanical Polish). Note that the back surface of the silicon wafer after grinding is the second main surface 1b, and the region from the first main surface 1a to the second main surface 1b is the semiconductor layer.
[0053] Next, a step (S4b) of forming a first buffer layer is performed. In this step (S4b), a first buffer layer is formed on the second main surface 1b of the silicon wafer. Specifically, an n-type layer is formed on the surface portion of the second main surface 1b by implanting n-type dopant ions such as phosphorus into the second main surface 1b. Note that the ion implantation may be performed multiple times. Also, since the first buffer layer can be substituted with a second buffer layer described later, the step of forming the first buffer layer may be omitted.
[0054] Next, a step (S5b) of forming a back surface structure is performed. In this step (S5b), a back surface structure of the semiconductor device 100 is formed on the second main surface 1b of the silicon wafer. Specifically, n + A type cathode layer 21 is formed. + In addition to the type cathode layer 21, for example, + A type cathode layer may be partially formed to produce a Relaxed Field of Cathode (RFC) diode.
[0055] Next, a step (S6b) of irradiating a charged particle beam is performed. In this step (S6b), point defects are formed in the silicon wafer. Specifically, the second main surface 1b of the silicon wafer is irradiated with the charged particle beam. The charged particle beam is, for example, protons. For example, an accelerator is used for the proton irradiation. By using the accelerator, the protons are accelerated to several hundreds KeV to several tens MeV and irradiated onto the silicon wafer. The dose of protons is, for example, 1×10 12 ~1×10 15 cm -2 In addition, helium ions may be used as the charged particle beam. In this way, point defects are locally formed in the silicon wafer.
[0056] Incidentally, even if the step (S6b) of irradiating the charged particle beam is not performed, the silicon wafer inherently contains some point defects. Therefore, if the silicon wafer has point defects, the step (S6b) of irradiating the charged particle beam does not have to be performed. Also, the step (S6b) of irradiating the charged particle beam may be performed before the step (S8b) of performing activation annealing, which will be described later. The step (S6b) of irradiating the charged particle beam is not limited to being performed immediately after the step (S5b) of forming the back surface structure, and may be performed, for example, after the step (S3b) of grinding the back surface.
[0057] Next, a step (S7b) of introducing hydrogen is carried out. In this step (S7b), hydrogen is impregnated from the front surface to the back surface of the silicon wafer in the first direction X. Specifically, this step (S7b) includes a step of annealing the silicon wafer in at least one of a state in which the silicon wafer is in contact with a film containing hydrogen and a state in which the silicon wafer is exposed to a hydrogen atmosphere. At this time, as described above, there are limitations on the temperature and time during annealing.
[0058] In this step (S7b), hydrogen may be impregnated into the silicon wafer. Therefore, the step (S7b) of introducing hydrogen may include a step of exposing the silicon wafer to hydrogen plasma or a step of immersing the silicon wafer in a liquid containing hydrogen ions, instead of a step of annealing the silicon wafer in at least one of a state in which the silicon wafer is in contact with a film containing hydrogen or a state in which the silicon wafer is exposed to a hydrogen atmosphere. In the step (S7b) of introducing hydrogen, hydrogen may be introduced not only from the front surface of the silicon wafer but also from the side surface connecting the front surface and the back surface.
[0059] Next, a step (S8b) of activation annealing is performed. In this step (S8b), the silicon wafer is annealed for the purpose of at least one of forming donors and eliminating point defects. Specifically, the silicon wafer is annealed at a temperature range of 200°C to 500°C while exposed to an inert gas atmosphere such as nitrogen. In this way, hydrogen and point defects in the silicon wafer react to form donors. As a result, the n-type buffer layer 2 shown in FIG. 1 is formed. The layer thus formed is the second buffer layer, and the step (S6b) of irradiating the charged particle beam, the step (S7b) of introducing hydrogen, and the step (S8b) of activation annealing are collectively referred to as the step of forming the second buffer layer.
[0060] In the activation annealing step (S8b), the thickness of the n-type buffer layer 2 in the first direction X can be increased by lengthening the annealing time. In the activation annealing step (S8b), the annealing temperature is preferably in the range of 200°C to 500°C. If the annealing temperature is lower than 200°C, the efficiency of donor formation decreases. If the annealing temperature is higher than 500°C, the annihilation of donors becomes significant. By forming a semiconductor layer on the silicon wafer in this manner, the silicon wafer is used as a semiconductor substrate 200.
[0061] Next, a step (S9b) of forming an electrode on the back surface is carried out. In this step (S9b), an electrode is formed on the second main surface 1b. Specifically, a back surface electrode 11 (cathode electrode) is formed on the second main surface 1b. In this manner, a semiconductor device 100 including a buffer layer in which the occurrence of a high resistance region as shown in FIG. 1 is suppressed can be obtained.
[0062] Here, a method of controlling the depth to which hydrogen penetrates to a desired value in the step (S7b) of introducing hydrogen will be described. FIG. 10 is a distribution diagram of carrier concentration in each of semiconductor substrates containing different oxygen concentrations. In FIG. 10, the horizontal axis indicates the distance from the back surface of the semiconductor substrate, and the vertical axis indicates the carrier concentration in the semiconductor substrate. Sample 1, Sample 2, Sample 3, and Sample 4 are semiconductor devices containing different oxygen concentrations, and the oxygen concentration in the silicon wafer is higher in the order of Sample 1, Sample 2, Sample 3, and Sample 4. That is, Sample 1 has the highest oxygen concentration. However, all of the semiconductor devices are processed under the same conditions in the step of irradiating a charged particle beam and the step of performing activation annealing. Note that the semiconductor devices related to Sample 1, Sample 2, Sample 3, and Sample 4 are all processed in the step of performing activation annealing at an annealing temperature of 350° C. for 4 hours.
[0063] As can be seen from Fig. 10, when the oxygen concentration contained in different silicon wafers is different, the distribution of carrier concentration changes. The distance from the back surface to the end of the high resistance region in sample 1, which has a high oxygen concentration, is longer than the distance from the back surface to the end of the high resistance region in sample 4, which has a low oxygen concentration. In other words, the higher the oxygen concentration, the larger the range in the depth direction of the high resistance region (the distance from the back surface to the end of the high resistance region in the depth direction).
[0064] Here, in a semiconductor device obtained by a manufacturing method for a semiconductor device that does not include a step of introducing hydrogen, the depth L of the region where a high resistance region occurs (the distance from the back surface to the end of the high resistance region in the depth direction) is expressed by the following formula (1). Note that the depth L is the distance (unit: cm) from the second main surface 1b in the first direction X. Rp is the irradiation range (unit: cm) of the charged particle beam in the step of irradiating the charged particle beam. D1 is the diffusion constant of hydrogen (unit: cm) in the step of performing activation annealing. 2 where t1 is the annealing time (unit: seconds) in the activation annealing step. When the charged particle beam is irradiated once when forming the second buffer layer, the irradiation range of the charged particle beam at that irradiation is the irradiation range Rp used in the formula (1). When the charged particle beam is irradiated multiple times, the irradiation range of the charged particle beam when the charged particle beam is irradiated to the area closest to the surface of the silicon wafer is the irradiation range Rp used in the formula (1).
[0065]
number
[0066] The diffusion constant D1 of hydrogen is expressed by the following formula (2): D 01 is the frequency factor (unit: cm 2 / sec). E a1 is the activation energy (unit: eV) of hydrogen diffusion in the activation annealing step. T1 is the annealing temperature (unit: K) in the activation annealing step. k is the Boltzmann constant (unit: eV / K).
[0067]
number
[0068] As a result of the carrier concentration distribution diagram in FIG. 10, the oxygen concentration in the silicon wafer is 1×10 17 cm -3In the above case, the hydrogen diffusion constant D1 is expressed by the following formula (3). When the oxygen concentration in the silicon wafer is 1×10 17 cm -3 Less than 1×10 15 cm -3 In the above case, the hydrogen diffusion constant D1 is expressed by the following formula (4). When the oxygen concentration in the silicon wafer is 1×10 15 cm -3 When the diffusion constant D1 of hydrogen is less than 100%, the diffusion constant D1 of hydrogen is expressed by the following equation (5).
[0069]
number
[0070]
number
[0071]
number
[0072] In other words, by substituting the diffusion constant D1 of hydrogen into equation (1) using equations (3), (4), and (5), the depth L of the region where a high resistance region occurs can be predicted. By introducing hydrogen into the silicon wafer so that the depth of the region where hydrogen is introduced is equal to or greater than this depth L, the occurrence of a high resistance region can be effectively suppressed. When the oxygen concentration in the silicon wafer is 1×10 17 cm -3 In the above case, the depth L is expressed by the following formula (6). When the oxygen concentration in the silicon wafer is 1×10 17 cm -3 Less than 1×10 15 cm -3 In the above case, the depth L is expressed by the following formula (7). When the oxygen concentration in the silicon wafer is 1×10 15 cm -3 When the depth L is less than 100 mm, the depth L is expressed by the following equation (8).
[0073]
number
[0074]
number
[0075]
number
[0076] Based on the above discussion, the conditions in the step of introducing hydrogen will be described. Fig. 11 is a schematic distribution diagram of hydrogen concentration in the semiconductor device 100 (Example 3) obtained by the manufacturing method of the semiconductor device 100 shown in Fig. 9. In Fig. 11, the horizontal axis indicates the distance (unit: μm) from the surface (first main surface 1a) of the semiconductor substrate 200, and the vertical axis indicates the hydrogen concentration (unit: cm -3 ) is shown. The graph of Example 3 in FIG. 11 shows the hydrogen concentration originally contained in the silicon wafer in a region away from the back surface (second main surface 1b) to the front surface (an internal region whose distance from the back surface is greater than the depth L of the region where a high resistance region occurs). On the other hand, on the back surface side, the depth of the region into which hydrogen has been introduced is greater than the depth L of the region where a high resistance region occurs. In this way, it is preferable to make the region into which hydrogen has been introduced as large as possible. Therefore, it is preferable that the depth from the back surface of the region into which hydrogen has been introduced is greater than the depth L of the region where a high resistance region occurs, and that the hydrogen concentration in the region into which hydrogen has been introduced is greater than the hydrogen concentration originally contained in the silicon wafer in the region away from the back surface to the front surface (internal region).
[0077] From the above discussion, the preferred range of the depth of the region into which hydrogen is introduced (the distance from the back surface to the end of the region into which hydrogen is introduced that is located on the inner region side: √(D2×t2)) in the step of introducing hydrogen is expressed by the following formula (9). D2 is the diffusion constant of hydrogen in the step of introducing hydrogen (unit: cm 2 / sec), and t2 is the annealing time (unit: seconds) in the hydrogen introduction step.
[0078]
number
[0079] The diffusion constant D2 of hydrogen is expressed by the following formula (10): D 02 is the frequency factor (unit: cm 2 / sec). E a2 is the activation energy (unit: eV) of hydrogen diffusion in the hydrogen introduction step. T2 is the annealing temperature (unit: K) in the hydrogen introduction step.
[0080]
number
[0081] Here, the oxygen concentration in the silicon wafer is 1×10 17 cm -3 In the above case, the diffusion constant D2 of hydrogen in the hydrogen introduction step is expressed by the following formula (11). 17 cm -3 Less than 1×10 15 cm -3 In the above case, the diffusion constant D2 of hydrogen in the hydrogen introduction step is expressed by the following formula (12). 15 cm -3 When the diffusion constant D2 of hydrogen in the step of introducing hydrogen is less than 1000 μm, the diffusion constant D2 of hydrogen in the step of introducing hydrogen is expressed by the following formula (13). Each of formulas (11), (12), and (13) is derived by replacing T1 with T2 in each of formulas (6), (7), and (8).
[0082]
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[0083]
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[0084]
number
[0085] Therefore, in the manufacturing method of the semiconductor device 100 according to the second embodiment, the annealing time t2 and temperature T2 in the step of introducing hydrogen are set to a value that is determined by using the depth L so that the oxygen concentration in the silicon wafer is 1×10 17 cm -3 In the above, it is preferable to determine the time t2 and temperature T2 of the annealing in the hydrogen introduction step so as to satisfy the relational expression shown in the following formula (14). 17 cm -3 Less than 1×10 15 cm -3 In the above, it is preferable to determine the time t2 and temperature T2 of the annealing in the hydrogen introduction step so as to satisfy the relational expression shown in the following formula (15). 15 cm -3 When the temperature is less than 100° C., it is preferable that the temperature is determined so as to satisfy the relationship shown in the following equation (16).
[0086]
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[0087]
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[0088]
number
[0089] In this way, even if a step of introducing hydrogen is performed after the step of irradiating a charged particle beam, it is possible to sufficiently adjust the hydrogen concentration in the semiconductor substrate 200. By adjusting the hydrogen concentration, it is possible to obtain the semiconductor device 100 including a buffer layer in which the generation of a high resistance region is suppressed.
[0090] The method for manufacturing the semiconductor device 100 according to the second embodiment may include a step of measuring the oxygen concentration. Specifically, the oxygen concentration contained in the silicon wafer is measured by secondary ion mass spectrometry. The oxygen concentration contained in the silicon wafer changes after the step of forming a surface structure (S2b) is performed. Therefore, the step of measuring the oxygen concentration is preferably performed after the step of forming a surface structure (S2b).
[0091] In the above-mentioned method for manufacturing semiconductor device 100, the step (S2b) of forming a surface structure, the step (S4b) of forming a first buffer layer, the step (S5b) of forming a back surface structure, and the step (S9b) of forming an electrode on the back surface can be modified as appropriate depending on the type of semiconductor device 100.
[0092] <Action and effect> In the manufacturing method of the semiconductor device 100, in the step (S7b) of introducing hydrogen, the depth of the region into which hydrogen is introduced in the semiconductor substrate 200 is defined as L. The Boltzmann constant is defined as k. In the step (S8b) of performing activation annealing, the annealing time is defined as t1, and the annealing temperature is defined as T1. The depth L is defined as the depth to which hydrogen is introduced when the oxygen concentration in the semiconductor substrate 200 is 1×10 17 cm -3 In the above case, L=Rp-2×√{3.8×10 5 ×e {(-2.19) / (k×T1)} × t1}. The depth L is set when the oxygen concentration in the semiconductor substrate 200 is 1×10 17 cm -3 Less than 1×10 15 cm -3 In the above case, L=Rp-2×√{5.3×10 -3 ×e {(-1.15) / (k×T1)}× t1}. The depth L is set when the oxygen concentration in the semiconductor substrate 200 is 1×10 15 cm -3 When it is less than 10, L=Rp-2×√{9.4×10 -3 ×e {(-0.48) / (k×T1)} ×t1}.
[0093] In this way, it is possible to predict the depth L of the region where the high resistance region occurs. As a result, it is possible to determine the temperature T2 and time t2 during annealing in the step (S7b) of introducing hydrogen from the depth L, and it is possible to obtain semiconductor device 100 including buffer layer 2 in which the occurrence of the high resistance region is suppressed.
[0094] In the manufacturing method of the semiconductor device 100, the step (S7b) of introducing hydrogen includes at least a step of annealing the semiconductor substrate 200 in at least one of a state in which the semiconductor substrate 200 is in contact with a film containing hydrogen or a state in which the semiconductor substrate 200 is exposed to a hydrogen atmosphere. In the step (S7b) of introducing hydrogen, the annealing time is t2 and the annealing temperature is T2. In this case, in the step (S7b) of introducing hydrogen, the annealing time t2 and the annealing temperature T2 are set when the oxygen concentration in the semiconductor substrate 200 is 1×10 17 cm -3 In the above case, L≦√{3.8×10 5 ×e {(-2.19) / (k×T2)} The annealing time t2 and the annealing temperature T2 satisfy the relational expression {1×10 17 cm -3 Less than 1×10 15 cm -3 In the above case, L≦√{5.3×10 -3 ×e {(-1.15) / (k×T2)} The annealing time t2 and the annealing temperature T2 satisfy the relational expression {1×10 15 cm -3 When L≦√{9.4×10 -3 ×e {(-0.48) / (k×T2)}×t2}.
[0095] In this manner, the temperature T2 and time t2 for annealing in the step (S7b) of introducing hydrogen from the depth L of the region where the high-resistance region occurs can be determined, and a semiconductor device 100 including a buffer layer 2 in which the occurrence of the high-resistance region is suppressed can be obtained.
[0096] The method for manufacturing the semiconductor device 100 includes a step of forming an element structure in the semiconductor substrate 200, and a step of measuring the oxygen concentration of the semiconductor substrate 200. The step of measuring the oxygen concentration is performed after a step (S2b) of forming a surface structure as a step of forming the element structure.
[0097] In this way, the oxygen concentration in the silicon wafer can be measured, and as a result, even if different types of silicon wafers are used, it is possible to obtain the semiconductor device 100 including the buffer layer in which the generation of high resistance regions is suppressed.
[0098] In the manufacturing method of the semiconductor device 100 according to the first and second embodiments, the material of the electrodes, the film formation method, the impurity concentration in the p-type region or the n-type region, and the like may be changed in accordance with general design conditions of the semiconductor device 100. A MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an SBD (Schottky Barrier Diode), and a Thyristor may be manufactured by the manufacturing method of the semiconductor device 100 according to the first and second embodiments.
[0099] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. Unless inconsistent, at least two of the embodiments disclosed herein may be combined. The basic scope of the present disclosure is indicated by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]
[0100] 1n - 1 a first main surface, 1 b a second main surface, 2 an n-type buffer layer, 3 p + 1 p-type collector layer, 2 p-type contact layer, 3 p-type base layer, 4 n + 9 interlayer insulating film; 10 front surface electrode; 11 rear surface electrode; 21 n-type emitter layer; 7 gate insulating film; 8 gate electrode; 9 interlayer insulating film; 10 front surface electrode; 11 rear surface electrode; + Type cathode layer, 22p + anode layer, 100 semiconductor device, 200 semiconductor substrate, D1, D2 hydrogen diffusion constant, L depth, X first direction.
Claims
1. Providing a semiconductor substrate; introducing hydrogen into the entire semiconductor substrate; irradiating the semiconductor substrate with a charged particle beam; and performing activation annealing on the semiconductor substrate after the step of irradiating the charged particle beam, The method for manufacturing a semiconductor device, wherein the step of introducing hydrogen is carried out before the step of performing activation annealing.
2. The step of introducing hydrogen includes:
2. The method for manufacturing a semiconductor device according to claim 1, comprising any one of a step of annealing the semiconductor substrate in at least one of a state in which the semiconductor substrate is in contact with a film containing hydrogen or a state in which the semiconductor substrate is exposed to a hydrogen atmosphere, a step of exposing the semiconductor substrate to hydrogen plasma, and a step of immersing the semiconductor substrate in a liquid containing hydrogen ions.
3. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the step of introducing hydrogen is performed before the step of irradiating with a charged particle beam.
4. A step of preparing a semiconductor substrate; introducing hydrogen into the semiconductor substrate; irradiating the semiconductor substrate with a charged particle beam; and performing activation annealing on the semiconductor substrate after the step of irradiating the charged particle beam, The step of introducing hydrogen is carried out before the step of activating annealing; In the step of introducing hydrogen, a depth of a region into which hydrogen is introduced into the semiconductor substrate is defined as L, a Boltzmann constant is defined as k, In the step of irradiating the charged particle beam, an irradiation range of the charged particle beam is Rp, In the activation annealing step, if the annealing time is t1 and the annealing temperature is T1, The depth is The oxygen concentration in the semiconductor substrate is 1×10 17 cm -3 At the above times, L=Rp-2×√{3.8×10 5 ×e {(-2.19)/(k×T1)} ×t1} The following relation is satisfied: The oxygen concentration in the semiconductor substrate is 1×10 15 cm -3 Above 1 x 10 17 cm -3 When less than L=Rp-2×√{5.3×10 -3 ×e{ (-1.15)/(k×T1)} ×t1} The following relation is satisfied: The oxygen concentration in the semiconductor substrate is 1×10 15 cm -3 When less than L=Rp-2×√{9.4×10 -3 ×e {(-0.48)/(k×T1)} ×t1} The method for manufacturing a semiconductor device satisfies the following relational expression.
5. the step of introducing hydrogen includes at least a step of annealing the semiconductor substrate in at least one of a state in which the semiconductor substrate is in contact with a film containing hydrogen and a state in which the semiconductor substrate is exposed to a hydrogen atmosphere; In the hydrogen introduction step, when the annealing time is t2 and the annealing temperature is T2, In the step of introducing hydrogen, the annealing time and the annealing temperature are: The oxygen concentration in the semiconductor substrate is 1×10 17 cm -3 At the above times, L≦√{3.8×10 5 ×e {(-2.19)/(k×T2)} ×t2} The following relation is satisfied: The oxygen concentration in the semiconductor substrate is 1×10 15 cm -3 Above 1 x 10 17 cm -3 When less than L≦√{5.3×10 -3 ×e {(-1.15)/(k×T2)} ×t2} The following relation is satisfied: The oxygen concentration in the semiconductor substrate is 1×10 15 cm -3 When less than L≦√{9.4×10 -3 ×e {(-0.48)/(k×T2)} ×t2} 5. The method for manufacturing a semiconductor device according to claim 4, wherein the following relational expression is satisfied.
6. forming a device structure on the semiconductor substrate; measuring an oxygen concentration in the semiconductor substrate; 6. The method for manufacturing a semiconductor device according to claim 4, wherein the step of measuring the oxygen concentration is carried out after the step of forming the element structure.