Semiconductor device manufacturing method, and dicing tape

Abstract

The present invention relates, by way of example, to a hybrid bonding process in a chip on wafer (CoW) method. In this process, a semiconductor wafer 100 is attached to a dicing tape DCT such that an insulating film 102 and a terminal electrode 103 of the semiconductor wafer 100 on the side to be individualized face the dicing tape DCT. Further, in a state where the surfaces of the terminal electrode 103 and the like are protected by the dicing tape DCT, the semiconductor wafer 100 is individualized by means of dicing. Due to this configuration, foreign matter (dust) generated when individualizing a CoW is prevented from adhering to the surface of an insulating film 102b or the terminal electrode 103 of an individualized semiconductor chip 10, thereby improving the non-defective rate of hybrid bonding. This process is applicable regardless of whether the insulating film 102 of the semiconductor wafer 100 is an organic material or an insulating material.

Description

Semiconductor device manufacturing method and dicing tape

[0001] The present disclosure relates to a method for manufacturing a semiconductor device and a dicing tape used in the method for manufacturing a semiconductor device.

[0002] In recent years, three-dimensional packaging has been considered to improve the integration density of LSIs. Non-Patent Document 1 discloses an example of three-dimensional packaging of semiconductor chips.

[0003] FC Chen et al., “System on Integrated Chips(SoIC TM) for 3D Heterogeneous Integration”, 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), p.594-599(2019)

[0004] When three-dimensionally mounting semiconductor chips, hybrid bonding technology is known, which smooths the insulating films of both devices and directly bonds them to achieve fine wiring connections between devices. This hybrid bonding technology employs two methods: the wafer-on-wafer (WoW) method, in which semiconductor wafers are bonded together and then singulated, and the chip-on-wafer (CoW) method, in which one semiconductor wafer is first diced and the resulting semiconductor chips are bonded to the other semiconductor wafer (and then singulated as needed). The CoW method improves yield by selecting good semiconductor chips before bonding, and also increases design flexibility, allowing for the integration of different or multiple semiconductor chips on a single semiconductor device. However, the CoW method involves dicing one semiconductor wafer before bonding, which can result in foreign matter generated during dicing adhering to the bonding surface of the semiconductor chips and impeding bonding.

[0005] An object of the present disclosure is to provide a method for manufacturing a semiconductor device that can prevent bonding defects of semiconductor chips, and a dicing tape used in the manufacturing method.

[0006] [1] One aspect of the present disclosure relates to a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device includes the steps of: preparing a first semiconductor substrate having a first substrate body and a first insulating film and a plurality of first electrodes provided on one surface of the first substrate body; preparing a dicing tape; attaching the first semiconductor substrate to the dicing tape; and singulating the first semiconductor substrate to obtain a plurality of semiconductor chips, each of which has an insulating film portion corresponding to the first insulating film and at least one first electrode among the plurality of first electrodes. In the attaching step, the first semiconductor substrate is attached to the dicing tape so that the first insulating film and the plurality of first electrodes face the dicing tape.

[0007] In this manufacturing method, the first semiconductor substrate is attached to a dicing tape so that the first insulating film and the plurality of first electrodes face the dicing tape, and then singulated in this state. In this case, the first semiconductor substrate is singulated with the surfaces of the first insulating film and the plurality of first electrodes protected by the dicing tape. Therefore, foreign matter generated during dicing does not adhere to the insulating film portion and the surfaces of the first electrodes in the singulated semiconductor chips. Therefore, poor bonding of the semiconductor chips due to foreign matter can be prevented.

[0008] [2] In the method for manufacturing a semiconductor device according to [1] above, it is preferable that the adhesive strength of the dicing tape to the first semiconductor substrate is 1.0 N / 25 mm or more, which can prevent the semiconductor chips from flying off when the first semiconductor substrate is diced into individual pieces.

[0009] [3] In the method for manufacturing a semiconductor device according to [1] or [2] above, it is preferable that the adhesive strength of the dicing tape to the first insulating film is smaller than the adhesive strength of the first insulating film to the first substrate body. In this case, when picking up the individual semiconductor chips using a die bonder or the like, it is possible to prevent the insulating film portion corresponding to the first insulating film from peeling off from the substrate portion corresponding to the first substrate body.

[0010] [4] In the method for manufacturing a semiconductor device according to any one of [1] to [3] above, the adhesive force of the dicing tape to the first insulating film may be smaller than the stress when picking up any one of the semiconductor chips, so that when picking up the individual semiconductor chips using a die bonder or the like, the semiconductor chips can be easily picked up from the dicing tape.

[0011] [5] In any of the semiconductor device manufacturing methods [1] to [4] above, the adhesive strength of the dicing tape against foreign matter is preferably greater than the adhesive strength of the first insulating film against foreign matter. In this case, even if foreign matter is mixed between the first semiconductor substrate or semiconductor chip and the dicing tape, the foreign matter can be left on the dicing tape when the semiconductor chip is picked up from the dicing tape. This manufacturing method can thereby further prevent bonding defects of the semiconductor chip.

[0012] [6] In any of the semiconductor device manufacturing methods described above in [1] to [5], the adhesive force of the dicing tape to the first semiconductor substrate is preferably greater than the dicing stress when the first semiconductor substrate is singulated. In this case, scattering of semiconductor chips when the first semiconductor substrate is singulated can be prevented. Note that the "dicing stress" here refers to stress acting in the direction of peeling the dicing tape, among stresses such as frictional force with the dicing blade, vibration, and water flow of cleaning water that act on the first semiconductor substrate or semiconductor chips when the first semiconductor substrate is diced with a dicer.

[0013] [7] The semiconductor device manufacturing method according to any one of [1] to [6] above may further include, after the singulation step, a step of cleaning the insulating film portion and at least one surface of the first electrode in each of the plurality of semiconductor chips using a plasma treatment. In this case, cleaning using the plasma treatment can remove contaminants from the surface of the semiconductor chip, for example, by burning off organic foreign matter, thereby preventing poor bonding of the semiconductor chip. The plasma treatment used here can be, for example, oxygen plasma, but is not limited to this.

[0014] [8] The method for manufacturing a semiconductor device according to any one of [1] to [7] above may further include a step of removing each of the semiconductor chips from the dicing tape after the singulation step. In this step of removing the semiconductor chips, each of the semiconductor chips may be picked up so as to contact the singulated substrate portion of the first substrate body. In this case, the semiconductor chips can be bonded using a device such as a die bonder, and the manufacturing method of the present disclosure can be easily applied to an existing manufacturing process.

[0015] [9] The method for manufacturing a semiconductor device according to any one of [1] to [8] may further include the steps of: preparing a second semiconductor substrate having a second substrate body, a second insulating film provided on one surface of the second substrate body, and a plurality of second electrodes; aligning a first electrode of at least one semiconductor chip among the plurality of semiconductor chips with any second electrode among the plurality of second electrodes; bonding an insulating film portion of the semiconductor chip to the second insulating film of the second semiconductor substrate; and bonding the first electrode of the semiconductor chip to the second electrode of the second semiconductor substrate. In this case, the individual semiconductor chips can be reliably bonded to the second semiconductor substrate.

[0016]

[10] In any of the semiconductor device manufacturing methods [1] to [9] above, in the step of singulating the first semiconductor substrate, dicing positioning may be performed from the first substrate body side. In this semiconductor device manufacturing method, because the front surface of the first semiconductor substrate faces the dicing tape, it is difficult to align the dicing position. Therefore, by performing dicing positioning from the back surface side, singulation into semiconductor chips can be performed more accurately. Examples of such a positioning method include a method of determining the position of the first electrodes, etc., using an infrared camera (IR camera) or electromagnetic waves that pass through the substrate, such as X-rays, or ultrasound, or a method of providing a through-hole or via hole in the first semiconductor substrate and using it as an alignment mark. However, the method is not limited to these, and other methods of positioning may also be used.

[0017]

[11] In any of the semiconductor device manufacturing methods [1] to

[10] above, the dicing tape may be configured to prevent oxidation of the surfaces of the plurality of first electrodes of the first semiconductor substrate. In this case, oxidation of the first electrodes during the process from the first semiconductor substrate to the process of singulating the first semiconductor substrate into semiconductor chips, which would otherwise cause an oxide film to form on the electrode surface and inhibit electrode bonding, can be prevented. Furthermore, a method can be performed in which the oxide films of the plurality of first electrodes are removed all at once while the first semiconductor substrate is still in the state before being singulated, thereby improving manufacturing efficiency.

[0018]

[12] The method for manufacturing a semiconductor device according to any one of [1] to

[11] above may further include a step of removing an oxide film on the surface of the first electrode of the semiconductor chip before the step of bonding the first electrode of the semiconductor chip to another electrode (second electrode). In this case, poor bonding between the first electrode and the other electrode can be prevented. The oxide film on the surface of the second electrode may also be removed in the same manner. In this case, the same effect can be achieved.

[0019]

[13] In any of the semiconductor device manufacturing methods [1] to

[12] above, the first insulating film of the first semiconductor substrate may contain an organic material. In this case, the organic material, which is a relatively soft material, can absorb (embed) foreign matter (debris) attached to the surface of the semiconductor chip or the second semiconductor substrate into the insulating film made of the organic material, thereby further reducing connection failures of the semiconductor chip. In other words, according to this manufacturing method, foreign matter attached to the surface of the semiconductor chip or the like can be embedded in the insulating film made of the organic material and rendered harmless. Note that the second insulating film of the second semiconductor substrate may be formed to contain an organic material. In this case, similar effects can be achieved.

[0020]

[14] In the semiconductor device manufacturing method according to

[13] above, when the first insulating film contains an organic material, the organic material contained in the first insulating film may include polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These materials are liquid or soluble in a solvent, making it easy to prepare the first insulating film by, for example, spin coating, and to form a thin film. Furthermore, these materials have high heat resistance, so they can withstand the high temperatures encountered when bonding the semiconductor chip to the second semiconductor substrate, enabling more reliable bonding of the substrates. The second insulating film of the second semiconductor substrate may also be formed using the organic material described above. Similar effects can be achieved in this case.

[0021]

[15] In any of the semiconductor device manufacturing methods [1] to

[14] above, the first insulating film of the first semiconductor substrate may contain an inorganic material. In this case, it is possible to manufacture a semiconductor device with a finer configuration. Furthermore, since it is easy to bond inorganic materials together, it is possible to increase the adhesive strength between the insulating films and improve the connection reliability of the semiconductor device. Note that the second insulating film of the second semiconductor substrate may be formed to contain an inorganic material. In this case, the same effects can be achieved.

[0022]

[16] In another aspect, the present disclosure relates to a dicing tape for use in any one of the semiconductor device manufacturing methods [1] to

[15] above. In this case, similar to the above, poor bonding of semiconductor chips due to foreign matter can be prevented in a hybrid bonding method.

[0023] According to the present disclosure, bonding defects of semiconductor chips can be reduced in the manufacture of semiconductor devices.

[0024] Fig. 1 is a cross-sectional view schematically showing an example of a semiconductor device (CoW) manufactured by a semiconductor device manufacturing method according to an embodiment of the present invention. Fig. 2 is a diagram sequentially showing a method for manufacturing the semiconductor device shown in Fig. 1. Fig. 3 is a diagram schematically showing a dicing method in the semiconductor device manufacturing method shown in Fig. 2. Fig. 4 is a diagram showing in more detail a bonding method in the semiconductor device manufacturing method shown in Fig. 2. Fig. 5 is a diagram showing in detail a bonding portion in the bonding method shown in Fig. 4. Fig. 6(a) is a diagram showing a bonded state between a dicing tape and a semiconductor chip (first semiconductor substrate), and Fig. 6(b) is a diagram schematically showing a method for picking up the individual semiconductor chips from the dicing tape.

[0025] Hereinafter, several embodiments of the present disclosure will be described in detail, with reference to the drawings as necessary. In the following description, identical or equivalent parts will be designated by the same reference numerals, and duplicate explanations will be omitted. Furthermore, positional relationships such as up, down, left, and right will be based on the positional relationships shown in the drawings unless otherwise specified. When terms such as "left," "right," "front," "back," "top," "bottom," "upper," and "lower" are used in the description and claims of this specification, these are intended for explanatory purposes and do not necessarily mean that these relative positions will always be the same. Furthermore, the dimensional ratios of the drawings are not limited to those shown in the drawings.

[0026] In this specification, the term "layer" encompasses not only a structure with a shape formed over the entire surface when observed in a plan view, but also a structure with a shape formed on a portion of the surface. Furthermore, in this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes, as long as the intended effect of the process is achieved. Furthermore, a numerical range indicated using "to" indicates a range that includes the numerical values ​​before and after "to" as the minimum and maximum values, respectively.

[0027] (Configuration of Semiconductor Device) FIG. 1 is a cross-sectional view schematically illustrating an example of a semiconductor device manufactured by a manufacturing method according to this embodiment. As shown in FIG. 1, the semiconductor device 1 is, for example, an example of a semiconductor package. The semiconductor device 1 includes multiple semiconductor chips 10 and a semiconductor substrate 20, and has a chip-on-wafer (CoW) structure. The multiple semiconductor chips 10 are fabricated by dicing a first semiconductor substrate 100 (described later) into individual pieces. The multiple semiconductor chips 10 are mounted on the semiconductor substrate 20 to form a three-dimensional mounting structure. The semiconductor substrate 20 may be a substrate on which multiple semiconductor chips, such as LSI (Large Scale Integrated Circuit) chips or CMOS (Complementary Metal Oxide Semiconductor) sensors, are formed in locations corresponding to the respective semiconductor chips 10. Each semiconductor chip 10 may be a semiconductor chip such as an LSI or memory. The multiple semiconductor chips 10 and the semiconductor substrate 20 are finely bonded to each other by hybrid bonding (described later) to firmly and without misalignment, with their respective terminal electrodes and their surrounding insulating films. The semiconductor device 1 may be further singulated into individual semiconductor devices each comprising one semiconductor chip 10 that has been further singulated from the configuration shown in FIG. 1 and a substrate portion that is part of the semiconductor substrate 20 corresponding to the one semiconductor chip 10.

[0028] (Method for Manufacturing Semiconductor Device) Next, a method for manufacturing the semiconductor device 1 will be described with reference to Fig. 2 to Fig. 5. Fig. 2 is a diagram sequentially showing a method for manufacturing the semiconductor device shown in Fig. 1. Fig. 3 is a diagram schematically showing a dicing method in the method for manufacturing the semiconductor device shown in Fig. 2. Figs. 4 and 5 are diagrams showing in more detail a bonding method in the method for manufacturing the semiconductor device shown in Fig. 2.

[0029] The semiconductor device 1 can be manufactured, for example, through the following steps (a) to (h): (a) preparing a first semiconductor substrate 100 corresponding to a plurality of semiconductor chips 10, the first semiconductor substrate 100 having a first substrate body 101, a first insulating film 102, and a plurality of first electrodes 103; (b) preparing a second semiconductor substrate 200 having a second substrate body 201, a second insulating film 202, and a plurality of second electrodes 203; (c) polishing the first insulating film 102 of the first semiconductor substrate 100 together with the first electrodes 103; (d) polishing the second insulating film 202 of the second semiconductor substrate 200 together with the second electrodes 203; and (e) singulating the first semiconductor substrate 100 to obtain a plurality of semiconductor chips 10, each including an insulating film portion 102b corresponding to the first insulating film 102 and a first electrode 103. (f) a step of aligning the first electrodes 103 of each of the plurality of semiconductor chips 10 with the second electrodes 203 of the second semiconductor substrate 200. (g) a step of bonding each insulating film portion 102b of the plurality of semiconductor chips 10 to the second insulating film 202 of the second semiconductor substrate 200. (h) a step of bonding the first electrodes 103 of each of the plurality of semiconductor chips 10 to the second electrodes 203 of the second semiconductor substrate 200.

[0030] [Steps (a) and (b)] Step (a) is a step of preparing a first semiconductor substrate 100, which is a silicon substrate on which integrated circuits, each of which corresponds to a plurality of semiconductor chips 10 and includes semiconductor elements and interconnections connecting the elements, are formed. In step (a), as shown in FIG. 2A, a first insulating film 102 made of an inorganic or organic material is provided along with a plurality of first electrodes 103 made of copper, aluminum, or the like, provided at predetermined intervals on a surface 101a of a first substrate body 101 made of silicon or the like. The first electrodes 103 are terminal electrodes that penetrate the first insulating film 102 to expose the integrated circuits and the like formed on the first semiconductor substrate 100 to the outside. The first insulating film 102 may be provided on the surface 101a of the first substrate body 101 before the plurality of first electrodes 103 are formed, or the plurality of first electrodes 103 may be provided on the surface 101a of the first substrate body 101 before the plurality of first insulating films 102 are formed.

[0031] Step (b) is a step of preparing a second semiconductor substrate 200, which is a silicon substrate on which an integrated circuit including semiconductor elements and wiring connecting them is formed. In step (b), as shown in FIG. 2A, a plurality of second electrodes 203 made of copper, aluminum, or the like are provided at predetermined intervals on one surface 201a of a second substrate body 201 made of silicon or the like, and a second insulating film 202 made of an inorganic or organic material is also provided. The second electrodes 203 are terminal electrodes for exposing the integrated circuits formed on the second semiconductor substrate 200 to the outside through the second insulating film 202. The second insulating film 202 may be provided on the one surface 201a of the second substrate body 201 before the plurality of second electrodes 203 are provided, or the plurality of second electrodes 203 may be provided on the one surface 201a of the second substrate body 201 before the second insulating film 202 is provided.

[0032] The first insulating film 102 and the second insulating film 202 used in the steps (a) and (b) are made of an inorganic material or an organic material. The inorganic material used for the insulating film is, for example, silicon oxide (SiO ２) and the like. When an inorganic material such as silicon oxide is used for the insulating film, a semiconductor device with a finer configuration can be manufactured. Furthermore, when the insulating films are bonded together in the step (g) described below, the bonding strength between the semiconductor substrates can be increased, because the bonding strength between the inorganic materials is easily strengthened, and this makes it possible to improve the connection reliability of the semiconductor device.

[0033] The organic material used for the insulating film is, for example, polyimide, a polyimide precursor (e.g., polyimide ester or polyamic acid), polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These organic materials are, for example, silicon oxide (SiO ２ The organic material has a lower elastic modulus than inorganic materials such as silicon dioxide, making it a soft material. By using such an organic material, when bonding insulating films together in the step (g) described below, even if fine foreign matter (debris) is present on the insulating film, it is absorbed into the insulating film, preventing bonding defects due to the foreign matter, thereby enabling reliable bonding of the insulating films. For example, if the insulating film is 4 μm thick, foreign matter with a diameter or width of 4 μm can be embedded in the organic insulating film. The elastic modulus of the organic material constituting the first insulating film 102 and the second insulating film 202 may be, for example, 7.0 GPa or less, 5.0 GPa or less, 3.0 GPa or less, 2.0 GPa or less, or 1.5 GPa or less. The elastic modulus here refers to Young's modulus. The organic material constituting the first insulating film 102 and the second insulating film 202 preferably has a thermal expansion coefficient of 70 ppm / K or less, more preferably 50 ppm / K or less.

[0034] Furthermore, the organic materials used for the insulating films are liquid or soluble in a solvent, allowing each insulating film to be easily formed as a thin film by spin coating or the like. Furthermore, these organic materials are heat-resistant, allowing them to withstand the temperatures (e.g., high temperatures of 300°C or higher) encountered when bonding the first electrode 103 and the second electrode 203 in step (h) described below, preventing the bonding between the insulating films from deteriorating due to high temperatures. The organic material constituting the first insulating film 102 and the second insulating film 202 may be a photosensitive resin, a thermosetting non-conductive film (NCF), or a thermosetting resin. This organic material may also be an underfill material. Furthermore, the first insulating film 102 and the second insulating film 202 may be insulating films containing both inorganic and organic materials, or one insulating film may be formed from an inorganic material and the other insulating film may be formed from an organic material.

[0035] The thickness of the first insulating film 102 may be 20 μm or less. By making the thickness of the first insulating film 102 sufficiently thin, the wiring formed from the first electrode 103 can be made finer. For example, the minimum size (electrode width) of the first electrode 103 formed in the first insulating film 102 is determined by the thickness of the first insulating film 102 and the aspect ratio of the photosensitive material used. When the aspect ratio of the photosensitive material is, for example, 1:1 (opening width:depth), the thickness of the first insulating film 102 of 20 μm or less allows the electrode width of the first electrode 103 to be 20 μm or less. The thickness of the first insulating film 102 may be greater than 20 μm. In this case, when the insulating films are bonded together in the step (g) described below, more foreign matter can be embedded in the resin first insulating film 102, thereby more reliably bonding the insulating films together. Furthermore, one of the resin insulating layers can alleviate stress during bonding between the insulating films, thereby improving adhesion between the insulating films.

[0036] Furthermore, the thickness of the first insulating film 102 may be 4 μm or more. In this case, by embedding minute foreign particles in the resin insulating film, it is possible to improve the connection between the first insulating film 102 and the second insulating film 202 even if minute foreign particles remain. For example, the size of foreign particles that can be embedded in the first insulating film 102 is determined by the thickness of the resin first insulating film 102. If the thickness of the first insulating film 102 is, for example, 4 μm, foreign particles with a diameter or width of 4 μm can be embedded in the first insulating film 102. That is, according to this manufacturing method, even if debris smaller than the thickness of the first insulating film 102 is present, embedding the debris in the resin insulating film makes it possible to improve the connection between the first insulating film 102 and the second insulating film 202. Note that the thickness of the second insulating film 202 may be 20 μm or less, greater than 20 μm, or 4 μm or more, similar to the first insulating film 102. As described above, the second insulating film 202 may embed the debris.

[0037] [Steps (c) and (d)] Step (c) is a step of polishing the first semiconductor substrate 100. In step (c), the surface of the first insulating film 102 on which the first electrodes 103 are provided is polished using a CMP (Chemical Mechanical Polishing) method. In step (c), the first semiconductor substrate 100 may be polished by CMP under conditions that selectively and deeply polish the first electrodes 103 made of, for example, copper (see FIG. 5A), or the first semiconductor substrate 100 may be polished by CMP so that the surfaces of the first electrodes 103 are flush with the surface of the first insulating film 102. This polishing reduces the average roughness of the surface of the first insulating film 102 to 1 nm or less, enabling hybrid bonding, as described below. Note that this polishing may also remove debris from the surface of the first semiconductor substrate 100.

[0038] Step (d) is a step of polishing the second semiconductor substrate 200. In step (d), the surface of the second insulating film 202 on which the second electrode 203 is provided is polished using a CMP method. In step (d), the second semiconductor substrate 200 may be polished by the CMP method under conditions that selectively and deeply polish the second electrode 203 made of, for example, copper, or the like, or the second semiconductor substrate 200 may be polished by the CMP method so that each surface of the second electrode 203 is flush with the surface of the second insulating film 202. This polishing makes the average roughness of the surface of the second insulating film 202 1 nm or less, similar to that of the first insulating film 102. Note that this polishing may also remove debris on the surface of the second semiconductor substrate 200.

[0039] In steps (c) and (d), the first insulating film 102 and the second insulating film 202 may be polished to have the same thickness. Alternatively, the first insulating film 102 may be polished to have a thickness greater than that of the second insulating film 202. Alternatively, the first insulating film 102 may be polished to have a thickness less than that of the second insulating film 202. When the first insulating film 102 is thicker than the second insulating film 202 and is made of an organic material, the first insulating film 102 can contain most of the debris that adheres to the bonding interface during singulation into semiconductor chips 10 or chip mounting, thereby reducing bonding defects. On the other hand, when the first insulating film 102 is thinner than the second insulating film 202, the height of the mounted semiconductor chip 10, i.e., the semiconductor device 1, can be reduced.

[0040] [Step (e)] Step (e) is a step of singulating the first semiconductor substrate 100 to obtain a plurality of semiconductor chips 10. In step (e), as shown in (a) and (b) of Figures 3, the first semiconductor substrate 100 is attached to a dicing tape DCT so that the first insulating film 102 and the plurality of first electrodes 103 face the dicing tape DCT. Thereafter, as shown in (b) and (c) of Figures 3, the first semiconductor substrate 100 is singulated into a plurality of semiconductor chips 10 using a cutting means such as a dicing blade D (dicer) from the first substrate main body 101 toward the first insulating film 102. During this singulation, the surfaces of the first insulating film 102 and the first electrodes 103, which are the electrode surfaces of the first semiconductor substrate 100, are protected by being attached to the dicing tape DCT. In step (e), the first substrate body 101 and the first insulating film 102 of the first semiconductor substrate 100 are divided into substrate portions 101b and insulating film portions 102b corresponding to each semiconductor chip 10, as shown in FIG. 2B. As a dicing method for dividing the first semiconductor substrate 100, it is preferable to use, for example, a dicer equipped with a dicing blade D, but stealth dicing or laser dicing may also be used. In step (e), the electrode surfaces are attached so as to face the dicing tape DCT, so no surface protective material is required.

[0041] The dicing tape DCT used in step (e) can be any of a variety of dicing tapes, including a tape having a substrate layer and an adhesive layer provided on the substrate layer. Examples of the substrate layer include plastic films such as polytetrafluoroethylene film, polyethylene terephthalate film, polyethylene film, polypropylene film, polymethylpentene film, and polyimide film. These substrate layers may be subjected to surface treatments such as primer coating, UV treatment, corona discharge treatment, polishing treatment, and etching treatment, as necessary.

[0042] The adhesive layer of the dicing tape is a layer made of an adhesive. There are no particular limitations on the adhesive, and various types of dicing tape can be used as long as they have sufficient adhesive strength to prevent semiconductor elements from scattering during dicing and low enough adhesive strength not to damage the semiconductor chips 10 during the subsequent pick-up process of the semiconductor chips 10. The adhesive may be either a non-radiation-curable or radiation-curable adhesive. A non-radiation-curable adhesive is an adhesive that exhibits a certain level of adhesiveness with short-term pressure application and does not exhibit a property of decreasing adhesiveness upon irradiation with radiation (e.g., ultraviolet light). On the other hand, a radiation-curable adhesive is an adhesive that exhibits a property of decreasing adhesiveness upon irradiation with radiation (e.g., ultraviolet light). The radiation-curable adhesive may be, for example, an ultraviolet-curable adhesive. The thickness of the dicing tape DCT (base layer and adhesive layer) may be 60 to 150 μm or 70 to 130 μm from the standpoints of economy and film handling.

[0043] The dicing tape DCT used in step (e) can be a tape having the following adhesive properties. For example, the dicing tape DCT can be a tape whose adhesion to the first insulating film 102 is 1.0 N / 25 mm or more (see FIG. 6A). This prevents the semiconductor chips 10 from scattering when the first semiconductor substrate 100 is diced into individual pieces. Note that the adhesion here (and the same applies hereinafter within the applicable range) refers to the 90° peel strength measured at a temperature of 23° C., a peel angle of 90°, and a peel speed of 5 mm / sec.

[0044] The dicing tape DCT can be a tape in which the adhesion force of the dicing tape DCT to the first insulating film 102 is smaller than the adhesion force of the first insulating film 102 to the first substrate body 101 (see (a) and (b) of FIGS. 6A and 6B). This makes it possible to prevent the insulating film portion 102b corresponding to the first insulating film 102 from peeling off from the substrate portion 101b corresponding to the first substrate body 101 when the individual semiconductor chips 10 are picked up by a die bonder P or the like. Furthermore, the dicing tape DCT can be a tape in which the adhesion force of the dicing tape DCT to the first insulating film 102 is smaller than the stress when the semiconductor chips 10 are picked up in a process described later (see (b) of FIG. 6B). This makes it possible to easily pick up the semiconductor chips 10 from the dicing tape DCT when the individual semiconductor chips 10 are picked up by a die bonder P or the like.

[0045] The dicing tape DCT can be a tape in which the adhesion strength of the dicing tape DCT to foreign matter (debris) is greater than the adhesion strength of the first insulating film 102 to the foreign matter. In this case, even if foreign matter is mixed between the first semiconductor substrate 100 or semiconductor chip 10 and the dicing tape DCT, the foreign matter can be left on the dicing tape DCT when the semiconductor chip 10 is picked up from the dicing tape DCT. This further prevents poor bonding of the semiconductor chip 10. Note that the foreign matter referred to here refers to, for example, cutting debris generated during dicing, which may consist of silicon, silicon oxide from an oxide film, or metal such as copper from wiring portions, and has a size of 0.1 μm to 10 μm. The adhesion strength to such foreign matter can be measured using various methods, such as measurement using suction airflow, measurement using centrifugal separation, or measurement using surface vibration (see, for example, "Fluid Physical Cleaning (1) Basic Concepts and Adhesion Force of Fine Particles," by Toshiyuki Sanada et al., THE CHEMICAL TIMES 2015 No. 2 (Vol. 236)). Alternatively, the adhesive strength of the tape to the foreign matter may be measured by the following method. That is, the foreign matter described above is first brought into close contact with the first insulating film 102, and then a dicing tape DCT for evaluation is attached to it. The dicing tape DCT is then peeled off to determine whether the foreign matter is transferred to the tape. The strength of the adhesive strength may be evaluated by this method.

[0046] The dicing tape DCT can be a tape in which the adhesive force of the dicing tape DCT to the first semiconductor substrate 100 is greater than the dicing stress caused by the dicing blade D when the first semiconductor substrate 100 is singulated. This makes it possible to prevent the semiconductor chips 10 from scattering when the first semiconductor substrate 100 is singulated by dicing. Note that the "dicing stress" referred to here means the stress acting in the peeling direction on the dicing tape DCT, among the stresses such as frictional force with the dicing blade, vibration, and the flow of cleaning water that act on the first semiconductor substrate 100 or the semiconductor chips 10 when the first semiconductor substrate 100 is diced with a dicer.

[0047] In step (e), after the dicing is completed, the diced semiconductor chips 10 may be cleaned. Alternatively, as shown in FIG. 3(d), the semiconductor chip 10 may be flipped over and attached to another dicing tape DCT so that the substrate portion 101b faces the dicing tape DCT, and then used in the subsequent process. Furthermore, in order to bond the semiconductor chip 10 to the second semiconductor substrate 200, after dicing, the insulating film portion 102b and the first electrode 103 of the semiconductor chip 10 may be subjected to surface treatment by irradiating them with plasma, ion beams, ultraviolet light, or electron beams, or by applying a coupling agent or the like to the surface of the insulating film portion 102b. The plasma treatment used here may be, for example, oxygen plasma, nitrogen plasma, or argon plasma.

[0048] [Step (f)] As shown in Fig. 2C, step (f) is a step of aligning the first electrodes 103 of each of the multiple semiconductor chips 10 with the second electrodes 203 of the second semiconductor substrate 200. In step (f), as shown in Fig. 4A, each semiconductor chip 10 is aligned so that each first electrode 103 of each semiconductor chip 10 faces the corresponding second electrode 203 of the second semiconductor substrate 200. When the semiconductor chip 10 is directly attached to the second semiconductor substrate 200 in the state after dicing shown in Fig. 3C (a state in which the insulating film portion 102b and the first electrodes 103 face the tape side), the positions of the first electrodes 103 cannot be seen from above, etc. Therefore, for example, a method of determining the positions of the first electrodes 103, etc. using an infrared camera (IR camera) or electromagnetic waves such as X-rays that pass through the substrate, or ultrasonic waves, or a method of providing a through-via or a through-hole in advance in the first semiconductor substrate 100 (at least on the substrate portion 101b side) and using it as an alignment mark can be used. In this way, the positions of the first electrodes 103, etc. can be determined.

[0049] [Step (g)] Step (g) is a step of bonding each insulating film portion 102b of the multiple semiconductor chips 10 to the second insulating film 202 of the second semiconductor substrate 200. In step (g), after removing organic matter or metal oxide adhering to the surfaces of each semiconductor chip 10 and the second semiconductor substrate 200, the semiconductor chip 10 is aligned with the second semiconductor substrate 200 as shown in FIG. 4A. After this is completed, the insulating film portion 102b of each of the multiple semiconductor chips 10 is bonded to the second insulating film 202 of the second semiconductor substrate 200 by hybrid bonding (see FIGS. 4B and 5B). At this time, the insulating film portions 102b of the multiple semiconductor chips 10 and the second insulating film 202 of the second semiconductor substrate 200 may be uniformly heated before bonding. The temperature difference between the semiconductor chips 10 and the second semiconductor substrate 200 during bonding is preferably, for example, 10°C or less. By this heat bonding at a uniform temperature, the insulating film portion 102b and the second insulating film 202 are bonded to form an insulating bond portion S1, and the multiple semiconductor chips 10 are mechanically and firmly attached to the second semiconductor substrate 200. Furthermore, because the heat bonding is performed at a uniform temperature, misalignment at the bonding portion is unlikely to occur, allowing for highly accurate bonding. At this attachment stage, the first electrode 103 of the semiconductor chip 10 and the second electrode 203 of the second semiconductor substrate 200 are spaced apart from each other (see FIG. 5(b)) and are not connected (although they are aligned). Note that the semiconductor chip 10 may be attached to the second semiconductor substrate 200 by other bonding methods, such as room-temperature bonding.

[0050] [Step (h)] Step (h) is a step of bonding the first electrodes 103 of each of the semiconductor chips 10 to the second electrodes 203 of the second semiconductor substrate 200. In step (h), as shown in FIG. 2D, after the lamination in step (g) is completed, a predetermined amount of heat H and / or pressure is applied to bond the first electrodes 103 of the semiconductor chips 10 to the second electrodes 203 of the second semiconductor substrate 200 by hybrid bonding (see also FIGS. 4B and 5C). When the first electrodes 103 and the second electrodes 203 are made of copper, the annealing temperature in step (g) is preferably 150°C or higher and 400°C or lower, and more preferably 200°C or higher and 300°C or lower. This bonding process forms an electrode bonding portion S2 where the first electrodes 103 and the corresponding second electrodes 203 are bonded, and the first electrodes 103 and the second electrodes 203 are firmly bonded mechanically and electrically. 4B shows the state in which the insulating bonding portion S1 and the electrode bonding portion S2 have been formed. The electrode bonding in step (h) is performed after the bonding in step (g), but may be performed simultaneously with the bonding in step (g). Thereafter, as shown in FIGS. 4C and 4D, all of the semiconductor chips 10 are bonded to the second semiconductor substrate 200 to obtain the semiconductor device 1.

[0051] As a result, it is possible to obtain a semiconductor device 1 (see (c) and (d) of FIG. 4) in which a plurality of semiconductor chips 10 are electrically and mechanically installed with high precision at predetermined positions on the second semiconductor substrate 200. Thereafter, the semiconductor device (CoW) having the configuration shown in (d) of FIG. 4 may be further diced into individual pieces to form individual semiconductor devices each composed of one semiconductor chip 10 and a portion of the second semiconductor substrate 200 corresponding to that one semiconductor chip 10.

[0052] As described above, according to the semiconductor device manufacturing method of this embodiment, the first semiconductor substrate 100 is attached to the dicing tape DCT so that the first insulating film 102 and the plurality of first electrodes 103 face the dicing tape DCT, and then singulated in this state. In this case, the first semiconductor substrate 100 is singulated with the surfaces of the first insulating film 102 and the plurality of first electrodes 103 protected by the dicing tape DCT. Therefore, foreign matter generated during dicing does not adhere to the surfaces of the insulating film portion 102b and the first electrodes 103 of the singulated semiconductor chips 10. Therefore, poor bonding of the semiconductor chips 10 due to foreign matter can be prevented.

[0053] The method for manufacturing a semiconductor device according to this embodiment may further include, after the singulation step, a step of using plasma treatment to clean the surfaces of at least one of the insulating film portion 102b and the first electrode 103 of each of the plurality of semiconductor chips 10. In this case, cleaning using plasma treatment can remove contaminants on the surfaces of the semiconductor chips 10, for example, by burning off organic foreign matter, thereby preventing poor bonding of the semiconductor chips 10.

[0054] The method for manufacturing a semiconductor device according to this embodiment further includes a step of removing each of the plurality of semiconductor chips 10 from the dicing tape DCT after the singulation step. In this step of removing the plurality of semiconductor chips, each of the plurality of semiconductor chips 10 may be picked up so as to contact the singulated substrate portion 101b of the first substrate body 101. In this case, the semiconductor chips 10 can be bonded using a device such as a die bonder, and the manufacturing method of the present disclosure can be easily applied to an existing manufacturing process.

[0055] The method for manufacturing a semiconductor device according to this embodiment further includes the steps of preparing a second semiconductor substrate 200 having a second substrate body 201, a second insulating film 202 provided on one surface of the second substrate body 201, and a plurality of second electrodes 203, aligning a first electrode 103 of at least one semiconductor chip 10 among a plurality of semiconductor chips 10 with any one of the plurality of second electrodes 203, bonding an insulating film portion 102b of the semiconductor chip 10 to the second insulating film 202 of the second semiconductor substrate 200, and bonding the first electrode 103 of the semiconductor chip 10 to the second electrode 203 of the second semiconductor substrate 200. In this case, the individual semiconductor chips 10 can be reliably bonded to the second semiconductor substrate 200.

[0056] In the semiconductor device manufacturing method according to this embodiment, in the step of singulating the first semiconductor substrate 100, dicing positioning may be performed from the first substrate body 101 side. In this semiconductor device manufacturing method, the front surface of the first semiconductor substrate 100 faces the dicing tape DCT, making it difficult to align the dicing position. Therefore, by performing dicing positioning from the back surface side, the semiconductor chips can be singulated more accurately.

[0057] In the semiconductor device manufacturing method according to this embodiment, the dicing tape DCT may be configured to prevent oxidation of the surfaces of the multiple first electrodes 103 of the first semiconductor substrate 100. Oxidation prevention using the dicing tape DCT can be achieved by including in the tape, for example, a rust inhibitor such as benzotriazole, tolyltriazole, or mercaptobenzothiazole; a surfactant such as a carboxylic acid having eight or more carbon atoms, an alkylamine, or an alkylthiol; or a reducing agent or antioxidant such as hydrazine, sulfite, or ascorbic acid. This prevents the surfaces of the first electrodes 103 from oxidizing during the process from the first semiconductor substrate 100 to the semiconductor chips 10, forming an oxide film on the electrode surface and impairing electrode bonding. Furthermore, a method can be performed in which the oxide films of the multiple first electrodes 103 are removed en bloc on the first semiconductor substrate 100 before the first semiconductor substrate 100 is singulated, thereby improving manufacturing efficiency.

[0058] The method for manufacturing a semiconductor device according to this embodiment may further include a step of removing an oxide film on the surface of the first electrode 103 of the semiconductor chip 10 before the step of bonding the first electrode 103 of the semiconductor chip 10 to the second electrode 203 of the second semiconductor substrate 200. This makes it possible to prevent bonding defects between the first electrode 103 and the second electrode 203. The oxide film on the surface of the second electrode 203 can also be removed in a similar manner.

[0059] In the semiconductor device manufacturing method according to this embodiment, the first insulating film 102 of the first semiconductor substrate 100 may contain an organic material. In this case, the organic material, which is a relatively soft material, can absorb (embed) foreign matter (debris) adhering to the surface of the semiconductor chip 10 or the second semiconductor substrate 200 into the insulating film portion made of the organic material, thereby further reducing connection defects in the semiconductor chip 10. In other words, according to this manufacturing method, foreign matter adhering to the surface of the semiconductor chip 10 or the like can be embedded in the insulating film made of the organic material and rendered harmless. Note that the second insulating film 202 of the second semiconductor substrate 200 may be formed to contain an organic material. In this case, similar effects can be achieved.

[0060] In the semiconductor device manufacturing method according to this embodiment, when the first insulating film 102 contains an organic material, the organic material contained in the first insulating film 102 may include polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor. These materials are liquid or soluble in a solvent, which facilitates the fabrication of the first insulating film 102 by, for example, spin coating, and facilitates the formation of a thin film. Furthermore, these materials have high heat resistance, allowing them to withstand the high temperatures encountered when bonding the semiconductor chip 10 to the second semiconductor substrate 200, thereby enabling more reliable bonding of the substrates. The second insulating film 202 of the second semiconductor substrate 200 may also be formed using the organic material described above. Similar effects can be achieved in this case as well.

[0061] In the method for manufacturing a semiconductor device according to this embodiment, the first insulating film 102 of the first semiconductor substrate 100 may contain an inorganic material. In this case, it is possible to manufacture a semiconductor device with a finer configuration. Furthermore, since inorganic materials are easily bonded to each other, it is possible to increase the adhesive strength between the insulating films and improve the connection reliability of the semiconductor device. Note that the second insulating film 202 of the second semiconductor substrate 200 may be formed to contain an inorganic material. In this case, the same effects can be achieved.

[0062] The present invention will be described in more detail below with reference to examples, but the present invention is not limited to these examples.

[0063] Experimental Example 1 An 8-inch silicon wafer (substrate with insulating film) on which a 5 μm-thick polyimide cured film (product name: HD4100, manufactured by HD Microsystems) was formed was prepared as a wafer corresponding to the first semiconductor substrate 100 in the above-described embodiment. Photosensitive dicing tape (product name: N30, manufactured by Maxell) was also prepared. The silicon wafer on which the polyimide cured film was formed was then attached to the photosensitive dicing tape so that the polyimide cured film (first insulating film 102) served as the attachment surface (see FIGS. 3A and 3B). A 25 mm-wide cut was made in the attached photosensitive dicing tape with a utility knife. Then, a 90° peel test was performed at a pulling speed of 5 mm / sec using a tensile tester (product name: EZ-SX, manufactured by Shimadzu Corporation) while holding one end of the 25 mm-wide photosensitive dicing tape. The average peel force was measured as the adhesion force. N = 3 measurements were performed, and the average of these measurements was used as the adhesion force. This average adhesion force was 2.64 N / 25 mm, and it was confirmed that the two could be adhered to each other with a force of 1.0 N / 25 mm or more during dicing.

[0064] [Experimental Examples 2 and 3] The same type of photosensitive dicing tape as used in Experimental Example 1 was attached to the front surface (Experimental Example 2) and back surface (Experimental Example 3) of a silicon wafer on which no polyimide film was formed, and a 90° peel test was performed in the same manner as in Experimental Example 1. As a result, the average adhesion strength (N=3) in Experimental Example 2 was 2.50 N / 25 mm, and the average adhesion strength (N=3) in Experimental Example 3 was 1.75 N / 25 mm.

[0065] Thus, it was confirmed that high adhesion strength could be ensured even when the dicing tape was attached to a substrate including an insulating film such as the cured polyimide film shown in Experimental Example 1. Furthermore, after the photosensitive dicing tape was attached to the silicon wafer including the cured polyimide film shown in Experimental Example 1, a high-pressure mercury lamp was used to apply 350 mW / cm ２ The exposed sample was subjected to the above-mentioned 90° peel test, and it was confirmed that the average adhesion strength (N=3) was reduced to 0.07 N / 25 mm. In other words, it was confirmed that the adhesion strength between the two was reduced by exposure, and that the pickup properties after exposure were good. In addition, the 90° peel test after exposure was also performed in Experimental Examples 2 and 3 (see Table 1 below), and it was confirmed that the results of the 90° peel test after exposure in Experimental Example 1 were similar to those in Experimental Examples 2 and 3.

[0066]

[0067] 1...semiconductor device, 10...semiconductor chip, 100...first semiconductor substrate, 101...first substrate main body, 101a...one surface, 101b...substrate portion, 102...first insulating film, 102b...insulating film portion, 103...first electrode, 200...second semiconductor substrate, 201...second substrate main body, 201a...one surface, 202...second insulating film, 203...second electrode, DCT...dicing tape.

Claims

1. preparing a first semiconductor substrate having a first substrate body, a first insulating film provided on one surface of the first substrate body, and a plurality of first electrodes; preparing a dicing tape; attaching the first semiconductor substrate to the dicing tape; a step of singulating the first semiconductor substrate to obtain a plurality of semiconductor chips, each of which includes an insulating film portion corresponding to the first insulating film and at least one first electrode among the plurality of first electrodes; In the step of preparing the first semiconductor substrate, surfaces of the first insulating film and the first electrodes are polished; A method for manufacturing a semiconductor device, wherein in the attaching step, the first semiconductor substrate is attached to the dicing tape so that the first insulating film and the plurality of first electrodes face the dicing tape, and the polished surfaces of the first insulating film and the plurality of first electrodes are attached to the dicing tape.

2. the adhesive strength of the dicing tape to the first semiconductor substrate is 1.0 N / 25 mm or more; The method for manufacturing a semiconductor device according to claim 1 .

3. an adhesive strength of the dicing tape to the first insulating film is smaller than an adhesive strength of the first insulating film to the first substrate body; The method for manufacturing a semiconductor device according to claim 1 .

4. an adhesive force of the dicing tape to the first insulating film is smaller than a stress when picking up any one of the plurality of semiconductor chips; The method for manufacturing a semiconductor device according to claim 1 .

5. an adhesion strength of the dicing tape to the foreign matter is greater than an adhesion strength of the first insulating film to the foreign matter; The method for manufacturing a semiconductor device according to claim 1 .

6. an adhesive force of the dicing tape to the first semiconductor substrate is greater than a dicing stress when the first semiconductor substrate is divided into individual pieces; The method for manufacturing a semiconductor device according to claim 1 .

7. the method further comprises, after the step of dividing the semiconductor chips into individual chips, cleaning a surface of at least one of the insulating film portion and the first electrode in each of the plurality of semiconductor chips by plasma treatment. The method for manufacturing a semiconductor device according to claim 1 .

8. the method further comprises the step of removing each of the plurality of semiconductor chips from the dicing tape after the step of singulating; In the step of removing the plurality of semiconductor chips, the plurality of semiconductor chips are picked up so as to come into contact with the individual substrate portions of the first substrate body. The method for manufacturing a semiconductor device according to claim 1 .

9. preparing a second semiconductor substrate having a second substrate body, a second insulating film provided on one surface of the second substrate body, and a plurality of second electrodes; a step of aligning the first electrode of at least one semiconductor chip among the plurality of semiconductor chips with any second electrode among the plurality of second electrodes; a step of bonding the insulating film portion of the semiconductor chip and the second insulating film of the second semiconductor substrate to each other; and joining the first electrode of the semiconductor chip and the second electrode of the second semiconductor substrate. The method for manufacturing a semiconductor device according to claim 1 .

10. In the step of dividing the first semiconductor substrate into individual pieces, dicing positioning is performed from the first substrate main body side. The method for manufacturing a semiconductor device according to claim 1 .

11. the dicing tape is configured to prevent oxidation of surfaces of the plurality of first electrodes of the first semiconductor substrate. The method for manufacturing a semiconductor device according to claim 1 .

12. The method further includes a step of removing an oxide film on a surface of the first electrode of the semiconductor chip before a step of bonding the first electrode of the semiconductor chip to another electrode. The method for manufacturing a semiconductor device according to claim 1 .

13. the first insulating film of the first semiconductor substrate includes an organic material; The method for manufacturing a semiconductor device according to claim 1 .

14. the organic material contained in the first insulating film includes polyimide, a polyimide precursor, polyamideimide, benzocyclobutene (BCB), polybenzoxazole (PBO), or a PBO precursor; The method for manufacturing a semiconductor device according to claim 13.

15. the first insulating film of the first semiconductor substrate contains an inorganic material; The method for manufacturing a semiconductor device according to claim 1 .

16. A dicing tape used in the method for manufacturing a semiconductor device according to any one of claims 1 to 15.