Reception device and voltage supply system

JPWO2024203850A5Pending Publication Date: 2025-12-22
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
JP2025510717
Authority / Receiving Office
JP · JP
Patent Type
Applications
Filing Date
2025-09-22
Publication Date
2025-12-22
Patent Text Reader

Abstract

A reception device (2) is provided with: an input stage (21) configured such that a PWM signal (S1) transmitted from a transmission device (1) is transmitted and input; a calculation unit (22B) configured to calculate the duty cycle of the PWM signal on the basis of output (S3) of the input stage; and a correction unit (22C) configured to correct the calculated duty cycle by subtracting or adding a correction amount (∆Dty) therefrom or thereto.
Need to check novelty before this filing date? Find Prior Art

Description

Receiving device and voltage supply system

[0001] The present disclosure relates to a receiving device.

[0002] 2. Description of the Related Art Conventionally, a system is known in which a PWM (pulse width modulation) signal is transmitted from a transmitting IC to a receiving IC (see, for example, Patent Document 1).

[0003] JP 2016-74255 A

[0004] However, in the above-described system, there is a possibility that a transmission error may occur due to the influence of the transmission path through which the PWM signal is transmitted.

[0005] In view of the above circumstances, an object of the present disclosure is to provide a receiving device that can perform appropriate processing for transmission errors of PWM signals.

[0006] For example, a receiving device according to one aspect of the present disclosure is configured to include an input stage configured to transmit and input a PWM signal transmitted from a transmitting device, a calculation unit configured to calculate the duty of the PWM signal based on the output of the input stage, and a correction unit configured to correct the calculated duty by subtracting or adding a correction amount to the calculated duty.

[0007] According to the exemplary receiving device of the present disclosure, it is possible to perform appropriate processing for transmission errors of PWM signals.

[0008] FIG. 1 is a diagram illustrating a configuration of a voltage supply system according to a comparative example. FIG. 2 is a diagram illustrating example waveforms of PWM signals S1, S2, and S3. FIG. 3 is a diagram illustrating example waveforms of several cycles of PWM signals S1 and S3. FIG. 4 is a diagram illustrating a configuration of a voltage supply system according to a first embodiment of the present disclosure. FIG. 5 is a diagram illustrating a first example of a relationship between a duty cycle during a high-level period and a voltage value of an output voltage. FIG. 6 is a diagram illustrating a second example of a relationship between a duty cycle during a high-level period and a voltage value of an output voltage. FIG. 7 is a diagram illustrating a first example of a relationship between a duty cycle during a low-level period and a voltage value of an output voltage. FIG. 8 is a diagram illustrating a second example of a relationship between a duty cycle during a low-level period and a voltage value of an output voltage. FIG. 9 is a diagram illustrating a configuration of a voltage supply system according to a second embodiment of the present disclosure. FIG. 10 is a diagram illustrating a configuration of a voltage supply system according to a third embodiment of the present disclosure.

[0009] Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the drawings.

[0010] 1. Comparative Example Here, before describing the embodiments of the present disclosure, a comparative example will be described for comparison. By describing the comparative example, the problem to be solved will become clearer.

[0011] 1 is a diagram showing the configuration of a voltage supply system 5 according to a comparative example. The voltage supply system 5 supplies an output voltage Vout to a voltage receiving circuit 3. The voltage receiving circuit 3 is, for example, a system-on-a-chip (SOC).

[0012] The voltage supply system 5 includes a transmitter 1 and a receiver 2. The transmitter 1 and receiver 2 are mounted on a printed circuit board (not shown).

[0013] The transmitter 1 has an IC (integrated circuit) that includes a PWM generator 11 and an output stage 12 integrated together, and is configured as, for example, a CPU (Central Processing Unit).

[0014] The receiving device 2 has an IC that includes an input stage 21, a PWM receiver 22, and a voltage generating circuit 23 integrated together.

[0015] The transmitter 1 has a PWM output terminal T1 as an external terminal, and the receiver 2 has a PWM input terminal T2 as an external terminal. The PWM output terminal T1 and the PWM input terminal T2 are connected by wiring 4 on a printed circuit board.

[0016] The PWM generator 11 generates a PWM signal S1 and outputs it to the output stage 12. The PWM signal S1 is a pulse signal including a high level and a low level. The output stage 12 outputs a PWM signal S2 based on the PWM signal S1 and transmits the PWM signal S2 through a transmission path including a PWM output terminal T1, a wiring 4, and a PWM input terminal T2. The PWM signal S2 transmitted through the transmission path is input to the input stage 21.

[0017] The input stage 21 outputs a PWM signal S3 based on the PWM signal S2. The PWM signal S3 is input to a PWM receiver 22. The PWM receiver 22 has a PWM counter 22A and a duty calculation unit 22B.

[0018] The PWM counter 22A counts the clock CLK having a predetermined frequency. The PWM counter 22A acquires, for example, a count value corresponding to a high-level period in one cycle of the PWM signal S3 and a count value corresponding to one cycle of the PWM signal S3. In this case, the duty calculation unit 22B calculates the duty of the high-level period (the ratio of the high-level period to one cycle) based on the acquired count values.

[0019] The duty calculation unit 22B outputs data Dt indicating the calculated duty to the voltage generation circuit 23. The data Dt is n-bit (e.g., 8-bit) digital data. The voltage generation circuit 23 generates an output voltage Vout having a voltage value corresponding to the data Dt. For example, the higher the duty calculated by the duty calculation unit 22B, the higher the voltage value of the output voltage Vout.

[0020] In this way, the voltage supply system 5 can set the voltage value of the output voltage Vout by the duty of the PWM signal S1, and has a voltage regulation function (VID (Voltage Identification)) using PWM.

[0021] 2 is a diagram showing example waveforms of the PWM signals S1, S2, and S3. When the PWM signal S1 rises to a high level at timing t1, the PWM signal S2 starts to rise and reaches a high level in a rise time Tr. After that, when the PWM signal S1 falls to a low level at timing t3, the PWM signal S2 starts to fall and reaches a low level in a fall time Tf.

[0022] The thresholds VIH and VIL shown in Figure 2 are thresholds in the input stage 21. VIH > VIL. At timing t2 when the PWM signal S2 rises and reaches the threshold VIH, the PWM signal S3 rises to high level. At timing t4 when the PWM signal S2 falls and reaches the threshold VIL, the PWM signal S3 falls to low level. Due to the delay time D1 from timing t1 to t2 and the delay time D2 from timing t3 to t4, the high-level period TH3 of the PWM signal S3 is longer than the high-level period TH1 of the PWM signal S1.

[0023] 3 is a diagram showing an example of waveforms of several cycles of the PWM signals S1 and S3. As shown in FIG. 3, one cycle Tpwm does not change for the PWM signals S1 and S3, but as described above, the high-level period TH3 of the PWM signal S3 is longer than the high-level period TH1 of the PWM signal S1. As a result, the duty cycle of the high-level period (= the ratio of the high-level periods TH1 and TH3 to one cycle Tpwm) of the PWM signal S3 is higher than that of the PWM signal S1. Note that the duty cycle of the low-level period (= the ratio of the low-level periods TL1 and TL3 to one cycle Tpwm) of the PWM signal S3 is lower than that of the PWM signal S1.

[0024] In this way, the duty cycle during the high-level period changes to a value higher in the receiving device 2 than the value assumed in the transmitting device 1, so that, for example, the voltage value of the output voltage Vout generated by the voltage generating circuit 23 becomes higher than the value assumed in the transmitting device 1.

[0025] The cause of the change in duty as described above is a slowdown in the rise and fall of the PWM signal S2, which is caused by the capacitance in the output stage 12, the resistance and capacitance in the transmission path between the output stage 12 and the input stage 21, etc. Note that if a resistor element for noise reduction is connected between the PWM input terminal T2 and the input stage 21, this resistor element can also be a cause. Suppressing the effects of such PWM signal transmission errors is a challenge.

[0026] 4 is a diagram showing the configuration of a voltage supply system 5 according to a first embodiment of the present disclosure. The configuration of FIG. 4 differs from the comparative example (FIG. 1) in that the PWM receiver 22 includes a data correction unit 22C and a limiting circuit 22D.

[0027] In this embodiment, the duty calculation unit 22B outputs data Dt1 indicating the calculated duty. The data correction unit 22C corrects the duty indicated by the data Dt1 using a correction amount ΔDty, and outputs data Dt2 indicating the corrected duty.

[0028] FIG. 5 is a diagram illustrating an example of the relationship between the duty during a high-level period and the voltage value of the output voltage Vout. In FIG. 5, the higher the duty during the high-level period, the higher the voltage value of the output voltage Vout. When a transmission error in the PWM signal occurs due to the influence of the transmission path or the like, and the duty value assumed by the transmitter 1 is increased in the receiver 2, the duty is corrected by a correction amount ΔDty. Specifically, the data corrector 22C corrects the duty by subtracting the correction amount ΔDty from the duty indicated by the data Dt1. This reduces the output voltage Vout by the correction amount ΔV, allowing it to be corrected to the voltage value assumed by the transmitter 1. Note that in this embodiment, it is assumed that the amount of change in the duty is constant regardless of the duty value, and the correction amount ΔDty is constant regardless of the duty value.

[0029] The corrected data Dt2 is input to the limiting circuit 22D. As shown in FIG. 5, if the duty is corrected with the correction amount ΔDty and falls below the lower limit value DL, the limiting circuit 22D limits the corrected duty value to the lower limit value DL. If the limiting circuit 22D limits the duty value, it outputs data Dt3 indicating the lower limit value DL; otherwise, it outputs the data Dt2 as data Dt3 without modification. The voltage generating circuit 23 generates an output voltage Vout having a voltage value corresponding to the data Dt3. This makes it possible to limit the voltage value within the allowable range of the voltage receiving circuit 3.

[0030] 6 is a diagram showing another example of the relationship between the duty during the high-level period and the voltage value of the output voltage Vout. In FIG. 6, the higher the duty during the high-level period, the lower the voltage value of the output voltage Vout. In this case, if the duty value assumed by the transmitter 1 changes to a higher value in the receiver 2, the data corrector 22C corrects the voltage value by subtracting a correction amount ΔDty from the duty indicated by the data Dt1. In this case, the output voltage Vout is corrected higher by the correction amount ΔV, and can be corrected to the expected voltage value.

[0031] As a modification of this embodiment, the duty calculation unit 22B may calculate the duty Dty during the low-level period. In this case, if a transmission error occurs in the PWM signal, the duty Dty during the low-level period will be lower than the value assumed by the transmitter 1. As shown in FIG. 7 , if the voltage value of the output voltage Vout increases as the duty during the low-level period increases, the data correction unit 22C corrects the duty indicated by the data Dt1 by adding a correction amount ΔDty. As a result, the output voltage Vout is corrected higher by the correction amount ΔV, and can be corrected to the expected value.

[0032] 8, when the voltage value of the output voltage Vout decreases as the duty during the low-level period increases, the data corrector 22C corrects the duty indicated by the data Dt1 by adding a correction amount ΔDty to the duty. As a result, the output voltage Vout is corrected lower by the correction amount ΔV, and can be corrected to an expected value.

[0033] 7 and 8, if the duty corrected by the correction amount ΔDty exceeds the upper limit value DH, the limiting circuit 22D limits the corrected duty value to the upper limit value DH. If the limiting circuit 22D limits the duty value, it outputs data Dt3 indicating the upper limit value DH, and otherwise it outputs data Dt2 as data Dt3.

[0034] 3. Second Embodiment In the first embodiment described above, the transmission path changes depending on the usage pattern, so the correction amount ΔDty needs to be arbitrarily set by the user. Therefore, the second embodiment described next may be implemented.

[0035] 9 is a diagram showing the configuration of a voltage supply system 5 according to a second embodiment of the present disclosure. The difference between the configuration shown in FIG. 9 and the first embodiment (FIG. 4) is that the PWM receiver 22 includes a correction amount determination unit 22E.

[0036] The correction amount determination unit 22E determines the correction amount ΔDty. In this embodiment, when the correction amount determination unit 22E makes a determination, the PWM generator 11 outputs a PWM signal S1 with a predetermined duty. Here, the predetermined duty is a fixed value, e.g., 50%. When the PWM signal S1 with the predetermined duty is output, the PWM receiver 22 receives a PWM signal S3. At this time, data Dt1 indicating the calculated duty is generated, and the correction amount determination unit 22E acquires the generated data Dt1.

[0037] The correction amount determination unit 22E determines the difference between the duty value indicated by the acquired data Dt1 and the predetermined duty (e.g., 50%) as the correction amount ΔDty. Thereafter, the data correction unit 22C corrects the data Dt1 using the correction amount ΔDty determined by the correction amount determination unit 22E.

[0038] In this way, in this embodiment, the correction amount ΔDty can be automatically set according to the usage mode of the transmission line.

[0039] 10 is a diagram showing the configuration of a voltage supply system 5 according to a third embodiment of the present disclosure. The difference between the configuration shown in Fig. 10 and the second embodiment (Fig. 9) is that a duty setting value Sdty is input to a correction amount determination unit 22E.

[0040] The duty set value Sdty is variably set. When the correction amount determination unit 22E makes a determination, the PWM generator 11 outputs a PWM signal S1 having a duty of the duty set value Sdty. The PWM signal S1 is output, and the PWM receiver 22 receives a PWM signal S3. At this time, data Dt1 indicating the calculated duty is generated, and the correction amount determination unit 22E acquires the generated data Dt1.

[0041] The correction amount determination unit 22E can determine the correction amount ΔDty based on the difference between the duty value indicated by the acquired data Dt1 and the duty setting value Sdty.

[0042] According to this embodiment, the duty setting value Sdty can be set within the allowable range of the specifications of the PWM generator 11 or the voltage receiving circuit 3, and the amount of correction can be determined.

[0043] <5. Others> In addition to the above-described embodiments, the various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation. In other words, the above-described embodiments should be considered to be illustrative and not restrictive in all respects, and the technical scope of the present disclosure should not be limited to the above-described embodiments, but should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0044] <6. Supplementary Note> As described above, a receiving device (2) according to one aspect of the present disclosure is configured to include: an input stage (21) configured to transmit and input a PWM signal (S1) transmitted from a transmitting device (1); a calculation unit (22B) configured to calculate a duty of the PWM signal based on an output (S3) of the input stage; and a correction unit (22C) configured to correct the calculated duty by subtracting or adding a correction amount (ΔDty) to or from the calculated duty (first configuration).

[0045] In addition, in the first configuration, the correction unit may further include a correction amount determination unit (22E) configured to determine the correction amount based on the difference between the duty calculated by the calculation unit (22B) when the PWM signal (S1) of a predetermined duty transmitted from the transmitting device (1) is transmitted and input to the input stage (21) and the predetermined duty (second configuration).

[0046] In the second configuration, the predetermined duty may be a fixed value (third configuration).

[0047] In the second configuration, the predetermined duty may be variably set (fourth configuration).

[0048] Furthermore, in any of the first to fourth configurations, the configuration may further include a limiting circuit (22D) configured to limit the duty after correction by the correction unit (22E) to a lower limit value (DL) if the duty is below the lower limit value, or to limit the duty after correction by the correction unit to an upper limit value (DH) if the duty is above the upper limit value (DH) (fifth configuration).

[0049] Furthermore, in any of the first to fifth configurations, the calculation unit (22B) may be configured to calculate the duty indicating the ratio of a high-level period in the output (S3) of the input stage (21) to one cycle, and the correction unit (22E) may be configured to correct the calculated duty by subtracting the correction amount (sixth configuration).

[0050] In addition, in any of the first to fifth configurations, the calculation unit (22B) may be configured to calculate the duty indicating the ratio of a low-level period in the output (S3) of the input stage (21) to one cycle, and the correction unit (22E) may be configured to correct the calculated duty by adding the correction amount (seventh configuration).

[0051] Furthermore, in any of the first to seventh configurations, a configuration may be adopted in which a voltage generating circuit (23) is further provided that is configured to generate an output voltage (Vout) having a voltage value according to the duty after correction by the correction unit (22E) (eighth configuration).

[0052] Furthermore, a voltage supply system (5) according to one aspect of the present disclosure includes a receiving device (2) of the eighth configuration having a PWM input terminal (T2) configured to be able to transmit and input the PWM signal, and a transmitting device (1) having a PWM output terminal (T1) configured to be able to transmit and output the PWM signal, and the PWM output terminal and the PWM input terminal can be connected by wiring (4) on a board (ninth configuration).

[0053] The present disclosure can be used, for example, in voltage supply systems for various applications.

[0054] REFERENCE SIGNS LIST 1 transmitter 2 receiver 3 voltage receiving circuit 4 wiring 5 voltage supply system 11 PWM generator 12 output stage 21 input stage 22 PWM receiver 22A PWM counter 22B duty calculation section 22C data correction section 22D limiting circuit 22E correction amount determination section 23 voltage generation circuit T1 PWM output terminal T2 PWM input terminal

Claims

1. an input stage configured to receive a PWM signal transmitted from a transmitter; a calculation unit configured to calculate a duty of the PWM signal based on an output of the input stage; a correction unit configured to correct the calculated duty by subtracting or adding a correction amount to the duty; A receiving device comprising:

2. 2. The receiving device according to claim 1, wherein the correction unit further comprises a correction amount determination unit configured to determine the correction amount based on a difference between the duty calculated by the calculation unit when the PWM signal of a predetermined duty transmitted from the transmitting device is transmitted and input to the input stage and the predetermined duty.

3. The receiving device according to claim 2 , wherein the predetermined duty is a fixed value.

4. The receiving device according to claim 2 , wherein the predetermined duty is variably set.

5. 2. The receiving device according to claim 1, further comprising a limiting circuit configured to limit the duty after correction by the correction unit to a lower limit value if the duty after correction is below a lower limit value, or to limit the duty after correction by the correction unit to an upper limit value if the duty after correction is above an upper limit value.

6. the calculation unit is configured to calculate the duty indicating a ratio of a high-level period of the output of the input stage to one cycle, The receiving device according to claim 1 , wherein the correction unit is configured to perform correction by subtracting the correction amount from the calculated duty.

7. the calculation unit is configured to calculate the duty indicating a ratio of a low level period of an output of the input stage to one cycle, The receiving device according to claim 1 , wherein the correction unit is configured to perform correction by adding the correction amount to the calculated duty.

8. The receiving device according to claim 1 , further comprising a voltage generating circuit configured to generate an output voltage having a voltage value according to the duty after the correction by the correction unit.

9. a receiving device according to claim 8, comprising a PWM input terminal configured to be able to transmit and input the PWM signal; the transmitting device having a PWM output terminal configured to be able to transmit and output the PWM signal; Equipped with The voltage supply system is such that the PWM output terminal and the PWM input terminal can be connected by wiring on a substrate.