Electronic circuit device and manufacturing method for same

Abstract

An electronic circuit device (301) comprises a chip component (101), a circuit board (201), and a coating resin (10). The chip component (101) is mounted on the circuit board (201), and the coating resin (10) is applied to coat a mounting surface of the circuit board (201). The surface of an element substrate (1), the surface of an insulator layer, and the surface of the coating resin (10) constitute a continuous surface in which, as viewed in the lamination direction of the element substrate (1) and the insulator layer, there is an insulator exposed part (4S) where no element substrate (1) is present due to the exposure of the insulator layer. At least a portion of a coil opening formed by a coil conductor (6) is situated within the area of the insulator exposed part (4S).

Description

Electronic circuit device and manufacturing method thereof

[0001] The present invention relates to an electronic circuit device including a circuit board on which chip components are mounted, and a method for manufacturing the same.

[0002] Integrated Passive Device (IPD) elements, which are constructed by integrating multiple passive components on a single substrate, are widely known. A silicon substrate, which is a common substrate for semiconductor elements, is used as the substrate. Alternatively, a glass substrate or a GaAs substrate is used to address concerns about loss due to eddy currents that may flow in the silicon substrate when an inductor is formed on the silicon substrate.

[0003] On the other hand, if an insulating substrate such as a GaAs substrate or a glass substrate is used, circuit components such as diodes and MOS capacitors cannot be formed.

[0004] Patent Documents 1 and 2 disclose that loss due to eddy currents can be suppressed by replacing the portion that overlaps with the inductor in a plan view with an insulating material, without using the glass substrate or GaAs substrate.

[0005] JP 2001-77315 A JP 2007-49115 A

[0006] In the integrated circuit devices described in Patent Documents 1 and 2, in order to suppress loss due to eddy currents occurring in the Si substrate, a part of the Si substrate that overlaps the inductor in a plan view is replaced with an insulating material member.

[0007] However, replacing a portion of the Si substrate with another insulating material member results in a decrease in the thickness of the element itself, and the increased portion of the Si substrate replaced with the insulating material reduces the mechanical strength, which can lead to damage to the integrated circuit device due to stress when the integrated circuit device is mounted on the circuit board or thermal shock and stress when mounting by reflow or the like.

[0008] Therefore, an object of the present invention is to provide an electronic circuit device and a manufacturing method thereof that suppresses the generation of eddy currents caused by providing an inductor in a chip component, as well as stress and damage during mounting of the chip component on a circuit board.

[0009] (A) An electronic circuit device as an example of the present disclosure includes a chip component, a circuit board, and a coating resin, wherein the chip component includes: an element substrate having a first main surface and a second main surface that are opposite each other; an insulator layer formed on the first main surface side of the element substrate; a coil conductor formed inside the insulator layer, generating or receiving a magnetic flux having a component perpendicular to the first main surface of the element substrate; and a chip component-side mounting electrode formed on the first main surface side and connecting the coil conductor or a circuit including the coil conductor to the circuit board, wherein the circuit board has a circuit board-side electrode to which the chip component-side mounting electrode is connected, and the chip component-side mounting electrode is connected to the circuit board-side electrode, the coating resin is formed to cover the mounting surface of the circuit board on which the chip component is mounted, and has an insulator exposed portion where the insulator layer surrounded by the element substrate is exposed, and a surface including the second main surface of the element substrate, the insulator exposed portion, and the coating resin form a continuous surface, At least a part of the coil opening defined by the coil conductor is within a region where the insulator exposed portion is formed when viewed in a direction perpendicular to the second main surface of the element substrate.

[0010] (B) A manufacturing method of an electronic circuit device as an example of the present disclosure includes: forming a recess or an opening on the first main surface side of an element substrate having first and second main surfaces that are opposite to each other; forming an insulator inside the recess or the opening; forming an insulator layer on the first main surface side of the element substrate; forming a coil conductor in the insulator layer that generates or receives magnetic flux having a component perpendicular to the insulator layer; and forming chip component-side mounting electrodes on a circuit board that connect the coil conductor or a circuit including the coil conductor; forming circuit board-side electrodes on the circuit board to which the chip component-side mounting electrodes are connected; connecting the chip component-side mounting electrodes to the circuit board-side electrodes; covering a mounting surface of the chip component on the circuit board with a coating resin; and grinding the element substrate and the insulator layer from the second main surface side until the insulator inside the recess or the opening is exposed from the element substrate, thereby forming a continuous surface on a surface including the second main surface of the element substrate, the insulator inside the recess or the opening, and the coating resin.

[0011] According to the present invention, an electronic circuit device and a manufacturing method thereof can be obtained that suppress the generation of eddy currents caused by providing an inductor in a chip component, as well as stress and damage during mounting of the chip component on a circuit board.

[0012] FIG. 1 is a cross-sectional view of an electronic circuit device 301 according to the first embodiment. FIG. 2 is a cross-sectional view illustrating a manufacturing method for the electronic circuit device 301 according to the first embodiment. FIG. 3 is a cross-sectional view illustrating a manufacturing method for the electronic circuit device 301 according to the first embodiment. FIG. 4 is a diagram illustrating a coil conductor 6 that generates or receives a magnetic flux φ having a component perpendicular to the insulator layers 4, 5A, and 5B. FIG. 5 is a diagram illustrating the positional relationship and shape of the surface of the element substrate 1, the surface of the insulator exposed portion 4S, and the surface of the coating resin 10. The upper part of FIG. 6 is a plan view of an electronic circuit device 302 according to a second embodiment, and the lower part of FIG. 6 is a vertical cross-sectional view taken along the dashed-dotted line in the plan view. FIG. 7 is a cross-sectional view of a chip component 102 before being mounted on a circuit board 201. FIG. 8 is a cross-sectional view illustrating a manufacturing method for the electronic circuit device 302 according to the second embodiment. FIG. 9 is a plan view illustrating a shape of an in-groove insulator 32 different from the example shown in FIG. 6. FIG. 10 is a cross-sectional view of an electronic circuit device 303 according to a third embodiment. FIG. 11 is a diagram illustrating a manufacturing method for an electronic circuit device 304 according to a fourth embodiment. Fig. 12 is a cross-sectional view showing a method for manufacturing an electronic circuit device according to the fifth embodiment. Fig. 13 is a cross-sectional view showing a method for manufacturing an electronic circuit device according to the fifth embodiment. Fig. 14 is a cross-sectional view showing a method for manufacturing an electronic circuit device according to the fifth embodiment. Fig. 15 is a cross-sectional view showing a method for manufacturing an electronic circuit device according to the fifth embodiment. Fig. 16 is a plan view of the state shown by (10) in Fig. 15. Fig. 17 is a circuit diagram of a circuit using an electronic circuit device 305 configured at a predetermined position on a circuit board.

[0013] Hereinafter, several specific examples will be given with reference to the drawings to illustrate multiple embodiments for carrying out the present invention. The same reference numerals are used for the same parts in each drawing. For ease of explanation and understanding of the main points, the embodiments are shown divided into multiple embodiments for convenience of explanation, but partial substitution or combination of the configurations shown in different embodiments is possible. From the second embodiment onwards, a description of matters common to the first embodiment will be omitted, and only the differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.

[0014] 1 is a cross-sectional view of an electronic circuit device 301 according to a first embodiment. The electronic circuit device 301 includes a chip component 101, a circuit board 201, and a coating resin 10.

[0015] The chip component 101 includes an element substrate (described in detail below) 1, an insulator exposed portion 4S, and insulator layers 5A and 5B. The insulator exposed portion 4S can be defined as an insulator embedded in the element substrate 1. The insulator exposed portion 4S will be described in detail below. The element substrate 1 has a first main surface and a second main surface that are opposite each other. The insulator exposed portion 4S is exposed on a surface that is continuous with the second main surface (top surface in FIG. 1 ) of the element substrate 1. In addition, a coil conductor 6 is formed on the insulator layers 5A and 5B. The coil conductor 6 generates or receives a magnetic flux component in a direction perpendicular to the first main surface of the element substrate 1 (the vertical direction in FIG. 1 ). The coil conductor 6 is formed in the stacking direction of the insulator exposed portion 4S and the insulator layers 5A and 5B to form a spiral, helical, or mixed spiral-helical coil.

[0016] Furthermore, chip component 101 has chip component side mounting electrodes 7A and 7B formed thereon for connecting the circuit to circuit board 201.

[0017] The circuit board 201 is provided with circuit board electrodes 21A and 21B to which the chip component mounting electrodes 7A and 7B of the chip component 101 are connected.

[0018] The circuit board electrodes 21A and 21B of the circuit board 201 are connected to the chip component mounting electrodes 7A and 7B, respectively.

[0019] The mounting surface of the circuit board 201 on which the chip component 101 is mounted is covered with a coating resin 10 so as to surround the chip component 101 .

[0020] 2 and 3 are cross-sectional views showing a method for manufacturing an electronic circuit device 301 according to the first embodiment. Numbers (1) to (7) in FIGS. 2 and 3 are numbers indicating the general steps of the process. For convenience of explanation, steps (1) to (4) are shown as a single chip component, but in reality, the components are manufactured in the form of a wafer with multiple chip components arranged side by side. Furthermore, steps (5) to (7) show the electronic circuit device after separation into single chip components. The details of the process will be explained below in numerical order.

[0021] (1) An oxide film 2 such as SiO2 is formed on the surface of an element substrate 1 such as a Si substrate, and a passivation film such as a nitride film (Si2N4) is formed on the surface of the oxide film 2 by CVD or the like.

[0022] (2) A recess of a predetermined depth is formed from the surface of the passivation film to the element substrate 1, and an insulator layer 4 is formed from the bottom of the recess to a predetermined height above the passivation film by, for example, dry etching or sandblasting. This insulator layer 4 is an organic insulating film for leveling the surface, and is, for example, an organic film such as epoxy resin, polyimide-polybenzoxazole (PBO), or polyimide (PI).

[0023] (3) Insulator layers 5A and 5B are formed on the surface of the insulator layer 4, and a coil conductor 6 is formed from a conductive material such as Cu or Al. Ti or TiN, for example, is formed to a thickness of 10 nm to 100 nm on the top and bottom surfaces of these coil conductors 6. The formation of this Ti or TiN film improves adhesion to the resin layer.

[0024] (4) Chip component side mounting electrodes 7A, 7B are formed on the surface of the surface insulator layer 5B using solder or the like. The main part of the chip component 101 is formed by the steps up to (4). Note that the pattern of the connection between the chip component side mounting electrodes 7A, 7B and the coil conductor 6 is not shown in (4) in Figure 2 and the subsequent Figures up to Figure 4. Specific examples of the planar shape of the coil conductor 6, interlayer connections, and connection structures with the chip component side mounting electrodes 7A, 7B will be shown later.

[0025] (5) The chip component side mounting electrodes 7A and 7B of the chip component 101 are connected to the circuit board side electrodes 21A and 21B formed on the circuit board 201, respectively. That is, the chip component 101 is mounted on the mounting surface MS of the circuit board 201. For example, the chip component 101 is mounted in a position where the chip component side mounting electrodes 7A and 7B face the circuit board side electrodes 21A and 21B, and soldered by heating. Note that the chip component side mounting electrodes of the chip component 101 may be simple electrodes, and solder paste may be applied to the circuit board side electrodes 21A and 21B formed on the circuit board 201, and the chip component side mounting electrodes 7A and 7B may be mounted and soldered by heating.

[0026] (6) The mounting surface MS of the chip component 101 on the circuit board 201 is covered with the coating resin 10. The coating height of this coating resin 10 is higher than the upper surface of the chip component 101.

[0027] (7) As shown in (6) in Figure 3, the coating resin 10, element substrate 1, and insulator layer 4 are ground to a depth that will later become the chip surface CS. This removes part of the element substrate 1 and insulator layer 4 of the chip component 101. In this way, the exposed insulator portion 4S can be defined as the exposed portion of the insulator layer 4 embedded in the element substrate 1.

[0028] As will be described in detail later, this grinding process forms a continuous surface (ground surface) without any angular steps on the surfaces of the insulator layer 4, element substrate 1, and coating resin 10. This "continuous surface" means a "flat surface," "almost flat surface," "flat, continuous surface," etc. Furthermore, in the case of projections of various angles, such as acute-angled projections and obtuse-angled projections, the "continuous surface" refers to a surface in which the proportion of acute-angled projections is smaller than the proportion of obtuse-angled projections. The above-mentioned steps will be described in detail later. This grinding process exposes the insulator layer 4, forming an exposed insulator portion 4S. As a result, at least a portion of the coil opening defined by the coil conductor 6 is positioned within the exposed insulator portion 4S.

[0029] As described above, grinding the coating resin 10, the element substrate 1, and the insulator layer 4 to a depth that corresponds to the chip surface CS can expose the insulator layer 4 and form the exposed insulator portion 4S. However, it is also possible to utilize the fact that the exposed insulator portion 4S, where the element substrate is not present, tapers from the coil conductor 6 toward the element substrate 1. That is, as shown in (3) in FIG. 2 to (7) in FIG. 3, the area of ​​the exposed insulator portion 4S on the second main surface of the element substrate 1 is smaller than the area on the first main surface of the element substrate 1, i.e., the tapered shape, so that the exposed area of ​​the insulator layer 4 changes depending on the amount of grinding of the chip component 101, as shown in (6) and (7) in FIG. 3. Therefore, the amount of grinding of the coating resin 10 and the chip component 101 can be easily determined so that this exposed area is appropriate.

[0030] 4 is a diagram showing a coil conductor 6 that generates or receives a magnetic flux φ component in a direction perpendicular to the insulator exposed portion 4S and the insulator layers 5A and 5B. The area of ​​the element substrate 1 of the chip component 101 is small and the element substrate 1 is located outside the coil opening, so the magnetic flux φ is hardly blocked by the element substrate 1 of the chip component 101. In addition, the coating resin 10 is not magnetic. The circuit board 201 is also not magnetic, or contains almost no magnetic material. This makes it possible to suppress loss due to eddy currents.

[0031] FIG. 5 is a diagram showing the relative positions and shapes of the surface of the element substrate 1, the surface of the insulator exposed portion 4S, and the surface of the coating resin 10. As shown in FIG. 5, the element substrate 1 is a Si substrate or the like, which is harder than the insulating resin. Therefore, as shown by (6) and (7) in FIG. 3, when the coating resin 10, element substrate 1, and insulator layer 4 are simultaneously ground to a depth that becomes the chip surface CS, the element substrate 1 protrudes from the coating resin 10 and the insulator exposed portion 4S. However, because the element substrate 1, the insulator exposed portion 4S, and the coating resin 10 are integrated, the surface of the element substrate 1, the surface of the insulator exposed portion 4S, and the surface of the coating resin 10 form a continuous surface without sharp steps such as sharp edges or recesses. As already described, this "continuous surface" means, for example, a "flat surface," a "substantially flat surface," or a "flat, continuous surface." In other words, even if the element substrate 1 protrudes, this is equivalent to "the surface of the element substrate 1, the surface of the insulator exposed portion 4S, and the surface of the coating resin 10 forming a continuous surface." Furthermore, since grinding is performed on a surface, if the element substrate 1 protrudes significantly, only the element substrate 1 is ground, and therefore, when viewed as a whole electronic circuit device, it forms an almost flat continuous surface.

[0032] According to this embodiment, the element substrate 1 is mounted on the circuit board while retaining a sufficient thickness, and the chip components and circuit board are fixed with a coating resin. After that, unnecessary Si substrate portions are removed, thereby achieving both the mounting of chip components, ensuring mechanical strength when coated with the coating resin, and improving electrical characteristics by suppressing eddy currents, and further realizing a thinner overall circuit device.

[0033] Second Embodiment In the second embodiment, a chip component and an electronic circuit device are exemplified, in which an insulator forming portion is formed inside an element substrate and has an insulator exposed portion where the insulator forming portion is exposed from inside the element substrate.

[0034] The upper part of FIG. 6 is a plan view of an electronic circuit device 302 according to the second embodiment, and the lower part of FIG. 6 is a vertical cross-sectional view taken along the dashed line in the plan view.

[0035] The electronic circuit device 302 includes a chip component 102 , a circuit board 201 , and a coating resin 10 .

[0036] The chip component 102 includes an element substrate 1, a passivation film 3, insulating layers 4, 5A, and 5B, a coil conductor 6, and chip component side mounting electrodes 7A and 7B.

[0037] The in-groove insulator 32 is exposed on the surface of the element substrate 1. The coil conductor 6 is formed on the insulator layer 4 and the insulator layer 5A, and generates or receives magnetic flux components in a direction perpendicular to the insulator layer 4 (the up and down direction in FIG. 1 ). The coil conductor 6 is formed in the stacking direction of the insulator layers 4, 5A, and 5B, and forms a spiral or helical coil circuit.

[0038] The circuit board 201 is provided with circuit board electrodes 21A and 21B to which the chip component mounting electrodes 7A and 7B of the chip component 102 are connected.

[0039] The circuit board side electrodes 21A and 21B of the circuit board 201 are connected to the chip component side mounting electrodes 7A and 7B.

[0040] The mounting surface of the circuit board 201 on which the chip components 102 are mounted is covered with a coating resin 10 .

[0041] In this way, the in-groove insulators 32 are distributed on the element substrate 1, and the in-groove insulators 32 spread across the element substrate 1. Therefore, the area of ​​the element substrate 1 for the chip component 102 is small. Also, the current loop of the eddy current that tries to flow through the element substrate 1 is small. Therefore, loss due to eddy current can be suppressed.

[0042] Fig. 7 is a cross-sectional view of the chip component 102 before it is mounted on the circuit board 201 shown in Fig. 6. Inside the element substrate 1, such as a Si substrate, a groove (trench) 30 is formed from the surface of the element substrate 1, an in-groove insulator 31 made of an inorganic oxide film such as SiO2 is formed on the inner surface of this groove, and an in-groove insulator 32 made of polysilicon or the like is formed inside the groove.

[0043] A passivation film 3 is formed on the upper surface of the element substrate 1, and insulator layers 4, 5A, and 5B are formed on top of the passivation film 3. Coil conductors 6 are formed on the upper surfaces of the insulator layers 4 and 5A. Chip component-side mounting electrodes 7A and 7B are formed on the upper surface of the insulator layer 5B.

[0044] 8 is a cross-sectional view showing a manufacturing method of an electronic circuit device 302 according to the second embodiment. First, the chip component mounting electrodes 7A and 7B of the chip component 102 are connected to the circuit board electrodes 21A and 21B formed on the circuit board 201. That is, the chip component 102 is mounted on the mounting surface MS of the circuit board 201. For example, the chip component 102 is mounted in a position where the chip component mounting electrodes 7A and 7B face the circuit board electrodes 21A and 21B, and then soldered by heating. Alternatively, the chip component mounting electrodes of the chip component 102 may be simple electrodes, and solder paste may be applied to the circuit board electrodes 21A and 21B formed on the circuit board 201, and the chip component mounting electrodes 7A and 7B may be mounted and soldered by heating.

[0045] Next, the mounting surface MS of the chip component on the circuit board 201 is covered with the coating resin 10. The coating height of this coating resin 10 is higher than the top surface of the chip component 102.

[0046] 8, the coating resin 10, element substrate 1, and groove 30 are ground to a depth that will later become the chip surface CS. This removes portions of the element substrate 1 and in-groove insulators 31 and 32 of the chip component 102. This forms a continuous surface (ground surface) without angular steps on the surfaces of the in-groove insulators 31 and 32, element substrate 1, and coating resin 10. Grinding the coating resin 10 exposes the in-groove insulators 31 and 32, forming exposed portions of the in-groove insulators 31 and 32. This positions at least a portion of the coil opening formed by the coil conductor 6 within the formation region of the exposed insulator portion when viewed in the stacking direction of the element substrate 1 and insulator layers 4, 5A, and 5B.

[0047] 6 to 8, the patterns of the connection portions between the chip component side mounting electrodes 7A, 7B and the coil conductor 6 are omitted from the illustration.

[0048] FIG. 9 is a plan view showing a shape of the in-groove insulators 32 different from the example shown in FIG. 6 . In the chip component shown in FIG. 9 ( a ), multiple in-groove insulators 32 extending horizontally are formed on the element substrate 1. In the chip component shown in FIG. 9 ( b ), multiple in-groove insulators 32 extending vertically are formed on the element substrate 1. Even with these patterns of in-groove insulators 32, the area of ​​the element substrate 1 is small, and the current loop of eddy currents attempting to flow through the element substrate 1 is small. In the component shown in FIG. 9 ( c ), the in-groove insulators 32 are formed in a vertical lattice pattern on the element substrate 1. In this way, by closing the eddy current path flowing through the element substrate 1 with the in-groove insulators 32, the current loop of eddy currents attempting to flow through the element substrate 1 is effectively small. In the component shown in FIG. 9 ( d ), the in-groove insulators 32 are formed on the element substrate 1, each having multiple portions extending vertically and portions connecting them horizontally. Even with this shape, the current loop of eddy currents attempting to flow through the element substrate 1 is effectively small.

[0049] According to this embodiment, the grinding speed of SiO2 is slower than that of Si, so even if grinding is performed at high speed from the start of grinding until the trench is formed, the grinding speed slows down once the trench is reached. Therefore, while the time required for manufacturing can be shortened by high-speed processing, the amount of grinding can be controlled with high precision once the trench is reached.

[0050] Third Embodiment In a third embodiment, an electronic circuit device in which chip components are sealed will be exemplified.

[0051] 10 is a cross-sectional view of an electronic circuit device 303 according to the third embodiment. In this electronic circuit device 303, chip components 101 are mounted on a circuit board 201, the mounting surface of the circuit board 201 on which the chip components 101 are mounted is covered with a coating resin 10, and the upper surfaces of the chip components 101 and the coating resin 10 are covered with a protective resin jacket 11.

[0052] This electronic circuit device 303 has a structure in which the upper surface of the electronic circuit device 301 shown in FIG. 1 is further covered with an outer protective resin 11.

[0053] As shown in this embodiment, the chip component 101 mounted on the circuit board 201 may be covered with a coating resin 10 and an outer protective resin jacket 11. This improves the external environment of the chip component 101 while maintaining the thinness and flatness of the electronic circuit device 303.

[0054] Fourth Embodiment In a fourth embodiment, a shape of a coating resin and a method of forming the same that are different from those of the embodiments described so far will be exemplified.

[0055] 11 are numbers indicating the steps of the process. The steps will be explained in numerical order below.

[0056] (1) The chip component side mounting electrodes 7A and 7B of the chip component 101 are connected to the circuit board side electrodes 21A and 21B formed on the circuit board 201. That is, the chip component 101 is mounted on the mounting surface MS of the circuit board 201.

[0057] (2) The mounting surface MS of the chip component 101 on the circuit board 201 is covered with the coating resin 10. The planar coverage area of ​​the coating resin 10 is large enough to cover the chip component 101. The height of the coating resin 10 is higher than the top surface of the chip component 101.

[0058] 11 (2), the coating resin 10, the element substrate 1, and the insulating layer 4 are ground to a depth that will later become the chip surface CS. As a result, a portion of the element substrate 1 and the insulating layer 4 of the chip component 101 are removed.

[0059] (4) The mounting surface of the circuit board 201 on which the chip component 101 is mounted is covered with the protective resin 11 .

[0060] Fifth Embodiment In a fifth embodiment, an electronic circuit device will be illustrated in which circuit elements other than coil conductors are formed at positions where element substrates exist when viewed in the stacking direction of element substrates and insulating layers.

[0061] 12A to 12C are cross-sectional views showing a method for manufacturing an electronic circuit device according to the fifth embodiment. Numbers (1) to (12) shown in Figs. 12A to 12C are numbers indicating the steps of the process. Hereinafter, the process contents will be explained in numerical order.

[0062] (1) An element substrate 1 such as a Si substrate is placed in a manufacturing device.

[0063] (2) An oxide film 2 such as SiO2 is formed on the surface of the element substrate 1.

[0064] (3) A capacitor electrode 41 is formed on the surface of the oxide film 2 and shaped into a predetermined pattern. A dielectric layer 40 is formed on the upper surface of the capacitor electrode 41 and shaped into a predetermined pattern. A capacitor electrode 42 is formed on the upper surface of the dielectric layer 40 and shaped into a predetermined pattern. A capacitor is formed by the dielectric layer 40 and the capacitor electrodes 41 and 42.

[0065] (4) A passivation film 3 is formed over the entire area including the capacitor by CVD or the like.

[0066] (5) A recess R having a predetermined depth is formed from the surface of the passivation film 3 to the element substrate 1 by, for example, dry etching or sandblasting.

[0067] (6) Holes (vias) V reaching the capacitor electrodes 41 and 42 are formed by, for example, trial etching. Note that the recesses shown in (5) may be formed after these holes V are formed.

[0068] (7) An insulating layer 4 is formed from the bottom surface of the recess R to a position at a predetermined height above the passivation film 3. This insulating layer 4 is an organic insulating film for leveling purposes that flattens the surface, and is, for example, a photosensitive organic film such as epoxy resin, polyimide-polybenzoxazole (PBO), or polyimide (PI).

[0069] (8) A first layer of the conductor or coil conductor 6 is formed, which is connected to the hole (via) V reaching the capacitor electrodes 41, 42. For example, a Cu film is formed to a thickness of 1 μm or more, and then Ti or TiN is formed on the surface to a thickness of 10 nm to 100 nm. An adhesive layer may also be formed between the Cu film or Al film and the insulator layer 4. The coil conductor 6 is formed by SAP (Semi-Additive Plating), lift-off, wet etching, or the like.

[0070] (9) An insulating layer 5A such as an organic insulating film is formed over the entire area above the first layer of the conductors that are electrically connected to the capacitor electrodes 41 and 42 and the coil conductor 6, and a hole (via) V that is electrically connected to the capacitor electrode 41 is formed.

[0071] (10) The second layer of the conductors that are electrically connected to the capacitor electrodes 41 and 42 and the coil conductor 6 is formed in the same manner as the first layer. Figure 16 is a plan view of this state.

[0072] (11) An insulating layer 5B such as an organic insulating film is formed over the entire upper area of ​​the second layer of the conductors that are conductive to the capacitor electrodes 41, 42 and the coil conductor 6, and a hole (via) V is formed to provide electrical conductivity to the chip component side mounting electrode.

[0073] (12) Chip component side mounting electrodes 7A, 7B made of solder or the like are formed in the holes (vias), and each chip is separated from the wafer.

[0074] Thereafter, the chip component 105 is mounted on a circuit board, and the insulating layer 4 is left open with no element substrate 1 present, for example, in the same manner as in the process shown in FIG.

[0075] 17 is a circuit diagram of an electronic circuit device 305 of this embodiment configured in a predetermined position on a circuit board. In this example, the circuit has an inductor L and a capacitor C connected at their ends. This chip component 105 can be used as an element in which the inductor L and the capacitor C are connected in series or in parallel.

[0076] Finally, the present invention is not limited to the above-described embodiments. Those skilled in the art can make appropriate modifications and variations. The scope of the present invention is defined not by the above-described embodiments but by the claims. Furthermore, the scope of the present invention includes modifications and variations from the embodiments within the scope of the claims and their equivalents.

[0077] For example, in each embodiment, the covering height of the coating resin 10 relative to the circuit board 201 is higher than the height of the chip components, but the covering height of the coating resin 10 relative to the circuit board 201 may be substantially the same height as the upper surface of the chip components. Even in this case, when the element substrate 1 of the chip components is ground to expose the insulator layer while the chip components are mounted on the circuit board 201, stress on the chip components can be suppressed.

[0078] Furthermore, in the above explanation, the coil conductor 6 generates magnetic flux, and we have described the generation of eddy currents due to that magnetic flux. However, when the coil formed by the coil conductor receives magnetic flux components perpendicular to the insulator layer, the generation of eddy currents due to that magnetic flux can be similarly suppressed.

[0079] In addition, in the first embodiment, an example was shown in which the entire coil opening is located within the area formed by the insulator exposed portion 4S when viewed in the stacking direction of the element substrate 1 and the insulator layers 5A and 5B, but the effect of suppressing eddy currents by the Si substrate is achieved even if at least a portion of the coil opening formed by the coil conductor is located within the insulator exposed area when viewed in the above stacking direction.

[0080] In addition, in the second embodiment, an example was shown in which the entire coil opening is located within the formation area of ​​the insulator exposed portion when viewed in the stacking direction of the element substrate 1 and the insulator layers 5A and 5B, but even if at least a portion of the coil opening made by the coil conductor is located within the formation area of ​​the insulator exposed portion when viewed in the above stacking direction, the effect of suppressing eddy currents by the Si substrate is achieved.

[0081] Although the vicinity of a single chip component is illustrated in FIGS. 3, 6, 8, 11, etc., it is also possible to mount a plurality of chip components on a circuit board and grind these chip components simultaneously.

[0082] In addition, in the fifth embodiment, a capacitor is shown as an example of a circuit element other than a coil conductor at the position where the element substrate 1 is present when viewed in the stacking direction of the element substrate 1 and the insulator layer, but other elements may also be formed.

[0083] Furthermore, a diode, a transistor, or a MOS capacitor may be formed using a part of the element substrate 1 as a circuit element other than the coil conductor.

[0084] The electronic circuit device and the method for manufacturing the same of the present invention may be provided in the following aspects.

[0085] <1> A chip component, a circuit board, and a coating resin, wherein the chip component comprises: an element substrate having a first main surface and a second main surface that are opposed to each other; an insulator layer formed on the first main surface side of the element substrate; a coil conductor formed inside the insulator layer, the coil conductor generating or receiving a magnetic flux having a component perpendicular to the first main surface of the element substrate; and a chip component-side mounting electrode formed on the first main surface side, connecting the coil conductor or a circuit including the coil conductor to the circuit board; the circuit board has circuit board-side electrodes to which the chip component-side mounting electrodes are connected, the chip component-side mounting electrodes are connected to the circuit board-side electrodes; the coating resin is formed to cover the mounting surface of the circuit board on which the chip component is mounted, and has an insulator exposed portion where the insulator layer surrounded by the element substrate is exposed; and a surface including the second main surface of the element substrate, the insulator exposed portion, and the coating resin form a continuous surface, an opening for the coil conductor, the opening being at least partially located within a region where the exposed insulator portion is formed, when viewed in a direction perpendicular to the second main surface of the element substrate;

[0086] <2> The electronic circuit device according to <1>, wherein the insulator exposed portion has an area of ​​the second main surface that is smaller than an area of ​​the first main surface of the element substrate.

[0087] <3> The electronic circuit device according to <1> or <2>, wherein a circuit element other than the coil conductor is formed at a position where the element substrate is present when viewed in a direction perpendicular to the second main surface.

[0088] <4> The electronic circuit device according to any one of <1> to <3>, wherein the element substrate is a semiconductor substrate.

[0089] <5> The electronic circuit device according to any one of <1> to <4>, wherein the surface of the circuit board on which the chip components are mounted is covered with a protective resin.

[0090] <6> A method for manufacturing an electronic circuit device, comprising: forming a recess or an opening on a side of the first main surface of an element substrate, the element substrate having first and second main surfaces that are opposite to each other; forming an insulator inside the recess or the opening; forming an insulator layer on the side of the first main surface of the element substrate; forming a coil conductor in the insulator layer that generates or receives magnetic flux having a component perpendicular to the insulator layer; and forming chip component-side mounting electrodes on a circuit board that connect the coil conductor or a circuit including the coil conductor; forming circuit board-side electrodes on the circuit board to which the chip component-side mounting electrodes are connected; connecting the chip component-side mounting electrodes to the circuit board-side electrodes; covering a mounting surface of the chip component on the circuit board with a coating resin; and grinding the element substrate and the insulator layer from the second main surface side until the insulator inside the recess or the opening is exposed from the element substrate, thereby forming a continuous surface on a surface including the second main surface of the element substrate, the insulator inside the recess or the opening, and the coating resin.

[0091] DESCRIPTION OF THE REFERENCE NUMERALS C...capacitor CS...chip surface L...inductor MS...mounting surface R...recess V...hole 1...element substrate 2...oxide film 3...passivation film 4, 5A, 5B...insulator layer 4S...exposed insulator portion 5A, 5B...insulator layer 6...coil conductor 7A, 7B...chip component side mounting electrode 10...coating resin 11...external protective resin 21A, 21B...circuit board side electrode 30...groove 31, 32...in-groove insulator 40...dielectric layer 41, 42...capacitor electrode 101, 102...chip component 201...circuit board 301, 302, 303, 304, 305...electronic circuit device

Claims

1. The device includes a chip component, a circuit board, and a coating resin, The chip component is an element substrate having a first main surface and a second main surface in an opposing relationship; an insulating layer formed on the first main surface side of the element substrate; a coil conductor formed inside the insulator layer, the coil conductor generating or receiving a magnetic flux having a component perpendicular to the first main surface of the element substrate; a chip component side mounting electrode formed on the first main surface side and connecting the coil conductor or a circuit including the coil conductor to the circuit board; and the circuit board has circuit-board-side electrodes to which the chip component-side mounting electrodes are connected, the chip component mounting electrodes are connected to the circuit board electrodes, the coating resin is formed to cover the mounting surface of the circuit board on which the chip component is mounted, an insulator exposed portion where the insulator layer surrounded by the element substrate is exposed; the second main surface of the element substrate, the insulator exposed portion, and the surface including the coating resin form a continuous surface; at least a part of the coil opening defined by the coil conductor is within a region where the insulator exposed portion is formed when viewed in a direction perpendicular to the second main surface of the element substrate; Electronic circuit equipment.

2. the insulator exposed portion has an area of ​​the second main surface that is smaller than an area of ​​the first main surface of the element substrate; The electronic circuit device according to claim 1 .

3. a circuit element other than the coil conductor is formed at a position where the element substrate is present when viewed in a direction perpendicular to the second main surface; The electronic circuit device according to claim 1 .

4. the element substrate is a semiconductor substrate; The electronic circuit device according to claim 1 .

5. the surface of the circuit board on which the chip components are mounted is covered with a protective resin coating; The electronic circuit device according to claim 1 .

6. a chip component is constructed by forming a recess or an opening on the first main surface side of an element substrate having a first main surface and a second main surface that are opposite to each other, forming an insulator inside the recess or the opening, forming an insulator layer on the first main surface side of the element substrate, forming a coil conductor in the insulator layer that generates or receives magnetic flux having a component perpendicular to the insulator layer, and forming a chip component-side mounting electrode on a circuit board that connects the coil conductor or a circuit including the coil conductor, forming circuit board-side electrodes on the circuit board to which the chip component-side mounting electrodes are connected; the chip component side mounting electrodes are connected to the circuit board side electrodes; a coating resin is applied to the mounting surface of the chip component on the circuit board; the element substrate and the insulator layer are ground from the second main surface side until the insulator inside the recess or the opening is exposed from the element substrate, thereby forming a continuous surface on a surface including the second main surface of the element substrate, the insulator inside the recess or the opening, and the coating resin. A method for manufacturing an electronic circuit device.