Semiconductor device and method for manufacturing semiconductor device

Abstract

The present invention provides a semiconductor device comprising: a transistor part; a current sensing part for detecting a current flowing in the transistor part; a gate pad provided above a semiconductor substrate; and a resistance adjustment part that is electrically connected to the gate pad and that adjusts the gate resistance of the transistor part and the current sensing part. The resistance adjustment part includes a main adjustment part that is electrically connected to a gate conductive part of the transistor part, and a sense adjustment part that is electrically connected to the gate conductive part of the current sensing part. Each of the main adjustment part and the sense adjustment part includes a diode element part having a plurality of diodes provided in reverse parallel, and a resistance part connected to the diode element part.

Description

Semiconductor device and method for manufacturing the same

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] Patent Document 1 discloses a semiconductor device "including a main IGBT cell and a sense IGBT cell connected in parallel with each other." [Prior art documents] [Patent documents] [Patent document 1] JP 2019-149558 A [Patent document 2] JP 5591213 A [Patent document 3] JP 6102394 A Problem to be solved

[0003] Gate oscillation within a semiconductor device is suppressed. General disclosure

[0004] A first aspect of the present invention provides a semiconductor device including a transistor section, a current sense section for detecting a current flowing through the transistor section, a gate pad provided above a semiconductor substrate, and a resistance adjustment section electrically connected to the gate pad and for adjusting gate resistances of the transistor section and the current sense section. The resistance adjustment section may include a main adjustment section electrically connected to a gate conductive section of the transistor section, and a sense adjustment section electrically connected to the gate conductive section of the current sense section. Each of the main adjustment section and the sense adjustment section may include a diode element section having a plurality of diodes provided in anti-parallel, and a resistor section connected to the diode element section.

[0005] In the semiconductor device, the resistance section may have a resistance value such that the transistor section turns on before the current sense section and turns off later than the current sense section.

[0006] In any of the above semiconductor devices, the main adjustment section may include a main ON-side diode having an anode electrically connected to the gate pad and a cathode electrically connected to the gate conductive section of the transistor section. The main adjustment section may include a main OFF-side diode having an anode electrically connected to the gate conductive section of the transistor section and a cathode electrically connected to the gate pad. The main adjustment section may include a main OFF-side resistor electrically connected between the anode of the main OFF-side diode and the gate conductive section of the transistor section.

[0007] In any of the above semiconductor devices, the sense adjustment section may include a sense on-side diode having an anode electrically connected to the gate pad and a cathode electrically connected to the gate conductive section of the current sense section. The sense adjustment section may include a sense off-side diode having an anode electrically connected to the gate conductive section of the current sense section and a cathode electrically connected to the gate pad. The sense adjustment section may include a sense on-side resistor electrically connected between the cathode of the sense on-side diode and the gate conductive section of the current sense section.

[0008] In any of the above semiconductor devices, in the resistance adjustment section, the diode element section may be provided above the resistance section.

[0009] In any of the above semiconductor devices, the main adjustment section may include a main ON-side diode having an anode electrically connected to the gate pad and a cathode electrically connected to the gate conductive section of the transistor section. The main adjustment section may include a main OFF-side diode having an anode electrically connected to the gate conductive section of the transistor section and a cathode electrically connected to the gate pad. The main adjustment section may include a main ON-side resistor electrically connected between the cathode of the main ON-side diode and the gate conductive section of the transistor section. The main adjustment section may include a main OFF-side resistor electrically connected between the anode of the main OFF-side diode and the gate conductive section of the transistor section.

[0010] In any of the above semiconductor devices, the sense adjustment section may include a sense on-side diode having an anode electrically connected to the gate pad and a cathode electrically connected to the gate conductive section of the current sense section. The sense adjustment section may include a sense off-side diode having an anode electrically connected to the gate conductive section of the current sense section and a cathode electrically connected to the gate pad. The sense adjustment section may include a sense on-side resistor electrically connected between the cathode of the sense on-side diode and the gate conductive section of the current sense section. The sense adjustment section may include a sense off-side resistor electrically connected between the anode of the sense off-side diode and the gate conductive section of the current sense section.

[0011] Any of the above semiconductor devices may include a first insulating portion provided above the semiconductor substrate. Any of the above semiconductor devices may include a second insulating portion provided above the first insulating portion. Any of the above semiconductor devices may include an interlayer insulating film provided above the first insulating portion and the second insulating portion. Any of the above semiconductor devices may include a front surface side metal layer provided on the interlayer insulating film. The resistor portion may be provided on the first insulating portion. The diode element portion may be provided above the resistor portion with the second insulating portion sandwiched therebetween.

[0012] Any of the above semiconductor devices may include a first contact portion extending from the upper end of the interlayer insulating film, through the diode element portion, the second insulating portion, and the resistance portion, to the upper end of the first insulating portion, for connecting the front surface side metal layer and the diode element portion.

[0013] Any of the above semiconductor devices may include a third insulating portion provided around the first contact portion for electrically isolating the first contact portion from the resistor portion.

[0014] Any of the above semiconductor devices may include a second contact portion extending from the upper end of the interlayer insulating film, through the diode element portion, the second insulating portion, and the resistor portion, to the upper end of the first insulating portion, for connecting the front surface side metal layer and the resistor portion.

[0015] In any one of the semiconductor devices described above, the resistance adjustment portion may have a resistance adjustment trench portion extending in a predetermined direction in the semiconductor substrate. In any one of the semiconductor devices described above, the resistance portion may be provided in the resistance adjustment trench portion.

[0016] In any of the above semiconductor devices, the diode element portion and the resistor portion may be in direct contact with each other via a contact hole provided in the second insulating portion.

[0017] In any of the above semiconductor devices, the resistance adjustment portion may include a resistance adjustment trench portion extending in a predetermined direction in the semiconductor substrate, a first polysilicon layer provided inside the resistance adjustment trench portion, and a second polysilicon layer provided in direct contact with the first polysilicon layer.

[0018] In any of the above semiconductor devices, the resistance adjustment portion may have a resistance adjustment trench portion extending in a predetermined direction in the semiconductor substrate. In any of the above semiconductor devices, the diode element portion may have a cathode region and an anode region. In any of the above semiconductor devices, the resistance adjustment trench portion may be provided with at least one of the cathode region and the anode region.

[0019] In any of the above semiconductor devices, the resistance portion may be thinner than the diode element portion.

[0020] In a second aspect of the present invention, there is provided a method for manufacturing a semiconductor device including a transistor portion and a current sense portion, the method comprising the steps of: providing a gate pad above a semiconductor substrate; and providing a resistance adjustment portion electrically connected to the gate pad and configured to adjust gate resistances of the transistor portion and the current sense portion. The step of providing the resistance adjustment portion may include the steps of forming a main adjustment portion electrically connected to a gate conductive portion of the transistor portion, and forming a sense adjustment portion electrically connected to the gate conductive portion of the current sense portion. Each of the main adjustment portion and the sense adjustment portion may include a diode element portion having a plurality of diodes arranged in anti-parallel, and a resistor portion connected to the diode element portion.

[0021] The above-described method for manufacturing a semiconductor device may include the steps of: forming a first insulating portion above the semiconductor substrate; forming a first polysilicon layer for forming the resistor portion on the first insulating portion; forming a second insulating portion on the first polysilicon layer; forming a second polysilicon layer for forming the diode element portion on the second insulating portion; forming an interlayer insulating film above the diode element portion and the resistor portion; forming a first opening for forming a first contact portion through the interlayer insulating film, the second polysilicon layer, and the second insulating portion; forming a second opening for forming a second contact portion through the interlayer insulating film, the second polysilicon layer, the second insulating portion, and the first polysilicon layer; forming the first contact portion in the first opening; and forming a second contact portion in the second opening.

[0022] In any of the above methods for manufacturing a semiconductor device, the first opening and the second opening may be formed by the same etching process, and the first contact portion and the second contact portion may be formed by the same contact formation process.

[0023] The above-described method for manufacturing a semiconductor device may include the steps of forming a first insulating portion above the semiconductor substrate, forming a first polysilicon layer on the first insulating portion for forming the resistor portion, forming a second insulating portion on the first polysilicon layer, forming a second polysilicon layer on the second insulating portion for forming the diode element portion, forming an interlayer insulating film above the diode element portion and the resistor portion, forming a first opening through the interlayer insulating film, the second polysilicon layer, and the second insulating portion for forming a first contact portion, and forming the first contact portion in the first opening.

[0024] Any of the above-described methods for manufacturing a semiconductor device may further include, before the step of forming the second insulating portion, forming a third opening in the first polysilicon layer and forming the third insulating portion in the third opening. The step of forming the first opening may include forming the first opening through the third insulating portion. The step of forming the first contact portion may include forming the first contact portion inside the third insulating portion.

[0025] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions.

[0026] 1A shows an example of a top view of the semiconductor device 100. 1B shows an example of an enlarged view of the top surface of the semiconductor device 100. 1C shows an example of an a-a' cross section in FIG. 1B. 1D shows an example of a circuit configuration of the semiconductor device 100. 1E shows a modified circuit configuration of the semiconductor device 100. 1F shows waveforms of a collector current Ic' and a sense current Ise' flowing in a semiconductor device of a comparative example. 1G shows waveforms of a collector current Ic and a sense current Ise flowing in the semiconductor device 100. 1G shows an example of an enlarged view of the top surface around the current sense pad 190 and the gate pad 150. 1G shows an example of a b-b' cross section in FIG. 4A. 1G shows an example of a c-c' cross section in FIG. 4A. 1G shows an example of a top view of a diode element section 61. 1G shows an example of a top view of a resistor section 62. 1G shows an example of a d-d' cross section in FIG. 4A. 1G shows an example of an ee' cross section in FIG. 4A. 1G shows an example of a manufacturing method of a semiconductor device 100 having a resistance adjustment section 60. 1G shows an example of a manufacturing method of a semiconductor device 100 having a resistance adjustment section 60. 1G shows a modified c-c' cross section in FIG. 4A. 4B shows a modified example of the cc' cross section in Fig. 4A, Fig. 4C shows a modified example of the cc' cross section in Fig. 4A, Fig. 4D shows an example of a top view of the resistance adjusting section 60.

[0027] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention as claimed. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0028] In this specification, one side of a semiconductor substrate in a direction parallel to the depth direction is referred to as the "front" or "top," and the other side is referred to as the "back" or "bottom." Of the two main surfaces of a substrate, layer, or other member, one is referred to as the top surface, and the other is referred to as the bottom surface. The directions of "front," "top," "back," and "bottom" are not limited to the direction of gravity or the directions when the semiconductor device is mounted.

[0029] In this specification, technical matters may be explained using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes merely identify the relative positions of components and do not limit a particular direction. For example, the Z-axis does not limit the height direction relative to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When the Z-axis direction is written without specifying positive or negative, it means a direction parallel to the +Z-axis and -Z-axis. In this specification, viewing from the +Z-axis direction may be referred to as a top view.

[0030] In this specification, when we say "same" or "equal," it may also include cases where there is an error due to manufacturing variations, etc. The error is, for example, within 10%.

[0031] In this specification, the conductivity type of a doped region doped with impurities is described as P-type or N-type. However, the conductivity types of each doped region may be opposite polarities. Furthermore, in this specification, P+ type or N+ type means a doping concentration higher than P-type or N-type, and P- type or N- type means a doping concentration lower than P-type or N-type.

[0032] In this specification, the doping concentration refers to the concentration of an impurity activated as a donor or an acceptor. In this specification, the difference in concentration between a donor and an acceptor may be referred to as the concentration of the larger donor or acceptor. This concentration difference can be measured by a voltage-capacitance measurement method (CV method). Alternatively, the carrier concentration measured by a spreading resistance measurement method (SR) may be referred to as the donor or acceptor concentration. Furthermore, when the donor or acceptor concentration distribution has a peak, the peak value may be referred to as the donor or acceptor concentration in that region. In cases where the donor or acceptor concentration in a region where a donor or acceptor is present is approximately uniform, the average value of the donor or acceptor concentration in that region may be referred to as the donor or acceptor concentration.

[0033] 1A shows an example of a top view of a semiconductor device 100. The semiconductor device 100 is a semiconductor chip including a transistor unit 70. The semiconductor device 100 includes a temperature sensing unit 180, and may be mounted on a module such as an IPM (Intelligent Power Module).

[0034] The transistor section 70 includes a transistor such as an insulated gate bipolar transistor (IGBT). The transistor section 70 may be another transistor such as a MOSFET. The semiconductor device 100 may be a reverse conducting IGBT (RC-IGBT) that includes a diode such as a free wheel diode (FWD) on the same chip.

[0035] The semiconductor substrate 10 may be a silicon substrate, a silicon carbide substrate, or a nitride semiconductor substrate such as gallium nitride. The semiconductor substrate 10 in this example is a silicon substrate. The semiconductor substrate 10 has an active portion 104 and a peripheral portion 106. Note that, in this specification, the term "top view" simply refers to a view from the top surface side of the semiconductor substrate 10. The semiconductor substrate 10 has a front surface 21 and a back surface 23, as described below.

[0036] The transistor portion 70 is a region obtained by projecting a collector region provided on the lower surface side of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The collector region has the second conductivity type. For example, the collector region is P+ type.

[0037] The transistor section 70 in this example has a trench section extending in the Y-axis direction, but the transistor section 70 may have a trench section extending in the X-axis direction.

[0038] The active portion 104 has a transistor portion 70. The active portion 104 is a region where a main current flows between the upper and lower surfaces of the semiconductor substrate 10 when the semiconductor device 100 is controlled to an on state. That is, the active portion 104 is a region where a current flows in the depth direction inside the semiconductor substrate 10, from the upper surface to the lower surface or from the lower surface to the upper surface of the semiconductor substrate 10. In this specification, the transistor portion 70 is referred to as an element portion or element region.

[0039] In addition, when viewed from above, the region sandwiched between the two element portions is also defined as the active portion 104. In this example, the active portion 104 also includes the region sandwiched between the element portions and where the gate metal wiring 152 is provided.

[0040] The gate metal wiring 152 is formed of a material containing metal. For example, the gate metal wiring 152 is formed of aluminum, an aluminum-silicon alloy, or an aluminum-silicon-copper alloy. The gate metal wiring 152 is electrically connected to the gate conductive portion of the transistor portion 70 and supplies a gate voltage to the transistor portion 70. The gate metal wiring 152 is provided so as to surround the outer periphery of the active portion 104 in a top view. The gate metal wiring 152 is electrically connected to a gate pad 150 provided in the outer periphery portion 106.

[0041] The thickness and width of the gate metal wiring 152 do not have to be uniform. The width of the gate metal wiring 152 may be formed so that it decreases as the distance from the gate pad 150 increases. The width of the gate metal wiring 152 may be formed so that, in a resistance adjustment section described below, the width of the gate metal wiring 152 from the gate pad 150 to the resistance adjustment section is larger than the width of the gate metal wiring 152 from the resistance adjustment section to the transistor section 70. By changing the thickness and width of the gate metal wiring 152, it is possible to finely adjust the gate resistance in the current path from the gate pad 150 to the transistor section 70.

[0042] The peripheral portion 106 is a region between the active portion 104 and the edge 102 of the semiconductor substrate 10 in a top view. The peripheral portion 106 is provided to surround the active portion 104 in a top view. One or more metal pads may be disposed in the peripheral portion 106 for connecting the semiconductor device 100 to an external device via wires or the like. The peripheral portion 106 may have an edge termination structure. The edge termination structure relieves electric field concentration on the top surface side of the semiconductor substrate 10. For example, the edge termination structure may have a guard ring, a field plate, a resurf structure, or a combination of these structures.

[0043] The front surface side metal layer 110 is provided above the semiconductor substrate 10. The front surface side metal layer 110 may include an emitter electrode 52, an anode pad 130, a cathode pad 140, a gate pad 150, and a current sense pad 190. The front surface side metal layer 110 may be connected to an electrode external to the semiconductor device 100 by wire bonding or the like. Note that the number and positions of the front surface side metal layers 110 are not limited to this example.

[0044] The gate pad 150 is provided above the semiconductor substrate 10. The gate pad 150 is electrically connected to the gate conductive portion of the transistor portion 70 via a gate metal wiring 152. The gate pad 150 is set to a gate potential. In this example, the gate pad 150 has a rectangular shape when viewed from above, but is not limited to this.

[0045] The current sense pad 190 is electrically connected to the current sense unit 90, which will be described later. The current sense pad 190 detects the current flowing through the current sense unit 90. In this example, the current sense pad 190 has a rectangular shape when viewed from above, but is not limited to this.

[0046] The anode pad 130 is electrically connected to the anode of the temperature sensing unit 180. The anode pad 130 is connected to the anode of the temperature sensing unit 180 by an anode wiring 132. The anode pad 130 in this example has a rectangular shape when viewed from above, but is not limited to this.

[0047] The cathode pad 140 is electrically connected to the cathode of the temperature sensing unit 180. The cathode pad 140 is connected to the cathode of the temperature sensing unit 180 by a cathode wiring 142. In this example, the cathode pad 140 has a rectangular shape when viewed from above, but is not limited to this.

[0048] The temperature sensing unit 180 is provided above the active unit 104. The temperature sensing unit 180 detects the temperature of the active unit 104. The temperature sensing unit 180 may include a diode formed of single-crystal or polycrystalline silicon. The temperature sensing unit 180 is used to detect the temperature of the semiconductor device 100 and protect the semiconductor chip from overheating. The temperature sensing unit 180 is connected to a constant current source. When the temperature of the semiconductor device 100 changes, the forward voltage of the current flowing through the temperature sensing unit 180 changes. The semiconductor device 100 can detect the temperature based on the change in the forward voltage. The temperature sensing unit 180 has a longitudinal direction in the Y-axis direction and a lateral direction in the X-axis direction, but is not limited to this.

[0049] The temperature sensing unit 180 in this example is provided near the center of the active unit 104 when viewed from above. The temperature sensing unit 180 is provided adjacent to the transistor unit 70. A collector region of the second conductivity type may be provided on the back surface side of the semiconductor substrate 10 on which the temperature sensing unit 180 is provided.

[0050] The anode wiring 132 and the cathode wiring 142 are provided above the active section 104 in a top view. The anode wiring 132 and the cathode wiring 142 extend from the temperature sensing section 180 to the outer periphery 106. In this example, the anode wiring 132 and the cathode wiring 142 extend from the temperature sensing section 180 in the Y-axis direction. The anode wiring 132 and the cathode wiring 142 may be made of the same material as the front surface side metal layer 110.

[0051] 1B shows an example of an enlarged view of the top surface of the semiconductor device 100. In this example, an enlarged view of the end of the active portion 104 is shown.

[0052] The semiconductor device 100 of this example includes a gate trench portion 40, a dummy trench portion 30, an emitter region 12, a base region 14, a contact region 15, and a well region 17 on the front surface 21 of the semiconductor substrate 10. The semiconductor device 100 of this example also includes an emitter electrode 52 and a gate metal wiring 152 provided above the front surface 21 of the semiconductor substrate 10. The gate trench portion 40 is an example of a MOS gate structure included in the semiconductor device 100.

[0053] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the emitter region 12, the base region 14, the contact region 15, and the well region 17. The gate metal wiring 152 is provided above the connection portion 25 and the well region 17.

[0054] The emitter electrode 52 and the gate metal wiring 152 are formed of a material containing metal. At least a portion of the emitter electrode 52 may be formed of a metal such as aluminum (Al), or a metal alloy such as aluminum-silicon alloy (AlSi) or aluminum-silicon-copper alloy (AlSiCu). At least a portion of the gate metal wiring 152 may be formed of a metal such as aluminum (Al), or a metal alloy such as aluminum-silicon alloy (AlSi) or aluminum-silicon-copper alloy (AlSiCu). The emitter electrode 52 and the gate metal wiring 152 may have a barrier metal layer made of titanium or a titanium compound below the region made of aluminum or the like. The barrier metal layer will be described later. The emitter electrode 52 and the gate metal wiring 152 are provided separately from each other.

[0055] The emitter electrode 52 and the gate metal wiring 152 are provided above the semiconductor substrate 10 with an interlayer insulating film 38 sandwiched therebetween. The interlayer insulating film 38 is omitted in FIG. 1B. A contact hole 54, a contact hole 55, and a contact hole 56 are provided to penetrate the interlayer insulating film 38.

[0056] The contact holes 53 and 55 electrically connect the gate metal wiring 152 and the gate conductive portion in the transistor portion 70 via the connection portion 25. The contact hole 53 connects the gate conductive portion of the gate trench portion 40 and the connection portion 25. The inside of the contact hole 53 may be filled with the same material as the connection portion 25. The contact hole 55 connects the connection portion 25 and the gate metal wiring 152. A contact portion made of tungsten or the like may be formed inside the contact hole 55. The contact portion will be described later.

[0057] The contact hole 56 connects the emitter electrode 52 and the dummy conductive portion in the dummy trench portion 30. Inside the contact hole 56, a contact portion made of tungsten or the like may be formed.

[0058] The connection portion 25 is connected to the front surface side metal layer 110, such as the emitter electrode 52 or the gate metal wiring 152. In one example, the connection portion 25 is provided between the gate metal wiring 152 and the gate conductive portion. In this example, the connection portion 25 may extend in the X-axis direction and be electrically connected to the gate conductive portion. The connection portion 25 may also be provided between the emitter electrode 52 and the dummy conductive portion. In this example, the connection portion 25 is not provided between the emitter electrode 52 and the dummy conductive portion. The connection portion 25 is made of a conductive material such as polysilicon doped with impurities. In this example, the connection portion 25 is polysilicon (N+) doped with N-type impurities. The connection portion 25 may be a polysilicon layer formed in the same process as the first polysilicon layer 91 or the second polysilicon layer 92 described below. The connection portion 25 may be provided above the front surface 21 of the semiconductor substrate 10 via an insulating film such as an oxide film.

[0059] The gate trench portion 40 is an example of a plurality of trench portions extending in a predetermined extension direction on the front surface 21 side of the semiconductor substrate 10. The gate trench portions 40 are arranged at predetermined intervals along a predetermined arrangement direction (in this example, the X-axis direction). The gate trench portion 40 of this example may have two extension portions 41 extending along an extension direction (in this example, the Y-axis direction) that is parallel to the front surface 21 of the semiconductor substrate 10 and perpendicular to the arrangement direction, and a connection portion 43 that connects the two extension portions 41.

[0060] It is preferable that at least a portion of the connection portion 43 is formed in a curved shape. By connecting the ends of the two extension portions 41 of the gate trench portion 40, it is possible to alleviate electric field concentration at the ends of the extension portions 41. At the connection portion 43 of the gate trench portion 40, the gate metal wiring 152 may be electrically connected to the gate conductive portion via the connection portion 25.

[0061] The dummy trench portion 30 is an example of a plurality of trench portions extending in a predetermined extension direction on the front surface 21 side of the semiconductor substrate 10. The dummy trench portion 30 is a trench portion electrically connected to the emitter electrode 52. Like the gate trench portion 40, the dummy trench portions 30 are arranged at predetermined intervals along a predetermined arrangement direction (the X-axis direction in this example). The dummy trench portion 30 in this example has an I-shape on the front surface 21 of the semiconductor substrate 10, but like the gate trench portion 40, it may have a U-shape on the front surface 21 of the semiconductor substrate 10. That is, the dummy trench portion 30 may have two extension portions extending along the extension direction and a connection portion connecting the two extension portions.

[0062] The transistor section 70 of this example has a structure in which two gate trench sections 40 and two dummy trench sections 30 are repeatedly arranged. That is, the transistor section 70 of this example has gate trench sections 40 and dummy trench sections 30 in a 1:1 ratio. For example, the transistor section 70 has one dummy trench section 30 between two extension sections 41.

[0063] However, the ratio of the gate trench portions 40 to the dummy trench portions 30 is not limited to this example. The ratio of the gate trench portions 40 may be greater than the ratio of the dummy trench portions 30, or the ratio of the dummy trench portions 30 may be greater than the ratio of the gate trench portions 40. The ratio of the gate trench portions 40 to the dummy trench portions 30 may be 2:3 or 2:4. Furthermore, the transistor portion 70 may have all trench portions as gate trench portions 40 and may not have dummy trench portions 30.

[0064] The well region 17 is a second conductivity type region provided closer to the front surface 21 of the semiconductor substrate 10 than the drift region 18 described below. The well region 17 is an example of a well region provided on the peripheral side of the active portion 104. The well region 17 is, for example, P+ type. The well region 17 is formed within a predetermined range from the end of the active region on the side where the gate metal wiring 152 is provided. The diffusion depth of the well region 17 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. Part of the regions of the gate trench portion 40 and the dummy trench portion 30 on the gate metal wiring 152 side are formed in the well region 17. The bottoms of the ends of the gate trench portion 40 and the dummy trench portion 30 in the extension direction may be covered by the well region 17.

[0065] The contact holes 54 are formed above the emitter region 12 and the contact region 15 in the transistor section 70. The contact holes 54 are not provided above the well regions 17 provided at both ends in the Y-axis direction. In this manner, one or more contact holes 54 are formed in the interlayer insulating film. The one or more contact holes 54 may be provided extending in the extension direction.

[0066] The mesa portion 71 is a mesa portion provided adjacent to a trench portion in a plane parallel to the front surface 21 of the semiconductor substrate 10. The mesa portion is a portion of the semiconductor substrate 10 sandwiched between two adjacent trench portions, and may be a portion extending from the front surface 21 of the semiconductor substrate 10 to the deepest bottom of each trench portion. The extension portion of each trench portion may be considered as one trench portion. In other words, the region sandwiched between the two extension portions may be considered as a mesa portion.

[0067] The mesa portion 71 is provided in the transistor portion 70 adjacent to at least one of the dummy trench portion 30 or the gate trench portion 40. The mesa portion 71 has a well region 17, an emitter region 12, a base region 14, and a contact region 15 on the front surface 21 of the semiconductor substrate 10. In the mesa portion 71, the emitter regions 12 and the contact regions 15 are provided alternately in the extension direction.

[0068] The base region 14 is a region of a second conductivity type provided on the front surface 21 side of the semiconductor substrate 10. The base region 14 is, for example, a P-type. The base region 14 may be provided on the front surface 21 of the semiconductor substrate 10 at both ends of the mesa portion 71 in the Y-axis direction. Note that FIG. 1B shows only one end of the base region 14 in the Y-axis direction.

[0069] The emitter region 12 is a region of the first conductivity type having a higher doping concentration than the drift region 18. In this example, the emitter region 12 is, for example, N+ type. An example of a dopant for the emitter region 12 is arsenic (As). The emitter region 12 is provided on the front surface 21 of the mesa portion 71, in contact with the gate trench portion 40. The emitter region 12 may be provided extending in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The emitter region 12 is also provided below the contact hole 54.

[0070] The emitter region 12 may or may not be in contact with the dummy trench portion 30. In this example, the emitter region 12 is in contact with the dummy trench portion 30.

[0071] The contact region 15 is provided above the base region 14 and is a second conductivity type region having a higher doping concentration than the base region 14. In this example, the contact region 15 is P+ type, for example. The contact region 15 in this example is provided on the front surface 21 of the mesa portion 71. The contact region 15 may be provided in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The contact region 15 may or may not be in contact with the gate trench portion 40 or the dummy trench portion 30. The contact region 15 in this example is in contact with the dummy trench portion 30 and the gate trench portion 40. The contact region 15 is also provided below the contact hole 54.

[0072] 1C shows an example of the aa' cross section in FIG. 1B. The aa' cross section is an XZ plane passing through the emitter region 12 in the transistor section 70. In the aa' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The collector electrode 24 is an example of a back-side metal layer provided in contact with the back surface 23 of the semiconductor substrate 10. The emitter electrode 52 is formed above the semiconductor substrate 10 and the interlayer insulating film 38.

[0073] The drift region 18 is a region of a first conductivity type provided in the semiconductor substrate 10. In this example, the drift region 18 is, for example, an N-type. The drift region 18 may be a region remaining in the semiconductor substrate 10 without other doped regions being formed therein. That is, the doping concentration of the drift region 18 may be the same as the doping concentration of the semiconductor substrate 10.

[0074] The buffer region 20 is a region of a first conductivity type provided closer to the back surface 23 of the semiconductor substrate 10 than the drift region 18. In this example, the buffer region 20 is, for example, N-type. The doping concentration of the buffer region 20 is higher than the doping concentration of the drift region 18. The buffer region 20 may function as a field stop layer that prevents a depletion layer spreading from the lower surface side of the base region 14 from reaching the collector region 22 of the second conductivity type. Note that the buffer region 20 may be omitted.

[0075] The collector region 22 is provided below the buffer region 20 in the transistor section 70. The collector region 22 has the second conductivity type. In this example, the collector region 22 is, for example, a P+ type.

[0076] The collector electrode 24 is formed on the rear surface 23 of the semiconductor substrate 10. The collector electrode 24 is made of a conductive material such as a metal. The material of the collector electrode 24 may be the same as or different from the material of the emitter electrode 52.

[0077] The base region 14 is a region of the second conductivity type provided above the drift region 18. The base region 14 is provided in contact with the gate trench portion 40. The base region 14 may be provided in contact with the dummy trench portion 30.

[0078] The emitter region 12 is provided above the base region 14. The emitter region 12 is provided between the base region 14 and the front surface 21. The emitter region 12 is provided in contact with the gate trench portion 40. The emitter region 12 may or may not be in contact with the dummy trench portion 30.

[0079] The accumulation region 16 is a region of a first conductivity type that is provided closer to the front surface 21 of the semiconductor substrate 10 than the drift region 18. The accumulation region 16 in this example is, for example, an N+ type. However, the accumulation region 16 does not necessarily have to be provided.

[0080] The accumulation region 16 is provided in contact with the gate trench portion 40. The accumulation region 16 may or may not be in contact with the dummy trench portion 30. The doping concentration of the accumulation region 16 is higher than the doping concentration of the drift region 18. The dose of ion implantation into the accumulation region 16 is 1.0E+12 cm －２ Above, 1.0E+13cm －２ The ion implantation dose of the accumulation region 16 may be 3.0E+12 cm －２ Above, 6.0E + 12cm －２ By providing the accumulation region 16, the carrier injection enhancement effect (IE effect) can be enhanced, and the on-voltage of the transistor section 70 can be reduced.

[0081] One or more gate trench portions 40 and one or more dummy trench portions 30 are provided on the front surface 21. Each trench portion is provided from the front surface 21 to the drift region 18. In regions where at least one of the emitter region 12, the base region 14, the contact region 15, and the accumulation region 16 is provided, each trench portion also penetrates these regions to reach the drift region 18. The trench portion penetrating the doped region does not necessarily mean that the trench portion is formed in the order of forming the doped region and then the trench portion. The trench portion penetrating the doped region also includes a case where the doped region is formed between the trench portions after the trench portions are formed.

[0082] The gate trench portion 40 has a gate trench formed on the front surface 21, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is formed to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is formed inside the gate trench, further inward than the gate insulating film 42. The gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is made of a conductive material such as polysilicon. The gate trench portion 40 is covered on the front surface 21 with an interlayer insulating film 38.

[0083] The gate conductive portion 44 includes a region facing the adjacent base region 14 on the mesa portion 71 side across the gate insulating film 42 in the depth direction of the semiconductor substrate 10. When a predetermined voltage is applied to the gate conductive portion 44, a channel is formed by an electron inversion layer in the surface layer of the interface of the base region 14 that contacts the gate trench.

[0084] The dummy trench portion 30 may have the same structure as the gate trench portion 40. The dummy trench portion 30 has a dummy trench, a dummy insulating film 32, and a dummy conductive portion 34 formed on the front surface 21 side. The dummy insulating film 32 is formed to cover the inner wall of the dummy trench. The dummy conductive portion 34 is formed inside the dummy trench and further inward than the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy trench portion 30 may be covered on the front surface 21 with an interlayer insulating film 38.

[0085] The interlayer insulating film 38 is provided above the semiconductor substrate 10. In this example, the interlayer insulating film 38 is provided in contact with the front surface 21. An emitter electrode 52 is provided above the interlayer insulating film 38. One or more contact holes 54 are provided in the interlayer insulating film 38 to electrically connect the emitter electrode 52 to the semiconductor substrate 10. Contact holes 53, 55, and 56 may also be provided penetrating the interlayer insulating film 38. The thickness of the interlayer insulating film 38 may be 0.8 μm or more and 1.2 μm or less.

[0086] The interlayer insulating film 38 may be a silicon oxide film. The interlayer insulating film 38 may be a borophosphosilicate glass (BPSG) film, a borosilicate glass (BSG) film, or a phosphosilicate glass (PSG) film. The interlayer insulating film 38 may include a high temperature silicon oxide (HTO) film.

[0087] The back side lifetime control region 120 may be provided in the transistor portion 70. However, the back side lifetime control region 120 may be omitted. The back side lifetime control region 120 is a region in which a lifetime killer is intentionally formed by, for example, implanting impurities into the semiconductor substrate 10. In one example, the back side lifetime control region 120 is formed by implanting helium into the semiconductor substrate 10. The back side lifetime control region 120 may also be formed by implanting protons. By providing the back side lifetime control region 120, it is possible to reduce the turn-off time and suppress the tail current, thereby reducing losses during switching.

[0088] The lifetime killer is a carrier recombination center. The lifetime killer may be a lattice defect. For example, the lifetime killer may be a vacancy, a divacancy, a complex defect of these with an element constituting the semiconductor substrate 10, or a dislocation. The lifetime killer may also be a rare gas element such as helium or neon, or a metal element such as platinum. Electron beams or protons may be used to form the lattice defects.

[0089] The lifetime killer concentration is the concentration of carrier recombination centers. The lifetime killer concentration may be the concentration of lattice defects. For example, the lifetime killer concentration may be the concentration of vacancies such as vacancies and divacancies, the concentration of complex defects formed between these vacancies and elements constituting the semiconductor substrate 10, or the concentration of dislocations. The lifetime killer concentration may also be the chemical concentration of a rare gas element such as helium or neon, or the chemical concentration of a metal element such as platinum.

[0090] The back surface side lifetime control region 120 is provided closer to the back surface 23 than the center of the semiconductor substrate 10 in the depth direction of the semiconductor substrate 10. In this example, the back surface side lifetime control region 120 is provided in the buffer region 20. The back surface side lifetime control region 120 may be provided over the entire surface of the semiconductor substrate 10 in the XY plane by being formed without using a mask. The back surface side lifetime control region 120 may be provided over a part of the semiconductor substrate 10 in the XY plane by being formed using a mask. The dose of impurities for forming the back surface side lifetime control region 120 is 0.5E+10 cm －２ Above, 1.0E+14cm －２ Even if it is less than 5.0E+10cm －２ Above, 1.0E+13cm －２ It may be the following:

[0091] The back surface side lifetime control region 120 may be formed by implantation from the back surface 23 side. This makes it easier to avoid any influence on the front surface 21 side of the semiconductor device 100. For example, the back surface side lifetime control region 120 is formed by irradiating helium or protons from the back surface 23 side. Here, whether the back surface side lifetime control region 120 is formed by implantation from the front surface 21 side or the back surface 23 side can be determined by obtaining the state of the front surface 21 side by the SR method or by measuring leakage current.

[0092] 2A shows an example of the circuit configuration of the semiconductor device 100. The semiconductor device 100 of this example includes a resistance adjusting section 60. In the semiconductor device 100, a transistor section 70 and a current sensing section 90 are connected in parallel with each other.

[0093] The resistance adjusting section 60 is electrically connected to the gate pad 150 and adjusts the gate resistance of the transistor section 70 and the current sense section 90. The resistance adjusting section 60 has a main adjusting section 160 and a sense adjusting section 260.

[0094] The main adjustment unit 160 is electrically connected to the gate conductive portion 44 of the transistor unit 70. The sense adjustment unit 260 is electrically connected to the gate conductive portion 194 of the current sense unit 90. The gate conductive portion 194 will be described later. Each of the main adjustment unit 160 and the sense adjustment unit 260 includes a diode element portion 61 and a resistor portion 62.

[0095] The diode element section 61 has a plurality of diodes arranged in anti-parallel. By having a plurality of diodes arranged in anti-parallel, the diode element section 61 can set the gate wiring for turning on the gates of the transistor section 70 and the current sense section 90 and the gate wiring for turning off the gates to different paths. This makes it possible to set different resistance values ​​depending on whether the gates are on or off.

[0096] Resistor unit 62 is connected to diode element unit 61. Resistor unit 62 has a resistance value such that transistor unit 70 turns on before current sense unit 90 and transistor unit 70 turns off later than current sense unit 90. The resistance value of resistor unit 62 may be set in consideration of the internal gate resistance of transistor unit 70 and the internal gate resistance of current sense unit 90. The internal gate resistance may be a parasitic gate resistance generated by gate wiring resistance or the like.

[0097] The main adjustment unit 160 has a main ON-side diode 161 and a main OFF-side diode 162 as the diode element unit 61. The main ON-side diode 161 and the main OFF-side diode 162 are connected in anti-parallel between the gate pad 150 and the gate conductive portion 44. The main adjustment unit 160 has a main OFF-side resistor 167 as the resistor unit 62.

[0098] The main ON diode 161 has an anode electrically connected to the gate pad 150 and a cathode electrically connected to the gate conductive portion 44 of the transistor section 70. The main OFF diode 162 has an anode electrically connected to the gate conductive portion 44 of the transistor section 70 and a cathode electrically connected to the gate pad 150.

[0099] The main off-side resistor 167 is connected in series with the main off-side diode 162 between the gate pad 150 and the gate conductive portion 44. The main off-side resistor 167 of this example is electrically connected between the anode of the main off-side diode 162 and the gate conductive portion 44 of the transistor section 70. The main off-side resistor 167 may be connected between the cathode of the main off-side diode 162 and the gate pad 150. The main off-side resistor 167 may be set so that the turn-off operation of the transistor section 70 is slower than the turn-off operation of the current sense section 90.

[0100] The main adjustment unit 160 in this example adjusts only the OFF-side gate resistance and does not adjust the ON-side gate resistance, but may adjust both the ON-side and OFF-side gate resistances, or may adjust only the ON-side gate resistance.

[0101] The sense adjustment section 260 has a sense ON-side diode 261 and a sense OFF-side diode 262 as the diode element section 61. The sense ON-side diode 261 and the sense OFF-side diode 262 are connected in anti-parallel between the gate pad 150 and the gate conductive section 194. The sense adjustment section 260 has a sense ON-side resistor 266 as the resistor section 62.

[0102] The sense ON diode 261 has an anode electrically connected to the gate pad 150 and a cathode electrically connected to the gate conductive portion 194 of the current sense unit 90. The sense OFF diode 262 has an anode electrically connected to the gate conductive portion 194 of the current sense unit 90 and a cathode electrically connected to the gate pad 150.

[0103] The sense on-side resistor 266 is connected in series with the sense on-side diode 261 between the gate pad 150 and the gate conductive portion 194. The sense on-side resistor 266 in this example is electrically connected between the cathode of the sense on-side diode 261 and the gate conductive portion 194 of the current sense unit 90. The sense on-side resistor 266 may be connected between the anode of the sense on-side diode 261 and the gate pad 150. The sense on-side resistor 266 may be set so that the turn-on operation of the current sense unit 90 is slower than the turn-on operation of the transistor unit 70.

[0104] The sense adjustment section 260 in this example adjusts only the gate resistance on the ON side and does not adjust the gate resistance on the OFF side. However, the sense adjustment section 260 may adjust both the gate resistances on the ON side and the OFF side, or may adjust only the gate resistance on the OFF side.

[0105] The semiconductor device 100 of this example includes the resistance adjusting unit 60, which allows it to adjust the switching speed of the transistor unit 70 and the current sensing unit 90. This allows the semiconductor device 100 to suppress gate oscillation within the chip.

[0106] 2B shows a modified example of the circuit configuration of the semiconductor device 100. The semiconductor device 100 of this example differs from the embodiment of FIG. 2A in that it includes a main ON-side resistor 166 and a sense OFF-side resistor 267. In this example, the differences from the embodiment of FIG. 2A will be particularly described.

[0107] The main on-side resistor 166 is electrically connected between the cathode of the main on-side diode 161 and the gate conductive portion 44 of the transistor portion 70. That is, the main on-side resistor 166 may be connected in series with the main on-side diode 161 and in parallel with the main off-side resistor 167 between the gate pad 150 and the gate conductive portion 44. The main on-side resistor 166 may be electrically connected between the anode of the main on-side diode 161 and the gate pad 150.

[0108] The sense off-side resistor 267 is electrically connected between the anode of the sense off-side diode 262 and the gate conductive portion 194 of the current sense unit 90. That is, the sense off-side resistor 267 may be connected in series with the sense off-side diode 262 and in parallel with the sense on-side resistor 266 between the gate pad 150 and the gate conductive portion 194. The sense off-side resistor 267 may be connected between the cathode of the sense off-side diode 262 and the gate pad 150.

[0109] The semiconductor device 100 of this example can further adjust the switching speed during the on-operation of the transistor section 70 and the switching speed during the off-operation of the current sense section 90. That is, the semiconductor device 100 of this example can adjust the switching speed during the on-off operation of the transistor section 70, and can also adjust the switching speed during the on-off operation of the current sense section 90.

[0110] The resistance adjuster 60 has resistance values ​​such that the transistor section 70 turns on before the current sense section 90 and the transistor section 70 turns off later than the current sense section 90. The resistance value of the main on-side resistor 166 may be smaller than the resistance value of the sense on-side resistor 266. The resistance value of the main on-side resistor 166 may be five times or more and 100 times or less the resistance value of the sense on-side resistor 266. The resistance value of the main off-side resistor 167 may be larger than the resistance value of the sense off-side resistor 267. The resistance value of the main off-side resistor 167 may be one time or more and 10 times or less the resistance value of the sense off-side resistor 267.

[0111] 3A shows the waveforms of the collector current Ic' and the sense current Ise' flowing through a semiconductor device of a comparative example. In the comparative example, when the gate voltage Vge' is turned off, the sense current Ise' turns off after the collector current Ic'. In this way, if the sense section turns off later than the main transistor section, current may flow into the sense section, which may cause the current sense section to be destroyed or oscillation to occur. Similarly, if the sense section turns on earlier than the main transistor section, current may flow into the sense section, which may cause the current sense section to be destroyed or oscillation to occur.

[0112] 3B shows the waveforms of the collector current Ic and the sense current Ise flowing through the semiconductor device 100. In this example, when the gate voltage Vge is turned off, the sense current Ise of the current sense unit 90 turns off before the collector current Ic of the transistor unit 70. In this way, the semiconductor device 100 can avoid breakdown of the current sense unit 90 by adjusting the switching speed so that the current sense unit 90 turns off faster than the transistor unit 70. Similarly, the semiconductor device 100 may avoid breakdown of the current sense unit 90 by adjusting the switching speed so that the current sense unit 90 turns on at the same time as or later than the transistor unit 70.

[0113] 4A shows an example of an enlarged top view of the periphery of the current sense pad 190 and the gate pad 150. In this example, all trench portions of the transistor portion 70 are gate trench portions 40, but the transistor portion 70 may also include dummy trench portions 30. The structure of the transistor portion 70 may be the same as that of the semiconductor device 100 in FIG. 1B. The semiconductor device 100 includes a current sense portion 90 and a resistance adjustment portion 60.

[0114] The current sense unit 90 detects the current flowing through the transistor unit 70. The trench structure of the current sense unit 90 is provided below the current sense pad 190. The current sense unit 90 has a structure corresponding to the transistor unit 70 and simulates the operation of the transistor unit 70. Because a current proportional to the current flowing through the transistor unit 70 flows through the current sense unit 90, the current flowing through the transistor unit 70 can be monitored using the current sense unit 90. This makes it possible to protect the transistor unit 70 from overcurrent.

[0115] The gate pad 150 may be provided in common to the transistor section 70 and the current sense section 90. That is, a common gate control signal may be input to the transistor section 70 and the current sense section 90. The gate pad 150 may be provided in common to the main adjustment section 160 and the sense adjustment section 260. The gate pad 150 is connected to the main adjustment section 160 and the sense adjustment section 260 by a gate metal wiring 152.

[0116] The main adjustment unit 160 may be provided adjacent to the transistor unit 70. In this example, the main adjustment unit 160 is provided farther away from the gate pad 150 than the current sense pad 190, but may be provided closer to the gate pad 150 than the current sense pad 190. The main adjustment unit 160 may be connected to the transistor unit 70 using at least one of the connection unit 25 and the gate metal wiring 152. In this example, the main adjustment unit 160 is connected to the transistor unit 70 by the connection unit 25.

[0117] The main ON-side diode 161 and the main OFF-side diode 162 may be arranged adjacent to each other. Arranged adjacent to each other may mean that the gate metal wiring 152 is not present between the main ON-side diode 161 and the main OFF-side diode 162. In this example, the main ON-side diode 161 and the main OFF-side diode 162 are arranged side by side in the extension direction of the trench, but are not limited to this.

[0118] The sense adjustment unit 260 may be provided adjacent to the current sense pad 190. That is, the gate metal wiring 152 may not be provided between the sense adjustment unit 260 and the current sense pad 190. In this example, the sense adjustment unit 260 is provided between the current sense pad 190 and the gate pad 150, but is not limited to this. The sense adjustment unit 260 may be connected to the current sense unit 90 using at least one of the connection unit 25 and the gate metal wiring 152. In this example, the sense adjustment unit 260 is connected to the current sense unit 90 via the connection unit 25.

[0119] The sense on-side diode 261 and the sense off-side diode 262 may be arranged adjacent to each other. That is, the gate metal wiring 152 does not need to be provided between the sense on-side diode 261 and the sense off-side diode 262. In this example, the sense on-side diode 261 and the sense off-side diode 262 are arranged side by side in the extension direction of the trench, but are not limited to this.

[0120] The gate metal wiring 152 may connect the gate pad 150 and the resistance adjustment unit 60. In this example, the gate metal wiring 152 connects each of the main ON-side diode 161, the main OFF-side diode 162, the sense ON-side diode 261, and the sense OFF-side diode 262 to the gate pad 150. The gate metal wiring 152 may be connected to the main adjustment unit 160 using a third contact portion 173 provided in the contact hole 55.

[0121] The resistance adjustment section 60 may have a laminated structure in which a diode element section 61 and a resistor section 62 are laminated. By laminating the diode element section 61 and the resistor section 62 and increasing the area of ​​the resistance adjustment section 60, it is possible to improve the ESD breakdown resistance. The main ON-side diode 161 may be provided laminated with the main ON-side resistor 166. The main OFF-side diode 162 may be provided laminated with the main OFF-side resistor 167. The sense ON-side diode 261 may be provided laminated with the sense ON-side resistor 266. The sense OFF-side diode 262 may be provided laminated with the sense OFF-side resistor 267.

[0122] Here, the switching speeds of the transistor section 70 and the current sense section 90 may vary depending on their areas, etc. The area of ​​the current sense section 90 may be restricted depending on the chip size, the layout position of the pads, etc. The semiconductor device 100 of this example can adjust the switching speed depending on the capacitance ratio based on the areas, etc. of the transistor section 70 and the current sense section 90, so that gate oscillation within the chip can be suppressed regardless of the chip layout.

[0123] 4B shows an example of the bb' cross section in FIG. 4A. The bb' cross section is an XZ plane passing through the emitter region 12 in the current sense section 90. In the bb' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, a current sense pad 190, and a collector electrode 24. The current sense pad 190 is formed above the semiconductor substrate 10 and the interlayer insulating film 38. The current sense section 90 may have a contact region 15, similar to the transistor section 70.

[0124] 5A shows an example of the c-c' cross section in FIG. 4A. The resistance adjustment section 60 of this example has a laminated structure in which a diode element section 61 and a resistance section 62 are laminated. The c-c' cross section is a YZ plane that passes through the first contact section 171 and the second contact section 172 in the resistance adjustment section 60. While the c-c' cross section shows the region of the sense on-side diode 261 in the resistance adjustment section 60 in FIG. 4A, the same may be true for the cross sections of the main on-side diode 161, the main off-side diode 162, and the sense off-side diode 262.

[0125] The diode element portion 61 is provided above the resistor portion 62. The diode element portion 61 in this example is provided above the resistor portion 62 with the second insulating portion 82 sandwiched therebetween. The diode element portion 61 may be provided below the resistor portion 62. The diode element portion 61 may be any of the main ON-side diode 161, the main OFF-side diode 162, the sense ON-side diode 261, and the sense OFF-side diode 262. The resistor portion 62 may be any of the main ON-side resistor 166, the main OFF-side resistor 167, the sense ON-side resistor 266, and the sense OFF-side resistor 267.

[0126] The first contact portion 171 is provided to connect the front surface side metal layer 110 and the diode element portion 61. In this example, the first contact portion 171 connects the gate metal wiring 152 and the diode element portion 61. The first contact portion 171 extends from the upper end of the interlayer insulating film 38, through the diode element portion 61, the second insulating portion 82, and the resistor portion 62, to the upper end of the first insulating portion 81. The material of the first contact portion 171 may be the same as that of the front surface side metal layer 110. The first contact portion 171 may include a plug member such as tungsten, and may include a barrier metal. The first contact portion 171 is provided in the first opening 271.

[0127] The second contact portion 172 is provided to connect the front surface side metal layer 110 and the resistor portion 62. In this example, the second contact portion 172 connects the diode element portion 61 and the resistor portion 62. The second contact portion 172 extends from the upper end of the interlayer insulating film 38, through the diode element portion 61, the second insulating portion 82, and the resistor portion 62, to the upper end of the first insulating portion 81. The material of the second contact portion 172 may be the same as that of the front surface side metal layer 110. The second contact portion 172 may include a plug member such as tungsten, and may include a barrier metal. The second contact portion 172 is provided in the second opening 272.

[0128] The first opening 271 and the second opening 272 may be formed by a common etching process. That is, the depths of the first opening 271 and the second opening 272 may be the same. The first opening 271 and the second opening 272 may be formed by the same etching process as the contact holes of the transistor section 70. For example, the first opening 271 and the second opening 272 are formed by the same etching process as the contact holes 54, 55, and 56.

[0129] The first insulating section 81 is provided above the semiconductor substrate 10. The first insulating section 81 may be an oxide film such as an HTO film. The resistor section 62 of this example is provided on the first insulating section 81.

[0130] The second insulating portion 82 is provided above the first insulating portion 81. The second insulating portion 82 may be an oxide film such as an HTO film. The second insulating portion 82 may be used to separate the diode element portion 61 and the resistor portion 62, which are stacked.

[0131] The interlayer insulating film 38 may be provided above the first insulating section 81 and the second insulating section 82. The interlayer insulating film 38 may be formed by the same process as the interlayer insulating films 38 of the transistor section 70 and the current sensing section 90, or may be formed by a different process. The thickness of the interlayer insulating film 38 may be thicker than the thickness of the first insulating section 81 and may be thicker than the thickness of the second insulating section 82. A gate metal wiring 152 may be provided on the interlayer insulating film 38.

[0132] The third insulating portion 83 is provided around the first contact portion 171 and electrically separates the first contact portion 171 from the resistor portion 62. The third insulating portion 83 may be formed in the same process as the second insulating portion 82. The material of the third insulating portion 83 may be the same as the material of the second insulating portion 82.

[0133] The diode element portion 61 and the resistor portion 62 may be formed of polysilicon. The diode element portion 61 may be formed of the second polysilicon layer 92, and the resistor portion 62 may be formed of the first polysilicon layer 91.

[0134] The first polysilicon layer 91 is provided on the first insulating portion 81. The first polysilicon layer 91 may be a polysilicon layer formed by a process common to at least one of the gate conductive portion 44 or the gate conductive portion 194. The first polysilicon layer 91 may be polysilicon formed by a process common to the connection portion 25. The polysilicon formed by a common process may be polysilicon formed at the same time using the same mask. The thickness of the first polysilicon layer 91 may be 0.5 μm or more and 1 μm or less.

[0135] The second polysilicon layer 92 is provided on the second insulating section 82. The second polysilicon layer 92 may be polysilicon formed in the same process as the temperature sensing diode of the temperature sensing section 180. The thickness of the second polysilicon layer 92 may be thinner than the thickness of the first polysilicon layer 91. In other words, the thickness of the resistor section 62 may be thinner than the thickness of the diode element section 61. The thickness of the second polysilicon layer 92 may be 0.3 μm or more and 0.7 μm or less.

[0136] 5B shows an example of a top view of the diode element portion 61. The diode element portion 61 has a P-type region and an N-type region provided in the second polysilicon layer 92. In this example, the diode element portion 61 has one PN junction, but may have multiple PN junctions connected in series. The PN junction of the diode element portion 61 may be formed by ion implantation. The P-type region and the N-type region may each be formed by ion implantation. The P-type region and the N-type region may also be formed by depositing a polysilicon layer of one conductivity type, P-type or N-type, and then implanting ions of the other conductivity type.

[0137] The structure of the diode element portion 61 in this example may be at least one of the structures of the main ON-side diode 161, the main OFF-side diode 162, the sense ON-side diode 261, and the sense OFF-side diode 262. The main ON-side diode 161, the main OFF-side diode 162, the sense ON-side diode 261, and the sense OFF-side diode 262 may have a common structure or may be different from each other.

[0138] 5C shows an example of a top view of the resistor portion 62. The resistor portion 62 has a first polysilicon layer 91 connected to the second contact portion 172. The resistor portion 62 of this example has a resistor region 63 for adjusting the gate resistance. The resistance of the resistor portion 62 may be adjusted by the shape of the first polysilicon layer 91 or by the doping concentration of the first polysilicon layer 91. The resistor region 63 of this example has a region in which the first polysilicon layer 91 meanders on the XY plane. The first polysilicon layer 91 may be either P-type or N-type.

[0139] 6A shows an example of the dd' cross section in Fig. 4A. The dd' cross section is an XZ plane passing through the connection portion 25 for connecting the resistance adjustment portion 60 and the transistor portion 70. The dd' cross section passes through the first contact portion 171 and the third contact portion 173.

[0140] The diode element portion 61 may or may not overlap the connection portion 25 in top view. In this example, the diode element portion 61 overlaps with the connection portion 25 and is also provided above the connection portion 25. The diode element portion 61 and the connection portion 25 may be separated by a second insulating portion 82. The connection portion 25 may be connected to the gate metal wiring 152 via a third contact portion 173.

[0141] The third contact portion 173 is used to connect the gate metal wiring 152 and the connection portion 25. The third contact portion 173 is provided to extend from the upper end of the interlayer insulating film 38, through the connection portion 25, and to the upper end of the first insulating portion 81. The third contact portion 173 may terminate on the upper surface of the connection portion 25 without penetrating through the connection portion 25. The material of the third contact portion 173 may be the same as that of the front-surface-side metal layer 110. The third contact portion 173 may include a plug member such as tungsten, and may include a barrier metal. The third contact portion 173 is provided in the contact hole 55.

[0142] 6B shows an example of the ee' cross section in Fig. 4A. The ee' cross section is an XZ plane that passes through the resistance portion 62 and the connection portion 25. The ee' cross section traverses the resistance adjustment portion 60 in the X-axis direction and passes through the third contact portion 173.

[0143] The diode element portion 61 may be provided to cover the resistor portion 62. In this example, the width of the diode element portion 61 in the X-axis direction is larger than the width of the resistor portion 62 in the X-axis direction. The width of the diode element portion 61 in the Y-axis direction may be larger or smaller than the width of the resistor portion 62 in the Y-axis direction.

[0144] A first polysilicon layer 91 functioning as the connection portion 25 may be provided below the gate metal wiring 152. The first polysilicon layer 91 functioning as the connection portion 25 is separated from the first polysilicon layer 91 functioning as the resistor portion 62 by the interlayer insulating film 38.

[0145] 7A shows an example of a method for manufacturing a semiconductor device 100 having a resistance adjusting section 60. In step S100, a first insulating section 81 is formed above a semiconductor substrate 10.

[0146] In step S102, a first polysilicon layer 91 for forming the resistor portion 62 is formed on the first insulating portion 81. The first polysilicon layer 91 may be patterned according to the shape of the resistor portion 62. The first polysilicon layer 91 may be formed simultaneously with the gate conductive portion 44 and the gate conductive portion 194. Before the step of forming the second insulating portion 82, a third opening 273 may be formed in the first polysilicon layer 91. The third opening 273 may be an opening for forming the first contact portion 171 and the third insulating portion 83. However, the formation of the third opening 273 may be omitted.

[0147] In step S104, a second insulating portion 82 is formed on the first polysilicon layer 91. When the third opening 273 is formed, the third insulating portion 83 may be formed in the third opening 273. The third insulating portion 83 may be formed by the same process as the second insulating portion 82. The material of the third insulating portion 83 may be the same as the material of the second insulating portion 82. When forming the second insulating portion 82, a contact hole 57 (described later) may be formed by patterning, etching, or the like. A second polysilicon layer 92 for forming the diode element portion 61 is formed on the second insulating portion 82. The second polysilicon layer 92 may be formed by the same process as the temperature sensing diode of the temperature sensing portion 180. The PN structure of the diode element portion 61 may be formed by the same process as the PN structure of the temperature sensing portion 180. The second polysilicon layer 92 may be formed up to the inside of the contact hole 57.

[0148] 7B shows an example of a method for manufacturing the semiconductor device 100 having the resistance adjusting portion 60. This figure shows a subsequent step in the method for manufacturing the semiconductor device 100 of FIG. 7A.

[0149] In step S106, the interlayer insulating film 38 is formed above the diode element portion 61 and the resistor portion 62. After the interlayer insulating film 38 is formed, a first opening 271 for forming the first contact portion 171 may be formed through the interlayer insulating film 38, the second polysilicon layer 92, and the second insulating portion 82. After the interlayer insulating film 38 is formed, a second opening 272 for forming the second contact portion 172 may be formed through the interlayer insulating film 38, the second polysilicon layer 92, the second insulating portion 82, and the first polysilicon layer 91. If the contact hole 57 is formed in step S104, the second opening 272 does not need to be formed.

[0150] The first opening 271 and the second opening 272 may be formed by the same etching process. The first opening 271 and the second opening 272 may reach the upper surface of the first insulating portion 81. The first opening 271 and the second opening 272 may extend into the first insulating portion 81, or may not reach the upper surface of the first insulating portion 81.

[0151] The step of forming the first opening 271 may include a step of forming the first opening 271 through the third insulating portion 83. In the step of forming the first opening 271, the first opening 271 is formed such that the third insulating portion 83 is provided between the first opening 271 and the first polysilicon layer 91 in order to separate the first contact portion 171 filled in the first opening 271 from the resistor portion 62.

[0152] In step S108, the first contact portion 171 is formed in the first opening 271, and the second contact portion 172 is formed in the second opening 272. The first contact portion 171 and the second contact portion 172 may be formed by the same contact formation process. The step of forming the first contact portion 171 may include a step of forming the first contact portion 171 inside the third insulating portion 83. If the second opening 272 is not formed in step S106, the second contact portion 172 may not be formed.

[0153] The manufacturing method of the semiconductor device 100 of this example can simplify the process by sharing at least some of the steps for forming the resistance adjustment unit 60 with the steps for forming the transistor unit 70, the current sense unit 90, or the temperature sense unit 180. By sharing all of the steps for the resistance adjustment unit 60, a new step for forming the resistance adjustment unit 60 can be eliminated.

[0154] Fig. 8 shows a modified example of the cc' cross section in Fig. 4A. Differences from Fig. 5A will be described using Fig. 8.

[0155] 8, the diode element portion 61 and the resistor portion 62 are in direct contact with each other via a contact hole 57 provided in the second insulating portion 82. That is, the second contact portion 172 and the second opening 272 are not provided in the example of Fig. 8. By bringing the diode element portion 61 and the resistor portion 62 into direct contact with each other, the characteristics can be adjusted by adjusting the size of the contact hole 57, and the resistance value of the resistor portion 62 can also be adjusted.

[0156] Inside the contact hole 57, the height of the interface between the diode element portion 61 and the resistor portion 62 may be the same as the height of the lower surface of the second insulating portion 82. As an example, the contact hole 57 is formed by forming the second insulating portion 82 on the first polysilicon layer 91 and then selectively removing the second insulating portion 82 by etching or the like. Note that the height of the interface between the diode element portion 61 and the resistor portion 62 may be positioned lower than the height of the lower surface of the second insulating portion 82 by over-etching when removing the second insulating portion 82.

[0157] Inside the contact hole 57, the height of the interface between the diode element portion 61 and the resistor portion 62 may be located higher than the height of the lower surface of the second insulating portion 82. That is, the first polysilicon layer 91 may be provided so as to extend into the contact hole 57 in the depth direction of the semiconductor substrate 10. As an example, the contact hole 57 is formed by selectively forming a mask on the first polysilicon layer 91, etching the first polysilicon layer 91, forming the second insulating portion 82 on the first polysilicon layer 91, and removing the mask.

[0158] Figure 9A shows a modified example of the cc' cross section in Figure 4A. The resistance adjustment section 60 of this example differs from the example shown in Figure 5A etc. in that it has a resistance adjustment trench section 65 extending in a predetermined direction in the semiconductor substrate 10. The difference from the example of the cc' cross section shown in Figure 5A will be explained using Figure 9A.

[0159] 9A , the first polysilicon layer 91 is provided inside the resistance-adjusting trench portion 65. That is, in the example shown in FIG. 9A , the first polysilicon layer 91 is not provided on the first insulating portion 81 formed above the front surface 21 of the semiconductor substrate 10, but is provided inside the resistance-adjusting trench portion 65 extending in the depth direction from the front surface 21 of the semiconductor substrate 10. The first polysilicon layer 91 may function as the resistance portion 62.

[0160] The resistance-adjusting trench portion 65 of this example has a resistance-adjusting insulating film 64 and a first polysilicon layer 91. The resistance-adjusting insulating film 64 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the resistance-adjusting trench. The first polysilicon layer 91 is formed inside the resistance-adjusting trench portion 65, more inward than the resistance-adjusting insulating film 64. The resistance-adjusting insulating film 64 insulates the first polysilicon layer 91 from the semiconductor substrate 10.

[0161] The second polysilicon layer 92 is provided on the first insulating portion 81, the second insulating portion 82, and the first polysilicon layer 91. The first insulating portion 81 and the second insulating portion 82 may be formed in the same process or in different processes. The second polysilicon layer 92 may function as the diode element portion 61. An interface 93 is formed between the first polysilicon layer 91 and the second polysilicon layer 92.

[0162] The second polysilicon layer 92 is provided in direct contact with the first polysilicon layer 91. That is, in the example of Fig. 9A, the second contact portion 172 and the second opening 272 are not provided. This allows the diode element portion 61 and the resistor portion 62 to be in direct contact with each other, and the resistance value of the resistance adjustment portion 60 can be adjusted by adjusting the size of the contact interface 93. Note that the second contact portion 172 and the second opening 272 may be provided in the example of Fig. 9A.

[0163] Fig. 9B shows a modified example of the c-c' cross section in Fig. 4A. The example in Fig. 9B differs from the example shown in Fig. 9A in that the first polysilicon layer 91 provided in the resistance adjustment trench portion 65 functions as part of the resistor portion 62 and the diode element portion 61.

[0164] The diode element portion 61 has a cathode region 361 and an anode region 362. The cathode region 361 is a region of a first conductivity type. In this example, the cathode region 361 is N-type. The anode region 362 is a region of a second conductivity type. In this example, the anode region 362 is P-type. In the diode element portion 61, a current flows in a direction from the anode region 362 to the cathode region 361.

[0165] At least one of a cathode region 361 and an anode region 362 may be provided in the resistance adjustment trench portion 65. In this example, the cathode region 361 is provided in the resistance adjustment trench portion 65 that is provided to extend in a predetermined direction in the semiconductor substrate 10. The resistance adjustment trench portion 65 may also be provided with an anode region 362.

[0166] In this way, the first polysilicon layer 91 not only functions as the resistor portion 62, but may also function as either the cathode region 361 or the anode region 362 of the diode element portion 61. This allows the characteristics of the diode element portion 61 to be adjusted by changing the size of the interface 93, and also allows the resistance adjustment portion 60 to be made smaller.

[0167] FIG. 10 shows an example of a top view of the resistance adjustment section 60. As an example, FIG. 10 is a top view of the resistance adjustment section 60 shown in FIG. 9A. The resistance section 62 is provided below the diode element section 61 and is therefore invisible when viewed from above, but in FIG. 10, the portion provided below the diode element section 61 is indicated by dotted lines to help understand the positional relationship. The resistance adjustment section 60 of this example has a resistance adjustment trench section 65 provided in the semiconductor substrate 10, extending in a predetermined direction. The resistance adjustment trench section 65 of this example is provided with the resistance section 60.

[0168] The resistance-adjusting trench portion 65 in this example is provided so as to extend in the Y-axis direction. That is, the resistance-adjusting trench portion 65 in this example is provided so as to extend in the rectification direction of the diode element portion 61, but is not limited thereto. The resistance-adjusting trench portion 65 may be provided so as to extend in the X-axis direction.

[0169] A plurality of resistance-adjusting trench portions 65 may be provided. The resistance-adjusting trench portion 60 of this example has six resistance-adjusting trench portions 65. The ends of the resistance-adjusting trench portions 65 of this example have a U-shape on the front surface 21 of the semiconductor substrate 10, similar to the gate trench portion 40. That is, the resistance-adjusting trench portion 65 may have two extension portions extending along the extension direction and a connection portion connecting the two extension portions.

[0170] The length of the resistance-adjusting trench 65 in a predetermined direction may be shorter than the length of the gate trench 40 in the current sense unit 90. The length of the resistance-adjusting trench 65 may be 2 μm or more and 2000 μm or less. The length of the resistance-adjusting trench 65 may be 50 μm or more and 500 μm or less. By adjusting the length of the resistance-adjusting trench 65, the resistance value of the resistance-adjusting unit 60 can be adjusted.

[0171] The resistance-adjusting trench portion 65 may be formed in a shape in which multiple U-shaped trenches are connected. The resistance-adjusting trench portion 65 may have n extension portions (n ​​is a natural number of 2 or more) extending along the extension direction and n-1 connection portions connecting two extension portions. By using such a shape, the resistance value of the resistance-adjusting portion 60 can be easily adjusted.

[0172] The semiconductor device 100 of this example may have both a resistance adjustment portion 60 that includes a resistance adjustment trench portion 65 and a resistance adjustment portion 60 that does not include a resistance adjustment trench portion 65. That is, the main adjustment portion 160 may have a resistance adjustment trench portion 65, and the sense adjustment portion 260 may not have a resistance adjustment trench portion 65. Alternatively, the main adjustment portion 160 may not have a resistance adjustment trench portion 65, and the sense adjustment portion 260 may have a resistance adjustment trench portion 65.

[0173] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements are also included within the technical scope of the present invention. For example, in the resistance adjustment unit 60, the resistor unit 62 may be arranged on the gate pad 150 side of the diode element unit 61.

[0174] It should be noted that the order of execution of each process, such as operations, procedures, steps, and stages, in the apparatus and method shown in the claims, specification, and drawings is not specifically stated as "before," "prior to," etc., and that the process can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specification, and drawings is described using "first," "next," etc. for convenience, this does not mean that the process must be performed in this order.

[0175] 10...Semiconductor substrate, 12...Emitter region, 14...Base region, 15...Contact region, 16...Accumulation region, 17...Well region, 18...Drift region, 20...Buffer region, 21...Front surface, 22...Collector region, 23...Back surface, 24...Collector electrode, 25...Connection portion, 30...Dummy trench portion, 32...Dummy insulating film, 34...Dummy conductive portion, 38...Interlayer insulating film, 40...Gate trench portion, 41...Extension portion, 42...Gate insulating film, 43...Connection portion, 44...Gate Port conductive portion, 52...emitter electrode, 53...contact hole, 54...contact hole, 55...contact hole, 56...contact hole, 57...contact hole, 60...resistance adjusting portion, 61...diode element portion, 62...resistance portion, 63...resistance region, 64...resistance adjusting insulating film, 65...resistance adjusting trench portion, 70...transistor portion, 71...mesa portion, 81...first insulating portion, 82...second insulating portion, 83...third insulating portion, 90...current sensing portion, 91...first polysilicon layer, 92 . . second polysilicon layer, 93 . . interface, 100 . . semiconductor device, 102 . . edge, 104 . . active portion, 106 . periphery, 110 . . front surface side metal layer, 120 . . back surface side lifetime control region, 130 . . anode pad, 132 . . anode wiring, 140 . . cathode pad, 142 . . cathode wiring, 150 . . gate pad, 152 . . gate metal wiring, 160 . . main adjustment portion, 161 . . main ON-side diode, 162 . . main OFF-side diode, 166 . . main ON-side resistor , 167...Main off-side resistor, 171...First contact portion, 172...Second contact portion, 173...Third contact portion, 180...Temperature sensing portion, 190...Current sensing pad, 194...Gate conductive portion, 260...Sense adjusting portion, 261...Sense on-side diode, 262...Sense off-side diode, 266...Sense on-side resistor, 267...Sense off-side resistor, 271...First opening, 272...Second opening, 273...Third opening, 361...Cathode region, 362...Anode region

Claims

1. A semiconductor device comprising: a transistor section; a current sense section for detecting a current flowing through the transistor section; a gate pad provided above a semiconductor substrate; and a resistance adjustment section electrically connected to the gate pad for adjusting gate resistance of the transistor section and the current sense section, wherein the resistance adjustment section has a main adjustment section electrically connected to a gate conductive section of the transistor section, and a sense adjustment section electrically connected to a gate conductive section of the current sense section, each of the main adjustment section and the sense adjustment section including a diode element section having a plurality of diodes provided in anti-parallel, and a resistance section connected to the diode element section.

2. The semiconductor device according to claim 1, wherein said resistor section has a resistance value such that said transistor section turns on before said current sense section and turns off later than said current sense section.

3. The semiconductor device according to claim 1, wherein the main adjustment section comprises: a main ON-side diode having an anode electrically connected to the gate pad and a cathode electrically connected to the gate conductive section of the transistor section; a main OFF-side diode having an anode electrically connected to the gate conductive section of the transistor section and a cathode electrically connected to the gate pad; and a main OFF-side resistor electrically connected between the anode of the main OFF-side diode and the gate conductive section of the transistor section.

4. A semiconductor device according to any one of claims 1 to 3, wherein the sense adjustment section comprises: a sense on-side diode having an anode electrically connected to the gate pad and a cathode electrically connected to the gate conductive section of the current sense section; a sense off-side diode having an anode electrically connected to the gate conductive section of the current sense section and a cathode electrically connected to the gate pad; and a sense on-side resistor electrically connected between the cathode of the sense on-side diode and the gate conductive section of the current sense section.

5. The semiconductor device according to claim 1, wherein the main adjustment section comprises: a main ON-side diode having an anode electrically connected to the gate pad and a cathode electrically connected to the gate conductive section of the transistor section; a main OFF-side diode having an anode electrically connected to the gate conductive section of the transistor section and a cathode electrically connected to the gate pad; a main ON-side resistor electrically connected between the cathode of the main ON-side diode and the gate conductive section of the transistor section; and a main OFF-side resistor electrically connected between the anode of the main OFF-side diode and the gate conductive section of the transistor section.

6. The semiconductor device according to claim 5, wherein the sense adjustment section comprises: a sense ON-side diode having an anode electrically connected to the gate pad and a cathode electrically connected to the gate conductive section of the current sense section; a sense OFF-side diode having an anode electrically connected to the gate conductive section of the current sense section and a cathode electrically connected to the gate pad; a sense ON-side resistor electrically connected between the cathode of the sense ON-side diode and the gate conductive section of the current sense section; and a sense OFF-side resistor electrically connected between the anode of the sense OFF-side diode and the gate conductive section of the current sense section.

7. The semiconductor device according to claim 1, wherein in the resistance adjustment section, the diode element section is provided above the resistance section.

8. The semiconductor device according to claim 7, comprising: a first insulating portion provided above the semiconductor substrate; a second insulating portion provided above the first insulating portion; an interlayer insulating film provided above the first insulating portion and the second insulating portion; and a front surface side metal layer provided on the interlayer insulating film, wherein the resistance portion is provided on the first insulating portion, and the diode element portion is provided above the resistance portion with the second insulating portion in between.

9. The semiconductor device according to claim 8, further comprising a first contact portion extending from an upper end of the interlayer insulating film, through the diode element portion, the second insulating portion and the resistance portion, to an upper end of the first insulating portion, for connecting the front surface side metal layer and the diode element portion.

10. The semiconductor device according to claim 9, further comprising a third insulating portion provided around the first contact portion for electrically isolating the first contact portion and the resistor portion.

11. The semiconductor device according to claim 8, further comprising a second contact portion extending from an upper end of the interlayer insulating film, through the diode element portion, the second insulating portion and the resistor portion, to an upper end of the first insulating portion, for connecting the front surface side metal layer and the resistor portion.

12. The semiconductor device according to claim 1, wherein the resistance adjustment portion has a resistance adjustment trench portion extending in a predetermined direction in the semiconductor substrate, and the resistance portion is provided in the resistance adjustment trench portion.

13. The semiconductor device according to claim 8, wherein the diode element portion and the resistor portion are in direct contact with each other via a contact hole provided in the second insulating portion.

14. The semiconductor device according to claim 1, wherein the resistance adjustment portion comprises: a resistance adjustment trench portion extending in a predetermined direction in the semiconductor substrate; a first polysilicon layer provided inside the resistance adjustment trench portion; and a second polysilicon layer provided in direct contact with the first polysilicon layer.

15. The semiconductor device according to claim 1, wherein the resistance adjustment portion has a resistance adjustment trench portion extending in a predetermined direction in the semiconductor substrate, the diode element portion has a cathode region and an anode region, and at least one of the cathode region and the anode region is provided in the resistance adjustment trench portion.

16. The semiconductor device according to any one of claims 1 to 3, wherein the resistance portion is thinner than the diode element portion.

17. A method for manufacturing a semiconductor device having a transistor portion and a current sense portion, comprising: providing a gate pad above a semiconductor substrate; and providing a resistance adjustment portion electrically connected to the gate pad for adjusting the gate resistance of the transistor portion and the current sense portion, wherein the step of providing the resistance adjustment portion comprises the steps of forming a main adjustment portion electrically connected to a gate conductive portion of the transistor portion; and forming a sense adjustment portion electrically connected to the gate conductive portion of the current sense portion, each of the main adjustment portion and the sense adjustment portion including a diode element portion having a plurality of diodes arranged in anti-parallel, and a resistor portion connected to the diode element portion.

18. A method for manufacturing a semiconductor device according to claim 17, comprising the steps of: forming a first insulating portion above the semiconductor substrate; forming a first polysilicon layer for forming the resistor portion on the first insulating portion; forming a second insulating portion on the first polysilicon layer; forming a second polysilicon layer for forming the diode element portion on the second insulating portion; forming an interlayer insulating film above the diode element portion and the resistor portion; forming a first opening for forming a first contact portion through the interlayer insulating film, the second polysilicon layer and the second insulating portion; forming a second opening for forming a second contact portion through the interlayer insulating film, the second polysilicon layer, the second insulating portion and the first polysilicon layer; forming the first contact portion in the first opening; and forming a second contact portion in the second opening.

19. The method for manufacturing a semiconductor device according to claim 18, wherein the first opening and the second opening are formed by a same etching process, and the first contact portion and the second contact portion are formed by a same contact formation process.

20. A method for manufacturing a semiconductor device as described in claim 17, comprising the steps of: forming a first insulating portion above the semiconductor substrate; forming a first polysilicon layer for forming the resistor portion on the first insulating portion; forming a second insulating portion on the first polysilicon layer; forming a second polysilicon layer for forming the diode element portion on the second insulating portion; forming an interlayer insulating film above the diode element portion and the resistor portion; forming a first opening for forming a first contact portion through the interlayer insulating film, the second polysilicon layer and the second insulating portion; and forming the first contact portion in the first opening.

21. A method for manufacturing a semiconductor device as described in any one of claims 18 to 20, comprising the steps of: forming a third opening in the first polysilicon layer before the step of forming the second insulating portion; and forming a third insulating portion in the third opening, wherein the step of forming the first opening includes a step of forming the first opening through the third insulating portion; and the step of forming the first contact portion includes a step of forming the first contact portion inside the third insulating portion.