Transformer chip and signal transmission device

Abstract

This transformer chip comprises: a first insulation transformer including a first surface coil and a second surface coil that are arranged apart from each other in a first direction that is orthogonal to a thickness direction, and a first rear surface coil and a second rear surface coil that are arranged opposite to the first surface coil and the second surface coil; a second insulation transformer including a third surface coil and a fourth surface coil, and a third rear surface coil and a fourth rear surface coil that are arranged opposite to the third surface coil and the fourth surface coil; first dummy wiring provided on both sides of the first insulation transformer in a second direction that is orthogonal to the thickness direction and the first direction; and second dummy wiring provided on both sides of the second insulation transformer in the second direction and electrically insulated from the first dummy wiring. The first dummy wiring and the second dummy wiring are aligned in the first direction.

Description

Trans chips and signal transmission devices

[0001] The present disclosure relates to a transformer chip and a signal transmission device.

[0002] Conventionally, signal transmission devices that transmit pulse signals while isolating input and output have been used in various applications such as power supplies and motor drive devices. One example of a signal transmission device is an isolated gate driver that applies a gate voltage to the gate of a switching element such as a transistor. Patent Document 1 discloses a transformer chip used in such a gate driver, which includes an insulating layer stack structure and includes an upper coil and a lower coil that are arranged opposite each other in the thickness direction of the insulating layer stack structure.

[0003] JP 2018-78169 A

[0004] [Summary] In a transformer chip used in a signal transmission device, signals are transmitted by a surface coil and a back coil arranged opposite each other. Therefore, there is room for further study on the transmission characteristics of a transformer chip including a surface coil and a back coil.

[0005] A transformer chip according to one aspect of the present disclosure includes a first isolated transformer including an insulating layer including a front surface and a back surface facing opposite each other in a thickness direction, a first surface coil and a second surface coil disposed in the insulating layer closer to the front surface and spaced apart from each other in a first direction perpendicular to the thickness direction, and a first back surface coil and a second back surface coil disposed in the insulating layer closer to the back surface and spaced apart from each other in the first direction and opposed to the first surface coil and the second surface coil, a third surface coil and a fourth surface coil disposed in the insulating layer closer to the front surface and spaced apart from each other in the first direction, and a third back surface coil and a fourth back surface coil disposed in the insulating layer closer to the back surface and spaced apart from each other in the first direction and opposed to the third surface coil and the fourth surface coil, a second isolation transformer disposed apart from the isolation transformer; a first outer pad disposed between the first surface coil and the second surface coil in the first direction as viewed from the thickness direction and electrically connected to both the first surface coil and the second surface coil; a second outer pad disposed between the third surface coil and the fourth surface coil in the first direction as viewed from the thickness direction and electrically connected to both the third surface coil and the fourth surface coil; first dummy wirings provided on both sides of the first isolation transformer in a second direction orthogonal to the first direction as viewed from the thickness direction and electrically connected to the first outer pads; and second dummy wirings provided on both sides of the second isolation transformer in the second direction and electrically connected to the second outer pads and electrically insulated from the first dummy wirings, wherein the first dummy wirings and the second dummy wirings are aligned along the first direction.

[0006] FIG. 1 is a circuit diagram showing a schematic configuration of a signal transmission device according to one embodiment. FIG. 2 is a schematic plan view showing the internal structure of the signal transmission device shown in FIG. 1. FIG. 3 is a schematic cross-sectional view showing the internal structure of the signal transmission device shown in FIG. 2. FIG. 4 is a schematic plan view of the transformer chip shown in FIG. 2. FIG. 5 is a schematic plan view of the transformer chip shown in FIG. 4. FIG. 6 is a schematic cross-sectional view of the transformer chip taken along line F6-F6 in FIG. 3. FIG. 7 is a schematic cross-sectional view of the transformer chip taken along line F7-F7 in FIG. 3. FIG. 8 is a schematic cross-sectional view of the transformer chip taken along line F8-F8 in FIG. 4. FIG. 9 is a schematic plan view of dummy wiring of the transformer chip. FIG. 10 is a schematic plan view showing an enlarged view of a portion of the transformer chip shown in FIG. 9. FIG. 11 is a schematic plan view showing an enlarged view of another portion of the transformer chip shown in FIG. 9. FIG. 12 is a schematic plan view showing an enlarged view of the first surface coil, the second surface coil, and their surroundings of the transformer chip shown in FIG. 7. 13 is a schematic plan view showing an enlargement of the first surface coil and its periphery in FIG. 12 . FIG. 14 is a schematic cross-sectional view showing an enlargement of the second surface coil and its periphery in FIG. 12 . FIG. 15 is a schematic plan view showing an enlargement of the fifth surface coil, the sixth surface coil, and their periphery in the transformer chip in FIG. 7 . FIG. 16 is a schematic plan view showing an enlargement of the fifth surface coil and its periphery in FIG. 15 . FIG. 17 is a schematic plan view showing an enlargement of the sixth surface coil and its periphery in FIG. 15 . FIG. 18 is a schematic plan view of a transformer chip of a comparative example. FIG. 19 is a schematic plan view of a transformer chip of a modified example. FIG. 20 is a schematic plan view of a transformer chip of a modified example. FIG. 21 is a schematic plan view showing an enlargement of the first surface coil, the second surface coil, and their periphery in the transformer chip of FIG. 20 . FIG. 22 is a schematic plan view of a transformer chip of a modified example. FIG. 23 is a circuit diagram schematically showing the configuration of a signal transmission device of a modified example. FIG. 24 is a schematic plan view schematically showing the internal configuration of the signal transmission device of FIG. 23 . 25 and 26 are schematic plan views each showing an internal configuration of a signal transmission device according to a modified example.

[0007] DETAILED DESCRIPTION Hereinafter, several embodiments of the transformer chip and signal transmission device of the present disclosure will be described with reference to the accompanying drawings. Note that for simplicity and clarity of explanation, the components shown in the drawings are not necessarily drawn to scale. Also, for ease of understanding, hatching lines may be omitted in cross-sectional views. The accompanying drawings are merely illustrative of embodiments of the present disclosure and should not be considered to limit the present disclosure. Terms such as "first," "second," and "third" in the present disclosure are used merely to distinguish between objects and are not used to rank the objects.

[0008] The following detailed description includes devices, systems, and methods embodying exemplary embodiments of the present disclosure. This detailed description is merely illustrative in nature and is not intended to limit the embodiments of the present disclosure or the application and uses of such embodiments.

[0009] The phrase "at least one" as used herein means "one or more" of the desired options. As an example, the phrase "at least one" as used herein means "only one option" or "both of two options" when the number of options is two. As another example, the phrase "at least one" as used herein means "only one option" or "any combination of two or more options" when the number of options is three or more.

[0010] As used in this specification, "the length of A is equal to the length of B" or "the length of A and the length of B are equal to each other" also includes a relationship in which the difference between the length of A and the length of B is, for example, within 10% of the length of A.

[0011] <One embodiment> [Schematic configuration of signal transmission device] A schematic configuration of a signal transmission device 10 of one embodiment will be described with reference to Figures 1 to 3. Figure 1 schematically shows the circuit configuration of the signal transmission device 10 of one embodiment. Figure 2 schematically shows an example of the internal configuration (planar structure) of the signal transmission device 10. Figure 3 schematically shows an example of a portion of the internal configuration (cross-sectional structure) of the signal transmission device 10. Note that hatched lines have been omitted in Figure 3 to make the drawing easier to understand.

[0012] 1 , the signal transmission device 10 includes a first circuit chip 60, a second circuit chip 70, and a transformer chip 80. The transformer chip 80 is connected between the first circuit chip 60 and the second circuit chip 70. The transformer chip 80 electrically insulates the first circuit chip 60 from the second circuit chip 70.

[0013] The first circuit chip 60 includes a first circuit 20 configured to operate with a first voltage V1. As an example, the first circuit 20 includes a transmitting circuit 21 and a receiving circuit 22. The second circuit chip 70 includes a second circuit 30 configured to operate with a second voltage V2. As an example, the second circuit 30 includes a receiving circuit 31 and a transmitting circuit 32. The first voltage V1 and the second voltage V2 may be the same as or different from each other. In one example, the second voltage V2 is equal to the first voltage V1. The signal transmission device 10 may be referred to as a digital isolator.

[0014] The transformer chip 80 includes multiple transformers 40. The multiple transformers 40 include a first transformer 40A and a second transformer 40B connected to the transmitting circuit 21 of the first circuit 20, and a third transformer 40C and a fourth transformer 40D connected to the receiving circuit 22 of the first circuit 20. The first transformer 40A and the second transformer 40B are electrically connected between the transmitting circuit 21 of the first circuit chip 60 and the receiving circuit 31 of the second circuit chip 70. The third transformer 40C and the fourth transformer 40D are electrically connected between the receiving circuit 22 of the first circuit chip 60 and the transmitting circuit 32 of the second circuit chip 70.

[0015] Each of the first to fourth transformers 40A to 40D includes a first coil 41 and a second coil 42. The first coil 41 of the first transformer 40A and the second transformer 40B is electrically connected to the receiving circuit 31 of the second circuit chip 70. The second coil 42 of the first transformer 40A and the second transformer 40B is electrically connected to the transmitting circuit 21 of the first circuit chip 60. The first coil 41 of the third transformer 40C and the fourth transformer 40D is electrically connected to the transmitting circuit 32 of the second circuit chip 70. The second coil 42 of the third transformer 40C and the fourth transformer 40D is electrically connected to the receiving circuit 22 of the first circuit chip 60.

[0016] The transmitting circuit 21 of the first circuit chip 60 receives an input signal and pulse-drives the second coil 42 of at least one of the first transformer 40A and the second transformer 40B. The receiving circuit 31 of the second circuit chip 70 receives a signal excited in the first coil 41 of at least one of the first transformer 40A and the second transformer 40B and outputs an output signal.

[0017] The transmitting circuit 32 of the second circuit chip 70 receives the input signal and pulse-drives the first coil 41 of at least one of the third transformer 40C and the fourth transformer 40D. The receiving circuit 22 of the first circuit chip 60 receives the signal excited in the second coil 42 of at least one of the third transformer 40C and the fourth transformer 40D and outputs an output signal.

[0018] (Internal Configuration of Signal Transmission Device) FIG. 2 shows an example of a schematic plan view illustrating the internal configuration of the signal transmission device 10. Note that, because FIG. 1 shows a simplified circuit configuration of the signal transmission device 10, the number of external terminals of the signal transmission device 10 in FIG. 2 is greater than the number of external terminals of the signal transmission device 10 in FIG. 1. Here, the number of external terminals of the signal transmission device 10 refers to the number of external electrodes that can connect the signal transmission device 10 to electronic components external to the signal transmission device 10. Furthermore, the number of signal lines (the number of wires W1 to W4, described below) that transmit signals from the first circuit 20 to the second circuit 30 in the signal transmission device 10 in FIG. 2 is greater than the number of signal lines in the signal transmission device 10 in FIG. 1.

[0019] FIG. 3 shows an example of a schematic cross-sectional view illustrating the internal configuration of the signal transmission device 10. Note that FIG. 3 shows a simplified cross-sectional structure of each of the chips 60, 70, and 80. Therefore, the cross-sectional structure of the transformer chip 80 shown in FIG. 3 differs from the cross-sectional structure of the transformer chip 80 described later. The transformer chip 80 in FIG. 3 shows the cross-sectional structure of the first transformer 40A.

[0020] As shown in FIG. 2, the signal transmission device 10 is a semiconductor device in which a first circuit chip 60, a second circuit chip 70, and a transformer chip 80 are packaged together as a plurality of semiconductor chips.

[0021] The package format of the signal transmission device 10 is an SO (Small Outline) type, which is an SOP (Small Outline Package) in this embodiment. The package format of the signal transmission device 10 can be changed as desired. The package format is not limited to SOP, and may be a QFN (Quad For Non-Lead Package), a DFP (Dual Flat Package), a DIP (Dual Inline Package), a QFP (Quad Flat Package), a SIP (Single Inline Package), an SOJ (Small Outline J-leaded Package), or various similar package structures.

[0022] The first circuit chip 60 is mounted on the first lead frame 100. The second circuit chip 70 is mounted on the second lead frame 110. In the example shown in FIG. 2, the transformer chip 80 is mounted on the first lead frame 100. That is, both the first circuit chip 60 and the transformer chip 80 are mounted on the first lead frame 100. The sealing resin 120 seals a portion of each lead frame 100, 110 and each chip 60, 70, 80. In addition, in FIG. 2, the sealing resin 120 is indicated by a two-dot chain line for the convenience of explaining the internal configuration of the signal transmission device 10.

[0023] The sealing resin 120 is made of an electrically insulating resin material. This resin material includes, for example, black epoxy resin. The sealing resin 120 is formed in the shape of a rectangular plate with its thickness direction aligned in the Z direction. The sealing resin 120 has four resin side surfaces 121 to 124. More specifically, the sealing resin 120 has resin side surfaces 121 and 122 as both end surfaces in the X direction and resin side surfaces 123 and 124 as both end surfaces in the Y direction. The X and Y directions are perpendicular to the Z direction. The X and Y directions are perpendicular to each other when viewed from the Z direction. When viewed from the Z direction, the sealing resin 120 has a rectangular shape with its long side aligned in the Y direction and its short side aligned in the X direction. Here, the X direction corresponds to the "first direction" and the Y direction corresponds to the "second direction." In the following description, "plan view" refers to a view from the Z direction.

[0024] Each of the first lead frame 100 and the second lead frame 110 is a conductor and is formed from a material containing, for example, Cu (copper), Fe (iron), Al (aluminum), etc. Each of the lead frames 100, 110 is provided across the inside and outside of the sealing resin 120.

[0025] The first lead frame 100 has a first die pad 101 disposed within the sealing resin 120, and a plurality of first leads 102 disposed across the inside and outside of the sealing resin 120. Each of the first leads 102 constitutes an external terminal that electrically connects the signal transmission device 10 to an external electronic device.

[0026] In this embodiment, both the first circuit chip 60 and the transformer chip 80 are mounted on the first die pad 101. In a plan view, the first die pad 101 is disposed so that its center in the Y direction is closer to the resin side surface 123 than the center in the Y direction of the sealing resin 120. In this embodiment, the first die pad 101 is not exposed from the sealing resin 120. In a plan view, the shape of the first die pad 101 is rectangular with the long side direction in the X direction and the short side direction in the Y direction.

[0027] The multiple first leads 102 are arranged spaced apart from each other in the X direction. Of the multiple first leads 102, the first leads 102 arranged at both ends in the X direction are each integrated with the first die pad 101. A portion of each first lead 102 protrudes from the resin side surface 123 toward the outside of the sealing resin 120.

[0028] The second lead frame 110 has a second die pad 111 disposed within the sealing resin 120, and a plurality of second leads 112 disposed across the inside and outside of the sealing resin 120. Each second lead 112 constitutes an external terminal that electrically connects the signal transmission device 10 to an external electronic device.

[0029] The second die pad 111 has a second circuit chip 70 mounted thereon. In plan view, the second die pad 111 is disposed closer to the resin side surface 124 in the Y direction than the first die pad 101. In this embodiment, the second die pad 111 is not exposed from the sealing resin 120. In plan view, the second die pad 111 has a rectangular shape with its longer side oriented in the X direction and its shorter side oriented in the Y direction.

[0030] The first die pad 101 and the second die pad 111 are arranged spaced apart from each other in the Y direction. Therefore, the Y direction can also be said to be the arrangement direction of the two die pads 101, 111. The dimensions of the first die pad 101 and the second die pad 111 in the Y direction are set depending on the size, number, etc. of the semiconductor chips to be mounted. In this embodiment, the first circuit chip 60 and the transformer chip 80 are mounted on the first die pad 101, and the second circuit chip 70 is mounted on the second die pad 111. Therefore, the dimension of the first die pad 101 in the Y direction is larger than the dimension of the second die pad 111 in the Y direction.

[0031] The multiple second leads 112 are arranged spaced apart from each other in the X direction. Of the multiple second leads 112, a pair of second leads 112 are integrated with the second die pad 111. A portion of each second lead 112 protrudes outward from the resin side surface 124 of the sealing resin 120.

[0032] In this embodiment, the number of second leads 112 is the same as the number of first leads 102. As can be seen from Fig. 2, the multiple first leads 102 and the multiple second leads 112 are arranged in a direction (X direction) perpendicular to the arrangement direction (Y direction) of the first die pad 101 and the second die pad 111. Note that the number of second leads 112 and the number of first leads 102 can each be changed as desired.

[0033] In this embodiment, the first die pad 101 is supported by a pair of first leads 102 that are integrated with the first die pad 101. The second die pad 111 is supported by a pair of second leads 112 that are integrated with the second die pad 111. Therefore, each die pad 101, 111 does not have a suspension lead that is exposed from the resin side surfaces 121, 122. This allows for a large insulation distance (creepage distance) between the first lead frame 100 and the second lead frame 110.

[0034] The first circuit chip 60, the second circuit chip 70, and the transformer chip 80 are arranged spaced apart from one another in the Y direction. They are arranged in this order in the Y direction from the first lead 102 toward the second lead 112: the first circuit chip 60, the transformer chip 80, and the second circuit chip 70. Therefore, it can be said that the transformer chip 80 is disposed between the first circuit chip 60 and the second circuit chip 70 in the Y direction.

[0035] The first circuit chip 60 is formed in a rectangular shape having short and long sides in a plan view. In a plan view, the first circuit chip 60 is mounted on the first die pad 101 with the long sides aligned in the X direction and the short sides aligned in the Y direction. As shown in FIG. 3 , the first circuit chip 60 has a chip main surface 60s and a chip back surface 60r facing opposite sides in the Z direction. The chip back surface 60r of the first circuit chip 60 is bonded to the first die pad 101 by a conductive bonding material SD. The conductive bonding material SD may be solder, Ag (silver) paste, or the like. The first circuit chip 60 includes a first circuit 20.

[0036] 2, a plurality of first electrode pads 61, a plurality of second electrode pads 62, and a plurality of third electrode pads 63 are formed on a chip main surface 60s of the first circuit chip 60. Each of the electrode pads 61 to 63 is electrically connected to the first circuit 20.

[0037] The multiple first electrode pads 61 are arranged on the chip main surface 60s closer to the first lead 102 than the center of the chip main surface 60s in the Y direction. The multiple first electrode pads 61 are arranged in the X direction. The multiple second electrode pads 62 are arranged at the end of the chip main surface 60s in the Y direction that is closer to the transformer chip 80. The multiple second electrode pads 62 are arranged in the X direction. The multiple third electrode pads 63 are arranged at both ends of the chip main surface 60s in the X direction.

[0038] The second circuit chip 70 is formed in a rectangular shape having short and long sides in a plan view. In a plan view, the second circuit chip 70 is mounted on the second die pad 111 with the long sides aligned in the X direction and the short sides aligned in the Y direction. As shown in FIG. 3 , the second circuit chip 70 has a chip main surface 70s and a chip back surface 70r that face opposite each other in the Z direction. The chip back surface 70r of the second circuit chip 70 is bonded to the second die pad 111 by a conductive bonding material SD. The second circuit chip 70 includes a second circuit 30.

[0039] 2, a plurality of first electrode pads 71, a plurality of second electrode pads 72, and a plurality of third electrode pads 73 are formed on the chip main surface 70s of the second circuit chip 70. Each of the electrode pads 71 ​​to 73 is electrically connected to the second circuit 30.

[0040] The multiple first electrode pads 71 ​​are arranged at the end closer to the transformer chip 80 of both ends in the Y direction of the chip main surface 70s. The multiple first electrode pads 71 ​​are arranged in the X direction. The multiple second electrode pads 72 are arranged at the end farther from the transformer chip 80 of both ends in the Y direction of the chip main surface 70s. In other words, the multiple second electrode pads 72 are arranged at the end closer to the second lead 112 of both ends in the Y direction of the chip main surface 70s. The multiple second electrode pads 72 are arranged in the X direction. The multiple third electrode pads 73 are arranged at both ends in the X direction of the chip main surface 70s.

[0041] The transformer chip 80 includes first to fourth transformers 40A to 40D (see FIG. 1) as multiple transformers 40. The transformer chip 80 is formed in a rectangular shape having short and long sides in a plan view. In this embodiment, the transformer chip 80 is mounted on the first die pad 101 so that the long sides are aligned in the X direction and the short sides are aligned in the Y direction in a plan view. As shown in FIG. 3, the transformer chip 80 has a chip main surface 80s and a chip back surface 80r that face opposite each other in the Z direction. The chip back surface 80r of the transformer chip 80 is bonded to the first die pad 101 by a conductive bonding material SD.

[0042] A plurality of first electrode pads 81 and a plurality of second electrode pads 82 are formed on the chip main surface 80s of the transformer chip 80. The plurality of first electrode pads 81 are electrically connected to the first coils 41 (see FIG. 1) of the first to fourth transformers 40A to 40D, and the plurality of second electrode pads 82 are electrically connected to the second coils 42 (see FIG. 1) of the first to fourth transformers 40A to 40D. Both the first electrode pads 81 and the second electrode pads 82 include one or more appropriately selected from Ti (titanium), TiN (titanium nitride), Au (gold), Ag, Cu, Al, and W (tungsten).

[0043] 2, the second electrode pads 82 are arranged, for example, at one of both ends in the Y direction of the chip main surface 80s, which is closer to the first circuit chip 60. The second electrode pads 82 are arranged in the X direction. The first electrode pads 81 are arranged, for example, near the center in the Y direction of the chip main surface 80s. The first electrode pads 81 are arranged in the X direction.

[0044] In order to set the dielectric strength voltage of the signal transmission device 10 to a preset dielectric strength voltage, the first die pad 101 and the second die pad 111, which are closest to each other on the lead frames 100, 110, must be spaced apart. For this reason, the transformer chip 80 is disposed closer to the first circuit chip 60 than the second circuit chip 70. In other words, in a plan view, the distance between the second circuit chip 70 and the transformer chip 80 is greater than the distance between the first circuit chip 60 and the transformer chip 80.

[0045] A plurality of wires W1 to W4 are connected to each of the first circuit chip 60, the transformer chip 80, and the second circuit chip 70. Each of the wires W1 to W4 is a bonding wire formed by a wire bonding device, and is made of a conductor containing, for example, Au, Al, Cu, or the like.

[0046] The first circuit chip 60 is electrically connected to the first lead frame 100 by wires W1. More specifically, the first electrode pads 61 and the third electrode pads 63 of the first circuit chip 60 are connected to the first leads 102 by the wires W1. This electrically connects the first circuit 20 (see FIG. 1 ) to the first leads 102. The third electrode pads 63 of the first circuit chip 60 are connected to a pair of the first leads 102 that are integrated with the first die pad 101 by the wires W1. In this embodiment, the pair of first leads 102 that are integrated with the first die pad 101 constitute ground terminals, and the first circuit 20 and the first die pad 101 are electrically connected by the wires W1. Therefore, the first die pad 101 has the same potential as the ground GND1 of the first circuit 20.

[0047] The second circuit chip 70 and each of the multiple second leads 112 of the second lead frame 110 are electrically connected by wires W4. More specifically, the multiple second electrode pads 72 and multiple third electrode pads 73 of the second circuit chip 70 are connected to the second leads 112 by wires W4. This electrically connects the second circuit 30 (see FIG. 1 ) to the multiple second leads 112. In this embodiment, a pair of second leads 112 integrated with the second die pad 111 constitute ground terminals, and the second circuit 30 and the second die pad 111 are electrically connected by wires W4. Therefore, the second die pad 111 has the same potential as the ground GND2 of the second circuit 30.

[0048] The transformer chip 80 is connected to the first circuit chip 60 by wires W2 and to the second circuit chip 70 by wires W3. More specifically, the plurality of second electrode pads 82 of the transformer chip 80 are connected to the plurality of second electrode pads 62 of the first circuit chip 60 by wires W2. This electrically connects the second coils 42 of the first to fourth transformers 40A to 40D to the first circuit 20. Furthermore, the plurality of first electrode pads 81 of the transformer chip 80 are connected to the plurality of first electrode pads 71 ​​of the second circuit chip 70 by wires W3. This electrically connects the first coils 41 of the first to fourth transformers 40A to 40D to the second circuit 30.

[0049] The second coils 42 of the first to fourth transformers 40A to 40D are electrically connected to the ground GND1 of the first circuit 20 via wire W2, the first circuit chip 60, etc. The first coils 41 of the first to fourth transformers 40A to 40D are electrically connected to the ground GND2 of the second circuit 30 via wire W3, the second circuit chip 70, etc.

[0050] The configuration of the signal transmission device 10 shown in FIGS. 1 to 3 is an example, and the circuit configurations included in the first circuit chip 60 and the second circuit chip 70 may be changed as appropriate. For example, the first circuit 20 may include a transmitting circuit 21 but not a receiving circuit 22. The second circuit 30 may include a receiving circuit 31 but not a transmitting circuit 32. The first circuit 20 may also include circuits other than the transmitting circuit 21 and the receiving circuit 22. The second circuit 30 may also include circuits other than the receiving circuit 31 and the transmitting circuit 32. For example, the first circuit 20 may include an analog-to-digital conversion circuit. In this case, the signal transmission device 10 is configured as an isolated A / D conversion device.

[0051] Furthermore, for example, the second circuit 30 may include a driver circuit that drives the gate of the switching element. The driver circuit may be connected to an external terminal of the signal transmission device 10 (for example, the second lead 112 shown in FIG. 2 ). In this case, the signal transmission device 10 is configured as an insulated gate driver that drives the switching element. The switching element may be a power semiconductor element such as a Si Metal-Oxide-Semiconductor Field-Effect Transistor (SiMOSFET), a SiCMOSFET, or an IGBT (Insulated Gate Bipolar Transistor). The driver circuit generally uses a half-bridge circuit in which a low-side switching element and a high-side switching element are connected in a totem-pole configuration.

[0052] The signal transmission device 10 used as an isolated gate driver applies a drive voltage signal to the control terminal of a switching element. In this case, the transmission circuit 21 of the first circuit 20 converts a control signal input from, for example, a control device into a pulse signal. The driver circuit of the second circuit 30 outputs a drive voltage signal to the control terminal of the switching element in response to a signal received by the reception circuit 31 via the first transformer 40A and the second transformer 40B. The transmission circuit 32 of the second circuit 30 and the reception circuit 22 of the first circuit 20 may be used to transmit a detection signal from, for example, a temperature sensor disposed near the motor to the control device.

[0053] In this manner, in the signal transmission device 10 used as an isolated gate driver, the power supply voltage of the first circuit 20 that receives a signal from the control device is 5 V, 3.3 V, or the like, relative to the ground potential. Meanwhile, in the case of the second circuit 30 connected to the high-side switching element, a voltage equivalent to the voltage applied to the drain of the high-side switching element (e.g., 600 V or higher) is transiently applied. For this reason, the signal transmission device 10 requires a dielectric strength voltage between the first circuit 20 and the second circuit 30, more specifically, between the first coil 41 and the second coil 42 of the first transformer 40A and the second transformer 40B. This dielectric strength voltage is 2500 Vrms or higher and 7500 Vrms or lower. In one example, the dielectric strength voltage of the signal transmission device 10 is approximately 5000 Vrms. However, the specific value of the dielectric strength voltage of the signal transmission device 10 is not limited to this and can be any value.

[0054] 4 to 17, an example of the configuration of the transformer chip 80 will be described. In the following description, the direction from the chip back surface 80r toward the chip main surface 80s of the transformer chip 80 shown in FIG. 9 is referred to as "upward," and the direction from the chip main surface 80s toward the chip back surface 80r is referred to as "downward."

[0055] (General Arrangement of Transformers and Electrodes) The general arrangement of the first to fourth transformers 40A to 40D and the first electrode pads 81 and second electrode pads 82 will be described with reference to FIGS.

[0056] Fig. 4 is a schematic plan view showing the appearance of the transformer chip 80. Fig. 5 is a schematic plan view of the transformer chip 80 showing the positional relationship between the first electrode pads 81 and second electrode pads 82 of the transformer chip 80 and the first to fourth transformers 40A to 40D. In Fig. 5, the passivation film 86 is omitted, and the first to fourth transformers 40A to 40D, dummy wiring 45, and floating dummy wiring 140 are each indicated by dashed lines.

[0057] Fig. 6 is a schematic cross-sectional view of the transformer chip 80 taken along the XY plane at the Z-direction position of the second coils 42 of the first to fourth transformers 40A to 40D, showing the connection relationships of the second coils 42. Fig. 7 is a schematic cross-sectional view of the transformer chip 80 taken along the XY plane at the Z-direction position of the first coils 41 of the first to fourth transformers 40A to 40D, showing the connection relationships of the first coils 41. Note that hatching lines have been omitted in Figs. 6 and 7 to make the drawings easier to understand.

[0058] 5, the transformer chip 80 includes two pairs of a first transformer 40A and a second transformer 40B and two pairs of a third transformer 40C and a fourth transformer 40D. In other words, the transformer chip 80 is a semiconductor chip that integrates the two pairs of the first transformer 40A and the second transformer 40B and the two pairs of the third transformer 40C and the fourth transformer 40D into a single chip. In other words, the transformer chip 80 is provided separately from the first circuit chip 60 and the second circuit chip 70 (both see FIG. 2).

[0059] The transformer chip 80 has chip side surfaces 80a to 80d. The chip side surfaces 80a and 80b form both end surfaces of the transformer chip 80 in the X direction, and the chip side surfaces 80c and 80d form both end surfaces of the transformer chip 80 in the Y direction. In other words, in a plan view, the chip side surfaces 80a and 80b form the short sides of the transformer chip 80, and the chip side surfaces 80c and 80d form the long sides of the transformer chip 80.

[0060] The two pairs of first to fourth transformers 40A to 40D are arranged closer to the chip side surface 80d than the center of the transformer chip 80 in the Y direction. The two pairs of first to fourth transformers 40A to 40D are arranged at the same positions in the Y direction and spaced apart from each other in the X direction. The two pairs of first to fourth transformers 40A to 40D are arranged from the chip side surface 80a to the chip side surface 80b in the following order: a pair of first transformer 40A and second transformer 40B, another pair of first transformer 40A and second transformer 40B, a pair of third transformer 40C and fourth transformer 40D, and another pair of third transformer 40C and fourth transformer 40D. Furthermore, in the pair of first transformer 40A and second transformer 40B, the first transformer 40A is arranged closer to the chip side surface 80a than the second transformer 40B. In one pair of third transformer 40C and fourth transformer 40D, the third transformer 40C is positioned closer to the chip side surface 80a than the fourth transformer 40D. Therefore, the two pairs of first to fourth transformers 40A to 40D are arranged in the following order from the chip side surface 80a toward the chip side surface 80b: first transformer 40A, second transformer 40B, first transformer 40A, second transformer 40B, third transformer 40C, fourth transformer 40D, third transformer 40C, and fourth transformer 40D. As shown in Figures 6 and 7, the first to fourth transformers 40A to 40D have the same configuration.

[0061] For convenience, in the following description, a pair of the first transformer 40A and the second transformer 40B will be referred to as the "first isolation transformer 40P," and a pair of the third transformer 40C and the fourth transformer 40D will be referred to as the "second isolation transformer 40Q." Another pair of the first transformer 40A and the second transformer 40B will be referred to as the "third isolation transformer 40R," and another pair of the third transformer 40C and the fourth transformer 40D will be referred to as the "fourth isolation transformer 40S." Therefore, the transformer chip 80 of this embodiment can be said to include the first isolation transformer 40P, the second isolation transformer 40Q, the third isolation transformer 40R, and the fourth isolation transformer 40S. The third isolation transformer 40R and the fourth isolation transformer 40S are disposed on both sides of the first isolation transformer 40P and the second isolation transformer 40Q in the X direction. In other words, the first isolation transformer 40P and the second isolation transformer 40Q are disposed between the third isolation transformer 40R and the fourth isolation transformer 40S in the X direction.

[0062] The multiple first electrode pads 81 include first to eighth pads 81A to 81H. The first pad 81A and the second pad 81B are pads electrically connected to the first transformer 40A and the second transformer 40B of the first isolation transformer 40P. The first pad 81A is positioned so as to overlap the first transformer 40A and the second transformer 40B of the first isolation transformer 40P in a plan view. A plurality of first pads 81A are provided corresponding to the first transformer 40A and the second transformer 40B. In other words, the multiple first pads 81A include a first pad 81A electrically connected to the first transformer 40A and a first pad 81A electrically connected to the second transformer 40B. The second pad 81B is positioned outside the first transformer 40A and the second transformer 40B. In one example, the second pad 81B is positioned between the first transformer 40A and the second transformer 40B in the X direction. The second pad 81B is electrically connected to both the first transformer 40A and the second transformer 40B. In other words, the second pad 81B is provided as a common pad for the first transformer 40A and the second transformer 40B. Here, the second pad 81B is an example of a "first outer pad."

[0063] The third pad 81C and the fourth pad 81D are pads electrically connected to the third transformer 40C and the fourth transformer 40D of the second isolation transformer 40Q. The third pad 81C is positioned so as to overlap the third transformer 40C and the fourth transformer 40D of the second isolation transformer 40Q in a plan view. A plurality of third pads 81C are provided corresponding to the third transformer 40C and the fourth transformer 40D. That is, the plurality of third pads 81C include a third pad 81C electrically connected to the third transformer 40C and a third pad 81C electrically connected to the fourth transformer 40D. The fourth pad 81D is positioned outside the third transformer 40C and the fourth transformer 40D. In one example, the fourth pad 81D is positioned between the third transformer 40C and the fourth transformer 40D in the X direction. The fourth pad 81D is electrically connected to both the third transformer 40C and the fourth transformer 40D. In other words, the fourth pad 81D is provided as a common pad for the third transformer 40C and the fourth transformer 40D. Here, the fourth pad 81D is an example of a "second outer pad."

[0064] The fifth pad 81E and the sixth pad 81F are pads electrically connected to the first transformer 40A and the second transformer 40B of the third isolation transformer 40R. The fifth pad 81E is positioned so as to overlap the first transformer 40A and the second transformer 40B of the third isolation transformer 40R in a plan view. A plurality of fifth pads 81E are provided corresponding to the first transformer 40A and the second transformer 40B. That is, the plurality of fifth pads 81E include a fifth pad 81E electrically connected to the first transformer 40A and a fifth pad 81E electrically connected to the second transformer 40B. The sixth pad 81F is positioned outside the first transformer 40A and the second transformer 40B. In one example, the sixth pad 81F is positioned between the first transformer 40A and the second transformer 40B in the X direction. The sixth pad 81F is electrically connected to both the first transformer 40A and the second transformer 40B. In other words, the sixth pad 81F can be said to be provided as a common pad for the first transformer 40A and the second transformer 40B.

[0065] The seventh pad 81G and the eighth pad 81H are pads electrically connected to the third transformer 40C and the fourth transformer 40D of the fourth isolation transformer 40S. The seventh pad 81G is positioned so as to overlap the third transformer 40C and the fourth transformer 40D of the fourth isolation transformer 40S in a plan view. A plurality of seventh pads 81G are provided corresponding to the third transformer 40C and the fourth transformer 40D. That is, the plurality of seventh pads 81G include a seventh pad 81G electrically connected to the third transformer 40C and a seventh pad 81G electrically connected to the fourth transformer 40D. The eighth pad 81H is positioned outside the third transformer 40C and the fourth transformer 40D. In one example, the eighth pad 81H is positioned between the third transformer 40C and the fourth transformer 40D in the X direction. The eighth pad 81H is electrically connected to both the third transformer 40C and the fourth transformer 40D. In other words, the eighth pad 81H can be said to be provided as a common pad for the third transformer 40C and the fourth transformer 40D.

[0066] The second electrode pads 82 are arranged closer to the chip side surface 80c than the first to fourth transformers 40A to 40D in a plan view. In one example, the second electrode pads 82 are arranged at one of the Y-direction ends of the transformer chip 80 that is closer to the chip side surface 80c. In other words, the second electrode pads 82 are arranged closer to the first lead 102 (see FIG. 2) than the two pairs of first to fourth transformers 40A to 40D in a plan view. The second electrode pads 82 are arranged in the same positions as the two pairs of first to fourth transformers 40A to 40D in the X direction.

[0067] The second electrode pads 82 include first to eighth pads 82A to 82H. The first pad 82A corresponds to the first pad 81A of the first electrode pad 81, the second pad 82B corresponds to the second pad 81B of the first electrode pad 81, the third pad 82C corresponds to the third pad 81C of the first electrode pad 81, and the fourth pad 82D corresponds to the fourth pad 81D of the first electrode pad 81. The fifth pad 82E corresponds to the fifth pad 81E of the first electrode pad 81, the sixth pad 82F corresponds to the sixth pad 81F of the first electrode pad 81, the seventh pad 82G corresponds to the seventh pad 81G of the first electrode pad 81, and the eighth pad 82H corresponds to the eighth pad 81H of the first electrode pad 81. In one example, the first pad 82A and the second pad 82B are electrically connected to the first transformer 40A and the second transformer 40B of the first isolation transformer 40P. The third pad 82C and the fourth pad 82D are electrically connected to the third transformer 40C and the fourth transformer 40D of the second isolation transformer 40Q. The fifth pad 82E and the sixth pad 82F are electrically connected to the first transformer 40A and the second transformer 40B of the third isolation transformer 40R. The seventh pad 82G and the eighth pad 82H are electrically connected to the third transformer 40C and the fourth transformer 40D of the fourth isolation transformer 40S.

[0068] A plurality of first pads 82A are provided corresponding to the first transformer 40A and the second transformer 40B of the first isolation transformer 40P. That is, the plurality of first pads 82A include a first pad 82A electrically connected to the first transformer 40A and a first pad 82A electrically connected to the second transformer 40B. The second pad 82B is electrically connected to both the first transformer 40A and the second transformer 40B. That is, the second pad 82B can be said to be provided as a common pad for the first transformer 40A and the second transformer 40B.

[0069] A plurality of third pads 82C are provided corresponding to the third transformer 40C and the fourth transformer 40D of the second isolation transformer 40Q. That is, the plurality of third pads 82C include a third pad 82C electrically connected to the third transformer 40C and a third pad 82C electrically connected to the fourth transformer 40D. The fourth pad 82D is electrically connected to both the third transformer 40C and the fourth transformer 40D. That is, the fourth pad 82D can be said to be provided as a common pad for the third transformer 40C and the fourth transformer 40D.

[0070] A plurality of fifth pads 82E are provided corresponding to the first transformer 40A and the second transformer 40B of the third isolation transformer 40R. That is, the plurality of fifth pads 82E include a fifth pad 82E electrically connected to the first transformer 40A and a fifth pad 82E electrically connected to the second transformer 40B. The sixth pad 82F is electrically connected to both the first transformer 40A and the second transformer 40B. That is, the sixth pad 82F can be said to be provided as a common pad for the first transformer 40A and the second transformer 40B.

[0071] A plurality of seventh pads 82G are provided corresponding to the third transformer 40C and the fourth transformer 40D of the fourth isolation transformer 40S. That is, the plurality of seventh pads 82G include a seventh pad 82G electrically connected to the third transformer 40C and a seventh pad 82G electrically connected to the fourth transformer 40D. The eighth pad 82H is electrically connected to both the third transformer 40C and the fourth transformer 40D. That is, the eighth pad 82H can be said to be provided as a common pad for the third transformer 40C and the fourth transformer 40D.

[0072] 8 is a schematic cross-sectional view of a transformer chip 80, mainly showing the cross-sectional structure of the transformer 40 A. The cross-sectional structure of the transformer chip 80 will be described below with reference to FIGS.

[0073] 8, the transformer chip 80 has a substrate 83 and an insulating layer 84 formed on the substrate 83. The substrate 83 is made of, for example, a semiconductor substrate. In this embodiment, the substrate 83 is made of a material containing Si (silicon). Examples of Si substrates used for the substrate 83 include semiconductor substrates made of a single-crystal intrinsic semiconductor material, p-type semiconductor substrates containing acceptor-type impurities, and n-type semiconductor substrates containing donor-type impurities.

[0074] The substrate 83 may be a semiconductor substrate made of a wide bandgap semiconductor or a compound semiconductor. A wide bandgap semiconductor is a semiconductor substrate having a bandgap of 2.0 eV or more. Examples of wide bandgap semiconductors include SiC (silicon carbide), GaN (gallium nitride), and Ga ２ O ３ The compound semiconductor may be a III-V compound semiconductor. The compound semiconductor may include at least one of AlN (aluminum nitride), InN (indium nitride), GaN, and GaAs (gallium arsenide). Instead of a semiconductor substrate, the substrate 83 may be an insulating substrate made of a material containing glass.

[0075] The substrate 83 has a substrate main surface 83s and a substrate back surface 83r that face opposite each other in the Z direction. The substrate main surface 83s faces the same side as the chip main surface 80s of the transformer chip 80, and the substrate back surface 83r faces the same side as the chip back surface 80r of the transformer chip 80. In one example, the substrate back surface 83r constitutes the chip back surface 80r of the transformer chip 80.

[0076] The insulating layer 84 has a plurality of insulating films 85 stacked in the Z direction from the substrate main surface 83s of the substrate 83. In other words, the Z direction can be said to be the thickness direction of the insulating layer 84. The Z direction can also be said to be the stacking direction of the plurality of insulating films 85. The insulating layer 84 is formed on the substrate main surface 83s of the substrate 83. The insulating layer 84 includes an upper surface 84s and a lower surface 84r facing the opposite side to the upper surface 84s. The lower surface 84r is in contact with the substrate main surface 83s. Here, the upper surface 84s is an example of the "surface of the insulating layer," and the lower surface 84r is an example of the "rear surface of the insulating layer."

[0077] The insulating film 85 includes a first insulating film 85A and a second insulating film 85B formed on the first insulating film 85A. The first insulating film 85A is a thin film, and is, for example, an etching stopper layer. The first insulating film 85A is formed of a material containing SiN (silicon nitride), SiC, SiCN (nitrogen-doped silicon carbide), or the like. In this embodiment, the first insulating film 85A is formed of a material containing SiN. The second insulating film 85B is, for example, an interlayer insulating film. The second insulating film 85B is formed of a material containing SiO (silicon oxide), for example. In this embodiment, the second insulating film 85B is formed of a material containing SiO ２ The second insulating film 85B is thicker than the first insulating film 85A. The thickness of the first insulating film 85A may be, for example, 100 nm or more and less than 1000 nm. The thickness of the second insulating film 85B may be, for example, 1000 nm or more and 3000 nm or less. In this embodiment, the thickness of the first insulating film 85A is, for example, about 300 nm, and the thickness of the second insulating film 85B is, for example, about 2000 nm.

[0078] Of the insulating films 85, both the bottom insulating film 85L in contact with the substrate main surface 83s of the substrate 83 and the top insulating film 85U are composed of the second insulating film 85B. In one example, the thicknesses of both the bottom insulating film 85L and the top insulating film 85U are thinner than the thicknesses of the other insulating films 85. The thicknesses of both the bottom insulating film 85L and the top insulating film 85U are equal to or greater than the thickness of the first insulating film 85A and equal to or less than the thickness of the second insulating film 85B.

[0079] The thicknesses of both the bottom insulating film 85L and the top insulating film 85U can be changed as desired. For example, the thicknesses of both the bottom insulating film 85L and the top insulating film 85U may be thicker than the thickness of the second insulating film 85B, or may be equal to or greater than the thickness of the insulating film 85 formed by the first insulating film 85A and the second insulating film 85B.

[0080] The transformer chip 80 includes a passivation film 86. The passivation film 86 is formed on the upper surface 84s of the insulating layer 84. The passivation film 86 is a film that protects the insulating layer 84, and can also be said to be a surface protection film for the transformer chip 80. The passivation film 86 is formed of a material containing, for example, any of SiO, SiN, and SiCN. The upper surface of the passivation film 86 forms the chip main surface 80s of the transformer chip 80.

[0081] Each of the electrode pads 81, 82 is covered with a passivation film 86. The passivation film 86 has openings that expose a portion of each of the electrode pads 81, 82. As a result, the second electrode pad 82 has an exposed surface for connecting a wire W2 (see FIG. 2). Also, the first electrode pad 81 has an exposed surface for connecting a wire W3 (see FIG. 2).

[0082] The transformer chip 80 includes a resin layer 87 formed on a passivation film 86. The resin layer 87 is formed of a material containing, for example, polyimide (PI). The resin layer 87 is separated into an inner resin layer and an outer resin layer by a separation groove 87A. As shown in FIG. 4 , the separation groove 87A is formed in a rectangular ring shape in a plan view. Although not shown, the separation groove 87A is formed to surround two pairs of the first to fourth transformers 40A to 40D in a plan view. In other words, the separation groove 87A is formed to surround the first to fourth isolation transformers 40P, 40Q, 40R, and 40S in a plan view. The resin layer 87 includes a first resin opening 87B exposing the second electrode pad 82 and a second resin opening 87C exposing the first electrode pad 81. The exposed surface of the second electrode pad 82 is exposed to the outside of the transformer chip 80 through the first resin opening 87B and the opening of the passivation film 86 (see FIG. 8 ). The exposed surface of the first electrode pad 81 is exposed to the outside of the transformer chip 80 through the second resin opening 87C and the opening of the passivation film 86.

[0083] (Second Coil) The configuration of the second coil 42 and the connection structure between the second coil 42 and the second electrode pad 82 will be described with reference to FIGS. 5, 6, and 8. FIG.

[0084] As shown in FIG. 6 , the second coils 42 of the two pairs of first to fourth transformers 40A to 40D include first to eighth back-side coils 42A to 42H. More specifically, the second coil 42 of the first transformer 40A of the first isolation transformer 40P is the "first back-side coil 42A," and the second coil 42 of the second transformer 40B of the first isolation transformer 40P is the "second back-side coil 42B." The second coil 42 of the third transformer 40C of the second isolation transformer 40Q is the "third back-side coil 42C," and the second coil 42 of the fourth transformer 40D of the second isolation transformer 40Q is the "fourth back-side coil 42D." The second coil 42 of the first transformer 40A of the third isolation transformer 40R is the "fifth back-side coil 42E," and the second coil 42 of the second transformer 40B of the third isolation transformer 40R is the "sixth back-side coil 42F." The second coil 42 of the third transformer 40C of the fourth isolation transformer 40S is a "seventh back coil 42G," and the second coil 42 of the fourth transformer 40D of the fourth isolation transformer 40S is an "eighth back coil 42H."

[0085] The first to eighth back-side coils 42A to 42H are configured with second coil wiring 44. The second coil wiring 44 is formed in a spiral shape in a plan view. The second coil wiring 44 includes one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W.

[0086] In the example shown in FIG. 6 , the first to eighth back surface coils 42A to 42H are formed in annular shapes. The winding directions of adjacent back surface coils in the X direction are opposite to each other among the first to eighth back surface coils 42A to 42H. Specifically, the second back surface coil 42B is formed by winding the second coil wiring 44 in a direction opposite to that of the first back surface coil 42A in a plan view. The fourth back surface coil 42D is formed by winding the second coil wiring 44 in a direction opposite to that of the third back surface coil 42C in a plan view. The sixth back surface coil 42F is formed by winding the second coil wiring 44 in a direction opposite to that of the fifth back surface coil 42E in a plan view. The eighth back surface coil 42H is formed by winding the second coil wiring 44 in a direction opposite to that of the seventh back surface coil 42G in a plan view. The number of turns of the second coil wiring 44 in the first to eighth back surface coils 42A to 42H is the same.

[0087] An inner end wiring 57A is arranged inside the second coil wiring 44 of each of the first back surface coil 42A and the second back surface coil 42B, and an outer end wiring 58A is arranged outside the second coil wiring 44 of each of the first back surface coil 42A and the second back surface coil 42B. One end of the second coil wiring 44 of each of the first back surface coil 42A and the second back surface coil 42B is electrically connected to the inner end wiring 57A, and the other end of the second coil wiring 44 is electrically connected to the outer end wiring 58A. The outer end wiring 58A is configured as an end wiring common to the first back surface coil 42A and the second back surface coil 42B.

[0088] An inner end wiring 57B is arranged inside the second coil wiring 44 of each of the third back surface coil 42C and the fourth back surface coil 42D, and an outer end wiring 58B is arranged outside the second coil wiring 44 of each of the third back surface coil 42C and the fourth back surface coil 42D. One end of the second coil wiring 44 of each of the third back surface coil 42C and the fourth back surface coil 42D is electrically connected to the inner end wiring 57B, and the other end of the second coil wiring 44 is electrically connected to the outer end wiring 58B. The outer end wiring 58B is configured as an end wiring common to the third back surface coil 42C and the fourth back surface coil 42D.

[0089] An inner end wiring 57C is arranged inside the second coil wiring 44 of each of the fifth back surface coil 42E and the sixth back surface coil 42F, and an outer end wiring 58C is arranged outside the second coil wiring 44 of each of the fifth back surface coil 42E and the sixth back surface coil 42F. One end of the second coil wiring 44 of each of the fifth back surface coil 42E and the sixth back surface coil 42F is electrically connected to the inner end wiring 57C, and the other end of the second coil wiring 44 is electrically connected to the outer end wiring 58C. The outer end wiring 58C is configured as an end wiring common to the fifth back surface coil 42E and the sixth back surface coil 42F.

[0090] An inner end wiring 57D is arranged inside the second coil wiring 44 of each of the seventh back surface coil 42G and the eighth back surface coil 42H, and an outer end wiring 58D is arranged outside the second coil wiring 44 of each of the seventh back surface coil 42G and the eighth back surface coil 42H. One end of the second coil wiring 44 of each of the seventh back surface coil 42G and the eighth back surface coil 42H is electrically connected to the inner end wiring 57D, and the other end of the second coil wiring 44 is electrically connected to the outer end wiring 58D. The outer end wiring 58D is configured as an end wiring common to the seventh back surface coil 42G and the eighth back surface coil 42H. Each of the inner end wirings 57A to 57D and the outer end wirings 58A to 58D includes a material selected from one or more of Ti, TiN, Au, Ag, Cu, Al, and W.

[0091] Here, one end of the second coil wiring 44 is an inner end of the spiral-shaped second coil wiring 44 in plan view. The other end of the second coil wiring 44 is an outer end of the spiral-shaped second coil wiring 44 in plan view. The configuration of the outer end wirings 58A to 58D can be changed as desired. The outer end wiring 58A may be provided for each of the first back surface coil 42A and the second back surface coil 42B. The outer end wiring 58B may be provided for each of the third back surface coil 42C and the fourth back surface coil 42D. The outer end wiring 58C may be provided for each of the fifth back surface coil 42E and the sixth back surface coil 42F. The outer end wiring 58D may be provided for each of the seventh back surface coil 42G and the eighth back surface coil 42H.

[0092] As shown in FIGS. 5 and 6 , the inner end wiring 57A is electrically connected to the first pad 82A via a connection wiring 131A. The inner end wiring 57B is electrically connected to the third pad 82C via a connection wiring 131C. The inner end wiring 57C is electrically connected to the fifth pad 82E via a connection wiring 131E. The inner end wiring 57D is electrically connected to the seventh pad 82G via a connection wiring 131G. The connection wirings 131A, 131C, 131E, and 131G contain one or more appropriately selected materials selected from Ti, TiN, Au, Ag, Cu, Al, and W. The connection wirings 131C, 131E, and 131G have the same configuration as the connection wiring 131A. Therefore, the following description will focus on the configuration of the connection wiring 131A, and a detailed description of the configurations of the connection wirings 131C, 131E, and 131G will be omitted.

[0093] As shown in FIG. 8 , the connection wiring 131A includes a first wiring portion 132A extending in the Z direction so as to penetrate the multiple insulating films 85, and a second wiring portion 133A extending in the Y direction. The first wiring portion 132A is positioned so as to overlap the first pad 82A in a plan view and is connected to the first pad 82A. The first wiring portion 132A penetrates through the multiple insulating films 85, from the insulating film 85 below the top insulating film 85U to the insulating film 85 two layers above the bottom insulating film 85L. The first wiring portion 132A includes a flat wiring portion and multiple vias. The wiring portions are provided at the same positions as the insulating films 85P and 85Q where the coils 41 and 42 are provided. Multiple vias are provided between the two wiring portions in the Z direction, between the upper wiring portion and the first pad 82A, and between the lower wiring portion and the second wiring portion 133A.

[0094] The second wiring portion 133A is provided closer to the substrate 83 than the first wiring portion 132A. The second wiring portion 133A is provided closer to the substrate 83 than the first back-surface coil 42A. In one example, the second wiring portion 133A is provided in an insulating film 85 one layer above the lowest insulating film 85L among the multiple insulating films 85. Of both ends of the second wiring portion 133A in the Y direction, a first end closer to the chip side surface 80c of the transformer chip 80 is provided at a position overlapping with the first wiring portion 132A in a plan view. The second wiring portion 133A is connected to the first wiring portion 132A. A second end of the second wiring portion 133A opposite to the first end is provided at a position overlapping with the first back-surface coil 42A in a plan view. More specifically, the second end is provided at a position overlapping with the inner end wiring 57A to which the first back-surface coil 42A is connected in a plan view. The connection wiring 131A includes a plurality of vias 134A that connect the second wiring portion 133A and the inner end wiring 57A. Note that, as shown in Fig. 6, the connection wirings 131C, 131E, and 131G include first wiring portions 132C, 132E, and 132G, second wiring portions 133C, 133E, and 133G, and a plurality of vias (not shown), similar to the connection wiring 131A.

[0095] As shown in FIGS. 5 and 6 , the outer end wiring 58A is electrically connected to the second pad 82B via a connection wiring 131B. The outer end wiring 58B is electrically connected to the fourth pad 82D via a connection wiring 131D. The outer end wiring 58C is electrically connected to the sixth pad 82F via a connection wiring 131F. The outer end wiring 58D is electrically connected to the eighth pad 82H via a connection wiring 131H. The connection wirings 131B, 131D, 131F, and 131H contain one or more appropriately selected materials selected from Ti, TiN, Au, Ag, Cu, Al, and W. The connection wirings 131B, 131D, 131F, and 131H have the same configuration as the connection wiring 131A. Therefore, detailed descriptions of the configurations of the connection wirings 131B, 131D, 131F, and 131H are omitted. Like the connection wiring 131A, the connection wirings 131B, 131D, 131F, and 131H include first wiring portions 132B, 132D, 132F, and 132H, second wiring portions 133B, 133D, 133F, and 133H, and a plurality of vias (not shown). In this embodiment, the connection wirings 131B, 131D, 131F, and 131H also include substrate-side vias (not shown) that connect the second wiring portions 133B, 133D, 133F, and 133H to the substrate 83. In other words, the connection wirings 131B, 131D, 131F, and 131H are electrically connected to the substrate 83.

[0096] (First Coil) The configuration of the first coil 41 and its surroundings, and the connection structure between the first coil 41 and the first electrode pad 81 will be described with reference to FIGS. 5, 7, and 8. FIG.

[0097] As shown in FIG. 7 , the first coils 41 of the two pairs of first to fourth transformers 40A to 40D include first to eighth surface coils 41A to 41H. More specifically, the first coil 41 of the first transformer 40A of the first isolation transformer 40P is the "first surface coil 41A," and the first coil 41 of the second transformer 40B of the first isolation transformer 40P is the "second surface coil 41B." The first coil 41 of the third transformer 40C of the second isolation transformer 40Q is the "third surface coil 41C," and the first coil 41 of the fourth transformer 40D of the second isolation transformer 40Q is the "fourth surface coil 41D." The first coil 41 of the first transformer 40A of the third isolation transformer 40R is the "fifth surface coil 41E," and the first coil 41 of the second transformer 40B of the third isolation transformer 40R is the "sixth surface coil 41F." The first coil 41 of the third transformer 40C of the fourth isolation transformer 40S is a "seventh surface coil 41G," and the first coil 41 of the fourth transformer 40D of the fourth isolation transformer 40S is an "eighth surface coil 41H."

[0098] The first to eighth surface coils 41A to 48A are configured with first coil wiring 43. The first coil wiring 43 is formed in a spiral shape in a plan view. The second coil 42 includes one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W.

[0099] In the example shown in FIG. 7 , each of the first to eighth surface coils 41A to 41H is formed in a circular ring shape. The winding directions of adjacent surface coils in the X direction are opposite to each other among the first to eighth surface coils 41A to 41H. Specifically, the second surface coil 41B is formed by winding the first coil wiring 43 in a direction opposite to that of the first surface coil 41A in a plan view. The fourth surface coil 41D is formed by winding the first coil wiring 43 in a direction opposite to that of the third surface coil 41C in a plan view. The sixth surface coil 41F is formed by winding the first coil wiring 43 in a direction opposite to that of the fifth surface coil 41E in a plan view. The eighth surface coil 41H is formed by winding the first coil wiring 43 in a direction opposite to that of the seventh surface coil 41G in a plan view. The first coil wiring 43 in the first to eighth surface coils 41A to 41H has the same number of turns. In one example, the first coil wiring 43 is formed in the same winding direction as the second coil wiring 44 shown in Fig. 6 in a plan view. The number of turns of the first coil wiring 43 in the first to eighth surface coils 41A to 41H is the same as the number of turns of the second coil wiring 44 in the first to eighth back surface coils 42A to 42H.

[0100] As shown in FIG. 5 , a first pad 81A is disposed at a position overlapping the first surface coil 41A and the second surface coil 41B in a plan view. A second pad 81B is disposed at a position overlapping the first surface coil 41A and the second surface coil 41B in a plan view. The second pad 81B can also be said to be disposed outside the first coil wiring 43 of the first surface coil 41A and the second surface coil 41B. One end of the first coil wiring 43 of the first surface coil 41A and the second surface coil 41B is electrically connected to the first pad 81A. The other end of the first coil wiring 43 of the first surface coil 41A and the second surface coil 41B is electrically connected to the second pad 81B. Therefore, the second pad 81B is configured as a pad common to the first surface coil 41A and the second surface coil 41B.

[0101] A third pad 81C is disposed at a position overlapping the third surface coil 41C and the fourth surface coil 41D in a plan view. A fourth pad 81D is disposed at a position overlapping the third surface coil 41C and the fourth surface coil 41D in a plan view. The fourth pad 81D can also be said to be disposed outside the first coil wiring 43 of the third surface coil 41C and the fourth surface coil 41D. One end of the first coil wiring 43 of the third surface coil 41C and the fourth surface coil 41D is electrically connected to the third pad 81C. The other end of the first coil wiring 43 of the third surface coil 41C and the fourth surface coil 41D is electrically connected to the fourth pad 81D. Therefore, the fourth pad 81D is configured as a pad common to the third surface coil 41C and the fourth surface coil 41D.

[0102] A fifth pad 81E is disposed at a position overlapping the fifth surface coil 41E and the sixth surface coil 41F in a plan view. A sixth pad 81F is disposed at a position overlapping the fifth surface coil 41E and the sixth surface coil 41F in a plan view. The sixth pad 81F can also be said to be disposed outside the first coil wiring 43 of the fifth surface coil 41E and the sixth surface coil 41F. One end of the first coil wiring 43 of the fifth surface coil 41E and the sixth surface coil 41F is electrically connected to the fifth pad 81E. The other end of the first coil wiring 43 of the fifth surface coil 41E and the sixth surface coil 41F is electrically connected to the sixth pad 81F. Therefore, the sixth pad 81F is configured as a pad shared by the fifth surface coil 41E and the sixth surface coil 41F.

[0103] A seventh pad 81G is disposed at a position overlapping the seventh surface coil 41G and the eighth surface coil 41H in a plan view. An eighth pad 81H is disposed at a position overlapping between the seventh surface coil 41G and the eighth surface coil 41H in a plan view. The eighth pad 81H can also be said to be disposed outside the first coil wiring 43 of the seventh surface coil 41G and the eighth surface coil 41H. One end of the first coil wiring 43 of the seventh surface coil 41G and the eighth surface coil 41H is electrically connected to the seventh pad 81G. The other end of the first coil wiring 43 of the seventh surface coil 41G and the eighth surface coil 41H is electrically connected to the eighth pad 81H. Therefore, the eighth pad 81H is configured as a pad common to the seventh surface coil 41G and the eighth surface coil 41H.

[0104] The configurations of the second pad 81B, the fourth pad 81D, the sixth pad 81F, and the eighth pad 81H can be changed as desired. For example, the second pad 81B may be provided for each of the first surface coil 41A and the second surface coil 41B. For example, the fourth pad 81D may be provided for each of the third surface coil 41C and the fourth surface coil 41D. For example, the sixth pad 81F may be provided for each of the fifth surface coil 41E and the sixth surface coil 41F. For example, the eighth pad 81H may be provided for each of the seventh surface coil 41G and the eighth surface coil 41H.

[0105] 7 , inner end wiring 51A is arranged inside the first coil wiring 43 of each of the first surface coil 41A and the second surface coil 41B, and outer end wiring 52A is arranged outside the first coil wiring 43 of the first surface coil 41A and the second surface coil 41B. One end of the first coil wiring 43 of the first surface coil 41A and the second surface coil 41B is electrically connected to the inner end wiring 51A, and the other end of the first coil wiring 43 is electrically connected to the outer end wiring 52A. The outer end wiring 52A is configured as an end wiring common to the first surface coil 41A and the second surface coil 41B.

[0106] An inner end wiring 51B is arranged inside the first coil wiring 43 of each of the third surface coil 41C and the fourth surface coil 41D, and an outer end wiring 52B is arranged outside the first coil wiring 43 of the third surface coil 41C and the fourth surface coil 41D. One end of the first coil wiring 43 of the third surface coil 41C and the fourth surface coil 41D is electrically connected to the inner end wiring 51B, and the other end of the first coil wiring 43 is electrically connected to the outer end wiring 52B. The outer end wiring 52B is configured as an end wiring common to the third surface coil 41C and the fourth surface coil 41D.

[0107] An inner end wiring 51C is arranged inside the first coil wiring 43 of each of the fifth surface coil 41E and the sixth surface coil 41F, and an outer end wiring 52C is arranged outside the first coil wiring 43 of the fifth surface coil 41E and the sixth surface coil 41F. One end of the first coil wiring 43 of the fifth surface coil 41E and the sixth surface coil 41F is electrically connected to the inner end wiring 51C, and the other end of the first coil wiring 43 is electrically connected to the outer end wiring 52C. The outer end wiring 52C is configured as an end wiring common to the fifth surface coil 41E and the sixth surface coil 41F.

[0108] An inner end wiring 51D is arranged inside the first coil wiring 43 of each of the seventh surface coil 41G and the eighth surface coil 41H, and an outer end wiring 52D is arranged outside the first coil wiring 43 of the seventh surface coil 41G and the eighth surface coil 41H. One end of the first coil wiring 43 of the seventh surface coil 41G and the eighth surface coil 41H is electrically connected to the inner end wiring 51D, and the other end of the first coil wiring 43 is electrically connected to the outer end wiring 52D. The outer end wiring 52D is configured as an end wiring common to the seventh surface coil 41G and the eighth surface coil 41H. The inner end wirings 51A to 51D and the outer end wirings 52A to 52D contain a material selected from one or more of Ti, TiN, Au, Ag, Cu, Al, and W.

[0109] Here, one end of the first coil wiring 43 is an inner end of the spiral-shaped first coil wiring 43 in a plan view. The other end of the first coil wiring 43 is an outer end of the spiral-shaped first coil wiring 43 in a plan view. The configuration of the outer end wirings 52A to 52D can be changed as desired. The outer end wiring 52A may be provided for each of the first surface coil 41A and the second surface coil 41B. The outer end wiring 52B may be provided for each of the third surface coil 41C and the fourth surface coil 41D. The outer end wiring 52C may be provided for each of the fifth surface coil 41E and the sixth surface coil 41F. The outer end wiring 52D may be provided for each of the seventh surface coil 41G and the eighth surface coil 41H.

[0110] As shown in FIG. 8 , the inner end wiring 51A is disposed at a position overlapping the first pad 81A in a plan view. The inner end wiring 51A is electrically connected to the first pad 81A by a via 53. The via 53 penetrates the uppermost insulating film 85U. Although not shown, the connection structures between the inner end wiring 51B and the third pad 81C, the connection structure between the inner end wiring 51C and the fifth pad 81E, and the connection structure between the inner end wiring 51D and the seventh pad 81G are the same as the connection structure between the inner end wiring 51A and the first pad 81A. Also, although not shown, the connection structures between the outer end wiring 52A and the second pad 81B, the connection structure between the outer end wiring 52B and the fourth pad 81D, the connection structure between the outer end wiring 52C and the sixth pad 81F, and the connection structure between the outer end wiring 52D and the eighth pad 81H are also the same as the connection structure between the inner end wiring 51A and the first pad 81A.

[0111] As shown in FIG. 7 , the transformer chip 80 includes dummy wiring 45 formed around the first to eighth surface coils 41A to 41H. The dummy wiring 45 is a wiring pattern formed so that no current flows through the first coil wiring 43 of the first to eighth surface coils 41A to 41H. The dummy wiring 45 is disposed in the same position as the first to eighth surface coils 41A to 41H in the Z direction. The dummy wiring 45 includes one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. The detailed configuration of the dummy wiring 45 will be described later.

[0112] The transformer chip 80 further includes floating dummy wirings 140 that surround the first to eighth surface coils 41A to 41H and the dummy wirings 45 in a plan view and are insulated from the dummy wirings 45. The floating dummy wirings 140 are disposed in the same positions as the first to eighth surface coils 41A to 41H and the dummy wirings 45 in the Z direction. The floating dummy wirings 140 are also insulated from the first to eighth surface coils 41A to 41H. In other words, the floating dummy wirings 140 are electrically independent from both the first to eighth surface coils 41A to 41H and the dummy wirings 45. The floating dummy wirings 140 suppress an increase in the electric field strength around the first to eighth surface coils 41A to 41H. In one example, the floating dummy wirings 140 are formed in a closed loop that surrounds the first to eighth surface coils 41A to 41H and the dummy wirings 45. The floating dummy wiring 140 includes one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. The shape of the floating dummy wiring 140 can be changed as desired. In one example, the floating dummy wiring 140 may be formed in the shape of an open ring that surrounds the first to eighth surface coils 41A to 41H and the dummy wiring 45 and has an open portion.

[0113] (Arrangement Relationship Between Surface Coils and Back Coils) The arrangement relationship between the first to eighth surface coils 41A to 41H and the first to eighth back coils 42A to 42H will be described using Figure 8. Figure 8 shows the arrangement relationship between the first surface coil 41A and the first back coil 42A. Note that the arrangement relationship between the second to eighth surface coils 41B to 41H and the second to eighth back coils 42B to 42H is the same as that between the first surface coil 41A and the first back coil 42A. Therefore, below, the arrangement relationship between the first surface coil 41A and the first back coil 42A will be described, and a description of the arrangement relationship between the second to eighth surface coils 41B to 41H and the second to eighth back coils 42B to 42H will be omitted.

[0114] As shown in FIG. 8 , the first back surface coil 42A and the first surface coil 41A are arranged opposite each other in the Z direction with the insulating film 85 interposed therebetween. In this embodiment, the first back surface coil 42A and the first surface coil 41A are arranged opposite each other in the Z direction with the insulating film 85 interposed therebetween. In the Z direction, the first surface coil 41A is arranged farther from the substrate 83 than the first back surface coil 42A. The first surface coil 41A is located higher than the first back surface coil 42A. In other words, the first back surface coil 42A is arranged closer to the substrate 83 than the first surface coil 41A. The first back surface coil 42A is arranged closer to the lower surface 84r than the center of the insulating layer 84 in the Z direction. The first back surface coil 42A is arranged closer to the upper surface 84s than the center of the insulating layer 84 in the Z direction and spaced apart from the insulating film 85L, i.e., closer to the upper surface 84s. The first surface coil 41A is disposed closer to the lower surface 84r than the uppermost insulating film 85U. In one example, the first surface coil 41A is disposed adjacent to the uppermost insulating film 85U in the Z direction. In this embodiment, the distance in the Z direction between the first back surface coil 42A and the first surface coil 41A is greater than the distance between the first back surface coil 42A and the substrate main surface 83s of the substrate 83.

[0115] The first back surface coil 42A is configured as a conductive layer embedded in one insulating film 85. More specifically, a coil groove (second coil groove) that penetrates both the first insulating film 85A and the second insulating film 85B in the Z direction is formed in the insulating film 85Q in which the first back surface coil 42A is embedded. The conductive layer that constitutes the first back surface coil 42A is embedded in the coil groove of the insulating film 85Q. The insulating film 85Q in which the first back surface coil 42A is embedded is covered by the insulating film 85 that is adjacent to the insulating film 85Q in the Z direction. As a result, it can be said that the first back surface coil 42A is embedded in the insulating layer 84.

[0116] The first surface coil 41A is configured as a conductive layer embedded in one insulating film 85. More specifically, the insulating film 85P in which the first surface coil 41A is embedded has a coil groove (first coil groove) that penetrates both the first insulating film 85A and the second insulating film 85B in the Z direction. The conductive layer that constitutes the first surface coil 41A is embedded in the coil groove of the insulating film 85P. The insulating film 85P in which the first surface coil 41A is embedded is covered by the insulating film 85 (85U) that is adjacent to the insulating film 85P in the Z direction. As a result, it can be said that the first surface coil 41A is embedded in the insulating layer 84.

[0117] [Configuration of Dummy Wiring] The configuration of the dummy wiring 45 will be described with reference to Fig. 9 to Fig. 17. Fig. 9 to Fig. 11 are planar structures that schematically show the first to eighth surface coils 41A to 41H and the dummy wiring 45. Fig. 12 to Fig. 17 are planar structures that specifically show the first to eighth surface coils 41A to 41H and the dummy wiring 45.

[0118] (General Configuration of Dummy Wiring) First, the general configuration of the dummy wiring 45 will be described with reference to FIGS. 9 to 11. FIG. 9 schematically shows the relationship between the first to fourth transformers 40A to 40D and the dummy wiring 45. FIG. 10 schematically shows the relationship between the first isolation transformer 40P and the third isolation transformer 40R and the dummy wiring 45. FIG. 11 schematically shows the relationship between the second isolation transformer 40Q and the fourth isolation transformer 40S and the dummy wiring 45. Note that in FIG. 9, the dummy wiring 45 is shown as a single wire to make the drawing easier to understand.

[0119] As shown in FIG. 9 , dummy wiring 45 is provided for each pair of transformers 40A and 40B (first isolation transformers 40P and 40R) and for each pair of transformers 40C and 40D (second isolation transformers 40Q and 40S). More specifically, the dummy wiring 45 includes first to fourth dummy wiring 45A to 45D. The first dummy wiring 45A is formed around the first surface coil 41A and the second surface coil 41B of the first isolation transformer 40P. The second dummy wiring 45B is provided around the third surface coil 41C and the fourth surface coil 41D corresponding to the second isolation transformer 40Q. The third dummy wiring 45C is provided around the fifth surface coil 41E and the sixth surface coil 41F corresponding to the third isolation transformer 40R. The fourth dummy wiring 45D is arranged around the seventh surface coil 41G and the eighth surface coil 41H corresponding to the fourth isolation transformer 40S. The first to fourth dummy wirings 45A to 45D are insulated from one another. The first to fourth dummy wirings 45A to 45D are arranged side by side in the X direction. The first to fourth dummy wirings 45A to 45D are arranged spaced apart from one another. Note that FIG. 9 is a schematic diagram of the dummy wiring 45, and therefore the first to fourth dummy wirings 45A to 45D are all shown spaced apart in the X direction, but the actual first to fourth dummy wirings 45A to 45D are different. As will be described later with reference to FIGS. 12 to 17, the first dummy wiring 45A and the second dummy wiring 45B include portions that overlap with one another when viewed from the Y direction. The first dummy wiring 45A and the third dummy wiring 45C include portions that overlap with one another when viewed from the Y direction. The second dummy wiring 45B and the fourth dummy wiring 45D include portions that overlap each other when viewed from the Y direction.

[0120] In this embodiment, the third dummy wiring 45C and the fourth dummy wiring 45D arranged at both ends in the X direction have the same configuration. The first dummy wiring 45A and the second dummy wiring 45B arranged in the center in the X direction have the same configuration.

[0121] The first dummy wiring 45A includes a portion that is line-symmetric with respect to a virtual line VL1 that connects the center C1 of the first surface coil 41A and the center C2 of the second surface coil 41B. The first dummy wiring 45A also includes a portion that is line-symmetric with respect to a virtual line VL5 that passes through the center in the X direction between the center C1 of the first surface coil 41A and the center C2 of the second surface coil 41B and extends along the Y direction.

[0122] The second dummy wiring 45B includes a portion that is line-symmetric with respect to a virtual line VL2 that connects the center C3 of the third surface coil 41C and the center C4 of the fourth surface coil 41D. The second dummy wiring 45B also includes a portion that is line-symmetric with respect to a virtual line VL6 that passes through the center in the X direction between the center C3 of the third surface coil 41C and the center C4 of the fourth surface coil 41D and extends along the Y direction.

[0123] The third dummy wiring 45C includes a portion that is line-symmetric with respect to a virtual line VL3 that connects the center C5 of the fifth surface coil 41E and the center C6 of the sixth surface coil 41F. The third dummy wiring 45C also includes a portion that is line-symmetric with respect to a virtual line VL7 that passes through the center in the X direction between the center C5 of the fifth surface coil 41E and the center C6 of the sixth surface coil 41F and extends along the Y direction. The third dummy wiring 45C also includes a portion that is not line-symmetric with respect to the virtual line VL7.

[0124] The fourth dummy wiring 45D includes a portion that is line-symmetric with respect to a virtual line VL4 that connects the center C7 of the seventh surface coil 41G and the center C8 of the eighth surface coil 41H. The fourth dummy wiring 45D also includes a portion that is line-symmetric with respect to a virtual line VL8 that passes through the center in the X direction between the center C7 of the seventh surface coil 41G and the center C8 of the eighth surface coil 41H and extends along the Y direction. The fourth dummy wiring 45D also includes a portion that is not line-symmetric with respect to the virtual line VL8.

[0125] 10 , the first dummy wiring 45A includes a first wiring portion 161 and a second wiring portion 162, and a first pad connecting portion 171 and a second pad connecting portion 172. The first wiring portion 161 is disposed on one side of the first surface coil 41A and the second surface coil 41B in the Y direction. The first wiring portion 161 is formed in a straight line extending in the X direction. Here, "one side of the first surface coil 41A and the second surface coil 41B in the Y direction" refers to the side of the chip side surface 80c relative to the first surface coil 41A and the second surface coil 41B.

[0126] The first wiring portion 161 includes two first sub-wiring portions 161A and 161B that are aligned along the X direction. The lengths LA1 and LB1 of the two first sub-wiring portions 161A and 161B in the X direction are equal to each other. In other words, the first wiring portion 161 is separated at the center in the X direction to form the two first sub-wiring portions 161A and 161B.

[0127] The second wiring portion 162 is disposed on the other side of the first surface coil 41A and the second surface coil 41B in the Y direction. The second wiring portion 162 is formed in a straight line extending in the X direction. Here, the other side of the first surface coil 41A and the second surface coil 41B in the Y direction refers to the side of the chip side surface 80d relative to the first surface coil 41A and the second surface coil 41B.

[0128] The second wiring portion 162 includes two second sub-wiring portions 162A and 162B that are aligned along the X direction. The lengths LA2 and LB2 of the two second sub-wiring portions 162A and 162B in the X direction are equal to each other. That is, the two second sub-wiring portions 162A and 162B are formed by being separated at the center of the second wiring portion 162 in the X direction. In one example, the lengths LA1 and LA2 of the two first sub-wiring portions 161A and 161B in the X direction are equal to the lengths LA2 and LB2 of the two second sub-wiring portions 162A and 162B in the X direction.

[0129] The first pad connection portion 171 electrically connects the two first sub-wiring portions 161A, 161B to the second pad 81B of the first electrode pad 81. The second pad connection portion 172 electrically connects the two second sub-wiring portions 162A, 162B to the second pad 81B of the first electrode pad 81. That is, the first dummy wiring 45A is electrically connected to the second pad 81B. In other words, the first dummy wiring 45A is electrically connected to the first surface coil 41A and the second surface coil 41B. That is, the first dummy wiring 45A has the same potential (ground GND2) as the second ends of the first surface coil 41A and the second surface coil 41B.

[0130] 11 , the second dummy wiring 45B includes a third wiring portion 163 and a fourth wiring portion 164, and a third pad connection portion 173 and a fourth pad connection portion 174. The third wiring portion 163 is disposed on one side of the third surface coil 41C and the fourth surface coil 41D in the Y direction. The third wiring portion 163 is formed in a straight line extending in the X direction. Here, "one side of the third surface coil 41C and the fourth surface coil 41D in the Y direction" refers to the side of the chip side surface 80c relative to the third surface coil 41C and the fourth surface coil 41D.

[0131] The third wiring portion 163 includes two third sub-wiring portions 163A and 163B that are aligned along the X direction. The lengths LA3 and LB3 of the two third sub-wiring portions 163A and 163B in the X direction are equal to each other. That is, the two third sub-wiring portions 163A and 163B are formed by being separated at the center of the third wiring portion 163 in the X direction.

[0132] The fourth wiring portion 164 is disposed on the other side of the third surface coil 41C and the fourth surface coil 41D in the Y direction. The fourth wiring portion 164 is formed in a straight line extending in the X direction. Here, the other side of the third surface coil 41C and the fourth surface coil 41D in the Y direction refers to the side of the chip side surface 80d relative to the third surface coil 41C and the fourth surface coil 41D.

[0133] The fourth wiring portion 164 includes two fourth sub-wiring portions 164A and 164B that are aligned along the X direction. The lengths LA4 and LB4 of the two fourth sub-wiring portions 164A and 164B in the X direction are equal to each other. That is, the two fourth sub-wiring portions 164A and 164B are formed by being separated at the center of the fourth wiring portion 164 in the X direction. In one example, the lengths LA3 and LA3 of the two third sub-wiring portions 163A and 163B in the X direction are equal to the lengths LA4 and LB4 of the two fourth sub-wiring portions 164A and 164B in the X direction.

[0134] The third pad connection portion 173 electrically connects the two third sub-wiring portions 163A, 163B to the fourth pad 81D of the first electrode pad 81. The fourth pad connection portion 174 electrically connects the two fourth sub-wiring portions 164A, 164B to the fourth pad 81D of the first electrode pad 81. That is, the second dummy wiring 45B is electrically connected to the fourth pad 81D. In other words, the second dummy wiring 45B is electrically connected to the third surface coil 41C and the fourth surface coil 41D. That is, the second dummy wiring 45B has the same potential (ground GND2) as the second ends of the third surface coil 41C and the fourth surface coil 41D.

[0135] 10 , the third dummy wiring 45C includes a fifth wiring portion 165 and a sixth wiring portion 166, and a fifth pad connection portion 175 and a sixth pad connection portion 176. The fifth wiring portion 165 is disposed on one side of the fifth surface coil 41E and the sixth surface coil 41F in the Y direction. The fifth wiring portion 165 includes a linear portion formed in a straight line extending in the X direction and a curved portion that partially surrounds the fifth surface coil 41E in a plan view. Here, the one side of the fifth surface coil 41E and the sixth surface coil 41F in the Y direction refers to the side of the chip side surface 80c relative to the fifth surface coil 41E and the sixth surface coil 41F.

[0136] The fifth wiring portion 165 includes two fifth sub-wiring portions 165A and 165B that are aligned along the X direction. The fifth sub-wiring portion 165A includes a linear portion that extends linearly in the X direction and a curved portion that partially surrounds the fifth surface coil 41E in plan view. The fifth sub-wiring portion 165B is also linearly formed extending in the X direction. The length LA5 of the fifth sub-wiring portion 165A is longer than the length LB5 of the fifth sub-wiring portion 165B in the X direction.

[0137] The sixth wiring portion 166 is disposed on the other side of the fifth surface coil 41E and the sixth surface coil 41F in the Y direction. The sixth wiring portion 166 includes a straight portion formed in a linear shape extending in the X direction and a curved portion that partially surrounds the fifth surface coil 41E in a plan view. This curved portion is disposed at a position overlapping the curved portion of the fifth wiring portion 165 when viewed from the Y direction. Here, the other side of the fifth surface coil 41E and the sixth surface coil 41F in the Y direction refers to the side of the chip side surface 80d with respect to the fifth surface coil 41E and the sixth surface coil 41F.

[0138] The sixth wiring portion 166 includes two sixth sub-wiring portions 166A and 166B aligned along the X direction. The sixth sub-wiring portion 166A includes a linear portion extending linearly in the X direction and a curved portion that partially surrounds the fifth surface coil 41E in a plan view. The sixth sub-wiring portion 166B is linearly formed extending in the X direction. The length LA6 of the sixth sub-wiring portion 166A is longer than the length LB6 of the sixth sub-wiring portion 166B in the X direction. In one example, the length LB6 of the sixth sub-wiring portion 166B is equal to the length LB5 of the fifth sub-wiring portion 165B. In one example, the length LA6 of the sixth sub-wiring portion 166A is equal to the length LA5 of the fifth sub-wiring portion 165A.

[0139] The fifth pad connection portion 175 electrically connects the two fifth sub-wiring portions 165A, 165B to the sixth pad 81F of the first electrode pad 81. The sixth pad connection portion 176 electrically connects the two sixth sub-wiring portions 166A, 166B to the sixth pad 81F of the first electrode pad 81. That is, the third dummy wiring 45C is electrically connected to the sixth pad 81F. In other words, the third dummy wiring 45C is electrically connected to the fifth surface coil 41E and the sixth surface coil 41F. That is, the third dummy wiring 45C has the same potential (ground GND2) as the second ends of the fifth surface coil 41E and the sixth surface coil 41F.

[0140] 11 , the fourth dummy wiring 45D includes a seventh wiring portion 167 and an eighth wiring portion 168, and a seventh pad connection portion 177 and an eighth pad connection portion 178. The seventh wiring portion 167 is disposed on one side of the seventh surface coil 41G and the eighth surface coil 41H in the Y direction. The seventh wiring portion 167 includes a linear portion formed in a straight line extending in the X direction and a curved portion that partially surrounds the eighth surface coil 41H in a plan view. Here, the one side of the seventh surface coil 41G and the eighth surface coil 41H in the Y direction refers to the side of the chip side surface 80c with respect to the seventh surface coil 41G and the eighth surface coil 41H.

[0141] The seventh wiring portion 167 includes two seventh sub-wiring portions 167A and 167B that are aligned along the X direction. The seventh sub-wiring portion 167A includes a linear portion that extends linearly in the X direction and a curved portion that partially surrounds the eighth surface coil 41H in plan view. The seventh sub-wiring portion 167B is also linearly formed extending in the X direction. The length LA7 of the seventh sub-wiring portion 167A is longer than the length LB7 of the seventh sub-wiring portion 167B in the X direction.

[0142] The eighth wiring portion 168 is disposed on the other side of the seventh surface coil 41G and the eighth surface coil 41H in the Y direction. The eighth wiring portion 168 includes a straight portion formed in a linear shape extending in the X direction and a curved portion that partially surrounds the eighth surface coil 41H in a plan view. This curved portion is disposed at a position overlapping the curved portion of the seventh wiring portion 167 when viewed from the Y direction. Here, the other side of the seventh surface coil 41G and the eighth surface coil 41H in the Y direction refers to the side of the chip side surface 80d with respect to the seventh surface coil 41G and the eighth surface coil 41H.

[0143] The eighth wiring portion 168 includes two eighth sub-wiring portions 168A and 168B aligned along the X direction. The eighth sub-wiring portion 168A includes a linear portion extending linearly in the X direction and a curved portion that partially surrounds the eighth surface coil 41H in a plan view. The eighth sub-wiring portion 168B is linearly formed extending in the X direction. The length LA8 of the eighth sub-wiring portion 168A is longer than the length LB8 of the eighth sub-wiring portion 168B in the X direction. In one example, the length LB8 of the eighth sub-wiring portion 168B is equal to the length LB7 of the seventh sub-wiring portion 167B. In one example, the length LA8 of the eighth sub-wiring portion 168A is equal to the length LA7 of the seventh sub-wiring portion 167A.

[0144] The seventh pad connection portion 177 electrically connects the two seventh sub-wiring portions 167A, 167B to the eighth pad 81H of the first electrode pad 81. The eighth pad connection portion 178 electrically connects the two eighth sub-wiring portions 168A, 168B to the eighth pad 81H of the first electrode pad 81. That is, the fourth dummy wiring 45D is electrically connected to the eighth pad 81H. In other words, the fourth dummy wiring 45D is electrically connected to the seventh surface coil 41G and the eighth surface coil 41H. That is, the fourth dummy wiring 45D has the same potential (ground GND2) as the second ends of the seventh surface coil 41G and the eighth surface coil 41H.

[0145] 12 to 17, the detailed configuration of the first to fourth dummy wirings 45A to 45D will be described. Note that the second dummy wiring 45B has the same configuration as the first dummy wiring 45A, and therefore a detailed description thereof will be omitted. The fourth dummy wiring 45D has the same configuration as the third dummy wiring 45C, and therefore a detailed description thereof will be omitted.

[0146] FIG. 12 shows a schematic planar view of the first isolation transformer 40P and the first dummy wiring 45A in an enlarged view. FIG. 13 shows a schematic planar view of the first surface coil 41A of the first isolation transformer 40P in FIG. 12 and its periphery in an enlarged view. FIG. 14 shows a schematic planar view of the second surface coil 41B of the first isolation transformer 40P in FIG. 12 and its periphery in an enlarged view. FIG. 15 shows a schematic planar view of the third isolation transformer 40R, the third dummy wiring 45C, and their periphery in an enlarged view. FIG. 16 shows a schematic planar view of the fifth surface coil 41E of the third isolation transformer 40R in FIG. 15 and its periphery in an enlarged view. FIG. 17 shows a schematic planar view of the sixth surface coil 41F of the third isolation transformer 40R in FIG. 15 and its periphery in an enlarged view.

[0147] 12 to 14, the first dummy wiring 45A is formed to surround the first surface coil 41A and the second surface coil 41B of the first isolation transformer 40P. Meanwhile, in the region between the first surface coil 41A and the second surface coil 41B in the X direction, near the center in the Y direction, there is a region where the first dummy wiring 45A is not formed.

[0148] The first wiring portion 161 and the second wiring portion 162 of the first dummy wiring 45A are arranged adjacent to the first surface coil 41A and the second surface coil 41B in the Y direction on both sides of the first surface coil 41A and the second surface coil 41B in the Y direction.

[0149] The two first sub-wiring portions 161A and 161B of the first wiring portion 161 are arranged adjacent to each other in the X direction. As shown in Figures 13 and 14, the first sub-wiring portion 161A includes a plurality of first wiring layers 181A stacked in the Y direction and a first wiring connection layer 191A connecting the plurality of first wiring layers 181A. The first sub-wiring portion 161B includes a plurality of first wiring layers 181B stacked in the Y direction and a first wiring connection layer 191B connecting the plurality of first wiring layers 181B.

[0150] As shown in FIG. 13 , each first wiring layer 181A of the first sub-wiring unit 161A is positioned so as to overlap the first surface coil 41A when viewed from the Y direction. Each first wiring layer 181A extends along the X direction. The first wiring connection layer 191A of each first sub-wiring unit 161A is provided at one of the X-direction end portions of each first wiring layer 181A that is closer to the first sub-wiring unit 161B (see FIG. 14 ). The first wiring connection layer 191A extends along the Y direction. That is, the first wiring connection layer 191A connects the multiple first wiring layers 181A at the central portion of the first wiring unit 161 in the X direction. In one example, the end of each first wiring layer 181A that is farther from the first sub-wiring unit 161B than the first surface coil 41A is positioned on the opposite side of the second surface coil 41B in the X direction from the first surface coil 41A. That is, the first sub-wiring portion 161A is arranged so as to overlap the entire first surface coil 41A when viewed from the Y direction.

[0151] As shown in FIG. 14 , each first wiring layer 181B of the first sub-wiring unit 161B is positioned so as to overlap the second surface coil 41B when viewed from the Y direction. Each first wiring layer 181B extends along the X direction. The first wiring connection layer 191B of each first sub-wiring unit 161B is provided at one of the two X-direction ends of each first wiring layer 181B, the end closest to the first sub-wiring unit 161A (see FIG. 13 ). The first wiring connection layer 191B extends along the Y direction. In other words, the first wiring connection layer 191B connects the multiple first wiring layers 181B at the central portion of the first wiring unit 161 in the X direction. Therefore, the two first wiring connection layers 191A, 191B are adjacent to each other in the X direction. That is, the two first sub-wiring portions 161A, 161B extend in opposite directions from the two first wiring connection layers 191A, 191B adjacent to each other in the X direction. Specifically, the first wiring layer 181A of the first sub-wiring portion 161A extends in a direction away from the first wiring connection layer 191A and the first wiring layer 181B of the first sub-wiring portion 161B extends in a direction away from the first wiring connection layer 191B and the first wiring layer 181B of the first sub-wiring portion 161A.

[0152] In one example, of both ends in the X direction of each first wiring layer 181B, the end farther from the first sub-wiring portion 161A is disposed on the opposite side of the second surface coil 41B from the first surface coil 41A (see FIG. 13 ) in the X direction. In other words, the first sub-wiring portion 161B is disposed so as to overlap the entire second surface coil 41B when viewed from the Y direction.

[0153] As shown in FIG. 12 , the two second sub-wiring portions 162A and 162B of the second wiring portion 162 are arranged adjacent to each other in the X direction. As shown in FIGS. 13 and 14 , the second sub-wiring portion 162A includes a plurality of second wiring layers 182A stacked in the Y direction and a second wiring connection layer 192A connecting the plurality of second wiring layers 182A. The second sub-wiring portion 162B includes a plurality of second wiring layers 182B stacked in the Y direction and a second wiring connection layer 192B connecting the plurality of second wiring layers 182A. The configuration of the second sub-wiring portion 162A is the same as the configuration of the first sub-wiring portion 161A, and the configuration of the second sub-wiring portion 162B is the same as the configuration of the first sub-wiring portion 161B. Therefore, detailed descriptions of the configurations of the second sub-wiring portions 162A and 162B will be omitted. The second wiring connection layer 192A connects the plurality of second wiring layers 182A at the center in the X direction of the second wiring unit 162. The second wiring connection layer 192B connects the plurality of second wiring layers 182B at the center in the X direction of the second wiring unit 162. The second wiring connection layers 192A and 192B are adjacent to each other in the X direction. That is, the two second sub-wiring units 162A and 162B extend in opposite directions from the two second wiring connection layers 192A and 192B that are adjacent to each other in the X direction.

[0154] The first pad connection portion 171 of the first wiring portion 161 includes a first connection base portion 201, a second connection base portion 202, a plurality of first linear portions 211A and 211B, and a plurality of second linear portions 212A and 212B.

[0155] 13 , the first connection base 201 extends to surround at least the second pad 81B (first outer pad) side of the first surface coil 41A. In one example, the first connection base 201 is formed to surround the portion of the first surface coil 41A that is closer to the first wiring portion 161 in a plan view. In one example, the first connection base 201 extends in the X direction to the side of the first surface coil 41A opposite to the second pad 81B (first outer pad).

[0156] The first connection base 201 is integrated with the first wiring layer 181A, of the multiple first wiring layers 181A of the first sub-wiring portion 161A, that is closest to the first coil 41. This electrically connects the multiple first wiring layers 181A and the first connection base 201.

[0157] 14 , the second connection base 202 extends to surround at least the second pad 81B (first outer pad) side of the second surface coil 41B. In one example, the second connection base 202 is formed to surround the portion of the second surface coil 41B closer to the first wiring portion 161 in a plan view. In one example, the second connection base 202 extends to the side of the second surface coil 41B opposite the second pad 81B (first outer pad) in the X direction. In one example, the second connection base 202 is symmetrical to the first connection base 201 shown in FIG. 13 with respect to the virtual line VL5 (see FIG. 9 ).

[0158] The second connection base 202 is integrated with the first wiring layer 181B, which is closest to the second surface coil 41B, among the multiple first wiring layers 181B of the first sub-wiring portion 161B. This electrically connects the multiple first wiring layers 181B and the second connection base 202. The second connection base 202 is also integrated with the first connection base 201 at the end closest to the second pad 81B (first outer pad) in the Y direction. The integrated first connection base 201 and second connection base 202 are connected to the outer end wiring 52A by a first connection wiring 221 (see FIG. 12 ). The first connection wiring 221 extends along the Y direction.

[0159] 13 , the multiple first linear portions 211A are connected to the first connection base 201 and are aligned in the Y direction. Each first linear portion 211A is formed linearly extending in the X direction. Each first linear portion 211A extends from the first connection base 201 toward the second surface coil 41B. Each first linear portion 211A extends to a position adjacent to the second connection base 202 in the X direction.

[0160] The multiple first straight portions 211B are connected to the first connection base 201 and are aligned in the Y direction. The multiple first straight portions 211B are arranged apart from the multiple first straight portions 211A in the X direction on the opposite side of the second surface coil 41B. The multiple first straight portions 211B are formed in a straight line extending in the X direction. Each first straight portion 211B extends from the first connection base 201 toward the opposite side of the second surface coil 41B.

[0161] As shown in Fig. 14, the multiple second straight portions 212A are connected to the second connection base 202 and are arranged in the Y direction. Each second straight portion 212A is formed in a straight line extending in the X direction. Each second straight portion 212A extends from the second connection base 202 toward the first surface coil 41A. Each second straight portion 212A extends to a position adjacent to the first connection base 201 in the X direction. The multiple first straight portions 211A and the multiple second straight portions 212A are arranged in positions that overlap each other when viewed from the Y direction. The multiple first straight portions 211A and the multiple second straight portions 212A are arranged alternately one by one in the Y direction.

[0162] The multiple second straight portions 212B are connected to the second connection base 202 and are aligned in the Y direction. The multiple second straight portions 212B are spaced apart in the X direction on the opposite side of the first surface coil 41A from the multiple second straight portions 212A. The multiple second straight portions 212B are formed in a straight line extending in the X direction. Each second straight portion 212B extends from the second connection base 202 toward the opposite side of the second surface coil 41B.

[0163] As shown in Figures 13 and 14, the second pad connection portion 172 of the second wiring portion 162 includes a third connection base portion 203, a fourth connection base portion 204, a plurality of third straight portions 213A, 213B, and a plurality of fourth straight portions 214A, 214B.

[0164] 13 , the third connection base 203 extends to surround at least the second pad 81B (first outer pad) side of the first surface coil 41A. In one example, the third connection base 203 is formed to surround the portion of the first surface coil 41A that is closer to the second wiring portion 162 in a plan view. In one example, the third connection base 203 extends in the X direction to the side of the first surface coil 41A opposite to the second pad 81B (first outer pad).

[0165] The third connection base 203 is integrated with the second wiring layer 182A, of the plurality of second wiring layers 182A of the second sub-wiring portion 162A, that is closest to the first coil 41. This electrically connects the plurality of second wiring layers 182A and the third connection base 203.

[0166] The tip end 203A of the third connection base 203 is disposed in a position adjacent in the Y direction to the tip end 201A of the first connection base 201. In other words, the tip end 201A of the first connection base 201 and the tip end 203A of the third connection base 203 are adjacent in the Y direction.

[0167] 14 , the fourth connection base 204 extends to surround at least the second pad 81B (first outer pad) side of the second surface coil 41B. In one example, the fourth connection base 204 is formed to surround a portion of the second surface coil 41B closer to the second wiring portion 162 in a plan view. In one example, the fourth connection base 204 extends to the side of the second surface coil 41B opposite the second pad 81B (first outer pad) in the X direction. In one example, the fourth connection base 204 is symmetrical to the third connection base 203 shown in FIG. 13 with respect to the virtual line VL5 (see FIG. 9 ).

[0168] The fourth connection base 204 is integrated with the second wiring layer 182B closest to the second surface coil 41B among the multiple second wiring layers 182B of the second sub-wiring portion 162B. This electrically connects the multiple second wiring layers 182B and the fourth connection base 204. The fourth connection base 204 is also integrated with the third connection base 203 at the end closest to the second pad 81B (first outer pad) in the Y direction. The integrated third connection base 203 and fourth connection base 204 are connected to the first pad 81A by a second connection wiring 222 (see FIG. 12 ). The second connection wiring 222 extends along the Y direction. The dimension of the second connection wiring 222 in the Y direction is smaller than the dimension of the first connection wiring 221 in the Y direction.

[0169] The tip end 204A of the fourth connection base 204 is disposed in a position adjacent in the Y direction to the tip end 202A of the second connection base 202. In other words, the tip end 202A of the second connection base 202 and the tip end 204A of the fourth connection base 204 are adjacent in the Y direction.

[0170] As shown in Fig. 13, the multiple third linear portions 213A are connected to the third connection base 203 and are arranged in the Y direction. Each third linear portion 213A is formed in a straight line extending in the X direction. Each third linear portion 213A extends from the third connection base 203 toward the second surface coil 41B (see Fig. 14). Each third linear portion 213A extends to a position adjacent to the fourth connection base 204 in the X direction.

[0171] The multiple third straight portions 213B are connected to the third connection base 203 and are aligned in the Y direction. The multiple third straight portions 213B are arranged apart in the X direction on the opposite side of the second surface coil 41B from the multiple third straight portions 213A. The multiple third straight portions 213B are formed in a straight line extending in the X direction. Each third straight portion 213B extends from the third connection base 203 toward the opposite side of the second surface coil 41B. The multiple third straight portions 213B are arranged at positions overlapping the multiple first straight portions 211B when viewed from the Y direction. The multiple third straight portions 213B are arranged closer to the second sub-wiring portion 162A in the Y direction than the multiple first straight portions 211B.

[0172] As shown in FIG. 14 , the multiple fourth straight line portions 214A are connected to the fourth connection base 204 and are arranged in the Y direction. Each fourth straight line portion 214A is formed in a straight line extending in the X direction. Each fourth straight line portion 214A extends from the fourth connection base 204 toward the first surface coil 41A. Each fourth straight line portion 214A extends to a position adjacent to the third connection base 203 in the X direction. The multiple third straight line portions 213A and the multiple fourth straight line portions 214A are arranged in positions that overlap each other when viewed from the Y direction. The multiple third straight line portions 213A and the multiple fourth straight line portions 214A are arranged alternately one by one in the Y direction.

[0173] The multiple fourth straight line portions 214B are connected to the fourth connection base 204 and are aligned in the Y direction. The multiple fourth straight line portions 214B are arranged apart from the multiple third straight line portions 213A in the X direction on the opposite side of the first surface coil 41A. The multiple fourth straight line portions 214B are formed in a straight line extending in the X direction. Each fourth straight line portion 214B extends from the fourth connection base 204 toward the opposite side of the first surface coil 41A. The multiple fourth straight line portions 214B are arranged at positions overlapping with the multiple second straight line portions 212B when viewed from the Y direction. The multiple fourth straight line portions 214B are arranged closer to the second sub-wiring portion 162B in the Y direction than the multiple second straight line portions 212B.

[0174] (Second Dummy Wiring) Because the second dummy wiring 45B has the same configuration as the first dummy wiring 45A, each of the two third sub-wiring portions 163A, 163B has the same configuration as each of the two first sub-wiring portions 161A, 161B. Therefore, although not shown, each of the third sub-wiring portions 163A, 163B includes multiple third wiring layers stacked in the Y direction and a third wiring connection layer connecting the multiple third wiring layers. The third wiring connection layer connects the multiple third wiring layers at the center of the third wiring portion 163 in the X direction. The two third wiring connection layers are adjacent to each other in the X direction. The two third sub-wiring portions 163A, 163B extend in opposite directions from the two adjacent third wiring connection layers.

[0175] Furthermore, each of the two fourth sub-wiring portions 164A, 164B has the same configuration as each of the two second sub-wiring portions 162A, 162B. Therefore, although not shown, each of the fourth sub-wiring portions 164A, 164B includes a plurality of fourth wiring layers stacked in the Y direction and a fourth wiring connection layer that connects the plurality of fourth wiring layers. The fourth wiring connection layer connects the plurality of fourth wiring layers at the center portion of the fourth wiring portion 164 in the X direction. The two fourth wiring connection layers are adjacent to each other in the X direction. The two fourth sub-wiring portions 164A, 164B extend in opposite directions from the two adjacent fourth wiring connection layers.

[0176] The third pad connection portion 173 has the same configuration as the first pad connection portion 171. Therefore, although not shown, the third pad connection portion 173 includes a ninth connection base extending to surround at least the fourth pad 81D side of the third surface coil 41C, and a tenth connection base extending to surround at least the fourth pad 81D side of the fourth surface coil 41D. The ninth connection base is formed to surround a portion of the third surface coil 41C closer to the third wiring portion 163 in a plan view. The tenth connection base is formed to surround a portion of the fourth surface coil 41D closer to the third wiring portion 163 in a plan view.

[0177] Furthermore, the third pad connection portion 173 includes a plurality of ninth straight portions connected to the ninth connection base and a plurality of tenth straight portions connected to the tenth connection base. The plurality of ninth straight portions are aligned in the Y direction. Each of the ninth straight portions is formed in a straight line extending in the X direction. The plurality of tenth straight portions are aligned in the Y direction. Each of the tenth straight portions is formed in a straight line extending in the X direction. The plurality of ninth straight portions and the plurality of tenth straight portions are alternately arranged in the Y direction.

[0178] The fourth pad connection portion 174 has the same configuration as the second pad connection portion 172. Therefore, although not shown, the fourth pad connection portion 174 includes an eleventh connection base extending to surround at least the fourth pad 81D side of the third surface coil 41C and a twelfth connection base extending to surround at least the fourth pad 81D side of the fourth surface coil 41D. The eleventh connection base is formed to surround a portion of the third surface coil 41C closer to the fourth wiring portion 164 in a plan view. The twelfth connection base is formed to surround a portion of the fourth surface coil 41D closer to the fourth wiring portion 164 in a plan view. The tip of the ninth connection base and the tip of the eleventh connection base are adjacent to each other in the Y direction. The tip of the tenth connection base and the tip of the twelfth connection base are adjacent to each other in the Y direction.

[0179] Furthermore, the fourth pad connection portion 174 includes a plurality of eleventh straight portions connected to the eleventh connection base and a plurality of twelfth straight portions connected to the twelfth connection base. The plurality of eleventh straight portions are aligned in the Y direction. Each of the eleventh straight portions is formed in a straight line extending in the X direction. The plurality of twelfth straight portions are aligned in the Y direction. Each of the twelfth straight portions is formed in a straight line extending in the X direction. The plurality of eleventh straight portions and the plurality of twelfth straight portions are alternately arranged in the Y direction.

[0180] 15, the third dummy wiring 45C is formed so as to surround the fifth surface coil 41E and the sixth surface coil 41F. Meanwhile, in the region between the fifth surface coil 41E and the sixth surface coil 41F in the X direction, near the center in the Y direction, there is a region where the third dummy wiring 45C is not formed.

[0181] The fifth wiring portion 165 and the sixth wiring portion 166 of the third dummy wiring 45C are arranged adjacent to the fifth surface coil 41E and the sixth surface coil 41F in the Y direction on both sides of the fifth surface coil 41E and the sixth surface coil 41F in the Y direction.

[0182] The two fifth sub-wiring portions 165A and 165B of the fifth wiring portion 165 are arranged adjacent to each other in the X direction. As shown in Figures 16 and 17 , the fifth sub-wiring portion 165A includes a plurality of fifth wiring layers 185A stacked in the Y direction and a fifth wiring connection layer 195A connecting the plurality of fifth wiring layers 185A. The fifth sub-wiring portion 165B includes a plurality of fifth wiring layers 185B stacked in the Y direction and a fifth wiring connection layer 195B connecting the plurality of fifth wiring layers 185B.

[0183] As shown in FIG. 16 , each fifth wiring layer 185A of the fifth sub-wiring unit 165A is positioned so as to overlap the fifth surface coil 41E when viewed from the Y direction. Each fifth wiring layer 185A includes a straight portion 185AA formed in a linear shape extending along the X direction and a curved portion 185AB that curves to surround the first coil 41 in a plan view. In this embodiment, the straight portion 185AA and the curved portion 185AB are integrated. The fifth wiring connection layer 195A of the fifth sub-wiring unit 165A is provided at one of both ends of the straight portion 185AA of each fifth wiring layer 185A in the X direction, the end closer to the fifth sub-wiring unit 165B (see FIG. 17 ). The fifth wiring connection layer 195A extends along the Y direction. In one example, of both end portions of the curved portion 185AB of each fifth wiring layer 185A, the end portion farther from the straight portion 185AA is disposed on the opposite side of the fifth surface coil 41E from the outer end wiring 52C in the X direction. In other words, the fifth sub-wiring portion 165A is disposed so as to overlap the entire fifth surface coil 41E when viewed from the Y direction.

[0184] As shown in FIG. 17 , each fifth wiring layer 185B of the fifth sub-wiring portion 165B is positioned so as to overlap the sixth surface coil 41F when viewed from the Y direction. Each fifth wiring layer 185B extends along the X direction. The fifth wiring connection layer 195B of each fifth sub-wiring portion 165B is provided at one of the X-direction ends of each fifth wiring layer 185B that is closer to the fifth sub-wiring portion 165A (see FIG. 16 ). The fifth wiring connection layer 195B extends along the Y direction. The two fifth wiring connection layers 195A, 195B are adjacent to each other in the X direction. That is, the two fifth sub-wiring portions 165A, 165B extend in opposite directions from the two fifth wiring connection layers 195A, 195B that are adjacent to each other in the X direction. Specifically, the fifth wiring layer 185A of the fifth sub-wiring portion 165A extends in a direction away from the fifth wiring connection layer 195A and the fifth wiring layer 185B of the fifth sub-wiring portion 165B extends in a direction away from the fifth wiring connection layer 195B and the fifth sub-wiring portion 165A.

[0185] In addition, in one example, of both ends in the X direction of each fifth wiring layer 185B, the end farthest from the fifth sub-wiring portion 165A is arranged on the opposite side of the sixth surface coil 41F from the outer end wiring 52C in the X direction. In other words, the fifth sub-wiring portion 165B is arranged to overlap the entire sixth surface coil 41F when viewed from the Y direction.

[0186] As shown in FIG. 15 , the two sixth sub-wiring portions 166A and 166B of the sixth wiring portion 166 are arranged adjacent to each other in the X direction. As shown in FIGS. 16 and 17 , the sixth sub-wiring portion 166A includes a plurality of sixth wiring layers 186A stacked in the Y direction and a sixth wiring connection layer 196A connecting the plurality of sixth wiring layers 186A. The sixth sub-wiring portion 166B includes a plurality of sixth wiring layers 186B stacked in the Y direction and a sixth wiring connection layer 196B connecting the plurality of sixth wiring layers 186A. The configuration of the sixth sub-wiring portion 166A is the same as the configuration of the fifth sub-wiring portion 165A, and the configuration of the sixth sub-wiring portion 166B is the same as the configuration of the fifth sub-wiring portion 165B. Therefore, detailed configurations of the sixth sub-wiring portions 166A and 166B will not be described. The sixth wiring connection layers 196A and 196B are adjacent to each other in the X direction. That is, the two sixth sub-wiring portions 166A, 166B extend in opposite directions from the two sixth wiring connection layers 196A, 196B that are adjacent to each other in the X direction. Also, as shown in FIG. 16 , the tip end of the fifth wiring layer 185A and the tip end of the sixth wiring layer 186A are disposed adjacent to each other in the Y direction.

[0187] As shown in Figures 16 and 17, the fifth pad connection portion 175 of the fifth wiring portion 165 includes a fifth connection base portion 205, a sixth connection base portion 206, a plurality of fifth straight portions 215, and a plurality of sixth straight portions 216A, 216B.

[0188] 16 , the fifth connection base 205 extends to surround at least the sixth pad 81F (outer end wiring 52C) side of the fifth surface coil 41E. In one example, the fifth connection base 205 is formed to surround the portion of the fifth surface coil 41E that is closer to the fifth wiring portion 165 in plan view.

[0189] The fifth connection base 205 is integrated with the fifth wiring layer 185A that is closest to the fifth surface coil 41E among the plurality of fifth wiring layers 185A of the fifth sub-wiring portion 165A, thereby electrically connecting the plurality of fifth wiring layers 185A and the fifth connection base 205.

[0190] 17 , the sixth connection base 206 extends to surround at least the sixth pad 81F (outer end wiring 52C) side of the sixth surface coil 41F. In one example, the sixth connection base 206 is formed to surround a portion of the sixth surface coil 41F closer to the sixth wiring portion 166 in a plan view. In one example, the sixth connection base 206 is symmetrical to the fifth connection base 205 shown in FIG. 16 with respect to the virtual line VL7 (see FIG. 9 ).

[0191] The sixth connection base 206 is integrated with the fifth wiring layer 185B closest to the sixth surface coil 41F among the plurality of fifth wiring layers 185B of the fifth sub-wiring portion 165B. This electrically connects the plurality of fifth wiring layers 185B and the sixth connection base 206. The sixth connection base 206 is also integrated with the fifth connection base 205 at the end closest to the sixth pad 81F in the Y direction. The integrated fifth connection base 205 and sixth connection base 206 are connected to the sixth pad 81F (outer end wiring 52C) by a fifth connection wiring 225 (see FIG. 15 ). The fifth connection wiring 225 extends along the Y direction.

[0192] As shown in Fig. 16, the multiple fifth straight portions 215 are connected to the fifth connection base 205 and are arranged in the Y direction. Each fifth straight portion 215 is formed in a straight line extending in the X direction. Each fifth straight portion 215 extends from the fifth connection base 205 toward the sixth surface coil 41F (see Fig. 17). Each fifth straight portion 215 extends to a position adjacent to the second connection base 202 shown in Fig. 17 in the X direction.

[0193] The multiple sixth straight line portions 216A are connected to the sixth connection base 206 and are arranged in the Y direction. Each sixth straight line portion 216A is formed in a straight line extending in the X direction. Each sixth straight line portion 216A extends from the sixth connection base 206 toward the fifth surface coil 41E. Each sixth straight line portion 216A extends to a position adjacent to the fifth connection base 205 in the X direction. The multiple fifth straight line portions 215 and the multiple sixth straight line portions 216A are arranged in positions that overlap each other when viewed from the Y direction. The multiple fifth straight line portions 215 and the multiple sixth straight line portions 216A are arranged alternately one by one in the Y direction.

[0194] As shown in FIG. 17 , the sixth linear portions 216B are connected to the sixth connection base 206 and are arranged in the Y direction. The sixth linear portions 216B are spaced apart from the sixth linear portions 216A in the X direction on the opposite side of the fifth surface coil 41E (see FIG. 16 ). The sixth linear portions 216B are formed in a straight line extending in the X direction. Each sixth linear portion 216B extends from the sixth connection base 206 toward the opposite side of the fifth surface coil 41E. The sixth linear portions 216B are arranged in positions overlapping the first linear portions 211B when viewed from the Y direction. The sixth linear portions 216B and the first linear portions 211B are arranged alternately one by one in the Y direction.

[0195] As shown in Figures 16 and 17, the sixth pad connection portion 176 of the sixth wiring portion 166 includes a seventh connection base portion 207, an eighth connection base portion 208, a plurality of seventh straight portions 217, and a plurality of eighth straight portions 218A, 218B.

[0196] 16 , the seventh connection base 207 extends to surround at least the sixth pad 81F (outer end wiring 52C) side of the fifth surface coil 41E. In one example, the seventh connection base 207 is formed to surround a portion of the fifth surface coil 41E that is closer to the sixth wiring portion 166 in a plan view. In one example, the seventh connection base 207 extends to the side of the fifth surface coil 41E opposite to the sixth pad 81F in the X direction.

[0197] The seventh connection base 207 is integrated with the sixth wiring layer 186A that is closest to the fifth surface coil 41E among the plurality of sixth wiring layers 186A of the sixth sub-wiring portion 166A, thereby electrically connecting the plurality of sixth wiring layers 186A and the seventh connection base 207.

[0198] The tip end 207A of the seventh connection base 207 is disposed in a position adjacent in the Y direction to the tip end 205A of the fifth connection base 205. In other words, the tip end 207A of the seventh connection base 207 and the tip end 205A of the fifth connection base 205 are adjacent in the Y direction.

[0199] 17 , the eighth connection base 208 extends to surround at least the sixth pad 81F (outer end wiring 52C) side of the sixth surface coil 41F. In one example, the eighth connection base 208 is formed to surround a portion of the sixth surface coil 41F closer to the sixth wiring portion 166 in a plan view. In one example, the eighth connection base 208 extends to the side of the sixth surface coil 41F opposite the sixth pad 81F in the X direction. In one example, the eighth connection base 208 is symmetrical to the seventh connection base 207 shown in FIG. 16 with respect to the imaginary line VL7 (see FIG. 9 ).

[0200] The eighth connection base 208 is integrated with the sixth wiring layer 186B closest to the sixth surface coil 41F among the multiple sixth wiring layers 186B of the sixth sub-wiring portion 166B. This electrically connects the multiple sixth wiring layers 186B and the eighth connection base 208. The eighth connection base 208 is also integrated with the seventh connection base 207 at the end closest to the sixth pad 81F in the Y direction. The integrated seventh connection base 207 and eighth connection base 208 are connected to the sixth pad 81F (outer end wiring 52C) by a sixth connection wiring 226 (see FIG. 15 ). The sixth connection wiring 226 extends along the Y direction. The Y-direction dimension of the sixth connection wiring 226 is smaller than the Y-direction dimension of the fifth connection wiring 225.

[0201] The tip 208A of the eighth connection base 208 is disposed in a position adjacent in the Y direction to the tip 206A of the sixth connection base 206. In other words, the tip 206A of the sixth connection base 206 and the tip 208A of the eighth connection base 208 are adjacent in the Y direction.

[0202] 16 , the seventh straight line portions 217 are connected to the seventh connection base 207 and are arranged in the Y direction. Each seventh straight line portion 217 is formed in a straight line extending in the X direction. Each seventh straight line portion 217 extends from the seventh connection base 207 toward the sixth surface coil 41F. Each seventh straight line portion 217 extends to a position adjacent to the eighth connection base 208 in the X direction.

[0203] As shown in FIG. 17 , the multiple eighth linear portions 218A are connected to the eighth connection base 208 and are arranged in the Y direction. Each eighth linear portion 218A is formed linearly extending in the X direction. Each eighth linear portion 218A extends from the eighth connection base 208 toward the fifth surface coil 41E. Each eighth linear portion 218A extends to a position adjacent to the seventh connection base 207 (see FIG. 16 ) in the X direction. The multiple seventh linear portions 217 and the multiple eighth linear portions 218A are arranged in positions that overlap each other when viewed from the Y direction. The multiple seventh linear portions 217 and the multiple eighth linear portions 218A are arranged alternately one by one in the Y direction.

[0204] The eighth linear portions 218B are connected to the eighth connection base 208 and are aligned in the Y direction. The eighth linear portions 218B are spaced apart from the seventh linear portions 217 in the X direction on the opposite side of the sixth pad 81F (outer end wiring 52C). The eighth linear portions 218B are formed linearly extending in the X direction. Each eighth linear portion 218B extends from the eighth connection base 208 toward the opposite side of the sixth pad 81F. The eighth linear portions 218B are positioned so as to overlap with the sixth linear portions 216B when viewed from the Y direction. The eighth linear portions 218B are positioned closer to the sixth sub-wiring portion 166B than the sixth linear portions 216B in the Y direction. The eighth linear portions 218B are positioned so as to overlap with the third linear portions 213B when viewed from the Y direction. The plurality of eighth straight line portions 218B and the plurality of third straight line portions 213B are arranged alternately one by one in the Y direction.

[0205] (Fourth Dummy Wiring) Because the fourth dummy wiring 45D has the same configuration as the third dummy wiring 45C, each of the two seventh sub-wiring portions 167A, 167B has the same configuration as each of the two fifth sub-wiring portions 165A, 165B. Therefore, although not shown, each of the seventh sub-wiring portions 167A, 167B includes multiple seventh wiring layers stacked in the Y direction and a seventh wiring connection layer connecting the multiple seventh wiring layers. The two seventh wiring connection layers are adjacent to each other in the X direction. The two seventh sub-wiring portions 167A, 167B extend in opposite directions from the two adjacent seventh wiring connection layers.

[0206] Furthermore, each of the two eighth sub-wiring portions 168A, 168B has the same configuration as each of the two sixth sub-wiring portions 166A, 166B. Therefore, although not shown, each of the eighth sub-wiring portions 168A, 168B includes a plurality of eighth wiring layers stacked in the Y direction and an eighth wiring connection layer that connects the plurality of eighth wiring layers. The two eighth wiring connection layers are adjacent to each other in the X direction. The two eighth sub-wiring portions 168A, 168B extend in opposite directions from the two adjacent eighth wiring connection layers.

[0207] The seventh pad connection portion 177 has the same configuration as the fifth pad connection portion 175. Therefore, although not shown, the seventh pad connection portion 177 includes a thirteenth connection base extending to surround at least the eighth pad 81H side of the seventh surface coil 41G, and a fourteenth connection base extending to surround at least the eighth pad 81H side of the eighth surface coil 41H. The thirteenth connection base is formed to surround a portion of the seventh surface coil 41G closer to the seventh wiring portion 167 in a plan view. The fourteenth connection base is formed to surround a portion of the seventh surface coil 41G closer to the seventh wiring portion 167 in a plan view.

[0208] Furthermore, the seventh pad connection portion 177 includes a plurality of thirteenth straight portions connected to the thirteenth connection base and a plurality of fourteenth straight portions connected to the fourteenth connection base. The plurality of thirteenth straight portions are aligned in the Y direction. Each of the thirteenth straight portions is formed in a straight line extending in the X direction. The plurality of fourteenth straight portions are aligned in the Y direction. Each of the fourteenth straight portions is formed in a straight line extending in the X direction. The plurality of thirteenth straight portions and the plurality of fourteenth straight portions are alternately arranged in the Y direction.

[0209] The eighth pad connection portion 178 has the same configuration as the sixth pad connection portion 176. Therefore, although not shown, the eighth pad connection portion 178 includes a fifteenth connection base extending to surround at least the eighth pad 81H side of the seventh surface coil 41G and a sixteenth connection base extending to surround at least the eighth pad 81H side of the eighth surface coil 41H. The fifteenth connection base is formed to surround a portion of the seventh surface coil 41G closer to the eighth wiring portion 168 in a plan view. The sixteenth connection base is formed to surround a portion of the eighth surface coil 41H closer to the eighth wiring portion 168 in a plan view. The tip of the thirteenth connection base and the tip of the fifteenth connection base are adjacent to each other in the Y direction. The tip of the fourteenth connection base and the tip of the sixteenth connection base are adjacent to each other in the Y direction.

[0210] Furthermore, the eighth pad connection portion 178 includes a plurality of fifteenth straight portions connected to the fifteenth connection base and a plurality of sixteenth straight portions connected to the sixteenth connection base. The plurality of fifteenth straight portions are aligned in the Y direction. Each of the fifteenth straight portions is formed in a straight line extending in the X direction. The plurality of sixteenth straight portions are aligned in the Y direction. Each of the sixteenth straight portions is formed in a straight line extending in the X direction. The plurality of fifteenth straight portions and the plurality of sixteenth straight portions are alternately arranged in the Y direction.

[0211] [Operation] The operation of the transformer chip 80 of this embodiment will be described. FIG. 18 shows a schematic planar structure of a transformer chip 80X of a comparative example. As shown in FIG. 18, the transformer chip 80X of the comparative example includes dummy wiring 45X. The dummy wiring 45X is formed to surround the first to eighth surface coils 41A to 41H in a planar view in order to suppress the electric field from leaking over the first to eighth surface coils 41A to 41H. The dummy wiring 45X is formed in an open ring shape in a planar view. The dummy wiring 45X is connected to, for example, the fourth pad 81D. More specifically, the dummy wiring 45X includes a first wiring portion 45XA, a second wiring portion 45XB, and a pad connection portion 45XC. The first wiring portion 45XA is formed to surround the first to third surface coils 41A to 41C, the fifth surface coil 41E, and the sixth surface coil 41F from the opening 45XD. The second wiring portion 45XB is formed so as to surround the fourth surface coil 41D, the seventh surface coil 41G, and the eighth surface coil 41H from the opening 45XD. Both the first wiring portion 45XA and the second wiring portion 45XB are connected to the pad connection portion 45XC. The pad connection portion 45XC is connected to the fourth pad 81D. Therefore, the potential of the dummy wiring 45X is the same as that of the fourth pad 81D. The pads 81B, 81D, 81F, and 81H are electrically connected to the second circuit chip 70 shown in FIG. 1 and are all at the same potential (ground GND2). Therefore, by setting the dummy wiring 45X at the same potential as the first to eighth surface coils 41A to 41H, electric field concentration on the first to eighth surface coils 41A to 41H is alleviated.

[0212] In the dummy wiring 45X having such a configuration, the length of the first wiring portion 45XA in the direction in which the first wiring portion 45XA extends in a plan view is longer than the length of the second wiring portion 45XB in the direction in which the second wiring portion 45XB extends.

[0213] In the transformer chip 80X of the comparative example, when noise enters from the tip 45E1 of the first wiring portion 45XA and the tip 45E2 of the second wiring portion 45XB, a first current IA caused by the noise enters the fourth pad 81D through the first wiring portion 45XA and the pad connection portion 45XC, and a second current IB caused by the noise enters the fourth pad 81D through the second wiring portion 45XB and the pad connection portion 45XC. Here, as shown in FIG. 18 , the direction of the first current IA near the tip 45E1 of the first wiring portion 45XA is opposite to the direction of the first current IA near the pad connection portion 45XC of the first wiring portion 45XA. Therefore, the magnetic fields caused by the first current IA reinforce each other, for example, in the third surface coil 41C. Furthermore, the direction of the second current IB near the tip 45E2 of the second wiring portion 45XB is opposite to the direction of the second current IB near the pad connection portion 45XC of the second wiring portion 45XB. Therefore, the magnetic fields caused by the second current IB reinforce each other, for example, in the fourth surface coil 41D. As a result, currents caused by these magnetic fields flow through the third surface coil 41C and the fourth surface coil 41D, causing noise to be introduced into the pulse signals transmitted through the third surface coil 41C and the fourth surface coil 41D.

[0214] Because the third surface coil 41C and the fourth surface coil 41D are wound in opposite directions, even if currents caused by noise flow through both the third surface coil 41C and the fourth surface coil 41D, the magnetic fields generated by the currents cancel each other out. However, because the length of the first wiring portion 45XA in the direction in which the first wiring portion 45XA extends in a plan view is longer than the length of the second wiring portion 45XB in the direction in which the second wiring portion 45XB extends, there is a difference in the magnitude of the current flowing through the third surface coil 41C and the fourth surface coil 41D. This difference in the strength of the magnetic field generated in the third surface coil 41C and the strength of the magnetic field generated in the fourth surface coil 41D reduces the degree to which the magnetic fields cancel each other out.

[0215] 9 to 11 , in the transformer chip 80 of this embodiment, the dummy wiring 45 includes first to fourth dummy wirings 45A to 45D that are insulated from one another. The first to fourth dummy wirings 45A to 45D are provided corresponding to the first to fourth isolation transformers 40P, 40Q, 40R, and 40S. In one example, as shown in FIG. 11 , when noise enters from both ends of the third wiring portion 163 of the dummy wiring 45B in the X direction and both ends of the fourth wiring portion 164 in the X direction, the first current I1 flowing through the third sub-wiring portion 163A and the third current I3 flowing through the fourth sub-wiring portion 164A of the fourth wiring portion 164 flow in opposite directions, and the second current I2 flowing through the third sub-wiring portion 163B and the fourth current I4 flowing through the fourth sub-wiring portion 164B of the fourth wiring portion 164 flow in opposite directions. Therefore, the magnetic fields generated by the first current I1 and the third current I3 cancel each other out in the third surface coil 41C, and the magnetic fields generated by the second current I2 and the fourth current I4 cancel each other out in the fourth surface coil 41D.

[0216] In addition, because the length LA3 of the third sub-wiring portion 163A is equal to the length LA4 of the fourth sub-wiring portion 164A, and the length LB3 of the third sub-wiring portion 163B is equal to the length LB4 of the fourth sub-wiring portion 164B, the variation in the magnitude of the current flowing through the third surface coil 41C and the fourth surface coil 41D is reduced. Therefore, the variation in the strength of the magnetic field generated in the third surface coil 41C and the strength of the magnetic field generated in the fourth surface coil 41D can be reduced, and the degree to which the magnetic fields cancel each other out is increased.

[0217] [Effects] According to this embodiment, the following effects can be obtained: (1) The transformer chip 80 includes a first isolated transformer 40P including an insulating layer 84 including an upper surface 84s and a lower surface 84r that face opposite each other in the Z direction, a first surface coil 41A and a second surface coil 41B that are disposed in the insulating layer 84 near the upper surface 84s and spaced apart from each other in the X direction, a first back surface coil 42A and a second back surface coil 42B that are disposed in the insulating layer 84 near the lower surface 84r and spaced apart from each other in the X direction and that face the first surface coil 41A and the second surface coil 41B, a third surface coil 41C and a fourth surface coil 41D that are disposed in the insulating layer 84 near the upper surface 84s and spaced apart from each other in the X direction, and a third back surface coil 42A that is disposed in the insulating layer 84 near the lower surface 84r and spaced apart from each other in the X direction and that face the third surface coil 41C and the fourth surface coil 41D. a second pad 81B that is arranged between the first surface coil 41A and the second surface coil 41B in the X direction in plan view and is electrically connected to both the first surface coil 41A and the second surface coil 41B; a fourth pad 81D that is arranged between the third surface coil 41C and the fourth surface coil 41D in the X direction in plan view and is electrically connected to both the third surface coil 41C and the fourth surface coil 41D; first dummy wiring 45A that is provided on both sides of the first isolation transformer 40P in the Y direction in plan view and is electrically connected to the second pad 82B; and second dummy wiring 45B that is provided on both sides of the second isolation transformer 40Q in the Y direction and is electrically connected to the fourth pad 81D and is electrically insulated from the first dummy wiring 45A. The first dummy wiring 45A and the second dummy wiring 45B are aligned along the X direction.

[0218] With this configuration, even if noise is introduced into the first dummy wiring 45A and the second dummy wiring 45B, the magnetic field strength of each pair of the first to fourth surface coils 41A to 41D varies little, so the magnetic fields of the paired coils are more likely to cancel each other out. This reduces noise in the pulse signals transmitted to the first to fourth surface coils 41A to 41D. This improves the signal transmission characteristics of the transformer chip 80 and the signal transmission device 10.

[0219] (2) The first dummy wiring 45A includes a portion that is line-symmetric with respect to a virtual line VL1 that connects the center C1 of the first surface coil 41A and the center C2 of the second surface coil 41B. The second dummy wiring 45B includes a portion that is line-symmetric with respect to a virtual line VL2 that connects the center C3 of the third surface coil 41C and the center C4 of the fourth surface coil 41D.

[0220] With this configuration, when noise enters the first dummy wiring 45A, magnetic fields caused by currents flowing through portions of the first dummy wiring 45A located on both sides of the first surface coil 41A and the second surface coil 41B in the Y direction can be effectively canceled out in the first surface coil 41A and the second surface coil 41B. When noise enters the second dummy wiring 45B, magnetic fields caused by currents flowing through portions of the second dummy wiring 45B located on both sides of the third surface coil 41C and the fourth surface coil 41D in the Y direction can be effectively canceled out in the third surface coil 41C and the fourth surface coil 41D.

[0221] (3) The first dummy wiring 45A includes a first wiring portion 161 that is arranged on one side of the first surface coil 41A and the second surface coil 41B in the Y direction and is formed linearly extending in the X direction, and a second wiring portion 162 that is arranged on the other side of the first surface coil 41A and the second surface coil 41B in the Y direction and is formed linearly extending in the X direction. The second dummy wiring 45B includes a third wiring portion 163 that is arranged on one side of the third surface coil 41C and the fourth surface coil 41D in the Y direction and is formed linearly extending in the X direction, and a fourth wiring portion 164 that is arranged on the other side of the third surface coil 41C and the fourth surface coil 41D in the Y direction and is formed linearly extending in the X direction.

[0222] With this configuration, the first wiring portion 161 and the second wiring portion 162, which are parallel to each other, are disposed dispersedly on both sides of the first surface coil 41A and the second surface coil 41B in the Y direction. Therefore, when noise enters the first wiring portion 161 and the second wiring portion 162 in the same direction, the magnetic fields generated in the first wiring portion 161 and the second wiring portion 162 are easily canceled out in the first surface coil 41A and the second surface coil 41B. Furthermore, the third wiring portion 163 and the fourth wiring portion 164, which are parallel to each other, are disposed dispersedly on both sides of the third surface coil 41C and the fourth surface coil 41D in the Y direction. Therefore, when noise enters the third wiring portion 163 and the fourth wiring portion 164 in the same direction, the magnetic fields generated in the third wiring portion 163 and the fourth wiring portion 164 are easily canceled out in the third surface coil 41C and the fourth surface coil 41D.

[0223] (4) The first wiring portion 161 includes two first sub-wiring portions 161A and 161B that are aligned along the X direction. The second wiring portion 162 includes two second sub-wiring portions 162A and 162B that are aligned along the X direction.

[0224] According to this configuration, the first sub-wiring portions 161A and 161B have a shorter length in the X direction than the first wiring portion 161, and the second sub-wiring portions 162A and 162B have a shorter length in the X direction than the second wiring portion 162. Therefore, when noise enters the first sub-wiring portions 161A and 161B and the second sub-wiring portions 162A and 162B, the variation in the magnitude of the current caused by the noise is reduced.

[0225] (5) The lengths LA1 and LB1 of the two first sub-wiring portions 161A and 161B in the X direction are equal to each other. The lengths LA2 and LB2 of the two second sub-wiring portions 162A and 162B in the X direction are equal to each other.

[0226] According to this configuration, when noise enters the first sub-wiring portions 161A and 161B and the second sub-wiring portions 162A and 162B, the variation in the magnitude of the current caused by the noise is further reduced.

[0227] (6) The lengths LA1 and LB1 of the first sub-wiring portions 161A and 161B in the X direction are equal to the lengths LA2 and LB2 of the second sub-wiring portions 162A and 162B in the X direction. With this configuration, when noise enters the first sub-wiring portions 161A and 161B and the second sub-wiring portions 162A and 162B, the magnetic fields of the first sub-wiring portions 161A and 161B and the second sub-wiring portions 162A and 162B can be effectively canceled out by each other in the first surface coil 41A and the second surface coil 41B.

[0228] (7) Each of the two first sub-wiring units 161A, 161B includes a plurality of first wiring layers 181A, 181B stacked in the Y direction and a first wiring connection layer 191A, 191B connecting the plurality of first wiring layers 181A. Each of the two second sub-wiring units 162A, 162B includes a plurality of second wiring layers 182A, 182B stacked in the Y direction and a second wiring connection layer 192A, 192B connecting the plurality of second wiring layers 182A, 182B. The first wiring connection layers 191A, 191B connect the plurality of first wiring layers 181A, 181B at the center of the first wiring unit 161 in the X direction. The second wiring connection layers 192A, 192B connect the plurality of second wiring layers 182A, 182B at the center of the second wiring unit 162 in the X direction.

[0229] With this configuration, when noise enters the first sub-wiring portions 161A and 161B, the direction of the current flowing in the first sub-wiring portion 161A is opposite to the direction of the current flowing in the first sub-wiring portion 161B. When noise enters the second sub-wiring portions 162A and 162B, the direction of the current flowing in the second sub-wiring portion 162A is opposite to the direction of the current flowing in the second sub-wiring portion 162B. Therefore, when noise enters the first sub-wiring portions 161A and 161B and the second sub-wiring portions 162A and 162B, the magnetic fields in the first sub-wiring portions 161A and 161B and the second sub-wiring portions 162A and 162B can be effectively canceled out by each other in the first surface coil 41A and the second surface coil 41B.

[0230] (8) The first dummy wiring 45A includes a first pad connection portion 171 that electrically connects the two first sub-wiring portions 161A, 161B to the second pad 81B and a second pad connection portion 172 that electrically connects the two second sub-wiring portions 162A, 162B to the second pad 81B. The first pad connection portion 171 includes a first connection base 201 that extends to surround at least the second pad 81B side of the first surface coil 41A, a second connection base 202 that extends to surround at least the second pad 81B side of the second surface coil 41B, a plurality of first linear portions 211A that are connected to the first connection base 201 and are aligned in the Y direction and extend in the X direction, and a plurality of second linear portions 212A that are connected to the second connection base 202 and are aligned in the Y direction and extend in the X direction. The second pad connection portion 172 includes a third connection base 203 extending to surround at least the second pad 81B side of the first surface coil 41A, a fourth connection base 204 extending to surround at least the second pad 81B side of the second surface coil 41B, a plurality of third linear portions 213A connected to the third connection base 203 and aligned in the Y direction and extending linearly in the X direction, and a plurality of fourth linear portions 214A connected to the fourth connection base 204 and aligned in the Y direction and extending linearly in the X direction. The plurality of first linear portions 211A and the plurality of second linear portions 212A are alternately arranged one by one in the Y direction. The plurality of third linear portions 213A and the plurality of fourth linear portions 214A are alternately arranged one by one in the Y direction.

[0231] According to this configuration, the first linear portions 211A and the second linear portions 212A, which are alternately arranged in the Y direction, extend in opposite directions. Therefore, when noise is introduced into the first linear portions 211A and the second linear portions 212A, the magnetic fields of the first linear portions 211A and the second linear portions 212A are opposite in direction, thereby reducing the mutual influence of the magnetic fields of the first linear portions 211A and the second linear portions 212A. Furthermore, the third linear portions 213A and the fourth linear portions 214A, which are alternately arranged in the Y direction, extend in opposite directions. Therefore, when noise is introduced into the third linear portions 213A and the fourth linear portions 214A, the magnetic fields of the third linear portions 213A and the fourth linear portions 214A are opposite in direction, thereby reducing the mutual influence of the magnetic fields of the third linear portions 213A and the fourth linear portions 214A.

[0232] (9) The first connection base 201 is formed to surround a portion of the first surface coil 41A closer to the first wiring portion 161 in a plan view. The second connection base 202 is formed to surround a portion of the second surface coil 41B closer to the first wiring portion 161 in a plan view. The third connection base 203 is formed to surround a portion of the first surface coil 41A closer to the second wiring portion 162 in a plan view. The fourth connection base 204 is formed to surround a portion of the second surface coil 41B closer to the second wiring portion 162 in a plan view. The tip portion 201A of the first connection base 201 and the tip portion 203A of the third connection base 203 are adjacent to each other in the Y direction. The tip portion 202A of the second connection base 202 and the tip portion 204A of the fourth connection base 204 are adjacent to each other in the Y direction.

[0233] According to this configuration, the first connection base 201 and the third connection base 203 are formed to surround most of the first surface coil 41A. The second connection base 202 and the fourth connection base 204 are formed to surround most of the second surface coil 41B. This makes it possible to reduce electric field concentration in the first surface coil 41A and the second surface coil 41B.

[0234] (10) The third dummy wiring 45C includes a fifth wiring portion 165 arranged on one side in the Y direction of both the fifth surface coil 41E and the sixth surface coil 41F, and a sixth wiring portion 166 arranged on the other side in the Y direction of both the fifth surface coil 41E and the sixth surface coil 41F. The fourth dummy wiring 45D includes a seventh wiring portion 167 arranged on one side in the Y direction of both the seventh surface coil 41G and the eighth surface coil 41H, and an eighth wiring portion 168 arranged on the other side in the Y direction of both the seventh surface coil 41G and the eighth surface coil 41H.

[0235] With this configuration, the fifth wiring portion 165 and the sixth wiring portion 166, which include portions parallel to each other, are disposed in a dispersed manner on both sides of the fifth surface coil 41E and the sixth surface coil 41F in the Y direction. Therefore, when noise enters the fifth wiring portion 165 and the sixth wiring portion 166 in the same direction, the influence of the magnetic field generated in the fifth wiring portion 165 and the sixth wiring portion 166 can be reduced in the fifth surface coil 41E and the sixth surface coil 41F. Furthermore, the seventh wiring portion 167 and the eighth wiring portion 168, which include portions parallel to each other, are disposed in a dispersed manner on both sides of the seventh surface coil 41G and the eighth surface coil 41H in the Y direction. Therefore, when noise enters the seventh wiring portion 167 and the eighth wiring portion 168 in the same direction, the influence of the magnetic field generated in the seventh wiring portion 167 and the eighth wiring portion 168 can be reduced in the seventh surface coil 41G and the eighth surface coil 41H.

[0236] (11) The fifth wiring portion 165 and the sixth wiring portion 166 include curved portions that surround the fifth surface coil 41 E. The seventh wiring portion 167 and the eighth wiring portion 168 include curved portions that surround the eighth surface coil 41 H.

[0237] With this configuration, most of the fifth surface coil 41E is surrounded by the fifth wiring portion 165 and the sixth wiring portion 166, thereby alleviating electric field concentration in the fifth surface coil 41E. Most of the eighth surface coil 41H is surrounded by the seventh wiring portion 167 and the eighth wiring portion 168, thereby alleviating electric field concentration in the eighth surface coil 41H.

[0238] (12) The transformer chip 80 includes floating dummy wirings 140 that surround the first to eighth surface coils 41A to 41H and the first to fourth dummy wirings 45A to 45D. This configuration can reduce electric field concentration in the first to eighth surface coils 41A to 41H.

[0239] <Modifications> The above embodiment can be modified as follows: The following modifications can be combined with each other to the extent that no technical contradiction occurs.

[0240] [Modifications of the Transformer Chip] The configuration of the first to fourth dummy wirings 45A to 45D can be changed as desired. The first to fourth dummy wirings 45A to 45D may be changed to, for example, the first example shown in FIG. 19 or the second example shown in FIGS. 20 and 21.

[0241] (First Example) As shown in FIG. 19, in the first example, the first to fourth dummy wirings 45A to 45D have the same configuration.

[0242] The first dummy wiring 45A includes a first wiring portion 231 formed in an open loop shape surrounding both the first surface coil 41A and the second surface coil 41B of the first isolation transformer 40P. The first wiring portion 231 includes one opening. The first wiring portion 231 includes two first sub-wiring portions 231A and 231B arranged to be aligned along the X direction. The lengths of the two first sub-wiring portions 231A and 231B are equal to each other. In other words, the first dummy wiring 45A includes portions that are line-symmetrical with respect to the virtual line VL5. In other words, the first wiring portion 231 is divided into the first sub-wiring portions 231A and 231B at the virtual line VL5.

[0243] The first sub-wiring portion 231A includes a first linear portion formed in a straight line extending along the X direction, a curved portion formed in a curved line extending to surround the first surface coil 41A, and a second linear portion extending in the X direction from the curved portion. The linear portion extends along the X direction from the center of the first sub-wiring portion 231A in the X direction to the side opposite the first sub-wiring portion 231B. The curved portion is formed in a substantially semicircular ring shape surrounding the first surface coil 41A from the side opposite the second pad 81B. The second linear portion extends in the X direction from the curved portion toward the first sub-wiring portion 231B.

[0244] The first sub-wiring portion 231B includes a first linear portion formed in a straight line extending along the X direction, a curved portion formed in a curved line extending to surround the second surface coil 41B, and a second linear portion extending in the X direction from the curved portion. The linear portion extends along the X direction from the center of the first sub-wiring portion 231B in the X direction to the side opposite the first sub-wiring portion 231A. The curved portion is formed in a substantially semicircular ring shape that surrounds the second surface coil 41B from the side opposite the first pad 81A. The second linear portion extends in the X direction from the curved portion toward the first sub-wiring portion 231A. The second linear portion of the first sub-wiring portion 231A and the second linear portion of the first sub-wiring portion 231B face each other while being spaced apart from each other in the X direction. The first dummy wiring 45A is formed in an open loop shape between the second linear portion of the first sub-wiring portion 231A and the second linear portion of the first sub-wiring portion 231B in the X direction.

[0245] The first dummy wiring 45A includes a first pad connection portion 235 that connects the first wiring portion 231 and the second pad 81B. The first pad connection portion 235 is connected to both the first sub-wiring portion 231A and the first sub-wiring portion 231B.

[0246] The second dummy wiring 45B includes a second wiring portion 232 formed in an open loop shape surrounding both the third surface coil 41C and the fourth surface coil 41D of the second isolation transformer 40Q. The second wiring portion 232 includes one opening. The second wiring portion 232 includes two second sub-wiring portions 232A and 232B aligned along the X direction. The lengths of the two second sub-wiring portions 232A and 232B are equal to each other. In other words, the second dummy wiring 45B includes portions that are line-symmetrical with respect to the imaginary line VL6. In other words, the second wiring portion 232 is divided into the second sub-wiring portions 232A and 232B at the imaginary line VL6.

[0247] The second sub-wiring portion 232A includes a first linear portion formed in a straight line extending along the X direction, a curved portion formed in a curved line extending to surround the third surface coil 41C, and a second linear portion extending in the X direction from the curved portion. The linear portion extends along the X direction from the center of the second sub-wiring portion 232A in the X direction to the side opposite the second sub-wiring portion 232B. The curved portion is formed in a substantially semicircular ring shape surrounding the third surface coil 41C from the side opposite the fourth pad 81D. The second linear portion extends in the X direction from the curved portion toward the second sub-wiring portion 232B.

[0248] The second sub-wiring portion 232B includes a first linear portion formed in a straight line extending along the X direction, a curved portion formed in a curved line extending to surround the fourth surface coil 41D, and a second linear portion extending in the X direction from the curved portion. The linear portion extends along the X direction from the center of the second sub-wiring portion 232B in the X direction to the side opposite the second sub-wiring portion 232A. The curved portion is formed in a substantially semicircular ring shape that surrounds the fourth surface coil 41D from the side opposite the fourth pad 81D. The second linear portion extends in the X direction from the curved portion toward the second sub-wiring portion 232A. The second linear portion of the second sub-wiring portion 232A and the second linear portion of the second sub-wiring portion 232B face each other while being spaced apart from each other in the X direction. The second dummy wiring 45B is formed in an open loop shape between the second straight line portion of the second sub-wiring portion 232A and the second straight line portion of the second sub-wiring portion 232B in the X direction.

[0249] The second dummy wiring 45B includes a second pad connection portion 236 that connects the second wiring portion 232 and the fourth pad 81D. The second pad connection portion 236 is connected to both the second sub-wiring portion 232A and the second sub-wiring portion 232B.

[0250] The third dummy wiring 45C includes a third wiring portion 233 formed in an open loop shape surrounding both the fifth surface coil 41E and the sixth surface coil 41F of the third isolation transformer 40R. The third wiring portion 233 includes one opening. The third wiring portion 233 includes two third sub-wiring portions 233A and 233B aligned along the X direction. The lengths of the two third sub-wiring portions 233A and 233B are equal to each other. In other words, the third dummy wiring 45C includes portions that are line-symmetrical with respect to the imaginary line VL7. In other words, the third wiring portion 233 is divided into the third sub-wiring portions 233A and 233B at the imaginary line VL7.

[0251] The third sub-wiring portion 233A includes a first linear portion formed in a straight line extending along the X direction, a curved portion formed in a curved line extending to surround the fifth surface coil 41E, and a second linear portion extending in the X direction from the curved portion. The linear portion extends along the X direction from the center of the third sub-wiring portion 233A in the X direction to the side opposite the third sub-wiring portion 233B. The curved portion is formed in a substantially semicircular ring shape surrounding the fifth surface coil 41E from the side opposite the sixth pad 81F. The second linear portion extends in the X direction from the curved portion toward the third sub-wiring portion 233B.

[0252] The third sub-wiring portion 233B includes a first linear portion formed in a straight line extending along the X direction, a curved portion formed in a curved line extending to surround the sixth surface coil 41F, and a second linear portion extending in the X direction from the curved portion. The linear portion extends along the X direction from the center of the third sub-wiring portion 233B in the X direction to the side opposite the third sub-wiring portion 233A. The curved portion is formed in a substantially semicircular ring shape surrounding the sixth surface coil 41F from the side opposite the sixth pad 81F. The second linear portion extends in the X direction from the curved portion toward the third sub-wiring portion 233A. The second linear portion of the third sub-wiring portion 233A and the second linear portion of the third sub-wiring portion 233B face each other while being spaced apart from each other in the X direction. The third dummy wiring 45C is formed in an open loop shape between the second linear portion of the third sub-wiring portion 233A and the second linear portion of the third sub-wiring portion 233B in the X direction.

[0253] The third dummy wiring 45C includes a third pad connection portion 237 that connects the third wiring portion 233 and the sixth pad 81F. The third pad connection portion 237 is connected to both the third sub-wiring portion 233A and the third sub-wiring portion 233B.

[0254] The fourth dummy wiring 45D includes a fourth wiring portion 234 formed in an open loop shape surrounding both the seventh surface coil 41G and the eighth surface coil 41H of the fourth isolation transformer 40S. The fourth wiring portion 234 includes one opening. The fourth wiring portion 234 includes two fourth sub-wiring portions 234A and 234B aligned along the X direction. The lengths of the two fourth sub-wiring portions 234A and 234B are equal to each other. In other words, the fourth dummy wiring 45D includes a portion that is line-symmetrical with respect to the virtual line VL8. In other words, the fourth wiring portion 234 is divided into the fourth sub-wiring portions 234A and 234B at the virtual line VL8.

[0255] The fourth sub-wiring portion 234A includes a first linear portion formed in a straight line extending along the X direction, a curved portion formed in a curved line extending to surround the seventh surface coil 41G, and a second linear portion extending in the X direction from the curved portion. The linear portion extends along the X direction from the center of the fourth sub-wiring portion 234A in the X direction to the side opposite the fourth sub-wiring portion 234B. The curved portion is formed in a substantially semicircular ring shape surrounding the seventh surface coil 41G from the side opposite the eighth pad 81H. The second linear portion extends in the X direction from the curved portion toward the fourth sub-wiring portion 234B.

[0256] The fourth sub-wiring portion 234B includes a first linear portion formed in a straight line extending along the X direction, a curved portion formed in a curved line extending to surround the eighth surface coil 41H, and a second linear portion extending in the X direction from the curved portion. The linear portion extends along the X direction from the center of the fourth sub-wiring portion 234B in the X direction to the side opposite the fourth sub-wiring portion 234A. The curved portion is formed in a substantially semicircular ring shape that surrounds the eighth surface coil 41H from the side opposite the eighth pad 81H. The second linear portion extends in the X direction from the curved portion toward the fourth sub-wiring portion 234A. The second linear portion of the fourth sub-wiring portion 234A and the second linear portion of the fourth sub-wiring portion 234B face each other while being spaced apart from each other in the X direction. A fourth dummy wiring 45D is formed in an open loop shape between the second linear portion of the fourth sub-wiring portion 234A and the second linear portion of the fourth sub-wiring portion 234B in the X direction.

[0257] The fourth dummy wiring 45D includes a fourth pad connection portion 238 that connects the fourth wiring portion 234 and the eighth pad 81H. The fourth pad connection portion 238 is connected to both the fourth sub-wiring portion 234A and the fourth sub-wiring portion 234B.

[0258] (Second Example) In the second example, as shown in FIG. 20 , the first to fourth dummy wirings 45A to 45D are formed in an open loop shape with openings at both ends in the X direction. Each of the first to fourth dummy wirings 45A to 45D includes two openings spaced apart in the X direction. The first dummy wiring 45A is formed to be line-symmetric with respect to the virtual line VL1 and line-symmetric with respect to the virtual line VL5. The second dummy wiring 45B is formed to be line-symmetric with respect to the virtual line VL2 and line-symmetric with respect to the virtual line VL6. The third dummy wiring 45C is formed to be line-symmetric with respect to the virtual line VL3 and line-symmetric with respect to the virtual line VL7. The fourth dummy wiring 45D is formed to be line-symmetric with respect to the virtual line VL4 and line-symmetric with respect to the virtual line VL8. In the example shown in FIG. 20 , the first to fourth dummy wirings 45A to 45D have the same configuration. Therefore, the configuration of the first dummy wiring 45A will be described in detail, and a detailed description of the configurations of the second to fourth dummy wirings 45B to 45D will be omitted.

[0259] 21 , the first dummy wiring 45A includes a first wiring portion 241, first curved portions 242A and 242B, a second wiring portion 243, and second curved portions 244A and 244B. The first dummy wiring 45A includes a first pad connecting portion 245 and a second pad connecting portion 246. In one example, the first wiring portion 241, the first curved portions 242A and 242B, and the first pad connecting portion 245 are integrated. The second wiring portion 243, the second curved portions 244A and 244B, and the second pad connecting portion 246 are integrated.

[0260] The first wiring portion 241 is disposed on one side of the first surface coil 41A and the second surface coil 41B in the Y direction. The first wiring portion 241 is formed in a straight line extending in the X direction. When viewed from the Y direction, the first wiring portion 241 extends so as to overlap with the first surface coil 41A, the second surface coil 41B, and the second pad 81B.

[0261] The first wiring portion 241 includes two first sub-wiring portions 241A and 241B that are aligned along the X direction. The first sub-wiring portion 241A is positioned so as to overlap the first coil 41 of the transformer 40A when viewed from the Y direction. The first sub-wiring portion 241B is positioned so as to overlap the first coil 41 of the transformer 40B when viewed from the Y direction. The lengths of the two first sub-wiring portions 241A and 241B in the X direction are equal to each other. In other words, the first sub-wiring portions 241A and 241B are spaced apart at the center of the first wiring portion 241 in the X direction.

[0262] The first curved portions 242A and 242B are formed from both ends of the first wiring portion 241 in the X direction to partially surround the first surface coil 41A and the second surface coil 41B, respectively. The first curved portion 242A is connected to one of the ends of the first sub-wiring portion 241A in the X direction, the end opposite the first sub-wiring portion 241B. The first curved portion 242A partially surrounds the first surface coil 41A. The first curved portion 242B is connected to one of the ends of the first sub-wiring portion 241B in the X direction, the end opposite the first sub-wiring portion 241A. The first curved portion 242B partially surrounds the second surface coil 41B. The length of the first curved portion 242A in the extension direction is equal to the length of the first curved portion 242B in the extension direction.

[0263] The first pad connection portion 245 connects the first wiring portion 241 and the second pad 81B. The first pad connection portion 245 individually connects the first sub-wiring portions 241A and 241B. As a result, the first sub-wiring portions 241A and 241B are electrically connected to the second pad 81B.

[0264] The second wiring portion 243 is disposed on the other side of the first surface coil 41A and the second surface coil 41B in the Y direction. The second wiring portion 243 is formed in a straight line extending in the X direction. When viewed from the Y direction, the second wiring portion 243 extends so as to overlap with the first surface coil 41A, the second surface coil 41B, and the second pad 81B. When viewed from the Y direction, the second wiring portion 243 is disposed at a position overlapping with the first wiring portion 241.

[0265] The second wiring portion 243 includes two second sub-wiring portions 243A and 243B that are aligned along the X direction. The second sub-wiring portion 243A is positioned so as to overlap the first surface coil 41A when viewed from the Y direction. The second sub-wiring portion 243A is positioned so as to overlap the first sub-wiring portion 241A when viewed from the Y direction. The second sub-wiring portion 243B is positioned so as to overlap the second surface coil 41B when viewed from the Y direction. The second sub-wiring portion 243B is positioned so as to overlap the first sub-wiring portion 241B when viewed from the Y direction. The lengths of the two second sub-wiring portions 243A and 243B in the X direction are equal to each other. In other words, the second sub-wiring portions 243A and 243B are spaced apart at the center of the second wiring portion 243 in the X direction. The length in the X direction of the first sub-wiring portion 241A is equal to the length in the X direction of the second sub-wiring portion 243A. The length in the X direction of the first sub-wiring portion 241B is equal to the length in the X direction of the second sub-wiring portion 243B.

[0266] The second curved portions 244A and 244B are formed from both ends of the second wiring portion 243 in the X direction so as to partially surround the first surface coil 41A and the second surface coil 41B, respectively. The second curved portion 244A is connected to one of the ends of the second sub-wiring portion 243A in the X direction, the end opposite the second sub-wiring portion 243B. The second curved portion 244A partially surrounds the first surface coil 41A. The second curved portion 244B is connected to one of the ends of the second sub-wiring portion 243B in the X direction, the end opposite the second sub-wiring portion 243A. The second curved portion 244B partially surrounds the second surface coil 41B. The length of the second curved portion 244A in the extension direction is equal to the length of the second curved portion 244B in the extension direction. The length of first curved portion 242A in the direction in which first curved portion 242A extends is equal to the length of second curved portion 244A in the direction in which second curved portion 244A extends. The length of first curved portion 242B in the direction in which first curved portion 242B extends is equal to the length of second curved portion 244B in the direction in which second curved portion 244B extends.

[0267] The tip end 244AA of the second bending portion 244A is adjacent to the tip end 242AA of the first bending portion 242A in the Y direction. The tip end 244AA of the second bending portion 244A and the tip end 242AA of the first bending portion 242A are arranged opposite each other in the Y direction. The tip end 244BA of the second bending portion 244B is adjacent to the tip end 242BA of the first bending portion 242B in the Y direction. The tip end 244BA of the second bending portion 244B and the tip end 242BA of the first bending portion 242B are arranged opposite each other in the Y direction.

[0268] The second pad connection portion 246 connects the second wiring portion 243 and the second pad 81B. The second pad connection portion 246 individually connects the second sub-wiring portions 243A and 243B. As a result, the second sub-wiring portions 243A and 243B are electrically connected to the second pad 81B.

[0269] 20, the second to fourth dummy wirings 45B to 45D have the same configuration as the first dummy wiring 45A, so only the general configuration of the second to fourth dummy wirings 45B to 45D will be described.

[0270] The second dummy wiring 45B includes a third wiring portion, two third curved portions, a fourth wiring portion, two fourth curved portions, a third pad connection portion, and a fourth pad connection portion. The third wiring portion is arranged on one side of both the third surface coil 41C and the fourth surface coil 41D in the Y direction. The third wiring portion is formed linearly extending in the X direction. The third wiring portion includes two third sub-wiring portions arranged to align along the X direction. The two third sub-wiring portions have the same length in the X direction. The two third curved portions are formed so as to partially surround the third surface coil 41C and the fourth surface coil 41D from both ends of the third wiring portion in the X direction in a plan view. The two third curved portions have the same length. The third pad connection portion connects the third wiring portion (two third sub-wiring portions) and the fourth pad 81D.

[0271] The fourth wiring portion is disposed on the other side of both the third surface coil 41C and the fourth surface coil 41D in the Y direction. The fourth wiring portion is formed linearly extending in the X direction. The fourth wiring portion includes two fourth sub-wiring portions arranged to be aligned along the X direction. The two fourth sub-wiring portions have the same length in the X direction. The X-direction length of the third sub-wiring portion is equal to the X-direction length of the fourth sub-wiring portion. The two fourth curved portions are formed so as to partially surround the third surface coil 41C and the fourth surface coil 41D from both ends of the fourth wiring portion in the X direction in a plan view. The lengths of the two fourth curved portions are equal to each other. The length of the third curved portion is equal to the length of the fourth curved portion. The fourth pad connection portion connects the fourth wiring portion (two fourth sub-wiring portions) to the fourth pad 81D. The tip end of the third curved portion and the tip end of the fourth curved portion are adjacent to each other in the Y direction. The distal end of the third bending portion and the distal end of the fourth bending portion are disposed opposite to each other in the Y direction.

[0272] The third dummy wiring 45C includes a fifth wiring portion, two fifth curved portions, a sixth wiring portion, two sixth curved portions, a fifth pad connection portion, and a sixth pad connection portion. The fifth wiring portion is arranged on one side of both the fifth surface coil 41E and the sixth surface coil 41F in the Y direction. The fifth wiring portion is formed linearly extending in the X direction. The fifth wiring portion includes two fifth sub-wiring portions arranged to align along the X direction. The two fifth sub-wiring portions have the same length in the X direction. The two fifth curved portions are formed so as to partially surround the fifth surface coil 41E and the sixth surface coil 41F from both ends of the fifth wiring portion in the X direction in a plan view. The two fifth curved portions have the same length. The fifth pad connection portion connects the fifth wiring portion (the two fifth sub-wiring portions) and the sixth pad 81F.

[0273] The sixth wiring portion is disposed on the other side of both the fifth surface coil 41E and the sixth surface coil 41F in the Y direction. The sixth wiring portion is formed linearly extending in the X direction. The sixth wiring portion includes two sixth sub-wiring portions arranged to be aligned along the X direction. The two sixth sub-wiring portions have the same length in the X direction. The X-direction length of the fifth sub-wiring portion is equal to the X-direction length of the sixth sub-wiring portion. The two sixth curved portions are formed so as to partially surround the fifth surface coil 41E and the sixth surface coil 41F from both ends of the sixth wiring portion in the X direction in a plan view. The two sixth curved portions have the same length. The length of the fifth curved portion is equal to the length of the sixth curved portion. Furthermore, the sixth pad connection portion connects the sixth wiring portion (the two sixth sub-wiring portions) to the sixth pad 81F. The tip end of the fifth curved portion and the tip end of the sixth curved portion are adjacent to each other in the Y direction. The distal end of the fifth bending portion and the distal end of the sixth bending portion are disposed opposite to each other in the Y direction.

[0274] The fourth dummy wiring 45D includes a seventh wiring portion, two seventh curved portions, an eighth wiring portion, two eighth curved portions, a seventh pad connection portion, and an eighth pad connection portion. The seventh wiring portion is arranged on one side of both the seventh surface coil 41G and the eighth surface coil 41H in the Y direction. The seventh wiring portion is formed linearly extending in the X direction. The seventh wiring portion includes two seventh sub-wiring portions arranged to align along the X direction. The two seventh sub-wiring portions have the same length in the X direction. The two seventh curved portions are formed so as to partially surround the seventh surface coil 41G and the eighth surface coil 41H from both ends of the seventh wiring portion in the X direction in a plan view. The two seventh curved portions have the same length. The seventh pad connection portion connects the seventh wiring portion (two seventh sub-wiring portions) and the eighth pad 81H.

[0275] The eighth wiring portion is disposed on the other side of both the seventh surface coil 41G and the eighth surface coil 41H in the Y direction. The eighth wiring portion is formed in a straight line extending in the X direction. The eighth wiring portion includes two eighth sub-wiring portions arranged to be aligned along the X direction. The two eighth sub-wiring portions have the same length in the X direction. The X-direction length of the seventh sub-wiring portion is equal to the X-direction length of the eighth sub-wiring portion. The X-direction length of the seventh sub-wiring portion is equal to the X-direction length of the eighth sub-wiring portion. The two eighth curved portions are formed so as to partially surround the seventh surface coil 41G and the eighth surface coil 41H individually from both ends of the eighth wiring portion in the X direction in a plan view. The two eighth curved portions have the same length. The length of the seventh curved portion is equal to the length of the eighth curved portion. Furthermore, the eighth pad connection portion connects the eighth wiring portion (two eighth sub-wiring portions) to the eighth pad 81H. The distal end of the seventh bending portion and the distal end of the eighth bending portion are adjacent to each other in the Y direction. The distal end of the seventh bending portion and the distal end of the eighth bending portion are disposed opposite each other in the Y direction.

[0276] The shapes of the first to eighth surface coils 41A to 41H in plan view are not limited to annular shapes and may be arbitrarily changed. For example, the shapes of the first to eighth surface coils 41A to 41H in plan view may be elliptical, oval, rectangular, pentagonal or other polygonal shapes.

[0277] The shapes of the first to eighth back surface coils 42A to 42H in plan view are not limited to annular shapes and can be changed as desired. For example, the shapes of the first to eighth back surface coils 42A to 42H in plan view may be elliptical, oval, rectangular, pentagonal or higher polygonal, etc.

[0278] The shapes of the first to fourth dummy wirings 45A to 45D in a planar view can be changed as desired. In one example, the first dummy wiring 45A may not be line-symmetric with respect to the virtual line VL5. In one example, the first dummy wiring 45A may not be line-symmetric with respect to the virtual line VL1. In one example, the second dummy wiring 45B may not be line-symmetric with respect to the virtual line VL6. In one example, the second dummy wiring 45B may not be line-symmetric with respect to the virtual line VL2. In one example, the third dummy wiring 45C may not be line-symmetric with respect to the virtual line VL7. In one example, the third dummy wiring 45C may not be line-symmetric with respect to the virtual line VL3. In one example, the fourth dummy wiring 45D may not be line-symmetric with respect to the virtual line VL8. In one example, the fourth dummy wiring 45D may not be line-symmetric with respect to the virtual line VL4.

[0279] The first wiring portion 161 and the second wiring portion 162 of the first dummy wiring 45A are not limited to being linear, but may be formed in a curved shape surrounding the first surface coil 41A and the second surface coil 41B. Furthermore, the third wiring portion 163 and the fourth wiring portion 164 of the second dummy wiring 45B are not limited to being linear, but may be formed in a curved shape surrounding the third surface coil 41C and the fourth surface coil 41D.

[0280] The straight portion of the fifth sub-wiring portion 165A of the fifth wiring portion 165 of the third dummy wiring 45C may be changed to a curved portion that surrounds the fifth surface coil 41E. The fifth sub-wiring portion 165B of the fifth wiring portion 165 may be formed in a curved shape that surrounds the sixth surface coil 41F.

[0281] The straight portion of the sixth sub-wiring portion 166A of the sixth wiring portion 166 of the fourth dummy wiring 45D may be changed to a curved portion that surrounds the fifth surface coil 41E. The sixth sub-wiring portion 166B of the sixth wiring portion 166 may be formed in a curved shape that surrounds the sixth surface coil 41F.

[0282] The lengths LA1 and LB1 of the two first sub-wiring portions 161A and 161B in the first wiring portion 161 of the first dummy wiring 45A may be different from each other. Also, the lengths LA2 and LB2 of the two first sub-wiring portions 161A and 161B in the second wiring portion 162 may be different from each other.

[0283] The length LA1 of the first sub-wiring portion 161A in the first wiring portion 161 and the length LA2 of the second sub-wiring portion 162A in the second wiring portion 162 may be different from each other. Also, the length LB1 of the first sub-wiring portion 161B and the length LB2 of the second sub-wiring portion 162B may be different from each other.

[0284] The lengths LA3, LB3 of the two third sub-wiring portions 163A, 163B in the third wiring portion 163 of the second dummy wiring 45B may be different from each other. Also, the lengths LA4, LB4 of the two fourth sub-wiring portions 164A, 164B in the fourth wiring portion 164 may be different from each other.

[0285] The length LA3 of the third sub-wiring portion 163A in the third wiring portion 163 and the length LA4 of the fourth sub-wiring portion 164A in the fourth wiring portion 164 may be different from each other. Furthermore, the length LB3 of the third sub-wiring portion 163B and the length LB4 of the fourth sub-wiring portion 164B may be different from each other.

[0286] The length LA5 of the fifth sub-wiring portion 165A and the length LA6 of the sixth sub-wiring portion 166A of the third dummy wiring 45C may be different from each other. Also, the length LB5 of the fifth sub-wiring portion 165B and the length LB6 of the sixth sub-wiring portion 166B may be different from each other.

[0287] The length LA7 of the seventh sub-wiring portion 167A and the length LA8 of the eighth sub-wiring portion 168A of the fourth dummy wiring 45D may be different from each other. Also, the length LB7 of the seventh sub-wiring portion 167B and the length LB8 of the eighth sub-wiring portion 168B may be different from each other.

[0288] The X-direction positions of the first wiring connection layers 191A and 191B of the first dummy wiring 45A can be changed as desired. The X-direction positions of the fifth wiring connection layers 195A and 195B of the third dummy wiring 45C can be changed as desired. The same can be said for the second dummy wiring 45B and the fourth dummy wiring 45D.

[0289] The number of first wiring layers 181A, 181B of the first sub-wiring portions 161A, 161B of the first dummy wiring 45A and the number of second wiring layers 182A, 182B of the second sub-wiring portions 162A, 162B can each be changed arbitrarily. In one example, each of the first wiring layers 181A, 181B and the second wiring layers 182A, 182B may be one. In this case, the first wiring connection layers 191A, 191B and the second wiring connection layers 192A, 192B are omitted. The second dummy wiring 45B may also be changed in a similar manner.

[0290] The number of fifth wiring layers 185A, 185B of the fifth sub-wiring portions 165A, 165B of the third dummy wiring 45C and the number of sixth wiring layers 186A, 186B of the sixth sub-wiring portions 166A, 166B can be changed arbitrarily. In one example, the fifth wiring layers 185A, 185B and the sixth wiring layers 186A, 186B may each be one. In this case, the fifth wiring connection layers 195A, 195B and the sixth wiring connection layers 196A, 196B are omitted. The fourth dummy wiring 45D may also be changed in a similar manner.

[0291] The configurations of the first pad connection portion 171 and the second pad connection portion 172 of the first dummy wiring 45A are not limited to those shown in FIGS. 13 and 14 and can be modified as desired. For example, at least one of the first connection base 201 of the first pad connection portion 171 and the third connection base 203 of the second pad connection portion 172 may not cover the side of the first surface coil 41A opposite the second pad 81B side in the X direction. In other words, the first connection base 201 and the third connection base 203 may cover only the side of the first surface coil 41A facing the second pad 81B. For example, at least one of the second connection base 202 of the first pad connection portion 171 and the fourth connection base 204 of the second pad connection portion 172 may not cover the side of the second surface coil 41B opposite the second pad 81B side in the X direction. In other words, the second connection base 202 and the fourth connection base 204 may be configured to cover only the second pad 81B side of the second surface coil 41B. In one example, the plurality of first straight portions 211A and the plurality of second straight portions 212A may be arranged alternately in groups of two in the Y direction. In another example, the plurality of third straight portions 213A and the plurality of fourth straight portions 214A may be arranged alternately in groups of two in the Y direction.

[0292] 16 and 17, the configurations of the fifth pad connection portion 175 and the sixth pad connection portion 176 of the third dummy wiring 45C are not limited to those shown in Fig. 16 and 17, and can be changed as desired. Similarly, the third pad connection portion 173 and the fourth pad connection portion 174 of the second dummy wiring 45B, and the seventh pad connection portion 177 and the eighth pad connection portion 178 of the fourth dummy wiring 45D can also be changed as desired.

[0293] The configuration of the transformer chip 80 can be changed as desired. As an example, as shown in FIG. 22 , the transformer chip 80 may include two isolation transformers: a first isolation transformer 40P and a second isolation transformer 40Q. The transformer chip 80 includes a first dummy wiring 45A corresponding to the first isolation transformer 40P and a second dummy wiring 45B corresponding to the second isolation transformer 40Q. The configuration of the first dummy wiring 45A is the same as the configuration of the third dummy wiring 45C in the above embodiment. The configuration of the second dummy wiring 45B is the same as the configuration of the fourth dummy wiring 45D in the above embodiment.

[0294] [Modifications of the Signal Transmission Device] The configuration of the signal transmission device 10 can be modified as desired. The signal transmission device 10 may be modified, for example, as in a first modification shown in Figures 23 and 24, a second modification shown in Figure 25, and a third modification shown in Figure 26.

[0295] (First Modification) In a first modification, the signal transmission device 10 may include a plurality of transformer chips 80. Fig. 23 shows a schematic planar structure of the interior of the signal transmission device 10 including two transformer chips 80. Fig. 24 shows a schematic cross-sectional structure of the signal transmission device 10 including two transformer chips 80.

[0296] As shown in FIG. 23 , the signal transmission device 10 includes a first circuit chip 60, a second circuit chip 70, and two transformer chips 80A and 80B. Each of the transformer chips 80A and 80B includes multiple transformers 40 (first to fourth transformers 40A to 40D in the example shown in FIG. 23 ). The second coils 42 of the first to fourth transformers 40A to 40D of the transformer chip 80A are electrically connected to the first circuit 20 of the first circuit chip 60. The first coils 41 of the first to fourth transformers 40A to 40D of the transformer chip 80A are electrically connected to the first coils 41 of the first to fourth transformers 40A to 40D of the transformer chip 80B. Therefore, the first coils 41 of the first to fourth transformers 40A to 40D of the transformer chip 80A and the first coils 41 of the first to fourth transformers 40A to 40D of the transformer chip 80B are electrically floating. The second coils 42 of the first to fourth transformers 40A to 40D of the transformer chip 80B are electrically connected to the second circuit 30 of the second circuit chip 70. In such a signal transmission device 10, the pulse signal output from the first circuit 20 is transmitted to the second circuit 30 of the second circuit chip 70 via the transformer chips 80A and 80B. In addition, the pulse signal output from the second circuit 30 is transmitted to the first circuit 20 via the transformer chips 80A and 80B.

[0297] 24 , the first circuit chip 60, the transformer chips 80A and 80B, and the second circuit chip 70 are arranged spaced apart from one another in the Y direction. The first circuit chip 60, the transformer chip 80A, the transformer chip 80B, and the second circuit chip 70 are arranged in the Y direction, which is the arrangement direction of the first die pad 101 and the second die pad 111. In the modified example shown in FIG. 24 , the first circuit chip 60, the transformer chip 80A, the transformer chip 80B, and the second circuit chip 70 are arranged in this order from the first lead 102 toward the second lead 112. Here, the first die pad 101 is an example of a "die pad."

[0298] Both the first circuit chip 60 and the transformer chip 80A are disposed on the first die pad 101. Both the second circuit chip 70 and the transformer chip 80B are disposed on the second die pad 111.

[0299] The second electrode pads 82 of the transformer chip 80B are electrically connected to the second circuit chip 70 by wires W3. The first electrode pads 81 of the transformer chip 80B are electrically connected to the first electrode pads 81 of the transformer chip 80B by wires W5. In other words, the transformer chips 80A and 80B are connected in series between the first circuit chip 60 and the second circuit chip 70.

[0300] The transformer chip 80B has the same configuration as the transformer chip 80A. Therefore, the transformer chip 80B has the same dielectric strength voltage as the transformer chip 80A. The signal transmission device 10 has a dielectric strength voltage corresponding to the dielectric strength voltages of the transformer chip 80A and the transformer chip 80B connected in series.

[0301] 25 , the signal transmission device 10 is not a semiconductor chip dedicated to transformers like the transformer chip 80, but rather has a configuration in which a plurality of transformers 40 are included in the first circuit chip 60. Therefore, the signal transmission device 10 includes two semiconductor chips, the first circuit chip 60 and the second circuit chip 70.

[0302] The first circuit chip 60 includes a first circuit 20 and a plurality of transformers 40. The first circuit chip 60 includes first electrode pads 61 and third electrode pads 63 of the first circuit chip 60 and first electrode pads 81 of the transformer chip 80 shown in FIG. 2. The first circuit chip 60 is disposed on the first die pad 101, and the second circuit chip 70 is disposed on the second die pad 111. Furthermore, because the first circuit chip 60 includes a plurality of transformers 40, the wire W2 shown in FIG. 2 is not necessary.

[0303] 26 , the signal transmission device 10 is not a semiconductor chip dedicated to transformers like the transformer chip 80, but rather has a configuration in which multiple transformers 40 are included in both the first circuit chip 60 and the second circuit chip 70. Therefore, the signal transmission device 10 includes two semiconductor chips, the first circuit chip 60 and the second circuit chip 70.

[0304] The first circuit chip 60 includes a first circuit 20 and a plurality of transformers 40. The first circuit chip 60 includes first electrode pads 61 and third electrode pads 63 of the first circuit chip 60 and first electrode pads 81 of the transformer chip 80 shown in FIG. 2. The pulse signal output from the first circuit 20 is transmitted to the second circuit 30 through the transformer 40 in the first circuit chip 60.

[0305] The second circuit chip 70 includes the second circuit 30 and a plurality of transformers 40. The second circuit chip 70 includes second electrode pads 72 and third electrode pads 73 of the second circuit chip 70 and first electrode pads 81 of the transformer chip 80 shown in FIG.

[0306] The first circuit chip 60 is disposed on the first die pad 101, and the second circuit chip 70 is disposed on the second die pad 111. The first electrode pads 81 of the first circuit chip 60 and the first electrode pads 81 of the second circuit chip 70 are electrically connected by wires W5. Furthermore, because the first circuit chip 60 and the second circuit chip 70 include multiple transformers 40, the wires W3 shown in FIG. 2 are not required.

[0307] At least one of the first circuit chip 60 and the second circuit chip 70 may be omitted from the signal transmission device 10. When the first circuit chip 60 is omitted from the signal transmission device 10, the signal transmission device 10 includes the transformer chip 80, the second circuit chip 70, and a sealing resin 120 that seals the transformer chip 80 and the second circuit chip 70. When the second circuit chip 70 is omitted from the signal transmission device 10, the signal transmission device 10 includes the transformer chip 80, the first circuit chip 60, and a sealing resin 120 that seals the transformer chip 80 and the first circuit chip 60. When both the first circuit chip 60 and the second circuit chip 70 are omitted from the signal transmission device 10, the signal transmission device 10 includes the transformer chip 80 and a sealing resin 120 that seals the transformer chip 80.

[0308] One or more of the various examples described herein can be combined to the extent that they are not technically inconsistent. In this specification, "at least one of A and B" should be understood to mean "only A, or only B, or both A and B."

[0309] The term "on" as used in this disclosure includes the meanings of "on" and "above," unless the context clearly indicates otherwise. Thus, for example, the expression "a first element is disposed on a second element" is intended to mean that in some embodiments, the first element may be disposed directly on the second element in contact with the second element, while in other embodiments, the first element may be disposed above the second element without contacting the second element. In other words, the term "on" does not exclude a structure in which another element is formed between the first element and the second element.

[0310] The Z direction used in this disclosure does not necessarily have to be the vertical direction, nor does it have to completely coincide with the vertical direction. Therefore, various structures according to this disclosure are not limited to the "up" and "down" in the Z direction described herein being "up" and "down" in the vertical direction. For example, the X direction may be the vertical direction, or the Y direction may be the vertical direction.

[0311] <Supplementary Notes> The technical ideas that can be understood from the above embodiment and each modified example are described below. Note that the reference numerals of the components of the embodiment corresponding to the components described in each supplementary note are shown in parentheses. The reference numerals are shown as examples to aid understanding, and the components described in each supplementary note should not be limited to the components indicated by the reference numerals.

[0312] [Supplementary Note 1] A first isolation transformer (40P) including: an insulating layer (84) including a front surface (84s) and a back surface (84r) facing opposite each other in a thickness direction (Z direction); a first surface coil (41A) and a second surface coil (41B) disposed in the insulating layer (84) near the front surface (84s) and spaced apart from each other in a first direction (X direction) orthogonal to the thickness direction (Z direction); and a first back surface coil (42A) and a second back surface coil (42B) disposed in the insulating layer (84) near the back surface (84r) and spaced apart from each other in the first direction (X direction) and disposed opposite the first surface coil (41A) and the second surface coil (41B); a second isolation transformer (40Q) including a third surface coil (41C) and a fourth surface coil (41D) disposed in the insulating layer (84) near the front surface (84s) and spaced apart from each other in the first direction (X direction), and a third back surface coil (42C) and a fourth back surface coil (42D) disposed in the insulating layer (84) near the back surface (84r) and spaced apart from each other in the first direction (X direction) and facing the third surface coil (41C) and the fourth surface coil (41D), the second isolation transformer (40Q) being disposed spaced apart from the first isolation transformer (40P) in the first direction (X direction); a first outer pad (81B) disposed between the first surface coil (41A) and the second surface coil (41B) in the first direction (X direction) when viewed from the thickness direction (Z direction), and electrically connected to both the first surface coil (41A) and the second surface coil (41B); a second outer pad (81D) disposed between the third surface coil (41C) and the fourth surface coil (41D) in the first direction (X direction) as viewed from the thickness direction (Z direction), and electrically connected to both the third surface coil (41C) and the fourth surface coil (41D); and first dummy wiring (45A) provided on both sides of the first isolation transformer (40P) in a second direction (Y direction) perpendicular to the first direction (X direction) as viewed from the thickness direction (Z direction), and electrically connected to the first outer pad (81B);and second dummy wirings (45B) provided on both sides of the second isolation transformer (40Q) in the second direction (Y direction), electrically connected to the second outer pads (81D), and electrically insulated from the first dummy wirings (45A), wherein the first dummy wirings (45A) and the second dummy wirings (45B) are aligned along the first direction (X direction).

[0313] [Supplementary Note 2] The transformer chip described in Supplementary Note 1, wherein the first dummy wiring (45A) includes a portion that is linearly symmetrical with respect to a virtual line (VL1) connecting the center (C1) of the first surface coil (41A) and the center (C2) of the second surface coil (41B), and the second dummy wiring (45B) includes a portion that is linearly symmetrical with respect to a virtual line (VL2) connecting the center (C3) of the third surface coil (41C) and the center (C4) of the fourth surface coil (41D).

[0314] [Supplementary Note 3] The transformer chip described in Supplementary Note 1 or 2, wherein the first dummy wiring (45A) includes a portion that is linearly symmetrical with respect to a virtual line (VL5) that passes through the center between the center (C1) of the first surface coil (41A) and the center (C2) of the second surface coil (41B) and extends along the second direction (Y direction), and the second dummy wiring (45B) includes a portion that is linearly symmetrical with respect to a virtual line (VL6) that passes through the center between the center (C3) of the third surface coil (41C) and the center (C4) of the fourth surface coil (41D) and extends along the second direction (Y direction).

[0315] [Supplementary Note 4] The first dummy wiring (45A) includes: a first wiring portion (161) arranged on one side of the first surface coil (41A) and the second surface coil (41B) in the second direction (Y direction) and formed in a straight line extending in the first direction (X direction); and a second wiring portion (162) arranged on the other side of the first surface coil (41A) and the second surface coil (41B) in the second direction (Y direction) and formed in a straight line extending in the first direction (X direction); and the second dummy wiring (45B) includes: a third wiring portion (163) arranged on one side of the third surface coil (41C) and the fourth surface coil (41D) in the second direction (Y direction) and formed in a straight line extending in the first direction (X direction); and a fourth wiring portion (164) arranged on the other side of the third surface coil (41C) and the fourth surface coil (41D) in the second direction (Y direction) and formed in a straight line extending in the first direction (X direction).

[0316] [Supplementary Note 5] The transformer chip described in Supplementary Note 4, wherein the first wiring portion (161) includes two first sub-wiring portions (161A, 161B) arranged to be aligned along the first direction (X direction), and the second wiring portion (162) includes two second sub-wiring portions (162A, 162B) arranged to be aligned along the first direction (X direction).

[0317] [Appendix 6] The transformer chip described in Appendix 5, wherein the lengths (LA1, LB1) of the two first sub-wiring portions (161A, 161B) in the first direction (X direction) are equal to each other, and the lengths (LA2, LB3) of the two second sub-wiring portions (162A, 162B) in the first direction (X direction) are equal to each other.

[0318] [Appendix 7] The transformer chip described in Appendix 6, wherein the lengths (LA1, LB1) of the first sub-wiring portions (161A, 161B) in the first direction (X direction) are equal to the lengths (LA2, LB2) of the second sub-wiring portions (162A, 162B) in the first direction (X direction).

[0319] [Appendix 8] The transformer chip according to any one of Appendices 5 to 7, wherein each of the two first sub-wiring portions (161A, 161B) includes: a plurality of first wiring layers (181A, 181B) stacked in the second direction (Y direction); and a first wiring connection layer (191A, 191B) connecting the plurality of first wiring layers (181A, 181B); and each of the two second sub-wiring portions (162A, 162B) includes: a plurality of second wiring layers (182A, 182B) stacked in the second direction (Y direction); and a second wiring connection layer (192A, 192B) connecting the plurality of second wiring layers (182A, 182B).

[0320] [Appendix 9] The transformer chip described in Appendix 8, wherein the first wiring connection layer (191A, 191B) connects the plurality of first wiring layers (181A, 181B) at a central portion of the first wiring section (161) in the first direction (X direction), and the second wiring connection layer (192A, 192B) connects the plurality of second wiring layers (182A, 182B) at a central portion of the second wiring section (162) in the first direction (X direction).

[0321] [Appendix 10] The transformer chip according to appendix 8 or 9, wherein the two first wiring connection layers (191A, 191B) are adjacent to each other in the first direction (X direction), the two first sub-wiring portions (161A, 161B) extend in opposite directions from two adjacent first wiring connection layers (191A, 191B), the two second wiring connection layers (192A, 192B) are adjacent to each other in the first direction (X direction), and the two second sub-wiring portions (162A, 162B) extend in opposite directions from two adjacent second wiring connection layers (192A, 192B).

[0322] [Appendix 11] The transformer chip described in any one of Appendices 5 to 10, wherein the first dummy wiring (45A) includes: a first pad connection portion (171) that electrically connects the two first sub-wiring portions (161A, 161B) and the first outer pad (81B); and a second pad connection portion (172) that electrically connects the two second sub-wiring portions (162A, 162B) and the first outer pad (81B).

[0323] [Supplementary Note 12] The first pad connection portion (171) includes: a first connection base (201) extending to surround at least the first outer pad (81B) side of the first surface coil (41A); a second connection base (202) extending to surround at least the first outer pad (81B) side of the second surface coil (41B); a plurality of first linear portions (211A) connected to the first connection base (201), aligned in the second direction (Y direction), and extending in the first direction (X direction); and a plurality of second linear portions (212A) connected to the second connection base (202), aligned in the second direction (Y direction), and extending in the first direction (X direction); and the second pad connection portion (172) includes: a third connection base (203) extending to surround at least the first outer pad (81B) side of the first surface coil (41A); a fourth connection base (204) extending to surround at least the first outer pad (81B) side of the second surface coil (41B); a plurality of third straight line portions (213A) connected to the third connection base (203), aligned in the second direction (Y direction), and extending in the first direction (X direction); and a plurality of fourth straight line portions (214A) connected to the fourth connection base (204), aligned in the second direction (Y direction), and extending in the first direction (X direction), wherein the plurality of first straight line portions (211A) and the plurality of second straight line portions (212A) are alternately arranged one by one in the second direction (Y direction), The transformer chip according to claim 11, wherein the plurality of third straight line portions (213A) and the plurality of fourth straight line portions (214A) are arranged alternately one by one in the second direction (Y direction).

[0324] [Supplementary Note 13] The first connection base (201) is formed so as to surround a portion of the first surface coil (41A) closer to the first wiring portion (161) when viewed from the thickness direction (Z direction), the second connection base (202) is formed so as to surround a portion of the second surface coil (41B) closer to the first wiring portion (161) when viewed from the thickness direction (Z direction), the third connection base (203) is formed so as to surround a portion of the first surface coil (41A) closer to the second wiring portion (162) when viewed from the thickness direction (Z direction), and the fourth connection base (204) is formed so as to surround a portion of the second surface coil (41B) closer to the second wiring portion (162) when viewed from the thickness direction (Z direction), A transformer chip as described in Appendix 12, wherein the tip portion (201A) of the first connection base (201) and the tip portion (203A) of the third connection base (203) are adjacent to each other in the second direction (Y direction), and the tip portion (202A) of the second connection base (202) and the tip portion (204A) of the fourth connection base (204) are adjacent to each other in the second direction (Y direction).

[0325] [Supplementary Note 14] The first dummy wiring (45A) includes: a first wiring portion (241) disposed on one side of the first surface coil (41A) and the second surface coil (41B) in the second direction (Y direction) and formed in a straight line extending in the first direction (X direction); first curved portions (242A, 242B) formed so as to individually and partially surround the first surface coil (41A) and the second surface coil (41B) from both ends of the first wiring portion (241) in the first direction (X direction) when viewed from the thickness direction (Z direction); and a second wiring portion (243) disposed on the other side of the first surface coil (41A) and the second surface coil (41B) in the second direction (Y direction) and formed in a straight line extending in the first direction (X direction). when viewed from the thickness direction (Z direction), second curved portions (244A, 244B) formed so as to individually and partially surround the first surface coil (41A) and the second surface coil (41B) from both ends of the second wiring portion (243) in the first direction (X direction), wherein the second dummy wiring (45B) includes: a third wiring portion arranged on one side of the third surface coil (41C) and the fourth surface coil (41D) in the second direction (Y direction) and formed in a straight line extending in the first direction; and third curved portions formed so as to individually and partially surround the third surface coil (41C) and the fourth surface coil (41D) from both ends of the third wiring portion in the first direction (X direction), when viewed from the thickness direction (Z direction), The transformer chip according to any one of appendices 1 to 3, comprising: a fourth wiring portion arranged on the other side of the third surface coil (41C) and the fourth surface coil (41D) in the second direction (Y direction) and formed in a straight line extending in the first direction (X direction); and a fourth curved portion formed so as to individually and partially surround the third surface coil (41C) and the fourth surface coil (41D) from both ends of the fourth wiring portion in the first direction (X direction) when viewed from the thickness direction (Z direction).

[0326] [Supplementary Note 15] The first wiring portion (241) includes two first sub-wiring portions (241A, 241B) arranged to be aligned along the first direction (X direction), The second wiring portion (243) includes two second sub-wiring portions (243A, 243B) arranged to be aligned along the first direction (X direction), The lengths of the two first sub-wiring portions (241A, 241B) in the first direction (X direction) are equal to each other, The lengths of the two second sub-wiring portions (243A, 243B) in the first direction (X direction) are equal to each other, The lengths of the two first curved portions (242A, 242B) in the direction in which the first curved portions (242A, 242B) extend are equal to each other, The transformer chip according to claim 14, wherein the lengths of the two second curved portions (244A, 244B) in the direction in which the second curved portions (244A, 244B) extend are equal to each other.

[0327] [Appendix 16] The transformer chip described in Appendix 15, wherein the length of each of the first sub-wiring portions (241A, 241B) in the first direction (X direction) is equal to the length of each of the second sub-wiring portions (243A, 243B) in the first direction (X direction), and the length of each of the first curved portions (242A, 242B) in the direction in which the first curved portions (242A, 242B) extend is equal to the length of each of the second curved portions (244A, 244B) in the direction in which the second curved portions (244A, 244B) extend.

[0328] [Appendix 17] The transformer chip described in any one of Appendices 14 to 16, wherein the tip portions (242AA, 242BA) of the first curved portions (242A, 242B) and the tip portions (244AA, 244BA) of the second curved portions (244A, 244B) are adjacent to each other in the second direction (Y direction).

[0329] [Appendix 18] The transformer chip described in Appendix 1 or 3, wherein the first dummy wiring (45A) is formed in an open loop shape surrounding the first surface coil (41A) and the second surface coil (41B) and includes a first wiring portion (231) electrically connected to the first outer pad (81B), and the second dummy wiring (45B) is formed in an open loop shape surrounding the third surface coil (41C) and the fourth surface coil (41D) and includes a second wiring portion (232) electrically connected to the second outer pad (81D).

[0330] [Supplementary Note 19] The transformer chip described in Supplementary Note 18, wherein the first wiring portion (231) includes two first sub-wiring portions (231A, 231B) arranged to be aligned along the first direction (X direction), the second wiring portion (232) includes two second sub-wiring portions (232A, 232B) arranged to be aligned along the first direction (X direction), the lengths of the two first sub-wiring portions (231A, 231B) are equal to each other, and the lengths of the two second sub-wiring portions (232A, 232B) are equal to each other.

[0331] [Supplementary Note 20] A die pad (101), a transformer chip (80) disposed on the die pad (101), and a sealing resin (120) that seals the die pad (101) and the transformer chip (80), wherein the transformer chip (80) comprises an insulating layer (84) including a front surface (84s) and a back surface (84r) facing opposite to each other in a thickness direction (Z direction), a first isolation transformer (40P) including: a first surface coil (41A) and a second surface coil (41B) disposed in the insulating layer (84) near the front surface (84s) and spaced apart from each other in a first direction (X direction) orthogonal to the thickness direction (Z direction); and a first back surface coil (42A) and a second back surface coil (42B) disposed in the insulating layer (84) near the back surface (84r) and spaced apart from each other in the first direction (X direction) and disposed opposite the first surface coil (41A) and the second surface coil (41B); a second isolation transformer (40Q) including a third surface coil (41C) and a fourth surface coil (41D) disposed in the insulating layer (84) near the front surface (84s) and spaced apart from each other in the first direction (X direction), and a third back surface coil (42C) and a fourth back surface coil (42D) disposed in the insulating layer (84) near the back surface (84r) and spaced apart from each other in the first direction (X direction) and facing the third surface coil (41C) and the fourth surface coil (41D), the second isolation transformer (40Q) being disposed spaced apart from the first isolation transformer (40P) in the first direction (X direction); a first outer pad (81B) disposed between the first surface coil (41A) and the second surface coil (41B) in the first direction (X direction) when viewed from the thickness direction (Z direction), and electrically connected to both the first surface coil (41A) and the second surface coil (41B); a second outer pad (81D) disposed between the third surface coil (41C) and the fourth surface coil (41D) in the first direction (X direction) when viewed from the thickness direction (Z direction), and electrically connected to both the third surface coil (41C) and the fourth surface coil (41D);a first dummy wiring (45A) provided on both sides of the first isolation transformer (40P) in a second direction (Y direction) perpendicular to the first direction (X direction) when viewed from the thickness direction (Z direction), and electrically connected to the first outer pad (81B); and a second dummy wiring (45B) provided on both sides of the second isolation transformer (40Q) in the second direction (Y direction), and electrically connected to the second outer pad (81D) and electrically insulated from the first dummy wiring (45A), wherein the first dummy wiring (45A) and the second dummy wiring (45B) are aligned along the first direction (X direction).

[0332] [Supplementary Note 21] The transformer chip according to any one of Supplementary Notes 1 to 19, further including a floating dummy wiring (140) that surrounds the first to fourth surface coils (41A to 41D), the first dummy wiring (45A), and the second dummy wiring (45B) and is insulated from the first dummy wiring (45A) and the second dummy wiring (45B) when viewed from the thickness direction (Z direction).

[0333] [Supplementary Note 22] The transformer chip according to Supplementary Note 21, wherein the floating dummy wiring (140) is formed in an open loop shape.

[0334] [Appendix 23] The transformer chip described in any one of Appendices 4 to 13, wherein the third wiring portion (163) includes two third sub-wiring portions (163A, 163B) arranged to be aligned along the first direction (X direction), and the fourth wiring portion (164) includes two fourth sub-wiring portions (164A, 164B) arranged to be aligned along the first direction (X direction).

[0335] [Appendix 24] The transformer chip described in Appendix 23, wherein the lengths (LA3, LB3) of the two third sub-wiring portions (163A, 163B) in the first direction (X direction) are equal to each other, and the lengths (LA4, LB4) of the two fourth sub-wiring portions (164A, 164B) in the first direction (X direction) are equal to each other.

[0336] [Appendix 25] The transformer chip described in Appendix 24, wherein the length (LA3, LB3) of the third sub-wiring portion (163A, 163B) in the first direction (X direction) is equal to the length (LA4, LB4) of each of the fourth sub-wiring portions (164A, 164B) in the first direction (X direction).

[0337] [Appendix 26] The transformer chip described in any one of Appendices 23 to 25, wherein each of the two third sub-wiring sections (163A, 163B) includes: a plurality of third wiring layers stacked in the second direction (Y direction); and a third wiring connection layer connecting the plurality of third wiring layers; and each of the two fourth sub-wiring sections (164A, 164B) includes: a plurality of fourth wiring layers stacked in the second direction (Y direction); and a fourth wiring connection layer connecting the plurality of fourth wiring layers.

[0338] [Appendix 27] The transformer chip described in Appendix 26, wherein the third wiring connection layer connects the plurality of third wiring layers at the central portion of the third wiring section (163) in the first direction (X direction), and the fourth wiring connection layer connects the plurality of fourth wiring layers at the central portion of the fourth wiring section (164) in the first direction (X direction).

[0339] [Appendix 28] The transformer chip described in Appendix 27, wherein the two third wiring connection layers are adjacent to each other in the first direction (X direction), the two third sub-wiring portions (163A, 163B) extend in opposite directions from two adjacent third wiring connection layers, the two fourth wiring connection layers are adjacent to each other in the first direction (X direction), and the two fourth sub-wiring portions (164A, 164B) extend in opposite directions from two adjacent fourth wiring connection layers.

[0340] [Appendix 29] The transformer chip described in Appendix 28, wherein the second dummy wiring (45B) includes: a third pad connection portion (173) that connects the two third sub-wiring portions (163A, 163B) and the second outer pad (81D); and a fourth pad connection portion (174) that connects the two fourth sub-wiring portions (164A, 164B) and the second outer pad (81D).

[0341] [Supplementary Note 30] The third pad connection portion (173) includes: a ninth connection base extending to surround at least the second outer pad (81D) side of the third surface coil (41C); a tenth connection base extending to surround at least the second outer pad (81D) side of the fourth surface coil (41D); a plurality of ninth straight line portions connected to the ninth connection base, aligned in the second direction (Y direction), and extending in the first direction (X direction); and a plurality of tenth straight line portions connected to the tenth connection base, aligned in the second direction (Y direction), and extending in the first direction (X direction). The fourth pad connection portion (174) includes: an eleventh connection base extending to surround at least the second outer pad (81D) side of the third surface coil (41C); 29. A transformer chip according to claim 29, comprising: a twelfth connection base extending to surround at least the second outer pad (81D) side of the fourth surface coil (41D); a plurality of eleventh straight portions connected to the eleventh connection base, aligned in the second direction (Y direction), and extending in the first direction (X direction); and a plurality of twelfth straight portions connected to the twelfth connection base, aligned in the second direction (Y direction), and extending in the first direction (X direction), wherein the plurality of ninth straight portions and the plurality of tenth straight portions are alternately arranged in the second direction (Y direction), and the plurality of eleventh straight portions and the plurality of twelfth straight portions are alternately arranged in the second direction (Y direction).

[0342] [Supplementary Note 31] The ninth connection base is formed so as to surround a portion of the third surface coil (41C) closer to the third wiring portion (163) when viewed from the thickness direction (Z direction), the tenth connection base is formed so as to surround a portion of the fourth surface coil (41D) closer to the third wiring portion (163) when viewed from the thickness direction (Z direction), the eleventh connection base is formed so as to surround a portion of the third surface coil (41C) closer to the fourth wiring portion (164) when viewed from the thickness direction (Z direction), the twelfth connection base is formed so as to surround a portion of the fourth surface coil (41D) closer to the fourth wiring portion (164) when viewed from the thickness direction (Z direction), and a tip end of the ninth connection base and a tip end of the eleventh connection base are adjacent to each other in the second direction (Y direction), The transformer chip according to claim 30, wherein a tip end of the tenth connection base and a tip end of the twelfth connection base are adjacent to each other in the second direction (Y direction).

[0343] [Appendix 32] The transformer chip described in any one of Appendices 14 to 16, wherein the third wiring portion includes two third sub-wiring portions arranged to be aligned along the first direction (X direction), the fourth wiring portion includes two fourth sub-wiring portions arranged to be aligned along the first direction (X direction), the lengths of the two third sub-wiring portions in the first direction (X direction) are equal to each other, the lengths of the two fourth sub-wiring portions in the first direction (X direction) are equal to each other, the lengths of the two third curved portions in the direction in which the third curved portions extend are equal to each other, and the lengths of the two fourth curved portions in the direction in which the fourth curved portions extend are equal to each other.

[0344] [Appendix 33] The transformer chip described in Appendix 32, wherein the length of the third sub-wiring portion in the first direction (X direction) is equal to the length of the fourth sub-wiring portion in the first direction (X direction), and the length of the third curved portion in the direction in which the third curved portion extends is equal to the length of the fourth curved portion in the direction in which the fourth curved portion extends.

[0345] [Supplementary Note 34] The transformer chip according to Supplementary Note 33, wherein a tip end of the third curved portion and a tip end of the fourth curved portion are adjacent to each other in the second direction.

[0346] The above description is merely illustrative. Those skilled in the art will recognize that many more possible combinations and permutations are possible other than the components and methods (manufacturing processes) listed for the purpose of illustrating the technology of the present disclosure. The present disclosure is intended to embrace all alternatives, modifications, and variations that fall within the scope of the present disclosure, including the claims.

[0347] DESCRIPTION OF SYMBOLS 10...Signal transmission device 20...First circuit 21...Transmitting circuit 22...Receiving circuit 30...Second circuit 31...Receiving circuit 32...Transmitting circuit 40...Transformer 40A to 40D...First to fourth transformers 40P...First insulating transformer 40Q...Second insulating transformer 40R...Third insulating transformer 40S...Fourth insulating transformer 41...First coil 41A to 41H...First to eighth surface coils 42...Second coil 42A to 42H...First to eighth back coils 43...First coil wiring 44...Second coil wiring 45...Dummy wiring 45A to 45D...First to fourth dummy wiring 51A to 51D...Inner end wiring 52A to 52D...Outer end wiring 53...Via 57A to 57D...Inner end wiring 58A to 58D...Outer end wiring 60...First circuit chip 60s...Chip main surface 60r...Chip back surface 61-63...First to third electrode pads 70...Second circuit chip 70s...Chip main surface 70r...Chip back surface 71-73...First to third electrode pads 80, 80A, 80B...Transformer chip 80s...Chip main surface 80r...Chip back surface 80a-80d...Chip side surface 81...First electrode pad 81A-81H...First to eighth pads 82...Second electrode pad 82A-82H...First to eighth pads 83...Substrate 83s...Substrate main surface 83r...Substrate back surface 84...Insulating layer 84s...Upper surface 84r...Lower surface 85...Insulating film 85A...First insulating film 85B...Second insulating film 85L...Lowermost insulating film 85U...Uppermost insulating film 85P...insulating film in which the first coil is embedded 85Q...insulating film in which the second coil is embedded 86...passivation film 87...resin layer 87A...separation groove 87B...first resin opening 87C...second resin opening 100...first lead frame 101...first die pad 102...first lead 110...second lead frame 111...second die pad 112...second lead 120...sealing resin 121-124...resin side surface 131A-131H...connection wiring 132A-132H...first wiring portion 133A-133H...second wiring portion 134A...via 140...floating dummy wiring 161-168...first to eighth wiring portions 161A, 161B...first sub-wiring portion 162A, 162B...second sub-wiring portion 163A,163B...Third sub wiring portion 164A, 164B...Fourth sub wiring portion 165A, 165B...Fifth sub wiring portion 166A, 166B...Sixth sub wiring portion 167A, 167B...Seventh sub wiring portion 168A, 168B...Eighth sub wiring portion 171 to 178...1st to eighth pad connection portions 181A, 181B...First wiring layer 182A, 182B...Second wiring portion 185A, 185B...Fifth wiring layer 185AA...Straight portion 185AB...Curved portion 186A, 186B...Sixth wiring layer 191A, 191B...First wiring connection layer 192A, 192B...Second wiring connection layer 195A, 195B...Fifth wiring connection layer 196A, 196B...Sixth wiring connection layer 201 to 208...First to eighth connection base portions 201A to 208A...Tip portions 211A, 211B...First straight portion 212A, 212B...Second straight portion 213A, 213B...Third straight portion 214A, 214B...Fourth straight portion 215...Fifth straight portion 216A, 216B...Sixth straight portion 217...Seventh straight portion 218A, 218B...Eighth straight portion 221...First connection wiring 222...Second connection wiring 225...Fifth connection wiring 226...Sixth connection wiring 231 to 234...First to fourth wiring portions 231A, 231B...First sub-wiring portion 232A, 232B...Second sub-wiring portion 233A, 233B...Third sub-wiring portion 234A, 234B...Fourth sub-wiring portion 235-238...First to fourth pad connection portions 241...First wiring portion 241A, 241B...First sub-wiring portion 242A, 242B...First curved portion 242AA, 242BA...Tip portion 243...Second wiring portion 243A, 243B...Second sub-wiring portion 244A, 244B...Second curved portion 244AA, 244BA...Tip portion 245...First pad connection portion 246...Second pad connection portion W1 to W5...Wire SD...Conductive bonding material C1 to C8...Coil center VL1 to VL8...Virtual lines LA1, LB1...X-direction dimension of first sub-wiring portion LA2, LB2... X-direction dimension of the second sub-wiring portion LA3, LB3... X-direction dimension of the third sub-wiring portion LA4, LB4... X-direction dimension of the fourth sub-wiring portion LA5, LB5... X-direction dimension of the fifth sub-wiring portion LA6, LB6... X-direction dimension of the sixth sub-wiring portion LA7, LB7... X-direction dimension of the seventh sub-wiring portion LA8,LB8: X-direction dimension of the eighth sub-wiring portion,

Claims

1. An insulating layer including a front and back surface that face opposite each other in the thickness direction, A first isolation transformer comprising: a first surface coil and a second surface coil arranged within the insulating layer near the surface and spaced apart from each other in a first direction perpendicular to the thickness direction; and a first back surface coil and a second back surface coil arranged within the insulating layer near the back surface and spaced apart from each other in the first direction, and facing the first surface coil and the second surface coil; The insulating layer includes a third surface coil and a fourth surface coil arranged near the surface and spaced apart from each other in the first direction, and a third back surface coil and a fourth back surface coil arranged near the back surface and spaced apart from each other in the first direction and facing the third surface coil and the fourth surface coil, and a second insulating transformer arranged spaced apart from the first insulating transformer in the first direction, A first outer pad is positioned between the first surface coil and the second surface coil in the first direction when viewed from the thickness direction, and is electrically connected to both the first surface coil and the second surface coil. A second outer pad is positioned between the third surface coil and the fourth surface coil in the first direction when viewed from the thickness direction, and is electrically connected to both the third surface coil and the fourth surface coil. A first dummy wiring is provided on both sides of the first isolation transformer in a second direction perpendicular to the first direction when viewed from the thickness direction, and is electrically connected to the first outer pad, A second dummy wiring is provided on both sides of the second isolation transformer in the second direction, electrically connected to the second outer pad, and electrically insulated from the first dummy wiring, Includes, The first dummy wiring and the second dummy wiring are aligned along the first direction. Trans chip.

2. The first dummy wiring includes a portion that is symmetrical with respect to a virtual line connecting the center of the first surface coil and the center of the second surface coil, The second dummy wiring includes a portion that is symmetrical with respect to a virtual line connecting the center of the third surface coil and the center of the fourth surface coil. The transformer chip according to claim 1.

3. The first dummy wiring includes a portion that is symmetrical with respect to a virtual line passing through the center of the first surface coil and the center of the second surface coil and extending along the second direction, The second dummy wiring includes a portion that is symmetrical with respect to a virtual line that passes through the center of the third surface coil and the center of the fourth surface coil and extends along the second direction. The transformer chip according to claim 1.

4. The first dummy wiring is, A first wiring section is arranged in the second direction on one side of the first surface coil and the second surface coil, and is formed in a straight line extending in the first direction, A second wiring section is arranged on the other side of the first surface coil and the second surface coil in the second direction and is formed in a straight line extending in the first direction, Includes, The second dummy wiring is, A third wiring portion is arranged on one side of the third surface coil and the fourth surface coil in the second direction and is formed in a straight line extending in the first direction, A fourth wiring section is arranged on the other side of the third surface coil and the fourth surface coil in the second direction and is formed in a straight line extending in the first direction, including The transformer chip according to claim 1.

5. The first wiring section includes two first sub-wiring sections arranged to align along the first direction, The second wiring section includes two second sub-wiring sections arranged to align along the first direction. The transformer chip according to claim 4.

6. The lengths of each of the two aforementioned first sub-wiring sections in the first direction are equal to each other. The lengths of each of the two aforementioned second sub-wiring sections in the first direction are equal to each other. The transformer chip according to claim 5.

7. Each length of the first sub-wiring section in the first direction is equal to each length of the second sub-wiring section in the first direction. The transformer chip according to claim 6.

8. Each of the two first sub-wiring sections is: A plurality of first wiring layers stacked in the second direction, A first wiring connection layer connecting the plurality of first wiring layers, Includes, Each of the two second sub-wiring sections is, A plurality of second wiring layers stacked in the second direction, A second wiring connection layer connecting the plurality of second wiring layers, including The transformer chip according to claim 5.

9. The first wiring connection layer is the central portion of the first wiring section in the first direction. The plurality of first wiring layers are connected in this manner. The second wiring connection layer connects the plurality of second wiring layers in the central portion of the second wiring section in the first direction. The transformer chip according to claim 8.

10. The two first wiring connection layers are adjacent in the first direction, The two first sub-wiring sections extend in opposite directions from two adjacent first wiring connection layers. The two second wiring connection layers are adjacent in the first direction, The two second sub-wiring sections extend in opposite directions from two adjacent second wiring connection layers. The transformer chip according to claim 8.

11. The first dummy wiring is, A first pad connection section electrically connects the two first sub-wiring sections and the first outer pad, A second pad connection section electrically connects the two second sub-wiring sections and the first outer pad, including The transformer chip according to claim 5.

12. The first pad connection section is, A first connecting base extending so as to surround at least the first outer pad side of the first surface coil, A second connecting base extending so as to surround at least the first outer pad side of the second surface coil, A plurality of linear first linear portions are connected to the first connecting base and arranged in the second direction, extending in the first direction, Connected to the second connecting base and arranged in the second direction, A plurality of linear second linear portions extending in the first direction, Includes, The second pad connection section is, A third connecting base extending so as to surround at least the first outer pad side of the first surface coil, A fourth connecting base extending so as to surround at least the first outer pad side of the second surface coil, A plurality of linear third linear portions are connected to the third connecting base and arranged in the second direction, extending in the first direction, A plurality of linear fourth sections are connected to the fourth connecting base and arranged in the second direction, extending in the first direction, Includes, The plurality of first straight sections and the plurality of second straight sections are arranged alternately one by one in the second direction. The plurality of third linear sections and the plurality of fourth linear sections are arranged alternately one by one in the second direction. The transformer chip according to claim 11.

13. The first connection base is formed to surround the portion of the first surface coil closest to the first wiring portion when viewed from the thickness direction, The second connection base is formed to surround the portion of the second surface coil closest to the first wiring portion when viewed from the thickness direction, The third connection base is formed to surround the portion of the first surface coil that is closer to the second wiring portion when viewed from the thickness direction. The fourth connection base is formed to surround the portion of the second surface coil that is closer to the second wiring portion when viewed from the thickness direction, The tip of the first connecting base and the tip of the third connecting base are adjacent to each other in the second direction. The tip of the second connecting base and the tip of the fourth connecting base are Adjacent in two directions The transformer chip according to claim 12.

14. The first dummy wiring is, A first wiring section is arranged in the second direction on one side of the first surface coil and the second surface coil, and is formed in a straight line extending in the first direction, Viewed from the thickness direction, the first curved portion is formed to individually and partially surround the first surface coil and the second surface coil from both ends in the first direction of the first wiring portion, A second wiring section is arranged on the other side of the first surface coil and the second surface coil in the second direction and is formed in a straight line extending in the first direction, Viewed from the thickness direction, the second curved portion is formed to individually and partially surround the first surface coil and the second surface coil from both ends in the first direction of the second wiring portion, Includes, The second dummy wiring is, A third wiring portion is arranged on one side of the third surface coil and the fourth surface coil in the second direction and is formed in a straight line extending in the first direction, Viewed from the thickness direction, the third curved portion is formed to individually and partially surround the third surface coil and the fourth surface coil from both ends in the first direction of the third wiring portion, A fourth wiring section is arranged on the other side of the third surface coil and the fourth surface coil in the second direction and is formed in a straight line extending in the first direction, Viewed from the thickness direction, the fourth curved portion is formed to individually and partially surround the third surface coil and the fourth surface coil from both ends in the first direction of the fourth wiring portion, including The transformer chip according to claim 1.

15. The first wiring section includes two first sub-wiring sections arranged to align along the first direction, The second wiring section includes two second sub-wiring sections arranged to align along the first direction, The lengths of each of the two aforementioned first sub-wiring sections in the first direction are equal to each other. The lengths of each of the two aforementioned second sub-wiring sections in the aforementioned first direction are equal to each other. In the direction in which the first curved portion extends, the lengths of each of the two first curved portions are equal to each other. In the direction in which the second curved portion extends, the lengths of each of the two second curved portions are equal to each other. The transformer chip according to claim 14.

16. Each length of the first sub-wiring section in the first direction is equal to each length of the second sub-wiring section in the first direction. The length of each of the first curved portions in the direction in which the first curved portion extends is equal to the length of each of the second curved portions in the direction in which the second curved portion extends. The transformer chip according to claim 15.

17. Each of the tips of the first curved portion and each of the tips of the second curved portion are adjacent in the second direction. The transformer chip according to claim 14.

18. The first dummy wiring is formed in an open loop shape surrounding the first surface coil and the second surface coil, and includes a first wiring portion electrically connected to the first outer pad. The second dummy wiring is formed in an open loop shape surrounding the third surface coil and the fourth surface coil, and includes a second wiring section electrically connected to the second outer pad. The transformer chip according to claim 1.

19. The first wiring section includes two first sub-wiring sections arranged to align along the first direction, The second wiring section includes two second sub-wiring sections arranged to align along the first direction, The lengths of each of the two preceding sub-wiring sections are equal to each other. The lengths of each of the two preceding sub-wiring sections are equal to each other. The transformer chip according to claim 18.

20. Die pad and, A transformer chip arranged on the die pad, A sealing resin that seals the die pad and the trans chip, Includes, The aforementioned transformer chip is An insulating layer including a front and back surface that face opposite each other in the thickness direction, A first isolation transformer comprising: a first surface coil and a second surface coil arranged within the insulating layer near the surface and spaced apart from each other in a first direction perpendicular to the thickness direction; and a first back surface coil and a second back surface coil arranged within the insulating layer near the back surface and spaced apart from each other in the first direction, and facing the first surface coil and the second surface coil; The insulating layer includes a third surface coil and a fourth surface coil arranged near the surface and spaced apart from each other in the first direction, and a third back surface coil and a fourth back surface coil arranged near the back surface and spaced apart from each other in the first direction and facing the third surface coil and the fourth surface coil, and a second insulating transformer arranged spaced apart from the first insulating transformer in the first direction, A first outer pad is positioned between the first surface coil and the second surface coil in the first direction when viewed from the thickness direction, and is electrically connected to both the first surface coil and the second surface coil. A second outer pad is positioned between the third surface coil and the fourth surface coil in the first direction when viewed from the thickness direction, and is electrically connected to both the third surface coil and the fourth surface coil. A first dummy wiring is provided on both sides of the first isolation transformer in a second direction perpendicular to the first direction when viewed from the thickness direction, and is electrically connected to the first outer pad, A second dummy wiring is provided on both sides of the second isolation transformer in the second direction, electrically connected to the second outer pad, and electrically insulated from the first dummy wiring, Includes, The first dummy wiring and the second dummy wiring are aligned along the first direction. A signal transmission device.