Semiconductor device and method for manufacturing semiconductor device

Abstract

Provided is a semiconductor device comprising an active portion and a temperature-sensitive portion. The temperature-sensitive portion includes: a temperature-sensitive trench part provided on a front surface side of the semiconductor substrate; a temperature-sensitive anode region provided inside a trench of the temperature-sensitive trench part; and a temperature-sensitive cathode region provided in contact with the temperature-sensitive anode region inside the trench of the temperature-sensitive trench part. Provided is a semiconductor device comprising: an active portion provided in a semiconductor substrate; a temperature-sensitive portion provided over the semiconductor substrate; and an interlayer insulating film provided over the active portion and the temperature-sensitive portion. The temperature-sensitive portion includes a recess region having a recess on a front surface side of the semiconductor substrate, and a temperature-sensitive diode portion provided over the semiconductor substrate in the recess region. The height position of the upper surface of the interlayer insulating film in the active portion in the depth direction of the semiconductor substrate is the same as the height position of the upper surface of the interlayer insulating film in the recess region.

Description

Semiconductor device and method for manufacturing the same

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] Patent Document 1 describes a "semiconductor device having an integrated PN diode temperature sensor and a manufacturing method thereof." [Prior art documents] [Patent documents] [Patent document 1] U.S. Patent Application Publication No. 2019 / 0172770 [Patent document 2] JP 2014-053554 A [Patent document 3] JP 2012-195339 A [Patent document 4] JP 2021-015884 A [Patent document 5] JP 2010-287786 A General disclosure

[0003] In a first aspect of the present invention, there is provided a semiconductor device comprising an active portion and a temperature-sensing portion, wherein the temperature-sensing portion comprises a temperature-sensing diode portion, the temperature-sensing diode portion having a temperature-sensing trench portion provided on the front surface side of a semiconductor substrate, a temperature-sensing trench conductive portion provided inside the temperature-sensing trench portion, a temperature-sensing anode region of a first conductivity type provided in the temperature-sensing trench conductive portion, and a temperature-sensing cathode region of a second conductivity type provided in the temperature-sensing trench conductive portion and in contact with the temperature-sensing anode region to form a PN junction.

[0004] In the semiconductor device, the temperature-sensitive trench conductive portion may fill the inside of the temperature-sensitive trench portion.

[0005] In any of the above semiconductor devices, a sidewall of the temperature-sensitive anode region may be in contact with a sidewall of the temperature-sensitive cathode region.

[0006] In any of the above semiconductor devices, a lower surface of one of the temperature-sensitive anode region and the temperature-sensitive cathode region may be in contact with an upper surface of the other of the temperature-sensitive anode region and the temperature-sensitive cathode region.

[0007] In any of the above semiconductor devices, the temperature-sensitive anode region may include a plurality of temperature-sensitive anode regions provided inside the trench of the temperature-sensitive trench portion. The temperature-sensitive cathode region may include a plurality of temperature-sensitive cathode regions provided inside the trench of the temperature-sensitive trench portion. The plurality of temperature-sensitive anode regions and the plurality of temperature-sensitive cathode regions may be alternately arranged inside the trench of the temperature-sensitive trench portion in a direction parallel to the front surface of the semiconductor substrate.

[0008] In any of the above semiconductor devices, the temperature-sensitive trench portion may have a trench insulating portion provided on an inner wall of the temperature-sensitive trench conductive portion inside the trench of the temperature-sensitive trench portion.

[0009] Any of the above semiconductor devices may include an interlayer insulating film provided above the active portion and the temperature-sensitive diode portion, a temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, and a temperature-sensitive contact portion provided in the interlayer insulating film and electrically connecting the temperature-sensitive wiring portion to the temperature-sensitive trench portion. The temperature-sensitive wiring portion may include an anode wiring portion electrically connected to the temperature-sensitive anode region, and a cathode wiring portion electrically connected to the temperature-sensitive cathode region. The temperature-sensitive contact portion may include an anode contact portion provided in the interlayer insulating film and electrically connecting the anode wiring portion to the temperature-sensitive anode region, and a cathode contact portion provided in the interlayer insulating film and electrically connecting the cathode wiring portion to the temperature-sensitive cathode region.

[0010] In any of the above semiconductor devices, the temperature-sensitive trench portion may include a plurality of temperature-sensitive trench portions. The anode contact portion may include a plurality of anode contact portions provided corresponding to the plurality of temperature-sensitive trench portions, respectively. The cathode contact portion may include a plurality of cathode contact portions provided corresponding to the plurality of temperature-sensitive trench portions, respectively. The anode wiring portion may be provided extending above the plurality of temperature-sensitive trench portions and electrically connected to the plurality of anode contact portions. The cathode wiring portion may be provided extending above the plurality of temperature-sensitive trench portions and electrically connected to the plurality of cathode contact portions.

[0011] In any of the above semiconductor devices, the temperature-sensitive trench portion may have a linear structure connected to the anode contact portion and the cathode contact portion.

[0012] In any of the above semiconductor devices, the temperature-sensitive trench may have a loop structure in which one end of the temperature-sensitive trench is connected to the other end.

[0013] Any of the above semiconductor devices may further include a well region of a second conductivity type provided in the semiconductor substrate, wherein the temperature-sensitive trench portion is provided inside the well region in a top view, and at least one of a sidewall and a bottom of the temperature-sensitive trench portion may be in contact with the well region.

[0014] Any of the above semiconductor devices may include a transition portion provided between the temperature-sensitive trench portion and the active portion.

[0015] In any of the above semiconductor devices, the transition portion may include a dummy trench portion provided on the front surface side of the semiconductor substrate.

[0016] In any of the above semiconductor devices, the transition portion may include a well region of a second conductivity type provided in the semiconductor substrate.

[0017] In any of the semiconductor devices described above, the active portion may have an active trench portion provided on the front surface of the semiconductor substrate, and the depth of the temperature-sensitive trench portion may be the same as the depth of the active trench portion.

[0018] In a second aspect of the present invention, there is provided a semiconductor device comprising an active portion provided on a semiconductor substrate, a temperature-sensing portion provided above the semiconductor substrate, and an interlayer insulating film provided above the active portion and the temperature-sensing portion, wherein the temperature-sensing portion has a recessed region having a depression on the front surface side of the semiconductor substrate, and a temperature-sensing diode portion provided above the semiconductor substrate in the recessed region, and in the depth direction of the semiconductor substrate, the height position of the upper surface of the interlayer insulating film in the active portion is the same as the height position of the upper surface of the interlayer insulating film in the recessed region.

[0019] The semiconductor device may include a temperature-sensitive wiring section electrically connected to the temperature-sensitive diode section, and a temperature-sensitive contact section provided in the interlayer insulating film and electrically connecting the temperature-sensitive wiring section and the temperature-sensitive diode section.

[0020] In any of the above semiconductor devices, the active portion may have an active trench portion provided on the front surface of the semiconductor substrate and an active contact portion provided above the semiconductor substrate, and a contact width of the temperature-sensitive contact portion may be larger than a contact width of the active contact portion.

[0021] In any of the above semiconductor devices, the temperature sensing portion may have an insulating film on the upper surface of the semiconductor substrate in the recess region.

[0022] In any of the semiconductor devices described above, the temperature sensing portion may have a temperature sensing contact portion electrically connected to the temperature sensing diode portion, and a distance from a lower end of the temperature sensing contact portion to an upper surface of the insulating film in a depth direction of the semiconductor substrate may be greater than a thickness of the insulating film.

[0023] In any of the semiconductor devices described above, the temperature-sensing portion may have a temperature-sensing contact portion electrically connected to the temperature-sensing diode portion, and the distance from the front surface of the semiconductor substrate to a lower end of the temperature-sensing contact portion in a depth direction of the semiconductor substrate may be greater than the distance from the lower end of the temperature-sensing contact portion to an upper surface of the insulating film.

[0024] In any of the semiconductor devices described above, the temperature-sensing portion may have a temperature-sensing contact portion electrically connected to the temperature-sensing diode portion, and the distance from the front surface of the semiconductor substrate to a lower end of the temperature-sensing contact portion in a depth direction of the semiconductor substrate may be smaller than the distance from the lower end of the temperature-sensing contact portion to an upper surface of the insulating film.

[0025] In a third aspect of the present invention, there is provided a method for manufacturing a semiconductor device, which includes a step of forming an active portion and a temperature-sensitive portion, wherein the step of forming the temperature-sensitive portion includes a step of forming a temperature-sensitive trench portion on the front surface side of a semiconductor substrate, a step of forming a temperature-sensitive trench conductive portion inside the temperature-sensitive trench portion, a step of forming a temperature-sensitive anode region in the temperature-sensitive trench conductive portion, and a step of forming a temperature-sensitive cathode region in the temperature-sensitive trench conductive portion that is in contact with the temperature-sensitive anode region.

[0026] In the method for manufacturing a semiconductor device, the step of forming the active portion may include the step of forming a trench of an active trench portion on the front surface side of the semiconductor substrate, and the trench of the temperature-sensitive trench portion and the trench of the active trench portion may be formed simultaneously by the same etching process.

[0027] In a fourth aspect of the present invention, there is provided a semiconductor device comprising an active portion and a non-active portion, the semiconductor device comprising an interlayer insulating film provided above the active portion and the non-active portion, the non-active portion having a recessed region having a depression on the front surface side of a semiconductor substrate, and a polycrystalline portion provided above the semiconductor substrate in the recessed region, and in the depth direction of the semiconductor substrate, the height position of the upper surface of the interlayer insulating film in the active portion is the same as the height position of the upper surface of the interlayer insulating film in the recessed region.

[0028] In the semiconductor device, the inactive portion may include a first inactive contact portion provided in the interlayer insulating film above the recess region and electrically connected to the polycrystalline portion.

[0029] In any of the semiconductor devices described above, the non-active portion may have an insulating film on the upper surface of the semiconductor substrate in the recess region, and a distance from a lower end of the first non-active contact portion to an upper surface of the non-active portion insulating film in a depth direction of the semiconductor substrate may be greater than a thickness of the insulating film.

[0030] In any of the semiconductor devices described above, the non-active portion may have an insulating film on the upper surface of the semiconductor substrate in the recess region, and a distance from the front surface of the semiconductor substrate to a lower end of the first non-active contact portion in a depth direction of the semiconductor substrate may be greater than a distance from the lower end of the first non-active contact portion to an upper surface of the insulating film.

[0031] In any of the above semiconductor devices, the non-active portion may have an insulating film on the upper surface of the semiconductor substrate in the recess region, and a distance from the front surface of the semiconductor substrate to a lower end of the first non-active contact portion in a depth direction of the semiconductor substrate may be smaller than a distance from the lower end of the first non-active contact portion to an upper surface of the insulating film.

[0032] Any of the above semiconductor devices may include a gate trench portion provided on a front surface of the semiconductor substrate and having a gate conductive portion, and a gate metal layer provided above the semiconductor substrate. The first inactive contact portion may electrically connect the gate metal layer and the polycrystalline portion. The polycrystalline portion may be connected to the gate conductive portion.

[0033] In any of the above semiconductor devices, the polycrystalline portion may extend to the outside of the recess region, and the gate trench portion may be provided outside the recess region.

[0034] Any of the above semiconductor devices may include a dummy trench portion provided on a front surface of the semiconductor substrate and having a dummy conductive portion, and an emitter electrode provided above the semiconductor substrate. The first inactive contact portion may electrically connect the emitter electrode and the polycrystalline portion. The polycrystalline portion may be connected to the dummy conductive portion.

[0035] In any of the above semiconductor devices, the polycrystalline portion may extend to the outside of the recess region, and the dummy trench portion may be provided outside the recess region.

[0036] Any of the above semiconductor devices may include a guard ring of a second conductivity type provided on the front surface of the semiconductor substrate between the active portion and an edge of the semiconductor substrate, and an edge metal layer provided above the semiconductor substrate. The inactive portion may have a second inactive contact portion provided in the interlayer insulating film outside the recess region and electrically connecting the edge metal layer and the guard ring. The first inactive contact portion may electrically connect the edge metal layer and the polycrystalline portion.

[0037] In any of the above semiconductor devices, the distance in the depth direction of the semiconductor substrate from the position where the first inactive contact portion and the edge metal layer contact to the lower end of the first inactive contact portion may be equal to the distance from the position where the second inactive contact portion and the edge metal layer contact to the lower end of the second inactive contact portion.

[0038] In any of the above semiconductor devices, the first inactive contact portion may be provided above a corner region of the guard ring.

[0039] Any of the above semiconductor devices may further include a pad electrode provided above the semiconductor substrate, and the first inactive contact portion may electrically connect the pad electrode to the polycrystalline portion.

[0040] The above summary of the invention does not list all of the features of the present invention, and subcombinations of these features may also be inventions.

[0041] 1A shows an example of an enlarged view of the top surface of the semiconductor device 100. An example of an aa' cross section in FIG. 1A is shown. An enlarged view of the top surface of a modified example of the semiconductor device 100 is shown. An example of a bb' cross section in FIG. 2A is shown. An example of a top view of the semiconductor device 100 is shown. An example of a cross section of the semiconductor device 100 including a temperature sensitive section 180 is shown. A cross section of a modified example of the semiconductor device 100 including a temperature sensitive section 180 is shown. A cross section of a modified example of the semiconductor device 100 including a temperature sensitive section 180 is shown. A cross section of a modified example of the semiconductor device 100 including a temperature sensitive section 180 is shown. An example of a cross section of a temperature sensitive trench section 185 is shown. A cross section of a modified example of the temperature sensitive trench section 185 is shown. A cross section of a modified example of the temperature sensitive trench section 185 is shown. A cross section of a modified example of the temperature sensitive trench section 185 is shown. An example of an enlarged view of the top surface of the temperature sensitive diode section 183 in the temperature sensitive section 180 in region T in FIG. 3 is shown. An enlarged view of the top surface showing another example of the temperature sensitive diode section 183 in the temperature sensitive section 180. 6A, 6B, 6C, 6D, and 6E show equivalent circuits of the temperature sensing diode section 183 shown in FIGS. 6A, 6B, 6C, 6D, and 6E. FIG. 6A shows an enlarged top view of another example of the temperature sensing diode section 183 in the temperature sensing section 180. FIG. 6B shows an enlarged top view of another example of the temperature sensing diode section 183 in the temperature sensing section 180. FIG. 6C shows an enlarged top view of another example of the temperature sensing diode section 183 in the temperature sensing section 180. FIG. 6D shows an enlarged top view of another example of the temperature sensing diode section 183 in the temperature sensing section 180. FIG. 6E shows an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIGS. 6I, 6J, and 6K. 6B is an enlarged view of the top surface showing another example of the temperature sensing diode section 183 in the temperature sensing section 180. FIG. 6C is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6L. FIG. 6D is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6L. FIG. 6E is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6N. FIG. 6F is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6P. FIG. 6F is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6P. FIG. 6F is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6L. FIG. 6F is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6L. FIG. 6F is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6N. FIG. 6F is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6P. FIG. 6F is an equivalent circuit diagram of the temperature sensing diode section 183 shown in FIG. 6P.10A shows a cross section of a modified example of the semiconductor device 100 including a temperature sensing section 180. 10B shows a cross section of a modified example of the semiconductor device 100 including a temperature sensing section 180. 10C shows a cross section of a modified example of the semiconductor device 100 including a temperature sensing section 180. 10D shows a flow chart illustrating an example of a manufacturing process for the semiconductor device 100. 10E shows an example of electrical connections between the various parts of the semiconductor device 100. 10F shows an example of an enlarged view of the top surface of the semiconductor device 100. 10A shows an example of a c-c' cross section. 10B shows an example of a d-d' cross section. 10B shows an example of a d-d' cross section. 10B shows an example of an ee' cross section. 10B shows an example of an ee' cross section. 10B shows an example of a top view of the semiconductor device 100. 13A shows an example of region R. 13B shows an example of an ff' cross section. 13B shows an example of an ff' cross section. 13B shows an example of an gg' cross section. 13A shows an example of a gg' cross section.

[0042] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention as claimed. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0043] In this specification, one side in a direction parallel to the depth direction of a semiconductor substrate is referred to as "upper" and the other side as "lower." Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the directions when the semiconductor device is mounted.

[0044] In this specification, technical matters may be explained using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes merely identify the relative positions of components and do not limit a specific direction. For example, the Z-axis does not limit the height direction relative to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When the Z-axis direction is described without specifying positive or negative, it means a direction parallel to the +Z-axis and -Z-axis.

[0045] In this specification, orthogonal axes parallel to the upper and lower surfaces of the semiconductor substrate are referred to as the X-axis and Y-axis. Furthermore, an axis perpendicular to the upper and lower surfaces of the semiconductor substrate is referred to as the Z-axis. In this specification, the direction of the Z-axis may be referred to as the depth direction. Furthermore, in this specification, the direction parallel to the upper and lower surfaces of the semiconductor substrate, including the X-axis and Y-axis, may be referred to as the horizontal direction.

[0046] In this specification, when we say "same" or "equal," it may also include cases where there is an error due to manufacturing variations, etc. The error is, for example, within 10%.

[0047] In this specification, the conductivity type of a doped region doped with an impurity is described as P-type or N-type. In this specification, the impurity may particularly mean either an N-type donor or a P-type acceptor, and may be referred to as a dopant. In this specification, doping means introducing a donor or an acceptor into a semiconductor substrate to form a semiconductor exhibiting an N-type conductivity or a P-type conductivity.

[0048] In this specification, the doping concentration refers to the concentration of donors or acceptors in a thermal equilibrium state. In this specification, the net doping concentration refers to the net concentration obtained by adding together the donor concentration as the concentration of positive ions and the acceptor concentration as the concentration of negative ions, including the polarity of the charge. As an example, if the donor concentration is ND and the acceptor concentration is NA, the net doping concentration at any position is ND-NA. In this specification, the net doping concentration may be simply referred to as the doping concentration.

[0049] Donors have the function of supplying electrons to semiconductors. Acceptors have the function of receiving electrons from semiconductors. Donors and acceptors are not limited to impurities themselves. For example, VOH defects in semiconductors, where vacancies (V), oxygen (O), and hydrogen (H) are bonded, Si-i-H defects in which interstitial silicon (Si-i) and hydrogen are bonded, and CiOi-H defects in which interstitial carbon (Ci) and interstitial oxygen (Oi) and hydrogen are bonded, function as donors that supply electrons. In this specification, these VOH defects may be referred to as hydrogen donors.

[0050] In this specification, the terms P+ type and N+ type refer to a doping concentration higher than that of P type or N type, and the terms P- type and N- type refer to a doping concentration lower than that of P type or N type. In addition, in this specification, the terms P++ type and N++ type refer to a doping concentration higher than that of P+ type or N+ type.

[0051] In this specification, chemical concentration refers to the concentration atomic density of impurities measured regardless of the state of electrical activation. Chemical concentration can be measured, for example, by secondary ion mass spectrometry (SIMS). The above-mentioned net doping concentration can be measured by voltage-capacitance measurement (CV). The carrier concentration measured by spreading resistance measurement (SR) may also be referred to as the net doping concentration. Carriers refer to charge carriers of electrons or holes. The carrier concentration measured by CV or SR may be a value in a thermal equilibrium state. Furthermore, in an N-type region, the donor concentration is sufficiently greater than the acceptor concentration, so the carrier concentration in that region may also be referred to as the donor concentration. Similarly, in a P-type region, the carrier concentration in that region may also be referred to as the acceptor concentration. In this specification, the doping concentration in an N-type region may also be referred to as the donor concentration, and the doping concentration in a P-type region may also be referred to as the acceptor concentration.

[0052] In addition, when the concentration distribution of the donor, acceptor, or net doping has a peak, the peak value may be taken as the donor, acceptor, or net doping concentration in the region. In cases where the donor, acceptor, or net doping concentration is approximately uniform, the average value of the donor, acceptor, or net doping concentration in the region may be taken as the donor, acceptor, or net doping concentration.

[0053] The carrier concentration measured by the SR method may be lower than the donor or acceptor concentration. In the range where current flows when measuring spreading resistance, the carrier mobility of the semiconductor substrate may be lower than the value in the crystalline state. A decrease in carrier mobility occurs when carriers are scattered due to a disorder in the crystalline structure caused by lattice defects or the like. The reason for the decrease in carrier concentration is as follows. In the SR method, spreading resistance is measured and the carrier concentration is calculated from the measured spreading resistance. At this time, the carrier mobility is calculated using the carrier mobility in the crystalline state. On the other hand, at locations where lattice defects are introduced, the carrier mobility is decreased, but the carrier concentration is calculated using the carrier mobility in the crystalline state. Therefore, the value obtained is lower than the actual carrier concentration, i.e., the donor or acceptor concentration.

[0054] The donor or acceptor concentration calculated from the carrier concentration measured by the CV method or the SR method may be lower than the chemical concentration of the element representing the donor or acceptor. As an example, the donor concentration of phosphorus or arsenic, which acts as a donor in a silicon semiconductor, or the acceptor concentration of boron, which acts as an acceptor, is about 99% of the chemical concentration. On the other hand, the donor concentration of hydrogen, which acts as a donor in a silicon semiconductor, is about 0.1% to 10% of the chemical concentration of hydrogen. In this specification, the SI unit system is adopted. In this specification, distance and length units may be expressed in cm (centimeter). In this case, various calculations may be performed by converting them to m (meter). Regarding numerical representations of powers of 10, for example, 1E+16 is expressed as 1×10 １６ , and the display of 1E-16 is 1×10 －１６ Shows.

[0055] 1A shows an example of an enlarged view of the top surface of a semiconductor device 100. The semiconductor device 100 of this example is a semiconductor chip including a transistor portion 70. The semiconductor device 100 is not limited to a transistor, as long as it is a semiconductor element having a MOS gate structure on a semiconductor substrate 10.

[0056] The transistor section 70 is a region obtained by projecting a collector region 22 provided on the back surface side of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The collector region 22 will be described later. The transistor section 70 includes a transistor such as an IGBT. In this example, the transistor section 70 is an IGBT. However, the transistor section 70 may be another transistor such as a MOSFET.

[0057] In this figure, the area around the active section 120 of the semiconductor device 100 is shown, and other areas are omitted. The active section 120 is the portion between the front surface 21 and the back surface 23 of the semiconductor substrate 10 through which the main current flows. The active section 120 will be described later. For example, an edge termination structure may be provided in the region on the negative side of the Y-axis direction of the semiconductor device 100 in this example. The edge termination structure relieves electric field concentration on the upper surface side of the semiconductor substrate 10. The edge termination structure may have, for example, a guard ring, a field plate, a resurf, or a structure combining these. Note that, for convenience, in this example, the edge on the negative side of the Y-axis direction will be described, but the same applies to other edges of the semiconductor device 100.

[0058] The semiconductor substrate 10 is a substrate formed of a semiconductor material. The semiconductor substrate 10 may be a silicon substrate, a silicon carbide substrate, another compound semiconductor substrate, or a diamond semiconductor substrate. The semiconductor substrate 10 in this example is a silicon substrate. Note that, in this specification, the term "top view" simply refers to a view from the top surface side of the semiconductor substrate 10. The semiconductor substrate 10 has a front surface 21 and a back surface 23, as described below.

[0059] The semiconductor device 100 of this example includes a gate trench portion 40, a dummy trench portion 30, an emitter region 12, a base region 14, a contact region 15, and a well region 17 on the front surface 21 of the semiconductor substrate 10. The semiconductor device 100 of this example also includes an emitter electrode 52 and a gate metal layer 50 provided above the front surface 21 of the semiconductor substrate 10. The emitter electrode 52 and the gate metal layer 50 are examples of a front surface side metal layer. The gate trench portion 40 is an example of a MOS gate structure included in the semiconductor device 100. Note that although the semiconductor device 100 of this example is a transistor with a MOS gate structure, it may also be a diode with a MOS gate structure.

[0060] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the emitter region 12, the base region 14, the contact region 15, and the well region 17. The gate metal layer 50 is provided above the connection portion 25 and the well region 17.

[0061] The emitter electrode 52 and the gate metal layer 50 are formed of a material containing metal. At least a portion of the emitter electrode 52 may be formed of a metal such as aluminum (Al), or a metal alloy such as aluminum-silicon alloy (AlSi) or aluminum-silicon-copper alloy (AlSiCu). At least a portion of the gate metal layer 50 may be formed of a metal such as aluminum (Al), or a metal alloy such as aluminum-silicon alloy (AlSi) or aluminum-silicon-copper alloy (AlSiCu). The emitter electrode 52 and the gate metal layer 50 may have a barrier metal film made of titanium or a titanium compound below the region made of aluminum or the like. The emitter electrode 52 and the gate metal layer 50 are provided separately from each other.

[0062] The emitter electrode 52 and the gate metal layer 50 are provided above the semiconductor substrate 10 with an interlayer insulating film 38 sandwiched therebetween. The interlayer insulating film 38 is omitted in Fig. 1A. A contact hole 54, a contact hole 55, and a contact hole 56 are provided to penetrate the interlayer insulating film 38.

[0063] The contact hole 55 electrically connects the gate metal layer 50 and the gate conductive portion in the transistor portion 70 via the connection portion 25. Inside the contact hole 55, a barrier metal film made of titanium or a titanium compound or the like and / or a plug portion made of tungsten or the like may be formed.

[0064] The contact hole 56 connects the emitter electrode 52 and the dummy conductive portion in the dummy trench portion 30. Inside the contact hole 56, a barrier metal film made of titanium or a titanium compound or the like and / or a plug portion made of tungsten or the like may be formed.

[0065] The connection portion 25 is connected to a front surface side metal layer such as the emitter electrode 52 or the gate metal layer 50. In one example, the connection portion 25 is provided between the gate metal layer 50 and the gate conductive portion. In this example, the connection portion 25 is provided extending in the X-axis direction and electrically connected to the gate conductive portion. The connection portion 25 may also be provided between the emitter electrode 52 and the dummy conductive portion. In this example, the connection portion 25 is not provided between the emitter electrode 52 and the dummy conductive portion. The connection portion 25 is made of a conductive material such as polysilicon doped with impurities. In this example, the connection portion 25 is polysilicon (N+) doped with N-type impurities. The connection portion 25 is provided above the front surface 21 of the semiconductor substrate 10 via an insulating film such as an oxide film.

[0066] The gate trench portion 40 is an example of an active trench portion 122 provided in the front surface 21 of the semiconductor substrate 10. That is, the active trench portion 122 may be a trench portion provided in the active portion 120. The active trench portion 122 will be described later. The gate trench portions 40 are arranged at predetermined intervals along a predetermined arrangement direction (in this example, the X-axis direction). The gate trench portion 40 in this example may have two extension portions 41 extending along an extension direction (in this example, the Y-axis direction) that is parallel to the front surface 21 of the semiconductor substrate 10 and perpendicular to the arrangement direction, and a connection portion 43 that connects the two extension portions 41.

[0067] It is preferable that at least a portion of the connection portion 43 is formed in a curved shape. By connecting the ends of the two extension portions 41 of the gate trench portion 40, it is possible to alleviate electric field concentration at the ends of the extension portions 41. At the connection portion 43 of the gate trench portion 40, the gate metal layer 50 may be electrically connected to the gate conductive portion via the connection portion 25.

[0068] The dummy trench portion 30 is an example of an active trench portion 122 provided on the front surface 21 of the semiconductor substrate 10. That is, the active trench portion 122 may be a trench portion provided in the active portion 120. The dummy trench portion 30 is a trench portion electrically connected to the emitter electrode 52. Like the gate trench portion 40, the dummy trench portions 30 are arranged at predetermined intervals along a predetermined arrangement direction (the X-axis direction in this example). The dummy trench portion 30 in this example has an I-shape on the front surface 21 of the semiconductor substrate 10, but may also have a U-shape on the front surface 21 of the semiconductor substrate 10, like the gate trench portion 40. That is, the dummy trench portion 30 may have two extension portions extending along the extension direction and a connection portion connecting the two extension portions.

[0069] The transistor section 70 of this example has a structure in which two gate trench sections 40 and two dummy trench sections 30 are repeatedly arranged. That is, the transistor section 70 of this example has gate trench sections 40 and dummy trench sections 30 in a 1:1 ratio. For example, the transistor section 70 has one dummy trench section 30 between two extension sections 41.

[0070] However, the ratio of the gate trench portions 40 to the dummy trench portions 30 is not limited to this example. The ratio of the gate trench portions 40 may be greater than the ratio of the dummy trench portions 30, or the ratio of the dummy trench portions 30 may be greater than the ratio of the gate trench portions 40. The ratio of the gate trench portions 40 to the dummy trench portions 30 may be 2:3 or 2:4. Furthermore, the transistor portion 70 may have all trench portions as gate trench portions 40 and may not have dummy trench portions 30.

[0071] The well region 17 is a second conductivity type region provided closer to the front surface 21 of the semiconductor substrate 10 than the drift region 18 described below. The well region 17 is an example of a well region provided on the peripheral side of the active portion 120. The well region 17 is, for example, P+ type. The well region 17 is formed within a predetermined range from the end of the active region on the side where the gate metal layer 50 is provided. The diffusion depth of the well region 17 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. Part of the regions of the gate trench portion 40 and the dummy trench portion 30 on the gate metal layer 50 side are formed in the well region 17. The bottoms of the ends of the gate trench portion 40 and the dummy trench portion 30 in the extension direction may be covered by the well region 17.

[0072] The contact holes 54 are formed above the emitter region 12 and the contact region 15 in the transistor section 70. The contact holes 54 are not provided above the well regions 17 provided at both ends in the Y-axis direction. In this manner, one or more contact holes 54 are formed in the interlayer insulating film. The one or more contact holes 54 may be provided extending in the extension direction.

[0073] The mesa portion 71 is a mesa portion provided adjacent to a trench portion in a plane parallel to the front surface 21 of the semiconductor substrate 10. The mesa portion is a portion of the semiconductor substrate 10 sandwiched between two adjacent trench portions, and may be a portion extending from the front surface 21 of the semiconductor substrate 10 to the deepest bottom of each trench portion. The extension portion of each trench portion may be considered as one trench portion. In other words, the region sandwiched between the two extension portions may be considered as a mesa portion.

[0074] The mesa portion 71 is provided in the transistor portion 70 adjacent to at least one of the dummy trench portion 30 or the gate trench portion 40. The mesa portion 71 has a well region 17, an emitter region 12, a base region 14, and a contact region 15 on the front surface 21 of the semiconductor substrate 10. In the mesa portion 71, the emitter regions 12 and the contact regions 15 are provided alternately in the extension direction.

[0075] The base region 14 is a region of a second conductivity type provided on the front surface 21 side of the semiconductor substrate 10. The base region 14 is, for example, a P-type. The base region 14 may be provided on the front surface 21 of the semiconductor substrate 10 at both ends of the mesa portion 71 in the Y-axis direction. Note that FIG. 1A shows only one end of the base region 14 in the Y-axis direction.

[0076] The emitter region 12 is a region of the first conductivity type having a higher doping concentration than the drift region 18. In this example, the emitter region 12 is, for example, N+ type. An example of a dopant for the emitter region 12 is arsenic (As). The emitter region 12 is provided on the front surface 21 of the mesa portion 71, in contact with the gate trench portion 40. The emitter region 12 may be provided extending in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The emitter region 12 is also provided below the contact hole 54.

[0077] The emitter region 12 may or may not be in contact with the dummy trench portion 30. In this example, the emitter region 12 is in contact with the dummy trench portion 30.

[0078] The contact region 15 is provided above the base region 14 and is a second conductivity type region having a higher doping concentration than the base region 14. In this example, the contact region 15 is, for example, P+ type. In this example, the contact region 15 is provided on the front surface 21 of the mesa portion 71. The contact region 15 may be provided in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The contact region 15 may or may not contact the gate trench portion 40 or the dummy trench portion 30. In this example, the contact region 15 contacts the dummy trench portion 30 and the gate trench portion 40. The contact region 15 is also provided below the contact hole 54. Note that in FIG. 1A , the gate trench portion 40, the dummy trench portion 30, the emitter region 12, the contact region 15, and other components may be formed periodically or continuously in the +X-axis direction and the −X-axis direction (not shown).

[0079] 1B shows an example of the aa' cross section in FIG. 1A. The aa' cross section is an XZ plane passing through the emitter region 12 in the transistor section 70. In the aa' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, a collector electrode 24, and an active contact section 124. The collector electrode 24 is an example of a back-side metal layer provided in contact with the back surface 23 of the semiconductor substrate 10. The emitter electrode 52 is formed above the semiconductor substrate 10 and the interlayer insulating film 38.

[0080] The drift region 18 is a region of a first conductivity type provided in the semiconductor substrate 10. In this example, the drift region 18 is, for example, an N-type. The drift region 18 may be a region remaining in the semiconductor substrate 10 without other doped regions being formed therein. That is, the doping concentration of the drift region 18 may be the same as the doping concentration of the semiconductor substrate 10.

[0081] The buffer region 20 is a region of a first conductivity type provided closer to the back surface 23 of the semiconductor substrate 10 than the drift region 18. In this example, the buffer region 20 is, for example, N-type. The doping concentration of the buffer region 20 is higher than the doping concentration of the drift region 18. The buffer region 20 may function as a field stop layer that prevents a depletion layer spreading from the lower surface side of the base region 14 from reaching the collector region 22 of the second conductivity type. Note that the buffer region 20 may be omitted.

[0082] The collector region 22 is provided below the buffer region 20 in the transistor section 70. The collector region 22 has the second conductivity type. In this example, the collector region 22 is, for example, a P+ type.

[0083] The collector electrode 24 is formed on the rear surface 23 of the semiconductor substrate 10. The collector electrode 24 is made of a conductive material such as a metal. The material of the collector electrode 24 may be the same as or different from the material of the emitter electrode 52.

[0084] The base region 14 is a region of the second conductivity type provided above the drift region 18. The base region 14 is provided in contact with the gate trench portion 40. The base region 14 may be provided in contact with the dummy trench portion 30.

[0085] The emitter region 12 is provided above the base region 14. The emitter region 12 is provided between the base region 14 and the front surface 21. The emitter region 12 is provided in contact with the gate trench portion 40. The emitter region 12 may or may not be in contact with the dummy trench portion 30.

[0086] The accumulation region 16 is a region of a first conductivity type that is provided closer to the front surface 21 of the semiconductor substrate 10 than the drift region 18. The accumulation region 16 in this example is, for example, an N+ type. However, the accumulation region 16 does not necessarily have to be provided.

[0087] The accumulation region 16 is provided in contact with the gate trench portion 40. The accumulation region 16 may or may not be in contact with the dummy trench portion 30. The doping concentration of the accumulation region 16 is higher than the doping concentration of the drift region 18. The dose of ion implantation into the accumulation region 16 is 1.0E+12 cm －２ Above, 1.0E+13cm －２ The ion implantation dose of the accumulation region 16 may be 3.0E+12 cm －２ Above, 6.0E + 12cm －２ By providing the accumulation region 16, the carrier injection enhancement effect (IE effect) can be enhanced, and the on-voltage of the transistor section 70 can be reduced.

[0088] One or more gate trench portions 40 and one or more dummy trench portions 30 are provided on the front surface 21. Each trench portion may be an active trench portion 122 included in the active portion 120. Each trench portion is provided from the front surface 21 to the drift region 18. In regions where at least one of the emitter region 12, the base region 14, the contact region 15, and the accumulation region 16 is provided, each trench portion also penetrates these regions to reach the drift region 18. The trench portion penetrating the doped region does not necessarily mean that the trench portion is formed in the order of forming the doped region and then the trench portion. The trench portion penetrating the doped region also includes a trench portion formed after the trench portion is formed.

[0089] The gate trench portion 40 has a gate trench formed on the front surface 21, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is formed to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is formed inside the gate trench, further inward than the gate insulating film 42. The gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is made of a conductive material such as polysilicon. The gate trench portion 40 is covered on the front surface 21 with an interlayer insulating film 38.

[0090] The gate conductive portion 44 includes a region facing the adjacent base region 14 on the mesa portion 71 side across the gate insulating film 42 in the depth direction of the semiconductor substrate 10. When a predetermined voltage is applied to the gate conductive portion 44, a channel is formed by an electron inversion layer in the surface layer of the interface of the base region 14 that contacts the gate trench.

[0091] The dummy trench portion 30 may have the same structure as the gate trench portion 40. The dummy trench portion 30 has a dummy trench, a dummy insulating film 32, and a dummy conductive portion 34 formed on the front surface 21 side. The dummy insulating film 32 is formed to cover the inner wall of the dummy trench. The dummy conductive portion 34 is formed inside the dummy trench and further inward than the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy trench portion 30 may be covered on the front surface 21 with an interlayer insulating film 38.

[0092] The interlayer insulating film 38 is provided above the semiconductor substrate 10. In this example, the interlayer insulating film 38 is provided in contact with the front surface 21. An emitter electrode 52 is provided above the interlayer insulating film 38. One or more contact holes 54 are provided in the interlayer insulating film 38 to electrically connect the emitter electrode 52 to the semiconductor substrate 10. Similarly, contact holes 55 and 56 may be provided penetrating the interlayer insulating film 38. The interlayer insulating film 38 may be a borophosphosilicate glass (BPSG) film, a borosilicate glass (BSG) film, a phosphosilicate glass (PSG) film, an HTO film, or a laminate of these materials. The thickness of the interlayer insulating film 38 is, for example, 1.0 μm, but is not limited to this.

[0093] The active contact portion 124 is provided above the semiconductor substrate 10. The active contact portion 124 may have a contact hole 54 and a metal layer filled inside the contact hole 54. The contact hole 54 may be filled with the same material as the emitter electrode 52, or a material different from that of the emitter electrode 52. The active contact portion 124 may include a barrier metal film 1242 provided in the contact hole 54 and in contact with the semiconductor substrate 10. The active contact portion 124 may include a plug portion 1244 provided in contact with the barrier metal film 1242 and filling the contact hole 54. The barrier metal film 1242 of the active contact portion 124 may contain titanium or a titanium compound, etc. The plug portion 1244 of the active contact portion 124 may contain a plug metal such as tungsten. The contact holes 55 and 56, and the metal layer filled inside the contact holes 55 and 56 may also be the active contact portion 124. That is, the active contact portion 124 may be provided above the active portion 120 and may electrically connect the front surface side metal layer to the semiconductor substrate 10 and / or the active trench portion 122. An alloy layer may be formed in contact with the barrier metal film 1242, and the alloy layer may be made of a metal contained in the barrier metal film 1242 and a layer of the semiconductor substrate 10 or the like below the contact hole 54. A region with a high impurity concentration may be formed in the layer of the semiconductor substrate 10 or the like below the contact hole 54 at a location that contacts the alloy layer.

[0094] The back side lifetime control region 151 may be provided in the transistor portion 70. However, the back side lifetime control region 151 may be omitted. The back side lifetime control region 151 is a region in which a lifetime killer is intentionally formed by, for example, injecting impurities into the semiconductor substrate 10. In one example, the back side lifetime control region 151 is formed by injecting helium into the semiconductor substrate 10. The back side lifetime control region 151 may also be formed by injecting protons. By providing the back side lifetime control region 151, it is possible to reduce the turn-off time and suppress the tail current, thereby reducing losses during switching.

[0095] The lifetime killer is a carrier recombination center. The lifetime killer may be a lattice defect. For example, the lifetime killer may be a vacancy, a divacancy, a complex defect of these with an element constituting the semiconductor substrate 10, or a dislocation. The lifetime killer may also be a rare gas element such as helium or neon, or a metal element such as platinum. Electron beams or protons may be used to form the lattice defects.

[0096] The lifetime killer concentration is the concentration of carrier recombination centers. The lifetime killer concentration may be the concentration of lattice defects. For example, the lifetime killer concentration may be the concentration of vacancies such as vacancies and divacancies, the concentration of complex defects formed between these vacancies and elements constituting the semiconductor substrate 10, or the concentration of dislocations. The lifetime killer concentration may also be the chemical concentration of a rare gas element such as helium or neon, or the chemical concentration of a metal element such as platinum.

[0097] The back surface-side lifetime control region 151 may be formed by implantation from the back surface 23 side. This makes it easier to avoid any influence on the front surface 21 side of the semiconductor device 100. For example, the back surface-side lifetime control region 151 is formed by irradiating helium or protons from the back surface 23 side. Here, whether the back surface-side lifetime control region 151 is formed by implantation from the front surface 21 side or the back surface 23 side can be determined by acquiring the state of the front surface 21 side by the SR method or by measuring leakage current.

[0098] 2A shows an enlarged view of the top surface of a modified example of the semiconductor device 100. The semiconductor device 100 of this example includes a transistor section 70 and a diode section 80.

[0099] The semiconductor device 100 of this example includes a gate trench portion 40, a dummy trench portion 30, an emitter region 12, a base region 14, a contact region 15, and a well region 17, which are provided inside the front surface 21 side of the semiconductor substrate 10. The gate trench portion 40 and the dummy trench portion 30 are each an example of an active trench portion 122.

[0100] The dummy trench portion 30 of this example may have a U-shape on the front surface 21 of the semiconductor substrate 10, similar to the gate trench portion 40. That is, the dummy trench portion 30 may have two extension portions 31 extending along the extension direction and a connection portion 33 connecting the two extension portions 31.

[0101] The semiconductor device 100 of this example includes an emitter electrode 52 and a gate metal layer 50 provided above the front surface 21 of the semiconductor substrate 10. The emitter electrode 52 and the gate metal layer 50 are provided separately from each other. The transistor section 70 of this example includes a boundary section 90 located at the boundary between the transistor section 70 and the diode section 80. However, the semiconductor device 100 does not necessarily have to include the boundary section 90.

[0102] The boundary portion 90 is a region provided in the transistor portion 70 and adjacent to the diode portion 80. The boundary portion 90 has a contact region 15 on the front surface 21 of the semiconductor substrate 10. The boundary portion 90 in this example does not have an emitter region 12. In one example, the trench portion in the boundary portion 90 is a dummy trench portion 30. The boundary portion 90 in this example is arranged so that both ends in the X-axis direction are dummy trench portions 30.

[0103] The contact holes 54 are provided above the base region 14 in the diode section 80. The contact holes 54 are provided above the contact regions 15 in the boundary section 90. None of the contact holes 54 are provided above the well regions 17 provided at both ends in the Y-axis direction.

[0104] The mesa portion 91 is provided in the boundary portion 90. The mesa portion 91 has a contact region 15 on the front surface 21 of the semiconductor substrate 10. The mesa portion 91 of this example has a base region 14 and a well region 17 on the negative side in the Y-axis direction.

[0105] The mesa portion 81 is provided in a region of the diode portion 80 that is sandwiched between adjacent dummy trench portions 30. The mesa portion 81 has a base region 14 on the front surface 21 of the semiconductor substrate 10. The mesa portion 81 of this example has a well region 17 on the negative side in the Y-axis direction.

[0106] The emitter region 12 is provided in the mesa portion 71, but may not be provided in the mesa portion 81 or the mesa portion 91. The contact region 15 is provided in the mesa portion 71 and the mesa portion 91, but may not be provided in the mesa portion 81.

[0107] 2B shows an example of the b-b' cross section in FIG. 2A. The semiconductor device 100 of this example includes a back surface-side lifetime control region 151 and a front surface-side lifetime control region 152. However, the semiconductor device 100 does not necessarily have to include either the back surface-side lifetime control region 151 or the front surface-side lifetime control region 152. The semiconductor device 100 of this example includes a collector region 22 and a cathode region 82 on the back surface 23 side of the buffer region 20.

[0108] The contact region 15 is provided above the base region 14 in the mesa portion 91. The contact region 15 is provided in contact with the dummy trench portion 30 in the mesa portion 91. In other cross sections, the contact region 15 may be provided on the front surface 21 of the mesa portion 71.

[0109] The accumulation region 16 is provided in the transistor section 70 and the diode section 80. In this example, the accumulation region 16 is provided on the entire surface of the transistor section 70 and the diode section 80. However, the accumulation region 16 does not have to be provided in the diode section 80.

[0110] The cathode region 82 is provided below the buffer region 20 in the diode section 80. The boundary between the collector region 22 and the cathode region 82 is the boundary between the transistor section 70 and the diode section 80. That is, the collector region 22 is provided below the boundary section 90 in this example.

[0111] The back side lifetime control region 151 may be provided in both the transistor portion 70 and the diode portion 80, or may be provided only in the transistor portion 70, or may be provided only in the diode portion 80. This enables the semiconductor device 100 of this example to speed up the turn-off operation of the transistor portion 70 or the reverse recovery operation in the diode portion 80, thereby further improving switching loss. The back side lifetime control region 151 may be formed by a method similar to that used for the back side lifetime control region 151 of the other embodiments.

[0112] The front surface side lifetime control region 152 is provided closer to the front surface 21 than the center of the semiconductor substrate 10 in the depth direction of the semiconductor substrate 10. In this example, the front surface side lifetime control region 152 is provided in the drift region 18. The front surface side lifetime control region 152 may be provided in both the transistor portion 70 and the diode portion 80, or may be provided only in the diode portion 80. The front surface side lifetime control region 152 is provided in the diode portion 80 and the boundary portion 90, and may not be provided in part of the transistor portion 70. The front surface side lifetime control region 152 can suppress hole injection from the transistor portion 70 and the diode portion 80, thereby reducing reverse recovery loss.

[0113] The front surface side lifetime control region 152 may be formed by any method among the methods for forming the back surface side lifetime control region 151. The elements, doses, etc. for forming the back surface side lifetime control region 151 and the front surface side lifetime control region 152 may be the same or different.

[0114] The front surface side lifetime control region 152 is provided extending from the diode section 80 to the transistor section 70. The front surface side lifetime control region 152 may be formed by introducing a lifetime killer from the front surface 21 of the semiconductor substrate 10. The front surface side lifetime control region 152 may also be formed by irradiation from the back surface 23 side of the semiconductor substrate 10. In this example, the front surface side lifetime control region 152 is provided below the gate trench section 40. When a particle beam or the like for forming the front surface side lifetime control region 152 passes through the MOS gate structure of the semiconductor device 100, defects may occur at the interface between the gate oxide film and the semiconductor substrate.

[0115] The semiconductor device 100 may be a power semiconductor device for controlling power, etc. The semiconductor device 100 of this example may have a vertical semiconductor structure including a backside metal layer on the backside 23 side of the semiconductor substrate 10. However, the semiconductor device 100 may also have a lateral semiconductor structure that does not include a metal layer on the backside 23 side.

[0116] In this example, an RC-IGBT with a trench gate structure is described as an example of the semiconductor device 100. However, the semiconductor device 100 may be a semiconductor device with a planar gate structure, or may be another semiconductor device such as a diode. The semiconductor device 100 may include an N-channel MOSFET or a P-channel MOSFET.

[0117] 3 shows an example of a top view of the semiconductor device 100. The semiconductor device 100 of this example includes a temperature-sensing unit 180. In this example, only some of the components of the semiconductor device 100 are shown, and some other components are omitted.

[0118] The semiconductor substrate 10 has edges 102 in a top view. The semiconductor substrate 10 of this example has two pairs of edges 102 that face each other in a top view. In this example, the X-axis and the Y-axis are parallel to either of the edges 102.

[0119] An active portion 120 is provided on the semiconductor substrate 10. The active portion 120 is a region through which a main current flows in the depth direction between the front surface 21 and the back surface 23 of the semiconductor substrate 10 when the semiconductor device 100 is in operation. An emitter electrode 52 is provided above the active portion 120, but is not shown in the figure.

[0120] The active section 120 may be provided with at least one of a transistor section 70 including a transistor element such as an IGBT and a diode section 80 including a diode element such as a free wheel diode (FWD). In the example of FIG. 3 , the transistor sections 70 and the diode sections 80 are alternately arranged along a predetermined arrangement direction (the X-axis direction in this example) on the front surface 21 of the semiconductor substrate 10. In another example, the active section 120 may be provided with only one of the transistor section 70 and the diode section 80. That is, the active section 120 may be provided with only the transistor section 70 as shown in FIG. 1A , or may be provided with both the transistor section 70 and the diode section 80 as shown in FIG. 2A , or may be provided with only the diode section 80.

[0121] In this example, the region where the transistor section 70 is disposed is marked with the symbol "I," and the region where the diode section 80 is disposed is marked with the symbol "F." The transistor section 70 and the diode section 80 may each have a longitudinal direction in the extension direction. That is, the length of the transistor section 70 in the Y-axis direction is greater than the width in the X-axis direction. Similarly, the length of the diode section 80 in the Y-axis direction is greater than the width in the X-axis direction. The extension direction of the transistor section 70 and the diode section 80 may be the same as the longitudinal direction of the active trench section 122.

[0122] The diode section 80 may be a region obtained by projecting a cathode region 82 provided on the rear surface 23 of the semiconductor substrate 10 onto the upper surface of the semiconductor substrate 10. The region obtained by projecting the cathode region 82 onto the upper surface of the semiconductor substrate 10 may be located inside the diode section 80. A P+ type collector region 22 may be provided in a region of the rear surface 23 of the semiconductor substrate 10 other than the cathode region 82.

[0123] The edge termination structure 140 is provided on the front surface 21 of the semiconductor substrate 10. When viewed from above, the edge termination structure 140 is provided between the active section 120 and the edge 102. The edge termination structure 140 relieves electric field concentration on the front surface 21 side of the semiconductor substrate 10. The edge termination structure 140 may include at least one of a guard ring, a field plate, and a resurf, which are provided in an annular shape surrounding the active section 120.

[0124] The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. The semiconductor device 100 of this example includes a gate pad 112, a sense electrode 114, an anode pad 116, and a cathode pad 118. Each pad may be located near an edge 102 of the semiconductor substrate 10. The vicinity of the edge 102 refers to the region between the edge 102 and the emitter electrode 52 in a top view. When the semiconductor device 100 is mounted, each pad may be connected to an external circuit via wiring such as a wire.

[0125] A gate potential is applied to the gate pad 112. The gate pad 112 is electrically connected to the gate conductive portion 44 of the gate trench portion 40 in the active portion 120. The semiconductor device 100 may include a gate wiring that connects the gate pad 112 and the gate trench portion 40. The gate wiring may be configured by either the gate metal layer 50 or the connection portion 25, or by combining both appropriately.

[0126] The sense electrode 114 is electrically connected to a current sense unit 115 provided below the sense electrode 114. The sense electrode 114 detects the current flowing in the current sense unit 115. The current sense unit 115 detects the current flowing in the transistor unit 70. The current sense unit 115 has a structure corresponding to the transistor unit 70. The current flowing in the current sense unit 115 is smaller than the current flowing in the transistor unit 70. A current proportional to the current flowing in the transistor unit 70 may flow in the current sense unit 115, simulating the operation of the transistor unit 70. The ratio of the current flowing in the current sense unit 115 to the current flowing in the transistor unit 70 is appropriately set. The current flowing in the transistor unit 70 can be monitored by using the current sense unit 115.

[0127] The temperature sensing unit 180 is provided on or inside the semiconductor substrate 10. In this example, the temperature sensing unit 180 is provided between the transistor units 70 in the center of the semiconductor device 100. The temperature sensing unit 180 detects the temperature of the active unit 120. The temperature sensing unit 180 may include a diode formed of monocrystalline or polycrystalline silicon. The temperature sensing unit 180 is used to detect the temperature of the semiconductor device 100 and protect the semiconductor chip (semiconductor substrate 10) from overheating. The temperature sensing unit 180 is connected to a constant current source. When the temperature of the semiconductor device 100 changes, the forward voltage of the current flowing through the temperature sensing unit 180 changes. The semiconductor device 100 can detect the temperature based on the change in the forward voltage of the temperature sensing unit 180.

[0128] The anode pad 116 is electrically connected to the temperature-sensitive anode region 182 of the temperature-sensitive unit 180. The anode pad 116 is electrically connected to the temperature-sensitive anode region 182 of the temperature-sensitive unit 180 by an anode wiring part 117 that is electrically connected to the temperature-sensitive anode region 182. The temperature-sensitive anode region 182 will be described later.

[0129] The cathode pad 118 is electrically connected to a temperature-sensitive cathode region 181 of the temperature-sensitive unit 180. The cathode pad 118 is electrically connected to the temperature-sensitive cathode region 181 of the temperature-sensitive unit 180 by a cathode wiring part 119 that is electrically connected to the temperature-sensitive cathode region 181. The temperature-sensitive cathode region 181 will be described later.

[0130] 4A shows an example of a cross section of a semiconductor device 100 including a temperature-sensitive portion 180. The semiconductor device 100 may include a transition portion 190. The temperature-sensitive portion 180 may include a temperature-sensitive diode portion 183, a temperature-sensitive trench portion 185, a temperature-sensitive contact portion 188, and a temperature-sensitive wiring portion 189. The temperature-sensitive wiring portion 189 may include at least one of the anode wiring portion 117 and the cathode wiring portion 119. The temperature-sensitive portion 180 and the transition portion 190 may include a base region 14. This prevents electric field concentration in the temperature-sensitive trench portion 185 of the temperature-sensitive portion 180. The temperature-sensitive portion 180 and the transition portion 190 may or may not include an accumulation region 16.

[0131] The temperature-sensitive diode section 183 has a temperature-sensitive trench conductive section 201 inside the trench. The temperature-sensitive trench conductive section 201 is formed of a conductive material such as polysilicon. The temperature-sensitive trench conductive section 201 has a temperature-sensitive cathode region 181 and a temperature-sensitive anode region 182. The temperature-sensitive diode section 183 may be a PN diode having a PN junction 300 where the temperature-sensitive cathode region 181 and the temperature-sensitive anode region 182 are in contact. The temperature-sensitive cathode region 181 and the temperature-sensitive anode region 182 will be described later.

[0132] The temperature-sensitive trench portion 185 is provided on the front surface 21 side of the semiconductor substrate. The temperature-sensitive trench portion 185 may have a trench insulation portion 184 covering the inner wall of the trench. The trench insulation portion 184 may be a semiconductor oxide film or a semiconductor nitride film. In other words, the trench insulation portion 184 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the trench. The trench insulation portion 184 prevents the temperature-sensitive cathode region 181 and the temperature-sensitive anode region 182 from conducting to the p-type region or n-type region formed in the semiconductor substrate 10.

[0133] The trench depth Dd of the temperature-sensitive trench portion 185 may be the same as the trench depth Dt of the active trench portion 122. When the trench depth Dd of the temperature-sensitive trench portion 185 and the trench depth Dt of the active trench portion 122 are the same, both trench portions can be formed simultaneously by the same etching process. The depth D from the front surface 21 of the semiconductor substrate 10 to the deepest position of the trench portion is defined as D, and the average value of the depths D of the multiple trench portions is defined as D. ｍｅａｎ The trench depth is the same when the depth D of each trench portion is equal to or smaller than the average value D ｍｅａｎ The condition may be such that the temperature does not exceed 10% of the normal range.

[0134] The trench depth Dd of the temperature-sensitive trench portion 185 may be different from the trench depth Dt of the active trench portion 122. The trench depth Dd of the temperature-sensitive trench portion 185 may be deeper than the trench depth Dt of the active trench portion 122, or may be shallower than the trench depth Dt of the active trench portion 122. Note that the trench depth of the trench portion may be the depth at the deepest position of the trench portion.

[0135] Forming the temperature-sensitive diode portion 183 inside the temperature-sensitive trench portion 185 makes it possible to reduce the space required for the temperature-sensitive portion 180. That is, the trench of the temperature-sensitive trench portion 185 ensures a sufficient junction surface for the PN junction 300 in the depth direction of the semiconductor substrate 10, thereby reducing the space required in the in-plane direction of the semiconductor substrate while maintaining stable characteristics.

[0136] The temperature-sensitive wiring portion 189 is provided above the interlayer insulating film 38. The temperature-sensitive wiring portion 189 may be electrically connected to the temperature-sensitive trench portion 185. The temperature-sensitive contact portion 188 is provided in the interlayer insulating film 38. The temperature-sensitive contact portion 188 may electrically connect the temperature-sensitive wiring portion 189 to the temperature-sensitive trench conductive portion 201 of the temperature-sensitive trench portion 185. That is, the temperature-sensitive wiring portion 189 may be electrically connected to the temperature-sensitive diode portion 183 via the temperature-sensitive contact portion 188. The temperature-sensitive wiring portion 189 is electrically connected to the temperature-sensitive cathode region 181 of the temperature-sensitive diode portion 183. The temperature-sensitive wiring portion 189 is electrically connected to the temperature-sensitive anode region 182 of the temperature-sensitive diode portion 183. The temperature-sensitive wiring portion 189 may be the cathode wiring portion 119 or the anode wiring portion 117.

[0137] The temperature-sensitive contact portion 188 may include a barrier metal film 1882 provided in the contact hole, and a plug portion 1884. The barrier metal film 1882 of the temperature-sensitive contact portion 188 may include titanium, a titanium compound, or the like. The plug portion 1884 of the temperature-sensitive contact portion 188 may include a plug metal such as tungsten.

[0138] The contact width Wd of the temperature-sensitive contact portion 188 may be the same as the contact width Wt of the active contact portion 124. The contact widths being the same may mean that each of the widths of the multiple contact portions is 10% or less of the average width of the multiple contact portions. When the temperature-sensitive contact portion 188 and the active contact portion 124 are formed using the same etching process, the contact width Wd of the temperature-sensitive contact portion 188 and the contact width Wt of the active contact portion 124 will be the same. However, the contact width Wd of the temperature-sensitive contact portion 188 and the contact width Wt of the active contact portion 124 may be different. The contact width Wd of the temperature-sensitive contact portion 188 may be larger than the contact width Wt of the active contact portion 124 or smaller than the contact width Wt of the active contact portion 124. The contact portion may have a longitudinal direction and a lateral direction when viewed from above. The contact width of the contact portion may be the width in the lateral direction of the contact portion. The contact width of the contact portion may be the largest width, the smallest width, or half the value of the largest and smallest widths of the widths of the contact portion in the short direction within a plane parallel to the semiconductor substrate 10.

[0139] In the depth direction of the semiconductor substrate 10, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 may be the same as the height position of the upper surface of the interlayer insulating film 38 in the temperature-sensing portion 180. The height positions of the upper surfaces of the interlayer insulating film 38 being the same may mean that the difference between the maximum and minimum height positions of the upper surface of the interlayer insulating film 38 is 10% or less of the average height position of the upper surface of the interlayer insulating film 38. In this case, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 may be said to be substantially the same as the height position of the upper surface of the interlayer insulating film 38 in the temperature-sensing portion 180. When the upper surfaces of the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the temperature-sensing portion 180 are both at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This allows for smaller dimensional tolerances of the interlayer insulating film 38, the emitter electrode 52, and the like. Furthermore, the active contact portion 124 and the temperature-sensitive contact portion 188 can be formed with the same dimensional tolerances. Here, "same" does not necessarily mean completely identical, but may also include differences to the extent that deviations in the focus of exposure are allowed in terms of device design.

[0140] By forming the temperature-sensitive contact portion 188 and the active contact portion 124 in the same etching process, it is possible to suppress the spread of the active contact portion 124, thereby suppressing defects such as a short circuit between the gate and emitter. Furthermore, by forming the temperature-sensitive contact portion 188 and the active contact portion 124 in the same etching process, contact portions of the same shape are formed, and the plug metal in the contact portion is properly embedded. This prevents the plug metal from remaining during etch-back, thereby improving the yield in the manufacture of the semiconductor device 100. Note that the temperature-sensitive contact portion 188 may be formed in a process different from that of the active contact portion 124.

[0141] The transition section 190 is provided between the temperature-sensing section 180 and the active section 120. The transition section 190 may be a region through which no main current flows when the semiconductor device 100 is operating. If a main current flows through the active section 120, the current may also flow into the temperature-sensing section 180, causing the potential of the temperature-sensing section 180 to become unstable. In this case, the main current in the active section 120 may affect the operation of the temperature-sensing section 180. By providing the transition section 190 between the active section 120 and the temperature-sensing section 180, the temperature can be accurately measured without being affected by the current flowing through the active section 120.

[0142] 4B shows a cross section of a modified example of the semiconductor device 100 including a temperature-sensing portion 180. The transition portion 190 of this example differs from the embodiment of FIG. 4A in that it includes one or more dummy trench portions 30. In this example, differences from the embodiment of FIG. 4A will be particularly described, and the rest may be the same as the embodiment of FIG. 4A.

[0143] The transition section 190 has one or more dummy trench sections 30 provided on the front surface 21 side of the semiconductor substrate 10. In this example, the transition section 190 has two dummy trench sections 30 in each direction in which the trench sections are arranged. The potential of the dummy trench sections 30 provided in the transition section 190 may be the emitter potential, which may be a potential different from the potential of the gate trench sections 40. The potential of the dummy trench sections 30 may be a floating potential, which is not a fixed potential. The mesa section 191 of the transition section 190 may or may not be connected to the emitter electrode 52.

[0144] The transition portion 190 has a mesa portion 191 sandwiched between the temperature-sensitive trench portion 185 and the dummy trench portion 30. The transition portion 190 may have a mesa portion 191 sandwiched between two adjacent dummy trench portions 30. By providing the dummy trench portion 30 in the transition portion 190, concentration of the electric field at the bottom of the temperature-sensitive trench portion 185 can be suppressed.

[0145] 4C shows a cross section of a modified example of the semiconductor device 100 including the temperature-sensitive portion 180. The semiconductor device 100 of this example differs from the embodiment of FIGS. 4A and 4B in that well regions 17 are provided in the temperature-sensitive portion 180 and the transition portion 190. In this example, differences from the embodiment of FIGS. 4A and 4B will be particularly described, and the rest may be the same as the embodiment of FIGS. 4A and / or 4B.

[0146] The well region 17 may be provided on the peripheral side of the active section 120. The well region 17 may be provided in the temperature sensitive section 180 and the transition section 190. The well region 17 may be in contact with a trench section that is in contact with the transition section 190 and the active section 120. In this example, the well region 17 is in contact with the gate trench section 40. The trench section that is in contact with the transition section 190 and the active section 120 may be a dummy trench section 30, and the well region 17 may be in contact with the dummy trench section 30.

[0147] The temperature-sensitive trench portion 185 may be provided inside the well region 17 when viewed from above. At least one of the sidewalls and the bottom of the temperature-sensitive trench portion 185 may be in contact with the well region 17, or both the sidewalls and the bottom of the temperature-sensitive trench portion 185 may be in contact with the well region 17. The depth Dw of the well region 17 may be deeper than the depth Dd of the temperature-sensitive trench portion 185 in the depth direction of the semiconductor substrate 10. Furthermore, the depth Dw of the well region 17 may be deeper than the depth Dt of the active trench portion 122.

[0148] The well region 17 may be provided in the arrangement direction of the trench portions (X-axis direction) from one transition portion 190 to the other transition portion 190 facing the temperature-sensitive portion 180. The well region 17 may be deeper than the temperature-sensitive trench portion 185 and may cover the bottom of the temperature-sensitive trench portion 185.

[0149] 4D shows a cross section of a modified example of the semiconductor device 100 including a temperature-sensing portion 180. The well region 17 of this example differs from the embodiment of FIG. 4C in that it is not provided in the temperature-sensing portion 180. In this example, differences from the embodiment of FIG. 4C will be particularly described, and the rest may be the same as the embodiment of FIG. 4C.

[0150] The transition section 190 has a well region 17 of the second conductivity type provided in the semiconductor substrate 10. The well region 17 may be provided in each of the transition sections 190 that face each other across the temperature-sensitive section 180. The well region 17 may terminate so as to cover the bottom of the temperature-sensitive trench section 185.

[0151] 5A shows an example of a cross section of the temperature-sensitive trench portion 185. The cross section in this figure may be an XZ cross section, a YZ cross section, or any cross section parallel to the Z-axis direction. That is, the cross section in this figure may be any cross section parallel to the depth direction of the semiconductor substrate 10. The relationship between the arrangement of the temperature-sensitive trench portion 185 and the cross-sectional direction will be described later.

[0152] The temperature-sensitive diode section 183 has a temperature-sensitive anode region 182 and a temperature-sensitive cathode region 181 provided in the temperature-sensitive trench conductive section 201. The temperature-sensitive diode section 183 may be a PN diode having a PN junction 300 where the temperature-sensitive cathode region 181 and the temperature-sensitive anode region 182 are in contact. The temperature-sensitive cathode region 181 may be formed of an N-type semiconductor and function as the cathode of the PN diode. The temperature-sensitive anode region 182 may be formed of a P-type semiconductor and function as the anode of the PN diode. The material of the temperature-sensitive cathode region 181 and the temperature-sensitive anode region 182 may be a polycrystalline semiconductor, for example, polysilicon. The junction surface of the PN junction 300 in this example may be formed as follows. After depositing doped polysilicon of one conductivity type (N-type in this example) as the temperature-sensitive trench conductive portion 201, a dopant of the other conductivity type (P-type in this example) is ion-implanted. Then, the dopant of the other conductivity type is diffused so as to reach the bottom end of the temperature-sensitive trench conductive portion 201 in the depth direction.

[0153] The temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 may be provided in a temperature-sensitive trench conductive portion 201 that is filled inside the trench of the temperature-sensitive trench portion 185. The temperature-sensitive trench conductive portion 201 may include only the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181. The temperature-sensitive trench conductive portion 201 may be filled with other components in addition to the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181. As an example, the temperature-sensitive trench conductive portion 201 may include an intrinsic semiconductor in contact with the temperature-sensitive cathode region 181 or the temperature-sensitive anode region 182.

[0154] The sidewall of the temperature-sensitive anode region 182 may be in contact with the sidewall of the temperature-sensitive cathode region 181. The temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 may have a junction surface of the PN junction 300 extending in a direction parallel to the Z-axis direction, or may have a junction surface of the PN junction 300 extending in a direction inclined with respect to the Z-axis direction.

[0155] 5B shows a cross section of a modified example of the temperature-sensitive trench portion 185. The cross section in this figure may also be any cross section parallel to the depth direction of the semiconductor substrate 10.

[0156] The PN junction 300 where the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 contact may have a bottom surface parallel to the upper surface of the temperature-sensitive trench conductive portion 201. The PN junction 300 where the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 contact may curve from the bottom surface and contact the upper surface of the temperature-sensitive trench conductive portion 201. That is, both one end and the other end of the PN junction 300 where the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 contact may be exposed on the upper surface of the temperature-sensitive trench conductive portion 201. One of the temperature-sensitive anode region 182 or the temperature-sensitive cathode region 181 may contact the upper surface of the other. In this example, the lower surface of the temperature-sensitive anode region 182 contacts the upper surface of the temperature-sensitive cathode region 181. The junction surface of the PN junction 300 in this example may be formed, for example, as follows. After depositing doped polysilicon of one conductivity type (N-type in this example) as the temperature-sensitive trench conductive portion 201, a dopant of the other conductivity type (P-type in this example) is ion-implanted. The dopant of the other conductivity type is then diffused to a depth that does not reach the bottom end of the temperature-sensitive trench conductive portion 201 in the depth direction. As in this example, the temperature-sensitive anode region 182 may be provided inside the temperature-sensitive cathode region 181. Alternatively, the temperature-sensitive cathode region 181 may be provided inside the temperature-sensitive anode region 182.

[0157] 5C shows a cross section of a modified example of the temperature-sensitive trench portion 185. The cross section in this figure may also be any cross section parallel to the depth direction of the semiconductor substrate 10. The temperature-sensitive diode portion 183 of this example has a short-circuiting wiring portion 310. The short-circuiting wiring portion 310 will be described later.

[0158] 5A in that a plurality of temperature-sensitive anode regions 182 and a plurality of temperature-sensitive cathode regions 181 are provided in the temperature-sensitive trench conductive portion 201. A plurality of PN junctions 300 between the temperature-sensitive cathode regions 181 and the temperature-sensitive anode regions 182 may be provided. The plurality of temperature-sensitive anode regions 182 and the plurality of temperature-sensitive cathode regions 181 may be alternately arranged in the temperature-sensitive trench conductive portion 201 in a direction parallel to the front surface of the semiconductor substrate 10. The plurality of temperature-sensitive anode regions 182 and the plurality of temperature-sensitive cathode regions 181 may be alternately arranged in the temperature-sensitive trench conductive portion 201 in any cross section parallel to the depth direction of the semiconductor substrate 10. Two or more diodes connected in series can be formed in one temperature-sensitive trench portion 185.

[0159] 5D shows a cross section of a modified example of the temperature-sensitive trench portion 185. This example differs from the embodiment of FIG. 5B in that multiple temperature-sensitive anode regions 182 are provided in the temperature-sensitive trench conductive portion 201. Multiple PN junctions 300 between the temperature-sensitive cathode region 181 and the temperature-sensitive anode region 182 may be provided. As in this example, multiple temperature-sensitive anode regions 182 may be provided inside the temperature-sensitive cathode region 181. Alternatively, multiple temperature-sensitive cathode regions 181 may be provided inside the temperature-sensitive anode region 182. A single temperature-sensitive trench portion 185 can form a connection in which two or more diodes branch off.

[0160] 6A shows an example of an enlarged view of the top surface of the temperature-sensing diode portion 183 in the temperature-sensing portion 180 in region T in FIG. 3. In this example, only some components of the semiconductor device 100 are shown, and some components are omitted. This figure shows the Z-axis, which is a direction parallel to the depth direction of the semiconductor substrate 10, the X'-axis, which is the direction in which the cathode wiring portion 119 and the anode wiring portion 117 are spaced apart, and the Y'-axis, which is perpendicular to these axes.

[0161] The temperature-sensitive contact portion 188 has an anode contact portion 187 and a cathode contact portion 186. The anode contact portion 187 may be provided in the interlayer insulating film 38 and may electrically connect the anode wiring portion 117 and the temperature-sensitive anode region 182. The cathode contact portion 186 may be provided in the interlayer insulating film 38 and may electrically connect the cathode wiring portion 119 and the temperature-sensitive cathode region 181. The interlayer insulating film 38 is omitted from FIG. 6A .

[0162] The temperature-sensitive trench portion 185 may include one or more temperature-sensitive trench portions 185. The anode contact portion 187 may include a plurality of anode contact portions 187 provided corresponding to the plurality of temperature-sensitive trench portions 185, respectively. The cathode contact portion 186 may include a plurality of cathode contact portions 186 provided corresponding to the plurality of temperature-sensitive trench portions 185, respectively. The anode wiring portion 117 may be provided extending above the plurality of temperature-sensitive trench portions 185 and may be electrically connected to the plurality of anode contact portions 187. The cathode wiring portion 119 may be provided extending above the plurality of temperature-sensitive trench portions 185 and may be electrically connected to the plurality of cathode contact portions 186. In this example, the plurality of temperature-sensitive trench portions 185 are connected in parallel between the anode wiring portion 117 and the cathode wiring portion 119.

[0163] The temperature-sensitive trench portion 185 may have a loop structure in which one end of the temperature-sensitive trench portion 185 is connected to the other end. A cross section parallel to the depth direction of the semiconductor substrate 10 and taken along the loop structure of the temperature-sensitive trench portion 185 of this example may be the cross section shown in Figure 5A or 5B. That is, the PN junction 300 of the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 of this example may be formed as shown in Figure 5A or as shown in Figure 5B.

[0164] In this example, the anode wiring portion 117 and the cathode wiring portion 119 are spaced apart in the X'-axis direction. The X'-axis direction may be parallel to, intersect with, or perpendicular to the longitudinal direction of the temperature-sensitive trench portion 185. In this example, the X'-axis direction is parallel to the longitudinal direction of the temperature-sensitive trench portion 185. In this example, the extension direction of the temperature-sensitive wiring portion 189 is perpendicular to the longitudinal direction of the temperature-sensitive trench portion 185, which makes it easy to separate the anode wiring portion 117 and the cathode wiring portion 119 and ensure insulation. In addition, the anode wiring portion 117 and the cathode wiring portion 119 can be formed with a sufficient width.

[0165] In this example, the temperature-sensitive wiring portion 189 extends in the Y'-axis direction. The Y'-axis direction, which is the extension direction of the temperature-sensitive wiring portion 189, may or may not coincide with the Y-axis direction, which is the longitudinal direction of the active trench portion 122. In this example, the Y'-axis direction, which is the extension direction of the temperature-sensitive wiring portion 189, coincides with the Y-axis direction, which is the extension direction of the active trench portion 122.

[0166] The anode contact portion 187 and the cathode contact portion 186 of the temperature-sensitive contact portion 188 may be provided at different positions in the extension direction (Y'-axis direction) of the temperature-sensitive wiring portion 189. In this example, the cathode contact portion 186 is provided above the anode contact portion 187 (in the positive direction of the Y'-axis direction). This makes it easy to distinguish whether the temperature-sensitive contact portion 188 is the anode contact portion 187 or the cathode contact portion 186, and prevents incorrect wiring.

[0167] In this example, the anode wiring portion 117 and the cathode wiring portion 119 extend parallel to the Y-axis direction, but this is not a limitation. The same applies to the modified examples described later. For example, instead of being limited to the arrangement shown in FIG. 3 , the Y′-axis direction along which the anode wiring portion 117 and the cathode wiring portion 119 extend may coincide with the X-axis direction. In this example, when the longitudinal directions of the temperature-sensitive wiring portion 189 and the temperature-sensitive trench portion 185 are perpendicular to each other, the longitudinal direction of the temperature-sensitive trench portion 185 coincides with the extension direction of the active trench portion 122. In this case, the longitudinal directions of the temperature-sensitive trench portion 185 and the active trench portion 122 are aligned, allowing both trench portions to be formed stably. Alternatively, the anode wiring portion 117 and the cathode wiring portion 119 may extend in opposite directions on the same axis. Furthermore, the anode pad 116 and the cathode pad 118 may be provided on the temperature-sensitive portion 180. That is, the anode pad 116 and the temperature-sensitive anode region 182 may be electrically connected via the anode contact portion 187 without the anode wiring portion 117, and the cathode pad 118 and the temperature-sensitive cathode region 181 may be electrically connected via the cathode contact portion 186 without the cathode wiring portion 119. The anode pad 116 and the cathode pad 118 may be arranged side by side on one side of the semiconductor device 100 together with the temperature-sensitive portion 180. Alternatively, the anode pad 116 and the cathode pad 118 may be arranged on opposite sides of the semiconductor device 100. Alternatively, the anode pad 116 and the cathode pad 118 may be arranged in a different manner.

[0168] The longitudinal direction of the temperature-sensitive trench portion 185 may be parallel to, intersect with, or perpendicular to the extension direction of the active trench portion 122. In this example, the longitudinal direction of the temperature-sensitive trench portion 185 is the X-axis direction, which is perpendicular to the Y-axis direction, which is the extension direction of the active trench portion 122.

[0169] Figure 6B is an enlarged top view showing another example of the temperature-sensing diode portion 183 in the temperature-sensing portion 180. Figure 6B differs from Figure 6A in that the position of the PN junction 300 is different. The PN junction 300 in this example is provided between the straight portion 320 and the curved portion 321 of the temperature-sensing trench portion 185. The PN junction 300 in this example may be formed as shown in Figure 5A or 5B.

[0170] Figure 6C is an enlarged top view showing another example of the temperature-sensitive diode portion 183 in the temperature-sensitive portion 180. Figure 6C differs from Figure 6A in that the position of the PN junction 300 is different. The PN junction 300 in this example is provided both between the straight portion 320 and the curved portion 321 of the temperature-sensitive trench portion 185 and in the straight portion 320 of the temperature-sensitive trench portion 185. The PN junction 300 in this example may be formed as shown in Figure 5A or 5B.

[0171] FIG. 6D is an enlarged top view showing another example of the temperature-sensitive diode portion 183 in the temperature-sensitive portion 180. FIG. 6D differs from FIG. 6A in the shape of the temperature-sensitive trench portion 185, the position of the PN junction 300, and the positions of the anode contact portion 187 and the cathode contact portion 186. The temperature-sensitive trench portion 185 has a linear structure. The cathode contact portion 186 is provided above the temperature-sensitive cathode region 181. The cathode wiring portion 119 is electrically connected to the temperature-sensitive cathode region 181 via the cathode contact portion 186. The anode contact portion 187 is provided above the temperature-sensitive anode region 182. The anode wiring portion 117 is electrically connected to the temperature-sensitive anode region 182 via the anode contact portion 187.

[0172] One PN junction 300 is formed between the temperature-sensitive cathode region 181 and the temperature-sensitive anode region 182. The PN junction 300 of this example may be formed as shown in Figure 5A or 5B.

[0173] FIG. 6E is an enlarged top view showing another example of the temperature-sensitive diode portion 183 in the temperature-sensitive portion 180. FIG. 6E differs from FIG. 6D in the number and position of the PN junctions 300 in the temperature-sensitive trench conductive portion 201. The PN junctions 300 in this example are formed in the center and end portions of the temperature-sensitive trench portion 185. The center portion of the temperature-sensitive trench portion 185 may be the portion sandwiched between the cathode wiring portion 119 and the anode wiring portion 117. The end portion of the temperature-sensitive trench portion 185 may be located in the negative X-axis direction relative to the cathode wiring portion 119 or in the positive X-axis direction relative to the anode wiring portion 117 in the extension direction (X-axis direction) of the temperature-sensitive trench portion 185. The end portion of the temperature-sensitive trench portion 185 where the PN junctions 300 in this example are located is located in the positive X-axis direction relative to the anode wiring portion 117. The PN junction 300 of this example may be formed as shown in FIG. 5A or FIG. 5B.

[0174] Fig. 6F shows an equivalent circuit of the temperature-sensitive diode unit 183 shown in Fig. 6A, Fig. 6B, Fig. 6C, Fig. 6D, and Fig. 6E. In the temperature-sensitive diode unit 183 of this example, one PN diode or two or more PN diodes are connected in parallel between the cathode wiring portion 119 and the anode wiring portion 117.

[0175] 6G is an enlarged top view showing another example of the temperature-sensing diode portion 183 in the temperature-sensing portion 180. The temperature-sensing trench portion 185 of this example differs from the example of FIG. 6A in that the longitudinal direction is perpendicular to the X′-axis direction, which is the direction in which the anode wiring portion 117 and the cathode wiring portion 119 are spaced apart. Other aspects may be the same as the example of FIG. 6A.

[0176] In this example, the longitudinal direction of the temperature-sensitive trench portion 185 is the Y'-axis direction. In this example, the temperature-sensitive wiring portion 189 extends in the Y'-axis direction. The Y'-axis direction, which is the extension direction of the temperature-sensitive wiring portion 189, may or may not coincide with the Y-axis direction, which is the longitudinal direction of the active trench portion 122. In this example, the Y'-axis direction, which is the extension direction of the temperature-sensitive wiring portion 189, coincides with the Y-axis direction, which is the extension direction of the active trench portion 122. In this case, the longitudinal directions of the temperature-sensitive trench portion 185 and the active trench portion 122 are aligned, allowing both trench portions to be formed stably. By aligning the longitudinal direction of the temperature-sensitive trench portion 185, the longitudinal direction of the active trench portion 122, and the extension direction of the temperature-sensitive wiring portion 189, the temperature-sensitive portion 180 can be formed within a small region.

[0177] The length of the temperature-sensitive contact portion 188 in the extension direction of the temperature-sensitive trench portion 185 may be longer than the width in the direction perpendicular to the extension direction (X′-axis direction) of the temperature-sensitive trench portion 185. As in this example, the length of the temperature-sensitive contact portion 188 may be provided long over the range of the linear portion of the temperature-sensitive trench portion 185.

[0178] An equivalent circuit of the temperature-sensitive diode portion 183 shown in Fig. 6G is shown in Fig. 6F. In this example, the temperature-sensitive diode portion 183 has one PN diode or two or more PN diodes connected in parallel between the cathode wiring portion 119 and the anode wiring portion 117. In this example, multiple temperature-sensitive trench portions 185 spaced apart in the Y'-axis direction can be connected in parallel.

[0179] 6H is an enlarged top view showing another example of the temperature-sensitive diode portion 183 in the temperature-sensitive portion 180. FIG. 6H differs from FIG. 6A in that multiple temperature-sensitive trench portions 185 spaced apart in the Y'-axis direction are connected in series by multiple shorting wiring portions 310 and shorting contact portions 311. One cathode contact portion 186 is provided only in the temperature-sensitive trench portion 185 at one end (+Y'-axis direction) of the arrangement direction (Y'-axis direction) in which the temperature-sensitive trench portions 185 are arranged. One anode contact portion 187 is provided only in the temperature-sensitive trench portion 185 at the other end (-Y'-axis direction) of the arrangement direction (Y'-axis direction) in which the temperature-sensitive trench portions 185 are arranged.

[0180] A short-circuiting wiring portion 310 is provided on the upper surface side of the temperature-sensitive diode portion 183. The short-circuiting wiring portion 310 may be formed of the same material as the anode wiring portion 117 or the cathode wiring portion 119. The short-circuiting wiring portion 310 is provided between the anode wiring portion 117 and the cathode wiring portion 119. The short-circuiting wiring portion 310 does not contact the anode wiring portion 117 or the cathode wiring portion 119.

[0181] A short contact portion 311 is provided in the interlayer insulating film 38 located below the short wiring portion 310. The short contact portion 311 is located on the upper surface of the temperature-sensitive trench conductive portion 201. Only one short contact portion 311 is provided in either the temperature-sensitive cathode region 181 or the temperature-sensitive anode region 182 of one loop-shaped temperature-sensitive trench portion 185. In adjacent temperature-sensitive trench portions 185, the polarity of the temperature-sensitive trench conductive portions 201 on which the short contact portion 311 is provided is different. In other words, when the short contact portion 311 in one temperature-sensitive trench portion 185 is provided on the temperature-sensitive cathode region 181, the short contact portion 311 in the other temperature-sensitive trench portion 185 adjacent to the one temperature-sensitive trench portion 185 is provided on the temperature-sensitive anode region 182. The shorting wiring section 310 is arranged across two adjacent loop-shaped temperature-sensitive trench sections 185, shorting the temperature-sensitive cathode regions 181 and the temperature-sensitive anode regions 182 of different temperature-sensitive trench sections 185 and electrically equalizing them. Therefore, the temperature-sensitive diode section 183 having N temperature-sensitive trench sections 185 is provided with N PN diodes connected in series. The number of PN diodes connected in series may be two or more, five or more, or ten or more. The number of PN diodes connected in series may be 100 or less, 50 or less, or 20 or less. Connecting multiple PN diodes in series increases the potential difference for temperature detection, thereby improving detection accuracy.

[0182] In this example, multiple shorting wiring portions 310 are arranged spaced apart in the Y'-axis direction, but there may be only one, or multiple shorting wiring portions 310 may be arranged spaced apart in the X'-axis direction. Furthermore, multiple series-connected PN diodes may be connected in parallel by repeatedly arranging the array of temperature-sensitive trench portions 185 having cathode contact portions 186 and the array of temperature-sensitive trench portions 185 having anode contact portions 187 in the Y'-axis direction. In this case, the shorting wiring portion 310 may connect one temperature-sensitive anode region 182 and one temperature-sensitive cathode region 181, or may connect multiple temperature-sensitive anode regions 182 and multiple temperature-sensitive cathode regions 181 in parallel.

[0183] The plurality of temperature-sensitive trenches 185 may be composed of only temperature-sensitive trenches 185 having a loop structure, may be composed of only temperature-sensitive trenches 185 having a linear structure, or may be composed of both temperature-sensitive trenches 185 having a loop structure and temperature-sensitive trenches 185 having a linear structure. Furthermore, the structure of the temperature-sensitive trenches 185 may be a structure other than the loop structure or the linear structure.

[0184] 6I is an enlarged top view showing another example of the temperature-sensing diode portion 183 in the temperature-sensing portion 180. Fig. 6I differs from Fig. 6H in the number and positions of the PN junctions 300 in the temperature-sensing trench conductive portion 201 and in the presence of short wiring portions 310 and short contact portions 311.

[0185] The temperature-sensitive diode portion 183 of this example is provided with two or more temperature-sensitive trench portions 185, each having a plurality of PN junctions 300 formed within a single trench, as shown in FIG. 5C . Three or more, or even four or more, temperature-sensitive trench portions 185 may be provided. Each temperature-sensitive trench portion 185 is provided with five PN junctions 300. That is, the temperature-sensitive trench conductive portion 201 of one temperature-sensitive trench portion 185 is provided with three temperature-sensitive anode regions 182, each of which is in contact with the temperature-sensitive cathode region 181 at least at one end or the other. Furthermore, the temperature-sensitive trench conductive portion 201 of one temperature-sensitive trench portion 185 is provided with three temperature-sensitive cathode regions 181, each of which is in contact with the temperature-sensitive anode region 182 at least at one end or the other. In this example, three PNPN regions are formed in the temperature-sensitive trench conductive portion 201 of one temperature-sensitive trench portion 185 .

[0186] An anode wiring portion 117 is provided on the upper surface of the temperature-sensitive diode portion 183, and in each of the temperature-sensitive trench portions 185, contacts the temperature-sensitive anode region 182 via an anode contact portion 187. That is, the anode wiring portion 117 is electrically connected to the temperature-sensitive anode region 182. A cathode wiring portion 119 is provided on the upper surface of the temperature-sensitive diode portion 183, and in each of the temperature-sensitive trench portions 185, contacts the temperature-sensitive cathode region 181 via a cathode contact portion 186. That is, the cathode wiring portion 119 is electrically connected to the temperature-sensitive cathode region 181.

[0187] A short-circuiting wiring portion 310 is provided on the upper surface side of the temperature-sensitive diode portion 183. The short-circuiting wiring portion 310 may be formed of the same material as the anode wiring portion 117 or the cathode wiring portion 119. The short-circuiting wiring portion 310 is provided between the anode wiring portion 117 and the cathode wiring portion 119. The short-circuiting wiring portion 310 does not contact the anode wiring portion 117 or the cathode wiring portion 119.

[0188] A short contact portion 311 is provided in the interlayer insulating film 38 located below the short wiring portion 310. The short contact portion 311 is located on the upper surface of the temperature-sensitive trench conductive portion 201. In plan view, the short contact portion 311 overlaps with the temperature-sensitive anode region 182 or the temperature-sensitive cathode region 181 in each temperature-sensitive trench portion 185. In one temperature-sensitive trench portion 185, the short contact portion 311 is provided on the upper surface of both the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 in the portions sandwiched between the anode wiring portion 117 and the cathode wiring portion 119.

[0189] The shorting wiring portion 310 contacts both the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 sandwiched between the anode wiring portion 117 and the cathode wiring portion 119 via the shorting contact portion 311. That is, both the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 sandwiched between the anode wiring portion 117 and the cathode wiring portion 119 are electrically connected to the shorting wiring portion 310. As a result, the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 sandwiched between the anode wiring portion 117 and the cathode wiring portion 119 are electrically at the same potential. Therefore, one temperature-sensitive trench portion 185 is provided with three PN diodes connected in series. The number of PN diodes connected in series is not limited to three. Connecting multiple PN diodes in series increases the potential difference required for temperature detection, thereby improving detection accuracy.

[0190] In this example, multiple series-connected PN diodes may also be connected in parallel by repeatedly arranging the arrangement of the temperature-sensitive trench portion 185 having the cathode contact portion 186 and the temperature-sensitive trench portion 185 having the anode contact portion 187 in the Y'-axis direction.

[0191] 6J is an enlarged top view showing another example of the temperature-sensitive diode portion 183 in the temperature-sensitive portion 180. The temperature-sensitive trench portion 185 of this example has a plurality of temperature-sensitive trench portions 185 spaced apart in the X'-axis direction, and the temperature-sensitive diode portions 183 provided in each temperature-sensitive trench portion 185 may be connected in series via the anode wiring portion 117, the short wiring portion 310, and the cathode wiring portion 119. The PN junction 300 of this example may be formed as shown in FIG. 5A or 5B.

[0192] In this example, the longitudinal direction of the temperature-sensitive trench portion 185 is parallel to the X'-axis direction. The shorting wiring portion 310 connects multiple temperature-sensitive trench portions 185 that are spaced apart in the X'-axis direction. In this example, multiple series-connected PN diodes may be connected in parallel by repeating the arrangement of the temperature-sensitive trench portion 185 having the cathode contact portion 186 and the temperature-sensitive trench portion 185 having the anode contact portion 187 in the Y'-axis direction.

[0193] 6K is an equivalent circuit diagram of the temperature-sensitive diode section 183 shown in FIGS. 6H, 6I, and 6J. In this example, the temperature-sensitive diode section 183 has PN diodes formed in the temperature-sensitive trench section 185 connected in parallel via the cathode wiring section 119, the anode wiring section 117, or the shorting wiring section 310. The parallel-connected PN diodes are connected in series via the shorting wiring section 310. The PN diodes may also be connected in parallel via the shorting wiring section 310. Although FIGS. 6K, 6H, 6I, and 6J show two parallel diodes and three series diodes, this is not a limitation.

[0194] 6L is an enlarged top view showing another example of the temperature-sensitive diode portion 183 in the temperature-sensitive portion 180. The longitudinal direction of the temperature-sensitive trench portion 185 in this example may be parallel to, intersect with, or perpendicular to the extension direction of the active trench portion 122. The temperature-sensitive trench portion 185 in this example has multiple temperature-sensitive trench portions 185, and the temperature-sensitive diode portions 183 provided in each temperature-sensitive trench portion 185 may be connected in series via short wiring portions 310. The PN junction 300 in this example may be formed as shown in FIG. 5A or 5B.

[0195] In this example, the longitudinal direction of the temperature-sensitive trench portion 185 is perpendicular to the X'-axis direction and parallel to the Y'-axis direction. The shorting wiring portion 310 connects multiple temperature-sensitive trench portions 185 spaced apart in the X'-axis direction. In this example, multiple series-connected PN diodes may be connected in parallel by repeatedly arranging the temperature-sensitive trench portion 185 having the cathode contact portion 186 and the temperature-sensitive trench portion 185 having the anode contact portion 187 in the Y'-axis direction. In this case, the shorting wiring portion 310 may connect one temperature-sensitive anode region 182 and one temperature-sensitive cathode region 181, or may connect multiple temperature-sensitive anode regions 182 and multiple temperature-sensitive cathode regions 181 in parallel. This example will be described using an example without parallel connection.

[0196] The Y'-axis direction may or may not coincide with the Y-axis direction, which is the longitudinal direction of the active trench portion 122. When the Y'-direction coincides with the Y-direction, which is the longitudinal direction of the active trench portion 122, the temperature-sensitive trench portion 185 and the active trench portion 122 are aligned, which makes it easy to form both trench portions.

[0197] Fig. 6M is an equivalent circuit diagram of the temperature-sensitive diode section 183 shown in Fig. 6L. In this example, the temperature-sensitive diode section 183 has two PN diodes formed in the temperature-sensitive trench section 185 connected in series via a short wiring section 310, and connected to the cathode wiring section 119 or cathode pad 118 and the anode wiring section 117 or anode pad 116. Note that although the number of series connections is three in this example, it may be two or more.

[0198] FIG. 6N shows another example of an enlarged view of the top surface of the temperature-sensitive diode portion 183 in the temperature-sensitive portion 180 in region T of FIG. 3 . This example differs from FIG. 6L in that it includes multiple shorting wiring portions 310 spaced apart in the Y′-axis direction. The dimensions of the metal wiring may be larger than the dimensions of the trench portion. For example, as in FIG. 6G , when different metal wiring is formed between adjacent trench portions, it may be difficult to ensure sufficient spacing between the adjacent metal wiring portions. As in this example, by connecting multiple temperature-sensitive trench portions 185 in series via multiple shorting wiring portions 310 of sufficient size arranged at sufficiently large intervals, it is possible to easily ensure sufficient spacing between the cathode wiring portion 119 and the anode wiring portion 117 and between the shorting wiring portions 310.

[0199] Fig. 6O shows an equivalent circuit of the temperature sensitive diode section 183 shown in Fig. 6N. The temperature sensitive diode section 183 of this example is formed by connecting four or more PN diodes in series.

[0200] FIG. 6P shows another example of an enlarged view of the top surface of the temperature-sensing diode portion 183 in the temperature-sensing portion 180 in region T of FIG. 3 . This example differs from FIG. 6G in that the loop-shaped portion of the temperature-sensing trench portion 185 is wider and that one or more dummy trench portions 30 are provided inside the temperature-sensing trench portion 185. The dimensions of the metal wiring may be larger than the dimensions of the trench portion. For example, as shown in FIG. 6G , when different metal wirings are formed between adjacent trench portions, it may be difficult to ensure sufficient spacing between adjacent metal wirings. As in this example, by providing one or more dummy trench portions 30 inside the temperature-sensing trench portion 185, the cathode wiring portion 119 and the anode wiring portion 117 can be spaced apart by approximately the number of dummy trench portions 30. By providing dummy trench portions 30 inside the temperature-sensing trench portion 185, it is possible to prevent electric field concentration at the bottom of the temperature-sensing trench portion 185. This makes it possible to easily ensure the spacing between the cathode wiring portion 119 and the anode wiring portion 117. When the temperature-sensitive trench portion 185 is covered with a well region, it is possible to prevent the electric field from concentrating at the bottom of the temperature-sensitive trench portion 185, so it is not necessary to provide the dummy trench portion 30.

[0201] Fig. 6Q shows an equivalent circuit of the temperature sensitive diode section 183 shown in Fig. 6P. In this example, the temperature sensitive diode section 183 is a single PN diode.

[0202] FIG. 6R shows another example of an enlarged view of the top surface of the temperature-sensitive diode portion 183 in the temperature-sensitive portion 180 in region T of FIG. 3 . This example differs from FIG. 6G in that the loop-shaped portion of the temperature-sensitive trench portion 185 is wider and that the temperature-sensitive trench portion 185 has one or more small loop structures inside it. The dimensions of the metal wiring may be larger than the dimensions of the trench portion. For example, as in FIG. 6G , when different metal wiring is formed between adjacent trench portions, it may be difficult to ensure sufficient spacing between the adjacent metal wiring. By having one or more loop structures inside the temperature-sensitive trench portion 185 as in this example, the cathode wiring portion 119 and the anode wiring portion 117 can be spaced apart by approximately the number of folds of the temperature-sensitive trench portion 185. By providing a folded temperature-sensitive trench 185 between the temperature-sensitive trench 185 having the cathode contact 186 and the anode contact 187, it is possible to prevent the electric field from concentrating at the bottom of the temperature-sensitive trench 185. This makes it possible to easily ensure the spacing between the cathode wiring 119 and the anode wiring 117.

[0203] An equivalent circuit of the temperature sensitive diode section 183 shown in Fig. 6R is shown in Fig. 6Q. In this example, the temperature sensitive diode section 183 is a single PN diode.

[0204] 7A shows a cross section of a modified example of the semiconductor device 100 including the temperature-sensing portion 180. The semiconductor device 100 of this example differs from the embodiment of FIGS. 4A to 4D in that it has a recess region 194. In this example, differences from the embodiment of FIGS. 4A to 4D will be particularly described, and the rest may be the same as at least one of the embodiments of FIGS. 4A to 4D.

[0205] The temperature sensing portion 180 may have a recessed region 194 having a depression on the front surface 21 side of the semiconductor substrate 10. The temperature sensing portion 180 may have a temperature sensing diode portion 183 provided above the semiconductor substrate 10 in the recessed region 194. The temperature sensing diode portion 183 may be provided above an insulating film 196 in the recessed region 194. The insulating film 196 may be a BPSG film, a BSG film, a PSG film, an HTO film, or a laminate of these materials.

[0206] The temperature-sensitive contact portion 188 may be provided in the interlayer insulating film 38 and may electrically connect the temperature-sensitive wiring portion 189 and the temperature-sensitive diode portion 183. The temperature-sensitive wiring portion 189 electrically connected to the temperature-sensitive cathode region 181 of the temperature-sensitive diode portion 183 may be the cathode wiring portion 119, and the temperature-sensitive wiring portion 189 electrically connected to the temperature-sensitive anode region 182 of the temperature-sensitive diode portion 183 may be the anode wiring portion 117.

[0207] The contact width Wd of the temperature-sensitive contact portion 188 may be the same as the contact width Wt of the active contact portion 124. If the contact width Wd of the temperature-sensitive contact portion 188 and the contact width Wt of the active contact portion 124 are approximately the same, both contact portions can be formed simultaneously by the same etching process. However, the contact width Wd of the temperature-sensitive contact portion 188 and the contact width Wt of the active contact portion 124 may be different. The contact width Wd of the temperature-sensitive contact portion 188 may be larger or smaller than the contact width Wt of the active contact portion 124.

[0208] In the depth direction of the semiconductor substrate 10, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 may be approximately the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 194. When the height positions of the upper surfaces of the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 194 are approximately the same, the active contact portion 124 and the temperature-sensitive contact portion 188 can be formed simultaneously by the same etching process. In other words, if the upper surfaces of both the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 194 are at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This allows for smaller dimensional tolerances of the interlayer insulating film, emitter electrode, etc. Furthermore, the active contact portion 124 and the temperature-sensitive contact portion 188 can be formed with the same dimensional tolerances. This allows for easier manufacturing with fewer processes than when each contact portion is formed in separate processes.

[0209] Forming the temperature-sensitive contact portion 188 and the active contact portion 124 in the same process can prevent the active contact portion 124 from spreading, thereby preventing gate-emitter short circuits and other defects. Furthermore, forming the temperature-sensitive contact portion 188 and the active contact portion 124 in the same process and forming the same contact portion ensures that the plug metal is properly embedded in the contact portion. This prevents the plug metal from remaining during etch-back, improving the yield in the manufacture of the semiconductor device 100. The active contact portion 124 and the temperature-sensitive contact portion 188 may be formed in different processes.

[0210] 7B shows a cross section of a modified example of the semiconductor device 100 including the temperature-sensitive portion 180. This example differs from the embodiment of FIG. 7A in that the contact width Wd of the temperature-sensitive contact portion 188 is different from the contact width Wt of the active contact portion 124. This example will be described in particular in terms of the differences from the embodiment of FIG. 7A, and the rest may be the same as the embodiment of FIG. 7A.

[0211] The contact width Wd of the temperature-sensitive contact portion 188 may be larger than the contact width Wt of the active contact portion 124. By making the contact width Wd of the temperature-sensitive contact portion 188 larger than the contact width Wt of the active contact portion 124, the semiconductor device 100 can be manufactured stably and stable characteristics can be obtained even when the semiconductor device 100 is miniaturized. In this case, the active contact portion 124 and the temperature-sensitive contact portion 188 may be formed in different processes.

[0212] 7C shows a cross section of a modified example of the semiconductor device 100 including the temperature-sensitive portion 180. This example differs from the embodiment of FIG. 7A in that the temperature-sensitive contact portion 188 and the active contact portion 124 have trench contact shapes. This example will be described in particular in terms of differences from the embodiment of FIG. 7A, and the rest may be the same as the embodiment of FIG. 7A.

[0213] The distance Ld from the lower end of the temperature-sensitive contact portion 188 to the upper surface of the insulating film 196 of the temperature-sensitive portion 180 in the depth direction of the semiconductor substrate 10 may be greater than, less than, or the same as the thickness Td of the insulating film 196. The distance Dd from the front surface 21 of the semiconductor substrate 10 to the lower end of the temperature-sensitive contact portion 188 in the depth direction of the semiconductor substrate 10 may be smaller than the distance Ld from the lower end of the temperature-sensitive contact portion 188 to the upper surface of the insulating film 196. In this example, Dd is smaller than Ld. However, the distance Dd from the front surface 21 of the semiconductor substrate 10 to the lower end of the temperature-sensitive contact portion 188 in the depth direction of the semiconductor substrate 10 may be greater than the distance Ld from the lower end of the temperature-sensitive contact portion 188 to the upper surface of the insulating film 196.

[0214] The temperature-sensitive contact portion 188 does not have to penetrate the temperature-sensitive diode portion 183. In this example, the temperature-sensitive contact portion 188 does not penetrate the temperature-sensitive diode portion 183. That is, Ld>0 may be satisfied. In another example, the temperature-sensitive contact portion 188 may penetrate the temperature-sensitive diode portion 183, and Ld=0 may be satisfied. However, it should be noted that if the temperature-sensitive contact portion 188 extends from the upper surface of the insulating film 196 in the depth direction of the semiconductor substrate 10 and the thickness Td of the insulating film 196 below the temperature-sensitive contact portion 188 becomes thin, insulation between the temperature-sensitive diode portion 183 and the semiconductor substrate 10 may not be maintained.

[0215] In this example, the depth Dd of the temperature-sensitive contact portion 188 extending from the top surface of the temperature-sensitive diode portion 183 in the Z-axis direction is smaller than the thickness of the temperature-sensitive diode portion 183. The depth Dd may be equal to the depth Dt of the active contact portion 124 extending from the front surface 21 in the Z-axis direction. If the top surfaces of the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 194 are at the same height from the front surface 21 of the semiconductor substrate 10, deviation in the focus of exposure does not occur in the photolithography process. This reduces the dimensional tolerances of the interlayer insulating film 38, the emitter electrode 52, etc., and allows for the depths to be approximately the same even when a trench contact shape is used. This allows for stable manufacturing and stable characteristics even when the semiconductor device 100 is miniaturized. In other examples, the depth Dd may be shallower than the depth Dt. In the temperature sensitive section 180, the temperature sensitive contact section 188 may be configured not to penetrate the temperature sensitive diode section 183, and in the active section 120, the active contact section 124 may be configured to reach a deep portion of the contact region 15. This prevents latch-up. In this case, the active contact section 124 and the temperature sensitive contact section 188 may be formed in different processes.

[0216] The active contact portion 124 may have either the planar contact shape shown in Fig. 7A or the trench contact shape shown in Fig. 7C, and the temperature sensitive contact portion 188 may have either the planar contact shape shown in Fig. 7A or the trench contact shape shown in Fig. 7C. That is, both the active contact portion 124 and the temperature sensitive contact portion 188 may have planar contact shapes, or one of the active contact portion 124 or the temperature sensitive contact portion 188 may have a planar contact shape and the other a trench contact shape, or both the active contact portion 124 and the temperature sensitive contact portion 188 may have a trench contact shape.

[0217] 8 is a flowchart showing an example of a manufacturing process for the semiconductor device 100. In step S100, trenches for the temperature-sensitive trench portion 185 and active trench portion 122 are formed on the front surface 21 side of the semiconductor substrate 10. Step S100 may include step S102 of forming the trenches for the temperature-sensitive trench portion 185 on the front surface 21 side of the semiconductor substrate 10, and step S104 of forming the trenches for the active trench portion 122 on the front surface 21 side of the semiconductor substrate 10.

[0218] The trenches of the temperature-sensitive trench portion 185 and the active trench portion 122 may be formed simultaneously by the same etching process. That is, steps S102 and S104 may be the same process. Forming the trenches of the temperature-sensitive trench portion 185 and the active trench portion 122 by the same process facilitates the manufacture of the semiconductor device 100 including the temperature-sensitive portion 180. However, the trenches of the temperature-sensitive trench portion 185 may be formed in step S102 before the trenches of the active trench portion 122 are formed in step S104, or the trenches of the temperature-sensitive trench portion 185 may be formed in step S102 after the trenches of the active trench portion 122 are formed in step S104.

[0219] Step S100 may include forming a trench and then forming a trench insulating portion 184 that serves as an insulating film by covering the inner wall of the trench. The insulating film on the trench sidewall may be a thermal oxide film. The step of forming the trench insulating portion 184 may include forming a sacrificial oxide film by thermal oxidation, removing the sacrificial oxide film, and then forming a new thermal oxide film as an insulating film.

[0220] In step S105, a temperature-sensitive trench conductive portion 201 is formed inside the trench of the temperature-sensitive trench portion 185. The temperature-sensitive trench conductive portion 201 may be polysilicon. The polysilicon may be undoped or may be polysilicon doped with an N-type dopant such as phosphorus or a P-type dopant such as boron. The temperature-sensitive trench conductive portion 201 may be filled to bury the temperature-sensitive trench portion 185.

[0221] In step S106, the temperature-sensitive anode region 182 is formed in the temperature-sensitive trench conductive portion 201. The temperature-sensitive anode region 182 can be formed by a method familiar to those skilled in the art. As an example, when the temperature-sensitive trench conductive portion 201 is undoped polysilicon or N-type doped polysilicon, the temperature-sensitive anode region 182 may be formed by implanting P-type impurity ions into the temperature-sensitive trench conductive portion 201 and performing an annealing process. When the temperature-sensitive trench conductive portion 201 is N-type, the dose is adjusted so that the P-type dopant has a higher concentration than the N-type dopant. When the temperature-sensitive anode region 182 is formed by ion implantation, the region that the ion diffusion cannot reach may remain undoped or N-type. Even when the region that the ion diffusion cannot reach remains undoped or N-type, the trench depths of the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 are the same, thereby aligning the electric field distribution and obtaining good characteristics. As another example, the temperature sensitive anode region 182 may be doped polysilicon with a P-type dopant.

[0222] In step S108, a temperature-sensitive cathode region 181 is formed inside the trench of the temperature-sensitive trench portion 185, contacting the temperature-sensitive anode region 182. The temperature-sensitive cathode region 181 can be formed by a method familiar to those skilled in the art. As an example, when the temperature-sensitive trench conductive portion 201 is undoped polysilicon or P-type doped polysilicon, the temperature-sensitive cathode region 181 may be formed by implanting N-type impurity ions into the temperature-sensitive trench conductive portion 201 and performing an annealing process. When the temperature-sensitive trench conductive portion 201 is P-type, the dose is adjusted so that the N-type dopant has a higher concentration than the P-type dopant. When the temperature-sensitive cathode region 181 is formed by ion implantation, regions that cannot be reached by ion diffusion may remain undoped or P-type. Even if the region that ion diffusion cannot reach remains non-doped or P-type, by making the trench depth of the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 the same, the electric field distribution can be made uniform, and good characteristics can be obtained.

[0223] The manufacturing order of the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 is not limited to this. The temperature-sensitive anode region 182 may be formed after the temperature-sensitive cathode region 181 is formed, or the temperature-sensitive anode region 182 and the temperature-sensitive cathode region 181 may be formed in the same process.

[0224] FIG. 9 shows an example of electrical connections between the various components of the semiconductor device 100. In this example, a Zener diode 170 is provided in antiparallel between the cathode pad 118 and the anode pad 116 to provide voltage resistance protection. The Zener diode 170 may be manufactured using the same method and have the same configuration as the temperature-sensitive diode section 183. In this case, the forward voltage of the Zener diode 170 may be different from the forward voltage of the temperature-sensitive diode section 183. If the temperature-sensitive diode section 183 is composed of multiple temperature-sensitive cathode regions 181 and temperature-sensitive anode regions 182 connected in series, the Zener diode 170 may be provided between each of the temperature-sensitive cathode regions 181 and the temperature-sensitive anode region 182. Furthermore, a Zener diode 170 may be provided between the temperature-sensitive section 180 and the active section 120 for field protection. The Zener diode 170 may have the same configuration as the temperature-sensitive diode section 183. In this case, the breakdown voltage of the Zener diode 170 may be different from the breakdown voltage of the temperature-sensitive diode section 183. A plurality of Zener diodes 170 may be connected in series. In other examples, the Zener diodes 170 may be connected in different positions, or the Zener diodes 170 may not be provided.

[0225] 10A shows an example of an enlarged view of the top surface of the semiconductor device 100. The semiconductor device 100 of this example differs from the embodiment of FIG. 1A in that a connection portion 25 is provided between the emitter electrode 52 and the dummy conductive portion 34. In this example, differences from the embodiment of FIG. 1A will be particularly described, and the rest may be the same as the embodiment of FIG. 1A.

[0226] The semiconductor device 100 includes an active portion 120, which is a portion through which a main current flows between the front surface 21 and the back surface 23 of the semiconductor substrate 10, and an inactive portion 130, which is the other portion. For example, the boundary between the active portion 120 and the inactive portion 130 is the boundary between the base region 14 and the well region 17.

[0227] An interlayer insulating film 38 is provided above the active portion 120 and the inactive portion 130, but the interlayer insulating film 38 is omitted in Fig. 9. A contact hole 54, a contact hole 55, and a contact hole 56 are provided to penetrate the interlayer insulating film 38.

[0228] The contact hole 55 electrically connects the gate metal layer 50 and the gate conductive portion 44 in the transistor portion 70 via the connection portion 25. The contact hole 56 electrically connects the emitter electrode 52 and the dummy conductive portion 34 in the dummy trench portion 30 via the connection portion 25. The connection portion 25 is a conductive material such as polysilicon doped with impurities. In this example, the connection portion 25 is polysilicon (N+) doped with N-type impurities. Polysilicon is an example of a polycrystalline semiconductor. The connection portion 25 is an example of a polycrystalline portion 132 provided above the semiconductor substrate 10. The connection portion 25 is an example of the polycrystalline portion 132 that the inactive portion 130 has.

[0229] Figure 10B shows an example of a cross section taken along the line cc' in Figure 10A. The semiconductor device 100 of this example differs from the embodiment of Figure 1B in that the active contact portion 124 has a trench shape. Other aspects may be the same as the embodiment of Figure 1B.

[0230] 11A shows an example of the dd' cross section in FIG. 9. The dd' cross section is a YZ plane passing through the contact hole 56 in the inactive portion 130. In the dd' cross section, the semiconductor device 100 of this example has the semiconductor substrate 10, the interlayer insulating film 38, the emitter electrode 52, the collector electrode 24, and the first inactive contact portion 134. Note that this example is described using the contact hole 56 having its longitudinal direction in the X-axis direction, but the longitudinal direction of the contact hole 56 may be along the Y-axis direction or another direction.

[0231] The non-active portion 130 has a recessed region 136 having a depression on the front surface 21 side of the semiconductor substrate 10. The non-active portion 130 has a polycrystalline portion 132 provided above the semiconductor substrate 10 in the recessed region 136. The polycrystalline portion 132 in this example is the connection portion 25.

[0232] The inactive portion 130 may have an insulating film 138 on the upper surface of the semiconductor substrate 10 in the recess region 136. The insulating film 138 may be made of, for example, the same material as the dummy insulating film 32. The insulating film 138 may be, for example, a thermal oxide film. The polycrystalline portion 132 may be provided above the insulating film 138 in the recess region 136. The connection portion 25 in this example is provided above the insulating film 138.

[0233] In the depth direction of the semiconductor substrate 10, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136. In other words, the height position of the upper surface of the connection portion 25 provided in the recess region 136 is the same as the height position of the front surface 21 of the semiconductor substrate 10, so that the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 and the height position of the upper surface of the interlayer insulating film 38 in the recess region 136 may be the same.

[0234] The first inactive contact portion 134 electrically connects the emitter electrode 52 and the polycrystalline portion 132 by contacting them. The first inactive contact portion 134 may electrically connect a film mainly containing metal, such as the emitter electrode 52, to a film mainly containing polycrystalline material (polysilicon in this example), such as the polycrystalline portion 132. The contact width W01 of the first inactive contact portion 134 may be the same as the contact width Wt of the active contact portion 124. When the contact width W01 of the first inactive contact portion 134 and the contact width Wt of the active contact portion 124 are approximately the same, both contact portions can be formed simultaneously using the same etching process. However, the contact width W01 of the first inactive contact portion 134 and the contact width Wt of the active contact portion 124 may be different. The contact width Wo1 of the first inactive contact portion 134 may be larger than the contact width Wt of the active contact portion 124 or may be smaller than the contact width Wt of the active contact portion 124 .

[0235] When the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136, the active contact portion 124 and the first inactive contact portion 134 can be formed simultaneously by the same etching process. That is, if the upper surfaces of both the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 136 are at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This reduces the dimensional tolerances of the interlayer insulating film, emitter electrode, and the like. Furthermore, the active contact portion 124 and the first inactive contact portion 134 can be formed with the same dimensional tolerances. This allows for easier manufacturing with fewer processes than when each contact portion is formed in separate processes.

[0236] Forming the first inactive contact portion 134 and the active contact portion 124 in the same process can prevent the active contact portion 124 from spreading, thereby preventing defects such as a short circuit between the gate and emitter. Furthermore, forming the first inactive contact portion 134 and the active contact portion 124 in the same process and forming the same contact portion allows for good filling of the plug metal in the contact portion. This prevents the plug metal from remaining during etch-back, improving the yield in the manufacture of the semiconductor device 100. Note that the active contact portion 124 and the first inactive contact portion 134 may be formed in different processes.

[0237] The first inactive contact portion 134 is electrically connected to the polycrystalline portion 132. In this example, the first inactive contact portion 134 is electrically connected to the connection portion 25. The first inactive contact portion 134 may electrically connect the emitter electrode 52 and the connection portion 25.

[0238] The first inactive contact portion 134 may include a barrier metal film 1342 provided in the contact hole 55 and a plug portion 1344. The barrier metal film 1342 of the first inactive contact portion 134 may include titanium, a titanium compound, or the like. The plug portion 1344 of the first inactive contact portion 134 may include a plug metal such as tungsten.

[0239] The polycrystalline portion 132 may be connected to the emitter electrode 52 through a contact hole 56 provided in the interlayer insulating film 38 above the recessed region 136. The connection portion 25 of this example is connected to the emitter electrode 52 through the contact hole 56 provided in the interlayer insulating film 38. The polycrystalline portion 132 may be connected to the dummy conductive portion 34 above the non-recessed region 137. The non-recessed region 137 may be a region where no depression is formed on the front surface 21 side of the semiconductor substrate 10. The connection portion 25 of this example is connected to the dummy conductive portion 34 above the non-recessed region 137. By providing the dummy trench portion 30 in the non-recessed region 137, the trench shape is formed more stably than when the dummy trench portion 30 is provided in the recessed region 136. In another example, the dummy trench portion 30 may be formed in the recess region 136 , and the connection portion 25 may be connected to the dummy conductive portion 34 above the recess region 136 .

[0240] 11B shows an example of a cross section taken along the line dd' in FIG. 10A. The semiconductor device 100 of this example differs from the embodiment of FIG. 11A in that the first inactive contact portion 134 has a trench shape. In this example, differences from the embodiment of FIG. 11A will be particularly described, and the rest may be the same as the embodiment of FIG. 11A.

[0241] The distance L01 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10 may be greater than, less than, or the same as the thickness T of the insulating film 138. The distance Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 in the depth direction of the semiconductor substrate 10 may be smaller than the distance L1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138. In this example, Do1 is smaller than Lo1. However, the distance L2 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 in the depth direction of the semiconductor substrate 10 may be greater than the distance Lo1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138.

[0242] The first inactive contact portion 134 does not have to penetrate the polycrystalline portion 132. In this example, the first inactive contact portion 134 does not penetrate the connection portion 25. That is, L01>0 may be satisfied. In another example, the first inactive contact portion 134 may penetrate the connection portion 25, and L01=0 may be satisfied. In this example, the first inactive contact portion 134 extends from the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10. The thickness T of the insulating film 138 below the first inactive contact portion 134 may be thinner, or the first inactive contact portion 134 may penetrate the insulating film 138 and reach the semiconductor substrate 10. However, it should be noted that this may cause problems for the first inactive contact portions 134 in other regions that are formed at the same time.

[0243] The depth Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 may be the same as the depth Dt from the front surface 21 of the semiconductor substrate 10 to the lower end of the active contact portion 124. When Do1 and Dt are substantially the same, both contact portions can be formed simultaneously using the same etching process. If the upper surfaces of the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 136 are at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This allows for smaller dimensional tolerances for the interlayer insulating film 38, the emitter electrode 52, and the like, and allows for substantially the same depth even when a trench contact shape is formed. In another example, the depth Do1 may be shallower than the depth Dt. In the inactive portion 130, the first inactive contact portion 134 may not penetrate the connection portion 25, and in the active portion 120, the active contact portion 124 may reach a deep portion of the contact region 15. This suppresses latch-up. In this case, the active contact portion 124 and the first inactive contact portion 134 may be formed in different processes.

[0244] The active contact portions 124 may have either the planar contact shape shown in Fig. 1B or the trench contact shape shown in Fig. 10B, and the first non-active contact portions 134 may have either the planar contact shape shown in Fig. 11A or the trench contact shape shown in Fig. 11B. That is, both the active contact portions 124 and the first non-active contact portions 134 may have planar contact shapes, or one of the active contact portions 124 or the first non-active contact portions 134 may have a planar contact shape and the other may have a trench contact shape, or both the active contact portions 124 and the first non-active contact portions 134 may have a trench contact shape.

[0245] 12A shows an example of the ee' cross section in FIG. 10A. The ee' cross section is a YZ plane passing through contact hole 55 in inactive portion 130. In the ee' cross section, semiconductor device 100 of this example has semiconductor substrate 10, interlayer insulating film 38, gate metal layer 50, collector electrode 24, and first inactive contact portion 134. Note that this example is described using contact hole 55 having its longitudinal direction in the X-axis direction as an example, but the longitudinal direction of contact hole 55 may be along the Y-axis direction or another direction.

[0246] The non-active portion 130 has a recessed region 136 having a depression on the front surface 21 side of the semiconductor substrate 10. The non-active portion 130 has a polycrystalline portion 132 provided above the semiconductor substrate 10 in the recessed region 136. The polycrystalline portion 132 in this example is the connection portion 25.

[0247] The inactive portion 130 may have an insulating film 138 on the upper surface of the semiconductor substrate 10 in the recess region 136. The insulating film 138 may be made of the same material as the gate insulating film 42, for example. The insulating film 138 may be a thermal oxide film, for example. The polycrystalline portion 132 may be provided above the insulating film 138 in the recess region 136. The connection portion 25 in this example is provided above the insulating film 138.

[0248] In the depth direction of the semiconductor substrate 10, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136. In other words, the height position of the upper surface of the connection portion 25 provided in the recess region 136 is the same as the height position of the front surface 21 of the semiconductor substrate 10, so that the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 and the height position of the upper surface of the interlayer insulating film 38 in the recess region 136 may be the same.

[0249] The contact width Wo1 of the first inactive contact portion 134 may be the same as the contact width Wt of the active contact portion 124. When the contact width Wo1 of the first inactive contact portion 134 and the contact width Wt of the active contact portion 124 are approximately the same, both contact portions can be formed simultaneously by the same etching process. However, the contact width Wo1 of the first inactive contact portion 134 and the contact width Wt of the active contact portion 124 may be different. The contact width Wo1 of the first inactive contact portion 134 may be larger than the contact width Wt of the active contact portion 124 or smaller than the contact width Wt of the active contact portion 124.

[0250] When the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136, the active contact portion 124 and the first inactive contact portion 134 can be formed simultaneously by the same etching process. That is, if the upper surfaces of both the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 136 are at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This reduces the dimensional tolerances of the interlayer insulating film, emitter electrode, and the like. Furthermore, the active contact portion 124 and the first inactive contact portion 134 can be formed with the same dimensional tolerances. This allows for easier manufacturing with fewer processes than when each contact portion is formed in separate processes.

[0251] Forming the first inactive contact portion 134 and the active contact portion 124 in the same process can prevent the active contact portion 124 from spreading, thereby preventing defects such as a short circuit between the gate and emitter. Furthermore, forming the first inactive contact portion 134 and the active contact portion 124 in the same process and forming the same contact portion allows for good filling of the plug metal in the contact portion. This prevents the plug metal from remaining during etch-back, improving the yield in the manufacture of the semiconductor device 100. Note that the active contact portion 124 and the first inactive contact portion 134 may be formed in different processes.

[0252] The first inactive contact portion 134 is electrically connected to the polycrystalline portion 132. In this example, the first inactive contact portion 134 is electrically connected to the connection portion 25. The first inactive contact portion 134 may electrically connect the gate metal layer 50 and the connection portion 25.

[0253] The polycrystalline portion 132 may be connected to the gate metal layer 50 through a contact hole 55 provided in the interlayer insulating film 38 above the recessed region 136. The connection portion 25 of this example is connected to the gate metal layer 50 through the contact hole 55 provided in the interlayer insulating film 38. The polycrystalline portion 132 may be connected to the gate conductive portion 44 above the non-recessed region 137. The connection portion 25 of this example is connected to the gate conductive portion 44 above the non-recessed region 137. By providing the gate trench portion 40 in the non-recessed region 137, the trench shape is formed more stably than when the gate trench portion 40 is provided in the recessed region 136. In another example, the gate trench portion 40 may be formed in the recessed region 136, and the connection portion 25 may be connected to the gate conductive portion 44 above the recessed region 136.

[0254] 12B shows an example of the e-e' cross section in FIG. 10A. The semiconductor device 100 of this example differs from the embodiment of FIG. 12A in that the first inactive contact portion 134 has a trench shape. In this example, differences from the embodiment of FIG. 12A will be particularly described, and the rest may be the same as the embodiment of FIG. 12A.

[0255] The distance Lo1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10 may be greater than, less than, or the same as the thickness T of the insulating film 138. In the depth direction of the semiconductor substrate 10, the distance Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 may be smaller than the distance Lo1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138. In this example, Do1 is smaller than Lo1. However, in the depth direction of the semiconductor substrate 10, the distance Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 may be greater than the distance Lo1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138.

[0256] The first inactive contact portion 134 does not have to penetrate the polycrystalline portion 132. In this example, the first inactive contact portion 134 does not penetrate the connection portion 25. That is, L01>0 may be satisfied. In another example, the first inactive contact portion 134 may penetrate the connection portion 25, and L01=0 may be satisfied. However, it should be noted that if the first inactive contact portion 134 extends from the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10 and the thickness T of the insulating film 138 below the first inactive contact portion 134 becomes thin, insulation between the connection portion 25 and the semiconductor substrate 10 may not be maintained.

[0257] The depth Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first non-active contact portion 134 may be the same as the depth Dt from the front surface 21 of the semiconductor substrate 10 to the lower end of the active contact portion 124. When Do1 and Dt are substantially the same, both contact portions can be formed simultaneously using the same etching process. If the upper surfaces of the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 136 are at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This reduces the dimensional tolerances of the interlayer insulating film 38, the emitter electrode 52, and the like, and allows the depths to be substantially the same even when a trench contact shape is used. In another example, the depth Do1 may be shallower than the depth Dt. In the non-active portion 130, the first non-active contact portion 134 may not penetrate the connection portion 25, and in the active portion 120, the active contact portion 124 may reach a deep portion of the contact region 15. This suppresses latch-up. In this case, the active contact portion 124 and the first inactive contact portion 134 may be formed in different processes.

[0258] The active contact portions 124 may have either the planar contact shape shown in Fig. 1B or the trench contact shape shown in Fig. 10B, and the first non-active contact portions 134 may have either the planar contact shape shown in Fig. 12A or the trench contact shape shown in Fig. 12B. That is, both the active contact portions 124 and the first non-active contact portions 134 may have planar contact shapes, or one of the active contact portions 124 or the first non-active contact portions 134 may have a planar contact shape and the other a trench contact shape, or both the active contact portions 124 and the first non-active contact portions 134 may have a trench contact shape.

[0259] 13A shows an example of a top view of the semiconductor device 100. The semiconductor device 100 of this example includes a guard ring 142 in the edge termination structure 140. The semiconductor device 100 may include multiple guard rings 142.

[0260] The guard ring 142 is a second conductivity type region provided on the front surface 21 of the semiconductor substrate 10 between the active portion 120 and the edge 102 of the semiconductor substrate 10. The guard ring 142 is, for example, a P+ type. The guard ring 142 may surround the active portion 120 in a top view. In this example, the well region 17 adjacent to the active portion 120 may also be included in the guard ring 142. Furthermore, multiple guard rings 142 may be provided. The guard ring 142 disposed on the outer side may surround the guard ring 142 disposed on the inner side. The outer side refers to the side closer to the edge 102, and the inner side refers to the side closer to the center of the semiconductor substrate 10 in a top view. By providing the guard ring 142, the depletion layer on the front surface 21 side of the active portion 120 can be extended toward the edge 102, thereby improving the breakdown voltage of the semiconductor device 100. The guard ring 142, which is spaced apart from the well region 17 adjacent to the active portion 120, may also be formed by the same diffusion process as the well region 17, and the inner and outer diffusion shapes may be substantially the same. In another example, the guard ring 142 may be a VLD whose depth becomes shallower toward the outer side. In yet another example, the guard ring 142 may be formed by the same diffusion process as the base region 14. The semiconductor device 100 may further include at least one of a field plate or a resurf provided in the edge termination structure 140 surrounding the active portion 120.

[0261] Figure 13B shows an example of region R in Figure 13A. In this example, semiconductor device 100 includes guard ring 142 and field plate 144 in edge termination structure 140. Edge termination structure 140 is an example of inactive portion 130. In edge termination structure 140, semiconductor device 100 may include interlayer insulating film 38, edge metal layer 146, and field insulating film 148. Interlayer insulating film 38 and field insulating film 148 are omitted in Figure 13B. Contact holes 57 and 59 are provided to penetrate interlayer insulating film 38.

[0262] The field plate 144 is a conductive member provided above the semiconductor substrate 10. In this example, the field plate 144 is formed of polysilicon to which impurities are added. The field plate 144 is an example of the polycrystalline portion 132. The field plate 144 is provided above the guard ring 142. The field plate 144 may be electrically connected to the corresponding guard ring 142.

[0263] The guard ring 142 has a non-corner region 1420 and a corner region 1422. The non-corner region 1420 is, for example, a region of the guard ring 142 that extends along the edge 102 of the semiconductor substrate 10, and the corner region 1422 is, for example, a portion of the guard ring 142 that connects the regions that extend along the edge 102 of the semiconductor substrate 10.

[0264] Contact hole 57 connects edge metal layer 146 and field plate 144. Inside contact hole 57, a barrier metal film made of titanium or a titanium compound and / or a plug made of tungsten may be formed.

[0265] Contact hole 59 connects edge metal layer 146 and guard ring 142. A barrier metal film made of titanium or a titanium compound and / or a plug made of tungsten may be formed inside contact hole 59. Field plate 144 does not need to be provided around contact hole 59.

[0266] Contact holes 57 and 59 may be provided above corner regions 1422 of guard ring 142. However, at least one of contact holes 57 and 59 may be provided above non-corner regions 1420 of guard ring 142, or both contact holes 57 and 59 may be provided above non-corner regions 1420 of guard ring 142. In this example, contact holes 57 and 59 have their longitudinal direction in the direction in which guard ring 142 and field plate 144 extend, and are provided side by side from the center toward edge 102. In another example, contact holes 57 and 59 may be arranged in the direction in which guard ring 142 and field plate 144 extend, and the longitudinal direction of each contact hole may be from the center toward edge 102, and each contact hole may consist of multiple holes.

[0267] The width d2 of the corner region 1422 may be wider than the width d1 of the non-corner region 1420. That is, the radius of curvature r1 on the side of the edge 102 (outside) may be smaller than the sum of the radii of curvature r2 and d1 on the central side (inside). In this example, r1 is smaller than r2. The edge metal layer 146 may be provided at or near the widest point of the corner region 1422. In another example, the width d2 of the corner region 1422 may be equal to the width d1 of the non-corner region 1420. In still another example, the edge metal layer 146 may be provided in the non-corner region 1422, or may be provided across the non-corner region 1420 and the corner region 1422.

[0268] 14A shows an example of the ff' cross section in Figure 13B. The ff' cross section is a plane parallel to the Z-axis direction that passes through contact holes 57 and 59 in inactive portion 130. In the ff' cross section, semiconductor device 100 of this example has semiconductor substrate 10, interlayer insulating film 38, field insulating film 148, edge metal layer 146, collector electrode 24, first inactive contact portion 134, and second inactive contact portion 135.

[0269] The field insulating film 148 is provided above the semiconductor substrate 10. The field insulating film 148 may be provided between the well region 17 adjacent to the active portion 120 and the guard ring 142, and between the guard rings 142, so as to cover the drift region 18 exposed on the front surface 21 of the semiconductor substrate 10. The field insulating film 148 may be provided along the guard ring 142 so as to surround the active portion 120.

[0270] The field insulating film 148 may include an insulating film obtained by oxidizing or nitriding the semiconductor substrate 10, an insulating film deposited by CVD or the like, or another insulating film. The field insulating film 148 may be a single-layer insulating film, or may be an insulating film in which multiple films formed by different methods are stacked.

[0271] The edge metal layer 146 is provided above the semiconductor substrate 10 and is electrically connected to the guard ring 142. The edge metal layer 146 is provided above the semiconductor substrate 10 with the interlayer insulating film 38 sandwiched therebetween. The edge metal layer 146 may be electrically connected to the field plate 144. The edge metal layer 146 may be electrically floating. For example, when a voltage V is applied to the collector electrode 24 with the gate of the semiconductor device 100 in an off state, the edge metal layer 146 has a predetermined voltage lower than the voltage V. If the guard ring 142 is a well region 17 adjacent to the active portion 120, the edge metal layer 146 may be at the same potential as the emitter electrode 52.

[0272] The edge metal layer 146 is formed of a material containing metal. At least a portion of the edge metal layer 146 may be formed of a metal such as aluminum (Al), or a metal alloy such as an aluminum-silicon alloy (AlSi) or an aluminum-silicon-copper alloy (AlSiCu). The edge metal layer 146 may have a barrier metal film formed of titanium or a titanium compound below the region formed of aluminum or the like.

[0273] The non-active portion 130 has a recessed region 136 having a depression on the front surface 21 side of the semiconductor substrate 10. The non-active portion 130 has a polycrystalline portion 132 provided above the semiconductor substrate 10 in the recessed region 136. The polycrystalline portion 132 in this example is a field plate 144.

[0274] The inactive portion 130 may have an insulating film 138 on the upper surface of the semiconductor substrate 10 in the recess region 136. The insulating film 138 may be made of the same material as the gate insulating film 42 and / or the dummy insulating film 32, for example. The insulating film 138 may be a thermal oxide film, for example. The polycrystalline portion 132 may be provided above the insulating film 138 in the recess region 136. The field plate 144 in this example is provided above the insulating film 138.

[0275] In the depth direction of the semiconductor substrate 10, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136. That is, by having the height position of the upper surface of the field plate 144 provided in the recess region 136 be the same as the height position of the front surface 21 of the semiconductor substrate 10, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 may be the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136. Furthermore, the height position of the upper surface of the interlayer insulating film 38 in the recess region 136 may be the same as the height position of the upper surface of the interlayer insulating film 38 in the non-recess region 137 in the inactive portion 130.

[0276] The second inactive contact portion 135 electrically connects the edge metal layer 146 to the guard ring 142 by contacting them. The second inactive contact portion 135 may electrically connect a film mainly containing metal, such as the edge metal layer 146, to a film containing a single-crystal material (a silicon substrate in this example), such as the guard ring 142. The contact width Wo1 of the first inactive contact portion 134 in the recess region 136 and the contact width Wo2 of the second inactive contact portion 135 in the non-recess region 137 may be the same as the contact width Wt of the active contact portion 124. When the contact widths Wo1 of the first inactive contact portion 134 and Wo2 of the second inactive contact portion 135 are substantially the same as the contact width Wt of the active contact portion 124, all of the contact portions can be formed simultaneously using the same etching process. However, the contact width W01 of the first inactive contact portion 134, W02 of the second inactive contact portion 135, and the contact width Wt of the active contact portion 124 may be different from each other.

[0277] When the height positions of the upper surface of the interlayer insulating film 38 in the active portion 120, the upper surface of the interlayer insulating film 38 in the recessed region 136, and the upper surface of the interlayer insulating film 38 in the non-recessed region 137 are the same, the active contact portion 124, the first non-active contact portion 134, and the second non-active contact portion 135 can be formed simultaneously by the same etching process. In other words, if the upper surfaces of the interlayer insulating film 38 in the active portion 120, the interlayer insulating film 38 in the recessed region 136, and the interlayer insulating film 38 in the non-recessed region 137 are all at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This allows for smaller dimensional tolerances of the interlayer insulating film 38, the emitter electrode 52, and the like. Furthermore, the active contact portion 124, the first non-active contact portion 134, and the second non-active contact portion 135 can be formed with the same dimensional tolerances. This allows for easier manufacturing with fewer steps compared to when each contact portion is formed in a separate step.

[0278] By forming the first inactive contact portion 134, the second inactive contact portion 135, and the active contact portion 124 in the same process, it is possible to suppress the spread of the active contact portion 124, thereby suppressing defects such as a short circuit between the gate and emitter. Furthermore, by forming the first inactive contact portion 134, the second inactive contact portion 135, and the active contact portion 124 in the same process and forming the same contact portion, the plug metal in the contact portion is properly embedded. This makes it possible to prevent the plug metal from remaining during etch-back, thereby improving the yield in the manufacture of the semiconductor device 100. Note that the active contact portion 124, the first inactive contact portion 134, and the second inactive contact portion 135 may be formed in different processes.

[0279] The first inactive contact portion 134 is electrically connected to the polycrystalline portion 132. In this example, the first inactive contact portion 134 is electrically connected to the field plate 144. The first inactive contact portion 134 may electrically connect the edge metal layer 146 and the field plate 144. The first inactive contact portion 134 may be provided above a corner region 1422 of the guard ring 142.

[0280] The first inactive contact portion 134 may include a barrier metal film 1342 and a plug portion 1344 provided in the contact hole 57. The barrier metal film 1342 of the first inactive contact portion 134 may contain titanium, a titanium compound, or the like. The plug portion 1344 of the first inactive contact portion 134 may contain a plug metal such as tungsten. The second inactive contact portion 135 may include a barrier metal film 1352 and a plug portion 1354 provided in the contact hole 59. The barrier metal film 1352 of the second inactive contact portion 135 may contain titanium, a titanium compound, or the like. The plug portion 1354 of the first inactive contact portion 134 may contain a plug metal such as tungsten.

[0281] The polycrystalline portion 132 may be connected to the edge metal layer 146 through a contact hole 57 provided in the interlayer insulating film 38 above the recessed region 136. The field plate 144 of this example is connected to the edge metal layer 146 through a contact hole 57 provided in the interlayer insulating film 38. The edge metal layer 146 may be connected to the guard ring 142 through a contact hole 59 provided in the interlayer insulating film 38 above the non-recessed region 137 of the inactive portion 130.

[0282] A distance Dc1 from a position where the first inactive contact portion 134 and the edge metal layer 146 contact each other to the bottom end of the first inactive contact portion 134 may be equal to a distance Dc2 from a position where the second inactive contact portion 135 and the edge metal layer 146 contact each other to the bottom end of the second inactive contact portion 135. Here, two distances, such as the distance Dc1 and the distance Dc2, being equal may mean that one distance is 90% or more and 110% or less of the other distance. Alternatively, the distance Dc1 may be greater or smaller than the distance Dc2.

[0283] 14B shows an example of the ff' cross section in FIG. 13B. The semiconductor device 100 of this example differs from the embodiment of FIG. 14A in that the first inactive contact portion 134 has a trench shape. In this example, differences from the embodiment of FIG. 14A will be particularly described, and the rest may be the same as the embodiment of FIG. 14A.

[0284] The distance Lo1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10 may be greater than, less than, or the same as the thickness T of the insulating film 138. In the depth direction of the semiconductor substrate 10, the distance Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 may be smaller than the distance Lo1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138. In this example, Do1 is smaller than Lo1. However, in the depth direction of the semiconductor substrate 10, the distance Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 may be greater than the distance Lo1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138.

[0285] The first inactive contact portion 134 does not have to penetrate the polycrystalline portion 132. In this example, the first inactive contact portion 134 does not penetrate the field plate 144. That is, L01>0 may be satisfied. In another example, the first inactive contact portion 134 may penetrate the field plate 144, and L01=0 may be satisfied. In this example, the first inactive contact portion 134 extends from the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10, and the thickness T of the insulating film 138 below the first inactive contact portion 134 may be thinner, or the first inactive contact portion 134 may penetrate the insulating film 138 and reach the guard ring 142. However, it should be noted that this may cause problems for the first inactive contact portions 134 in other regions that are formed at the same time.

[0286] The depth Do1 from the front surface 21 of the semiconductor substrate 10 to the bottom end of the first inactive contact portion 134 in the recessed region 136 and the depth Do2 from the front surface 21 of the semiconductor substrate 10 to the bottom end of the second inactive contact portion 135 in the non-recessed region 137 may be the same as the depth Dt from the front surface 21 of the semiconductor substrate 10 to the bottom end of the active contact portion 124. When Do1, Do2, and Dt are substantially the same, all of the contact portions can be formed simultaneously using the same etching process. If the upper surfaces of the interlayer insulating film 38 in the active portion 120, the interlayer insulating film 38 in the recessed region 136, and the interlayer insulating film 38 in the non-recessed region 137 are all at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This allows for smaller dimensional tolerances for the interlayer insulating film 38, the emitter electrode 52, and the like, and allows for substantially the same depth even when a trench contact shape is used. However, Do1, Do2, and Dt may be different. For example, depth Do1 may be shallower than depth Dt. The first inactive contact portion 134 may not penetrate the field plate 144, and the active contact portion 124 may reach a deep portion of the contact region 15 in the active portion 120. This suppresses latch-up. In this case, the active contact portion 124 and the first inactive contact portion 134 may be formed by different processes. In another example, depth Do1 may be shallower than depth Do2.

[0287] The active contact portion 124 may have either the planar contact shape shown in FIG. 1B or the trench contact shape shown in FIG. 10B , and the first non-active contact portion 134 may have either the planar contact shape shown in FIG. 14A or the trench contact shape shown in FIG. 14B . That is, both the active contact portion 124 and the first non-active contact portion 134 may have planar contact shapes, or one of the active contact portion 124 or the first non-active contact portion 134 may have a planar contact shape and the other may have a trench contact shape, or both the active contact portion 124 and the first non-active contact portion 134 may have a trench contact shape. The second non-active contact portion 135 may also have either the planar contact shape shown in FIG. 14A or the trench contact shape shown in FIG. 14B . It may have the same shape as the first non-active contact portion 134, the same shape as the active contact portion 124, or a different shape from either.

[0288] 15 shows an example of the gg' cross section of FIG. 13A. The gg' cross section is an XZ plane that passes through the gate pad 112 in the inactive portion 130. In the gg' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, a pad electrode 51, a collector electrode 24, and a first inactive contact portion 134. The gate pad 112 is an example of the pad electrode 51.

[0289] The pad electrode 51 is provided above the semiconductor substrate 10. The pad electrode 51 may be provided above the interlayer insulating film 38. The gate pad 112 of this example is provided above the interlayer insulating film 38.

[0290] The non-active portion 130 has a recessed region 136 having a depression on the front surface 21 side of the semiconductor substrate 10. The non-active portion 130 has a polycrystalline portion 132 provided above the semiconductor substrate 10 in the recessed region 136. The polycrystalline portion 132 in this example is a pad connection portion 125.

[0291] The inactive portion 130 may have an insulating film 138 on the upper surface of the semiconductor substrate 10 in the recess region 136. The insulating film 138 may be made of the same material as the dummy insulating film 32 and / or the gate insulating film 42, for example. The insulating film 138 may be a thermal oxide film, for example. The polycrystalline portion 132 may be provided above the insulating film 138 in the recess region 136. The pad connection portion 125 of this example is provided above the insulating film 138.

[0292] In the depth direction of the semiconductor substrate 10, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136. In other words, the height position of the upper surface of the pad connection portion 125 provided in the recess region 136 is the same as the height position of the front surface 21 of the semiconductor substrate 10, so that the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 and the height position of the upper surface of the interlayer insulating film 38 in the recess region 136 may be the same.

[0293] When the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136, the active contact portion 124 and the first inactive contact portion 134 can be formed simultaneously by the same etching process. That is, if the upper surfaces of both the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 136 are at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This reduces the dimensional tolerances of the interlayer insulating film 38, the emitter electrode 52, the pad electrode 51, and the like. Furthermore, the active contact portion 124 and the first inactive contact portion 134 can be formed with the same dimensional tolerances. This allows for easier manufacturing with fewer processes than when each contact portion is formed in separate processes.

[0294] Forming the first inactive contact portion 134 and the active contact portion 124 in the same process can prevent the active contact portion 124 from spreading, thereby preventing defects such as a short circuit between the gate and emitter. Furthermore, forming the first inactive contact portion 134 and the active contact portion 124 in the same process and forming the same contact portion allows for good filling of the plug metal in the contact portion. This prevents the plug metal from remaining during etch-back, improving the yield in the manufacture of the semiconductor device 100. Note that the active contact portion 124 and the first inactive contact portion 134 may be formed in different processes.

[0295] The first inactive contact portion 134 is electrically connected to the polycrystalline portion 132. In this example, the first inactive contact portion 134 is electrically connected to the pad connection portion 125. The first inactive contact portion 134 may electrically connect the pad electrode 51 and the pad connection portion 125.

[0296] The first inactive contact portion 134 may include a barrier metal film 1342 and a plug portion 1344 provided in the contact hole 58. The barrier metal film 1342 of the first inactive contact portion 134 may include titanium, a titanium compound, or the like. The plug portion 1344 of the first inactive contact portion 134 may include a plug metal such as tungsten. In this example, the barrier metal film 1342 is provided above the interlayer insulating film 38 and is in contact with the pad electrode 51. In the active portion 120 or other inactive portions 130 such as the edge termination structure 140 or the temperature sensing portion 180, a barrier metal film 1242, a barrier metal film 1342, and / or a barrier metal film 1882 may also be provided above the interlayer insulating film 38. In this example, the plug portion 1344 is provided inside the contact hole 58. In another example, plug portion 1344 may be provided above barrier metal film 1342 outside contact hole 58 and in contact with pad electrode 51, and plug portion 1244, plug portion 1344, plug portion 1354, and / or plug portion 1884 may be provided above barrier metal film 1242, barrier metal film 1342, barrier metal film 1352, and / or barrier metal film 1882 outside the contact hole in active portion 120 or other inactive portion 130. In yet another example, barrier metal film 1342 may not be provided above interlayer insulating film 38 but may be provided only inside contact hole 58.

[0297] The polycrystalline portion 132 may be connected to the pad electrode 51 through a contact hole 58 provided in the interlayer insulating film 38 above the recess region 136. The pad connection portion 125 of this example is connected to the pad electrode 51 through the contact hole 58 provided in the interlayer insulating film 38.

[0298] Below the gate pad 112, the entire polycrystalline portion 132 may be formed in the recessed region 136. The polycrystalline portion 132 in the non-recessed region 137 may be provided to the outside of the gate pad 112 in a top view. In another example, the polycrystalline portion 132 may not be provided in the non-recessed region 137.

[0299] The pad connection portion 125 may be made of the same polycrystalline material as the gate conductive portion 44 and the dummy conductive portion 34. In another example, the pad connection portion 125 may be made of polycrystalline material formed simultaneously with the polycrystalline material constituting the temperature-sensitive diode portion 183 and made conductive by ion implantation or the like as necessary, and the insulating film 138 below the polycrystalline portion 132 may have the same configuration as the insulating film 196 of the temperature-sensitive portion 180. The pad connection portion 125 may not be electrically connected to anything other than the pad electrode 51. In this case, the pad electrode 51 may be directly connected to the gate metal layer 50. Alternatively, the pad connection portion 125 may not be conductive. In another example, the pad connection portion 125 may be electrically connected to anything other than the pad electrode 51. For example, the pad connection portion 125 may be connected to the connection portion 25. Alternatively, the pad electrode 51 may not be directly connected to the gate metal layer 50 but may be connected via the pad connection portion 125. In this case, the pad connection portion 125 is conductive and may be connected to the gate metal layer 50 outside the gate pad 112 when viewed from above, and may be connected to the gate metal layer 50 in a manner similar to the connection to the pad electrode 51.

[0300] The barrier metal film 1342 may be provided up to the edge of the pad electrode 51. The pad electrode 51 may be provided up to above the non-recessed region 137. In another example, the pad electrode 51 does not have to be provided above the non-recessed region 137.

[0301] The contact width Wo1 of the first inactive contact portion 134 may be the same as the contact width Wt of the active contact portion 124. When the contact width Wo1 of the first inactive contact portion 134 and the contact width Wt of the active contact portion 124 are approximately the same, both contact portions can be formed simultaneously by the same etching process. However, the contact width Wo1 of the first inactive contact portion 134 and the contact width Wt of the active contact portion 124 may be different. The contact width Wo1 of the first inactive contact portion 134 may be larger than the contact width Wt of the active contact portion 124 or smaller than the contact width Wt of the active contact portion 124.

[0302] In the semiconductor device 100 of this example, the first inactive contact portion 134 has a trench shape.

[0303] The distance L01 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10 may be greater than, less than, or equal to the thickness T of the insulating film 138. The distance L2 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 in the depth direction of the semiconductor substrate 10 may be smaller than the distance L1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138. In this example, Do1 is smaller than Lo1. However, the distance Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 in the depth direction of the semiconductor substrate 10 may be greater than the distance Lo1 from the lower end of the first inactive contact portion 134 to the upper surface of the insulating film 138.

[0304] The first inactive contact portion 134 does not have to penetrate the polycrystalline portion 132. In this example, the first inactive contact portion 134 does not penetrate the pad connection portion 125. That is, L01>0 may be satisfied. In another example, the first inactive contact portion 134 may penetrate the pad connection portion 125, and L01=0 may be satisfied. However, it should be noted that if the first inactive contact portion 134 extends from the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10 and the thickness T of the insulating film 138 below the first inactive contact portion 134 becomes thin, insulation between the pad connection portion 125 and the semiconductor substrate 10 may not be maintained.

[0305] The depth Do1 from the front surface 21 of the semiconductor substrate 10 to the lower end of the first inactive contact portion 134 may be the same as the depth Dt from the front surface 21 of the semiconductor substrate 10 to the lower end of the active contact portion 124. When Do1 and Dt are substantially the same, both contact portions can be formed simultaneously using the same etching process. If the upper surfaces of the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 136 are at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This allows for smaller dimensional tolerances for the interlayer insulating film 38, the emitter electrode 52, and the like, and allows for substantially the same depth even when a trench contact shape is formed. In another example, the depth Do1 may be shallower than the depth Dt. In the inactive portion 130, the first inactive contact portion 134 may not penetrate the pad connection portion 125, and in the active portion 120, the active contact portion 124 may reach a deep portion of the contact region 15. This suppresses latch-up. In this case, the active contact portion 124 and the first inactive contact portion 134 may be formed in different processes.

[0306] The first non-active contact portion 134 may have a planar contact shape. That is, Do1=0 may be true. The active contact portion 124 may have either the planar contact shape of FIG. 1B or the trench contact shape of FIG. 10B , and the first non-active contact portion 134 may have either a planar contact shape or a trench contact shape. The combination of these is arbitrary. That is, both the active contact portion 124 and the first non-active contact portion 134 may have a planar contact shape, or one of the active contact portion 124 or the first non-active contact portion 134 may have a planar contact shape and the other may have a trench contact shape, or both the active contact portion 124 and the first non-active contact portion 134 may have a trench contact shape.

[0307] Although FIG. 15 illustrates the gate pad 112, the configuration described with respect to the gate pad 112 may also be applied to other pads. For example, the configuration may be used for the anode pad 116, cathode pad 118, sense electrode 114, and / or any pad not shown in FIG. 13A . The pad electrode 51 may be in direct contact with the anode wiring portion 117 or the cathode wiring portion 119, or may be indirectly connected via the polycrystalline portion 132. Furthermore, if the pad is a Kelvin emitter pad (not shown) that has the same potential as the emitter electrode 52, the first inactive contact portion 134 may extend from the upper surface of the insulating film 138 in the depth direction of the semiconductor substrate 10. The thickness T of the insulating film 138 below the first inactive contact portion 134 may be thinner, or the first inactive contact portion 134 may penetrate the insulating film 138 and reach the semiconductor substrate 10. Although the XZ cross section has been illustrated in FIG. 15 , the longitudinal direction of the contact hole 58 does not have to be the Y-axis direction. For example, the longitudinal direction of the contact holes 58 may be the X-axis direction or any other direction, and contact holes 58 oriented in different directions may be combined and used.

[0308] 16 shows another example of the gg' cross section of Fig. 13A. In the gg' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, a pad electrode 51, a collector electrode 24, and a first inactive contact portion 134.

[0309] The semiconductor device 100 of this example has a pad trench portion 230 provided in the semiconductor substrate 10. The pad trench portion 230 has therein a pad trench insulating film 232 and a pad trench conductive portion 234 insulated from the semiconductor substrate 10 by the pad trench insulating film 232. The pad trench portion 230 is an example of a recess region 136. The pad trench conductive portion 234 is an example of a polycrystalline portion 132. The pad trench insulating film 232 is an example of an insulating film 138. An interlayer insulating film 38 may be provided above the pad trench portion 230 and the front surface 21 of the semiconductor substrate 10. A contact hole 58 may be provided in the interlayer insulating film 38. The first inactive contact portion 134 may include a barrier metal film 1342 provided in the contact hole 58 and a plug portion 1344. The first inactive contact portion 134 may connect the pad electrode 51 provided above the interlayer insulating film 38 to the pad trench conductive portion 234 .

[0310] The pad electrode 51 may be directly connected to the gate metal layer 50. In another example, the pad electrode 51 may not be directly connected to the gate metal layer 50, but may be connected via the pad trench conductive portion 234. In this case, the pad trench conductive portion 234 may be connected to the gate metal layer 50 outside the gate pad 112 in a top view, and may be connected to the gate metal layer 50 in a manner similar to the connection to the pad electrode 51.

[0311] The pad trench conductive portion 234 may be formed in the same manner as the gate conductive portion 44 and / or the dummy conductive portion 34. Alternatively, the pad trench conductive portion 234 may be polycrystalline, which is formed simultaneously with the polycrystalline forming the temperature-sensitive diode portion 183 and is made conductive by ion implantation or the like as necessary. The pad trench insulating film 232 may be formed in the same manner as the gate insulating film 42 and / or the dummy insulating film 32. Alternatively, if the temperature-sensitive portion 180 has a temperature-sensitive trench portion 185, the pad trench insulating film 232 may be formed in the same manner as the trench insulating portion 184. At least a portion of the pad trench portion 230 may extend to the active portion 120 and function as the gate trench portion 40.

[0312] In the depth direction of the semiconductor substrate 10, the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136. In other words, the height position of the upper surface of the pad trench conductive portion 234 provided in the recess region 136 is the same as the height position of the front surface 21 of the semiconductor substrate 10, so that the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 and the height position of the upper surface of the interlayer insulating film 38 in the recess region 136 may be the same.

[0313] When the height position of the upper surface of the interlayer insulating film 38 in the active portion 120 is the same as the height position of the upper surface of the interlayer insulating film 38 in the recess region 136, the active contact portion 124 and the first inactive contact portion 134 can be formed simultaneously by the same etching process. That is, if the upper surfaces of both the interlayer insulating film 38 in the active portion 120 and the interlayer insulating film 38 in the recess region 136 are at the same height from the front surface 21 of the semiconductor substrate 10, there is no deviation in the focus of exposure in the photolithography process. This reduces the dimensional tolerances of the interlayer insulating film 38, the emitter electrode 52, the pad electrode 51, and the like. Furthermore, the active contact portion 124 and the first inactive contact portion 134 can be formed with the same dimensional tolerances. This allows for easier manufacturing with fewer processes than when each contact portion is formed in separate processes.

[0314] Forming the first inactive contact portion 134 and the active contact portion 124 in the same process can suppress the spread of the first inactive contact portion 134, thereby suppressing defects such as a short circuit between the gate and emitter. Furthermore, forming the first inactive contact portion 134 and the active contact portion 124 in the same process and forming the same contact portion allows for good filling of the plug metal in the contact portion. This prevents the plug metal from remaining during etch-back, improving the yield in the manufacture of the semiconductor device 100. Note that the active contact portion 124 and the first inactive contact portion 134 may be formed in different processes.

[0315] In the semiconductor device 100 of this example, the first inactive contact portion 134 has a trench shape. In another example, the first inactive contact portion 134 may have a planar contact shape. That is, Do1=0 may be satisfied. The first inactive contact portion 134 may include a barrier metal film 1342 and a plug portion 1344 provided in the contact hole 58. The barrier metal film 1342 of the first inactive contact portion 134 may contain titanium, a titanium compound, or the like. The plug portion 1344 of the first inactive contact portion 134 may contain a plug metal such as tungsten.

[0316] Although the gate pad 112 has been used in the description of FIG. 16 , the configuration described with respect to the gate pad 112 may also be applied to other pads. For example, it may be used for the anode pad 116, cathode pad 118, sense electrode 114, and / or any pad not shown in FIG. 13A . The pad electrode 51 may be in direct contact with the anode wiring portion 117, cathode wiring portion 119, etc., or may be indirectly connected via the pad trench conductive portion 234. When the pad electrode 51 is the anode pad 116 or the cathode pad 118, the pad trench portion 230 may be the temperature-sensitive trench portion 185. Note that, although the description has been given using an example of an XZ cross section with reference to FIG. 16 , the longitudinal direction of the contact hole 58 and the pad trench portion 230 does not have to be the Y-axis direction. For example, the longitudinal direction of the contact hole 58 and / or the pad trench portion 230 may be the X-axis direction or any other direction, and contact holes 58 and / or pad trench portions 230 with different orientations may be used in combination.

[0317] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0318] For example, although the temperature-sensitive contact portion 188 connecting the temperature-sensitive trench conductive portion 201 of the temperature-sensitive trench portion 185 has been described as having a planar contact shape, it may have a trench contact shape. The temperature-sensitive contact portion 188 and the first inactive contact portion 134 may have planar contact shapes, and the active contact portion 124 may have a trench contact shape. The first inactive contact portion 134 may have a different shape, for example, the edge termination structure 140 and the pad may have different shapes.

[0319] It should be noted that the order of execution of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order.

[0320] 10...Semiconductor substrate, 12...Emitter region, 14...Base region, 15...Contact region, 16...Accumulation region, 17...Well region, 18...Drift region, 20...Buffer region, 21...Front surface, 22...Collector region, 23...Back surface, 24...Collector electrode, 25...Connection portion, 30...Dummy trench portion, 31...Extended portion, 32...Dummy insulating film, 33...Connection portion, 34...Dummy conductive portion, 38...Interlayer insulating film, 40...Gate trench portion, 41...Extended portion, 42...Gate insulating film, 4 3...connection portion, 44...gate conductive portion, 50...gate metal layer, 51...pad electrode, 52...emitter electrode, 54...contact hole, 55...contact hole, 56...contact hole, 57...contact hole, 58...contact hole, 59...contact hole, 70...transistor portion, 71...mesa portion, 80...diode portion, 81...mesa portion, 82...cathode region, 90...boundary portion, 91...mesa portion, 100...semiconductor device, 102...edge, 112...gate pad, 11 4...Sense electrode, 115...Current sense portion, 116...Anode pad, 117...Anode wiring portion, 118...Cathode pad, 119...Cathode wiring portion, 120...Active portion, 122...Active trench portion, 124...Active contact portion, 125...Pad connection portion, 130...Inactive portion, 132...Polycrystalline portion, 134...First inactive contact portion, 135...Second inactive contact portion, 136...Recess region, 137...Non-recess region, 138...Insulating film, 140...Edge termination structure portion, 142...Guardrail ing, 144...field plate, 146...edge metal layer, 148...field insulating film, 151...back surface side lifetime control region, 152...front surface side lifetime control region, 170...zener diode, 180...temperature sensing portion, 181...temperature sensing cathode region, 182...temperature sensing anode region, 183...temperature sensing diode portion, 184...trench insulating portion, 185...temperature sensing trench portion, 186...cathode contact portion, 187...anode contact portion, 188...temperature sensing contact portion, 189...temperature sensing wiring portion,190...transition portion, 191...mesa portion, 194...recess region, 196...insulating film, 201...temperature sensitive trench conductive portion, 230...pad trench portion, 232...pad trench insulating film, 234...pad trench conductive portion, 300...PN junction, 310...short wiring portion, 311...short contact portion, 320...straight portion, 321...curved portion, 1242...barrier metal film, 1244...plug portion, 1342...barrier metal film, 1344...plug portion, 1352...barrier metal film, 1354...plug portion, 1420...non-corner region, 1422...corner region, 1882...barrier metal film, 1884...plug portion,

Claims

1. A semiconductor device including an active portion and a temperature-sensing portion, the temperature sensing unit includes a temperature sensing diode unit, The temperature sensing diode unit is a temperature-sensitive trench portion provided on the front surface side of the semiconductor substrate; a temperature-sensitive trench conductive portion provided inside the temperature-sensitive trench portion; a first conductivity type temperature-sensitive cathode region provided in the temperature-sensitive trench conductive portion; a second conductivity type temperature-sensitive anode region provided in the temperature-sensitive trench conductive portion and in contact with the temperature-sensitive cathode region to form a PN junction; A semiconductor device having a transition portion provided between the temperature-sensitive trench portion and the active portion, through which no main current flows when the semiconductor device is in operation; Semiconductor device.

2. The temperature-sensitive trench conductive portion is filled inside the temperature-sensitive trench portion. The semiconductor device according to claim 1 .

3. The sidewall of the temperature-sensitive anode region is in contact with the sidewall of the temperature-sensitive cathode region. The semiconductor device according to claim 1 .

4. The lower surface of one of the temperature-sensitive anode region and the temperature-sensitive cathode region is in contact with the upper surface of the other of the temperature-sensitive anode region and the temperature-sensitive cathode region. The semiconductor device according to claim 1 .

5. the temperature-sensitive anode region includes a plurality of temperature-sensitive anode regions provided inside the trench of the temperature-sensitive trench portion, the temperature-sensitive cathode region has a plurality of temperature-sensitive cathode regions provided inside the trenches of the temperature-sensitive trench portion, The plurality of temperature-sensitive anode regions and the plurality of temperature-sensitive cathode regions are alternately arranged inside the trenches of the temperature-sensitive trench portion in a direction parallel to the front surface of the semiconductor substrate. The semiconductor device according to claim 1 .

6. The temperature-sensitive trench portion has a trench insulating portion provided on an inner wall of the temperature-sensitive trench conductive portion inside the trench of the temperature-sensitive trench portion. The semiconductor device according to claim 1 .

7. an interlayer insulating film provided above the active section and the temperature sensitive diode section; a temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion; a temperature-sensitive contact portion provided in the interlayer insulating film and electrically connecting the temperature-sensitive wiring portion and the temperature-sensitive trench portion; Equipped with The temperature-sensitive wiring section is an anode wiring portion electrically connected to the temperature-sensitive anode region; a cathode wiring portion electrically connected to the temperature-sensitive cathode region; and The temperature-sensitive contact portion is an anode contact portion provided in the interlayer insulating film and electrically connecting the anode wiring portion and the temperature-sensitive anode region; a cathode contact portion provided in the interlayer insulating film and electrically connecting the cathode wiring portion and the temperature-sensitive cathode region; have The semiconductor device according to claim 1 .

8. the temperature-sensitive trench portion has a plurality of temperature-sensitive trench portions, the anode contact portion includes a plurality of anode contact portions provided corresponding to the plurality of temperature-sensitive trench portions, respectively; the cathode contact portion includes a plurality of cathode contact portions provided corresponding to the plurality of temperature-sensitive trench portions, respectively; the anode wiring portion is provided so as to extend above the plurality of temperature-sensitive trench portions and is electrically connected to the plurality of anode contact portions; The cathode wiring portion is provided so as to extend above the plurality of temperature-sensitive trench portions and is electrically connected to the plurality of cathode contact portions. The semiconductor device according to claim 7 .

9. The temperature-sensitive trench portion has a linear structure connected to the anode contact portion and the cathode contact portion. The semiconductor device according to claim 7 .

10. The temperature-sensitive trench portion has a loop structure in which one end of the temperature-sensitive trench portion is connected to the other end of the temperature-sensitive trench portion. The semiconductor device according to claim 1 .

11. a well region of a second conductivity type provided in the semiconductor substrate; The temperature-sensitive trench portion is provided inside the well region when viewed from above, and at least one of a sidewall and a bottom of the temperature-sensitive trench portion is in contact with the well region. The semiconductor device according to claim 1 .

12. The transition portion has a dummy trench portion provided on the front surface side of the semiconductor substrate. The semiconductor device according to claim 1 .

13. The transition portion includes a well region of a second conductivity type provided in the semiconductor substrate. The semiconductor device according to claim 1 .

14. the active portion has an active trench portion provided on the front surface of the semiconductor substrate, The trench depth of the temperature-sensitive trench portion is the same as the trench depth of the active trench portion. The semiconductor device according to claim 1 .

15. A temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, The longitudinal direction of the temperature-sensitive trench portion is perpendicular to the longitudinal direction of the temperature-sensitive wiring portion. The semiconductor device according to claim 1 .

16. A temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, The longitudinal direction of the temperature-sensitive trench portion is parallel to the longitudinal direction of the temperature-sensitive wiring portion. The semiconductor device according to claim 1 .

17. The active portion has an active trench portion provided on a front surface of the semiconductor substrate, The temperature-sensitive trench portion is adjacent to the active trench portion via one mesa portion. The semiconductor device according to claim 1 .

18. The semiconductor device according to claim 1, further comprising: a first conductivity type drift region provided in the semiconductor substrate; The bottom of the temperature-sensitive trench portion is in contact with the drift region. The semiconductor device according to claim 1 .

19. The semiconductor device according to claim 1, further comprising: a first conductivity type drift region provided in the semiconductor substrate; The sidewall of the temperature-sensitive trench portion is in contact with the drift region. The semiconductor device according to claim 1 .

20. A temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, The temperature-sensitive wiring section is an anode wiring portion electrically connected to the temperature-sensitive anode region; a cathode wiring portion electrically connected to the temperature-sensitive cathode region; and When viewed from above, the PN junction where the temperature-sensitive cathode region and the temperature-sensitive anode region contact is located outside the region sandwiched between the anode wiring portion and the cathode wiring portion. The semiconductor device according to claim 1 .

21. A temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, The temperature-sensitive wiring section is an anode wiring portion electrically connected to the temperature-sensitive anode region; a cathode wiring portion electrically connected to the temperature-sensitive cathode region; and When viewed from above, the PN junction where the temperature-sensitive cathode region and the temperature-sensitive anode region contact is located in a region sandwiched between the anode wiring portion and the cathode wiring portion. The semiconductor device according to claim 1 .

22. The temperature-sensitive trench portion has a loop structure in which one end is connected to the other end, When viewed from above, the PN junction where the temperature-sensitive cathode region and the temperature-sensitive anode region contact is located at a curved portion of the loop structure. The semiconductor device according to claim 1 .

23. A temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, the temperature-sensitive trench portion has a plurality of temperature-sensitive trench portions, The temperature-sensitive wiring portion is positioned across the plurality of temperature-sensitive trench portions. The semiconductor device according to claim 1 .

24. A temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, The temperature-sensitive trench portion perpendicular to the temperature-sensitive wiring portion has a plurality of the PN junctions. The semiconductor device according to claim 1 .

25. A temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, the temperature-sensitive trench portion has a plurality of temperature-sensitive trench portions, The temperature-sensitive wiring portion is located across regions of the same conductivity type provided in different temperature-sensitive trench portions that are spaced apart from each other among the plurality of temperature-sensitive trench portions. The semiconductor device according to claim 1 .

26. A temperature-sensitive wiring portion electrically connected to the temperature-sensitive trench portion, the temperature-sensitive trench portion has a plurality of temperature-sensitive trench portions, The temperature-sensitive wiring section is a short-circuit wiring portion located across the temperature-sensitive cathode region of one of the plurality of temperature-sensitive trench portions and the temperature-sensitive anode region of another of the plurality of temperature-sensitive trench portions so as to connect the temperature-sensitive cathode region of one of the plurality of temperature-sensitive trench portions and the temperature-sensitive anode region of another of the plurality of temperature-sensitive trench portions; have The semiconductor device according to claim 1 .

27. ​​An interlayer insulating film provided above the active section and the temperature sensing section; a second conductivity type well region provided in the semiconductor substrate; Equipped with the temperature-sensitive trench portion is provided inside the well region in a top view, The top surface of the well region is in contact with the interlayer insulating film. The semiconductor device according to claim 1 .

28. an active portion provided on a semiconductor substrate; a temperature sensing portion provided above the semiconductor substrate; an interlayer insulating film provided above the active section and the temperature sensing section; Equipped with The temperature sensing part is a recessed region having a depression on the front surface side of the semiconductor substrate; a temperature sensitive diode portion provided above the semiconductor substrate in the recess region; and In the depth direction of the semiconductor substrate, the height position of the upper surface of the interlayer insulating film in the active portion is the same as the height position of the upper surface of the interlayer insulating film in the recess region. A semiconductor device, a temperature-sensing wiring section electrically connected to the temperature-sensing diode section; a temperature-sensitive contact portion provided in the interlayer insulating film and electrically connecting the temperature-sensitive wiring portion and the temperature-sensitive diode portion; Equipped with The active portion is an active trench portion provided on a front surface of the semiconductor substrate; an active contact portion provided above the semiconductor substrate; and The contact width of the temperature-sensitive contact portion is larger than the contact width of the active contact portion. Semiconductor device.

29. The temperature sensing portion has an insulating film on the upper surface of the semiconductor substrate in the recess region.

29. The semiconductor device according to claim 28.

30. the temperature sensing portion has a temperature sensing contact portion electrically connected to the temperature sensing diode portion, The distance from the lower end of the temperature-sensitive contact portion to the upper surface of the insulating film in the depth direction of the semiconductor substrate is greater than the thickness of the insulating film.

30. The semiconductor device according to claim 29.

31. the temperature sensing portion has a temperature sensing contact portion electrically connected to the temperature sensing diode portion, In the depth direction of the semiconductor substrate, the distance from the front surface of the semiconductor substrate to the lower end of the temperature-sensitive contact portion is greater than the distance from the lower end of the temperature-sensitive contact portion to the upper surface of the insulating film.

30. The semiconductor device according to claim 29.

32. the temperature sensing portion has a temperature sensing contact portion electrically connected to the temperature sensing diode portion, In the depth direction of the semiconductor substrate, the distance from the front surface of the semiconductor substrate to the lower end of the temperature-sensitive contact portion is smaller than the distance from the lower end of the temperature-sensitive contact portion to the upper surface of the insulating film.

30. The semiconductor device according to claim 29.

33. A method of manufacturing a semiconductor device, comprising the steps of forming an active portion and a temperature-sensing portion, The step of forming the temperature sensing portion includes: forming a temperature-sensitive trench portion on a front surface side of a semiconductor substrate; forming a temperature-sensitive trench conductive portion within the temperature-sensitive trench portion; forming a temperature-sensitive anode region in the temperature-sensitive trench conductive portion; forming a temperature-sensitive cathode region in contact with the temperature-sensitive anode region in the temperature-sensitive trench conductive portion; and The step of forming the active portion includes the step of providing an active contact portion in an interlayer insulating film provided above the semiconductor substrate, forming the temperature-sensitive portion includes providing a temperature-sensitive contact portion in the interlayer insulating film; A method for manufacturing a semiconductor device, wherein the active contact portion and the temperature-sensitive contact portion are simultaneously formed by the same etching process.

34. The step of forming the active portion includes forming a trench of an active trench portion on a front surface side of the semiconductor substrate, The trenches of the temperature-sensitive trench portion and the trenches of the active trench portion are simultaneously formed by the same etching process. The method for manufacturing a semiconductor device according to claim 33.

35. A semiconductor device having an active portion and an inactive portion, an interlayer insulating film provided above the active portion and the non-active portion; The inactive portion is a recessed region having a depression on the front surface side of the semiconductor substrate; a polycrystalline portion provided above the semiconductor substrate in the recess region; a first inactive contact portion provided in the interlayer insulating film above the recess region and electrically connected to the polycrystalline portion; and In the depth direction of the semiconductor substrate, the height position of the upper surface of the interlayer insulating film in the active portion is the same as the height position of the upper surface of the interlayer insulating film in the recess region. A semiconductor device, a gate trench portion provided on the front surface of the semiconductor substrate and having a gate conductive portion; a gate metal layer disposed above the semiconductor substrate; Equipped with the first inactive contact portion electrically connects the gate metal layer and the polycrystalline portion; The polycrystalline portion is connected to the gate conductive portion. Semiconductor device.

36. The polycrystalline portion extends to the outside of the recess region, The gate trench portion is disposed outside the recess region.

36. The semiconductor device according to claim 35.

37. A semiconductor device having an active portion and an inactive portion, an interlayer insulating film provided above the active portion and the non-active portion; The inactive portion is a recessed region having a depression on the front surface side of the semiconductor substrate; a polycrystalline portion provided above the semiconductor substrate in the recess region; a first inactive contact portion provided in the interlayer insulating film above the recess region and electrically connected to the polycrystalline portion; and In the depth direction of the semiconductor substrate, the height position of the upper surface of the interlayer insulating film in the active portion is the same as the height position of the upper surface of the interlayer insulating film in the recess region. A semiconductor device, a dummy trench portion provided on the front surface of the semiconductor substrate and having a dummy conductive portion; an emitter electrode provided above the semiconductor substrate; Equipped with the first inactive contact portion electrically connects the emitter electrode and the polycrystalline portion; The polycrystalline portion is connected to the dummy conductive portion. Semiconductor device.

38. The polycrystalline portion extends to the outside of the recess region, The dummy trench portion is provided outside the recess region.

38. The semiconductor device according to claim 37.

39. A semiconductor device having an active portion and an inactive portion, an interlayer insulating film provided above the active portion and the non-active portion; The inactive portion is a recessed region having a depression on the front surface side of the semiconductor substrate; a polycrystalline portion provided above the semiconductor substrate in the recess region; a first inactive contact portion provided in the interlayer insulating film above the recess region and electrically connected to the polycrystalline portion; and In the depth direction of the semiconductor substrate, the height position of the upper surface of the interlayer insulating film in the active portion is the same as the height position of the upper surface of the interlayer insulating film in the recess region. A semiconductor device, a second conductivity type guard ring provided on the front surface of the semiconductor substrate between the active portion and an edge of the semiconductor substrate; an edge metal layer disposed above the semiconductor substrate; Equipped with the inactive portion has a second inactive contact portion provided in the interlayer insulating film outside the recess region and electrically connecting the edge metal layer and the guard ring; The first inactive contact portion electrically connects the edge metal layer and the polycrystalline portion. Semiconductor device.

40. In the depth direction of the semiconductor substrate, the distance from the position where the first inactive contact portion and the edge metal layer contact to the lower end of the first inactive contact portion is equal to the distance from the position where the second inactive contact portion and the edge metal layer contact to the lower end of the second inactive contact portion.

40. The semiconductor device of claim 39.

41. The first inactive contact portion is provided above a corner region of the guard ring.

40. The semiconductor device of claim 39.

42. A semiconductor device having an active portion and an inactive portion, an interlayer insulating film provided above the active portion and the non-active portion; The inactive portion is a recessed region having a depression on the front surface side of the semiconductor substrate; a polycrystalline portion provided above the semiconductor substrate in the recess region; a first inactive contact portion provided in the interlayer insulating film above the recess region and electrically connected to the polycrystalline portion; and In the depth direction of the semiconductor substrate, the height position of the upper surface of the interlayer insulating film in the active portion is the same as the height position of the upper surface of the interlayer insulating film in the recess region. A semiconductor device, a pad electrode provided above the semiconductor substrate above the polycrystalline portion; The first inactive contact portion electrically connects the pad electrode and the polycrystalline portion. Semiconductor device.

43. the inactive portion has an insulating film on the upper surface of the semiconductor substrate in the recess region; The distance from the lower end of the first inactive contact portion to the upper surface of the insulating film in the depth direction of the semiconductor substrate is greater than the thickness of the insulating film.

43. The semiconductor device according to any one of claims 35 to 42.

44. the inactive portion has an insulating film on the upper surface of the semiconductor substrate in the recess region; In the depth direction of the semiconductor substrate, the distance from the front surface of the semiconductor substrate to the lower end of the first inactive contact portion is greater than the distance from the lower end of the first inactive contact portion to the upper surface of the insulating film.

43. The semiconductor device according to any one of claims 35 to 42.

45. the inactive portion has an insulating film on the upper surface of the semiconductor substrate in the recess region; In the depth direction of the semiconductor substrate, the distance from the front surface of the semiconductor substrate to the lower end of the first inactive contact portion is smaller than the distance from the lower end of the first inactive contact portion to the upper surface of the insulating film.

43. The semiconductor device according to any one of claims 35 to 42.