Electronic module, electronic device, and method for producing electronic module

Abstract

The present invention maintains insulating properties between electroconductive plates.　According to the present invention, a semiconductor device is equipped with: a first electroconductive plate (22a), which comprises copper or a copper alloy as a main component; a second electroconductive plate (23a), which has a second back surface (23a7) facing the first electroconductive plate (22a) and a side surface connected to the second back surface (23a7) and comprises copper or a copper alloy as a main component; and a second oxide film (23b), which is provided on the second back surface (23a7) and side surface of the second electroconductive plate (23a), has electrical insulating properties, and includes an oxide of a metal element differing from the metal(s) of the second electroconductive plate (23a). A first oxide film (22b) and the second oxide film (23b) are used as insulating members between a first wiring part (22a2) of the first electroconductive plate (22a) and a second wiring part (23a2) of the second electroconductive plate (23a).

Description

Electronic module, electronic device, and method for manufacturing electronic module

[0001] The present invention relates to an electronic module, an electronic device, and a method for manufacturing an electronic module.

[0002] The semiconductor device includes a semiconductor module and a capacitor. The semiconductor module includes an N-type power terminal and a P-type power terminal disposed on the N-type power terminal with an insulating member sandwiched therebetween, with one end of the N-type power terminal exposed. The capacitor includes an N-type connection terminal connected to one end of the N-type power terminal, and a P-type connection terminal disposed on the N-type connection terminal with an insulating member sandwiched therebetween. The P-type connection terminal and the P-type power terminal are connected by a coupling member (see, for example, Patent Document 1).

[0003] As an insulating member, an aluminum oxide film may be formed on the surface of a metal plate in a substrate within a power module. The aluminum oxide film is formed by anodizing (see, for example, Patent Documents 2 to 4). Furthermore, a clad material may be used for an electric circuit board, in which a copper layer and an aluminum layer are formed on the opposite side of the copper layer by rolled cladding (see, for example, Non-Patent Document 1). When using such a clad material, an insulating layer is formed on the front side of the aluminum layer by anodizing. The insulating layer is bonded to a metal layer forming a cooling body via an adhesive layer (see, for example, Patent Document 5).

[0004] When an oxalic acid aqueous solution is used as the electrolyte for forming an insulating layer of a semiconductor device by anodization, the breakdown voltage at a film thickness of 20 μm is approximately 1 kV when the film is not sealed and approximately 1.3 kV when the film is sealed (see, for example, Non-Patent Document 2).

[0005] JP 2021-106235 A JP 2013-80924 A JP 2012-99782 A JP 2012-99779 A JP 2018-533197 A

[0006] Bimetal Japan Co., Ltd., "What is clad material?", Internet <URL: www.bimetal.co.jp / clad.html> Ken Asafuji, Takehiko Muranaka, Masatake Maejima, "Voltage endurance of aluminum alloy anodic oxide film", Yamaguchi Prefectural Industrial Technology Center Research Report, No. 33, pp. 12-16, 2021

[0007] An object of the present invention is to provide an electronic module, an electronic device, and a method for manufacturing an electronic module in which insulation between conductive plates is maintained.

[0008] According to one aspect of the present invention, there is provided an electronic module comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate primarily composed of copper or a copper alloy, having a main surface facing the first conductive plate and a side surface continuous with the main surface; and a metal oxide layer provided on the main surface and the side surface of the second conductive plate, which is electrically insulating and contains a metal oxide of an element different from the metal of the second conductive plate.

[0009] Furthermore, the first conductive plate may have a main surface facing the second conductive plate and a side surface continuous from the main surface, and may be provided with a metal oxide layer provided on the main surface and the side surface of the first conductive plate, which is electrically insulating and contains a metal oxide of an element different from the metal of the first conductive plate.

[0010] The conductive plate may also include a third conductive plate having a main surface facing the second conductive plate and a side surface continuous from the main surface and containing copper or a copper alloy as its main component, and a metal oxide layer provided on the main surface and the side surface of the third conductive plate, which is electrically insulating and contains a metal oxide of an element different from the metal of the third conductive plate.

[0011] The metal oxide layer provided on the main surface and the side surface of each of the first, second, or third conductive plates may include aluminum oxide, and the thickness of the metal oxide layer provided on the main surface and the side surface of each of the first, second, or third conductive plates may be 20 μm or more.

[0012] The first conductive plate may have a first bonding region at an end portion extending outward beyond the second conductive plate, where the surface of the first conductive plate is exposed at the end portion, and the main surface of the second conductive plate may have a second bonding region at an opposite main surface, where the second conductive plate has a metal oxide layer that is electrically insulating and contains a metal oxide of an element different from the metal of the second conductive plate, where the surface of the second conductive plate is exposed.

[0013] The third conductive plate may also have a third bonding region provided on another main surface opposite to the main surface thereof, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the third conductive plate, and the surface of the third conductive plate being exposed.

[0014] The bus bar may further include a bus bar including the first conductive plate having a first external connection portion at an end thereof and the second conductive plate having a second external connection portion at an end thereof, the bus bar having a plurality of insertion holes in the stacked first conductive plate and the second conductive plate into which a plurality of external connection terminals are inserted, and a sealing member that seals the first conductive plate and the second conductive plate except for the plurality of insertion holes, the first external connection portion, and the second external connection portion.

[0015] According to another aspect of the present invention, there is provided an electronic module comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate having a main surface facing the first conductive plate and primarily composed of copper or a copper alloy; and a metal oxide layer provided on the main surface of the second conductive plate, which is electrically insulating and contains a metal oxide of an element different from the metal of the second conductive plate.

[0016] According to another aspect of the present invention, there is provided an electronic device comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate primarily composed of copper or a copper alloy, having a main surface facing the first conductive plate, a side surface continuing from the main surface, and another main surface opposite the main surface; a first electronic module comprising a metal oxide layer provided on the main surface, the side surface, and the other main surface of the second conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the second conductive plate; and a fourth conductive plate primarily composed of copper or a copper alloy and joined to the second conductive plate, wherein the joint between the second conductive plate and the fourth conductive plate includes a weld mark penetrating the metal oxide layer.

[0017] The first conductive plate may have a main surface facing the second conductive plate, a side surface continuing from the main surface, and another main surface opposite the main surface, and may further include a fifth conductive plate joined to the first conductive plate, the fifth conductive plate having a metal oxide layer provided on the main surface, the side surface, and the other main surface of the first conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the first conductive plate, and the fifth conductive plate being composed mainly of copper or a copper alloy, and the joint between the first conductive plate and the fifth conductive plate may include a weld mark penetrating the metal oxide layer.

[0018] According to another aspect of the present invention, there is provided an electronic device comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate primarily composed of copper or a copper alloy, having a main surface facing the first conductive plate, a side surface continuing from the main surface, and another main surface opposite the main surface; a first electronic module comprising a metal oxide layer provided on the main surface, the side surface, and the other main surface of the second conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the second conductive plate; and a fourth conductive plate primarily composed of copper or a copper alloy and bonded to the second conductive plate, wherein the bonded portion between the second conductive plate and the fourth conductive plate includes a weld mark passing through an open area of ​​the metal oxide layer provided on the other main surface of the second conductive plate.

[0019] The first conductive plate may have a main surface facing the second conductive plate, a side surface continuous with the main surface, and another main surface opposite the main surface, and may further include a fifth conductive plate joined to the first conductive plate, the fifth conductive plate comprising an electrically insulating metal oxide layer provided on the main surface, the side surface, and the other main surface, the metal oxide layer containing a metal oxide of an element different from the metal of the first conductive plate, the fifth conductive plate being primarily composed of copper or a copper alloy, and the joint between the first conductive plate and the fifth conductive plate may include a welding mark passing through an open region of the metal oxide layer provided on the main surface of the first conductive plate.

[0020] According to another aspect of the present invention, there is provided an electronic device comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate having a main surface facing the first conductive plate and another main surface opposite to the main surface and primarily composed of copper or a copper alloy; a second electronic module comprising a metal oxide layer provided on the main surface and the other main surface of the second conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the second conductive plate; and a fourth conductive plate primarily composed of copper or a copper alloy and joined to the second conductive plate, wherein the joint between the second conductive plate and the fourth conductive plate includes a weld mark penetrating the metal oxide layer.

[0021] According to another aspect of the present invention, there is provided an electronic device comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate having a main surface facing the first conductive plate and another main surface opposite to the first main surface and primarily composed of copper or a copper alloy; a second electronic module comprising a metal oxide layer provided on the main surface and the other main surface of the second conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the second conductive plate; and a fourth conductive plate primarily composed of copper or a copper alloy and bonded to the second conductive plate, wherein the bonded portion between the second conductive plate and the fourth conductive plate includes a welding mark passing through an opening region of the metal oxide layer provided on the other main surface of the second conductive plate.

[0022] According to another aspect of the present invention, there is provided a method for manufacturing an electronic module, the method including: preparing a first conductive plate primarily made of copper or a copper alloy; and preparing a second conductive plate primarily made of copper or a copper alloy, the second conductive plate having a main surface facing the first conductive plate and a side surface continuous with the main surface; forming a coating layer on the main surface and the side surface of the second conductive plate, the coating layer containing an element different from the metal of the first conductive plate; and oxidizing the coating layer to form an electrically insulating metal oxide layer. The oxidation step may be performed by anodizing. The element different from the metal of the second conductive plate may be aluminum.

[0023] According to another aspect of the present invention, there is provided a method for manufacturing an electronic module, including: a first preparation step of preparing a first terminal in which the upper and lower surfaces of a first conductive plate made primarily of copper or a copper alloy are covered with an electrically insulating coating layer containing an element different from the metal of the first conductive plate; a second preparation step of preparing a second terminal in which the upper and lower surfaces of a second conductive plate made primarily of copper or a copper alloy are covered with an electrically insulating coating layer containing an element different from the metal of the first conductive plate; a step of stacking the first terminal and the second terminal; and a step of fixing the first terminal and the second terminal in a resin case.

[0024] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions.

[0025] The disclosed technique maintains insulation between the conductive plates. These and other objects, features, and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings illustrating preferred embodiments of the invention by way of example.

[0026] It is a plan view of the semiconductor module of the first embodiment. It is a plan view of the semiconductor unit of the first embodiment. It is a cross-sectional view of the semiconductor unit of the first embodiment. It is a plan view of the terminal stacking portion of the first embodiment. It is a plan view of the first terminal included in the terminal stacking portion of the first embodiment. It is a plan view of the second terminal included in the terminal stacking portion of the first embodiment. It is a cross-sectional view of the terminal stacking portion of the first embodiment. It is a cross-sectional view of the terminal stacking portion from which the bonding region of the first embodiment is removed. It is a flowchart showing a method for manufacturing a case included in the semiconductor module of the first embodiment. It is a diagram for explaining a coating process included in the method for manufacturing a case of the first embodiment. It is a diagram for explaining an oxidation process included in the method for manufacturing a case of the first embodiment. It is a flowchart showing a method for manufacturing a case included in the semiconductor module of Modification 1-1 of the first embodiment. It is a diagram for explaining a preparation process included in the semiconductor module of Modification 1-1 of the first embodiment. It is a diagram for explaining a terminal forming process and an oxidation process included in the semiconductor module of Modification 1-1 of the first embodiment. It is a cross-sectional view of the terminal stacking portion of Modification 1-1 of the first embodiment. It is a cross-sectional view of the terminal stacking portion from which the bonding region of Modification 1-1 of the first embodiment is removed. It is a perspective view of the semiconductor device of the second embodiment. It is a perspective view of the capacitor of the second embodiment. It is a cross-sectional view of the capacitor and the semiconductor module included in the semiconductor device of the second embodiment. It is a perspective view of the semiconductor module of the third embodiment. It is a cross-sectional view of the semiconductor module of the third embodiment. It is a plan view of the semiconductor module of the third embodiment. It is a plan view of the first terminal and the second terminal of the third embodiment. It is a cross-sectional view of the first terminal and the second terminal of the third embodiment. It is a cross-sectional view of the first terminal and the second terminal of the third embodiment. It is a cross-sectional view of the first terminal and the second terminal of Modification 3-1 of the third embodiment. It is a cross-sectional view of the first terminal, the second terminal, and the third terminal of Modification 3-2 of the third embodiment. It is a cross-sectional view of the first terminal, the second terminal, and the third terminal of Modification 3-3 of the third embodiment. It is a side view of the semiconductor device of the fourth embodiment. It is a plan view of the semiconductor device of the fourth embodiment. It is a cross-sectional view of the semiconductor module of the fourth embodiment. It is a plan view of the bus bar of the fourth embodiment.10A and 10B are a first cross-sectional view and a second cross-sectional view of a bus bar according to a fourth embodiment of the present invention;

[0027] Hereinafter, embodiments will be described with reference to the drawings. In the following description, the terms "front surface" and "upper surface" refer to the X-Y plane facing upward (+Z direction) in the semiconductor device 1 of FIG. 1. Similarly, "up" refers to the upward direction (+Z direction) in the semiconductor device 1 of FIG. 1. The terms "back surface" and "lower surface" refer to the X-Y plane facing downward (-Z direction) in the semiconductor device 1 of FIG. 1. Similarly, the term "lower" refers to the downward direction (-Z direction) in the semiconductor device 1 of FIG. 1. Similar orientations will be used in other drawings as necessary. The term "high position" refers to the upper side (+Z side) in the semiconductor device 1 of FIG. 1. Similarly, the term "lower position" refers to the lower side (-Z side) in the semiconductor device 1 of FIG. 1. The terms "front surface," "upper surface," "upper," "back surface," "lower surface," "lower," and "side" are merely convenient expressions for specifying relative positional relationships and do not limit the technical concept of the present invention. For example, "up" and "down" do not necessarily refer to the vertical direction relative to the ground. In other words, the "up" and "down" directions are not limited to the direction of gravity. In the following description, "main component" refers to a component that is contained in an amount of 80 vol% or more.

[0028] First Embodiment A semiconductor module included in a semiconductor device according to a first embodiment will be described with reference to Fig. 1. Fig. 1 is a plan view of the semiconductor module according to the first embodiment.

[0029] The semiconductor module 2 includes a semiconductor unit (not shown), a heat sink (see FIG. 3) on which the semiconductor unit is disposed, and a case 20 that is disposed on the heat sink and stores the semiconductor unit. The semiconductor unit will be described later with reference to FIGS. 2 and 3.

[0030] The case 20 includes a frame portion 21, a terminal stack portion 24, a U terminal 26a, a V terminal 26b, a W terminal 26c, and control terminals 25a, 25b, and 25c. The frame portion 21 has a generally rectangular shape in a plan view and is surrounded on all four sides by first to fourth side portions 21a to 21d. The front surface of the frame portion 21 includes storage areas 21e1, 21e2, and 21e3 that are provided in order along the first side portion 21a and the third side portion 21c.

[0031] The storage areas 21e1, 21e2, and 21e3 are spaces partitioned by the control terminals 25a and 25b on the front surface of the frame 21 in a plan view, and are provided along the longitudinal direction (first and third side portions 21a and 21c) of the frame 21. The storage areas 21e1, 21e2, and 21e3 each house the semiconductor units described above. Within the storage areas 21e1, 21e2, and 21e3, the semiconductor units are electrically connected to the first terminal 22 and the second terminal 23, the U terminal 26a, the V terminal 26b, and the W terminal 26c, which are included in a terminal stack portion described below. Although not shown, the semiconductor units are electrically connected to the control terminals 25a, 25b, and 25c by wires.

[0032] Once the semiconductor units are stored in the storage areas 21e1, 21e2, and 21e3, they are sealed with a sealing member 36, as shown in FIG. 1. The sealing member 36 contains a thermosetting resin and a filler contained in the thermosetting resin. The thermosetting resin is, for example, an epoxy resin, a phenolic resin, or a maleimide resin. The filler is, for example, silicon oxide, aluminum oxide, boron nitride, or aluminum nitride.

[0033] The frame 21 is formed by injection molding using a thermoplastic resin, including three sets of terminal stacks 24, a U terminal 26a, a V terminal 26b, a W terminal 26c, and control terminals 25a, 25b, and 25c. Alternatively, the control terminals 25a, 25b, and 25c may be formed separately from the frame 21 by injection molding using a thermosetting resin. The control terminals 25a, 25b, and 25c integrally molded from resin in this manner may be attached to openings in the front surface of the frame 21 to form the storage areas 21e1, 21e2, and 21e3. The control terminals 25a, 25b, and 25c are attached to the +Y-direction side of the storage areas 21e1, 21e2, and 21e3, respectively, parallel to the short sides of the case 20 (the second and fourth sides 21b and 21d). The thermoplastic resin may be, for example, polyphenylene sulfide (PPS) resin, polybutylene terephthalate (PBT) resin, polybutylene succinate (PBS) resin, polyamide (PA) resin, or acrylonitrile butadiene styrene (ABS) resin. Note that the storage areas 21e1, 21e2, and 21e3 will be referred to as the storage area 21e unless otherwise specified.

[0034] Three sets of terminal stacking portions 24 are provided along the longitudinal direction (first side portion 21a) of frame portion 21, exposed on first side portion 21a corresponding to storage areas 21e1, 21e2, and 21e3, respectively. Each terminal stacking portion 24 includes a first terminal 22 and a second terminal 23 stacked on first terminal 22, with one end of the front surface of first terminal 22 exposed.

[0035] The front surface of one end of the first terminal 22 is exposed from the first side portion 21 a facing upward (in the +Z direction), and the other end of the first terminal 22 is electrically connected to a location inside the storage region 21 e of the case 20 that corresponds to the negative electrode of the semiconductor chip of the semiconductor unit.

[0036] The second terminal 23 is disposed on the first terminal 22 with one end of the first terminal 22 exposed. The front surface of one end of the second terminal 23 is exposed from the first side portion 21 a and faces upward (in the +Z direction). The other end of the second terminal 23 is electrically connected to a location inside the storage region 21 e of the case 20 that corresponds to the positive electrode of the semiconductor chip.

[0037] The first terminal 22 and the second terminal 23 are made of a metal with excellent conductivity. Such a metal is, for example, copper or a copper alloy. An oxide film is formed on the surface of each of the first terminal 22 and the second terminal 23. This maintains the insulation properties of the first terminal 22 and the second terminal 23. Details of this terminal laminate portion 24 will be described later.

[0038] One end of each of the control terminals 25a, 25b, and 25c extends upward (in the +Z direction) of the semiconductor module 2. The other end of each of the control terminals 25a, 25b, and 25c is electrically connected to the control electrodes of the semiconductor chips of the respective semiconductor units in the storage areas 21e1, 21e2, and 21e3. The control terminals 25a, 25b, and 25c are made of a metal with excellent conductivity. Examples of such metals include copper, copper alloys, aluminum, and aluminum alloys. The control terminals 25a, 25b, and 25c may be plated to improve their corrosion resistance. Examples of plating materials used in this case include nickel, nickel-phosphorus alloys, and nickel-boron alloys.

[0039] The U terminal 26a, the V terminal 26b, and the W terminal 26c are exposed on the third side 21c along the longitudinal direction of the frame 21, corresponding to the storage areas 21e1, 21e2, and 21e3, respectively. The front surfaces of one end of the U terminal 26a, the V terminal 26b, and the W terminal 26c are exposed upward (in the +Z direction) from the third side 21c. The other end of the U terminal 26a, the V terminal 26b, and the W terminal 26c are electrically connected to locations corresponding to the output electrodes of the semiconductor chips of the semiconductor units in the storage areas 21e1, 21e2, and 21e3, respectively. The U terminal 26a, the V terminal 26b, and the W terminal 26c are made of a metal with excellent conductivity. Such a metal is, for example, copper or a copper alloy. The U terminal 26a, the V terminal 26b, and the W terminal 26c may be plated to improve their corrosion resistance. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0040] Next, the semiconductor unit included in the semiconductor module 2 will be described with reference to FIGS. 2 and 3. FIG. 2 is a plan view of the semiconductor unit according to the first embodiment. FIG. 3 is a cross-sectional view of the semiconductor unit according to the first embodiment. FIG. 3 is a cross-sectional view taken along the dashed dotted line Y-Y in FIG. 2.

[0041] 3, the semiconductor unit 3 is disposed on the heat sink 37 via a bonding member (not shown). The case 20 is disposed on the heat sink 37 via an adhesive, and the semiconductor units 3 are housed in the housing regions 21e1, 21e2, and 21e3 of the case 20. Such a semiconductor unit 3 includes an insulating circuit board 30, semiconductor chips 34a to 34d, and lead frames 35a to 35d.

[0042] The joining material used to join the heat sink 37 and the semiconductor unit 3 (insulated circuit board 30) is solder or a sintered material. Lead-free solder or leaded solder is used as the solder. Lead-free solder is primarily composed of an alloy containing at least two of tin, silver, copper, zinc, antimony, indium, and bismuth, for example. The solder may also contain additives, such as nickel, germanium, cobalt, or silicon. The addition of additives to the solder improves its wettability, gloss, and bonding strength, thereby improving reliability. Leaded solder also contains lead. The sintered material is, for example, a metal material containing at least one of copper, a copper alloy, nickel, a nickel alloy, silver, and a silver alloy.

[0043] Insulated circuit board 30 is rectangular in plan view. Insulated circuit board 30 has an insulating plate 31, a metal plate 33 formed on the back surface of insulating plate 31, and multiple wiring boards 32a-32i formed on the front surface of insulating plate 31. The outer shapes of multiple wiring boards 32a-32i and metal plate 33 are smaller than the outer shape of insulating plate 31 in plan view, and are formed inside insulating plate 31. Note that the shapes, number, and sizes of multiple wiring boards 32a-32i are merely examples.

[0044] The insulating plate 31 has a rectangular shape in a plan view. The corners of the insulating plate 31 may be chamfered. For example, the corners may be C-chamfered or R-chamfered. The insulating plate 31 is surrounded on all four sides by long sides 31a, short sides 31b, long sides 31c, and short sides 31d, which form the outer periphery. Such an insulating plate 31 is made of ceramics with good thermal conductivity. The ceramics may be made of a material containing aluminum oxide, aluminum nitride, or silicon nitride as its main component, for example.

[0045] The metal plate 33 has a rectangular shape in a plan view. The corners may be, for example, C-chamfered or R-chamfered. The metal plate 33 is smaller than the insulating plate 31 and is formed on the entire back surface of the insulating plate 31 except for the edges. The metal plate 33 is mainly composed of a metal with excellent thermal conductivity. The metal is, for example, copper, aluminum, or an alloy containing at least one of these. A plating process may be performed to improve the corrosion resistance of the metal plate. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0046] The wiring boards 32a to 32i are formed over the entire surface of the insulating plate 31, excluding the edges. Preferably, in a plan view, the ends of the wiring boards 32a to 32f that face the outer periphery of the insulating plate 31 overlap the outer periphery of the metal plate 33. This maintains a stress balance between the insulating circuit board 30 and the metal plate 33 on the back surface of the insulating plate 31. Damage to the insulating plate 31, such as excessive warping or cracking, is suppressed. The wiring boards 32a to 32i are made of a metal with excellent conductivity. Examples of such metals include copper, aluminum, or an alloy containing at least one of these. Furthermore, the surfaces of the wiring boards 32a to 32i may be plated to improve corrosion resistance. Examples of plating materials used in this case include nickel, a nickel-phosphorus alloy, and a nickel-boron alloy.

[0047] Wiring board 32a is formed on the long side 31a of insulating plate 31, along long side 31a, from short side 31b to short side 31d. A recess is formed on the downward (-X direction) long side 31c side of wiring board 32a. Wiring board 32b is substantially symmetrical with wiring board 32a about the center line in the ±Y directions. Wiring board 32b is formed on the long side 31c of insulating plate 31, along long side 31c, from short side 31b to short side 31d. A recess is formed on the downward (-X direction) long side of wiring board 32b.

[0048] Wiring board 32c is disposed in a region surrounded by the lower part (-X direction) of wiring board 32a, the lower part (-X direction) of wiring board 32e, short side 31d, and wiring board 32e. That is, wiring board 32c is substantially L-shaped. Wiring board 32d is substantially symmetrical with wiring board 32c about the center line in the ±Y directions. Wiring board 32d is disposed in a region surrounded by the lower part (-X direction) of wiring board 32b, wiring board 32f, short side 31d, and wiring board 32f. That is, wiring board 32d is substantially L-shaped.

[0049] Wiring board 32e is adjacent to wiring board 32a and extends from short side 31b along long side 31a in the -X direction. The -X direction end of wiring board 32e is spaced from short side 31d. The side of the top (+X direction) of wiring board 32e on the side of long side 31c is recessed partway. Wiring board 32f is substantially symmetrical with wiring board 32e about the center line in the ±Y directions. Wiring board 32f is adjacent to the top (+X direction) of wiring board 32b and extends from short side 31b along long side 31c in the -X direction. The -X direction end of wiring board 32f is spaced from short side 31d. The side of the top (+X direction) of wiring board 32f on the side of long side 31a is recessed partway.

[0050] Wiring board 32g is I-shaped in plan view and is disposed between wiring boards 32e and 32f along long sides 31a and 31c. Wiring board 32h is I-shaped in plan view and is disposed on the wiring board 32e side in the region surrounded by the recesses of wiring boards 32e and 32f, along long side 31a. Wiring board 32i is L-shaped in plan view and is disposed on the wiring board 32f side in the region surrounded by the recesses of wiring boards 32e and 32f, along long side 31c. Wiring board 32i is disposed so as to surround the long side 31c and short side 31d of wiring board 32h.

[0051] Furthermore, second connection portion 23a1 of second terminal 23 is joined to the lower ends (-X direction) of wiring boards 32a and 32b of insulating circuit board 30. First connection portion 22a1 of first terminal 22 is joined to the lower ends (-X direction) of wiring boards 32c and 32d of insulating circuit board 30. Joints between U terminal 26a, V terminal 26b, and W terminal 26c are joined to the upper ends (+X direction) of wiring boards 32e and 32f of insulating circuit board 30. Note that FIG. 2 illustrates an example in which U terminal 26a is joined to wiring boards 32e and 32f.

[0052] For example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazed) substrate may be used as the insulating circuit board 30 having such a configuration. The insulating circuit board 30 dissipates heat generated in semiconductor chips 34a to 34d (described later) by conducting it to the back side of the insulating circuit board 30 via wiring boards 32a, 32b, 32e, and 32f, insulating plate 31, and metal plate 33.

[0053] The semiconductor chips 34a to 34d are power devices made of silicon carbide. An example of such a power device is a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor). In this power MOSFET, the body diode functions as a FWD (Free Wheeling Diode). Each of the semiconductor chips 34a to 34d has a drain electrode as an input electrode (main electrode) on the back surface, and a gate electrode as a control electrode and a source electrode as an output electrode (main electrode) on the front surface.

[0054] The semiconductor chips 34a to 34d may also be power devices made of silicon. In this case, for example, a reverse conducting (RC)-IGBT (insulated gate bipolar transistor) is used as the power device. The RC-IGBT is a device in which an IGBT, which is a switching element, and an FWD, which is a diode element, are integrated into a single chip. Each of the semiconductor chips 34a to 34d has, for example, a collector electrode as an input electrode (main electrode) on the back surface, a gate electrode as a control electrode, and an emitter electrode as an output electrode (main electrode) on the front surface.

[0055] In this embodiment, multiple semiconductor chips 34a to 34d are arranged on each of wiring boards 32a, 32b, 32e, and 32f via the aforementioned bonding members. Figure 2 shows a case where two chips are arranged on each of wiring boards 32a, 32b, 32e, and 32f. In this case, semiconductor chips 34a to 34d are arranged so that their control electrodes face each other.

[0056] The lead frames 35a to 35d electrically connect the output electrodes on the front surfaces of the semiconductor chips 34a to 34d to the wiring boards 32e, 32f, 32c, and 32d. The lead frame 35a electrically and mechanically connects the semiconductor chip 34a to the wiring board 32e. The lead frame 35b electrically and mechanically connects the semiconductor chip 34b to the wiring board 32f. The lead frame 35c electrically and mechanically connects the semiconductor chip 34c to the wiring board 32c. The lead frame 35d electrically and mechanically connects the semiconductor chip 34d to the wiring board 32d.

[0057] One end of the lead frames 35a to 35d is joined to the output electrodes of the semiconductor chips 34a to 34d using the solder described above as a joining material. The other end of the lead frames 35a to 35d is joined to the wiring boards 32e, 32f, 32c, and 32d using the joining material described above. Alternatively, joining may be performed using ultrasonic or laser welding. The lead frames 35a to 35d are made of a material with excellent conductivity. Examples of such materials include copper, aluminum, or an alloy containing at least one of these. Furthermore, the surfaces of the lead frames 35a to 35d may be plated to improve corrosion resistance. In this case, the plating material may be, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0058] The heat sink 37 has a rectangular shape in a plan view, and corresponds to the outline of the rear surface of the case 20. The semiconductor units 3 are joined to the front surface of the heat sink 37 along the longitudinal direction with respective joining members. The heat sink 37 is mainly composed of a metal with excellent thermal conductivity. The metal is, for example, copper, aluminum, or an alloy containing at least one of these. A plating process may be performed to improve the corrosion resistance of the metal plate. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0059] Next, details of the terminal laminate 24 will be described with reference to FIGS. 4 to 8. FIG. 4 is a plan view of the terminal laminate of the first embodiment. FIG. 5 is a plan view of a first terminal included in the terminal laminate of the first embodiment, and FIG. 6 is a plan view of a second terminal included in the terminal laminate of the first embodiment. FIG. 7 is a cross-sectional view of the terminal laminate of the first embodiment, and FIG. 8 is a cross-sectional view of the terminal laminate of the first embodiment from which the bonding region has been removed. Note that FIGS. 7 and 8 show cross-sectional views taken along the dashed line Y-Y in FIG. 4.

[0060] As shown in Fig. 4, the terminal laminate 24 includes a first terminal 22 and a second terminal 23. In the terminal laminate 24, as shown in Fig. 7, a flat-plate-shaped second terminal 23 is laminated on a flat-plate-shaped first terminal 22. In this case, a tip surface 22a3 included in the first terminal 22 extends outward (in the -X direction) beyond a tip surface 23a3 included in the second terminal 23, exposing an area corresponding to a first bonding region 22a8 included in the first terminal 22. Furthermore, the terminal laminate 24 is fixed to the frame 21 with the tip surface 22a3 of the first terminal 22 being flush with the first side 21a of the frame 21.

[0061] As shown in Fig. 5, the first terminal 22 includes a first conductive plate 22a and a first oxide film 22b. The first conductive plate 22a integrally includes a first connection portion 22a1 and a first wiring portion 22a2. The first oxide film 22b covers the surface of the first wiring portion 22a2. The first wiring portion 22a2 is a rectangular portion indicated by a dashed line in the first oxide film 22b in Fig. 5.

[0062] The first wiring portion 22a2 is flat and includes a tip surface 22a3, first side surfaces 22a4 and 22a5, a first front surface 22a6, and a first back surface 22a7. The first front surface 22a6 and the first back surface 22a7 are rectangular in plan view and have the same size. A first bonding region 22a8 is defined outside the first front surface 22a6 (in the −X direction) and along the tip surface 22a3 in plan view. The first bonding region 22a8 is an area surrounded by a dashed line on the −X direction side of the first front surface 22a6 in FIG. 5 . The range of the first bonding region 22a8 corresponds to the bonding range of first, second, and third connection portions 43a, 43b, and 43c of a first connection terminal 43 included in the capacitor 4, which will be described later. For example, the first bonding region 22a8 is rectangular in plan view. The width of the first bonding region 22a8 in the ±Y direction is smaller than the width of the first front surface 22a6 in the same direction. The first bonding region 22a8 has a predetermined length inward (+X direction) from the tip surface 22a3.

[0063] The tip surface 22a3 is the outermost end in the extension direction (-X direction) of the terminal stack portion 24. That is, the tip surface 22a3 is provided on all four sides of the first front surface 22a6 and the first back surface 22a7 in the -X direction. The tip surface 22a3 is approximately parallel to the first side portion 21a and the third side portion 21c of the frame portion 21 of the case 20.

[0064] The first side surfaces 22a4 and 22a5 are provided on the first front surface 22a6 and the first back surface 22a7 in the ±Y direction on all four sides. In other words, the first side surfaces 22a4 and 22a5 are continuously connected to the first front surface 22a6 and the first back surface 22a7 from their respective ends in the ±Y direction on all four sides. The first side surfaces 22a4 and 22a5 are parallel to the extension direction (+X direction) of the terminal stacking portion 24. That is, the first side surfaces 22a4 and 22a5 are substantially parallel to the second side portion 21b and the fourth side portion 21d of the frame portion 21 of the case 20. Furthermore, rear end surfaces (reference numerals omitted) facing the leading end surface 22a3 are provided on the first front surface 22a6 and the first back surface 22a7 in the +X direction on all four sides.

[0065] The first connection portion 22a1 has a rectangular shape in a plan view. The first connection portion 22a1 has the same thickness as the first wiring portion 22a2. The first connection portion 22a1 is formed on the rear end surface opposite the front end surface 22a3 of the first wiring portion 22a2, and extends a predetermined length in the +X direction. The two first connection portions 22a1 are lined up at the center of the rear end surface of the first wiring portion 22a2 with a predetermined gap between them in the ±Y directions.

[0066] The first conductive plate 22a is made of a metal with excellent conductivity, such as copper or an alloy containing copper as a main component. The thickness of the first conductive plate 22a is generally uniform and is, for example, 0.8 mm to 1.2 mm, for example, 1.0 mm.

[0067] The first oxide film 22b is provided on the surface of the first wiring portion 22a2 of the first conductive plate 22a. That is, the first oxide film 22b is provided on the leading end surface 22a3, the first side surfaces 22a4 and 22a5, the first front surface 22a6, and the first back surface 22a7 of the first wiring portion 22a2. The first oxide film 22b may be formed on the rear end surface of the first conductive plate 22a opposite the leading end surface 22a3. Note that the first oxide film 22b is not provided on the first connection portion 22a1 of the first conductive plate 22a. Such a first oxide film 22b is mainly composed of an insulating material. This material is a metal oxide, such as an aluminum oxide layer. Note that the first oxide film 22b is illustrated as a single layer. Note that an aluminum layer may be included on the surface of the first conductive plate 22a corresponding to the first oxide film 22b of the aluminum oxide layer.

[0068] As shown in Fig. 6, the second terminal 23 includes a second conductive plate 23a and a second oxide film 23b. The second conductive plate 23a integrally includes a second connection portion 23a1 and a second wiring portion 23a2. The second oxide film 23b covers the surface of the second wiring portion 23a2. The second wiring portion 23a2 is a T-shaped portion represented by a dashed line in the second oxide film 23b in Fig. 6.

[0069] The second wiring portion 23a2 is flat and includes a tip surface 23a3, second side surfaces 23a4 and 23a5, a second front surface 23a6, and a second back surface 23a7. The second front surface 23a6 and the second back surface 23a7 are T-shaped in a plan view and are the same size. A second bonding region 23a8 is defined outside the second front surface 23a6 (in the −X direction) and along the tip surface 23a3 in a plan view. The second bonding region 23a8 is an area surrounded by a dashed line on the −X direction side of the second front surface 23a6 in FIG. 6 and faces the first bonding region 22a8. The size of the second bonding region 23a8 corresponds to the size of the connecting members 41a, 41b, and 41c included in the capacitor 4, which will be described later. For example, the second bonding region 23a8 is rectangular in a plan view. The width of the second bonding region 23a8 in the ±Y direction is smaller than the width of the second front surface 23a6 in the same direction. The second bonding region 23a8 has a predetermined length inward (+X direction) from the tip surface 23a3.

[0070] The tip surface 23a3 is the outermost end in the extension direction (-X direction) of the terminal stack portion 24. That is, the tip surface 23a3 is provided on all four sides of the second front surface 23a6 and the second back surface 23a7 in the -X direction. The tip surface 23a3 is approximately parallel to the first side portion 21a and the third side portion 21c of the frame portion 21 of the case 20.

[0071] The second side surfaces 23a4, 23a5 are provided on the four sides of the second front surface 23a6 and the second back surface 23a7 in the ±Y direction. In other words, the second side surfaces 23a4, 23a5 are continuous from the four ends of the second front surface 23a6 and the second back surface 23a7 in the ±Y direction to the second front surface 23a6 and the second back surface 23a7. The second side surfaces 23a4, 23a5 are parallel to the extension direction (-X direction) of the terminal stacking portion 24. That is, the second side surfaces 23a4, 23a5 are substantially parallel to the second side portion 21b and the fourth side portion 21d of the frame portion 21 of the case 20. Furthermore, rear end surfaces (reference numerals omitted) facing the leading end surface 23a3 are provided on the four sides of the second front surface 23a6 and the second back surface 23a7 in the +X direction.

[0072] The second connection portion 23a1 has a rectangular shape in a plan view. The second connection portion 23a1 has the same thickness as the second wiring portion 23a2. The second connection portion 23a1 is formed on the rear end surface of the second wiring portion 23a2 opposite the front end surface 23a3 and extends a predetermined length in the +X direction. The two second connection portions 23a1 are formed on both ends of the rear end surface of the second wiring portion 23a2 in the ±Y directions. The second connection portion 23a1 may have the same thickness and size as the first connection portion 22a1. When the second terminal 23 is disposed on the first terminal 22, the second connection portion 23a1 is located outside the first connection portion 22a1, as shown in FIG. 4 .

[0073] The second conductive plate 23a is made of a metal with excellent conductivity, such as copper or an alloy containing copper as a main component. The thickness of the first conductive plate 22a is generally uniform and is, for example, 0.8 mm to 1.2 mm, for example, 1.0 mm.

[0074] The second oxide film 23b is provided on the surface of the second wiring portion 23a2 of the second conductive plate 23a. That is, the second oxide film 23b is formed on the leading end surface 23a3, the second side surfaces 23a4 and 23a5, the second front surface 23a6, and the second back surface 23a7 of the second wiring portion 23a2. The second oxide film 23b may be provided on the rear end surface of the second conductive plate 23a opposite to the leading end surface 23a3. The second oxide film 23b is not provided on the second connection portion 23a1 of the second conductive plate 23a. Such a second oxide film 23b is formed of the same material as the first oxide film 22b. Even in this case, an aluminum layer may be included on the surface of the second conductive plate 23a corresponding to the second oxide film 23b of the aluminum oxide layer.

[0075] As described above, the terminal laminated portion 24 is integrally formed with the frame portion 21. As shown in Fig. 7 , the portion of the terminal laminated portion 24 corresponding to the first wiring portion 22a2 included in the first terminal 22 and the portion corresponding to the second wiring portion 23a2 included in the second terminal 23 are fixed to the frame portion 21. The first connecting portion 22a1 of the first terminal 22 and the second connecting portion 23a1 of the second terminal 23 are disposed within the storage region 21e of the frame portion 21.

[0076] The first connection portion 22a1 of the first terminal 22 is bonded to the wiring boards 32c and 32d of the insulating circuit board 30 housed in the storage area 21e, and is electrically connected to the output electrodes (negative electrodes) of the semiconductor chips 34c and 34d (see FIG. 2). The second connection portion 23a1 of the second terminal 23 is bonded to the wiring boards 32a and 32b of the insulating circuit board 30 housed in the storage area 21e, and is electrically connected to the input electrodes (positive electrodes) of the semiconductor chips 34a and 34b (see FIG. 2). The first connection portion 22a1 and the second connection portion 23a1 are bonded to each other by ultrasonic bonding, laser welding, or a bonding material (e.g., solder or sintered body), for example.

[0077] Furthermore, the first terminal 22 and the second terminal 23 of the terminal laminate 24 are laminated with the first oxide film 22b and the second oxide film 23b interposed therebetween. This maintains insulation between the first conductive plate 22a of the first terminal 22 and the second conductive plate 23a of the second terminal 23. Therefore, the thicknesses of the first oxide film 22b and the second oxide film 23b are set to a value that ensures a sufficient creepage distance between the first terminal 22 and the second terminal 23 and maintains sufficient insulation. For example, if the breakdown voltage between the first terminal 22 and the second terminal 23 is 1 kV or higher, the combined thickness of the first oxide film 22b and the second oxide film 23b between the first terminal 22 and the second terminal 23 is 20 μm or higher. Details of the method for covering the first conductive plate 22a and the second conductive plate 23a with the first oxide film 22b and the second oxide film 23b will be described later.

[0078] Furthermore, only one of the first oxide film 22b and the second oxide film 23b may be provided if sufficient insulation can be maintained between the first terminal 22 and the second terminal 23. Furthermore, in order to maintain insulation between the first terminal 22 and the second terminal 23, the first oxide film 22b may be provided on at least the first side surfaces 22a4 and 22a5 and the first front surface 22a6. Alternatively, the second oxide film 23b may be provided on the second side surfaces 23a4 and 23a5 and the second back surface 23a7.

[0079] To maintain insulation between the first conductive plate 22a and the second conductive plate 23a, an insulating member must be provided between the first wiring portion 22a2 of the first conductive plate 22a and the second wiring portion 23a2 of the second conductive plate 23a. If the insulating member is, for example, sheet-like insulating paper, a sufficient creepage distance can be ensured between the first terminal 22 (first conductive plate 22a) and the second terminal 23 (second conductive plate 23a), thereby maintaining insulation between the first terminal 22 and the second terminal 23. However, insulating paper has low moisture resistance. Therefore, over time, the insulation between the first terminal 22 and the second terminal 23 cannot be maintained. Furthermore, the insulating paper may include thin portions. In these portions, there is a risk of dielectric breakdown due to the voltage between the first terminal 22 and the second terminal 23.

[0080] On the other hand, in the semiconductor module 2, the first oxide film 22b and the second oxide film 23b are used as insulating members between the first wiring portion 22a2 of the first conductive plate 22a and the second wiring portion 23a2 of the second conductive plate 23a. This improves moisture resistance. Therefore, even with a long period of use, deterioration of the insulation between the first terminal 22 and the second terminal 23 can be suppressed.

[0081] Furthermore, the adhesion between the first oxide film 22b and the second oxide film 23b, which are oxide layers, and the thermoplastic resin that forms the frame portion 21 is better than when insulating paper is used, which improves the adhesion between the terminal laminate portion 24 and the case 20. Furthermore, the first oxide film 22b and the second oxide film 23b, which are oxide layers, are less likely to cause dielectric breakdown than when insulating paper is used.

[0082] Furthermore, since the first oxide film 22b and the second oxide film 23b maintain insulation between the first conductive plate 22a and the second conductive plate 23a of the first terminal 22 and the second terminal 23, no separate insulating member is required between the first terminal 22 and the second terminal 23. This makes it possible to reduce the size of the terminal stack portion 24, and thus the size of the semiconductor module 2.

[0083] A positive terminal is joined to the first joint region 22a8 of the first terminal 22, and a negative terminal is joined to the second joint region 23a8 of the second terminal 23. As a result, the current flows in the first terminal 22 in the opposite direction to the current flows in the second terminal 23. This results in an inductance reduction effect, as the inductance is canceled out. In this embodiment, the length in the thickness direction between the first terminal 22 and the second terminal 23 can be shortened, which further enhances the inductance reduction effect and allows the inductance between the first terminal 22 and the second terminal 23 to be further reduced.

[0084] As described below, a first connection terminal 43 and a linking member 41 are bonded to the first terminal 22 and the second terminal 23 of the terminal stack 24, respectively (see FIG. 14 ). At this time, for example, laser irradiation is performed on the first oxide film 22b corresponding to the first bonding region 22a8 of the first terminal 22. Similarly, laser irradiation is performed on the second oxide film 23b corresponding to the second bonding region 23a8 of the second terminal 23. As a result, as shown in FIG. 8 , the first oxide film 22b is removed, exposing the first bonding region 22a8 of the first conductive plate 22a. The second oxide film 23b is removed, exposing the second bonding region 23a8 of the second conductive plate 23a. In addition to laser irradiation, the first oxide film 22b and the second oxide film 23b may be removed by, for example, polishing with a file or cutting with a milling cutter.

[0085] Next, a method for manufacturing the case 20 included in such a semiconductor module 2 will be described with reference to Fig. 9. Fig. 9 is a flowchart showing a method for manufacturing the case included in the semiconductor module of the first embodiment. The method for manufacturing the case 20 shown in Fig. 9 is included in the method for manufacturing the semiconductor module 2.

[0086] To manufacture the case 20, a preparation process is first performed (step S10), in which various terminals and case material for the case 20 (frame portion 21) are prepared. In step S10, other materials, tools, parts, etc. necessary for manufacturing the case 20 are also prepared as needed. The various terminals include the first terminal 22, the second terminal 23, the U terminal 26a, the V terminal 26b, the W terminal 26c, and the control terminal 25. The first conductive plate 22a and the second conductive plate 23a shown in FIGS. 5 and 6, and the U terminal 26a, the V terminal 26b, and the W terminal 26c shown in FIG. 1 are obtained from a conductive plate. The terminals are obtained, for example, by stamping, cutting, or punching the conductive plate. The conductive plate is made of a metal with excellent conductivity, such as copper or an alloy primarily composed of copper. The case material is, for example, PPS resin.

[0087] Next, a coating step is performed to coat the first conductive plate 22a and the second conductive plate 23a with a coating layer (step S11). The first terminal 22 and the second terminal 23 shown in FIGS. 4 and 5 can be manufactured by several methods. Step S11 and the next step S12 are one example of a manufacturing method. First, an example of the coating step will be described with reference to FIG. 10. FIG. 10 is a diagram for explaining the coating step included in the manufacturing method of the case of the first embodiment. Note that FIG. 10 describes the first conductive plate 22a. The second conductive plate 23a is processed in the same manner.

[0088] First, a coating container 50 is filled with a solution 51. This solution 51 contains, for example, aluminum. The aluminum-containing solution 51 may further contain magnesium or silicon. The first conductive plate 22a is moved vertically downward (toward the solution 51) into the solution 51 in the coating container 50, with the leading end surface 22a3 facing downward. The first wiring portion 22a2 is immersed in the solution 51, leaving only the first connection portion 22a1 of the first conductive plate 22a. As a result, the leading end surface 22a3, first side surfaces 22a4 and 22a5, first front surface 22a6, and first back surface 22a7 (see FIG. 7 ) of the first wiring portion 22a2 of the first conductive plate 22a come into contact with the solution 51. Note that the rear end surface of the first wiring portion 22a2 opposite the leading end surface 22a3 may also come into contact with the solution 51. The first connection portion 22a1 of the first conductive plate 22a does not come into contact with the solution 51.

[0089] Although not shown in the drawings, the same is true for second conductive plate 23a; except for second connection portion 23a1, tip surface 23a3, second side surfaces 23a4 and 23a5, second front surface 23a6, and second back surface 23a7 of second wiring portion 23a2 of second conductive plate 23a come into contact with solution 51. Second connection portion 23a1 of second conductive plate 23a does not come into contact with solution 51. Note that the rear end surface of second wiring portion 23a2 opposite tip surface 22a3 may also come into contact with solution 51.

[0090] When the first conductive plate 22a immersed in the solution 51 is removed from the coating container 50, the solution 51 is applied to the first conductive plate 22a, forming a coating layer 22b1 on the tip surface 22a3, the first side surfaces 22a4 and 22a5, the first front surface 22a6, and the first back surface 22a7 of the first wiring portion 22a2 included in the first conductive plate 22a (see the upper diagram in FIG. 11 ). The coating layer 22b1 contains aluminum.

[0091] Similarly, the second conductive plate 23a has a coating layer provided on a tip surface 23a3, second side surfaces 23a4 and 23a5, second front surface 23a6, and second back surface 23a7 of a second wiring portion 23a2 included in the second conductive plate 23a.

[0092] The above method is merely an example of a method for coating the first conductive plate 22 a and the second conductive plate 23 a with an aluminum-containing coating layer. Other methods may be used as long as they can coat the first conductive plate 22 a and the second conductive plate 23 a with an aluminum-containing coating layer. Examples of such methods include sputtering, vapor deposition, and plating.

[0093] Next, an oxidation step is performed to oxidize the coating layers of the first conductive plate 22a and the second conductive plate 23a (step S12). To oxidize the coating layers formed on the first conductive plate 22a and the second conductive plate 23a in step S11, for example, an anodizing process is performed. The anodizing process is a process in which a conductive plate is electrically oxidized by passing a current directly through the conductive plate as an anode in an electrolytic solution, thereby forming an oxide layer on the surface. An oxidation step using such an anodizing process will be described with reference to FIG. 11 . FIG. 11 is a diagram illustrating the oxidation step included in the manufacturing method of the case of the first embodiment. Note that FIG. 11 describes the first conductive plate 22a. The second conductive plate 23a is also treated in the same manner.

[0094] In step S11, the first conductive plate 22a (shown in the upper part of FIG. 11 ) coated with the coating layer 22b1 is immersed in an electrolytic solution. The electrolytic solution also contains a cathode. The cathode may be composed primarily of, for example, lead and carbon. Examples of the electrolytic solution include aqueous solutions of oxalic acid, chromic acid, and phosphoric acid. Here, an oxalic acid aqueous solution is used as the electrolytic solution. The oxide film formed by an anodizing method using an oxalic acid aqueous solution has a thick barrier layer, small pores, and a high breakdown voltage. To set the breakdown voltage to 1 kV or higher, the thickness of the oxide layer formed must be 20 μm or higher. By using an oxalic acid aqueous solution as the electrolytic solution, an oxide layer thick enough to achieve such a breakdown voltage can be formed.

[0095] In such an electrolytic solution, a positive voltage is applied to the first conductive plate 22a and a negative voltage is applied to the cathode, and a direct current is passed for a predetermined time, whereby the coating layer 22b1 covering the surface of the first wiring portion 22a2 of the first conductive plate 22a is oxidized, forming a first oxide film 22b (the lower diagram in FIG. 11 ).

[0096] In this manner, the first oxide film 22b is formed on the tip surface 22a3, the first side surfaces 22a4 and 22a5, the first front surface 22a6, and the first back surface 22a7 of the first wiring portion 22a2 of the first conductive plate 22a. Similarly, although not shown in the drawings, the second oxide film 23b is formed on the tip surface 23a3, the second side surfaces 23a4 and 23a5, the second front surface 23a6, and the second back surface 23a7 of the second wiring portion 23a2 of the second conductive plate 23a.

[0097] The first oxide film 22b and the second oxide film 23b are composed mainly of, for example, aluminum oxide. Here, the first oxide film 22b and the second oxide film 23b are illustrated as a single layer. Note that an aluminum layer may remain on the surfaces of the first wiring portion 22a2 of the first conductive plate 22a and the second wiring portion 23a2 of the second conductive plate 23a, and the first oxide film 22b and the second oxide film 23b may be formed thereon. In this manner, the first terminal 22 and the second terminal 23 are obtained.

[0098] Note that, in the illustrated example, first oxide film 22b is formed on tip surface 22a3, first side surfaces 22a4 and 22a5, first front surface 22a6, and first back surface 22a7 of first wiring portion 22a2, leaving first connection portion 22a1. Similarly, in the illustrated example, second oxide film 23b is formed on tip surface 23a3, second side surfaces 23a4 and 23a5, second front surface 23a6, and second back surface 23a7 of second wiring portion 23a2, leaving second connection portion 23a1. When a creepage distance between first conductive plate 22a and second conductive plate 23a can be secured and sufficient insulation can be maintained, only first oxide film 22b or only second oxide film 23b may be provided. Similarly, as long as sufficient insulation can be maintained, the first oxide film 22b may be provided only on the first front surface 22a6 and the first side surfaces 22a4 and 22a5. Alternatively, the second oxide film 23b may be provided only on the second back surface 23a7 and the second side surfaces 23a4 and 23a5. Furthermore, by providing the first oxide film 22b only on the first front surface 22a6 and the first side surfaces 22a4 and 22a5, the second oxide film 23b may be provided only on the second back surface 23a7 and the second side surfaces 23a4 and 23a5.

[0099] 8 , to open the first bonding region 22a8 on the first front surface 22a6 of the first terminal 22, the area of ​​the first oxide film 22b corresponding to the first bonding region 22a8 is removed by laser. Instead of such removal, in step S11, the first bonding region 22a8 on the first front surface 22a6 of the first conductive plate 22a may be masked in advance to prevent contact with the solution 51. In this case, a mask made of a material having a higher melting point than aluminum is used to mask the portion of the first conductive plate 22a corresponding to the first bonding region 22a8. This prevents the portion from coming into contact with the solution 51. Then, step S12 is performed with the first bonding region 22a8 of the first conductive plate 22a masked. At this time, no coating layer is formed in the area covered by the mask. Then, by removing the mask, the first bonding region 22a8 is opened on the first front surface 22a6 of the first terminal 22, and the first oxide film 22b can be formed. Similarly, for the second terminal 23, the second junction region 23a8 is opened and the second oxide film 23b can be formed.

[0100] Next, a setting step is performed in which parts are set in a mold for the case (step S13). The parts are the first terminal 22, the second terminal 23, the U terminal 26a, the V terminal 26b, the W terminal 26c, and the control terminal. When setting the first terminal 22 and the second terminal 23, the terminal stack 24, which is configured by placing the second terminal 23 on the first terminal 22, is set.

[0101] Next, an insert molding process is performed (step S14) in which a case material is filled into the mold for the case. The case material is filled into the mold in which the parts were set in step S13, and the case material is hardened. The case material here is, for example, PPS resin. After the case material has hardened, it is removed from the mold, yielding the case 20 shown in FIG. 1.

[0102] The case 20 manufactured in this manner is set on the heat sink 37 to which the semiconductor unit 3 is bonded. At this time, the semiconductor unit 3 is stored in the storage areas 21e1, 21e2, and 21e3 of the case 20. A wiring process is performed to electrically connect the semiconductor unit 3 to various terminals of the case 20, and a sealing material is filled into the storage areas 21e1, 21e2, and 21e3, thereby obtaining the semiconductor module 2.

[0103] The semiconductor module 2 includes a first conductive plate 22a primarily composed of copper or a copper alloy, a second conductive plate having a second back surface 23a7 facing the first conductive plate 22a and a side surface continuous with the second back surface 23a7, and also composed primarily of copper or a copper alloy, and a second oxide film 23b provided on the back surface and side surface of the second conductive plate, which is electrically insulating and contains a metal oxide of an element different from the metal of the second conductive plate 23a. The first oxide film 22b and the second oxide film 23b are used as insulating members between the first wiring portion 22a2 of the first conductive plate 22a and the second wiring portion 23a2 of the second conductive plate 23a. This improves moisture resistance. Therefore, deterioration of the insulation between the first terminal 22 and the second terminal 23 can be suppressed even with extended use.

[0104] Furthermore, the adhesion between the first oxide film 22b and the second oxide film 23b and the thermoplastic resin constituting the frame portion 21 is better than when insulating paper is used, thereby improving the adhesion between the terminal stack portion 24 and the case 20. Furthermore, the first oxide film 22b and the second oxide film 23b are less likely to cause dielectric breakdown than when insulating paper is used.

[0105] Furthermore, since the first oxide film 22b and the second oxide film 23b maintain insulation between the first conductive plate 22a and the second conductive plate 23a of the first terminal 22 and the second terminal 23, no separate insulating member is required between the first terminal 22 and the second terminal 23. This makes it possible to reduce the size of the terminal stack portion 24, and thus the size of the semiconductor module 2.

[0106] A positive terminal is joined to the first joint region 22a8 of the first terminal 22, and a negative terminal is joined to the second joint region 23a8 of the second terminal 23. As a result, the current flows in the first terminal 22 in the opposite direction to the current flows in the second terminal 23. This results in an inductance reduction effect, as the inductance is canceled out. Here, since the length in the thickness direction between the first terminal 22 and the second terminal 23 can be shortened, the inductance reduction effect is further enhanced, and the inductance between the first terminal 22 and the second terminal 23 can be further reduced.

[0107] Next, a modified example 1-1 of the first embodiment will be described. In the first embodiment, the first conductive plate 22a and the second conductive plate 23a are immersed in a solution 51 containing aluminum to form a coating layer on the surfaces of the first conductive plate 22a and the second conductive plate 23a, and the coating layer is then oxidized by anodizing. In the modified example 1-1, a clad material is used for the first conductive plate 22a and the second conductive plate 23a. The semiconductor module 2 of the modified example 1-1 includes a terminal stack 24 that uses a clad material. The semiconductor module 2 of the modified example 1-1 is similar to the first embodiment except for the terminal stack 24.

[0108] A method for manufacturing the case 20 included in the semiconductor module 2 of Modification 1-1 will be described with reference to Fig. 12. Fig. 12 is a flowchart showing a method for manufacturing the case included in the semiconductor module of Modification 1-1 of the first embodiment. The method for manufacturing the case 20 shown in Fig. 12 is included in the method for manufacturing the semiconductor module 2. The explanation of the same steps as in the flowchart of Fig. 9 will be simplified.

[0109] First, similar to the flowchart of FIG. 9, a preparation step is performed to prepare manufacturing components for the case 22 (step S10). Here, clad material to be used as a component for various terminals is prepared. The clad material will be described with reference to FIG. 13. FIG. 13 is a diagram for explaining the preparation step included in the semiconductor module of Modification 1-1 of the first embodiment. Note that, with respect to the clad material 22c, FIG. 13(A) is a plan view, FIG. 13(B) is a side view as viewed in the +X direction, and FIG. 13(C) is a side view as viewed in the -Y direction.

[0110] The clad material 22c includes a conductive plate 22c2 and clad films 22c1 formed on the front and back surfaces of the conductive plate 22c2. The conductive plate 22c2 is the base material of the clad material 22c and, like the first conductive plate 22a of the first embodiment, is copper or a copper-based alloy. The clad film 22c1 is primarily composed of aluminum. The clad material 22c is formed by rolling the clad films 22c1 provided on the front and back surfaces of the conductive plate under pressure. When the clad film 22c1 is pressed onto the conductive plate 22c2 in this manner, the metal of the conductive plate 22c2 and the metal of the clad film 22c1 are bonded together by pressure-induced roll bonding, resulting in interatomic bonding between them, without the use of a bonding material. Therefore, the clad film 22c1 is less likely to peel off from the conductive plate 22c2.

[0111] Next, a terminal forming process is performed to form terminals from the clad material 22c (step S11a). The terminal forming process will be described with reference to FIG. 14. FIG. 14 is a diagram for explaining the terminal forming process and oxidation process included in the semiconductor module of Modification 1-1 of the first embodiment. FIG. 14(A) is a plan view showing the state after the terminal forming process. FIG. 14(B) is a plan view showing the state after the oxidation process, which will be described later.

[0112] The clad material 22c prepared in step S10 is pressed (sheared) to correspond to the shapes of the first conductive plate 22a and the second conductive plate 23a of the first embodiment. The pressed clad material 22c has the shape shown in FIG. 14(A). Although not shown in FIG. 14(A), clad films 22c1 are formed on the front and back surfaces of the first conductive plate 22a. Furthermore, although not shown, clad films are also formed on the front and back surfaces of the second conductive plate 23a.

[0113] Next, an oxidation step is performed to oxidize the cladding film 22c1 of the first conductive plate 22a (step S12). To oxidize the cladding film 22c1 provided on the first conductive plate 22a and the second conductive plate 23a formed in step S11a, an anodizing process is performed as in the first embodiment. As a result, the cladding film 22c1 on the front and back surfaces of the first conductive plate 22a is oxidized to form first oxide films 22a2, and the first terminal 22 is obtained.

[0114] In this first terminal 22, a first oxide film 22a2 is also formed on the front and back surfaces of the first connection portion 22a1. The first oxide film 22a2 on the first connection portion 22a1 may be removed. By removing it, the first terminal 22 shown in FIG. 14B is obtained. Although not shown, the second terminal 23 is also obtained in a similar manner.

[0115] In this example, the clad material 22c is prepared in the preparation step of step S10, and then the clad material 22c is subjected to the terminal forming step of step S11a and the oxidation step of step S12. However, this is not limited to this case, and the clad material 22c may be subjected to the terminal forming step and the oxidation step in the preparation step of step S10 to prepare the first terminal 22. The same applies to the second terminal 23.

[0116] Once the first terminals 22 and the second terminals 23 are obtained as described above, the subsequent steps S13 and S14 are performed in the same manner as steps S13 and S14 of FIG. 9 of the first embodiment, thereby obtaining the case 20. A semiconductor module 2 including the case 20 manufactured in this manner will be described with reference to FIGS. 15 and 16. FIG. 15 is a cross-sectional view of the terminal stack of Modification 1-1 of the first embodiment, and FIG. 16 is a cross-sectional view of the terminal stack of Modification 1-1 of the first embodiment from which the bonding region has been removed. Note that FIGS. 15 and 16 correspond to FIGS. 7 and 8 of the first embodiment.

[0117] 15, the terminal laminate 24 of Modification 1-1 also includes a first terminal 22 and a second terminal 23. In the terminal laminate 24 of Modification 1-1, a flat-plate-shaped second terminal 23 is laminated on a flat-plate-shaped first terminal 22. A tip surface 22a3 included in the first terminal 22 extends outward (in the −X direction) beyond a tip surface 23a3 included in the second terminal 23, exposing an area corresponding to a first bonding region 22a8 included in the first terminal 22. In addition, the terminal laminate 24 is fixed to the frame 21 with the tip surface 22a3 of the first terminal being flush with the first side 21a of the frame 21.

[0118] The first terminal 22 includes a first conductive plate 22a and a first oxide film 22b, similar to the first embodiment shown in FIG. 7 . As described above, the first terminal 22 is obtained from a clad material 22c. Therefore, the first oxide film 22b is formed only on the front surface 22a6 and the back surface 22a7 of the first wiring portion 22a2 of the first conductive plate 22a. The first oxide film 22b is not formed on the leading end surface 22a3, the trailing end surface (reference numerals omitted), or the first side surfaces 22a4 and 22a5 of the first wiring portion 22a2 of the first conductive plate 22a.

[0119] 7 of the first embodiment, the second terminal 23 also includes a second conductive plate 23a and a second oxide film 23b. As described above, the second terminal 23 is also obtained from the clad material 22c. Therefore, the second oxide film 23b is formed only on the front surface 23a6 and the back surface 23a7 of the second wiring portion 23a2 of the second conductive plate 23a. The second oxide film 23b is not formed on the leading end surface 23a3, the trailing end surface (reference numerals omitted), or the second side surfaces 23a4 and 23a5 of the second wiring portion 23a2 of the second conductive plate 23a.

[0120] As described above, the first and second terminals 22 and 23 do not have the first oxide film 22b and the second oxide film 23b formed on the leading end surfaces 22a3 and 23a3, the first side surfaces 22a4 and 22a5, the second side surfaces 23a4 and 23a5, and the rear end surfaces of the first and second conductive plates 22a and 23a. Therefore, in order to maintain insulation, it is desirable to set the creepage distances between the leading end surfaces 22a3 and 23a3, between the first side surfaces 22a4 and 22a5 and the second side surfaces 23a4 and 23a5, and between the rear end surfaces longer in plan view than in the first embodiment shown in FIG. 7 . For example, the leading end surface 22a3 of the first terminal 22 may extend further in the −X direction from the leading end surface 23a3 of the second terminal 23 than in the first embodiment shown in FIG. 7 . Furthermore, the first side surfaces 22a4 and 22a5 may extend further in the ±Y direction from the second side surfaces 23a4 and 23a5, respectively, than in the first embodiment.

[0121] Furthermore, a first connection terminal 43 and a linking member 41, which will be described later, are also bonded to the first terminal 22 and the second terminal 23 of the stacked terminal portion 24 of Modification Example 1-1, respectively (see FIG. 19 , which will be described later). At this time, the first oxide film 22b corresponding to the first bonding region 22a8 of the first terminal 22 is also irradiated with laser light, as in the first embodiment. At this time, for example, in the first oxide film 22b of the first conductive plate 22a2, a range that has a predetermined length in the +X direction from the tip end surface 22a3 in plan view and that crosses the first side surfaces 22a4 and 22a5 may be removed by laser irradiation.

[0122] Similarly, laser irradiation is performed on the second oxide film 23b corresponding to the second bonding region 23a8 of the second terminal 23. At this time, for example, in the second oxide film 23b of the second conductive plate 23a2, a range that has a predetermined length in the +X direction from the tip surface 23a3 in plan view and crosses the second side surfaces 23a4 and 23a5 may be removed by the laser irradiation.

[0123] As a result, as shown in Fig. 16, the first oxide film 22b on the tip surface 22a3 side is removed, exposing the first bonding region 22a8 of the first conductive plate 22a. The second oxide film 23b on the tip surface 23a3 side is removed, exposing the second bonding region 23a8 of the second conductive plate 23a. Note that the ranges of the first oxide film 22b and the second oxide film 23b removed by laser irradiation are only an example. The ranges shown in Fig. 8 may also be removed. In addition to laser irradiation, the first oxide film 22b and the second oxide film 23b may also be removed by grinding with a file or cutting with a milling cutter, as in the first embodiment.

[0124] Second Embodiment Next, a second embodiment will be described with reference to FIGS. 17 and 18 . FIG. 17 is a perspective view of a semiconductor device according to the second embodiment, and FIG. 18 is a perspective view of a capacitor according to the second embodiment. FIG. 18A is a perspective view of a capacitor 4, and FIG. 18B is a perspective view of the capacitor 4 from the opposite direction to that of FIG. 18A . In the second embodiment, a semiconductor device 1 includes the semiconductor module 2 according to the first embodiment, and the semiconductor module 2 according to the first embodiment is connected to the capacitor 4. In the second embodiment, the same components as those in the semiconductor module 2 according to the first embodiment are denoted by the same reference numerals, and their description will be simplified or omitted.

[0125] Here, the first terminal 22 and the second terminal 23 shown in Figure 7 of the first embodiment will be described using an example in which the first bonding area 22a8 and the second bonding area 23a8 are not exposed.

[0126] As shown in FIG. 17 , the semiconductor device 1 of the second embodiment includes a semiconductor module 2 and a capacitor 4. The semiconductor module 2 and the capacitor 4 are positioned as close as possible, with their sides facing each other. Coupling members 41a, 41b, and 41c electrically and mechanically connect the semiconductor module 2 and the capacitor 4. Linear laser weld marks 42a and 42b are formed on the capacitor 4 and semiconductor module 2 sides of the coupling members 41a, 41b, and 41c. The number and width of the coupling members 41a, 41b, and 41c are merely examples. The number and width of the coupling members 41a, 41b, and 41c are selected depending on the number and width of the terminal stacks 24 included in the semiconductor module 2. Hereinafter, the coupling members 41a, 41b, and 41c will be referred to as coupling member 41 unless otherwise specified.

[0127] As shown in FIG. 18 , the capacitor 4 includes a case 40, a first connection terminal 43, an insulating sheet 47, and a second connection terminal 44. The case 40 is the capacitor body. The case 40 is composed of a lid 40a and a storage case 40b. The lid 40a is provided with the first connection terminal 43, the insulating sheet 47, and the second connection terminal 44. A plurality of capacitor elements having an N pole and a P pole are stored in the storage case 40b. The lid 40a and the storage case 40b are made of, for example, epoxy resin. The other end of the first connection terminal 43 is electrically connected to the N poles of all the capacitor elements within the case 40. One end of the first connection terminal 43 extends outward toward the first side surface 40c of the case 40. The portion of the first connection terminal 43 extending from the case 40 is generally L-shaped in side view (see FIG. 18 ). 18 , the first connection terminal 43 includes a first connection conductive portion 431 and a first connection wiring portion 432. The other end of the first connection conductive portion 431 is electrically connected to the N pole of the capacitor element inside the case 40, and extends vertically to the outside from the front surface of the lid portion 40a of the case 40. The first connection wiring portion 432 extends substantially perpendicular to the first connection conductive portion 431 and substantially parallel to the front surface of the lid portion 40a of the case 40 toward the first side surface 40c. In addition, the portion of the first connection terminal 43 extending from the lid portion 40a of the case 40 (the first connection wiring portion 432) is divided into a first connection portion 43a, a second connection portion 43b, and a third connection portion 43c to form a comb-like shape in a plan view. 18B, the reference numerals for the first connection portion 43a, the second connection portion 43b, and the third connection portion 43c are omitted. The widths of the first connection portion 43a, the second connection portion 43b, and the third connection portion 43c correspond to the widths of the storage areas 21e1, 21e2, and 21e3 (first terminals 22) of the semiconductor module 2, respectively. The first connection terminal 43 is made of a metal with excellent conductivity. Such a metal is, for example, copper or an alloy containing copper as a main component.

[0128] The other end of each second connection terminal 44 is electrically connected to the P pole of the capacitor element within the case 40. One end of the second connection terminal 44 extends from a first side surface 40c on the front surface of the lid portion 40a of the case 40 to the outside. The second connection terminal 44 is located on the opposite side of the first side surface 40c from the first connection terminal 43, and is spaced apart from the first connection terminal 43. The portion of the second connection terminal 44 extending from the case 40 is generally L-shaped in side view (see FIG. 18 ). The generally L-shaped second connection terminal 44 includes a second connection conducting portion 441 and a second connection wiring portion 442, as will be described later with reference to FIG. 18 . The other end of the second connection conducting portion 441 is electrically connected to the P pole of the capacitor element within the case 40, and extends vertically from the front surface of the case 40 to the outside. The second connection wiring portion 442 extends substantially perpendicular to the second connection conductive portion 441 and substantially parallel to the front surface of the case 40 to the side opposite the first side surface 40c. The second connection terminal 44 is made of a metal with excellent conductivity. Such a metal is, for example, copper or an alloy containing copper as a main component.

[0129] The insulating sheet 47 is longer than the first connection terminal 43 and extends from between the first connection terminal 43 and the second connection terminal 44 of the case 40 to the outside. Therefore, the insulating sheet 47 maintains insulation between the first connection terminal 43 and the second connection terminal 44 outside the case 40. The insulating sheet 47 is made of a flexible insulating material. Examples of such insulating materials include insulating paper made of a wholly aromatic polyamide polymer, and sheet-like materials made of a fluorine-based or polyimide-based resin material.

[0130] The tip of the insulating sheet 47 is divided into a first mounting portion 47a, a second mounting portion 47b, and a third mounting portion 47c in a comb-like shape in plan view. Note that the reference numerals for the first mounting portion 47a, the second mounting portion 47b, and the third mounting portion 47c are omitted in Fig. 18(B). The widths of the first mounting portion 47a, the second mounting portion 47b, and the third mounting portion 47c correspond to the widths of the storage areas 21e1, 21e2, and 21e3 of the semiconductor module 2, respectively.

[0131] Next, the connecting members 41a, 41b, and 41c will be described (see FIG. 17 ). The connecting members 41a, 41b, and 41c are flat in plan view. The width of one end of the connecting members 41a, 41b, and 41c corresponds to the width of the storage areas 21e1, 21e2, and 21e3 (second terminals 23) of the semiconductor module 2. The thickness of the connecting members 41a, 41b, and 41c is configured to be thinner than the thickness of the second terminals 23. One end of the connecting members 41a, 41b, and 41c is joined by laser welding to the second joining area 23a8 on the second front surface 23a6 of the second terminals 23 of the semiconductor module 2. The other end of the connecting members 41a, 41b, and 41c is joined by laser welding to the second connection terminal 44 of the capacitor 4. The laser welding may be performed using either a seam laser that continuously emits laser light or a spot laser that irradiates pulsed laser light. Fig. 17 shows a case where joining is performed using a seam laser. For this reason, linear laser weld marks 42a and 42b are displayed on the capacitor 4 side and the semiconductor module 2 side of the connecting members 41a, 41b, and 41c in Fig. 17. Details of the joining of the connecting members 41a, 41b, and 41c will be described later.

[0132] The connecting members 41a, 41b, and 41c are made of a metal with excellent conductivity. Such a metal is, for example, copper or an alloy containing copper as a main component. In the second embodiment, three connecting members 41a, 41b, and 41c are respectively joined to three second terminals 23. However, the present invention is not limited to this. The end of a flat connecting member on the semiconductor module 2 side may be split into a comb-like shape to correspond to the second terminals 23, as in the case of the first connection terminal 43 and the insulating sheet 47.

[0133] Next, the connection mechanism between the semiconductor module 2 and the capacitor 4 of the semiconductor device 1 will be described with reference to FIG. 19. FIG. 19 is a cross-sectional view of the capacitor and the semiconductor module included in the semiconductor device of the second embodiment. Note that FIG. 19 is a cross-sectional view taken along the dashed dotted line X-X shown in FIG. 17. Note that FIG. 19 also shows cross sections of the other connecting members 41b and 41c of the semiconductor device 1 of FIG. 17, which have a similar configuration.

[0134] In the semiconductor device 1, the first connection wiring portion 432 of the first connection terminal 43 of the capacitor 4 is joined at the first joint portion 221 in the first joint region 22a8 on the first front surface 22a6 of the first terminal 22 of the semiconductor module 2. Furthermore, the linking member 41, which is joined at the third joint portion 443 to the second connection wiring portion 442 of the second connection terminal 44 of the capacitor 4, is joined at the second joint portion 231 in the second joint region 23a8 on the second front surface 23a6 of the second terminal 23 of the semiconductor module 2. The second joint portion 231 and the third joint portion 443 include laser weld marks 42b, 42a formed on the linking member 41. Similarly, the first joint portion 221 includes laser weld marks (not shown) formed on the first connection wiring portion 432 of the first connection terminal 43.

[0135] That is, although not shown, the first connection portion 43a, the second connection portion 43b, and the third connection portion 43c of the first connection wiring portion 432 of the first connection terminal 43 of the capacitor 4 are joined to the first terminal 22 of the semiconductor module 2 by the first joint portion 221. Also, the second connection wiring portion 442 of the second connection terminal 44 of the capacitor 4 is joined to the coupling member 41 by the third joint portion 443. The second terminal 23 of the semiconductor module 2 is joined to the coupling member 41 by the second joint portion 231. This joining may be performed in the first joint region 22a8 and the second joint region 23a8 where the first conductive plate 22a and the second conductive plate 23a are exposed from the openings of the first oxide film 22b and the second oxide film 23b, for example, by irradiating the first oxide film 22b of the first terminal 22 and the second oxide film 23b of the second terminal 23 with a laser in advance, as illustrated in FIG. In this case, the first bonding portion 221 and the second bonding portion 231 pass through the openings of the first oxide film 22b and the second oxide film 23b.

[0136] 7 , the first and second bonding regions 22a8 and 23a8 of the first and second terminals 22 and 23 are not exposed. In this case, for example, when laser welding marks formed by irradiating a laser when joining the first connection wiring portion 432 of the first connection terminal 43 of the capacitor 4 to the first terminal 22 pass through the first connection wiring portion 432 of the first connection terminal 43 and the first oxide film 22b and reach the first conductive plate 22a, it is not necessary to remove the first oxide film 22b in the first bonding region 22a8 in advance. Similarly, it is not necessary to remove the second oxide film 23b in the second bonding region 23a8 in advance.

[0137] The first joint 221 is a portion where the first terminal 22 of the semiconductor module 2 and the first connection terminal 43 of the capacitor 4 are joined by the laser welding described above. The first connection terminal 43 of the capacitor 4 is placed on the first terminal 22, and laser light is irradiated from above the first connection terminal 43 toward the first connection terminal 43. The laser light melts the first connection terminal 43 from its front surface downward (in the −Z direction) and further melts the first oxide film 22b and the first conductive plate 22a of the first terminal 22. At this time, laser welding marks are formed in the melted portion on the front surface of the first connection wiring portion 432 of the first connection terminal 43. However, the laser light melts only to an extent that does not penetrate the first conductive plate 22a. The first joint 221, created by solidifying the melted portion in this manner, extends from the front surface of the first connection terminal 43 to partway along the first terminal 22 (first conductive plate 22a). In this manner, the first terminal 22 of the semiconductor module 2 and the first connection terminal 43 of the capacitor 4 are joined by the first joint portion 221 .

[0138] The insulating sheet 47 of the capacitor 4 covers the first connection terminal 43 from above and is bent toward the semiconductor module 2. In this case, the portion of the insulating sheet 47 extending from the capacitor 4 to the outside is longer than the first connection terminal 43. After the tip of the insulating sheet 47 passes above the first connection terminal 43, it extends along the terrace portion 222, which is the portion of the first terminal 22 of the semiconductor module 2 that does not overlap with the stacked second terminal 23. In plan view, the terrace portion 222 extends in a direction from the second joint portion 231 toward the first joint portion 221. Furthermore, the tip of the insulating sheet 47 extends to just before the second terminal 23. In other words, the gap in the ±Z directions between the tip of the insulating sheet 47 and the connecting member 41 is larger than the gap in the ±Z directions between the terrace portion 222 and the insulating sheet 47. In this case, the distance from the tip surface of the first connection terminal 43 to the tip surface of the second terminal 23 is 6 mm or more and 12.5 mm or less. Although not shown, the first mounting portion 47 a, the second mounting portion 47 b, and the third mounting portion 47 c at the tip of the insulating sheet 47 each extend onto the first terminal 22 of the semiconductor module 2.

[0139] The second joint 231 is a portion where the second terminal 23 of the semiconductor module 2 and the connecting member 41 of the capacitor 4 are joined by laser welding, similar to the first joint 221. At this time, laser weld marks 42b are formed in the melted portion on the front surface of the connecting member 41. The connecting member 41 is placed on the second terminal 23, and laser light is irradiated onto the connecting member 41 from above. The laser light melts the connecting member 41 from its front surface downward (in the -Z direction) and further melts the second oxide film 23b and the second conductive plate 23a of the second terminal 23. At this time, laser weld marks 42b are formed in the melted portion on the front surface of the connecting member 41. However, the laser light melts only to an extent that does not penetrate the second conductive plate 23a. The second joint 231, created by solidifying the melted portion in this manner, extends from the front surface of the connecting member 41 to partway along the second terminal 23 (the second conductive plate 23a). In this manner, the second terminal 23 of the semiconductor module 2 and the connecting member 41 are joined by the second joint portion 231 .

[0140] The front surface of the second connection wiring portion 442 of the second connection terminal 44 of the capacitor 4 is flush with the front surface of the second terminal 23 of the semiconductor module 2. One end of the linking member 41 is joined to the second connection wiring portion 442 of the second connection terminal 44 of the capacitor 4 at a third joint portion 443, and the other end of the linking member 41 is joined to the second terminal 23 of the semiconductor module 2 at a second joint portion 231. In this case, the second joint portion 231 and the third joint portion 443 are arranged parallel to the first joint portion 221.

[0141] Although not shown, the other ends of the coupling members 41a, 41b, and 41c are joined to the second joint portion 231 of the second terminal 23 of the semiconductor module 2. This allows the coupling member 41 to electrically connect the second connection terminal 44 of the capacitor 4 to the second terminal 23 of the semiconductor module 2. A gap is formed between the back surface of the coupling member 41 and the front surface of the first connection wiring portion 432 of the first connection terminal 43 of the capacitor 4. An insulating sheet 47 is provided in this gap. This allows the first connection terminal 43 to maintain insulation from the coupling member 41 and the second connection terminal 44. The insulating sheet 47 is not limited to the state shown in FIG. 19 , and may be in contact with the back surface of the coupling member 41, the front surface of the first connection terminal 43, and the tip of the second terminal 23 within this gap.

[0142] As described above, the semiconductor module 2 included in the semiconductor device 1 of the second embodiment uses the first oxide film 22b and the second oxide film 23b as an insulating member between the first wiring portion 22a2 of the first conductive plate 22a and the second wiring portion 23a2 of the second conductive plate 23a. This provides the same effects as those of the first embodiment. Furthermore, the first terminal 22 and the second terminal 23 of the semiconductor module 2 are joined to the first connection terminal 43 and the coupling member 41 of the capacitor 4 by laser welding. In this case, the first oxide film 22b and the second oxide film 23b of the first terminal 22 and the second terminal 23 are melted by laser light, thereby joining the first wiring portion 22a2 of the first terminal 22 and the second wiring portion 23a2 of the second terminal 23 of the semiconductor module 2 to the first connection terminal 43 and the coupling member 41 of the capacitor 4. This eliminates the need to form openings in the first oxide film 22b and the second oxide film 23b of the first terminal 22 and the second terminal 23.

[0143] 7, the first terminal 22 and the second terminal 23 of the semiconductor module 2 of the first embodiment shown in FIG. 7 are joined to the first connection terminal 43 and the coupling member 41 of the capacitor 4 by laser welding. However, this is not limited to this case, and the first terminal 22 and the second terminal 23 of the semiconductor module 2 of the modified example of the first embodiment shown in FIG. 15 may be joined to the first connection terminal 43 and the coupling member 41 of the capacitor 4 by laser welding in a similar manner.

[0144] As in the case of Figure 8, as shown in Figure 16, the pre-opened first and second joining areas of the first terminal 22 and second terminal 23 of the semiconductor module 2 of the modified example of the first embodiment may be joined to the first connection terminal 43 and connecting member 41 of the capacitor 4 by laser welding.

[0145] [Third Embodiment] A semiconductor module 2 according to a third embodiment will be described with reference to Figures 20 to 22. Figure 20 is a perspective view of the semiconductor module according to the third embodiment, Figure 21 is a cross-sectional view of the semiconductor module according to the third embodiment, and Figure 22 is a plan view of the semiconductor module according to the third embodiment. Note that Figure 21 is a side view of the semiconductor device 1 in Figure 20 as seen in the +Y direction. Figure 22 is a plan view of the semiconductor module 2 in Figure 20 as seen in the -Z direction.

[0146] The semiconductor module 2 may include at least a case 20, output terminals 28, control terminals 25, and a terminal stack 24. The case 20 encapsulates an insulating circuit board and a semiconductor chip (both not shown). The case 20 may be primarily composed of, for example, a thermosetting resin. Examples of the thermosetting resin include epoxy resin, phenolic resin, maleimide resin, and polyester resin. The thermosetting resin may further contain a filler. The filler may be, for example, ceramic. Ceramics are insulating and have high thermal conductivity. The case 20 is molded from a thermosetting resin into, for example, a cubic shape and includes a first side portion 21a, a second side portion 21b, a third side portion 21c, a fourth side portion 21d, a top surface 21f, and a bottom surface 21g. The case 20 may be substantially cubic. The corners may be rounded or chamfered. The top surface 21f and the bottom surface 21g are rectangular in plan view. The first side portion 21a, the second side portion 21b, the third side portion 21c, and the fourth side portion 21d surround the top surface 21f and the bottom surface 21g in order in plan view. The first side portion 21a and the third side portion 21c are parallel to the longitudinal direction (±Y direction) (corresponding to the long sides of the case 20), and the second side portion 21b and the fourth side portion 21d are parallel to the lateral direction (±X direction) of the case 20 (corresponding to the short sides).

[0147] The insulating circuit board has an insulating plate, a metal plate formed on the back surface of the insulating plate, and multiple wiring boards formed on the front surface of the insulating plate. The insulating plate, multiple wiring boards, and metal plate are made of the same materials as the insulating plate 31, wiring boards 32a to 32i, and metal plate 33 of the first embodiment. The multiple wiring boards may include a wiring board that can realize the functions of the semiconductor module 2 of the third embodiment. An output terminal 28 and a control terminal 25, which will be described later, are connected to predetermined wiring boards among the multiple wiring boards.

[0148] The semiconductor chips are similar to the semiconductor chips 34a to 34d of the first embodiment. The semiconductor chips are mounted on the wiring board of the insulating circuit board via a bonding member. The output terminals 28 are electrically connected to a predetermined conductive pattern on the insulating circuit board within the case 20 and extend outward from the second side 21b of the case 20. The output terminals 28 extend outward perpendicularly (in the -X direction) to the second side 21b. The predetermined conductive pattern is electrically connected to the output electrodes of the semiconductor chips. At least the portions of the output terminals 28 extending outward from the second side 21b of the case 20 are flat. A through-hole may be formed in the portion of the output terminal 28 extending outward. The output terminals 28 are made of a metal with excellent conductivity. Examples of such metals include copper, aluminum, or an alloy containing at least one of these as a main component. The surfaces of the output terminals 28 may be plated to improve corrosion resistance. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0149] The control terminal 25 is electrically connected to a predetermined conductive pattern on the insulating circuit board inside the case 20 and extends from the top surface 21f of the case 20 to the outside in a direction perpendicular to the top surface 21f (in the +Z direction). The predetermined conductive pattern is electrically connected to a control electrode of the semiconductor chip. The predetermined conductive pattern may also be electrically connected to an output electrode of the semiconductor chip. In this case, the control terminal 25 electrically connected to the predetermined conductive pattern carries the sense current flowing through the semiconductor chip.

[0150] Furthermore, a plurality of control terminals 25 may be provided along the third side portion 21 c on the top surface 21 f. The top surface 21 f side of the control terminals 25 may be protected by a protective portion. In this case, the protective portion may be made of the same material as the case 20.

[0151] The terminal laminate 24 is electrically connected to a predetermined conductive pattern of the insulating circuit board inside the case 20 and extends from the fourth side 21d of the case 20 to the outside. In this case, the terminal laminate 24 extends to the outside perpendicularly (in the +X direction) to the fourth side 21d. The positive and negative electrodes of the terminal laminate 24 are connected to the outside. The predetermined conductive patterns are electrically connected to the output and input electrodes of the semiconductor chip.

[0152] Details of the terminal laminate 24 will be described using FIGS. 23 to 25 . FIG. 23 is a plan view of the first and second terminals of the third embodiment, FIG. 24 is a cross-sectional view of the first and second terminals of the third embodiment, and FIG. 25 is a cross-sectional view of the first and second terminals of the third embodiment. Note that in FIGS. 23 to 25 , the portion of the case 20 covering the terminal laminate 24 is indicated by a dashed line. FIGS. 24 and 25 show cross-sectional views taken along dashed lines Y1-Y1 and Y2-Y2 of FIG. 23 , respectively. The terminal laminate 24 of the third embodiment has the same configuration as the terminal laminate 24 of the first embodiment, except for the first connecting portion 22a1 and the second connecting portion 23a1. In the third embodiment, components similar to those of the terminal laminate 24 of the first embodiment are designated by the same reference numerals, and their description will be simplified or omitted.

[0153] The terminal stacking portion 24 includes a first terminal 22 and a second terminal 23, and the first terminal 22 is stacked on the second terminal 23. As shown in Figures 24 and 25 , a portion of the terminal stacking portion 24 corresponding to the first wiring portion 22a2 included in the first terminal 22 and a portion corresponding to the second wiring portion 23a2 included in the second terminal 23 are sealed and fixed in the case 20.

[0154] The first terminal 22 includes a first conductive plate 22a and a first oxide film 22b. The first conductive plate 22a further includes a first connection portion 22a1 and a first wiring portion 22a2. The first wiring portion 22a2 is the same as in the first embodiment. The material of the first oxide film 22b, the area to be covered by the first wiring portion 22a2, and the method of covering the same are the same as in the first embodiment.

[0155] The first connection portion 22a1 is integrally connected to a rear end surface (not shown) of the first wiring portion 22a2 opposite the tip end surface 22a3, and extends in the -X direction. The first connection portion 22a1 and the first wiring portion 22a2 may have the same and uniform thickness. The first connection portion 22a1 is formed in one location on the first side surface 22a4 side of the rear end surface. As shown in FIG. 18 , the side portion of the first connection portion 22a1 in the -Y direction may be flush with the first side surface 22a4 in a plan view. The width of the first connection portion 22a1 in the ±Y directions may be 30% or more and 50% or less of the width of the first wiring portion 22a2 in the same direction.

[0156] As shown in FIG. 25, the first connection portion 22a1 is bent in the −Z direction while extending in the −X direction. The rear surface of the tip of such a first connection portion 22a1 may be flush with the rear surface of the first wiring portion 22a2. The first connection portion 22a1 is bonded to a predetermined conductive pattern of an insulating circuit board (not shown). Note that this bonding may be performed using the bonding material already described or by ultrasonic bonding.

[0157] Similar to the first embodiment, the second terminal 23 is disposed by being stacked on the first terminal 22. The second terminal 23 includes a second conductive plate 23a and a second oxide film 23b. Furthermore, the second conductive plate 23a includes a second connection portion 23a1 and a second wiring portion 23a2. The second wiring portion 23a2 is similar to that in the first embodiment. The material of the second oxide film 23b and the coverage and method of the second wiring portion 23a2 are similar to those in the first embodiment.

[0158] The second connection portion 23a1 is integrally connected to a rear end surface (not shown) of the second wiring portion 23a2 opposite the front end surface 23a3 and extends in the -X direction. The second connection portion 23a1 and the second wiring portion 23a2 may have the same and uniform thickness. The second connection portion 23a1 is formed in one location on the second side surface 23a5 side of the rear end surface. As shown in FIG. 23 , the side portion of the second connection portion 23a1 in the +Y direction may be flush with the second side surface 23a5 in a plan view. The width of the second connection portion 23a1 in the ±Y direction may be 30% or more and 50% or less of the width of the first wiring portion 22a2 in the same direction. Therefore, when the second terminal 23 is stacked on the first terminal 22, the second connection portion 23a1 does not overlap the first connection portion 22a1 (see FIG. 23 ).

[0159] As shown in FIG. 25, the second connection portion 23a1 is bent in the -Z direction while extending in the -X direction. The back surface of the tip of such second connection portion 23a1 may be flush with the back surfaces of the first wiring portion 22a2 and the first connection portion 22a1. The second connection portion 23a1 is bonded to a predetermined conductive pattern of an insulating circuit board (not shown). Note that this bonding may be performed using the bonding material already described or by ultrasonic bonding.

[0160] As described above, the semiconductor module 2 of the third embodiment also uses the first oxide film 22b and the second oxide film 23b as insulating members between the first wiring portion 22a2 of the first conductive plate 22a and the second wiring portion 23a2 of the second conductive plate 23a. This provides the same effects as the first embodiment. Furthermore, when joining external terminals to the first terminals 22 and the second terminals 23 of the terminal stack 24 of this semiconductor module 2, similar to the second embodiment, the external terminals are placed in the first joining region 22a8 of the first terminal 22 and the second joining region 23a8 of the second terminal 23, respectively, and laser irradiation is performed, similar to the second embodiment, to join the external terminals to the first terminals 22 and the second terminals 23.

[0161] Next, a modified example 3-1 of the third embodiment will be described. The first terminals 22 and second terminals 23 included in the stacked terminal unit 24 of the modified example 3-1 are made of clad material, as in the modified example 1-1. In the semiconductor module 2 of the modified example 3-1, the stacked terminal unit 24 has the same configuration as in the first embodiment. The stacked terminal unit 24 in this case will be described with reference to FIG. 26. FIG. 26 is a cross-sectional view of the first terminal and the second terminal of the modified example 3-1 of the third embodiment. Note that FIG. 26 corresponds to FIG. 25.

[0162] The terminal stacking portion 24 includes a first terminal 22 and a second terminal 23, and the first terminal 22 is stacked on the second terminal 23. As shown in Fig. 26 , a portion of the terminal stacking portion 24 corresponding to the first wiring portion 22a2 included in the first terminal 22 and a portion corresponding to the second wiring portion 23a2 included in the second terminal 23 are sealed and fixed in the case 20.

[0163] The first terminal 22 includes a first conductive plate 22a and a first oxide film 22b, similar to the third embodiment shown in FIG. 25 . The first terminal 22 is obtained from a clad material 22c, similar to Modification 1-1. Therefore, the first oxide film 22b is formed only on the front surface 22a6 and the back surface 22a7 of the first wiring portion 22a2 of the first conductive plate 22a. The first oxide film 22b is not formed on the leading end surface 22a3, the rear end surface (reference numerals omitted), and the first side surfaces 22a4 and 22a5 of the first wiring portion 22a2 of the first conductive plate 22a.

[0164] The second terminal 23 also includes a second conductive plate 23a and a second oxide film 23b, similar to the case of the third embodiment shown in FIG. 25. The second terminal 23 is also obtained from a clad material 22c, similar to Modification 1-1. Therefore, the second oxide film 23b is formed only on the front surface 23a6 and back surface 23a7 of the second wiring portion 23a2 of the second conductive plate 23a. The second oxide film 23b is not formed on the leading end surface 23a3, the rear end surface (reference numerals omitted), or the second side surfaces 23a4 and 23a5 of the second wiring portion 23a2 of the second conductive plate 23a.

[0165] As described above, the first and second terminals 22 and 23 do not have the first oxide film 22b and the second oxide film 23b formed on the leading end surfaces 22a3 and 23a3, the first side surfaces 22a4 and 22a5, the second side surfaces 23a4 and 23a5, and the rear end surfaces of the first and second conductive plates 22a and 23a. Therefore, in order to maintain insulation, the first and second terminals 22 and 23 of Modification 3-1 also desirably have longer creepage distances between the leading end surfaces 22a3 and 23a3, between the first side surfaces 22a4 and 22a5 and the second side surfaces 23a4 and 23a5, and between the rear end surfaces than those shown in FIG. 7 of the first embodiment. For example, the leading end surface 22a3 of the first terminal 22 may extend further in the −X direction from the leading end surface 23a3 of the second terminal 23 than those shown in FIG. 7 of the first embodiment. Furthermore, the first side surfaces 22a4 and 22a5 may extend further in the ±Y direction from the second side surfaces 23a4 and 23a5, respectively, than in the first embodiment.

[0166] Next, a modified example 3-2 of the third embodiment will be described. The terminal laminate 24 of the modified example 3-2 has three layers, with one more layer of terminals added to the terminal laminate 24 shown in FIGS. 23 to 25. The terminal laminate 24 in this case will be described using FIG. 27. FIG. 27 is a cross-sectional view of the first terminal, second terminal, and third terminal of the modified example 3-2 of the third embodiment. Note that FIG. 27 corresponds to the cross-sectional views of FIGS. 24 and 25 for the terminal laminate 24 of the modified example.

[0167] The terminal stack 24 of the modified example includes three-phase output terminals (U-terminal, V-terminal, and W-terminal). As shown in Fig. 27, this terminal stack 24 further includes a third terminal 29 on the second terminal 23 of the terminal stack 24 of Figs. 24 and 25. The third terminal 29 included in the terminal stack 24 functions as a U-terminal, the first terminal 22 functions as a V-terminal, and the second terminal 23 functions as a W-terminal. Note that the first connection portion 22a1 of the first terminal 22 and the second connection portion 23a1 of the second terminal 23 are not shown.

[0168] The third terminal 29 is disposed offset in the −X direction relative to the second terminal 23 so that an area corresponding to the second bonding region 23a8 of the second terminal 23 is exposed. The third terminal 29 also includes a third conductive plate 29a and a third oxide film 29b. The third conductive plate 29a further includes a third connection portion (not shown) and a third wiring portion 29a2.

[0169] The third wiring portion 29a2 is made of the same material and has the same shape as the first wiring portion 22a2 and the second wiring portion 23a2 of the first embodiment. The width of the third wiring portion 29a2 in the ±Y direction is equal to the width in the same direction of the first wiring portion 22a2 of the first terminal 22 and the second wiring portion 23a2 of the second terminal 23. The material of the third oxide film 29b and the coverage and coverage method of the third wiring portion 29a2 are the same as those of the first oxide film 22b and the second oxide film 23b of the first embodiment.

[0170] The third connection portion is integrally connected to a rear end surface (not shown) of the third wiring portion 29a2 opposite to the front end surface 29a3, and extends in the −X direction. The third connection portion and the third wiring portion 29a2 may have the same and uniform thickness. The third connection portion may be formed on the third wiring portion 29a2 so as not to overlap the first connection portion 22a1 of the first terminal 22 and the second connection portion 23a1 of the second terminal 23 in a plan view.

[0171] Furthermore, the third connection portion bends in the -Z direction while extending in the -X direction in a side view (viewed in the ±Y direction). The back surface of the tip of such a third connection portion may be flush with the back surfaces of the first wiring portion 22a2 and the first connection portion 22a1. The third connection portion, together with the first connection portion 22a1 and the second connection portion 23a1, is bonded to a predetermined conductive pattern of an insulating circuit board (not shown). Note that this bonding may be performed using the bonding material already described or by ultrasonic bonding.

[0172] As shown in Figure 27, the terminal stack 24 of variant example 3-2 having such a configuration has a portion corresponding to the first wiring portion 22a2 included in the first terminal 22, a portion corresponding to the second wiring portion 23a2 included in the second terminal 23, and a portion corresponding to the third wiring portion 29a2 included in the third terminal 29 sealed and fixed in the case 20.

[0173] As already described, in the semiconductor module 2 of the modification 3-2 of the third embodiment, the first oxide film 22b, the second oxide film 23b, and the third oxide film 29b are used as insulating members between the first wiring portion 22a2 of the first conductive plate 22a, the second wiring portion 23a2 of the second conductive plate 23a, and the third wiring portion 29a2 of the third conductive plate 29a, thereby achieving the same effects as those of the first embodiment.

[0174] Furthermore, when joining external terminals to the first terminal 22, second terminal 23, and third terminal 29 of the terminal stacking portion 24 of such a semiconductor module 2, the external terminals are placed in the first joining region 22a8 of the first terminal 22, the second joining region 23a8 of the second terminal 23, and the third joining region 29a8 of the third terminal 29, respectively, as in the second embodiment, and laser irradiation is performed, as in the second embodiment, thereby joining the external terminals to the first terminal 22, second terminal 23, and third terminal 29, respectively.

[0175] Next, a modified example 3-3 of the third embodiment will be described. The first terminal 22, the second terminal 23, and the third terminal 29 included in the stacked terminal unit 24 of the modified example 3-2 are made of clad material, as in the modified example 1-1. In the semiconductor module 2 of the modified example 3-3, the stacked terminal unit 24 has the same configuration as the modified example 3-2. The stacked terminal unit 24 in this case will be described with reference to FIG. 28. FIG. 28 is a cross-sectional view of the first terminal, the second terminal, and the third terminal of the modified example 3-3 of the third embodiment. Note that FIG. 28 corresponds to FIG. 27.

[0176] 28 , the terminal stacking portion 24 includes a first terminal 22, a second terminal 23, and a third terminal 29, with the second terminal 23 stacked on the first terminal 22 and the third terminal 29 stacked on the second terminal 23. As shown in FIG. 28 , the terminal stacking portion 24 has a portion corresponding to the first wiring portion 22a2 included in the first terminal 22, a portion corresponding to the second wiring portion 23a2 included in the second terminal 23, and a portion corresponding to the third wiring portion 29a2 included in the third terminal 29 sealed and fixed in the case 20.

[0177] The first terminal 22 and the second terminal 23 are the same as those in Modification 3-1 shown in FIG. 26 . The third terminal 29 includes a third conductive plate 29a and a third oxide film 29b, as in Modification 3-2 shown in FIG. 27 . The third terminal 29 is obtained from a clad material 22c, as in Modification 1-1. Therefore, the third oxide film 29b is formed only on the front surface 29a6 and the back surface 29a7 of the third wiring portion 29a2 of the third conductive plate 29a. The third oxide film 29b is not formed on the leading end surface 29a3, the rear end surface (reference numerals omitted), or the third side surface (not shown) of the third wiring portion 29a2 of the third conductive plate 29a. The third side surface corresponds to the first side surfaces 22a4 and 22a5 of the first conductive plate 22a.

[0178] In the modified example 3-3, as in the modified example 3-1, in order to maintain insulation, it is desirable that the creepage distances between the tip faces 22a3, 23a3, between the first side faces 22a4, 22a5 and the second side faces 23a4, 23a5, and between the rear end faces are longer than in the case of Figure 7 of the first embodiment.

[0179] Furthermore, the second terminal 23 and the third terminal 29 do not have the second oxide film 23b and the third oxide film 29b formed on the leading end surfaces 23a3, 29a3, the second side surfaces 23a4, 23a5, the third side surface, and the rear end surfaces of the second conductive plate 23a and the third conductive plate 29a. Therefore, in order to maintain insulation, the second terminal 23 and the third terminal 29 of Modification 3-3 also desirably have longer creepage distances between the leading end surfaces 23a3, 29a3, between the second side surfaces 23a4, 23a5 and the third side surface, and between the rear end surfaces than in the case of Modification 3-2 shown in FIG. 27 . For example, the leading end surface 23a3 of the second terminal 23 may extend further in the −X direction from the leading end surface 29a3 of the third terminal 29 than in the case of Modification 3-2 shown in FIG. 27 . Furthermore, the second side surfaces 23a4, 23a5 may extend further in the ±Y directions from the third side surface than in Modification 3-2.

[0180] In addition, Figure 28 shows a case where the first bonding area 22a8 of the first terminal 22, the second bonding area 23a8 of the second terminal 23, and the third bonding area 29a8 of the third terminal 29 of the terminal stacking portion 24 of such a semiconductor module 2 are open, as in Figure 27.

[0181] As in Modification 1-1, the first oxide film 22b and the second oxide film 23b corresponding to the first bonding region 22a8 and the second bonding region 23a8 of the first terminal 22 and the second terminal 23 are removed by laser irradiation. Similarly, the third oxide film 29b corresponding to the third bonding region 29a8 of the third terminal 29 is removed by laser irradiation. For example, in the third terminal 29, a range of the third oxide film 29b of the third conductive plate 29a2, which has a predetermined length in the −X direction from the tip surface 29a3 in a plan view and crosses the third side surface, may be removed by laser irradiation. Furthermore, in Modification 3-3, in addition to laser irradiation, the first oxide film 22b, the second oxide film 23b, and the third oxide film 29b may also be removed by grinding with a file or cutting with a milling cutter, as in the first embodiment.

[0182] [Fourth Embodiment] A semiconductor device according to a fourth embodiment will be described with reference to Fig. 29 and Fig. 30. Fig. 29 is a side view of the semiconductor device according to the fourth embodiment, and Fig. 30 is a plan view of the semiconductor device according to the fourth embodiment. Fig. 29 is a side view of the semiconductor device 1 of Fig. 30 as seen in the +Y direction.

[0183] As shown in Fig. 29, the semiconductor device 1 includes a semiconductor module 2 and a bus bar 60. The semiconductor module 2 includes an external connection terminal 27, a control terminal 25, a sense terminal 25e, and a main body 45. The external connection terminal 27, the control terminal 25, and the sense terminal 25e are arranged perpendicular to the front surface of the main body 45. The external connection terminal 27, the control terminal 25, and the sense terminal 25e are electrically connected to the semiconductor chip inside the main body 45. Details of the semiconductor module 2 will be described later. As shown in Fig. 30, three such semiconductor modules 2 are arranged with their long sides parallel to each other.

[0184] In the bus bar 60, a P-type conductive plate and an N-type conductive plate are sealed by a sealing portion 63. The P-type conductive plate and the N-type conductive plate include a first main terminal connection portion 61c and a second main terminal connection portion 62c, respectively. The first external connection portion 61a1 and the second external connection portion 62a1 extend from the side portions of the sealing portion 63 to the outside of the sealing portion 63. The bus bar 60 is also disposed on the three arranged semiconductor modules 2. The external connection terminals 27 of the semiconductor modules 2 are inserted into the bus bar 60, respectively. The external connection terminals 27 are directly connected to the N-type conductive plate and the P-type conductive plate within the bus bar 60, respectively. Details of the bus bar 60 will be described later.

[0185] Next, the semiconductor module 2 will be described with reference to Fig. 31. Fig. 31 is a cross-sectional view of the semiconductor module according to the fourth embodiment. Fig. 31 is a cross-sectional view taken along the dashed dotted line YY in Fig. 30.

[0186] As shown in Figure 31, the semiconductor module 2 includes an insulating circuit board 30, semiconductor chips 34e and 34f, a printed circuit board 46, an external connection terminal 27, a control terminal 25, a sense terminal 25e, and conductive posts 39a and 39b. These components of the semiconductor module 2 are sealed in a main body 45. In the semiconductor module 2, the insulating circuit board 30 is sealed in the main body 45 so that the back surface thereof is exposed. The semiconductor module 2 is molded by the main body 45 to have a substantially cubic shape (rectangular in plan view). However, the upper surface of the short side is tapered.

[0187] The insulating circuit board 30 includes an insulating plate 31, a metal plate 33 provided on the back surface of the insulating plate 31, and wiring plates 32j and 32k provided on the front surface of the insulating plate 31. The insulating plate 31 and the metal plate 33 are rectangular in plan view. The corners of the insulating plate 31 and the metal plate 33 may be round-chamfered or C-chamfered. The area of ​​the metal plate 33 is smaller than the area of ​​the insulating plate 31 in plan view, and the metal plate 33 is formed inside the insulating plate 31.

[0188] The insulating plate 31, the metal plate 33, and the wiring boards 32j and 32k are made of the same materials as the insulating plate 31, the metal plate 33, and the wiring boards 32a to 32h in the first embodiment. The wiring boards 32i and 32k may include wiring boards capable of realizing the functions required for the semiconductor module 2 in the fourth embodiment.

[0189] The semiconductor chip 34e includes a switching element. The switching element is, for example, an IGBT or a power MOSFET. If the semiconductor chip 34e is an IGBT, it has an input electrode (collector electrode) as a main electrode on its back surface, and a control electrode (gate electrode) and an output electrode (emitter electrode) as main electrodes on its front surface. If the semiconductor chip 34e is a power MOSFET, it has an input electrode (drain electrode) as a main electrode on its back surface, and a control electrode (gate electrode) and an output electrode (source electrode) as main electrodes on its front surface. The back surface of the semiconductor chip 34e is bonded to the wiring board 32j by a bonding member (not shown). A conductive post 39a is electrically and mechanically connected to the main electrode on the front surface of the semiconductor chip 34e by the bonding member. Similarly, a conductive post (not shown) is connected to the control electrode on the front surface of the semiconductor chip 34e.

[0190] The semiconductor chip 34f also includes a diode element. The diode element is, for example, a FWD such as an SBD (Schottky Barrier Diode) or a PiN (P-intrinsic-N) diode. The semiconductor chip 34f has an output electrode (cathode electrode) as a main electrode on its back surface and an input electrode (anode electrode) as a main electrode on its front surface. The back surface of the semiconductor chip 34f is bonded to the wiring board 32j by a bonding member (not shown). The conductive post 39b is also electrically and mechanically connected to the main electrode on the front surface of the semiconductor chip 34f by the bonding member, as appropriate.

[0191] The printed circuit board 46 is disposed opposite the horizontally disposed insulating circuit board 30. The printed circuit board 46 includes an insulating plate and multiple upper circuit patterns formed on the front surface of the insulating plate. The printed circuit board 46 also includes multiple lower circuit patterns on the back surface of the insulating plate. Furthermore, the printed circuit board 46 has multiple through-holes formed at predetermined positions from the front surface to the back surface. The external connection terminal 27 and conductive posts 39a, 39b are electrically connected to the upper and lower circuit patterns on the printed circuit board 46 as appropriate. Furthermore, the control terminal 25 and the sense terminal 25e are electrically connected to the printed circuit board 46. The control terminal 25 is electrically connected to the conductive posts 39a, 39b via the upper and lower circuit patterns. The sense terminal 25e is electrically connected to the emitter electrode of the semiconductor chip 34e and the anode electrode of the semiconductor chip 34f via the upper and lower circuit patterns.

[0192] The external connection terminals 27 are press-fitted into the through holes of the printed circuit board 46. The press-fit portions are covered with solder. The external connection terminals 27 are electrically connected to the upper and lower circuit patterns of the printed circuit board 46. One end of the external connection terminals 27 is joined to the wiring boards 32j, 32k of the insulating circuit board 30 via solder. The external connection terminals 27 are columnar, with a circular or rectangular cross section. The external connection terminals 27 are primarily composed of a material with excellent electrical conductivity. Examples of such materials include silver, copper, nickel, or an alloy containing at least one of these. The surfaces of the external connection terminals 27 may be plated to improve corrosion resistance. Examples of plating materials include nickel, nickel-phosphorus alloys, and nickel-boron alloys.

[0193] The control terminal 25 and the sense terminal 25e are press-fitted into through-holes in the printed circuit board 46. The press-fit portions are covered with solder. The control terminal 25 and the sense terminal 25e are electrically connected to the upper and lower circuit patterns of the printed circuit board 46. The control terminal 25 and the sense terminal 25e are pin-shaped and have a circular or rectangular cross section. The lengths of the control terminal 25 and the sense terminal 25e are also sufficiently longer than the lengths of the conductive posts 39a and 39b. The control terminal 25a and the sense terminal 25e are primarily composed of a material with excellent conductivity. Examples of such materials include silver, copper, nickel, or an alloy containing at least one of these. The surfaces of the control terminal 25 and the sense terminal 25e may be plated to improve corrosion resistance. Examples of plating materials include nickel, nickel-phosphorus alloys, and nickel-boron alloys.

[0194] The conductive posts 39a, 39b are press-fitted into the through holes of the printed circuit board 46. The press-fitted portions are covered with solder. The conductive posts 39a, 39b are electrically connected to the upper and lower circuit patterns of the printed circuit board 46. One end of each of the conductive posts 39a, 39b is solder-bonded to the main or control electrodes of the semiconductor chips 34e, 34f. The conductive posts 39a, 39b are columnar, with a circular or rectangular cross section. The length of each of the conductive posts 39a, 39b is sufficiently shorter than the length of the external connection terminal 27. The conductive posts 39a, 39b are primarily composed of a material with excellent conductivity. Examples of such materials include silver, copper, nickel, or an alloy containing at least one of these. The surfaces of the conductive posts 39a, 39b may be plated to improve corrosion resistance. Materials for this plating process include nickel, nickel-phosphorus alloy, nickel-boron alloy, etc. The joining member joining the conductive posts 39a, 39b is solder or a metal sintered body. Lead-free solder is used as the solder. Lead-free solder is primarily composed of an alloy containing at least two of tin, silver, copper, zinc, antimony, indium, and bismuth, for example. The solder may contain additives. Examples of additives include nickel, germanium, cobalt, or silicon. The addition of additives to the solder improves its wettability, gloss, and bonding strength, thereby improving reliability. Examples of metals used in the metal sintered body include silver and silver alloys.

[0195] The lower end sides of the external connection terminals 27, the control terminals 25, and the sense terminals 25e are sealed by the main body 45. In a plan view, the external connection terminals 27, the control terminals 25, and the sense terminals 25e are arranged in a straight line passing through the center along the longitudinal direction on the front surface of the semiconductor module 2. In addition, the conductive posts 39a, 39b are sealed by the main body 45.

[0196] The main body 45 is configured as a sealing member. The sealing member contains a thermosetting resin, such as epoxy resin, phenolic resin, or maleimide resin, and a filler contained in the thermosetting resin. An example of the sealing member for the main body 45 is an epoxy resin containing a filler. The filler is an inorganic filler. Examples of inorganic fillers include silicon oxide, aluminum oxide, boron nitride, and aluminum nitride. The sealing member also contains a release agent in an appropriate amount. Examples of the release agent include wax-based, silicone-based, and fluorine-based release agents. In the semiconductor module 2 sealed with the main body 45, the metal plate 33 of the insulating circuit board 30 is exposed on the back surface. In this case, the metal plate 33 may be flush with the back surface of the main body 45 or may protrude from the back surface.

[0197] A cooling module (not shown) may be attached to the back surface of such a semiconductor module 2 via solder, silver solder, or the like. In this case, the cooling module is screwed into the mounting holes (not shown) of the semiconductor module 2. This improves the heat dissipation of the semiconductor module 2. In this case, the cooling module is made of, for example, a metal with excellent thermal conductivity. Examples of such metals include aluminum, iron, silver, copper, or an alloy containing at least one of these. Furthermore, a heat sink including one or more fins, a water-cooled cooling device, or the like may also be used as the cooling module. The surface of such a cooling module may also be plated to improve corrosion resistance. Examples of plating materials used in this case include nickel, a nickel-phosphorus alloy, and a nickel-boron alloy.

[0198] The semiconductor module 2 simply includes a main body 45 in which the insulating circuit board 30, the semiconductor chips 34e, 34f, the printed circuit board 46, etc. are sealed with a sealing member. The semiconductor module 2 may, for example, house the insulating circuit board 30, the semiconductor chips 34e, 34f, the printed circuit board 46, etc. in a case, the inside of the case is sealed with a sealing member, and the external connection terminals 27, the control terminals 25, the sense terminal 25e, and the conductive posts 39a, 39b extend upward.

[0199] Next, the bus bar 60 will be described with reference to Figs. 32 to 34. Fig. 32 is a plan view of the bus bar of the fourth embodiment, Fig. 33 is a first cross-sectional view of the bus bar of the fourth embodiment, and Fig. 34 is a second cross-sectional view of the bus bar of the fourth embodiment. Fig. 33 is a cross-sectional view taken along dashed dotted line Y-Y in Fig. 32. Figs. 34(A) and (B) are cross-sectional views taken along dashed dotted lines X1-X1 and X2-X2 in Fig. 32, respectively.

[0200] 33, the bus bar 60 includes a sealing portion 63 that seals the laminated body 60a. The laminated body 60a is configured by laminating a P-type conductive portion 61 and an N-type conductive portion 62 in this order from the bottom.

[0201] The bus bar 60 also includes a first main terminal connection portion 61c and a second main terminal connection portion 62c that penetrate the front surface 63a and the back surface 63b of the sealing portion 63. The first main terminal connection portions 61c and the second main terminal connection portions 62c are each arranged (in two rows in total) along the longitudinal direction of the sealing portion 63 (see FIG. 32).

[0202] The P-type conductive portion 61 and the N-type conductive portion 62 are both sheet-shaped (flat). The P-type conductive portion 61 includes a first conductive plate 61a, a first oxide film 61b, and a first main terminal connection portion 61c. The first conductive plate 61a integrally includes a first external connection portion 61a1 and a first wiring portion 61a2. The thickness of the first conductive plate 61a is generally uniform throughout. That is, the thicknesses of the first external connection portion 61a1 and the first wiring portion 61a2 are also generally equal. The first conductive plate 61a is primarily composed of a material with excellent conductivity. Examples of such materials include copper and copper alloys.

[0203] The first wiring portion 61a2 has a rectangular, flat plate shape in a plan view. The first wiring portion 61a2 has a front surface, a back surface, and four side surfaces. The front surface and the back surface are rectangular in a plan view and have the same size. The first wiring portion 61a2 includes at least the area where all of the first main terminal connection portions 61c and second main terminal connection portions 62c shown in FIG. 32 are arranged.

[0204] The first wiring portion 61a2 is attached with the first main terminal connection portion 61c and is electrically connected to the first main terminal connection portion 61c. The first wiring portion 61a2 also has a first through hole 61a3 formed therein, through which the second main terminal connection portion 62c passes without contacting the first wiring portion 61a2. Three such first through holes 61a3 are provided along the side of the first wiring portion 61a2 on the −X direction side in plan view.

[0205] The four side surfaces of the first wiring portion 61a2 are provided surrounding the four sides of the front and back surfaces in order. In a plan view, these side surfaces correspond to a pair of long sides (parallel to the longitudinal direction) and a pair of short sides (parallel to the lateral direction) of the sealing portion 63 shown in FIG. 32 . Of the four side surfaces, the first external connection portion 61a1 is joined to the side surface in the −Y direction (parallel to the lateral direction). The first external connection portion 61a1 extends perpendicular to this side surface (in the −Y direction).

[0206] The first external connection portion 61a1 has a rectangular, flat plate shape in plan view. The width of the first external connection portion 61a1 in the ±X directions is smaller than the width of the first wiring portion 61a2 in the ±X directions. The side surface of the first external connection portion 61a1 in the −Y direction is the end portion of the P-type conduction portion 61 in the −Y direction. The side surface of the first external connection portion 61a1 in the +Y direction is integrally joined to the side surface of the first wiring portion 61a2 in the −Y direction.

[0207] The first oxide film 61b is provided on the surface of the first conductive plate 61a. The first oxide film 61b is provided on the front and back surfaces of the first wiring portion 61a2 and on the side surfaces surrounding these in that order. The first oxide film 61b is provided on the front and back surfaces of the first external connection portion 61a1 and on the side surfaces surrounding these in that order. Note that the first oxide film 61b is not provided on the inside of the first through hole 61a3 of the first wiring portion 61a2. It is sufficient that the first oxide film 61b is provided at least on the surface of the first wiring portion 61a2 of the first conductive plate 61a.

[0208] The first main terminal connection portion 61c is cylindrical and includes an insertion hole into which the external connection terminal 27 is inserted. The first main terminal connection portion 61c is made of a metal with excellent conductivity. Such metals include copper, copper alloy, aluminum, and aluminum alloy. The diameter of the first main terminal connection portion 61c may be smaller than the diameter of the external connection terminal 27. In this case, the external connection terminal 27 can be press-fitted into the first main terminal connection portion 61c. The first main terminal connection portion 61c is electrically and mechanically attached to the first wiring portion 61a2. For example, as shown in FIG. 33 , the first main terminal connection portion 61c is attached perpendicular to the front surface of the first wiring portion 61a2. As shown in FIG. 32 , three first main terminal connection portions 61c are attached linearly along the longitudinal direction of the first wiring portion 61a2. The first main terminal connection portion 61c passes through the laminate 60a and is attached to the first wiring portion 61a2.

[0209] The N-type conductive portion 62 is stacked on the P-type conductive portion 61. The N-type conductive portion 62 includes a second conductive plate 62a, a second oxide film 62b, and a second main terminal connection portion 62c. The second conductive plate 62a integrally includes a second external connection portion 62a1 and a second wiring portion 62a2. The thickness of the second conductive plate 62a is generally uniform. That is, the thicknesses of the second external connection portion 62a1 and the second wiring portion 62a2 are also generally equal. The second conductive plate 62a is primarily composed of a material with excellent conductivity. Examples of such materials include copper and copper alloys.

[0210] The second wiring portion 62a2 has a rectangular, flat plate shape in plan view. The second wiring portion 62a2 has the same shape as the first wiring portion 61a2 in plan view. When the N-type conduction portion 62 is stacked on the P-type conduction portion 61, the second wiring portion 62a2 overlaps the first wiring portion 61a2. The second wiring portion 62a2 has a front surface, a back surface, and four side surfaces. The front surface and the back surface are rectangular in plan view and have the same size. The second wiring portion 62a2 includes at least the area where all of the first main terminal connection portions 61c and second main terminal connection portions 62c shown in FIG. 32 are arranged.

[0211] The second wiring portion 62a2 is electrically connected to the second main terminal connection portion 62c, with the second main terminal connection portion 62c attached thereto. The second wiring portion 62a2 also has a second through-hole 62a3 formed therein, through which the first main terminal connection portion 61c passes without contacting the second wiring portion 62a2. Three such second through-holes 62a3 are provided along the +X-direction side of the second wiring portion 62a2 in plan view.

[0212] Therefore, when the N-type conduction portion 62 is stacked on the P-type conduction portion 61, the first main terminal connection portion 61c of the P-type conduction portion 61 passes through the second through-hole 62a3 of the second wiring portion 62a2. Also, the second main terminal connection portion 62c of the N-type conduction portion 62 passes through the first through-hole 61a3 of the first wiring portion 61a2. Therefore, the first main terminal connection portion 61c is at the same potential as the first conductive plate 61a, and the second main terminal connection portion 62c is at the same potential as the second conductive plate 62a, and different potentials are maintained between the first main terminal connection portion 61c and the second main terminal connection portion 62c.

[0213] The four side surfaces of the second wiring portion 62a2 are provided surrounding the four sides of the front and back surfaces in order. In a plan view, these side surfaces correspond to a pair of long sides (parallel to the longitudinal direction) and a pair of short sides (parallel to the lateral direction) of the sealing portion 63 shown in FIG. 32 . Of the four side surfaces, the second external connection portion 62a1 is joined to the side surface in the −Y direction (parallel to the lateral direction). The second external connection portion 62a1 extends perpendicular to this side surface (in the −Y direction).

[0214] The second external connection portion 62a1 has a rectangular, flat plate shape in plan view. The second external connection portion 62a1 may have the same shape and size as the first external connection portion 61a1. The width of the second external connection portion 62a1 in the ±X directions is smaller than the width of the second wiring portion 62a2 in the ±X directions. The side surface of the second external connection portion 62a1 in the −Y direction is the end portion of the N-type conduction portion 62 in the −Y direction. The side surface of the second external connection portion 62a1 in the −Y direction is integrally joined to the side surface of the second wiring portion 62a2 in the −Y direction. Therefore, when the N-type conduction portion 62 is stacked on the P-type conduction portion 61, the second external connection portion 62a1 does not overlap the first external connection portion 61a1 in plan view.

[0215] The second oxide film 62b is provided on the surface of the second conductive plate 62a. The second oxide film 62b is provided on the front and back surfaces of the second wiring portion 62a2 and on the side surfaces surrounding these in that order. The second oxide film 62b is provided on the front and back surfaces of the second external connection portion 62a1 and on the side surfaces surrounding these in that order. Note that the second oxide film 62b is not provided inside the second through hole 62a3 of the second wiring portion 62a2. Furthermore, it is sufficient that the first oxide film 61b is provided at least on the surface of the first wiring portion 61a2 of the first conductive plate 61a.

[0216] The second main terminal connection portion 62c is cylindrical and includes an insertion hole into which the external connection terminal 27 is inserted. The second main terminal connection portion 62c is made of a metal with excellent conductivity. Examples of such metals include copper, copper alloy, aluminum, and aluminum alloy. The diameter of the second main terminal connection portion 62c may be smaller than the diameter of the external connection terminal 27. In this case, the external connection terminal 27 can be press-fitted into the second main terminal connection portion 62c. The second main terminal connection portion 62c is electrically and mechanically attached to the second wiring portion 62a2. For example, as shown in FIG. 33 , the second main terminal connection portion 62c is attached perpendicular to the front surface of the second wiring portion 62a2. As shown in FIG. 32 , three second main terminal connection portions 62c are attached linearly along the longitudinal direction. The second main terminal connection portions 62c penetrate the laminate 60a and are attached to the second wiring portion 62a2.

[0217] The sealing portion 63 seals the laminate 60a. The sealing portion 63 has a substantially cubic shape. The corners and sides of the sealing portion 63 may be rounded or chamfered. The sealing portion 63 seals the laminate 60a except for the first main terminal connection portion 61c and the second main terminal connection portion 62c, which are multiple insertion holes into which the external connection terminals 27 are respectively inserted, and the first external connection portion 61a1 of the P-type conduction portion 61 and the second external connection portion 62a1 of the N-type conduction portion 62. That is, the first main terminal connection portion 61c and the second main terminal connection portion 62c penetrate the front surface 63a and the back surface 63b of the sealing portion 63. The sealing portion 63 also seals the periphery of the second main terminal connection portion 62c, which penetrates the first through-hole 61a3 of the first conductive plate 61a. The sealing portion 63 also seals the periphery of the first main terminal connection portion 61c that passes through the second through-hole 62a3 of the second conductive plate 62a.

[0218] Pedestal portions 60b are formed on the front surface 63a and the back surface 63b of the sealing portion 63 at the locations where the first main terminal connection portion 61c and the second main terminal connection portion 62c pass through. The pedestal portions 60b protrude vertically beyond the front surface 63a and the back surface 63b and are configured to be thicker than the thickness between the front surface 63a and the back surface 63b. The sealing portion 63 is configured of a sealing material similar to that of the main body 45.

[0219] As described above, in this bus bar 60, the first oxide film 61b and the second oxide film 62b are used as insulating members between the first wiring portion 61a2 of the P-type conduction portion 61 and the second wiring portion 62a2 of the N-type conduction portion 62. This provides the same effects as in the first embodiment. Furthermore, when joining external terminals to the P-type conduction portion 61 and the N-type conduction portion 62 of the laminate 60a of this bus bar 60, similar to the second embodiment, the external terminals are placed on the first external connection portion 61a1 of the P-type conduction portion 61 and the second external connection portion 62a1 of the N-type conduction portion 62, respectively, and laser irradiation is performed similar to the second embodiment, thereby joining the external terminals to the P-type conduction portion 61 and the N-type conduction portion 62, respectively.

[0220] The foregoing merely illustrates the principles of the present invention. Further, since numerous modifications and changes will be apparent to those skilled in the art, the present invention is not limited to the exact construction and application shown and described above, and all corresponding modifications and equivalents are deemed to be within the scope of the present invention as defined by the appended claims and their equivalents.

[0221] REFERENCE SIGNS LIST 1 semiconductor device 2 semiconductor module 3 semiconductor unit 4 capacitor 20 case 21 frame portion 21a, 21b, 21c, 21d first to fourth side portions 21e1, 21e2, 21e3 storage area 21f top surface 21g bottom surface 22 first terminal (P terminal) 22a first conductive plate 22a1 first connection portion 22a2 first wiring portion 22a3 tip surface 22a4, 22a5 first side surface 22a6 first front surface 22a7 first back surface 22a8 first bonding region 22b first oxide film 22b1 coating layer 221 first bonding portion 222 terrace portion 22c clad material 22c1 clad film 22c2 conductive plate 23 second terminal (N terminal) 23a second conductive plate 23a1 Second connection portion 23a2 Second wiring portion 23a3 Tip surface 23a4, 23a5 Second side surface 23a6 Second front surface 23a7 Second back surface 23a8 Second bonding region 23b Second oxide film 231 Second bonding portion 24 Terminal stack portion 25, 25a, 25b, 25c Control terminal 25e Sense terminal 26 Output terminal 26a U terminal 26b V terminal 26c W terminal 27, 27a, 27b External connection terminal 28 Output terminal 29 Third terminal 29a Third conductive plate 29a2 Third wiring portion 29a3 Tip surface 29a6 Third front surface 29a7 Third back surface 29a8 Third bonding region 29b Third oxide film 30 Insulated circuit board 31 Insulating plate 31a, 31c Long sides 31b, 31d Short sides 32a, 32b, 32c, 32d, 32e, 32f, 32g, 32h, 32i, 32j, 32k Wiring board 33 Metal plate 34a, 34b, 34c, 34d, 34e, 34f Semiconductor chip 35a, 35b, 35c, 35d Lead frame 36 Sealing member 37 Heat sink 39a, 39b Conductive post 40 Case 40a Lid 40b Storage case 40c First side surface 41, 41a, 41b, 41c Connecting member 42a,42b Laser weld mark 43 First connection terminal 43a First connection portion 43b Second connection portion 43c Third connection portion 44 Second connection terminal 45 Main body 46 Printed circuit board 47 Insulating sheet 47a First mounting portion 47b Second mounting portion 47c Third mounting portion 431 First connection conducting portion 432 First connection wiring portion 441 Second connection conducting portion 442 Second connection wiring portion 443 Third joint portion 50 Coating container 51 Solution 60 Bus bar 60a Laminated body 60b Pedestal portion 61 P-type conducting portion 61a First conductive plate 61a1 First external connecting portion 61a2 First wiring portion 61a3 First through hole 61b First oxide film 61c First main terminal connecting portion 62 N-type conducting portion 62a Second conductive plate 62a1 Second external connection portion 62a2 Second wiring portion 62a3 Second through hole 62b Second oxide film 62c Second main terminal connection portion 63 Sealing portion 63a Front surface 63b Back surface

Claims

1. An electronic module comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate primarily composed of copper or a copper alloy, having a main surface facing the first conductive plate and a side surface continuing from the main surface; and a metal oxide layer provided on the main surface and the side surface of the second conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the second conductive plate.

2. The electronic module described in claim 1, wherein the first conductive plate has a main surface facing the second conductive plate and a side surface continuing from the main surface, and a metal oxide layer is provided on the main surface and the side surface of the first conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the first conductive plate.

3. The electronic module described in claim 2, comprising: a third conductive plate having a main surface facing the second conductive plate and a side surface continuing from the main surface, the third conductive plate being composed mainly of copper or a copper alloy; and a metal oxide layer provided on the main surface and the side surface of the third conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the third conductive plate.

4. The electronic module according to claim 3, wherein the metal oxide layer provided on the main surface and the side surface of the first conductive plate, the second conductive plate or the third conductive plate respectively includes aluminum oxide.

5. The electronic module according to claim 3, wherein the thickness of the metal oxide layer provided on the main surface and the side surface of each of the first conductive plate, the second conductive plate, or the third conductive plate is 20 μm or more.

6. An electronic module as described in claim 1 or 2, wherein a portion of an end of the first conductive plate extends outward beyond the second conductive plate and is provided with a first bonding region at the end where the surface of the first conductive plate is exposed.

7. An electronic module as described in claim 1 or 2, wherein the main surface of the second conductive plate is provided on the other main surface opposite the second conductive plate, and is provided with a metal oxide layer which is electrically insulating and contains a metal oxide of an element different from the metal of the second conductive plate, and wherein the surface of the second conductive plate is provided with a second bonding region where the surface of the second conductive plate is exposed.

8. The electronic module according to claim 3, further comprising a third bonding region provided on another main surface of the third conductive plate opposite to the main surface, the third conductive plate being electrically insulating and including a metal oxide layer containing a metal oxide of an element different from the metal of the third conductive plate, the third conductive plate having an exposed surface.

9. The electronic module as claimed in claim 1, further comprising: a bus bar comprising: the first conductive plate having a first external connection portion at an end thereof; and the second conductive plate having a second external connection portion at an end thereof; the first conductive plate and the second conductive plate being laminated together, the bus bar having a plurality of insertion holes into which a plurality of external connection terminals are inserted, and a sealing member which seals the first conductive plate and the second conductive plate except for the plurality of insertion holes, the first external connection portion, and the second external connection portion.

10. An electronic module comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate having a main surface facing the first conductive plate and primarily composed of copper or a copper alloy; and a metal oxide layer provided on the main surface of the second conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the second conductive plate.

11. An electronic device comprising: a first conductive plate primarily composed of copper or a copper alloy; a second conductive plate primarily composed of copper or a copper alloy, having a main surface facing the first conductive plate, a side surface continuing from the main surface, and another main surface opposite to the main surface; a first electronic module comprising a metal oxide layer provided on the main surface, the side surface, and the other main surface of the second conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the second conductive plate; and a fourth conductive plate primarily composed of copper or a copper alloy and joined to the second conductive plate, wherein the joint between the second conductive plate and the fourth conductive plate includes a weld mark penetrating the metal oxide layer.

12. The electronic device described in claim 11, wherein the first conductive plate has a main surface facing the second conductive plate, a side surface continuing from the main surface, and another main surface opposite to the main surface, and further comprises a metal oxide layer provided on the main surface, the side surface, and the other main surface of the first conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the first conductive plate, and further comprises a fifth conductive plate joined to the first conductive plate and containing copper or a copper alloy as a main component, and the joint between the first conductive plate and the fifth conductive plate includes a weld mark penetrating the metal oxide layer.

13. An electronic device comprising: a first conductive plate mainly composed of copper or a copper alloy; a second conductive plate mainly composed of copper or a copper alloy, having a main surface facing the first conductive plate, a side surface continuing from the main surface, and another main surface opposite to the main surface; a first electronic module comprising a metal oxide layer provided on the main surface, the side surface, and the other main surface of the second conductive plate, which is electrically insulating and contains a metal oxide of an element different from the metal of the second conductive plate; and a fourth conductive plate mainly composed of copper or a copper alloy and bonded to the second conductive plate, wherein the bonded portion between the second conductive plate and the fourth conductive plate includes a weld mark passing through an open area of ​​the metal oxide layer provided on the other main surface of the second conductive plate.

14. The electronic device described in claim 13, wherein the first conductive plate has a main surface facing the second conductive plate, a side surface continuing from the main surface, and another main surface opposite to the main surface, and further comprises a metal oxide layer provided on the main surface, the side surface, and the other main surface of the first conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the first conductive plate, and further comprises a fifth conductive plate joined to the first conductive plate and containing copper or a copper alloy as a main component, and the joint between the first conductive plate and the fifth conductive plate includes a weld mark passing through an open area of ​​the metal oxide layer provided on the main surface of the first conductive plate.

15. The electronic device according to any one of claims 11 to 14, wherein the welding marks are laser welding marks.

16. An electronic device comprising: a first conductive plate mainly composed of copper or a copper alloy; a second conductive plate mainly composed of copper or a copper alloy, having a main surface facing the first conductive plate and another main surface opposite to the main surface; a second electronic module comprising a metal oxide layer provided on the main surface and the other main surface of the second conductive plate, the metal oxide layer being electrically insulating and containing a metal oxide of an element different from the metal of the second conductive plate; and a fourth conductive plate mainly composed of copper or a copper alloy and joined to the second conductive plate, wherein the joint between the second conductive plate and the fourth conductive plate includes a weld mark that penetrates the metal oxide layer.

17. An electronic device comprising: a first conductive plate mainly composed of copper or a copper alloy; a second conductive plate mainly composed of copper or a copper alloy, having a main surface facing the first conductive plate and another main surface opposite to the main surface; a second electronic module provided on the main surface and the other main surface of the second conductive plate, with a metal oxide layer that is electrically insulating and contains a metal oxide of an element different from the metal of the second conductive plate; and a fourth conductive plate mainly composed of copper or a copper alloy and bonded to the second conductive plate, wherein the bonded portion between the second conductive plate and the fourth conductive plate includes a weld mark that passes through an open area of ​​the metal oxide layer provided on the other main surface of the second conductive plate.

18. A method for manufacturing an electronic module, comprising: a preparation step of preparing a first conductive plate mainly composed of copper or a copper alloy; and a second conductive plate mainly composed of copper or a copper alloy, having a main surface facing the first conductive plate and a side surface continuing from the main surface; a coating step of forming a coating layer provided on the main surface and the side surface of the second conductive plate, the coating layer containing an element different from the metal of the first conductive plate; and an oxidation step of oxidizing the coating layer to form an electrically insulating metal oxide layer.

19. The method for manufacturing an electronic module according to claim 18, wherein the oxidation step is performed by anodization.

20. The method for manufacturing an electronic module according to claim 19, wherein the element different from the metal of the second conductive plate is aluminum.

21. A method for manufacturing an electronic module, comprising: a first preparation step of preparing a first terminal in which the upper and lower surfaces of a first conductive plate made primarily of copper or a copper alloy are covered with an electrically insulating coating layer containing an element different from the metal of the first conductive plate; a second preparation step of preparing a second terminal in which the upper and lower surfaces of a second conductive plate made primarily of copper or a copper alloy are covered with an electrically insulating coating layer containing an element different from the metal of the first conductive plate; a step of overlapping the first terminal and the second terminal; and a step of fixing the first terminal and the second terminal in a resin case.