Wiring board and semiconductor device
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2024-10-31
- Publication Date
- 2026-07-23
AI Technical Summary
Conventional wiring boards face challenges with thermal expansion issues due to resin fillers, leading to potential electrical conduction failures and reduced strength with increased through-hole density.
The proposed wiring board incorporates a ceramic first substrate and an organic resin second substrate, with through holes filled with a metal conductor. This configuration reduces thermal expansion mismatch and enhances structural integrity.
The solution achieves high electrical reliability and flexibility in designing finer wiring patterns, while maintaining structural strength even with increased through-hole density, thus overcoming the limitations of conventional wiring boards.
Abstract
Description
Wiring board and semiconductor device
[0001] The present disclosure relates to a wiring substrate and a semiconductor device.
[0002] 2. Description of the Related Art A wiring board is known in which an organic substrate on which wiring is formed is laminated on a glass cloth substrate as a core material.
[0003] A through-hole portion is formed in the glass cloth substrate, and the through-hole portion includes a through hole penetrating the glass cloth substrate, a plating film covering the inner wall of the through hole, and a resin filled inside the through hole (see Patent Document 1).
[0004] JP 2023-111608 A
[0005] A wiring board according to one aspect of the present disclosure includes a first substrate made of ceramic, a second substrate made of organic resin bonded to the first substrate, a first wiring located on the first substrate, and a second wiring located on the second substrate. The first wiring has a through hole penetrating the first substrate and a conductor mainly composed of metal located inside the through hole. The inside of the through hole is filled with the conductor.
[0006] Fig. 1 is a schematic cross-sectional view showing a state in which a semiconductor device according to an embodiment is mounted on a motherboard. Fig. 2 is a schematic cross-sectional view showing the configuration of a wiring substrate according to an embodiment. Fig. 3 is a schematic enlarged view of region III shown in Fig. 2. Fig. 4 is a schematic enlarged view of region IV shown in Fig. 2. Fig. 5 is an enlarged cross-sectional view showing another example of a wiring substrate according to an embodiment.
[0007] Hereinafter, embodiments for carrying out a wiring board and a semiconductor device according to the present disclosure (hereinafter referred to as "embodiments") will be described in detail with reference to the drawings. Note that the present disclosure is not limited to these embodiments. Furthermore, the embodiments can be appropriately combined as long as the processing content is not contradictory. Furthermore, the same components in the following embodiments will be assigned the same reference numerals, and redundant explanations will be omitted.
[0008] Furthermore, in the following embodiments, expressions such as "constant," "orthogonal," "perpendicular," or "parallel" may be used, but these expressions do not necessarily mean "constant," "orthogonal," "perpendicular," or "parallel" in the strict sense. In other words, the above expressions allow for deviations due to, for example, manufacturing precision or installation precision.
[0009] In addition, in the drawings referred to below, for ease of understanding, an orthogonal coordinate system may be shown in which the X-axis direction, Y-axis direction, and Z-axis direction, which are perpendicular to each other, are defined, and the positive Z-axis direction is the vertically upward direction.
[0010] First, the configuration of a semiconductor device 100 according to the embodiment will be described with reference to Fig. 1. Fig. 1 is a schematic cross-sectional view showing a state in which the semiconductor device 100 according to the embodiment is mounted on a motherboard 4.
[0011] As shown in FIG. 1, the semiconductor device 100 includes a wiring substrate 1 , a plurality of semiconductor elements 2 , and an intermediate substrate 3 .
[0012] The wiring board 1 is mounted on a motherboard 4. The wiring board 1 according to the embodiment has a ceramic base material as a core material. Details of the wiring board 1 will be described later.
[0013] The semiconductor element 2 is mounted on the wiring substrate 1 via an intermediate substrate 3. The semiconductor element 2 is, for example, a chip or chiplet in which a circuit or element is formed on a substrate made of a material other than a semiconductor, such as a semiconductor chip or a glass substrate. The chiplet is a functional block that constitutes part of the integrated circuit of the semiconductor device 100.
[0014] 1 shows two semiconductor elements 2, the semiconductor device 100 may include three or more semiconductor elements. The semiconductor device 100 may also include only one semiconductor element 2. For example, if the semiconductor element 2 is a chiplet, a plurality of semiconductor elements 2 may form an integrated circuit having one function.
[0015] The relay substrate 3 is a so-called interposer, and relays the electrical connection between the wiring substrate 1 and the semiconductor element 2. The relay substrate 3 is joined to the semiconductor element 2 via a joint 5, and is joined to the wiring substrate 1 via a joint 6. The joints 5 and 6 are, for example, solder. The Young's modulus of the relay substrate 3 may be smaller than that of the wiring substrate 1. In this case, the relay substrate 3 may have flexibility that allows it to deform according to the shape of the surface of the wiring substrate 1.
[0016] Next, the configuration of the wiring board 1 according to the embodiment will be described with reference to Fig. 2. Fig. 2 is a schematic cross-sectional view showing the configuration of the wiring board 1 according to the embodiment.
[0017] The wiring board 1 has a first base material 10 and a second base material 20. The wiring board 1 is a laminate of the first base material 10 and the second base material 20. The wiring board 1 also has a first wiring 30 and a second wiring 40.
[0018] <First Substrate> The first substrate 10 is a substrate made of ceramic. The first substrate 10 may be formed using a ceramic composite material containing a glass component, so-called glass ceramic. The glass ceramic may be any of a composite of a glass phase and ceramic particles, a composite of a glass phase and a crystalline phase formed by crystallization of a portion of the glass phase, a form in which ceramic particles exist in a glass phase, and a form in which a glass phase exists at the grain boundaries between ceramic particles.
[0019] For example, the first substrate 10 may be made of low temperature co-fired ceramics (LTCC). When LTCC is used as the first substrate 10, a low-melting-point metal such as copper or silver, which has a relatively low electrical resistance, can be used as wiring. In this embodiment, the low-melting-point metal is a metal with a melting point lower than that of typical metals used for wiring in ceramic substrates, such as tungsten or molybdenum.
[0020] The first substrate 10 may contain a ceramic filler as ceramic particles. Examples of the ceramic filler that can be used include alumina (aluminum oxide), calcium titanate, and magnesium titanate. In particular, the first substrate 10 containing alumina has high rigidity.
[0021] The first substrate 10 has a first surface 101 and a second surface 102 located on the opposite side to the first surface 101. The first substrate 10 may be a plate-like body having the first surface 101 and the second surface 102 as main surfaces.
[0022] In the embodiment, the first substrate 10 has a plurality of ceramic layers 11. The plurality of ceramic layers 11 are stacked along the thickness direction of the first substrate 10. A wiring board 1 having such a first substrate 10 has a high degree of freedom in design. Furthermore, by forming the first substrate 10 using a plurality of ceramic layers 11, the first substrate 10 can be manufactured while checking whether the first wiring 30 is properly formed for each layer, thereby improving the yield of the first substrate 10.
[0023] 1 and 2, the first substrate 10 has four ceramic layers 11, but the number of ceramic layers 11 is not limited to four. The number of ceramic layers 11 may be two, three, or five or more.
[0024] <Second Base Material> The second base material 20 is a base material containing an organic component. The organic component may be an organic resin. The organic resin may be, for example, an epoxy resin, an acrylic resin, a polycarbonate resin, a polyimide resin, an olefin resin, or a polyphenylene resin.
[0025] The organic resin may be, for example, polytetrafluoroethylene (PTFE) or other fluororesins or polyphenylene ether resins. The second substrate 20 may contain components other than the organic resin. In the present disclosure, the organic resin may be, for example, a material that accounts for 30% by mass or more of the material that constitutes the second substrate 20.
[0026] The second substrate 20 has a third surface 103 and a fourth surface 104 located on the opposite side to the third surface 103. The second substrate 20 may be a plate-like body having the third surface 103 and the fourth surface 104 as main surfaces.
[0027] The wiring board 1 according to the embodiment has two second substrates 20. One of the two second substrates 20 is bonded to the first surface 101 of the first substrate 10, and the other is bonded to the second surface 102 of the first substrate 10.
[0028] The second substrate 20, located on the first surface 101 of the first substrate 10, has a third surface 103 bonded to the first surface 101 of the first substrate 10, and multiple semiconductor elements 2 are placed on a fourth surface 104 of the second substrate 20 via an intermediate substrate 3 (see Figure 1).
[0029] The second substrate 20 located on the second surface 102 of the first substrate 10 has a third surface 103 joined to the first surface 101 of the first substrate 10, and a fourth surface 104 of the second substrate 20 joined to the motherboard 4 via the joint 7.
[0030] The second base material 20 has a plurality of organic resin layers 21. The plurality of organic resin layers 21 are stacked along the thickness direction of the second base material 20. A wiring board 1 having such a second base material 20 has a high degree of freedom in design. In the example shown in FIG. 2 , the second base material 20 has two organic resin layers 21, but the number of organic resin layers 21 is not limited to two. The number of organic resin layers 21 may be one or three or more.
[0031] 1 and 2 show an example in which the wiring board 1 has the second base material 20 on each of both main surfaces (first surface 101 and second surface 102) of the first base material 10. However, the wiring board 1 is not limited to this, and it is sufficient that the wiring board 1 has the second base material 20 on at least the first surface 101 of the first base material 10.
[0032] The second substrate 20 containing an organic component is easier to form a fine wiring pattern on than an inorganic substrate. On the other hand, the first substrate 10 made of ceramic has higher rigidity and lower density than the second substrate 20.
[0033] The wiring board 1 according to the embodiment can increase rigidity while achieving finer wiring and narrower pitches by combining the first substrate 10 and the second substrate 20. Since warping of the board becomes more pronounced as the board becomes larger, the configuration of the wiring board 1 in which the first substrate 10 compensates for the low rigidity of the second substrate 20 is particularly useful for increasing the size of the board.
[0034] The first substrate 10 and the second substrate 20 are bonded together by, for example, hydrogen bonding. Specifically, the first substrate 10 and the second substrate 20 are bonded together by bonding between hydroxyl groups on the first substrate 10 and the second substrate 20. In this case, a ceramic material such as alumina having surface hydroxyl groups may be used for the first substrate 10, and an epoxy resin, which is a resin material containing hydroxyl groups, may be used for the second substrate 20. By directly bonding the first substrate 10 and the second substrate 20 in this way without using solder, underfill, or the like, the thickness of the wiring board 1 can be reduced and the manufacturing process can be simplified.
[0035] <First Wiring> The first wiring 30 is a through-hole conductor located in the first substrate 10. Specifically, the first wiring 30 has a through hole 31 that penetrates the first substrate 10, and a conductor 32. The conductor 32 is mainly composed of metal and is located inside the through hole 31.
[0036] The first wiring 30 has lands 33 on the first surface 101 and the second surface 102 of the first substrate 10. The first wiring 30 will be described in detail later.
[0037] <Second Wiring> The second wiring 40 has a plurality of vias 41 and one or more wiring layers 42. The vias 41 penetrate one or more organic resin layers 21. The wiring layers 42 are located between adjacent organic resin layers 21 and electrically connect the plurality of vias 41 to each other. The second wiring 40 may have a land portion located on the fourth surface 104 of the second base material 20.
[0038] The first wiring 30 and the second wiring 40 may be, for example, a metal conductor whose main component is copper or silver. For example, both the first wiring 30 and the second wiring 40 may be a metal conductor whose main component is copper. Alternatively, both the first wiring 30 and the second wiring 40 may be a metal conductor whose main component is silver. Alternatively, one of the first wiring 30 and the second wiring 40 may be a metal conductor whose main component is copper, and the other may be a metal conductor whose main component is silver.
[0039] By making all of the first wiring 30 and the second wiring 40 metal conductors whose main component is copper or silver, it is possible to obtain higher electrical characteristics compared to, for example, when one of the first wiring 30 and the second wiring 40 is made of a metal conductor other than copper or silver.
[0040] The second wiring 40 may be electrically and thermally connected to the semiconductor element 2 via the relay substrate 3. By thermally connecting the second wiring 40, which is mainly composed of copper or silver, which has a relatively high thermal conductivity, to the semiconductor element 2, which serves as a heat source, the heat generated from the semiconductor element 2 can be efficiently dissipated via the second wiring 40 and the first wiring 30.
[0041] Patent Document 1 discloses a wiring board in which resin is filled into through holes formed in a glass cloth substrate. The thermal expansion coefficient of the resin is higher than that of the glass cloth substrate, and the difference is relatively large. Therefore, when the temperature of the wiring board increases, the resin expands thermally and escapes from the through holes. This may cause the resin to push up against the wiring on the organic substrate, resulting in insufficient electrical conduction between the wiring on the organic substrate and the plating film. Furthermore, because the strength of the resin filler is relatively low, the greater the number of through holes formed in the glass cloth substrate, the more difficult it becomes to maintain the strength of the glass cloth substrate.
[0042] Therefore, in the wiring board 1 according to the embodiment, the interior of the through hole 31 formed in the first substrate 10 is filled with a conductor 32 primarily composed of metal. The conductor 32 primarily composed of metal has a lower thermal expansion coefficient than a resin filler. Furthermore, the difference between the thermal expansion coefficient of the ceramic first substrate 10 and the thermal expansion coefficient of the conductor 32 primarily composed of metal is smaller than the difference between the thermal expansion coefficient of the glass cloth substrate and the thermal expansion coefficient of the resin filler. Therefore, even if the conductor 32 thermally expands, the conductor 32 is less likely to push up against the second wiring 40, and electrical continuity between the second wiring 40 and the first wiring 30 is less likely to be interrupted, compared to conventional wiring boards. Therefore, the wiring board 1 according to the embodiment has high electrical reliability.
[0043] Furthermore, in conventional wiring boards, if a via is included in the wiring on the organic substrate and the via is located in a position offset from directly above the through hole, when the resin filler thermally expands, the force of the thermally expanded filler pushing up against the via is concentrated on one side of the via, making it easy for the wiring on the organic substrate to peel off. In contrast, in the wiring board 1 according to the embodiment, the force of the first wiring 30 pushing up against the second wiring 40 is unlikely to be generated. Therefore, even if the second wiring 40 includes a via and the via is located in a position offset from directly above the through hole, peeling of the second wiring 40 is unlikely to occur. Therefore, the wiring board 1 according to the embodiment provides greater freedom in wiring design than conventional wiring boards.
[0044] Furthermore, because the strength of the resin filler is relatively low, the greater the number of first wirings, the more difficult it becomes to maintain the strength of the glass cloth substrate. In contrast, in the wiring board 1 according to the embodiment, the interior of the through hole 31 is filled with the metal conductor 32, so compared to conventional wiring boards, the strength of the first substrate 10 is more easily maintained even if the number of first wirings 30 formed on the first substrate 10 increases. Therefore, the wiring board 1 according to the embodiment has a high degree of freedom in wiring design.
[0045] Next, a detailed configuration of the first wiring 30 according to the embodiment will be described with reference to Fig. 3. Fig. 3 is a schematic enlarged view of region III shown in Fig. 2. Fig. 3 shows the first wiring 30 located in the center of the wiring substrate 1 according to the embodiment.
[0046] As shown in Fig. 3, the conductor 32 (see Fig. 2) has a plurality of vias 34 and a plurality of lands 35. The vias 34 are filled in the through holes 31. For example, a metal conductor containing copper as a main component may be used for the vias 34. Alternatively, a metal conductor containing silver or aluminum as a main component may be used for the vias 34. The lands 35 are located around the through holes 31 between two adjacent ceramic layers 11.
[0047] By positioning the lands 35 in this manner, the lands 35 catch on the ceramic layer when the conductors 32 thermally expand, making it even more difficult for the vias 34 to protrude from the first substrate 10. Therefore, compared to conventional wiring boards, the force that pushes up the second wiring 40 is even less likely to occur.
[0048] The conductor 32 of the first wiring 30 may contain a glass component 36. In other words, of the first wiring 30 and the second wiring 40, only the first wiring 30 may contain the glass component 36. With this configuration, the first substrate 10 and the conductor 32 are firmly bonded via the glass component 36, which makes it difficult for gaps to form between the through-hole 31 of the first substrate 10 and the conductor 32, and makes it difficult for moisture to penetrate into the first substrate 10. A conductor (copper) containing the glass component 36 has an even smaller thermal expansion coefficient than a conductor (copper) not containing a glass component, and therefore is even less likely to generate a force that pushes up the second wiring 40.
[0049] Furthermore, if the conductor 32 of the first wiring 30 contains a glass component 36, the shrinkage rates of the first substrate 10 and the first wiring 30 can be made to be somewhat uniform during the firing process when manufacturing the wiring board 1, making it less likely that the first wiring 30 will be misaligned.
[0050] The first wiring 30 may be formed, for example, by screen-printing a conductive paste containing copper and glass components onto a green sheet that is the raw material of the ceramic layer 11, and firing the green sheet simultaneously with the green sheet. Specifically, the conductive paste may contain, for example, copper powder, borosilicate glass powder, and silica particles.
[0051] On the other hand, the second wiring 40 may be formed by copper plating, which allows the first wiring 30 and the second wiring 40 to have a configuration in which only the first wiring 30 contains a glass component.
[0052] As described above, the first substrate 10 has multiple ceramic layers 11. In conventional wiring boards, if the glass core is formed thick to increase rigidity, attempts to fill the through holes in the glass core with conductors by plating can result in air bubbles and make it difficult to fill them properly. In contrast, according to the wiring board 1 of the embodiment, the first substrate 10 is formed using multiple ceramic layers 11, and conductors 32 are embedded in each ceramic layer. This makes it easy to fill the through holes 31 with conductors 32, even when the first substrate 10 is formed thick to increase rigidity.
[0053] Furthermore, the decrease in bonding strength between the first substrate 10 and the second substrate 20 at the outer periphery becomes more pronounced as the size of the wiring board 1 increases. According to the wiring board 1 having the above effects, the second wiring is less likely to be pushed up at the outer periphery, and therefore the wiring board 1 can be easily increased in size compared to conventional wiring boards 1.
[0054] Furthermore, the via 41 located closest to the first substrate 10 among the multiple vias 41 included in the second wiring 40 may be located at a position offset from the through-hole 31 of the first substrate 10 in a plan view. For example, in the example shown in Fig. 3, the via 41a located closest to the first substrate 10 is located at a position offset in the negative direction of the X-axis from the through-hole 31 of the first substrate 10.
[0055] In the wiring board 1 according to the embodiment, peeling of the second wiring 40 is unlikely to occur, and therefore it is easy to arrange the via 41 of the second wiring 40 in a position shifted from directly above the through hole 31. Therefore, the wiring board 1 according to the embodiment has a higher degree of freedom in wiring design compared to conventional wiring boards.
[0056] As shown in FIG. 3 , the first substrate 10 may contain a glass component 15, and the second substrate 20 may contain a coupling agent that chemically bonds with the glass component 15. The glass component 15 may be, for example, silica. A silane coupling agent may be used as the coupling agent. Alternatively, a titanium-based coupling agent or an aluminum-based coupling agent may be used as the coupling agent. With this configuration, the first substrate 10 and the second substrate 20 are chemically bonded together, thereby more firmly bonding the first substrate 10 and the second substrate 20, which are made of different materials.
[0057] Fig. 4 is a schematic enlarged view of region IV shown in Fig. 2. Fig. 4 shows the configuration of the first wiring 30 located on the outer periphery of the wiring substrate 1 according to the embodiment.
[0058] 4, the conductor 32 may have a conductor portion located on one of the plurality of ceramic layers 11 and a conductor portion located on another ceramic layer 11 adjacent to the one ceramic layer that are offset in the in-plane direction of the first substrate 10. In the example shown in FIG. 4, the conductor portion 32a located on one ceramic layer 11 and the conductor portion 32b located on the other ceramic layer 11 adjacent to the one ceramic layer 11 are offset in the X-axis direction, which is the in-plane direction of the first substrate 10, causing a wobble in the conductor 32. Note that the through holes 31 located on the outer periphery of the wiring board 1 also have a wobble similar to the conductor 32.
[0059] Because the conductor 32 has looseness in this way, the conductor 32 is caught on the ceramic layer 11 when the conductor 32 thermally expands, making it even more difficult for the conductor 32 to protrude from the first substrate 10. Therefore, compared to conventional wiring boards, a force that pushes up the second wiring 40 is less likely to occur.
[0060] 3 and 4, the straightness of the first wiring 30 located on the outer periphery of the first substrate 10 is smaller than the straightness of the first wiring 30 located in the center of the first substrate 10. Straightness refers to the degree of deviation from an imaginary line along the axial direction (Z-axis direction) of the first wiring 30. In this specification, "high straightness" means that the deviation from the imaginary line is small, that is, the wiring is positioned more linearly. On the other hand, "low straightness" means that the deviation from the imaginary line is large.
[0061] Specifically, as shown in FIG. 3 , the first wiring 30 located in the central portion of the first substrate 10 has a small deviation from the virtual line C1 along the axial direction (Z-axis direction) of the first wiring 30. That is, the straightness of the first wiring 30 in the central portion of the first substrate 10 is large. On the other hand, as shown in FIG. 4 , the first wiring 30 located in the outer periphery of the first substrate 10 has a large deviation from the virtual line C2 along the axial direction (Z-axis direction) of the first wiring 30. That is, the straightness of the first wiring 30 in the outer periphery of the first substrate 10 is small. Therefore, the straightness of the first wiring 30 located in the outer periphery of the first substrate 10 is smaller than the straightness of the first wiring 30 located in the central portion of the first substrate 10.
[0062] The bonding strength between the first substrate 10 and the second substrate 20 is likely to be weaker at the outer periphery of the first substrate 10 than at the center of the first substrate 10. According to the wiring board 1 according to the embodiment, good electrical conduction is ensured by relatively increasing the straightness of the first wiring 30 located at the center of the first substrate 10, while the straightness of the first wiring 30 located at the outer periphery is relatively reduced, making the bonding strength between the first substrate and the second substrate relatively weak. In other words, it is possible to make it less likely that a force will push up the second wiring 40 will be generated at the outer periphery where peeling of the second wiring 40 is likely to occur.
[0063] Other Embodiments FIG. 5 is an enlarged cross-sectional view showing another example of the wiring board 1 according to the embodiment. As shown in FIG. 5 , the first substrate 10 may include an interlayer wiring 12. In the present disclosure, the first substrate 10 is configured by stacking multiple ceramic layers 11, making it easy to arrange the interlayer wiring 12 between adjacent ceramic layers 11. The interlayer wiring 12 may be, for example, a power wiring or a ground wiring. As shown in FIG. 5 , in the wiring board 1, the first substrate 10 has the interlayer wiring 12 as a ground wiring in addition to the conductor 32. The interlayer wiring 12 may contain a glass component 36, similar to the conductor 32. This improves the bonding strength between the ceramic layer 11 and the interlayer wiring 12.
[0064] The present technology may also be configured as follows. (1) A wiring board (for example, wiring board 1) includes a first substrate (for example, first substrate 10) made of ceramic, a second substrate (for example, second substrate 20) made of organic resin and bonded to the first substrate, a first wiring (for example, first wiring 30) located on the first substrate, and a second wiring (for example, second wiring 40) located on the second substrate. The first wiring includes a through hole (for example, through hole 31) penetrating the first substrate and a conductor (for example, conductor 32) containing metal as a main component and located inside the through hole. The inside of the through hole is filled with the conductor. (2) In the wiring board described in (1) above, the conductor may include a glass component (for example, glass component 36). (3) In the wiring board described in (1) or (2) above, the first substrate may include a plurality of ceramic layers (for example, ceramic layer 11). (4) In the wiring board described in (3) above, a conductor portion located in one of the plurality of ceramic layers (e.g., conductor portion 32a) and a conductor portion located in another ceramic layer adjacent to the one ceramic layer (e.g., conductor portion 32b) may be misaligned in an in-plane direction of the first substrate. (5) The wiring board described in (1) above may have a plurality of first wirings, and the straightness of the first wirings located in the outer periphery of the first substrate may be smaller than the straightness of the first wirings located in the center of the first substrate. (6) In the wiring board described in (3) above, the conductor may have a via (e.g., via 34) filled in the through hole and a land (e.g., land 35) located around the through hole between two adjacent ceramic layers. (7) In the wiring board described in any one of (1) to (6) above, the second base material may have a plurality of organic resin layers (for example, organic resin layer 21), and the second wiring may have a plurality of vias (for example, via 41) penetrating one or more organic resin layers, and a wiring layer (for example, wiring layer 42) electrically connecting the plurality of vias and located between adjacent organic resin layers.(8) In the wiring board described in (7) above, of the multiple vias in the second wiring, the via (e.g., via 41a) located closest to the first substrate may be located at a position offset from the through hole of the first substrate in a plan view. (9) In the wiring board described in any one of (1) to (8) above, the first substrate may contain a glass component (e.g., glass component 15), and the second substrate may contain a coupling agent that chemically bonds with the glass component. (10) A semiconductor device (e.g., semiconductor device 100) may have the wiring board described in any one of (1) to (9) above and a semiconductor element mounted on the second substrate of the wiring board.
[0065] The disclosed embodiments should be considered in all respects as illustrative and not restrictive. Indeed, the above-described embodiments may be embodied in various forms. Furthermore, the above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.
[0066] REFERENCE SIGNS LIST 1 wiring substrate 2 semiconductor element 3 relay substrate 10 first substrate 11 ceramic layer 15 glass component 20 second substrate 21 organic resin layer 30 first wiring 31 through hole 32 conductor 36 glass component 40 second wiring 41 via 42 wiring layer 100 semiconductor device
Claims
1. A first ceramic substrate, A second substrate made of organic resin is bonded to the first substrate. The first wiring located on the first substrate, The second wiring located on the second substrate and It has, The first wiring is, A through hole penetrating the first substrate, A conductor mainly composed of metal and located inside the through hole It has, The inside of the through hole is filled with the conductor. Wiring board.
2. The conductor contains a glass component. The wiring board according to claim 1.
3. The first substrate has a plurality of ceramic layers The wiring board according to claim 1.
4. The aforementioned conductor is A conductive portion located in one of the multiple ceramic layers and a conductive portion located in another ceramic layer adjacent to that ceramic layer are offset in the in-plane direction of the first substrate. The wiring board according to claim 3.
5. Having a plurality of the first wirings, The straightness of the first wiring located on the outer periphery of the first substrate is smaller than the straightness of the first wiring located in the central part of the first substrate. The wiring board according to claim 3.
6. The aforementioned conductor is vias to be filled into the through hole, Land located around the through hole between two adjacent ceramic layers has The wiring board according to claim 3.
7. The second substrate has a plurality of organic resin layers, The second wiring comprises a plurality of vias penetrating one or more of the organic resin layers, and a wiring layer located between adjacent organic resin layers that electrically connects the plurality of vias. has The wiring board according to claim 1.
8. Of the multiple vias in the second wiring, the via closest to the first substrate is located in a position offset from the through-hole in the first substrate in a plan view. The wiring board according to claim 7.
9. The first substrate contains a glass component, The aforementioned second substrate contains a coupling agent that chemically bonds with the glass component. The wiring board according to claim 1.
10. A wiring board according to any one of claims 1 to 9, Semiconductor elements mounted on the second substrate of the wiring board and has Semiconductor devices.