Multilayer ceramic electronic component and manufacturing method therefor
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2024-11-08
- Publication Date
- 2025-05-15
AI Technical Summary
In the manufacturing process, existing multi-layer ceramic electronic components are difficult to effectively control the particle size distribution of ceramic particles, resulting in dielectric breakdown or insufficient strength, and the manufacturing process is complicated.
By controlling the molar ratio of phosphorus in the electrode and dielectric layer of the ceramic capacitor, a region of ceramic particle with different particle sizes is formed, and the manufacturing process is simplified.
The long life and high strength of ceramic capacitors are achieved, and the manufacturing process is simplified, avoiding complex green sheet manufacturing steps.
Abstract
Description
Multilayer ceramic electronic component and its manufacturing method
[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing the same.
[0002] In a multilayer ceramic electronic component such as a multilayer ceramic capacitor in which internal electrodes and dielectric layers are laminated, it is known that the grain size of ceramic particles in a first region of the dielectric layer on the internal electrode side is smaller than the grain size of ceramic particles in a second region in the center of the dielectric layer (see, for example, Patent Document 1).It is also known that in a similar multilayer ceramic electronic component, phosphorus is added to the internal electrodes on the main surface side (see, for example, Patent Document 2).
[0003] JP 2014-35384 A JP 2022-84400 A
[0004] If the particle size of the ceramic particles, which are mainly composed of ceramic in the dielectric layer, is large, the lifespan will be shortened due to dielectric breakdown, etc. On the other hand, if the particle size of the ceramic particles is small, the strength of the dielectric layer will be weakened.
[0005] Furthermore, in Patent Document 1, dielectric breakdown can be suppressed by making the grain size of the first region smaller than the grain size of the second region. However, changing the grain size of the ceramic grains within one dielectric layer requires a complex manufacturing process, such as forming one dielectric layer using three layers of green sheets.
[0006] In view of the above problems, a first object of the present invention is to provide a multilayer ceramic electronic component having a long life and high strength, and a method for manufacturing the same.
[0007] A second object of the present invention is to provide a multilayer ceramic electronic component that can simplify the manufacturing process and a method for manufacturing the same.
[0008] The present invention provides a multilayer ceramic electronic component comprising: an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and facing each other in a second direction; and a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively; when one dielectric layer in a capacity region that is the center of the element body in the second direction as viewed from the first direction and where the plurality of internal electrodes overlap is virtually divided into three equal-spaced regions into a pair of first regions in contact with the internal electrodes and a second region sandwiched between the pair of first regions, a first molar ratio of phosphorus to the main component metal element of the ceramic in the pair of first regions is higher than a second molar ratio of phosphorus to the main component metal element in the second region.
[0009] In the above configuration, a first particle size of the ceramic particles in the first region may be smaller than a second particle size of the ceramic particles in the second region.
[0010] In the above configuration, the first molar ratio may be 1.2 times or more the second molar ratio.
[0011] In the above configuration, a third molar ratio of phosphorus to the main component metal element in a pair of third regions in a range from the internal electrode of one dielectric layer to 0.1 times the width of the one dielectric layer in the first direction can be configured to be 1.5 times or more of a fourth molar ratio of phosphorus to the main component metal element in the dielectric layer.
[0012] In the above configuration, in the one dielectric layer, the grain size of the ceramic particles that are not adjacent to the internal electrode and are adjacent to the internal electrode may be smaller than the grain size of the ceramic particles in the second region.
[0013] In the above configuration, the number of ceramic particles in the first direction in one dielectric layer may be five or more.
[0014] In the above configuration, the ceramic may be mainly composed of barium titanate, and the internal electrodes may be mainly composed of nickel.
[0015] The present invention is a multilayer ceramic electronic component comprising: an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and facing each other in a second direction; and a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively; wherein a first molar ratio of phosphorus to the main metal element of the ceramic in the dielectric layers in a capacitance region that is the center of the element body in the second direction as viewed from the first direction and where the plurality of internal electrodes overlap is higher than a second molar ratio of phosphorus to the main metal element in the dielectric layers in an end margin region that is an end of the element body in the second direction as viewed from the first direction and where some of the plurality of internal electrodes are not provided.
[0016] In the above configuration, a first grain size of the ceramic particles in the dielectric layer in the capacitive region may be smaller than a second grain size of the ceramic particles in the dielectric layer in the end margin region.
[0017] In the above configuration, a third molar ratio of phosphorus to the main component metal element in the cover dielectric layer located outermost among the plurality of dielectric layers may be lower than the first molar ratio.
[0018] In the above configuration, a first particle size of the ceramic particles in the dielectric layer in the capacitance region may be smaller than a second particle size of the ceramic particles in the dielectric layer in the end margin region, and a third particle size of the ceramic particles in the cover dielectric layer may be larger than the first particle size.
[0019] In the above configuration, the third molar ratio may be lower than the second molar ratio.
[0020] In the above configuration, a first particle size of the ceramic particles in the dielectric layer in the capacitance region can be smaller than a second particle size of the ceramic particles in the dielectric layer in the end margin region, and a third particle size of the ceramic particles in the cover dielectric layer can be larger than the second particle size.
[0021] In the above configuration, a fourth molar ratio of phosphorus to the main component metal element in the dielectric layer in a side margin region at an end of the element body in a third direction that intersects the first direction and the second direction when viewed from the first direction, where multiple internal electrodes are not provided, can be configured to be lower than the first molar ratio.
[0022] In the above configuration, the fourth molar ratio may be equal to or less than the second molar ratio.
[0023] The present invention is a method for manufacturing a multilayer ceramic electronic component, comprising the steps of: preparing an element body in which a plurality of green sheets containing ceramic particles and a plurality of metal patterns containing phosphorus are alternately stacked in a first direction; firing the element body to form a plurality of internal electrodes from the plurality of metal patterns, the internal electrodes being alternately exposed from a pair of end faces opposing each other in a second direction, and forming a plurality of dielectric layers from the plurality of green sheets; and forming a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively; and after firing the element body, when one dielectric layer in a capacity region that is the center of the element body in the second direction as viewed from the first direction and where the plurality of internal electrodes overlap is virtually divided into three equal-spaced regions into a pair of first regions in contact with the internal electrodes and a second region sandwiched between the pair of first regions, a first molar ratio of phosphorus to the main component metal element of the ceramic particles in the pair of first regions is higher than a second molar ratio of phosphorus to the main component metal element in the second region.
[0024] In the above configuration, the ceramic particles may be mainly composed of barium titanate, and the internal electrodes may be mainly composed of nickel.
[0025] The present invention is a method for manufacturing a multilayer ceramic electronic component, comprising the steps of: preparing an element body by stacking laminated sheets in a first direction, each laminated sheet having a metal pattern formed on a green sheet containing ceramic particles and a dielectric pattern containing ceramic particles between the metal patterns; firing the element body to form a plurality of internal electrodes from the metal pattern that are alternately exposed from a pair of end faces facing each other in a second direction, thereby forming a plurality of dielectric layers from the green sheet and the dielectric pattern; and forming a pair of external electrodes that respectively contact the plurality of internal electrodes exposed from the pair of end faces, wherein a first molar ratio of phosphorus to a main component metal element of the ceramic particles in the green sheet sandwiched between the metal patterns in the first direction is higher than a second molar ratio of phosphorus to a main component metal element in the dielectric pattern.
[0026] In the above configuration, a third molar ratio of phosphorus to the main component metal element in the outermost green sheet in the element body in the first direction may be lower than the first molar ratio.
[0027] In the above configuration, the step of preparing the base body includes the steps of preparing a laminate in which the metal pattern is exposed from opposing side surfaces in a third direction intersecting the first direction and the second direction, and attaching a side green sheet containing ceramic particles to the side surface of the laminate, and the fourth molar ratio of phosphorus to the main component metal element in the side green sheet can be lower than the first molar ratio.
[0028] In the above configuration, after firing the element body, a first molar ratio of phosphorus to the main component metal element in the dielectric layer in a capacitance region that is the center of the element body in the second direction as viewed from the first direction and where the multiple internal electrodes overlap can be higher than a second molar ratio of phosphorus to the main component metal element in the dielectric layer in an end margin region that is the end of the element body in the second direction as viewed from the first direction and where some of the multiple internal electrodes are not provided.
[0029] The present invention is a method for manufacturing a multilayer ceramic electronic component, comprising the steps of: preparing an element body by laminating, in a first direction, laminated sheets each having a phosphorus-containing metal pattern and a dielectric pattern containing ceramic particles formed between the metal patterns on a green sheet containing ceramic particles; firing the element body to form, from the metal pattern, a plurality of internal electrodes that are alternately exposed from a pair of end faces facing each other in a second direction, thereby forming a plurality of dielectric layers from the green sheet and the dielectric pattern; and forming a pair of external electrodes that respectively contact the plurality of internal electrodes exposed from the pair of end faces, wherein, after firing the element body, a first molar ratio of phosphorus to the main metal element in the dielectric layer in a capacitance region that is the center of the element body in the second direction as viewed from the first direction and where the plurality of internal electrodes overlap is higher than a second molar ratio of phosphorus to the main metal element in the dielectric layer in an end margin region that is an end of the element body in the second direction as viewed from the first direction and where some of the plurality of internal electrodes are not provided.
[0030] According to the present invention, it is possible to provide a multilayer ceramic electronic component that can have a long life and high strength, and a method for manufacturing the same.
[0031] Furthermore, the present invention can provide a multilayer ceramic electronic component and a method for manufacturing the same that can simplify the manufacturing process.
[0032] FIG. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor according to an embodiment. FIG. 2 is a cross-sectional view taken along line A-A in FIG. 1. FIG. 3 is a cross-sectional view taken along line B-B in FIG. 1. FIG. 4 is a cross-sectional view taken along line C-C in FIG. 1. FIG. 5 is an enlarged schematic view of a dielectric layer of the multilayer ceramic capacitor according to the first embodiment. FIG. 6 is a flowchart showing an example of a method for manufacturing the multilayer ceramic capacitor according to the first embodiment. FIG. 7A is a plan view showing an example of a laminate sheet in the method for manufacturing the multilayer ceramic capacitor according to the first embodiment. FIG. 7B is a cross-sectional view taken along line A-A in FIG. 7A. FIG. 8 is a cross-sectional view showing an example of a laminate sheet in the method for manufacturing the multilayer ceramic capacitor according to the first embodiment. FIG. 9 is a schematic view showing the molar ratio of phosphorus with respect to the position in the dielectric layer in the capacitance region. FIG. 10 is a schematic view showing the average molar ratio of phosphorus in each region in the dielectric. FIG. 11A is a diagram showing an example of a method for measuring grain size. FIG. 11B is a diagram showing another example of a method for measuring grain size. FIG. 12 is an enlarged schematic view of a dielectric layer between internal electrodes in the capacitance region of the multilayer ceramic capacitor according to the second embodiment. FIG. 13 is an enlarged schematic view of a dielectric layer between internal electrodes in an end margin region of the multilayer ceramic capacitor according to the second embodiment. FIG. 14 is an enlarged schematic view of a cover dielectric layer of the multilayer ceramic capacitor according to the second embodiment. FIG. 15A is a plan view showing an example of a laminate sheet in the method for manufacturing the multilayer ceramic capacitor according to the second embodiment. FIG. 15B is a cross-sectional view taken along line A-A in FIG. 15A. FIG. 16 is a cross-sectional view showing an example of a laminate sheet in the method for manufacturing the multilayer ceramic capacitor according to the second embodiment. FIG. 17 is a flowchart showing an example of a method for manufacturing the multilayer ceramic capacitor according to the second embodiment. FIG. 18 is a cross-sectional view showing an example of a laminate in the method for manufacturing the multilayer ceramic capacitor according to the second embodiment. FIG. 19 is a cross-sectional view showing an example of an element body before firing in the method for manufacturing the multilayer ceramic capacitor according to the second embodiment.
[0033] Hereinafter, with reference to the drawings, an embodiment will be described using a multilayer ceramic capacitor as an example of a multilayer ceramic electronic component.
[0034] (Embodiment) Fig. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. Fig. 2 is a cross-sectional view taken along line A-A in Fig. 1. Fig. 3 is a cross-sectional view taken along line B-B in Fig. 1. Fig. 4 is a cross-sectional view taken along line CC in Fig. 1.
[0035] 1 to 4 , the Z direction (first direction) is the stacking direction in which the dielectric layers 14 and the internal electrodes 12a and 12b are stacked, and is the direction in which the bottom surface 55 and top surface 56 of the element body 10 face each other. The X direction (second direction) is the length direction of the element body 10, and is the direction in which a pair of end surfaces 51 and 52 of the element body 10 face each other. The Y direction (third direction) is the width direction of the internal electrodes 12a and 12b, and is the direction in which a pair of side surfaces 53 and 54 of the element body 10 face each other. The X direction, Y direction, and Z direction intersect or are perpendicular to each other.
[0036] The multilayer ceramic capacitor 100 includes a substantially rectangular parallelepiped element body 10 and external electrodes 20a and 20b. The element body 10 includes multiple dielectric layers 14, multiple internal electrodes 12a and 12b, and a cover dielectric layer 16. The multiple internal electrodes 12a (first internal electrodes) and the multiple internal electrodes 12b (second internal electrodes) are alternately stacked. One of the multiple dielectric layers 14 is provided between one of the multiple internal electrodes 12a and one of the multiple internal electrodes 12b. The internal electrodes 12a and 12b form the outermost layers in the stacking direction (Z direction) of the laminate, in which the dielectric layer 14 and the internal electrodes 12a and 12b are stacked, and the lower and upper surfaces of the laminate are covered by a cover dielectric layer 16. The cover dielectric layer 16 is located outermost in the Z direction.
[0037] The internal electrodes 12a and 12b are alternately exposed on the end faces 51 and 52. The internal electrode 12a is exposed but the internal electrode 12b is not exposed on the end face 51. The internal electrode 12b is exposed but the internal electrode 12a is not exposed on the end face 52. In other words, the internal electrodes 12a and 12b are connected to the end faces 51 and 52, which are different from each other.
[0038] The external electrode 20a contacts the internal electrode 12a exposed from the element body 10 at the end face 51. The external electrode 20b contacts the internal electrode 12b exposed from the element body 10 at the end face 51. The external electrode 20a covers the end faces 51 as well as the ends of the side faces 53, 54, bottom face 55, and top face 56 in the -X direction. The external electrode 20b contacts the internal electrode 12b at the end face 52. The external electrode 20b covers the end faces 52 as well as the ends of the side faces 53, 54, bottom face 55, and top face 56 in the +X direction.
[0039] 2 and 3 , the region of the element body 10 at the center in the X direction when viewed from the Z direction, where the internal electrodes 12a and 12b overlap, is a capacitance region 62. The region of the element body 10 at the end in the X direction when viewed from the Z direction, where one (part) of the internal electrodes 12a and 12b is provided and the other is not, is an end margin region 64. As shown in FIGS. 3 and 4 , the region of the element body 10 at the center in the Y direction, where the internal electrodes 12a and 12b face each other, is a capacitance region 62. The region of the element body 10 at the end in the Y direction, where the internal electrodes 12a and 12b are not provided, is a side margin region 66.
[0040] The size of the multilayer ceramic capacitor 100 is, for example, 0.25 mm in length (length in the X direction), 0.125 mm in width (width in the Y direction), and 0.125 mm in height (height in the Z direction), or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but is not limited to these sizes.
[0041] The thickness of the side margin region 66 is, for example, 10 μm to 30 μm, and the length of the end margin region 64 in the X direction is, for example, 10 μm to 50 μm.
[0042] The internal electrodes 12a and 12b are primarily composed of base metals such as nickel (Ni), copper (Cu), and tin (Sn). The internal electrodes 12a and 12b may also be made of precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing these metals. The thickness of the internal electrodes 12a and 12b is, for example, 0.1 μm to 1 μm.
[0043] The dielectric layer 14 is, for example, a compound represented by the general formula ABO 3 The main phase is a ceramic material having a perovskite structure represented by the formula: 3-α For example, the ceramic material includes barium titanate (BaTiO 3 ), calcium zirconate (CaZrO 3 ), calcium titanate (CaTiO 3 ), strontium titanate (SrTiO 3 ), magnesium titanate (MgTiO 3 ), and Ba, which forms a perovskite structure 1-x-y Ca x Sr y Ti 1-z Zr z O 3 (0≦x≦1, 0≦y≦1, 0≦z≦1) and the like. 1-x-y Ca x Sr y Ti 1-z Zr z O 3 Examples of the ceramic materials include barium strontium titanate, barium calcium titanate, barium zirconate, barium titanate zirconate, calcium titanate zirconate, and barium calcium titanate zirconate. For example, the dielectric layer 14 contains 90 at% or more of the main component ceramic. The thickness of the dielectric layer 14 is, for example, 0.3 μm or more and 2 μm or less.
[0044] An additive may be added to the dielectric layer 14. Examples of additives to the dielectric layer 14 include oxides of zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.
[0045] The composition of the main ceramic component of the cover dielectric layer 16 may be the same as or different from the main ceramic component of the dielectric layer 14 .
[0046] The external electrodes 20a and 20b are primarily composed of a metal such as copper, nickel, aluminum (Al), or zinc (Zn), or an alloy of two or more of these metals (e.g., an alloy of copper and nickel). They also contain ceramics, such as a glass component for densifying the external electrodes 20a and 20b and a co-material for controlling the sinterability of the external electrodes 20a and 20b. The glass component is an oxide of barium (Ba), strontium (Sr), calcium (Ca), zinc, aluminum, silicon, or boron. The co-material is, for example, a ceramic component primarily composed of the same material as the primary component of the dielectric layer 14. A plating film primarily composed of a base metal such as nickel, copper, or tin may be formed on the surfaces of the external electrodes 20a and 20b. A conductive resin film, such as an epoxy resin or a urethane resin, may also be formed on the surface of the plating film.
[0047] First Embodiment Fig. 5 is an enlarged schematic view of the dielectric layer of the multilayer ceramic capacitor 100 according to the first embodiment. Fig. 5 is an enlarged schematic view of the dielectric layer 14 between the internal electrodes 12a and 12b in the capacitance region 62. In reality, the shapes and particle sizes of the ceramic particles 40 (hereinafter referred to as particles) vary, but in Fig. 5, the particles 40 are illustrated as a schematic hexagon, and the particle sizes of the particles 40 in a region 45 are illustrated as the same, and the particle sizes in a region 46 are illustrated as the same.
[0048] The dielectric layer 14 is packed with a plurality of particles 40 composed primarily of ceramic. The boundaries between the particles 40 are grain boundaries 42. Triple junctions 41 are formed at locations where three particles 40 contact each other and where three grain boundaries 42 intersect. As the particle size of the particles 40 increases, the number of triple junctions 41 per unit area decreases. A pair of regions 45 contact the internal electrodes 12a and 12b in the Z direction. Region 46 is sandwiched between the regions 45 in the Z direction. The particle size of the particles 40 in region 45 is smaller than the particle size of the particles 40 in region 46. If the particle size of the region 45 contacting the internal electrodes 12a and 12b is large, dielectric breakdown is more likely to occur and the lifespan is shortened. On the other hand, if the particle size of the particles 40 in region 46 is small, the strength is insufficient, the dielectric constant is small, and the multilayer ceramic capacitor 100 becomes large. Therefore, the particle size of the particles 40 in region 46 is made larger than the particle size of the particles 40 in region 45. This makes it possible to suppress dielectric breakdown of the multilayer ceramic capacitor 100, extend its lifespan, improve its strength, increase its dielectric constant, and reduce the size of the multilayer ceramic capacitor 100.
[0049] To form multiple regions with different particle sizes within one dielectric layer 14, it is conceivable to form one dielectric layer 14 from multiple green sheets containing ceramic particles with different particle sizes. However, it is difficult to make each green sheet thin, and the manufacturing process becomes complicated.
[0050] (Method for Manufacturing the Multilayer Ceramic Capacitor of the First Embodiment) A method for manufacturing the multilayer ceramic capacitor 100 will now be described. Fig. 6 is a flowchart showing an example of a method for manufacturing the multilayer ceramic capacitor in accordance with the first embodiment.
[0051] (Green Sheet Formation Process) First, a green sheet 30 is formed (step S10). In step S10, a dielectric material is prepared by adding various additive compounds (such as sintering aids) to ceramic powder, such as barium titanate. Phosphorus is not added to the dielectric material. A binder, an organic solvent, such as ethanol or toluene, and a plasticizer are added to the prepared dielectric material and wet-mixed to produce a slurry. The binder is, for example, an organic binder, such as polyvinyl butyral (PVB) resin, acrylic resin, or cellulose-based resin. The resulting slurry is applied to a substrate, for example, by a die coater or doctor blade method, to form a green sheet 30. The substrate is, for example, a PET (polyethylene terephthalate) film. The green sheet 30 is then dried. Similarly to the green sheet 30, a green sheet 31 for the cover dielectric layer 16 is formed.
[0052] (Pattern Forming Step) Subsequently, a metal pattern 32 is formed on the green sheets 30 and 31 (step S12). Fig. 7A is a plan view showing an example of a laminate sheet 34 in the manufacturing method of the multilayer ceramic capacitor 100 in accordance with the first embodiment, and Fig. 7B is a cross-sectional view taken along line A-A in Fig. 7A. Cutting line 36 in Fig. 7A is a cutting line along which the laminate sheet 35 is cut in step S18.
[0053] In step S12, a metal paste is first prepared containing a metal powder such as nickel powder, a phosphorus compound, an organic binder, and an organic solvent. The phosphorus compound is, for example, phosphoric acid, a phosphate-based compound, or a phosphoric acid-based compound. The metal paste may also contain ceramic particles as a co-material. As shown in FIGS. 7A and 7B , the metal paste is printed on a green sheet 30 using, for example, gravure printing to form a metal pattern 32. This results in a laminate sheet 34 in which the metal pattern 32 is formed on the green sheet 30. Similarly to the green sheet 31, a metal pattern 32 is also formed on the green sheet 31 for the cover dielectric layer 16 to form a laminate sheet 34a.
[0054] (Laminating Step) Next, the green sheets are laminated (Step S14). Figure 8 is a cross-sectional view showing an example of a laminate sheet 35 in the manufacturing method of the multilayer ceramic capacitor according to the first embodiment, and corresponds to the A-A cross section in Figure 7A. In Step S14, a plurality of laminate sheets 34 are laminated on a laminate sheet 34a, and finally, a green sheet 31 for the cover dielectric layer 16 is laminated. This forms a laminate sheet 35 in which the laminate sheet 34a and a plurality of laminate sheets 34 are laminated.
[0055] (Compression Bonding Step) Subsequently, the laminated sheet 35 is compressed (step S16). In step S16, the laminated sheet 35 formed in step S14 is pressed to compress the plurality of laminated sheets 34a and 34. As the compression bonding means, for example, a hydrostatic press is used.
[0056] (Cutting Step) Next, the laminated sheet 35 is cut (step S18). In step S18, a cutting blade is used to cut the laminated sheet in the stacking direction along predetermined cutting lines 36, thereby preparing a plurality of element bodies 10. After step S18, the element bodies 10 may be polished by a technique such as barrel polishing. This rounds the corners of the element bodies 10.
[0057] (External Electrode Forming Process) Next, the external electrodes 20a and 20b are formed (Step S20). In Step S20, a conductive paste containing, for example, metal powder, glass frit, binder, and solvent is applied to the end surfaces 51 and 52. After the conductive paste is applied, it is baked to form a base metal layer of the external electrodes 20a and 20b. The binder and solvent evaporate during baking. The conductive paste is applied using, for example, a dipping method.
[0058] (Firing Step) Next, the element body 10 is fired (Step S22). In Step S22, the element body 10 is subjected to a binder removal treatment in a nitrogen gas atmosphere at 250°C to 500°C, and then fired in a reducing atmosphere at 1300°C to 1400°C. This sinters the particles in the element body 10. After Step S22, a plated metal layer may be formed on the surface of the base metal layer of the external electrodes 20a and 20b using a plating method.
[0059] The external electrodes 20 a and 20 b may be formed before the firing step, and then fired in the firing step. In addition, in the cutting step S18, the metal pattern 32 may be exposed from the side surface of the laminate in the Y direction, and side green sheets may be formed on the side surface of the laminate.
[0060] During the binder removal process in the firing step, phosphorus in the metal pattern 32 diffuses into the green sheet 30. Phosphorus raises the decomposition temperature of resins such as binders contained in the green sheet 30. Therefore, when the phosphorus concentration is high, carbon derived from the resin tends to remain at the boundaries of the ceramic powder. This inhibits sintering of the ceramic powder. As a result, the particle size of the ceramic particles 40 becomes smaller. This is based on the findings of the inventors.
[0061] 5, phosphorus is mainly distributed near the point 43 where the internal electrode 12a or 12b contacts the grain boundary 42, near the triple junction 41a of the particle 40a that contacts the internal electrode 12a or 12b, and near the triple junction 41b of the particle 40b that does not contact the internal electrodes 12a or 12b but is adjacent to the particle 40a that contacts the internal electrode 12a or 12b. Thus, the presence of phosphorus at the triple junctions 41a and 41b inhibits sintering of the dielectric. Therefore, the particle diameter of the particles 40a and 40b does not become larger than that of the other particles 40.
[0062] 9 is a schematic diagram showing the molar ratio of phosphorus versus position in the dielectric layer in the capacitance region. The horizontal axis of FIG. 9 represents position Z in the Z direction. The vertical axis represents the molar ratio of phosphorus. The molar ratio of phosphorus is the molar ratio of phosphorus to the main component metal element of the ceramic in the dielectric layer 14. For example, when the main component of the ceramic in the dielectric layer 14 is barium titanate, the main component metal element is titanium or barium. Therefore, the molar ratio is defined by the molar ratio of phosphorus to titanium or the molar ratio of phosphorus to barium.
[0063] 9, the molar ratio of phosphorus is high at the boundaries between the internal electrodes 12a and 12b and the dielectric layer 14. The molar ratio of phosphorus decreases with increasing distance from the internal electrodes 12a and 12b. The molar ratio of phosphorus near the center of the dielectric layer 14 is lowest.
[0064] Fig. 10 is a schematic diagram showing the average molar ratio of phosphorus in each region in the dielectric. In Fig. 10, the dotted line indicates the molar ratio of phosphorus in the dielectric layer 14 in Fig. 9. One dielectric layer 14 in the capacitance region 62 is virtually divided into three equal-spaced regions: a pair of first regions A1 in contact with the internal electrodes 12a and 12b, and a second region A2 sandwiched between the pair of first regions A1, as shown in Fig. 5. In this case, the first molar ratio P1 of phosphorus to the main component metal element of the ceramic in the first region A1 is higher than the second molar ratio P2 of phosphorus to the main component metal element in the second region A2.
[0065] The first molar ratio P1 is preferably 1.2 times or more, more preferably 1.5 times or more, of the second molar ratio P2. The first molar ratio P1 is, for example, 0.002 to 0.02 (0.2% to 2%). The second molar ratio P2 is, for example, 0.001 to 0.01 (0.1% to 1%).
[0066] Because the first molar ratio P1 is higher than the second molar ratio P2, the particle diameter W1 (first particle diameter) of the particles 40 in the dielectric layer 14 in the first region A1 is smaller than the particle diameter W2 (second particle diameter) of the particles 40 in the dielectric layer 14 in the second region A2. This improves the lifetime. Meanwhile, the particle diameter W4 of the particles 40 is large, resulting in a high dielectric constant. Furthermore, in FIGS. 7A and 7B, adding phosphorus to the metal pattern 32 can achieve the structure shown in FIG. 5, thereby reducing the complexity of the manufacturing process. The particle diameter W1 is preferably 1.2 times or more, more preferably 1.5 times or more, of the particle diameter W2. The particle diameter W1 is, for example, 80 nm to 500 nm. The particle diameter W2 is, for example, 100 nm to 1 μm.
[0067] 5 , in the dielectric layer 14, the particle diameter W3 (third particle diameter) of the ceramic particle 40b adjacent to the ceramic particle 40a that is not adjacent to the internal electrodes 12a and 12b but is in contact with the internal electrode 12a or 12b is smaller than the particle diameter W2 of the ceramic particle 40 in the second region A2. The particle diameter W3 of the ceramic particle 40b is preferably 0.8 times or less, more preferably 0.5 times or less, the particle diameter W2 of the ceramic particle 40 in the second region A2.
[0068] 10 , a third molar ratio P3 of phosphorus to the main component metal elements in a pair of third regions A3, which are in a range from the internal electrodes 12a and 12b of the dielectric layer 14 to 0.1 times the width W0 of the dielectric layer 14 in the Z direction, is 1.5 times or more the fourth molar ratio P0 of phosphorus to the main component metal elements in the entire dielectric layer 14. The third molar ratio P3 is preferably two times or more, and more preferably three times or more, the fourth molar ratio P0.
[0069] If the number of ceramic particles 40 in the Z direction of the dielectric layer 14 is small, the distribution of the phosphorus molar ratio in the Z direction in the dielectric layer 14 becomes nearly uniform. Therefore, the number of ceramic particles 40 that overlap with the line 44 in the dielectric layer 14 in Figure 5 (i.e., the number of ceramic particles 40 in the Z direction of the dielectric layer 14) is preferably 5 or more, more preferably 7 or more, and even more preferably 10 or more. In order to avoid lowering the dielectric constant of the dielectric layer 14, the number of ceramic particles 40 in the Z direction of the dielectric layer 14 is 20 or less.
[0070] 7A and 7B, the molar ratio of phosphorus to the main component metal element in the metal pattern 32 is preferably 0.0003 to 0.003 (0.03% to 0.3%) in order to diffuse phosphorus into the dielectric layer 14. The firing temperature in the firing step S22 is preferably 1500°C or lower, and more preferably 950°C to 1300°C.
[0071] The diffusion of phosphorus from the internal electrodes 12a and 12b to the dielectric layer 14 occurs mainly when the main component of the ceramic of the dielectric layer 14 is barium titanate and the main component of the internal electrodes 12a and 12b is nickel.
[0072] As described above, according to the manufacturing method of the first embodiment, the particle size of the particles 40 and the molar ratio of phosphorus in the first to third regions A1 to A3 are adjusted by diffusing the phosphorus in the metal pattern 32 into the dielectric layer 14, and therefore the manufacturing process can be simplified compared to the complicated manufacturing process of forming one dielectric layer 14 from, for example, multiple green sheets with particles 40 of different particle sizes.
[0073] 11A and 11B are diagrams showing an example of a method for measuring particle size. As shown in FIGS. 11A and 11B, cross sections of the dielectric layer 14 and the cover dielectric layer 16 are observed using an electron microscope. The area S of the particle 40 is calculated. A circle 47 having an area S is assumed, and the diameter 48 (Heywood diameter) of the circle 47 is defined as the particle size W of the particle 40. That is, when the area S of the particle 40 is taken as the particle size W, W = 2√(S / π).
[0074] The particle sizes W1 and W2 in the first and second regions A1 and A2 are defined as follows. As shown in FIG. 5 , for example, a straight line 44 extending in the Z direction across the first and second regions A1 and A2 is drawn in an electron microscope image. The particle sizes W of all particles 40 that overlap the line 44 in the first region A1 but do not overlap the second region A2 are measured. The number of particles 40 whose particle sizes W are measured is set to 10 to 100. If the number of particles 40 whose particle sizes are measured is less than 10, another line 44 is drawn, and the particle sizes W of the particles 40 that overlap the other line 44 are measured. The median of the particle sizes W of the measured particles 40 is defined as particle size W1. For particle size W2, an electron microscope image is also used to measure the particle sizes W of all particles 40 that overlap the line 44 in the second region A2 but do not overlap the first region A1. As with particle size W1, the particle sizes W of 10 to 100 particles 40 are measured, and the median of the particle sizes W is defined as particle size W2. The particle size W3 of the ceramic particles 40b is determined by measuring the particle size W of 10 to 20 particles 40b in an electron microscope image, for example, and defining the median value of the measured particle size W as the particle size W3.
[0075] The molar ratio of phosphorus to the main component metal elements of the ceramic is measured using, for example, inductively coupled plasma atomic emission spectroscopy, energy dispersive X-ray spectroscopy, or electron beam microanalysis. For example, energy dispersive X-ray spectroscopy or electron beam microanalysis is used to examine the region where phosphorus is present, and inductively coupled plasma atomic emission spectroscopy is used to measure the molar concentration of phosphorus and the molar concentration of the target element in that region. The molar ratio of phosphorus is calculated from the ratio of the molar concentrations. The molar ratio within the first to third regions A1 to A3 is determined by drawing a straight line (e.g., line 44 in Figure 5) that crosses the first to third regions A1 to A3 in the Z direction and averaging the molar ratios of the parts that overlap with the line in each of the first to third regions A1 to A3.
[0076] The number of particles 40 in the Z direction can be defined, for example, by drawing a straight line 44 extending in the Z direction on the dielectric layer 14 in an electron microscope image and counting the number of particles 40 that pass through the straight line 44. The number of particles 40 in the Z direction may be determined by drawing straight lines at five or more different locations and averaging the number of particles that pass through each straight line.
[0077] Second Embodiment Fig. 12 is an enlarged schematic view of the dielectric layer 14 between the internal electrodes 12a and 12b in the capacitance region 62 of the multilayer ceramic capacitor according to the second embodiment. Fig. 13 is an enlarged schematic view of the dielectric layer 14 between the internal electrodes 12a and 12a in the end margin region 64 of the multilayer ceramic capacitor according to the second embodiment. Fig. 14 is an enlarged schematic view of the cover dielectric layer 16 of the multilayer ceramic capacitor according to the second embodiment. In Figs. 12 to 14, components common to those in Fig. 5 are denoted by the same reference numerals, and their description will be omitted. In Figs. 12 to 14, the particles 40 are shown schematically as hexagons, as in Fig. 5, and are shown with the same particle size.
[0078] The dielectric layer 14 and the cover dielectric layer 16 are packed with a plurality of particles 40 whose main component is ceramic. As the particle size of the particles 40 increases, the number of triple junctions 41 per unit area decreases. As the particle size of the particles 40 increases, dielectric breakdown in the dielectric layer becomes more likely, shortening the lifespan. On the other hand, as the particle size of the particles 40 increases, the strength of the dielectric layer 14 increases. Phosphorus in the dielectric layer 14 is distributed in large amounts, for example, near the triple junctions 41.
[0079] The molar ratio of phosphorus to the main component metal elements of the ceramic in the dielectric layer 14 in the capacitance region 62 is defined as P1 (first molar ratio), and the particle size of the particles 40 is defined as W1 (first particle size). The molar ratio of phosphorus to the main component metal elements of the ceramic in the dielectric layer 14 in the end margin region 64 is defined as P2 (second molar ratio), and the particle size of the particles 40 is defined as W2 (second particle size). The molar ratio of phosphorus to the main component metal elements of the ceramic in the cover dielectric layer 16 is defined as P3 (third molar ratio), and the particle size of the particles 40 is defined as W3 (third particle size). The molar ratio of phosphorus to the main component metal elements of the ceramic in the dielectric layer 14 in the side margin region 66 is defined as P4 (fourth molar ratio), and the particle size of the particles 40 is defined as W4 (fourth particle size).
[0080] The first to fourth molar ratios P1 to P4 satisfy the relationship P1 > P2, P3, and P4. The particle sizes W1 to W4 satisfy the relationship W1 < W2, W3, and W4. For example, if the main component of the ceramic in the dielectric layer 14 is barium titanate, the main component metal elements of the ceramic are titanium and barium. Therefore, the phosphorus ratio is defined by the molar ratio of phosphorus to titanium or the molar ratio of phosphorus to barium.
[0081] In the end margin region 64, the distance between the internal electrodes 12a is large, and the same voltage is applied to the internal electrodes 12a. Therefore, breakdown is unlikely to occur. In the capacitance region 62, the distance between the internal electrodes 12a and 12b is small, and different voltages are applied to the internal electrodes 12a and 12b. Therefore, breakdown is likely to occur. Therefore, the grain size relationship is set to W1 < W2. This makes breakdown less likely to occur in the capacitance region 62. On the other hand, in the end margin region 64, breakdown is less likely to occur, so a large grain size W2 has little effect. Therefore, by increasing the grain size W2, the strength of the dielectric layer 14 can be increased. Almost no voltage is applied to the cover dielectric layer 16 and the side margin region 66. Therefore, the grain size relationship is set to W1 < W3, W4. This makes it possible to increase the strength of the cover dielectric layer 16 and the side margin region 66. By increasing the strength of the cover dielectric layer 16, the end margin region 64, and the side margin region 66, the strength of the element body 10 can be increased.
[0082] (Example 1 of the manufacturing method of the multilayer ceramic capacitor according to the second embodiment) Example 1 of the manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment will be described. The manufacturing flow of this example is the same as the manufacturing flow of the first embodiment, and therefore, in the following description, reference will be made to FIG. 6 .
[0083] (Green Sheet Formation Process) First, a green sheet 30 is formed (step S10). In step S10, a dielectric material is prepared by adding a phosphorus compound and various additives (such as sintering aids) to ceramic powder, such as barium titanate. The phosphorus compound is, for example, phosphoric acid, a phosphate-based compound, or a phosphoric acid-based compound. A binder, an organic solvent, such as ethanol or toluene, and a plasticizer are added to the prepared dielectric material and wet-mixed to produce a slurry. The binder is, for example, an organic binder, such as polyvinyl butyral (PVB) resin, acrylic resin, or cellulose-based resin. The produced slurry is applied to a substrate, for example, using a die coater or doctor blade method, to form a green sheet 30. The substrate is, for example, a PET (polyethylene terephthalate) film. The green sheet 30 is then dried.
[0084] Similarly, a green sheet 31 for the cover dielectric layer 16 is formed. A phosphorus compound may or may not be added to the dielectric material for the green sheet 31. The molar ratio M3 of phosphorus to the main component elements of the ceramic particles of the green sheet 31 is set lower than the molar ratio M1 of phosphorus to the main component elements of the ceramic particles of the green sheet 30. The molar ratio M1 of phosphorus to the main component elements of the ceramic particles of the green sheet 30 is, for example, 0.002 to 0.02 (0.2% to 2%), and the molar ratio M3 of phosphorus to the main component elements of the ceramic particles of the green sheet 31 is, for example, approximately 0%. The molar ratio M1 is preferably at least twice the molar ratio M3, more preferably at least 10 times, and even more preferably at least 100 times.
[0085] (Pattern Forming Step) Subsequently, a metal pattern 32 and a dielectric pattern 33 are formed on the green sheet 30 or 31 (step S12). Fig. 15A is a plan view showing an example of a laminate sheet 34 in the manufacturing method of the multilayer ceramic capacitor 100 in accordance with the second embodiment, and Fig. 15B is a cross-sectional view taken along line A-A in Fig. 15A. Cutting line 36 in Fig. 15A is a cutting line along which the laminate sheet 35 is cut in step S18.
[0086] In step S12, a metal paste containing a metal powder such as nickel powder, an organic binder, and an organic solvent is first prepared. The metal paste may contain ceramic particles as a co-material. As shown in Figures 15A and 15B, the metal paste is printed on a green sheet 30 using, for example, gravure printing to form a metal pattern 32.
[0087] Next, a dielectric paste containing a ceramic powder such as sodium titanate powder, an organic binder, an organic solvent, and a plasticizer is prepared. The dielectric paste may or may not contain a phosphorus compound. The dielectric paste is printed on the green sheet 30 using, for example, gravure printing to form a dielectric pattern 33. The dielectric pattern 33 is the inverse pattern of the metal pattern 32, and it is preferable that there is almost no gap between the dielectric pattern 33 and the metal pattern 32. This reduces the step between the capacitance region 62 and the end margin region 64 after firing. The molar ratio M2 of phosphorus to the main component metal elements of the ceramic particles in the dielectric pattern 33 is, for example, approximately 0%, which is lower than the molar ratio M1 of phosphorus to the main component metal elements of the ceramic particles in the green sheet 30. The molar ratio M1 is preferably at least twice the molar ratio M2, more preferably at least 10 times, and even more preferably at least 100 times.
[0088] As a result of the above, a laminate sheet 34 is formed in which the metal pattern 32 and the dielectric pattern 33 are formed on the green sheet 30. Similarly to the green sheet 31, the metal pattern 32 and the dielectric pattern 33 are also formed on the green sheet 31 for the cover dielectric layer 16, thereby forming a laminate sheet 34a.
[0089] (Laminating Step) Next, the green sheets are laminated (Step S14). Fig. 16 is a cross-sectional view showing an example of a laminate sheet 35 in the manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment, and corresponds to the A-A cross section in Fig. 15A. In Step S14, a plurality of laminate sheets 34 are laminated on a laminate sheet 34a, and finally, a green sheet 31 for the cover dielectric layer 16 is laminated. This forms a laminate sheet 35 in which the laminate sheet 34a and a plurality of laminate sheets 34 are laminated.
[0090] Thereafter, similar to the first embodiment, the pressure bonding step S16, the cutting step S18, the external electrode formation step S20, and the firing step S22 are performed. As described above, in the firing step, phosphorus raises the decomposition temperature of resins such as binders contained in the green sheets 30 and 31 and the dielectric paste. Therefore, when the molar ratio of phosphorus is high, carbon derived from the resin tends to remain at the boundaries of the ceramic powder. This suppresses sintering of the ceramic powder. As a result, the particle size of the ceramic particles 40 becomes smaller. This is based on the findings of the inventors.
[0091] The molar ratio M1 of phosphorus in green sheet 30 is higher than the molar ratio M3 of phosphorus to the main component metal element of the ceramic particles in green sheet 31 (i.e., the outermost green sheet in the element body). Therefore, after firing, the molar ratio P1 is greater than P3, and the particle diameter W1 is less than W3.
[0092] When the phosphorus molar ratio M2 of the dielectric pattern 33 and the phosphorus molar ratio M3 of the green sheet 31 are approximately the same, the dielectric layer 14 in the end margin region 64 is formed from the green sheet 30 with a high phosphorus molar ratio M1 and the dielectric pattern 33 with a low phosphorus molar ratio M2. On the other hand, the cover dielectric layer 16 is formed from the green sheet 31 with a low phosphorus molar ratio M3. Therefore, after firing, the molar ratio P2 > P3 and the grain size W2 < W3. On the other hand, the side margin region 66 is formed from the green sheet 30. Therefore, the first molar ratio P1 and the fourth molar ratio P4 are approximately the same, and the grain sizes W1 and W4 are approximately the same. Therefore, P4 ≦ P2.
[0093] (Second Example of Manufacturing Method of Multilayer Ceramic Capacitor According to Second Embodiment) A second example of a manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment will be described. Fig. 17 is a flowchart showing the second example of a manufacturing method of the multilayer ceramic capacitor according to the second embodiment. As shown in Fig. 17, steps S10 to S18 are the same as those shown in Fig. 6.
[0094] 18 is a cross-sectional view showing an example of the laminate 11 in the manufacturing method of the multilayer ceramic capacitor 100 in accordance with the second embodiment. Fig. 18 corresponds to the cross section B-B in Fig. 2 to Fig. 4 after step S18. The metal pattern 32 is exposed from side surfaces 53a and 54a of the laminate 11 in which the green sheets 30, 31 and the metal pattern 32 are laminated.
[0095] (Attaching Side Green Sheets) After step S18, a side green sheet is attached to form the pre-fired element body 10 (step S19). FIG. 19 is a cross-sectional view showing an example of the pre-fired element body 10 in the manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment. In step S19, the side surface 53a of the laminate 11 is pressed against the green sheet 31 for the side dielectric layer, thereby attaching the green sheet 31 to the side surface 53a. Similarly, the green sheet 31 is attached to the side surface 54a of the laminate 11. The green sheet 31 does not contain phosphorus, or the phosphorus molar ratio M3 is lower than the phosphorus molar ratio M1 of the green sheet 30. Then, step S20 of forming the external electrodes 20a and 20b is performed.
[0096] (Firing Step) Next, a firing step is performed (step S22). As a result, the green sheets attached to the side surfaces 53a and 54a form side margin regions 66. Thereafter, the same step as S22 in FIG. 6 is performed.
[0097] In the multilayer ceramic capacitor manufactured by the manufacturing method of this example, the phosphorus molar ratio M3 of the green sheet 31 attached to the side surfaces 53a and 54 before the firing process is lower than the phosphorus molar ratio M1 of the green sheet 30. Therefore, after the firing process, the molar ratio P1 > P4 and the particle size W1 < W4. When the phosphorus molar ratio M2 of the dielectric pattern 33 and the phosphorus molar ratio M3 of the green sheet 31 are approximately the same, the dielectric layer 14 in the end margin region 64 is formed from the green sheet 30 with a high phosphorus molar ratio M1 and the dielectric pattern 33 with a low phosphorus molar ratio M2. On the other hand, the side margin region 66 is formed from the green sheet 31 with a low phosphorus molar ratio M3. Therefore, after firing, the molar ratio P2 > P4 and the particle size W2 < W4.
[0098] (Third Example of Manufacturing Method of Multilayer Ceramic Capacitor According to Second Embodiment) A third example of manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment will be described. The manufacturing flow of the multilayer ceramic capacitor 100 is the same as that shown in FIG. 6 or 17. No phosphorus compound is added to the green sheets 30, 31 in step S10 or to the dielectric pattern 33 in step S12. A phosphorus compound is added to the metal pattern 32 in step S12. The phosphorus compound is, for example, phosphoric acid, a phosphate-based compound, or a phosphoric acid-based compound.
[0099] The other steps S10 to S20 are the same as those in Examples 1 and 2 of the manufacturing method. Thereafter, in the binder removal treatment in step S22 of the firing process, phosphorus in the metal pattern 32 diffuses into the green sheet 30. The diffusion of phosphorus from the metal pattern 32 into the green sheet 30 can be controlled by the temperature of the binder removal treatment, the molar ratio of phosphorus in the metal pattern 32, etc. Thereafter, the same step as the firing step S22 is performed.
[0100] In the multilayer ceramic capacitor 100 manufactured by the manufacturing method of this example, in the capacitance region 62, phosphorus diffuses into the dielectric layer 14 from both the internal electrodes 12a and 12b. Therefore, the molar ratio P1 of phosphorus in the dielectric layer 14 is the highest. In the end margin region 64, phosphorus diffuses into the dielectric layer 14 from one of the internal electrodes 12a and 12b. Therefore, the molar ratio P2 of phosphorus in the dielectric layer 14 is lower than P1. Since the internal electrodes 12a and 12b are not provided in the cover dielectric layer 16 and the side margin region 66, the third molar ratio P3 and the fourth molar ratio P4 of phosphorus in the cover dielectric layer 16 and the side margin region 66 are lower than the second molar ratio P2.
[0101] As a result, after firing, the molar ratios are P1 > P2 ≥ P3 and P4, and the particle sizes are W1 < W2 ≤ W3 and W4. Phosphorus may be added to the metal pattern 32, and may also be added to the green sheet 30, as in manufacturing method examples 1 and 2. No phosphorus may be added to the green sheet 31 and the dielectric pattern 33, or phosphorus may be added at a molar ratio lower than that of the green sheet 30.
[0102] In order to diffuse phosphorus into the dielectric layer 14, the molar ratio M2 of phosphorus to the main component metal element in the metal pattern 32 in step S12 is preferably 0.0003 to 0.003 (0.03% to 0.3%). The firing temperature in the firing step S22 is preferably 1500°C or lower, more preferably 950°C to 1300°C.
[0103] To suppress dielectric breakdown and the like, improve the lifespan, and increase the strength of element body 10, achieving the desired relationship between particle sizes W1 to W4 requires complex processes, such as changing the sizes of ceramic particles in green sheets 30, 31 and dielectric pattern 33. In manufacturing method examples 1 to 3, the desired relationship between particle sizes W1 to W4 can be achieved by setting the desired phosphorus molar ratio in green sheets 30, 31, metal pattern 32, and dielectric pattern 33. Therefore, a simplified manufacturing method can be used to improve the lifespan and increase the strength of element body 10.
[0104] The molar ratio P1 of phosphorus to the main component metal elements of the ceramic in the dielectric layer 14 in the capacitance region 62 is, for example, 0.002 to 0.02. The molar ratio P2 of phosphorus to the main component metal elements of the ceramic in the dielectric layer 14 in the end margin region 64 is, for example, 0.001 to 0.01. The third molar ratio P3 of phosphorus to the main component metal elements of the ceramic in the cover dielectric layer 16 is, for example, 0 to 0.01. The fourth molar ratio P4 of phosphorus to the main component metal elements of the ceramic in the dielectric layer 14 in the side margin region 66 is, for example, 0 to 0.01.
[0105] The first molar ratio P1 is preferably at least twice, more preferably at least five times, and even more preferably at least ten times, the second to fourth molar ratios P2, P3, and P4. The second molar ratio P2 is preferably at least one time, more preferably at least two times, more preferably at least five times, and even more preferably at least ten times, the third molar ratio P3 and the fourth molar ratio P4. In Example 1 of the manufacturing method of the multilayer ceramic capacitor, the fourth molar ratio P4 is at most 1 / 2, 1 / 5, or 1 / 10 of the second molar ratio P2.
[0106] The grain size W1 of the ceramic particles 40 in the dielectric layer 14 in the capacitance region 62 is, for example, 80 nm to 1.5 μm or 80 nm to 500 nm. The grain size W2 of the ceramic particles 40 in the dielectric layer 14 in the end margin region 64 is, for example, 150 nm to 2 μm or 100 nm to 1 μm. The grain size W3 of the ceramic particles 40 in the cover dielectric layer 16 is, for example, 150 nm to 2 μm or 100 nm to 1 μm. The grain size W4 of the ceramic particles 40 in the dielectric layer 14 in the side margin region 66 is, for example, 150 nm to 2 μm or 100 nm to 1 μm.
[0107] The particle size W1 is preferably 0.9 times or less, more preferably 0.7 times or less, and even more preferably 0.5 times or less, of the particle sizes W2, W3, and W4. The particle size W2 is preferably 1 time or less, more preferably 0.9 times or less, more preferably 0.7 times or less, and even more preferably 0.5 times or less, of the particle sizes W3 and W4.
[0108] In the second embodiment, the particle size W of the particles 40 is also defined by the method described with reference to FIGS. 11A and 11B . When the particle size W1 in the dielectric layer 14 in the capacitance region 62, the particle size W2 in the dielectric layer 14 in the end margin region 64, and the particle size W3 in the cover dielectric layer 16 are different in the Z direction, the particle sizes W1, W2, and W3 are defined as follows: A line extending in the Z direction across the dielectric layer 14 between the adjacent internal electrodes 12a and 12b in the capacitance region 62 is drawn in the electron microscope image. The particle size W of all particles 40 that overlap the line in the dielectric layer 14 is measured. The number of particles 40 whose particle size W has been measured is set to 10 to 100. If the number of particles 40 whose particle size has been measured is less than 10, another line is drawn and the particle size W of the particles 40 that overlap the line is measured. The median of the particle size W of the particles 40 measured as described above is defined as particle size W1. For particle size W2, a straight line extending in the Z direction that intersects the dielectric layer 14 between adjacent internal electrodes 12a in the end margin region 64 is drawn in the electron microscope image. As with particle size W1, the particle sizes W of 10 to 100 particles 40 are measured, and the median value of the particle sizes W is defined as particle size W2. For particle size W3, a straight line extending in the Z direction that intersects the cover dielectric layer 16 is drawn in the electron microscope image. As with particle size W1, the particle sizes W of 10 to 100 particles 40 are measured, and the median value of the particle sizes W is defined as particle size W3.
[0109] The molar ratio of phosphorus to the main component metal elements of the ceramic is measured and calculated using the same method as in Embodiment 1. The molar ratios in the dielectric layer 14 in the capacitance region 62, the dielectric layer 14 in the end margin region 64, and the cover dielectric layer 16 are determined by drawing a straight line that crosses the dielectric layer 14 or the cover dielectric layer 16 in the Z direction and averaging the molar ratios in the portions that overlap with the straight line in each dielectric layer 14 and cover dielectric layer 16.
[0110] In this specification, when a certain component contains a certain element as its main component, it is sufficient that the certain element is contained in the certain component to the extent that the effect of the embodiment is achieved, and the molar ratio of the certain element in the certain component is, for example, 50 mol % or more, 80 mol % or more, or 90 mol % or more.
[0111] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes are possible within the scope of the gist of the present invention as described in the claims.
[0112] REFERENCE SIGNS LIST 10 Element body 12a, 12b Internal electrode 14 Dielectric layer 16 Cover dielectric layer 20a, 20b External electrode 30, 31 Green sheet 32 Metal pattern 33 Dielectric pattern 34, 34a, 35 Laminated sheet 40 Particle 41 Triple point 42 Grain boundary 51, 52 End face 53, 54 Side face 55 Bottom face 56 Top face 62 Capacitive region 64 End margin region 66 Side margin region
Claims
1. A multilayer ceramic electronic component comprising: an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and facing each other in a second direction; and a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively; when one dielectric layer in a capacity region that is the center of the element body in the second direction as viewed from the first direction and where the plurality of internal electrodes overlap is virtually divided into three equal intervals into a pair of first regions in contact with the internal electrodes and a second region sandwiched between the pair of first regions, a first molar ratio of phosphorus to the main metal element of the ceramic in the pair of first regions is higher than a second molar ratio of phosphorus to the main metal element in the second region.
2. The multilayer ceramic electronic component according to claim 1, wherein a first grain size of the ceramic particles in said first region is smaller than a second grain size of the ceramic particles in said second region.
3. A monolithic ceramic electronic component according to claim 1 or 2, wherein the first molar ratio is at least 1.2 times the second molar ratio.
4. A multilayer ceramic electronic component as described in claim 1 or 2, wherein a third molar ratio of phosphorus to the main metal element in a pair of third regions within a range from the internal electrode of one of the dielectric layers to 0.1 times the width of the one of the dielectric layers in the first direction is 1.5 times or more a fourth molar ratio of phosphorus to the main metal element in the dielectric layer.
5. The multilayer ceramic electronic component according to claim 1 or 2, wherein in said one dielectric layer, the grain size of the ceramic grains not adjacent to said internal electrode and adjacent to said ceramic grains adjacent to said internal electrode is smaller than the grain size of the ceramic grains in said second region.
6. The multilayer ceramic electronic component according to claim 1 or 2, wherein the number of ceramic particles in the first direction of each of said dielectric layers is five or more.
7. The multilayer ceramic electronic component according to claim 1 or 2, wherein the main component of said ceramic is barium titanate, and the main component of said plurality of internal electrodes is nickel.
8. A multilayer ceramic electronic component comprising: an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and facing each other in a second direction; and a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively, wherein a first molar ratio of phosphorus to a main metal element of the ceramic in the dielectric layers in a capacitive region that is a central part of the element body in the second direction as viewed from the first direction and where the plurality of internal electrodes overlap is higher than a second molar ratio of phosphorus to a main metal element of the ceramic in the dielectric layers in an end margin region that is an end part of the element body in the second direction as viewed from the first direction and where no part of the plurality of internal electrodes is provided.
9. The multilayer ceramic electronic component according to claim 8, wherein a first grain size of the ceramic grains in the dielectric layers in said capacitive region is smaller than a second grain size of the ceramic grains in the dielectric layers in said end margin regions.
10. The multilayer ceramic electronic component according to claim 8, wherein a third molar ratio of phosphorus to said main component metallic element in a cover dielectric layer located on the outermost side of said plurality of dielectric layers is lower than said first molar ratio.
11. The multilayer ceramic electronic component according to claim 10, wherein a first grain size of the ceramic grains in the dielectric layers in the capacitive region is smaller than a second grain size of the ceramic grains in the dielectric layers in the end margin regions, and a third grain size of the ceramic grains in the cover dielectric layers is larger than the first grain size.
12. The multilayer ceramic electronic component according to claim 10, wherein the third molar ratio is lower than the second molar ratio.
13. The multilayer ceramic electronic component according to claim 12, wherein a first grain size of the ceramic grains in the dielectric layers in the capacitance region is smaller than a second grain size of the ceramic grains in the dielectric layers in the end margin regions, and a third grain size of the ceramic grains in the cover dielectric layers is larger than the second grain size.
14. A multilayer ceramic electronic component as described in claim 10, wherein a fourth molar ratio of phosphorus to the main component metal element in a side margin region at an end of the body in a third direction intersecting the first direction and the second direction when viewed from the first direction and in which the plurality of internal electrodes are not provided is lower than the first molar ratio.
15. The multilayer ceramic electronic component according to claim 14, wherein the fourth molar ratio is equal to or less than the second molar ratio.
16. A method for manufacturing a multilayer ceramic electronic component comprising the steps of: preparing an element body in which a plurality of green sheets containing ceramic particles and a plurality of metal patterns containing phosphorus are alternately laminated in a first direction; firing the element body to form a plurality of internal electrodes from the plurality of metal patterns alternately exposed from a pair of end faces opposing in a second direction, and forming a plurality of dielectric layers from the plurality of green sheets; and forming a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively; wherein after firing the element body, when one dielectric layer in a capacity region which is the center of the element body in the second direction as viewed from the first direction and in which the plurality of internal electrodes overlap is virtually divided into three equal intervals into a pair of first regions in contact with the internal electrodes and a second region sandwiched between the pair of first regions, a first molar ratio of phosphorus to the main metal element of the ceramic particles in the pair of first regions is higher than a second molar ratio of phosphorus to the main metal element in the second region.
17. The method for producing a multilayer ceramic electronic component according to claim 16, wherein the ceramic particles are mainly composed of barium titanate, and the internal electrodes are mainly composed of nickel.
18. A method for manufacturing a multilayer ceramic electronic component, comprising: preparing an element body by laminating laminate sheets in a first direction, each laminate sheet having a metal pattern formed on a green sheet containing ceramic particles and a dielectric pattern containing ceramic particles between the metal pattern; firing the element body to form a plurality of internal electrodes from the metal pattern alternately exposed from a pair of end faces opposing each other in a second direction, thereby forming a plurality of dielectric layers from the green sheet and the dielectric pattern; and forming a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively, wherein a first molar ratio of phosphorus to main component metal element of the ceramic particles in the green sheet sandwiched between the metal patterns in the first direction is higher than a second molar ratio of phosphorus to main component metal element in the dielectric pattern.
19. The method for producing a multilayer ceramic electronic component as set forth in claim 18, wherein a third molar ratio of phosphorus to the main component metal element in the green sheet that is outermost in the element body in the first direction is lower than the first molar ratio.
20. A method for manufacturing a multilayer ceramic electronic component as described in claim 19, wherein the step of preparing the base body includes the steps of: preparing a laminate in which the metal pattern is exposed from opposing side surfaces in a third direction intersecting the first direction and the second direction; and attaching a side green sheet containing ceramic particles to the side surface of the laminate, wherein a fourth molar ratio of phosphorus to the main component metal element in the side green sheet is lower than the first molar ratio.
21. A method for manufacturing a multilayer ceramic electronic component as described in any one of claims 18 to 20, wherein after the element body is fired, a first molar ratio of phosphorus to the main metal element in the dielectric layer in a capacitive region that is a central portion of the element body in the second direction when viewed from the first direction and where the multiple internal electrodes overlap is higher than a second molar ratio of phosphorus to the main metal element in the dielectric layer in an end margin region that is an end portion of the element body in the second direction when viewed from the first direction and where no part of the multiple internal electrodes is provided.
22. A method for manufacturing a multilayer ceramic electronic component, comprising the steps of: preparing an element body by laminating, in a first direction, laminate sheets each having a green sheet containing ceramic particles on which a metal pattern containing phosphorus and a dielectric pattern containing ceramic particles between the metal pattern; firing the element body to form from the metal pattern a plurality of internal electrodes alternately exposed from a pair of end faces opposing in a second direction, thereby forming a plurality of dielectric layers from the green sheet and the dielectric pattern; and forming a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively; wherein after firing the element body, a first molar ratio of phosphorus to main metal element in a dielectric layer in a capacity region that is a central part of the element body in the second direction as viewed from the first direction and where the plurality of internal electrodes overlap is higher than a second molar ratio of phosphorus to main metal element in a dielectric layer in an end margin region that is an end part of the element body in the second direction as viewed from the first direction and where no part of the plurality of internal electrodes is provided.