Semiconductor photodetectors, optical line terminals, multilevel intensity modulation transceivers, digital coherent receivers, radio-over-fiber systems, SPAD sensor systems, and lidar devices

Abstract

The semiconductor photodetector (110) of the present disclosure comprises an InP substrate (1), an n-type semiconductor layer (2a) formed on the InP substrate (1), an electron transit layer (3) formed on the n-type semiconductor layer (2a) and having a digital alloy structure, an n-type electric field relaxation layer (12) formed on the electron transit layer (3), a multiplication layer (13) formed on the n-type electric field relaxation layer (12), a p-type electric field relaxation layer (14) formed on the multiplication layer (13), and a light absorption layer (5) formed on the p-type electric field relaxation layer (14).

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor photodetector, an optical line terminal, a multilevel intensity modulation transceiver, a digital coherent receiver, an optical fiber radio system, a SPAD sensor system, and a LIDAR device. [Background technology]

[0002] Along with the progress of digital transformation that utilizes digital information, there has been remarkable development of communication networks that communicate digital information with each other and data centers that store and process data. Optical communication is used for communication networks and communication within data centers. In recent years, optical communication has made remarkable progress in increasing speed and capacity. With the progress of optical communication, photodiodes (PD) and Avalanche Photodiodes (APD), which provide high receiving sensitivity, are required as optical communication receivers.

[0003] Passive Optical Networks (PON) are the primary method used in access networks that connect optical communication subscribers. PON systems started with G(E)-PON systems that transmit signals of 1 to 2 Gbps, and are expected to see an increase in 10G-EPON and XG-PON systems that transmit signals of 10 Gbps in the future. Furthermore, the International Telecommunication Union Telecommunication Standardization Sector (ITU-T) is considering the 50G-PON system, a next-generation high-speed PON system, and it is expected that 50 Gbps-class transmissions will also be put to practical use in access networks in the future.

[0004] APDs, which are semiconductor photodetectors used in PON systems, have an element structure consisting of a light absorption layer (InGaAs), an electric field buffer layer (InP or InAlAs), and a multiplication layer (InP or InAlAs). A high electric field of about 800 kV / cm is applied to the multiplication layer to multiply, or ionize, the electrons and holes generated in the light absorption layer. The electric field buffer layer functions to weaken the electric field so that the high electric field of the multiplication layer is not applied to the light absorption layer. Incidentally, the ionization rate of electrons is expressed as α, and the ionization rate of holes as β.

[0005] In an APD, the greater the ratio of the ionization rates of electrons and holes, the smaller the excess noise generated during multiplication and the higher the receiver sensitivity. Furthermore, the greater the ratio of the ionization rates of electrons and holes, the shorter the multiplication time in the multiplication layer, resulting in a broader bandwidth.

[0006] The ionization rate ratio k of electrons and holes is defined as k = β / α. When electrons are injected into the multiplication layer, the smaller the ionization rate ratio k, the better the APD performance. Compound semiconductor materials such as InAlAs or InP are used for the multiplication layer of APDs for optical communications.

[0007] When InAlAs is selected as the material for the multiplication layer, the difference between the ionization rates of electrons and holes is greater than in the case of InP. In InP, the ionization rate of holes is greater than that of electrons, and the ionization rate of holes is about twice that of electrons. On the other hand, when InAlAs is selected as the material for the multiplication layer, the ionization rate of electrons is greater than that of holes, and the ionization rate of electrons is about five times that of holes. Therefore, since the reception sensitivity is higher when InAlAs is used as the multiplication layer, InAlAs is more suitable than InP as the material for the multiplication layer of an APD.

[0008] As mentioned above, PON systems require APDs, which are semiconductor light-receiving elements, to have a wide response bandwidth and high reception sensitivity. However, unlike PDs, APDs have a problem in that the time required for multiplication, i.e., the multiplication time, becomes longer as the multiplication factor increases, resulting in a decrease in bandwidth at high multiplication factors. APDs with a multiplication layer made of InAlAs, which is used in optical communications, have a wider bandwidth than APDs made of other semiconductor materials, but the bandwidth remains at approximately 20 GHz when the multiplication factor is 6 or more. In other words, there is a problem in that it is difficult to achieve the bandwidth of 37.5 GHz or more required for 50G-PON systems when conventional APDs are used. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Publication No. 11-008403 [Non-patent literature]

[0010] [Non-Patent Document 1] Hiroshi Ito,Satoshi Kodama, Yoshifumi Muramoto, Tomofumi Furuta,Tadao Nagatsuma,Tadao Ishibashi”High-Speed ​​and High-Output InP-InGaAs Unitraveling-Carrier Photodiodes”IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,VOL.10,NO.4,PP.709-727(2004) [Non-Patent Document 2] Jiyuan Zheng et.al, “Digital Alloy InAlAs Avalanche Photodiodes”,JOURNAL OF LIGHTWAVE TECHNOLOGY,VOL.36,NO.17,SEPTEMBER 1,pp.3580-3585,2018 [Non-Patent Document 3] PJHambleton,BKNg,SAPlimmer,JPRDavid,and GJRees,”The Effects of Nonlocal Impact Ionization on the Speed ​​of Avalanche Photodiodes”IEEE TRANSACTIONS ON ELECTRON DEVICES,VOL.50,NO.2,pp.347,FEBRUARY (2003) Summary of the Invention [Problem to be solved by the invention]

[0011] As described above, PDs and APDs, which are semiconductor light receiving elements used in optical communications, are required to operate over an even wider bandwidth. Patent Document 1 describes an APD using a superlattice, but the superlattice is applied not to the electron transport layer but to the multiplication layer and the electric field relaxation layer, and each layer has a thickness of 5 nm to 10 nm, so that it acts as a quantum well reflecting the band gap of each layer. If the thickness of each layer in the stack is several nm or more, energy unevenness reflecting the band gap of each layer is generated, which hinders the transport of carriers and reduces the transport speed.

[0012] In a 50G-PON system, the response bands of the semiconductor light-emitting element and the semiconductor light-receiving element, the optical output of the semiconductor light-emitting element, and the receiving sensitivity of the semiconductor light-receiving element are insufficient. For this reason, it is being considered to provide a digital bandwidth compensation circuit using a digital signal processor (DSP) after the APD in the optical network unit (ONU), that is, the receiving device on the subscriber side.

[0013] Furthermore, in the optical line terminal (OLT), i.e., the receiving device on the central office side, a semiconductor optical amplifier (SOA) is required to compensate for the lack of receiving sensitivity of the semiconductor photodetector, and an SOA must be integrated into the electro-absorption modulated laser diode (EML) on the transmitting side of the ONU to increase the optical output. However, DSPs and SOAs consume a lot of power, which increases costs, and there are concerns that this will hinder progress in replacing existing PON systems with 50G-PON systems.

[0014] In addition, in existing PON systems other than the next-generation high-speed PON system, it is being considered to increase the number of splits of the optical signal output from the OLT in order to reduce costs. However, in this case, it is necessary to increase the optical output by integrating an SOA in the EML on the transmitting side of the OLT and ONU, which causes problems such as an increase in the power consumption of the transmitter and an increase in costs.

[0015] As described above, in order to compensate for the limitations of the receiving sensitivity and response bandwidth of semiconductor photodetectors, transceivers have been designed that incorporate expensive, power-hungry DSPs and SOAs into the ONUs and OLTs. However, this brings about problems of increased power consumption and costs.

[0016] The present disclosure has been made to solve the above-mentioned problems, and has an object to provide a semiconductor light-receiving element that operates over a wide band. [Means for solving the problem]

[0017] The semiconductor light receiving element according to the present disclosure comprises: An InP substrate, an n-type semiconductor layer formed on the InP substrate; A digital alloy structure is formed on the n-type semiconductor layer. I-type An electron transport layer; The above I-type an n-type electric field relaxation layer formed on the electron transit layer; The n-type electric field buffer layer is formed on the I-type A multiplication layer; The above I-type a p-type electric field buffer layer formed on the multiplication layer; a light absorbing layer formed on the p-type electric field buffer layer; Equipped with.

[0018] The optical line terminal according to the present disclosure comprises: The semiconductor light receiving element described above, an optical multiplexer / demultiplexer that inputs an optical signal to the semiconductor light receiving element; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; a clock data recovery circuit connected to the amplifier circuit and configured to recover clock data from the amplified electrical signal; and a forward error correction circuit connected to the clock data recovery circuit for correcting an error in the clock data.

[0019] A multi-level intensity modulation transmitting / receiving device according to the present disclosure comprises: The semiconductor light receiving element described above for receiving an optical signal intensity-modulated into multiple values; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; an analog / digital conversion circuit connected to the amplifier circuit and converting the amplified electrical signal into a digital signal; A digital signal processing circuit is connected to the analog / digital conversion circuit and processes the digital signal.

[0020] The radio-over-fiber system according to the present disclosure comprises: a light source that emits an analog modulated optical signal; The semiconductor light receiving element described above for receiving the analog-modulated optical signal; a transmission path for transmitting an analog electrical signal output from the semiconductor light receiving element to an antenna; and an antenna connected to the transmission line for emitting the analog electrical signal as a radio wave signal.

[0021] A digital coherent receiving device according to the present disclosure includes: The semiconductor light receiving element described above, a polarization splitter that splits the polarization of the intensity- and phase-modulated polarization multiplexed optical signal; a 90-degree hybrid that splits and combines the optical signals output from the polarization splitter; and a digital signal processing circuit connected to the 90-degree hybrid device for processing a digital signal.

[0022] The SPAD (Single Photon Avalanche Diode) sensor system according to the present disclosure includes: A SPAD sensor constituted by the semiconductor light receiving element described above; a quenching circuit for repeatedly applying a voltage equal to or greater than a breakdown voltage and a voltage equal to or less than the breakdown voltage to the SPAD sensor; and an optoelectronic measurement circuit that measures the electrical signal output from the SPAD sensor.

[0023] The LIDAR device according to the present disclosure comprises: A light source that emits light in a pulsed manner; the semiconductor light receiving element described above for receiving light emitted from the light source and reflected by an object; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; and a distance measuring circuit that calculates a distance based on the electrical signal amplified by the amplifier circuit. Effect of the Invention

[0024] According to the semiconductor light receiving element according to the present disclosure, at least the electron transit layer has a digital alloy structure, and therefore, an effect is achieved in that a semiconductor light receiving element that operates over a wide band is obtained.

[0025] According to the optical line terminal device, multi-level intensity modulation transceiver device, digital coherent receiver device, optical fiber radio system, SPAD sensor system, and LIDAR device of the present disclosure, the semiconductor photodetector element of the present disclosure is used as the semiconductor photodetector element, thereby achieving the effect of obtaining each device and system, etc., with excellent performance. [Brief description of the drawings]

[0026] [Figure 1] 1 is a cross-sectional view illustrating an element structure of a front-illuminated type PD, which is an example of a semiconductor light-receiving element according to a first embodiment. [Diagram 2] 1 is a cross-sectional view illustrating a device structure of an edge-illuminated PD, which is an example of a semiconductor light-receiving element according to a first embodiment. [Diagram 3] 1 is a diagram showing the relationship between the lattice constant of each constituent material and the amount of strain based on InP. [Figure 4] 10 is a cross-sectional view illustrating a device structure of a front-illuminated APD, which is an example of a semiconductor light-receiving device according to a second embodiment. [Diagram 5] 11 is a cross-sectional view illustrating the element structure of an edge-illuminated APD, which is an example of a semiconductor light-receiving element according to a second embodiment. FIG. [Figure 6] FIG. 13 is a diagram showing the electric field dependence of the electron dead space in an InAlAs multiplication layer. [Figure 7] 7A to 7C are diagrams showing the ionization rates of electrons and holes. [Figure 8] FIG. 13 is a graph showing the dependence of the ionization rate ratio and the tunnel current on the thickness of the multiplication layer. [Figure 9] Figures 9A to 9D are graphs showing the ionization rates in the multiplication layer and electric field relaxation layer, with Figure 9A showing the ionization rate in the case of a random alloy structure multiplication layer, Figure 9B showing the ionization rate in the case of a digital alloy structure multiplication layer, Figure 9C showing the ionization rate in the case of a partially disordered digital alloy structure multiplication layer, and Figure 9D showing the ionization rate in the case of a combination of a thick electric field relaxation layer and a digital alloy structure multiplication layer. [Figure 10] 11 is a cross-sectional view showing the element structure of a front-illuminated type PD, which is an example of a semiconductor light-receiving element according to embodiment 3. FIG. [Figure 11] 11 is a cross-sectional view showing the element structure of a front-illuminated type PD, which is an example of a semiconductor light-receiving element according to embodiment 3. FIG. [Figure 12] 11 is a cross-sectional view illustrating the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a fourth embodiment. FIG. [Figure 13] 11 is a cross-sectional view illustrating the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a fourth embodiment. FIG. [Figure 14] 13 is a cross-sectional view illustrating the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a fifth embodiment. FIG. [Figure 15] 13 is a cross-sectional view illustrating the element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element according to a sixth embodiment. FIG. [Figure 16] 13 is a cross-sectional view showing the element structure of a front-illuminated type PD, which is an example of a semiconductor light-receiving element according to the seventh embodiment. FIG. [Figure 17] 13 is a cross-sectional view showing the element structure of a front-illuminated type PD, which is an example of a semiconductor light-receiving element according to the seventh embodiment. FIG. [Figure 18] 13 is a cross-sectional view illustrating the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to an eighth embodiment. FIG. [Figure 19] 13 is a cross-sectional view illustrating the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to an eighth embodiment. FIG. [Figure 20] 13 is a cross-sectional view illustrating the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element according to a ninth embodiment. FIG. [Figure 21] 13 is a cross-sectional view illustrating an element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element according to a tenth embodiment. FIG. [Figure 22] 13 is a cross-sectional view illustrating an element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element according to an eleventh embodiment. FIG. [Diagram 23] 12 is a cross-sectional view showing the element structure of a front-illuminated type PD, which is an example of a semiconductor light-receiving element according to a twelfth embodiment. FIG. [Figure 24] 23 is a cross-sectional view illustrating a device structure of a front-illuminated APD, which is an example of a semiconductor light-receiving device according to a thirteenth embodiment. FIG. [Diagram 25] A configuration diagram showing an optical line terminal (OLT) of a 50G-PON system relating to embodiment 14. [Figure 26] A configuration diagram showing an optical network unit (ONU) of a 50G-PON system relating to embodiment 14. [Figure 27] FIG. 1 is a configuration diagram illustrating an optical line terminal (OLT) of a 50G-PON system as a comparative example. [Figure 28] A diagram showing the configuration of an optical line terminal (OLT) of a 50G-PON system relating to embodiment 14. [Figure 29] A diagram showing the configuration of an optical network unit (ONU) of a 50G-PON system relating to embodiment 14. [Diagram 30] FIG. 23 is a diagram illustrating the configuration of a multilevel intensity modulation transmitting / receiving device according to a fifteenth embodiment. [Diagram 31] 31A and 31B are diagrams illustrating received waveforms of a multi-level intensity modulation transmitting / receiving device according to the fifteenth embodiment. [Diagram 32] 32A and 32B are diagrams for explaining the operation of a PD when a high optical input is applied. [Diagram 33] FIG. 1 is a diagram illustrating the operation of an APD when a high optical input is applied. [Diagram 34] FIG. 2 is a diagram showing the residence times of electrons and holes for each material constituting the multiplication layer. [Diagram 35] FIG. 23 is a diagram illustrating a configuration of a radio-on-fiber system according to a sixteenth embodiment. [Diagram 36] FIG. 1 illustrates a configuration of a radio-on-fiber system as a comparative example. [Figure 37] FIG. 23 is a diagram illustrating a configuration of a digital coherent receiving device according to a seventeenth embodiment. [Figure 38] FIG. 38A is a diagram illustrating waveforms of a digital coherent receiving device that is a comparative example, and FIG. 38B is a diagram illustrating waveforms of a digital coherent receiving device according to the seventeenth embodiment. [Figure 39] FIG. 23 is a diagram illustrating a configuration of a SAPD sensor system according to an eighteenth embodiment. [Diagram 40]FIG. 40A is a graph showing the multiplication characteristics of a SAPD sensor system as a comparative example, and FIG. 40B is a graph showing the multiplication characteristics of the SAPD sensor system according to the eighteenth embodiment. [Diagram 41] FIG. 13 is a diagram showing the calculated difference between the quenching electric field and the Geiger mode electric field for each multiplication layer configuration. [Diagram 42] FIG. 23 is a diagram illustrating the configuration of a LIDAR device according to a nineteenth embodiment. [Diagram 43] FIG. 43A is a diagram showing a received waveform of the APD of a LIDAR device which is a comparative example, and FIG. 43B is a diagram showing a received waveform of the APD of the LIDAR device according to embodiment 19. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] Embodiment 1 <Features of the semiconductor photodetector (PD) according to the first embodiment> Before describing the specific structure of the semiconductor light receiving element according to the first embodiment, a digital alloy structure electron transit layer, which is a structural feature of the semiconductor light receiving element according to the first embodiment, will be described below. Note that the semiconductor light receiving element according to the first embodiment is a PD, but both will be described together, including an APD, which is a semiconductor light receiving element described in the second embodiment and thereafter.

[0028] The 3 dB bandwidth of a PD, fc_PD, is given by the following equation (1), where frc is the bandwidth limit due to the RC time constant, and ftr is the bandwidth limited by the time it takes for carriers to travel through the depletion layer. fc_PD=1 / ((1 / frc) 2 +(1 / ftr) 2 ) 0.5 (1)

[0029] The 3 dB band fc_APD of the APD further includes the multiplication time. If the band limit due to the multiplication time is fm, then the band limit is given by the following equation (2). fc_APD=1 / ((1 / frc) 2 +(1 / ftr)2 +(1 / fm) 2 ) 0.5 (2)

[0030] When the multiplication factor of an APD is small or the ionization rate ratio k is close to zero, the bandwidth is limited mainly by the RC time constant and the carrier transit time, resulting in a value that approximates equation (1). Therefore, here we will consider the case of a PD, that is, based on equation (1).

[0031] Since the RC time constant is inversely proportional to the depletion layer thickness and the transit time is directly proportional to the depletion layer thickness, equation (1) has a maximum value. In other words, fc_PD has a maximum bandwidth when frc=ftr. Substituting frc=ftr into equation (1), equation (1) can be expressed as the following equation (3). fc=ftr / √2 (3)

[0032] Moreover, the 3 dB bandwidth ftr determined by the running time is expressed by the following equation (4). ftr=3.5Vav / (2πWt) (4)

[0033] In equation (4), Vav is the average saturated transit velocity of electrons and holes, and Wt is the total depletion layer thickness. If the average saturated transit velocities of electrons and holes are Ve and Vh, respectively, Vav can be expressed by the following equation (5). 2 / (Vav) 4 =1 / (Ve) 4 +1 / (Vh) 4 (5)

[0034] In the InGaAs layer, when the electric field is weak (several tens of kV / cm or less), the traveling speed of electrons and holes is proportional to the electric field. However, when an electric field of several tens of kV / cm or more is applied to the electrons and holes, they each reach a saturated velocity and become a constant value. The saturated average velocity of electrons and holes in the InGaAs layer is Ve = 6.5 × 10 6 cm / s and Vh = 4.8 x 10 6cm / s, so Vav = 5.35 x 10 6 For example, if the thickness W of the depletion layer is set to Wt = 500 nm and substituted into equation (4), f tr = 59.6 GHz is obtained, and if f tr = 59.6 GHz is further substituted into equation (3), the bandwidth fc is 42.2 GHz.

[0035] To increase the bandwidth fc of a PD, as can be seen from equation (3), it is necessary to shorten the time it takes for electrons and holes to pass through the depletion layer by increasing the travel speed of the electrons and holes. The electron speed Ve is greater than the hole speed Vh. For example, when the electrons travel through the depletion layer at Ve=6.5×10 6 cm / s and Vh = 4.8 x 10 6 When electrons travel at 1.35 cm / s, they can travel 1.35 times (=Ve / Vh) the distance in the same time. In other words, in the time it takes for holes to travel 1000 nm, electrons can travel 1350 nm, so even if a 350 nm electron travel layer (only electrons travel because it is on the n-side) is provided on the n-side of the light absorption layer of the PD, the time it takes for electrons and holes to travel in the depletion layer does not increase.

[0036] On the other hand, the thickness W of the depletion layer is increased by the thickness of the electron transit layer, i.e., 350 nm, so the RC time constant decreases, and as a result, the bandwidth of the PD can be broadened. The above is the role of the electron transit layer. For example, as described in Non-Patent Document 1, providing an electron transit layer (referred to as a carrier collection layer in Non-Patent Document 1) in a PD not only increases the speed, but also enables a large photocurrent to flow.

[0037] In this way, the electron transit layer is effective in broadening the bandwidth of semiconductor light-receiving elements, and if the transit speed of electrons and holes in the electron transit layer can be further increased, an even wider bandwidth can be achieved for PDs and APDs.

[0038] Furthermore, the inventors, while analyzing the multiplication characteristics of an APD having an InAlAs digital alloy structure (also called atomic layer superlattice, ALSL: Atomic Layer Super Lattice, Non-Patent Document 2) in which two-atom InAs layers and two-atom AlAs layers are repeatedly stacked, discovered that the distance that carriers travel through the multiplication layer until they are ionized is longer than that of a normal InAlAs layer (random alloy structure). Here, the distance that carriers travel through the multiplication layer until they are ionized is called the dead space. FIG. 6 shows the dead space of an InAlAs digital alloy structure multiplication layer and an InAlAs random alloy structure multiplication layer. FIG. 6 will be described in detail later.

[0039] If the electron dead space length is De, then in the case of the InAlAs random alloy structure, De is approximately 40 nm, as shown in Figure 6. It was found that in the case of the InAlAs digital alloy structure, De is approximately 80 nm compared to the InAlAs random alloy structure.

[0040] In addition, the ionization rate ratio k of electrons and holes drops sharply due to the dead space effect when the multiplication layer is thinned, as shown in Figure 8. The reason why the ionization rate ratio k drops is thought to be that, assuming that the dead space length of holes is Dh, the multiplication layer thickness becomes thinner than Dh, so that holes cannot be multiplied.

[0041] The inventors found that the ionization rate ratio k is lower in the InAlAs digital alloy structure than in the InAlAs random alloy structure even if the multiplication layer is thicker. As shown in Figure 8, in the case of InAlAs with a random alloy structure, Dh is about 80 nm, whereas in the case of the InAlAs digital alloy structure, Dh is about 170 nm.

[0042] In the dead space, the energy of the traveling carriers is not consumed by ionization, so the speed of the carriers increases. For example, Non-Patent Document 3 reports the results of a study that shows that the effective carrier speed in a multiplication layer with a layer thickness of 200 nm increases by 169%. This is because the effect of the dead space in the layer thickness of 200 nm becomes large when the layer thickness is about 200 nm. In other words, the traveling speed increases as the dead space increases. Therefore, by using an InAlAs digital alloy structure with a longer dead space for the electron travel layer instead of the conventional InAlAs random alloy structure, the traveling speed in the electron travel layer increases, and the time it takes to travel in the depletion layer can be shortened.

[0043] In addition, if the hole transit speed is increased, it will be possible to introduce a hole transit layer. In other words, by using an InAlAs digital alloy structure with a long dead space as the hole transit layer instead of the conventional InAlAs random alloy structure, the transit speed in the hole transit layer will increase, and the transit time in the depletion layer will be shortened.

[0044] <Element structure of semiconductor photodetector (PD) according to the first embodiment> Fig. 1 is a cross-sectional view showing the element structure of a front-illuminated PD which is an example of the semiconductor light receiving element 100 according to the embodiment 1. Fig. 2 is a cross-sectional view showing the element structure of an edge-illuminated PD which is an example of the semiconductor light receiving element 100a according to the embodiment 1.

[0045] The front-illuminated PD, which is an example of the semiconductor light-receiving element 100 according to the first embodiment, includes an n-type InP substrate 1 and a semiconductor layer having a carrier concentration of 1 to 5×10 18 cm -3 and an n-type InP buffer layer 2 having a thickness of 0.1 to 1.0 μm and a carrier concentration of 1×10 17 cm -3The InAlAs electron transport layer 3 has a digital alloy structure in which i-type AlAs layers (for example, a layer thickness of two atomic layers, about 0.6 nm) and i-type InAs layers (for example, a layer thickness of two atomic layers, about 0.6 nm) are alternately laminated multiple times, and has a thickness of 50 nm to 1000 nm (hereinafter referred to as i-type InAlAs digital alloy structure electron transport layer 3). 17 cm -3 and an i-type InAlGaAs graded layer 4 having a thickness of 5 to 50 nm and a carrier concentration of 1×10 17 cm -3 and an i-type InGaAs light absorbing layer 5 having a thickness of 50 nm to 3.0 μm or less, and a carrier concentration of 5×10 17 cm -3 and an i-type InAlGaAs / InAlAs graded layer 6 having a thickness of 5 to 50 nm and a carrier concentration of 5×10 17 cm -3 The structure comprises a p-type InP window layer 7 having a thickness of 0.1 to 3.0 μm, a p-type InGaAs contact layer 8, an n-type electrode 31 formed on the back surface side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8.

[0046] A p-type InAlAs window layer may be used instead of the p-type InP window layer 7. The n-type InP buffer layer 2 is also called an n-type semiconductor layer.

[0047] The semiconductor light receiving element 110 according to the first embodiment shown in FIG. 2 has a layer structure similar to that of the semiconductor light receiving element 100, but further includes an Fe-doped semi-insulating InP buried layer 20 formed at least on the end surface onto which the incident light 90 is incident.

[0048] Silicon (Si) is optimal as the n-type dopant for the n-type InP buffer layer 2. This is to prevent the digital alloy structure from becoming disordered due to the n-type impurities diffusing from the n-type InP buffer layer 2 into the i-type InAlAs digital alloy structure electron transit layer 3. Here, disordering refers to the phenomenon in which the compositions of the layers in the digital alloy structure mix together, resulting in a random alloy structure with an average composition.

[0049] As described above, the i-type InAlAs digital alloy structure electron transit layer 3 is composed of semiconductor layers in which AlAs layers (layer thickness: 2 atomic layers, approximately 0.6 nm) and InAs layers (layer thickness: 2 atomic layers, approximately 0.6 nm) are alternately stacked in this order. However, it is sufficient that the layer thicknesses of the AlAs layers and InAs layers are each in the range of 2 atomic layers to 6 atomic layers. The reason for using 6 atomic layers or less is that it is desirable for the stacked structure of the AlAs layers and InAs layers not to function as a quantum well structure. In other words, the digital alloy structure has two types of semiconductor layers, each made of a different semiconductor material, alternately stacked in a cycle of 2 atomic layers to 6 atomic layers.

[0050] Furthermore, the number of atomic layers of each layer of the i-type InAlAs digital alloy structure electron transit layer 3 is preferably 2 to 4 atomic layers, and is optimally 2 atomic layers. This is because the thinner the atomic layer thickness of each layer, the greater the effect of reducing the ionization rate ratio k due to the digital alloy structure. In addition, when considering not only the performance as a semiconductor light receiving element but also the productivity, a layer thickness of 4 to 6 atomic layers is also preferable, which reduces the number of shutter switching times during crystal growth by molecular beam epitaxy (MBE). In view of the above factors, it can be said that the number of atomic layers of each layer of the i-type InAlAs digital alloy structure electron transit layer 3 is preferably in the range of 2 to 6 atomic layer periods. Similarly, from the viewpoint of productivity, the entire electron transit layer does not have to be an InAlAs digital alloy structure, but a part of the electron transit layer may be an InAlAs digital alloy structure and the remaining part may be an InAlAs random alloy structure.

[0051] The thickness of the i-type InAlAs digital alloy structure electron transit layer 3 is within the range of 50 nm to 1000 nm. For example, if the thickness of the i-type InAlAs digital alloy structure electron transit layer 3 is 500 nm, the number of repetitions of the AlAs layer (two atomic layers) / InAs layer (two atomic layers) is 417. As shown in FIG. 8, the dead space effect is significantly manifested at a layer thickness of 200 nm or less, so the layer thickness of the i-type InAlAs digital alloy structure electron transit layer 3 is most preferably in the range of 50 nm to 200 nm. Furthermore, if the layer thickness is 400 nm or less, the electron transit speed is high at a distance of 200 nm, which is 50% or more of the layer thickness, so a large dead space effect can be obtained even in the layer thickness range of 50 nm to 400 nm.

[0052] Considering the affinity with InP constituting the n-type InP buffer layer 2, it is preferable to make the layer thickness of only the first AlAs layer of the i-type InAlAs digital alloy structure electron transit layer 3 three atomic layers or more thick. Alternatively, the i-type InAlAs digital alloy structure electron transit layer 3 may be laminated by alternately forming InAs layers and AlAs layers in this order.

[0053] The conductivity type of the InAlAs digital alloy electron transport layer is i-type, and the carrier concentration is 1×10 17 cm -3 The following is an example. However, the conductivity type of the InAlAs digital alloy structure electron transport layer is 5×10 17 cm -3 It may be p-type or n-type as follows:

[0054] In addition to the electron transit layer having an InAlAs digital alloy structure, an InAlGaAs digital alloy structure in which InAlyGa(1-y)As (layer thickness of 2 to 6 atomic layers, Al composition ratio Y) and InAlzGa(1-z)As (layer thickness of 2 to 6 atomic layers, Al composition ratio Z) are alternately laminated, as shown in Figure 3, which shows the relationship between the lattice constant of each constituent material and the amount of strain based on InP, can also be used as the electron transit layer of the present disclosure. Furthermore, a digital alloy structure made of InAlAsSb, a material system containing antimony (Sb), can also be used as the electron transit layer of the present disclosure.

[0055] The i-type InAlGaAs graded layer 4 and the i-type InAlGaAs / InAlAs graded layer 6 are layers in which the band gap is gradually changed by changing the InAlGaAs composition, and each layer thickness is within the range of 5 to 50 nm. The InAlGaAs composition may be changed stepwise, and the band gap is intermediate between that of an InP layer and an InGaAs layer. The carrier concentration is 5×10 17 cm -3 or less, and may be p-type or n-type as long as the carrier concentration is low. Note that the i-type InAlGaAs graded layer 4 and the i-type InAlGaAs / InAlAs graded layer 6 are not necessarily required and may be omitted.

[0056] In one example of the element structure of the semiconductor photodetector 100 shown in FIG. 1, two types of i-type InAlGaAs layers having different compositions are alternately stacked multiple times on an i-type InGaAs light absorption layer 5 to form an i-type InAlGaAs / InAlAs graded layer 6.

[0057] <Method of Manufacturing Semiconductor Light-Receiving Element According to First Embodiment> A front-illuminated PD, which is an example of the semiconductor photodetector 100 according to the first embodiment, can be realized by using metal organic vapor phase epitaxy (MOVPE) or MBE on an n-type InP substrate 1. A method for manufacturing the semiconductor photodetector 100 according to the first embodiment will be described below.

[0058] Using MOVPE or MBE, a 0.1-1 μm thick InP layer with a carrier concentration of 1-5×10 18 cm -3 The n-type InP buffer layer 2 is grown by crystal growth.

[0059] On the n-type InP buffer layer 2, a carrier concentration of 1×10 17 cm -3The i-type InAlAs digital alloy structure electron transit layer 3 is crystal grown to have a thickness of 50 nm to 1000 nm or less. That is, the i-type InAlAs digital alloy structure electron transit layer 3 is formed by alternately growing crystals of an AlAs layer (having a thickness of two atomic layers, approximately 0.6 nm) and an InAs layer (having a thickness of two atomic layers, approximately 0.6 nm) on the n-type InP buffer layer 2.

[0060] A layer having a thickness of 5 nm or more and 50 nm or less and a carrier concentration of 5×10 17 cm -3 The i-type InAlGaAs graded layer 4 described below is grown by crystal growth.

[0061] On the i-type InAlGaAs graded layer 4, an i-type InGaAs light absorption layer 5 having a thickness of 50 nm or more and 3 μm or less, an i-type InAlGaAs / InAlAs graded layer 6, a p-type InP window layer 7 having a thickness of 0.1 μm or more and 3 μm or less, and a p-type InGaAs contact layer 8 are successively grown by crystal growth.

[0062] After the crystal growth is completed, a p-type electrode 32 is formed on the surface of the p-type InGaAs contact layer 8, and an n-type electrode 31 is formed on the back surface of the n-type InP substrate 1. The p-type electrode 32 of the PD is made of metal materials such as Ti and Au. Note that a voltage is applied to the PD in the reverse direction, and the operating voltage is 0V to 10V.

[0063] 1, incident light 90 is incident perpendicularly to the i-type InGaAs light absorption layer 5. The diameter of the light receiving part of the PD is in the range of 5 μm to 1 mm when the light receiving part is circular, or the size of the long side of the light receiving part of the PD is in the range of 5 μm to 1 mm when the light receiving part is rectangular. An anti-reflective coating (not shown) is applied to the incident surface of the PD.

[0064] In the case of the edge-illuminated PD shown in Fig. 2, incident light 90 is incident from a direction parallel to the i-type InGaAs light absorption layer 5. From the viewpoint of reliability, the edge surface is covered with an insulating film, an organic film, or a semiconductor layer. In the edge-illuminated PD shown in Fig. 2, an Fe-doped semi-insulating InP burying layer 20 is formed on the edge surface. The layer thickness of the Fe-doped semi-insulating InP burying layer 20 is within a range of 100 nm to 5 µm in the incident direction.

[0065] <Function of the semiconductor photodetector (PD) according to the first embodiment> The effect on the semiconductor photodetector (PD) according to the first embodiment will be described. The thickness of the electron transit layer used in PDs capable of high-speed operation of 25 Gbps or more is often about 200 nm. If the thickness of the light absorption layer is 500 nm, the introduction of the electron transit layer can reduce the pn junction capacitance to 5 / 7 (=500 nm / (500 nm+200 nm)).

[0066] On the other hand, by introducing an electron transit layer into the PD, the electron transit distance increases, expanding by a factor of 7 / 5. As shown in equation (1), the bandwidth of the PD is affected by both the bandwidth due to the capacitance (frc) and the bandwidth due to the carrier transit time (ftr), so some of the bandwidth improvement effect due to the reduction in the pn junction capacitance is offset.

[0067] However, by applying an i-type InAlAs digital alloy structure electron transit layer 3 with a long dead space length, the speed of electrons in the electron transit layer increases, shortening the transit time and improving the bandwidth limitation ftr. As a result, an effect is achieved in which the bandwidth of the PD is further improved. In the following explanations of devices, systems, etc., a PD having an InAlAs digital alloy structure electron transit layer according to the present disclosure is referred to as a DA-PD according to the present disclosure.

[0068] <Advantages of the First Embodiment> As described above, the semiconductor light receiving element according to the first embodiment has an i-type InAlAs digital alloy structure electron transit layer, which provides an effect of providing a semiconductor light receiving element that operates over a wide band.

[0069] Embodiment 2 <Features of the semiconductor photodetector (APD) according to the second embodiment> Before describing the specific structure of the semiconductor light receiving element according to the second embodiment, first, a digital alloy structure multiplication layer, which is a structural feature of the semiconductor light receiving element according to the second embodiment, will be described below.

[0070] If a wideband APD of 37.5 GHz or more can be realized, the next generation high-speed PON system can be realized without using a DSP or SOA. In the case of a PD, which is relatively easy to make wideband, the response bandwidth is as follows: (1) RC time constant (R is the element resistance, C is the element capacitance) (2) Carrier transit time (the time it takes for an electron or hole to travel through the depletion layer) In addition, the APD is limited by (3) It is also limited by the multiplication time (the time it takes for electrons and holes to multiply in a chain reaction in the multiplication layer, which increases in proportion to the multiplication factor).

[0071] With a PD, the above-mentioned 37.5 GHz band can be achieved, but with an APD, the multiplication time is required, so if the multiplication factor is increased, it becomes difficult to achieve the desired band. The multiplication time TM is expressed by the following equations (6) to (8). Multiplication time TM=multiplication rate M / GB product (6) GB product=1 / (2πNkτav) (7) In other words, Multiplication time TM=2πNkMτav (8) It becomes.

[0072] Here, GB product is the product of multiplication factor and bandwidth, k is the ionization rate ratio, N is a coefficient that is loosely dependent on the ionization rate ratio k, and τav is the average time that electrons and holes travel in the multiplication layer. Therefore, it is possible to shorten the multiplication time TM by reducing the ionization rate ratio k. In particular, to realize a high-speed PON system, it is necessary to make the multiplication time TM approach zero, that is, to make the ionization rate ratio k approach zero.

[0073] In order to make the ionization rate ratio k zero, various compound semiconductors have been proposed as materials for the multiplication layer. In addition, in order to reduce the ionization rate ratio k, a digital alloy structure has been proposed in which semiconductor layers with different compositions are alternately stacked in a cycle of 1 to 6 atomic layers. However, it is difficult to make the ionization rate ratio k zero in the digital alloy structure unless the structure is optimized. The digital alloy structure is described in Non-Patent Document 2.

[0074] Therefore, in order to reduce the ionization rate ratio k of the digital alloy structure, the inventors fabricated an APD with a digital alloy structure multiplication layer using a multiplication layer in which two-atom-layered InAs layers and two-atom-layered AlAs layers are alternately stacked, and as a result of analyzing the multiplication characteristics, they discovered that the distance that carriers travel in the multiplication layer until they are ionized is longer than that of an APD with an InAlAs multiplication layer made of normal bulk crystal, that is, an InAlAs random alloy structure multiplication layer. The distance that carriers travel in the multiplication layer until they are ionized is called the dead space.

[0075] Since the length of the dead space (hereinafter referred to as the dead space length) is longer for holes than for electrons, in the case of an InAlAs random alloy structure made of a normal bulk crystal, when the thickness of the multiplication layer is thinned to a level of several tens of nm, the ionization rate ratio k decreases because the holes cannot be ionized. However, when the thickness of the multiplication layer is thinned to a level of several tens of nm, a new problem occurs in that a leakage current such as a tunnel current increases because a higher electric field needs to be applied to the multiplication layer in order to obtain a desired multiplication factor. In other words, an increase in the tunnel current increases the noise generated in the APD. On the other hand, the inventors' analysis discovered that the ionization rate ratio k=0 in the digital alloy structure even when the multiplication layer has a thickness of 100 nm or more because the dead space is unusually large in the digital alloy structure compared to the random alloy structure.

[0076] That is, the inventors have found for the first time that it is possible to make the ionization rate ratio k=0 while suppressing the tunnel current by forming the multiplication layer of the APD with a digital alloy structure. Specifically, it has been found that in the multiplication layer having the digital alloy structure of the present disclosure, the ionization rate ratio k drops sharply at a layer thickness of 170 nm or less, and in particular, the dead space effect improves dramatically when the layer thickness of the multiplication layer is in the range of 60 to 130 nm. That is, the inventors have demonstrated that the ionization rate ratio k=0, which was impossible to achieve with a multiplication layer having a random alloy structure or a multiplication layer having a thick digital alloy structure, can be achieved by applying the multiplication layer having the digital alloy structure of the present disclosure. At present, no research institute has reported that the thinning of the multiplication layer of an APD having a digital alloy structure has a higher effect of reducing the ionization rate ratio k than the thinning of the multiplication layer of an APD made of a conventional material.

[0077] <Element structure of semiconductor photodetector (APD) according to the second embodiment> Fig. 4 is a cross-sectional view showing the device structure of a front-illuminated APD, which is an example of the semiconductor light receiving element 110 according to the embodiment 2. Fig. 5 is a cross-sectional view showing the device structure of an edge-illuminated APD, which is an example of the semiconductor light receiving element 110a according to the embodiment 2.

[0078] The semiconductor light receiving element 110 according to the second embodiment includes an n-type InP substrate 1 and a semiconductor layer having a carrier concentration of 1 to 5×10 18 cm -3 and an n-type InAlAs buffer layer 2a having a thickness of 0.1 to 1.0 μm and a carrier concentration of 1×10 17 cm -3 The InAlAs electron transport layer 3 has a digital alloy structure in which an i-type AlAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) and an i-type InAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) are alternately laminated multiple times, and the carrier concentration is 1×10 16 ~5×10 18 cm -3and an n-type InAlAs electric field relaxation layer 12 having a layer thickness of 10 to 70 nm and a carrier concentration of 1×10 17 cm -3 and an i-type InAlAs multiplication layer 13 having a thickness of 50 to 500 nm and a carrier concentration of 1×10 16 ~5×10 18 cm -3 and a p-type InP electric field relaxation layer 14 having a layer thickness of 10 to 70 nm and a carrier concentration of 1×10 17 cm -3 and an i-type InGaAs light absorbing layer 5 having a thickness of 50 nm to 3.0 μm or less, and a carrier concentration of 5×10 17 cm -3 and an i-type InAlGaAs / InAlAs graded layer 6 having a thickness of 5 to 50 nm and a carrier concentration of 5×10 17 cm -3 The structure comprises a p-type InP window layer 7 having a thickness of 0.1 to 3.0 μm, a p-type InGaAs contact layer 8, an n-type electrode 31 formed on the back surface side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8.

[0079] A p-type InAlAs window layer may be used instead of the p-type InP window layer 7. The n-type InAlAs buffer layer 2a is also called an n-type semiconductor layer.

[0080] The semiconductor light receiving element 110a according to the second embodiment shown in FIG. 5 has a layer structure similar to that of the semiconductor light receiving element 110, but further includes an Fe-doped semi-insulating InP buried layer 20 formed at least on the end surface onto which the incident light 90 is incident.

[0081] Silicon (Si) is optimal as an n-type dopant for the n-type InAlAs buffer layer 2a. The n-type InAlAs buffer layer 2a may have either a random alloy structure or a digital alloy structure.

[0082] As described above, the i-type InAlAs digital alloy structure electron transit layer 3 is composed of semiconductor layers in which AlAs layers (layer thickness: 2 atomic layers, approximately 0.6 nm) and InAs layers (layer thickness: 2 atomic layers, approximately 0.6 nm) are alternately laminated in this order. However, it is sufficient that the thicknesses of the AlAs layers and InAs layers are each in the range of 2 atomic layers to 6 atomic layers. The reason for using 6 atomic layers or less is that it is desirable for the laminated structure of the AlAs layers and InAs layers not to function as a quantum well structure.

[0083] Furthermore, the number of atomic layers of each layer of the i-type InAlAs digital alloy structure electron transit layer 3 is preferably 2 to 4 atomic layers, with 2 atomic layers being optimal. This is because the thinner the atomic layer thickness of each layer, the greater the effect of reducing the ionization rate ratio k due to the digital alloy structure. Furthermore, when considering not only the performance as a semiconductor light receiving element but also productivity, a layer thickness of 4 to 6 atomic layers is also optimal, as this reduces the number of shutter switching times during crystal growth by MBE. In view of the above factors, it can be said that the number of atomic layers of each layer of the i-type InAlAs digital alloy structure electron transit layer 3 is preferably in the range of 2 to 6 atomic layer periods.

[0084] The thickness of the i-type InAlAs digital alloy structure electron transit layer 3 is within a range of 50 nm to 1000 nm. For example, if the thickness of the i-type InAlAs digital alloy structure electron transit layer 3 is 500 nm, the number of repetitions of the AlAs layer (two atomic layers) / InAs layer (two atomic layers) is 417. As shown in FIG. 8, the dead space effect is significantly manifested at a layer thickness of 200 nm or less, so the layer thickness of the i-type InAlAs digital alloy structure electron transit layer 3 is most preferably within a range of 50 nm to 200 nm. Furthermore, if the layer thickness is 400 nm or less, the electron transit speed is high at a distance of 200 nm, which is 50% or more of the layer thickness, so a large dead space effect can be obtained even within a range of 50 nm to 400 nm.

[0085] Considering the affinity with the InAlAs constituting the n-type InAlAs buffer layer 2a, it is preferable to make the layer thickness of only the first AlAs layer of the i-type InAlAs digital alloy structure electron transit layer 3 three atomic layers or more thick. Alternatively, the i-type InAlAs digital alloy structure electron transit layer 3 may be laminated by alternately forming InAs layers and AlAs layers in that order.

[0086] The conductivity type of the i-type InAlAs digital alloy structure electron transport layer 3 is i-type, and the carrier concentration is 1×10 17 cm -3 However, the conductivity type of the i-type InAlAs digital alloy structure electron transport layer 3 is not the same as that of the i-type InAlAs digital alloy structure electron transport layer 3, and the carrier concentration is not 5×10 17 cm -3 It may be p-type or n-type as follows:

[0087] In addition to the electron transit layer having an InAlAs digital alloy structure, an InAlGaAs digital alloy structure in which InAlyGa(1-y)As (layer thickness of 2 to 6 atomic layers, Al composition ratio Y) and InAlzGa(1-z)As (layer thickness of 2 to 6 atomic layers, Al composition ratio Z) are alternately stacked can also be used as the electron transit layer of the present disclosure. Furthermore, a digital alloy structure made of InAlAsSb, which is a material system containing antimony (Sb), can also be used as the electron transit layer of the present disclosure.

[0088] The n-type electric field buffer layer does not necessarily have to be InAlAs, and may be an n-type InP or n-type InAlAs digital alloy structure. The n-type InAlAs electric field buffer layer 12 is provided to prevent an excessive electric field from being applied to the i-type InAlAs multiplication layer 13, causing multiplication. In addition, when too much electric field is applied to the i-type InAlAs multiplication layer 13, the speed of electrons starts to decrease, that is, an overshoot phenomenon of the traveling speed occurs. Therefore, the n-type InAlAs electric field buffer layer 12 has a function of adjusting the electric field so that the traveling speed is maximized.

[0089] The i-type InAlGaAs / InAlAs graded layer 6 is a layer in which the band gap is gradually changed by changing the composition of InAlGaAs, and each layer thickness is within the range of 5 to 50 nm. The composition of InAlGaAs may be changed stepwise, and the band gap is intermediate between that of an InP layer and an InGaAs layer. The carrier concentration is 5×10 17 cm -3 or less, and may be p-type or n-type as long as the carrier concentration is low. Note that the i-type InAlGaAs / InAlAs graded layer 6 is not necessarily required and may be omitted.

[0090] A layer having an intermediate band gap, such as InAlGaAs or InGaAsP, with a thickness of 0.1 μm or less may be provided between the p-type InP electric field buffer layer 14 and the i-type InGaAs light absorption layer 5. This is because it is possible to prevent accumulation of electrons and holes at the heterojunction interface.

[0091] In an example of the element structure of a semiconductor photodetector 110 shown in FIG. 4, an i-type InAlGaAs / InAlAs graded layer 6 is formed by alternately stacking two types of i-type InAlGaAs layers having different compositions multiple times on an i-type InGaAs light absorption layer 5.

[0092] Ti and Au are used for the p-type electrode 32 of the APD, which is an example of the semiconductor light receiving element according to the second embodiment. A voltage is applied in the reverse direction to the APD, and the operating voltage is 10V to 100V. The electric field of the i-type InAlAs multiplication layer 13 when the APD is operating is 500kV / cm to 900kV / cm. The electric field of the i-type InGaAs light absorption layer 5 is set to 300kV / cm or less. The multiplication factor is used at 3 to 30, but is 100 or more when operating in Geiger mode.

[0093] <Function of Semiconductor Photodetector (APD) According to Second Embodiment> The action on the semiconductor photodetector (APD) according to the second embodiment will be described. The APD according to the second embodiment, like the PD according to the first embodiment, employs an i-type InAlAs digital alloy structure electron transit layer 3 with a long dead space length, thereby increasing the speed of electrons in the electron transit layer, shortening the transit time, and improving the bandwidth limitation ftr, thereby achieving an effect of further improving the bandwidth of the APD.

[0094] <Advantages of the second embodiment> As described above, the semiconductor light receiving element according to the second embodiment has an i-type InAlAs digital alloy structure electron transit layer, which provides an effect of providing a semiconductor light receiving element having high reception sensitivity and operating over a wide band.

[0095] A variation of the second embodiment. A front-illuminated APD, which is one example of a semiconductor light-receiving element according to a modification of the second embodiment, and an edge-illuminated APD, which is another example, will be described below. The semiconductor photodetector according to the modified example of the second embodiment is structurally different in that the i-type InAlAs multiplication layer 13 of the semiconductor photodetector according to the second embodiment, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0096] One example of the structure of an i-type InAlAs digital alloy structure multiplication layer is a digital alloy structure in which i-type AlAs layers (for example, a layer thickness of two atomic layers, approximately 0.6 nm) and i-type InAs layers (for example, a layer thickness of two atomic layers, approximately 0.6 nm) are alternately stacked multiple times.

[0097] The thickness of the i-type InAlAs digital alloy structure multiplication layer is within a range of 40 nm to 1000 nm. However, in order to increase the dead space effect in the i-type InAlAs digital alloy structure multiplication layer, the thickness of the i-type InAlAs digital alloy structure multiplication layer may be within a range of 40 nm to 170 nm. Furthermore, considering a typical degree of variation of 20% in the layer thickness during the fabrication of the semiconductor light receiving element 100, the thickness of the i-type InAlAs digital alloy structure multiplication layer is more preferably within a range of 50 nm to 140 nm.

[0098] <Function of Semiconductor Photodetector (APD) According to Modification of Second Embodiment> The operation of the APD, which is an example of a semiconductor light receiving element according to a modification of the second embodiment, will be described below. The inventors have found that the use of a digital alloy structure multiplication layer, as in the APD according to the modified example of the second embodiment, enhances the dead space effect, that is, the effect of reducing the ionization rate ratio k. Fig. 6 is a diagram showing the electric field dependence of the electron dead space in an InAlAs multiplication layer. As a result of analyzing the electron multiplication characteristics in the digital alloy structure multiplication layer, the inventors have revealed that, as shown in the graph of Fig. 6, the InAlAs digital alloy structure multiplication layer of the present disclosure has a longer dead space than the conventional InAlAs random alloy structure multiplication layer.

[0099] 7A to 7C are graphs showing the ionization rates of electrons and holes, respectively, where FIG. 7A shows the case of electron ionization, FIG. 7B shows the case of hole ionization, and FIG. 7C shows the ionization rate when the multiplication layer is thinned. In a conventional InAlAs random alloy structure multiplication layer, as shown in the graph of FIG. 6, the dead space length is about 45 nm, so the thickness of the multiplication layer needs to be thinned to about 1.5 times the dead space (about 70 nm). However, when the multiplication layer is thinned to 70 nm, the electric field in the multiplication layer becomes high, and the noise increases with a sudden increase in the tunnel current, making it difficult to obtain an APD with good reception sensitivity.

[0100] On the other hand, in the InAlAs digital alloy multiplication layer of the APD according to the modification of the second embodiment, as shown in the graph of FIG. 6, the reciprocal of the applied electric field is 1.47×10 -6 In the case of a dc current density of 1.0 V, the ionization rate ratio k can be made close to zero even if the thickness of the multiplication layer is about 1.5 times (about 130 nm) the thickness of the dead space, because the dead space length is about 85 nm, and therefore the effect of the tunnel current is small in the APD according to the modification of the second embodiment.

[0101] In addition, in the InAlAs digital alloy structure multiplication layer, the dead space is highly dependent on the applied electric field, with the reciprocal of the applied electric field being 1.27 × 10 -6 In the case of cm / V, the dead space length is about 50 nm, so the multiplication layer needs to be thinned to 75 nm, as shown in the graph in Figure 6. In other words, the thickness of the InAlAs digital alloy structure multiplication layer can be made thicker than that of the InAlAs random alloy structure multiplication layer.

[0102] Fig. 8 is a diagram showing the dependence of the ionization rate ratio and the tunnel current on the thickness of the multiplication layer. The inventors fabricated APDs having an InAlAs digital alloy structure multiplication layer and an InAlAs random alloy structure multiplication layer, respectively, measured the ionization rate ratio k, and further plotted the results in Fig. 8 together with the measurement results of References 1 and 2 described in Fig. 8. References 1 and 2 in Fig. 8 are as follows: (1)Reference 1 Yuan Yuan,et al “Temperature dependence of the ionization coefficients of InAlAs and AlGaAs digital alloys”pp.794,Vol.6,No.8 / August 2018 / Photonics Research (2) Literature 2 Wenyang Wang,et al “Characteristics of thin InAlAs digital alloy avalanche photodiodes” pp.3841,Vol.46,No.16 / 15 August 2021 / Optics Letters

[0103] As shown in Fig. 8, in the InAlAs random alloy multiplication layer, the effect of reducing the ionization rate ratio k by the dead space cannot be realized unless the thickness of the multiplication layer is 80 nm or less. On the other hand, if the thickness of the multiplication layer is made thinner than 80 nm, the tunnel current increases rapidly and tunnel breakdown occurs. When the multiplication layer is about 60 nm thick, the reduction of the ionization rate ratio k and the limitation of the tunnel current are barely compatible, but the margin of the layer thickness is only a few nm, making it extremely difficult to stably manufacture APDs. In addition, the ionization rate ratio k is large at 0.12. In other words, with the conventional InAlAs random alloy multiplication layer, it is difficult to apply the effect of reducing the ionization rate ratio k by making the layer thinner to APDs.

[0104] On the other hand, in the InAlAs digital alloy structure multiplication layer of the present disclosure, as discovered by the inventors, the dead space is large, and therefore, as the multiplication layer is thinned, the ionization rate ratio k starts to decrease to 0.1 or less at a layer thickness of 170 nm, as shown in Fig. 8. Here, the ionization rate ratio k is determined from the measured value of the multiplication noise, and is the minimum value of the ionization rate ratio in the range of multiplication factors 1 to 10. For the same ionization rate ratio k, the thickness of the InAlAs digital alloy structure multiplication layer is more than twice as large as that of the InAlAs random alloy structure multiplication layer.

[0105] As shown in the graph of FIG. 8, if the lower limit of the thickness of the multiplication layer for which the tunnel current is 1 μA in an APD with a pn junction diameter of 20 μm is 40 nm, the optimum thickness range for an InAlAs digital alloy structure multiplication layer is from 40 nm to 170 nm, and the thickness within this range can be fabricated with sufficient reproducibility.

[0106] The thickness of the InAlAs digital alloy multiplication layer, which can sufficiently reduce the ionization rate ratio k due to the dead space effect, is the reciprocal of the applied electric field of 1.47×10 -6 In the case of InAlAs digital alloy structure multiplication layer, the thickness is approximately twice the length of the dead space, and considering that the length of the dead space is 85 nm as shown in FIG. 8, 170 nm, which is twice the length of the dead space, is a suitable upper limit for the thickness of the InAlAs digital alloy structure multiplication layer.

[0107] Moreover, in order to control the ionization rate ratio k to 0.05 or less in the InAlAs digital alloy structure multiplication layer, the thickness of the multiplication layer is preferably 150 nm or less, as shown in the graph of Fig. 6. Furthermore, in order to achieve a tunnel current of 1 µA or less and an ionization rate ratio k of approximately zero, the optimum thickness of the multiplication layer is in the range of 60 nm to 130 nm. If the margin during the fabrication of the APD is 10 nm, the thickness of the multiplication layer is preferably set in the range of 70 nm to 120 nm.

[0108] Also, as shown in FIG. 6, the length of the dead space is preferably 50 nm to 90 nm. The ratio of the length of the dead space to the thickness of the multiplication layer is preferably 29% or more, which is the minimum dead space length of 50 nm divided by the maximum multiplication layer thickness of 170 nm. As the ratio increases, the ionization rate ratio k becomes smaller, but it cannot exceed 100%. This is because multiplication does not occur when the ionization rate ratio k exceeds 100%. Therefore, in principle, the ratio of the length of the dead space to the thickness of the multiplication layer is preferably 29% or more and less than 100%. Furthermore, since the thickness of the multiplication layer in this prototype was 120 nm, the optimum range confirmed experimentally is 42% (= 50 nm / 120 nm) to 75% (= 90 nm / 120 nm).

[0109] The inventors have considered the reason why the ionization rate ratio k=0 can be achieved in the InAlAs digital alloy structure multiplication layer of the present disclosure, whereas the ionization rate ratio k=0 could not be achieved in the conventional InAlAs random alloy structure multiplication layer.

[0110] If the electron dead space length is De and the hole dead space length is Dh, the conditions for achieving the ionization rate ratio k = 0 are expressed by the following formulas (9) and (10). Note that formula (9) represents the condition for the difference in the dead space lengths, and formula (10) represents the condition for the tunnel current. Dhe=Dh―De>0 (9) Dh>Tmin (10)

[0111] Here, Dhe is the difference between the dead space lengths of holes and electrons. Tmin is the minimum thickness of the multiplication layer at which the tunnel current becomes small enough that it does not affect noise, and the thicker the multiplication layer, the smaller the tunnel current becomes. The condition for the difference in the dead space length is set as shown in the above formula (9) because, as shown in Figure 7C, when the thickness of the multiplication layer is equal to or smaller than the dead space length of holes, holes are no longer multiplied and the ionization rate ratio k = 0.

[0112] 6 and 8, in the case of the InAlAs random alloy structure multiplication layer, the value at which the ionization rate ratio k starts to decrease as the multiplication layer is made thinner is about 40 nm De and about 80 nm Dh. Since the pn junction diameter is 20 μm and the tunnel current is 100 nA or less, the minimum layer thickness Tmin=90 nm, and therefore the InAlAs random alloy structure does not satisfy the tunnel current condition, it is impossible to achieve the ionization rate ratio k=0.

[0113] On the other hand, in the case of an InAlAs digital alloy structure multiplication layer, the values ​​at which the ionization rate ratio k starts to decrease as the multiplication layer is made thinner are De about 80 nm and Dh about 170 nm, and when the pn junction diameter is 20 μm in diameter and the tunnel current is 100 nA or less, the minimum layer thickness Tmin = 90 nm, so there exists a multiplication layer thickness that satisfies the condition of the ionization rate ratio k = 0. Note that the minimum layer thickness Tmin is the same for the InAlAs digital alloy structure multiplication layer and the InAlAs random alloy structure multiplication layer because the band gaps of the two are the same.

[0114] Specifically, in the case of a random alloy structure, De is about 40 nm and Dh is about 80 nm, whereas in the case of a digital alloy structure, the inventors found that De is about 80 nm and Dh is about 170 nm.

[0115] In the InAlAs digital alloy structure multiplication layer, the difference in lattice constant between the InAs (lattice constant = 0.606 nm) and AlAs (lattice constant = 0.566 nm) that make up the superlattice is very large at 6.55%, which means that the dopants in the field relaxation layer, that is, the impurities, may diffuse into the InAlAs digital alloy structure multiplication layer during the fabrication process, causing disorder within the multiplication layer.

[0116] 9A to 9D are diagrams showing the ionization rates in the multiplication layer and the electric field relaxation layer, where Fig. 9A shows the ionization rate in the case of the InAlAs random alloy structure multiplication layer, Fig. 9B shows the ionization rate in the case of the InAlAs digital alloy structure multiplication layer, Fig. 9C shows the ionization rate in the case of the partially disordered InAlAs digital alloy structure multiplication layer, and Fig. 9D shows the ionization rate in the case of a combination of a thick electric field relaxation layer and an InAlAs digital alloy structure multiplication layer. Compared with the InAlAs random alloy structure multiplication layer shown in Fig. 9A, the dead space length of the InAlAs digital alloy structure multiplication layer shown in Fig. 9B is long, but the dead space length of the partially disordered InAlAs digital alloy structure multiplication layer due to dopant diffusion from the electric field relaxation layer is short as shown in Fig. 9C.

[0117] In order to avoid the influence of disorder in the InAlAs digital alloy multiplication layer, the selection of the material and dopant of the electric field relaxation layer and the doping concentration are important. The impurity diffusion equation is expressed by the following equation (11). dN / dt=D(d 2 N / d 2 x)-F (11)

[0118] In formula (11), N is the impurity concentration, t is time, D is the diffusion constant, x is the position, and F is the external force acting on the diffusion. Examples of materials for the electric field buffer layer include InP, an InAlAs random alloy structure, and an InAlAs digital alloy structure. Examples of p-type dopants for the electric field buffer layer include Be and Zn. Considering the p-type dopant, a combination of a Be-doped p-type InP electric field buffer layer and an InAlAs digital alloy structure multiplication layer is preferable. This is because Be has a small diffusion constant D and also forms a potential barrier between the InAlAs digital alloy structure multiplication layer. The potential barrier corresponds to F in formula (11).

[0119] In order to prevent the variation in the amount of electric field relaxation, that is, the product of the layer thickness and the carrier concentration, from increasing when the thickness of the electric field relaxation layer varies, the carrier concentration of the electric field relaxation layer is set to 2×10 18 cm -3 The following is preferable. When InAlAs is used as the material for the electric field relaxation layer, Zn doping is optimal, and the carrier concentration is 2×10 18 cm -3 The following is optimal. Note that 2×10 18 cm -3 When the impurity concentration is higher than 5×10, the inactive impurities increase and diffusion becomes more likely. 18 cm -3 The following is required:

[0120] The electric field relaxation amount ΔE is expressed by the following formula (12). ΔE=W q N / ε (12) When the electric field relaxation amount ΔE is constant, if the carrier concentration of the electric field relaxation layer is increased, the thickness of the electric field relaxation layer must be reduced in inverse proportion to the carrier concentration. Here, W is the thickness of the electric field relaxation layer, q is the elementary charge, N is the carrier concentration of the electric field relaxation layer, and ε is the dielectric constant.

[0121] The carrier concentration N of the electric field relaxation layer is 5×10 18 cm -3In order to prevent the dead space length from being shortened due to impurity diffusion into the multiplication layer, the carrier concentration of the field relaxation layer is set to 5×10 18 cm -3 The electric field relaxation layer must have a thickness of 10 nm or more.

[0122] On the other hand, as shown in Figure 9D, when the electric field buffer layer becomes thicker than 1.5 times the dead space length of the electric field buffer layer, multiplication occurs in the electric field buffer layer. As shown in Figure 6, in the random alloy structure, the dead space length is 45 nm or less, so the layer thickness of the random alloy structure electric field buffer layer needs to be 70 nm or less. On the other hand, in the InAlAs digital alloy structure, the dead space length is 85 nm or less, so the layer thickness of the digital alloy electric field buffer layer needs to be 130 nm or less.

[0123] The lengths of the dead spaces shown in FIGS. 9A to 9D have the following relationship: dead space (FIG. 9A)<dead space (FIG. 9D)<dead space (FIG. 9C)<dead space (FIG. 9B).

[0124] <Effects of the semiconductor photodetector (APD) according to the modification of the second embodiment> First, a first effect of the semiconductor light receiving element according to the modification of the second embodiment will be quantitatively described below. The 3 dB bandwidth fc of a conventional APD is expressed by the above equation (2), where the bandwidth limit due to the RC time constant is frc, the bandwidth limited by the carrier transit time is ftr, and the bandwidth limit due to the multiplication time is fm.

[0125] On the other hand, the 3 dB bandwidth fc of the APD having the InAlAs digital alloy structure multiplication layer according to the first embodiment is limited only by the RC time constant and the carrier transit time according to equations (6), (7), and (8) because the ionization rate ratio k is close to zero, and therefore can be expressed by the following equation (13). fc_APD=1 / ((1 / frc) 2 +(1 / ftr) 2 )0.5 (13) In equation (13), the transit time ftr of a carrier includes the transit time through the light absorption layer plus the transit time through the multiplication layer.

[0126] Since the RC time constant is inversely proportional to the sum of the thicknesses of the light absorption layer and the multiplication layer, while the transit time is directly proportional, equation (13) has a maximum value. In other words, the maximum bandwidth occurs when frc=ftr. By substituting frc=ftr, equation (13) can be expressed as equation (3) above. Moreover, the 3 dB bandwidth ftr determined by the running time is expressed by the above-mentioned formula (4).

[0127] In equation (4), Vav is the average saturation transit velocity of electrons and holes, and Wt is the total thickness of the light absorption layer and the multiplication layer. For example, in the case of InGaAs, Vav is 5.35×10 6 In addition, if the thickness of the multiplication layer is 100 nm and the thickness of the light absorption layer is 400 nm, then Wt = 500 nm.

[0128] Vav=5.35×10 6 Substituting cm / s and Wt=500 nm into formula (4) gives ftr=59.6 GHz. Substituting this into formula (3) gives the 3 dB bandwidth of the APD having the InAlAs digital alloy structure multiplication layer according to the modification of the second embodiment, which is 42.2 GHz. Therefore, it is clear from the above considerations that the APD having the InAlAs digital alloy structure multiplication layer according to the modification of the second embodiment can meet the bandwidth of 37.5 GHz required for a 50G-PON system. In the following description of devices, systems, etc., an APD having an InAlAs digital alloy structure electron transit layer and an InAlAs digital alloy structure multiplication layer according to the present disclosure is referred to as the DA-APD of the present disclosure.

[0129] <Effects of the Modification of the Second Embodiment> As described above, the semiconductor photodetector according to the modified example of the second embodiment further includes a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, and thus has the effect of providing a semiconductor photodetector that operates over a wide bandwidth and has excellent low noise characteristics.

[0130] Embodiment 3 Fig. 10 is a cross-sectional view showing the element structure of a front-illuminated PD which is an example of the semiconductor light receiving element 120 according to the embodiment 3. Fig. 11 is a cross-sectional view showing the element structure of a front-illuminated PD which is an example of the semiconductor light receiving element 120a according to the embodiment 3.

[0131] <Element structure of semiconductor photodetector (PD) according to the third embodiment> The semiconductor light receiving element 120 according to the third embodiment shown in FIG. 10 includes an n-type InP substrate 1 and a semiconductor layer having a carrier concentration of 1 to 5×10 18 cm -3 and an n-type InP buffer layer 2 having a thickness of 0.1 to 1.0 μm and a carrier concentration of 1×10 17 cm -3 The i-type InAlAs digital alloy structure electron transit layer 3 has a digital alloy structure in which an i-type AlAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) and an i-type InAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) are alternately laminated multiple times, and the carrier concentration is 5×10 17 cm -3 and an i-type InAlGaAs graded layer 4 having a thickness of 5 to 50 nm and a carrier concentration of 1×10 17 cm -3 and an i-type InGaAs light absorbing layer 5 having a thickness of 50 nm to 3.0 μm or less, and a carrier concentration of 5×10 17 cm -3 and an i-type InAlGaAs / InAlAs graded layer 6 having a thickness of 5 to 50 nm and a carrier concentration of 5×10 17 cm -3or less and has a layer thickness of 0.1 to 3.0 μm, a p-type diffusion region 15 provided in the n-type InP window layer 11, a p-type InGaAs contact layer 8 provided on the p-type diffusion region 15, an n-type electrode 31 formed on the back surface side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8. The n-type InP buffer layer 2 is also called an n-type semiconductor layer.

[0132] The semiconductor photodetector 120a according to the third embodiment shown in FIG. 11 has the same configuration as the semiconductor photodetector 120 according to the third embodiment, except that an Fe-doped semi-insulating InP substrate 1a is used as the substrate and an n-type electrode 31a is formed on the front side of an n-type InP conductive layer 2b.

[0133] The semiconductor photodetectors 120 and 120a according to the third embodiment differ from the semiconductor photodetectors 100 and 100a according to the first embodiment in that the n-type InP constituting the n-type InP window layer 11 is undoped (i-type) or has a low carrier concentration, and in that a p-type diffusion region 15 is provided in the n-type InP window layer 11. The thickness of the n-type InP window layer 11 of the semiconductor photodetectors 120 and 120a is 0.1 μm or more and 3 μm or less, and the carrier concentration is 5×10 17 cm -3 The n-type InP window layer 11 may be made of InAlAs instead of InP, or may have a laminated structure of InP and InAlAs.

[0134] The p-type diffusion region 15 is formed by partially selectively diffusing a p-type dopant such as Zn in a solid or gas phase. The carrier concentration of the p-type diffusion region 15 is 5×10 17 cm -3 The end of the p-type diffusion region 15 may be located at a depth reaching partway through the n-type InP window layer 11, at a depth reaching the i-type InAlGaAs / InAlAs graded layer 6, or at a depth reaching the i-type InGaAs light absorption layer 5. In the element structures shown in Figs. 10 and 11, the p-type diffusion region 15 has a depth reaching the i-type InGaAs light absorption layer 5. A p-type InGaAs contact layer 8 is provided on the p-type diffusion region 15.

[0135] By performing Zn diffusion halfway through the i-type InGaAs light absorbing layer 5, it is also possible to make a part of the i-type InGaAs light absorbing layer 5 (the p-type electrode side) a p-type layer. The p-type layered part has a uni-traveling carrier (UTC) structure. In the UTC structure, only electrons that can move at high speed are supplied to the depletion layer (i-type InGaAs) among the electron-hole pairs generated by light absorption by the p-type layer (p-type InGaAs) in the i-type InGaAs light absorbing layer 5, enabling high-speed response of the PD. However, if the thickness of the p-type layer in the i-type InGaAs light absorbing layer 5 is increased, the efficiency decreases because the electrons generated in the p-type layer recombine. Note that the p-type InGaAs part in the i-type InGaAs light absorbing layer 5 may be formed during epitaxial crystal growth instead of being made into a p-type layer as described above.

[0136] In a front-illuminated PD, which is an example of a semiconductor light-receiving element 120 shown in Fig. 10, an n-type electrode 31 is provided on the back side. On the other hand, in a front-illuminated PD, which is an example of a semiconductor light-receiving element 120a shown in Fig. 11, an n-type electrode 31a is provided on the front side. That is, in the semiconductor light-receiving element 120a, an n-type InP conductive layer 2b is provided on an Fe-doped semi-insulating InP substrate 1a, and after crystal growth, the semiconductor layers above the n-type InP conductive layer 2b are partially removed, and then the n-type electrode 31a is formed on the n-type InP conductive layer 2b. The semiconductor light-receiving element 120a may use a p-type InP substrate or an n-type InP substrate instead of the Fe-doped semi-insulating InP substrate 1a.

[0137] <Function of Semiconductor Photodetector (PD) According to Third Embodiment> In a mesa structure such as a front-illuminated PD, which is an example of the semiconductor photodetector 100 according to the first embodiment shown in Fig. 1, the side portion of the multiplication layer to which an electric field is applied is exposed to the outside and is therefore susceptible to degradation. In particular, when an InAlAs digital alloy structure is used as the electron transit layer, high strain is applied to each layer constituting the i-type InAlAs digital alloy structure electron transit layer 3, so that dislocation defects and disorder are likely to occur from the exposed portion toward the inside, which may result in the semiconductor photodetector being deteriorated.

[0138] As a result, in the case of an electron transit layer formed by thinning an InAlAs digital alloy structure, such as the semiconductor photodetector 100 or 100a according to the first embodiment, the lifetime of the semiconductor photodetector may be shortened due to dark current generated at the side surface, compared to the conventional InAlAs random alloy structure.

[0139] On the other hand, when a p-type diffusion region 15 is provided as in the semiconductor light-receiving elements 120 and 120a shown in FIGS. 10 and 11 , the portion of the i-type InAlAs digital alloy structure electron transit layer 3 to which an electric field is applied, that is, the portion directly below the p-type diffusion region 15, is not exposed to the outside of the crystal layer, which has the effect of preventing degradation and disorder in the i-type InAlAs digital alloy structure electron transit layer 3 in which each layer is highly strained.

[0140] <Advantages of the Third Embodiment> As described above, according to the semiconductor photodetector of the third embodiment, even though Zn diffusion is performed to form a p-type diffusion region during device structure formation, disordering of the electron transit layer of the InAlAs digital alloy structure can be prevented, and therefore a semiconductor photodetector that is highly reliable and operates over a wide bandwidth can be obtained.

[0141] Embodiment 4 Fig. 12 is a cross-sectional view illustrating the device structure of a front-illuminated APD, which is an example of a semiconductor light receiving element 130 according to embodiment 4. Fig. 13 is a cross-sectional view illustrating the device structure of a front-illuminated APD, which is an example of a semiconductor light receiving element 130a according to embodiment 4.

[0142] <Element structure of semiconductor photodetector (APD) according to the fourth embodiment> The semiconductor light receiving element 130 according to the fourth embodiment includes an n-type InP substrate 1 and a semiconductor layer having a carrier concentration of 1 to 5×10 18 cm -3 and an n-type InAlAs buffer layer 2a having a thickness of 0.1 to 1.0 μm and a carrier concentration of 1×10 17 cm -3 an i-type InAlAs digital alloy structure electron transit layer 3 having a digital alloy structure in which an i-type AlAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) and an i-type InAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) are alternately laminated multiple times, and the carrier concentration is 1×10 16 ~5×10 18 cm -3 and an n-type InAlAs electric field relaxation layer 12 having a layer thickness of 10 to 70 nm and a carrier concentration of 1×10 17 cm -3 and an i-type InAlAs multiplication layer 13 having a thickness of 50 to 500 nm and a carrier concentration of 1×10 16 ~5×10 18 cm -3 and a p-type InP electric field relaxation layer 14 having a layer thickness of 10 to 70 nm and a carrier concentration of 1×10 17 cm -3 and an i-type InGaAs light absorbing layer 5 having a thickness of 50 nm to 3.0 μm or less, and a carrier concentration of 5×10 17 cm -3 and an i-type InAlGaAs / InAlAs graded layer 6 having a thickness of 5 to 50 nm and a carrier concentration of 5×10 17 cm -3 or less and has a layer thickness of 0.1 to 3.0 μm, a p-type diffusion region 15 provided in the n-type InP window layer 11, a p-type InGaAs contact layer 8 provided on the p-type diffusion region 15, an n-type electrode 31 formed on the back surface side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8. The InAlAs buffer layer 2a is also called an n-type semiconductor layer.

[0143] The semiconductor photodetector 130a according to the fourth embodiment shown in FIG. 13 has the same configuration as the semiconductor photodetector 130 according to the fourth embodiment, except that an Fe-doped semi-insulating InP substrate 1a is used as the substrate and an n-type electrode 31a is formed on the front side of an n-type InP conductive layer 2b.

[0144] The semiconductor photodetectors 130 and 130a according to the fourth embodiment differ from the semiconductor photodetectors 110 and 110a according to the second embodiment in that the n-type InP constituting the n-type InP window layer 11 is undoped (i-type) or has a low carrier concentration, and that a p-type diffusion region 15 is provided in the n-type InP window layer 11. The thickness of the n-type InP window layer 11 of the semiconductor photodetectors 120 and 130 is 0.1 μm or more and 3 μm or less, and the carrier concentration is 5×10 17 cm -3 The n-type InP window layer 11 may be made of InAlAs instead of InP, or may have a laminated structure of InP and InAlAs.

[0145] The p-type diffusion region 15 is formed by partially selectively diffusing a p-type dopant such as Zn in a solid or gas phase. The carrier concentration of the p-type diffusion region 15 is 5×10 17 cm -3 The end of the p-type diffusion region 15 may be located at a depth reaching partway through the n-type InP window layer 11, at a depth reaching the i-type InAlGaAs / InAlAs graded layer 6, or at a depth reaching the i-type InGaAs light absorption layer 5. In the element structures shown in Figs. 12 and 13, the p-type diffusion region 15 has a depth reaching the i-type InAlGaAs / InAlAs graded layer 6. A p-type InGaAs contact layer 8 is provided on the p-type diffusion region 15.

[0146] In a front-illuminated APD, which is an example of a semiconductor light-receiving element 130 shown in Fig. 12, an n-type electrode 31 is provided on the back surface side. On the other hand, in a front-illuminated APD, which is an example of a semiconductor light-receiving element 130a shown in Fig. 13, an n-type electrode 31a is provided on the front surface side. That is, in the semiconductor light-receiving element 130a, an n-type InP conductive layer 2b is provided on an Fe-doped semi-insulating InP substrate 1a, and after crystal growth, the semiconductor layers above the n-type InP conductive layer 2b are partially removed, and then the n-type electrode 31a is formed on the n-type InP conductive layer 2b. In the semiconductor light-receiving element 130a, a p-type InP substrate or an n-type InP substrate may be used instead of the Fe-doped semi-insulating InP substrate 1a.

[0147] <Function of Semiconductor Photodetector (APD) According to Fourth Embodiment> In a mesa structure such as a front-illuminated APD, which is an example of the semiconductor photodetector 110 according to the second embodiment shown in Fig. 3, the side portion of the multiplication layer to which an electric field is applied is exposed to the outside and is therefore susceptible to degradation. In particular, when an InAlAs digital alloy structure is used as the electron transit layer, high strain is applied to each layer of the i-type InAlAs digital alloy structure electron transit layer 3, so that dislocation defects and disorder are likely to occur from the exposed portion toward the inside, which may result in the semiconductor photodetector being deteriorated.

[0148] As a result, in the case of an electron transit layer in which an InAlAs digital alloy structure is thinned, as in the semiconductor photodetector 110 or 110a according to the second embodiment, the lifetime of the semiconductor photodetector may be shortened due to dark current generated at the side surface compared to the conventional InAlAs random alloy structure.

[0149] On the other hand, when a p-type diffusion region 15 is provided as in the semiconductor light-receiving elements 130 and 130a shown in FIGS. 12 and 13, the portion of the i-type InAlAs digital alloy structure electron transit layer 3 to which an electric field is applied, that is, the portion directly below the p-type diffusion region 15, is not exposed to the outside of the crystal layer, which has the effect of preventing degradation and disorder in the i-type InAlAs digital alloy structure electron transit layer 3 in which each layer is highly strained.

[0150] <Advantages of the Fourth Embodiment> As described above, according to the semiconductor photodetector of the fourth embodiment, although Zn diffusion is performed to form a p-type diffusion region during device structure formation, disordering of the electron transit layer of the InAlAs digital alloy structure can be prevented, and therefore, an effect is achieved in which a semiconductor photodetector having high reliability, wideband operation, and excellent low noise characteristics can be obtained.

[0151] A variation of the fourth embodiment. A front-illuminated APD, which is an example of a semiconductor light-receiving element according to a modification of the fourth embodiment, will be described below.

[0152] The semiconductor photodetector according to the modified example of the fourth embodiment is structurally different in that the i-type InAlAs multiplication layer 13 in the front-illuminated APD, which is an example of the semiconductor photodetector 130 and 130a according to the fourth embodiment, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0153] The layer structure and thickness of the i-type InAlAs digital alloy structure multiplication layer are similar to those of the i-type InAlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modified example of the second embodiment, and therefore description thereof will be omitted.

[0154] <Function of Semiconductor Photodetector (APD) According to Modification of Fourth Embodiment> In the semiconductor light receiving element according to the modification of the fourth embodiment, even if a high-temperature heat treatment is performed to diffuse Zn in the diffusion process for forming the p-type diffusion region 15, the i-type InAlAs digital alloy structure multiplication layer can be prevented from becoming disordered, so that the dead space length does not become shorter as shown in Fig. 9C, for example, and it becomes possible to maintain a long dead space length as shown in Fig. 9B. As a result, it becomes possible to maintain the ionization rate ratio k at approximately zero, even if Zn diffusion is performed in the manufacturing process.

[0155] <Effects of the Modification of the Fourth Embodiment> As described above, the semiconductor photodetector according to the modified example of the fourth embodiment further includes a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, and thus has the effect of providing a semiconductor photodetector that is highly reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0156] Embodiment 5. FIG. 14 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element 140 according to the fifth embodiment.

[0157] <Element structure of semiconductor photodetector (APD) according to the fifth embodiment> The front-illuminated APD, which is an example of the semiconductor photodetector 140 according to the fifth embodiment, is characterized in that, in addition to the element structure of the front-illuminated APD, which is an example of the semiconductor photodetector 130 according to the fourth embodiment, a separation groove 17 is provided along the outer periphery of the p-type diffusion region 15 formed in the n-type InP window layer 11.

[0158] The depth of the separation groove 17 is preferably within a range of 2 μm to 5 μm. The opening width of the separation groove 17 is preferably within a range of 0.5 μm to 100 μm. The bottom of the separation groove 17 reaches at least the i-type InAlAs digital alloy structure electron transit layer 3. Note that FIG. 14 shows an example in which the bottom of the separation groove 17 reaches halfway through the n-type InAlAs buffer layer 2a. The separation groove 17 may be formed by either dry etching or wet etching. However, it is preferable to add wet etching to remove a damaged layer caused by dry etching after dry etching, which has excellent depth control.

[0159] The inside of the separation groove 17 and the surface of the n-type InP window layer 11 are protected by a surface protective film 18 made of an insulating film made of an oxide film such as SiN or SiO2. The surface protective film 18 also serves as an anti-reflective coating for the light receiving section. The thickness of the surface protective film 18 is preferably within a range of 50 nm to 5000 nm. The surface protective film 18 may also be an organic film such as benzocyclobutene (BCB).

[0160] <Function of Semiconductor Photodetector (APD) According to Fifth Embodiment> When the electron transit layer has an InAlAs digital alloy structure, each layer of the InAlAs digital alloy structure is highly strained, and therefore the InAlAs digital alloy structure is easily disordered when stress is applied from the outside. Thus, as in the semiconductor light receiving element 140 according to the fifth embodiment, by providing a separation groove 17 along the outer periphery of the p-type diffusion region 15, the stress that affects the entire wafer during the manufacturing process can be alleviated. Even in the state of individual semiconductor light receiving elements 140, the stress is alleviated by the presence of the separation groove 17, and therefore the stress concentration in the light receiving part at the center of the semiconductor light receiving element 140 can be alleviated. Furthermore, since the i-type InAlAs digital alloy structure electron transit layer 3 is exposed in the separation groove 17, it is desirable that the surface of the separation groove 17 is covered with the above-mentioned surface protection film 18. Note that a high electric field is not applied to the separation groove 17, and therefore it does not become a starting point of degradation.

[0161] When a p-type diffusion region 15 is provided as in the semiconductor photodetector 140 shown in FIG. 14 , the portion of the i-type InAlAs digital alloy structure electron transit layer 3 to which an electric field is applied, i.e., the portion directly below the p-type diffusion region 15, is not exposed to the outside of the crystal layer, which has the effect of preventing degradation in the i-type InAlAs digital alloy structure electron transit layer 3 in which each layer is highly strained.

[0162] Furthermore, since stress is relieved by the separation groove 17 even during operation of the semiconductor light receiving element 140, no disorder occurs even if the semiconductor light receiving element 140 is used for a long period of time. In other words, the semiconductor light receiving element 140 of the fifth embodiment can achieve high reliability, that is, it can operate in a wide band for a long period of time and maintain low noise.

[0163] <Advantages of the Fifth Embodiment> As described above, according to the semiconductor photodetector of the fifth embodiment, even though Zn diffusion is performed to form the p-type diffusion region 15 during the formation of the device structure, disordering of the InAlAs digital alloy structure running layer can be prevented, and furthermore, the presence of the separation groove can relieve stress, thereby providing an advantageous effect of providing a semiconductor photodetector that is highly reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0164] A variation of the fifth embodiment. A front-illuminated APD, which is an example of a semiconductor light-receiving element according to a modification of the fifth embodiment, will be described below.

[0165] The semiconductor photodetector according to the modified example of the fifth embodiment is structurally different in that the i-type InAlAs multiplication layer 13 in the front-illuminated APD, which is an example of the semiconductor photodetector 140 according to the fifth embodiment, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0166] The layer structure and thickness of the i-type InAlAs digital alloy structure multiplication layer are similar to those of the i-type InAlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modified example of the second embodiment, and therefore description thereof will be omitted.

[0167] <Function of Semiconductor Photodetector (APD) According to Modification of Fifth Embodiment> In the semiconductor light receiving element according to the modification of the fifth embodiment, even if a high-temperature heat treatment is performed to diffuse Zn in the diffusion process for forming the p-type diffusion region 15, the InAlAs digital alloy structure multiplication layer can be prevented from becoming disordered, so that the dead space length does not become shorter as shown in Fig. 9C, for example, and it becomes possible to maintain a long dead space length as shown in Fig. 9B. As a result, it becomes possible to maintain the ionization rate ratio k at approximately zero, despite the Zn diffusion being performed in the manufacturing process.

[0168] <Effects of the Modification of the Fifth Embodiment> As described above, the semiconductor photodetector according to the modification of the fifth embodiment has a digital alloy structure multiplication layer whose thickness is controlled within a preset range, and can prevent disordering of the InAlAs digital alloy electron transit layer and the InAlAs digital alloy structure multiplication layer despite the Zn diffusion for forming a p-type diffusion region during device structure formation. Furthermore, the presence of the separation groove can relieve stress, resulting in an advantageous effect of providing a semiconductor photodetector that is more reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0169] Embodiment 6 FIG. 15 is a cross-sectional view illustrating the element structure of a back-illuminated APD, which is an example of a semiconductor light receiving element 140a according to the sixth embodiment.

[0170] <Element structure of semiconductor photodetector (APD) according to the sixth embodiment> While the front-illuminated APD, which is an example of the semiconductor light-receiving element 140 according to the fifth embodiment, receives light from the front side, the back-illuminated APD, which is an example of the semiconductor light-receiving element 140a according to the sixth embodiment, is characterized in that it has an element structure in which a part of the n-type electrode 31b on the back side is removed to provide an opening 33, and light is incident on the n-type InP substrate 1 through an anti-reflective coating film 35 formed so as to cover the opening 33. That is, the opening 33, which is an incident region of the incident light 90 and is covered with the anti-reflective coating film 35, is provided on the back side of the n-type InP substrate 1 facing the p-type electrode 32. In addition, the center part of the p-type InGaAs contact layer 8 is partially removed, and the surface protective film 18 made of an insulating film made of an oxide film such as SiN or SiO2 is formed on the exposed p-type diffusion region 15, and the surface protective film 18 is further covered with the p-type electrode 32, thereby increasing the reflectance of light from the p-type electrode 32.

[0171] Furthermore, because the area of ​​the p-type diffusion region 15 can be made smaller in a back-illuminated APD such as the semiconductor photodetector 140a than in a front-illuminated APD such as the semiconductor photodetector 140, it is possible to further reduce the stress generated during p-type diffusion, thereby further preventing disordering of the i-type InAlAs digital alloy structure electron transit layer 3. As a result, even though Zn diffusion is performed when the device structure is formed, disordering of the i-type InAlAs digital alloy structure electron transit layer 3 can be prevented, and the stress can be further reduced by the separation grooves 17, resulting in an advantageous effect of providing a semiconductor photodetector that is highly reliable, operates over a wide bandwidth, and has excellent low-noise characteristics.

[0172] <Advantages of the Sixth Embodiment> As described above, the semiconductor light receiving element according to the sixth embodiment has a back-illuminated APD structure, so that the area of ​​the p-type diffusion region can be made smaller than that of a front-illuminated APD, and the separation groove can further reduce stress, resulting in an effect of obtaining a semiconductor light receiving element that is highly reliable, operates in a wide band, and has excellent low noise characteristics. As described above, the reflectance of light from the p-electrode 32 is increased, so that light that is not absorbed by the i-type InGaAs light absorbing layer 5 and passes through is reflected by the p-electrode 32 and returns to the i-type InGaAs light absorbing layer 5, thereby increasing sensitivity. As a result, the i-type InGaAs light absorbing layer 5 can be made thinner, so that the transit time of electrons and holes can be shortened, and by combining with the i-type InAlAs digital alloy structure electron transit layer 3, an effect of obtaining a semiconductor light receiving element that can further widen the band is obtained.

[0173] A variation of the sixth embodiment. A back illuminated APD, which is an example of a semiconductor light receiving element according to a modification of the sixth embodiment, will be described below.

[0174] The semiconductor photodetector according to the modified example of the sixth embodiment is structurally different in that the i-type InAlAs multiplication layer 13 in the back-illuminated APD, which is an example of the semiconductor photodetector 140 according to the sixth embodiment, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0175] The layer structure and thickness of the i-type InAlAs digital alloy structure multiplication layer are similar to those of the i-type InAlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modified example of the second embodiment, and therefore description thereof will be omitted.

[0176] <Function of Semiconductor Photodetector (APD) According to Modification of Sixth Embodiment> In the back-illuminated APD, which is an example of a semiconductor photodetector according to a modification of the sixth embodiment, like the semiconductor photodetector according to the modification of the fifth embodiment, even if a high-temperature heat treatment is performed to diffuse Zn in the diffusion step for forming the p-type diffusion region 15, disordering of the InAlAs digital alloy structure multiplication layer can be prevented. Therefore, for example, the dead space length does not shorten as shown in FIG. 9C, but a long dead space length can be maintained as shown in FIG. 9B.

[0177] <Effects of the Modification of the Sixth Embodiment> As described above, according to the semiconductor photodetector of the modification of the sixth embodiment, the device structure is a back-illuminated APD, so that the area of ​​the p-type diffusion region can be made smaller than that of a front-illuminated APD, and the device has a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range. Even though Zn diffusion is performed to form the p-type diffusion region when the device structure is formed, disordering of the InAlAs digital alloy electron transit layer and the InAlAs digital alloy structure multiplication layer can be prevented, and further stress can be alleviated by the presence of the separation groove, so that a semiconductor photodetector can be obtained which is more reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0178] Embodiment 7 Fig. 16 is a cross-sectional view showing the element structure of a front-illuminated PD which is an example of a semiconductor light receiving element 150 according to the seventh embodiment. Also, Fig. 17 is a cross-sectional view showing the element structure of a front-illuminated PD which is an example of a semiconductor light receiving element 150a according to the seventh embodiment.

[0179] <Element structure of semiconductor photodetector (PD) according to the seventh embodiment> The semiconductor light receiving element 150 according to the seventh embodiment has the same configuration as the semiconductor light receiving element 100 according to the first embodiment from the n-type InP substrate 1 to the i-type InAlGaAs / InAlAs graded layer 6, and therefore a description thereof will be omitted.

[0180] The semiconductor photodetector 150 according to the seventh embodiment shown in FIG. 16 includes a structure ranging from an n-type InP substrate 1 to an i-type InAlGaAs / InAlAs graded layer 6, an n-type InP window layer 11 having a thickness of 0.1 to 3.0 μm, a p-type InAlAs conductive layer 25, a p-type InGaAs contact layer 8, an n-type electrode 31 formed on the back surface side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8.

[0181] The semiconductor photodetector 150a according to the seventh embodiment shown in FIG. 17 has the same configuration as the semiconductor photodetector 150 according to the seventh embodiment, except that an Fe-doped semi-insulating InP substrate 1a is used as the substrate and an n-type electrode 31a is formed on the front side of an n-type InP conductive layer 2b.

[0182] The semiconductor light receiving element 150, 150a according to the seventh embodiment differs from the semiconductor light receiving element 100 according to the first embodiment in that the p-type InAlAs conductive layer 25 formed on the n-type InP window layer 11 is formed in a mesa shape, and the p-type InGaAs contact layer 8 and the p-type electrode 32 are provided on the p-type InAlAs conductive layer 25. The n-type InP window layer 11 may have a thickness of 50 nm or more, but in order not to lengthen the carrier transit time, a thickness of 200 nm or less is preferable. The conductivity type of the n-type InP window layer 11 may be undoped instead of n-type. In the case of n-type, the carrier concentration is 5.0×10 17 cm -3 The following is desirable:

[0183] The method of manufacturing the semiconductor photodetector 150, 150a according to the seventh embodiment is characterized in that the p-type InAlAs conductive layer 25 is crystal-grown on the n-type InP window layer 11 by MOVPE, MBE or the like, and then the p-type InGaAs contact layer 8 is crystal-grown, and thereafter the p-type InAlAs conductive layer 25 is removed while leaving the photodetector portion.

[0184] The thickness of the p-type InAlAs conductive layer 25 is preferably 100 nm or more and 3000 nm or less. The carrier concentration of the p-type InAlAs conductive layer 25 is set to a high carrier concentration, that is, 5.0×10 17 cm -3 The above is desirable. Instead of p-type InAlAs, the p-type InAlAs conductive layer 25 may be a laminated structure of p-type InP, p-type InGaAs, p-type InGaAsP, or p-type InAlGaAs.

[0185] Also, while the semiconductor light receiving element 150 shown in Fig. 16 has an n-type electrode 31 on the back side, the semiconductor light receiving element 150a shown in Fig. 17 has an n-type electrode 31a on the front side. That is, in the semiconductor light receiving element 150a, an n-type InP conductive layer 2b is provided on an Fe-doped semi-insulating InP substrate 1a, and after crystal growth, the layers above the n-type InP conductive layer 2b are partially removed, and then the n-type electrode 31a is formed on the n-type InP conductive layer 2b. Instead of the Fe-doped semi-insulating InP substrate 1a, a p-type InP substrate or an n-type InP substrate may be used.

[0186] <Function of Semiconductor Photodetector (PD) According to Seventh Embodiment> The operation of the semiconductor light receiving elements 150 and 150a according to the seventh embodiment will be described below. When forming the p-type InAlAs conductive layer 25 to which a voltage is applied, the p-type diffusion step involving a heat treatment at a high temperature of 400° C. or more is not performed, as compared with the semiconductor light receiving element 120 according to the third embodiment shown in FIG. 10, and therefore the disordering of the i-type InAlAs digital alloy structure electron transit layer 3 can be prevented. This makes it possible to maintain a high carrier transit speed in the i-type InAlAs digital alloy structure electron transit layer 3. On the other hand, as in the third embodiment, the light absorption layer region directly below the light receiving part to which a high electric field is applied is separated from the side part of the element, so that the semiconductor light receiving element can be highly reliable. This makes it possible to achieve both high sensitivity and high reliability of the semiconductor light receiving element. In other words, a highly reliable semiconductor light receiving element, that is, a PD, can be obtained.

[0187] <Advantages of the Seventh Embodiment> As described above, according to the semiconductor photodetector of the seventh embodiment, as in the semiconductor photodetector of the third embodiment, the electron transit layer is separated from the side portion of the element, and therefore high reliability is obtained, and therefore a semiconductor photodetector that is highly reliable and operates over a wide bandwidth is obtained.

[0188] Embodiment 8 Fig. 18 is a cross-sectional view illustrating the device structure of a front-illuminated APD, which is an example of a semiconductor light receiving element 160 according to embodiment 8. Fig. 19 is a cross-sectional view illustrating the device structure of a front-illuminated APD, which is an example of a semiconductor light receiving element 160a according to embodiment 8.

[0189] <Element structure of semiconductor photodetector (APD) according to embodiment 8> The semiconductor light receiving element 160 according to the eighth embodiment has the same configuration from the n-type InP substrate 1 to the i-type InAlGaAs / InAlAs graded layer 6 as the semiconductor light receiving element 110 according to the second embodiment, and therefore the description thereof will be omitted.

[0190] A semiconductor photodetector 160 according to the eighth embodiment shown in FIG. 18 includes a structure ranging from an n-type InP substrate 1 to an i-type InAlGaAs / InAlAs graded layer 6, an n-type InP window layer 11 having a thickness of 0.1 to 3.0 μm, a p-type InAlAs conductive layer 25, a p-type InGaAs contact layer 8, an n-type electrode 31 formed on the back surface side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8.

[0191] The semiconductor photodetector 160a according to the eighth embodiment shown in FIG. 19 has the same configuration as the semiconductor photodetector 160 according to the eighth embodiment, except that an Fe-doped semi-insulating InP substrate 1a is used as the substrate and an n-type electrode 31a is formed on the front side of an n-type InP conductive layer 2b.

[0192] The semiconductor light receiving element 160, 160a according to the eighth embodiment differs from the semiconductor light receiving element 110 according to the second embodiment in that in the semiconductor light receiving elements 160, 160a, the p-type InAlAs conductive layer 25 formed on the n-type InP window layer 11 is formed in a mesa shape, and the p-type InGaAs contact layer 8 and the p-type electrode 32 are provided on the p-type InAlAs conductive layer 25. The n-type InP window layer 11 may have a layer thickness of 50 nm or more, but in order not to lengthen the carrier transit time, a layer thickness of 200 nm or less is preferable. The conductivity type of the n-type InP window layer 11 may be undoped instead of n-type. In the case of n-type, the carrier concentration is 5.0×10 17 cm -3 The following is desirable:

[0193] The method of manufacturing the semiconductor photodetector 160, 160a according to the eighth embodiment is characterized in that the p-type InAlAs conductive layer 25 is crystal-grown on the n-type InP window layer 11 by MOVPE, MBE or the like, and then the p-type InGaAs contact layer 8 is crystal-grown, and thereafter the p-type InAlAs conductive layer 25 is removed while leaving the photodetector portion.

[0194] The thickness of the p-type InAlAs conductive layer 25 is preferably 100 nm or more and 3000 nm or less. The carrier concentration of the p-type InAlAs conductive layer 25 is set to a high carrier concentration, that is, 5.0×10 17 cm -3 The above is desirable. Instead of p-type InAlAs, the p-type InAlAs conductive layer 25 may be a laminated structure of p-type InP, p-type InGaAs, p-type InGaAsP, or p-type InAlGaAs.

[0195] Also, while the semiconductor light receiving element 160 shown in Fig. 18 has an n-type electrode 31 on the back side, the semiconductor light receiving element 160a shown in Fig. 19 has an n-type electrode 31a on the front side. That is, in the semiconductor light receiving element 160a, an n-type InP conductive layer 2b is provided on an Fe-doped semi-insulating InP substrate 1a, and after crystal growth, the layers above the n-type InP conductive layer 2b are partially removed, and then the n-type electrode 31a is formed on the n-type InP conductive layer 2b. Instead of the Fe-doped semi-insulating InP substrate 1a, a p-type InP substrate or an n-type InP substrate may be used.

[0196] <Function of Semiconductor Photodetector (APD) According to Eighth Embodiment> The operation of the semiconductor light receiving elements 160, 160a according to the eighth embodiment will be described below. When forming the p-type InAlAs conductive layer 25 to which a voltage is applied, a p-type diffusion step involving a heat treatment at a high temperature of 400° C. or more is not performed, as in the semiconductor light receiving element 130 according to the fourth embodiment shown in FIG. 12, and therefore the i-type InAlAs digital alloy structure electron transit layer 3 can be prevented from becoming disordered. This makes it possible to maintain a high transit speed of carriers in the i-type InAlAs digital alloy structure electron transit layer 3. On the other hand, as in the fourth embodiment, the light absorption layer region directly below the light receiving part to which a high electric field is applied is separated from the side part of the element, so that the semiconductor light receiving element can be highly reliable. This makes it possible to achieve both high sensitivity and high reliability of the semiconductor light receiving element. In other words, a highly reliable semiconductor light receiving element, i.e., an APD, can be obtained.

[0197] <Advantages of the Eighth Embodiment> As described above, according to the semiconductor photodetector of the eighth embodiment, like the semiconductor photodetector of the fourth embodiment, the electron transit layer is located away from the side surface of the element, and therefore, it is possible to obtain a semiconductor photodetector that is highly reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0198] Variation of embodiment 8. A front-illuminated APD, which is an example of a semiconductor light-receiving element according to a modification of the eighth embodiment, will be described below.

[0199] The semiconductor photodetector according to the modified example of the eighth embodiment is structurally different in that the i-type InAlAs multiplication layer 13 in the front-illuminated APD, which is an example of the semiconductor photodetector 160, 160a according to the eighth embodiment, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0200] The layer structure and thickness of the i-type InAlAs digital alloy structure multiplication layer are similar to those of the i-type InAlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modified example of the second embodiment, and therefore description thereof will be omitted.

[0201] <Function of Semiconductor Photodetector (APD) According to Modification of Eighth Embodiment> A front-illuminated APD, which is an example of a semiconductor photodetector according to a modification of embodiment 8, can maintain a long dead space length as shown in FIG. 9B, for example, without shortening the dead space length as shown in FIG. 9C, similarly to the semiconductor photodetector according to the modification of embodiment 2.

[0202] <Effects of the Modification of the Eighth Embodiment> As described above, the semiconductor photodetector according to the modified example of the eighth embodiment has a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, and therefore has the effect of providing a semiconductor photodetector which is more reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0203] Embodiment 9 FIG. 20 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of a semiconductor light-receiving element 170 according to the ninth embodiment.

[0204] <Element structure of semiconductor photodetector (APD) according to embodiment 9> The front-illuminated APD, which is an example of the semiconductor photodetector 170 according to the ninth embodiment, is characterized in that a separation groove 17 is further provided along the outer periphery of the p-type InAlAs conductive layer 25 in addition to the element structure of the front-illuminated APD, which is an example of the semiconductor photodetector 160 according to the eighth embodiment.

[0205] The depth of the separation groove 17 is preferably within a range of 2 μm to 5 μm. The opening width of the separation groove 17 is preferably within a range of 0.5 μm to 100 μm. The bottom of the separation groove 17 reaches at least the i-type InAlAs digital alloy structure electron transit layer 3. FIG. 20 shows an example in which the bottom of the separation groove 17 reaches halfway through the n-type InAlAs buffer layer 2a. The separation groove 17 may be formed by either dry etching or wet etching. However, it is preferable to add wet etching to remove a damaged layer caused by dry etching after dry etching, which has excellent depth control.

[0206] The inside of the separation groove 17 and the surface of the n-type InP window layer 11 are protected by a surface protective film 18 made of an insulating film made of an oxide film such as SiN or SiO2. The surface protective film 18 also serves as an anti-reflective coating for the light receiving section. The thickness of the surface protective film 18 is preferably within a range of 50 nm to 5000 nm. The surface protective film 18 may also be an organic film such as BCB.

[0207] <Function of Semiconductor Photodetector (APD) According to Ninth Embodiment> When the InAlAs digital alloy structure is used as the electron transit layer, each layer of the InAlAs digital alloy structure is highly strained, and therefore, when stress is applied from the outside, disorder is likely to occur. Therefore, as in the semiconductor light receiving element 170 according to the ninth embodiment, by providing the separation groove 17 along the outer periphery of the p-type InAlAs conductive layer 25, the stress that affects the entire wafer during the manufacturing process can be alleviated. Even in the state of individual semiconductor light receiving elements 170, the stress is alleviated by the presence of the separation groove 17, and therefore, the stress concentration in the light receiving part at the center of the semiconductor light receiving element 170 can be alleviated. In addition, since the i-type InAlAs digital alloy structure electron transit layer 3 is exposed in the separation groove 17, it is desirable that the surface of the separation groove 17 is covered with the above-mentioned surface protection film 18. Note that, since a high electric field is not applied to the separation groove 17, it does not become a starting point of degradation.

[0208] <Effects of the 9th embodiment> As described above, in the semiconductor photodetector of the ninth embodiment, the separation groove can relieve stress due to heat treatment or the like in the manufacturing process, and therefore disordering of the digital alloy structure electron transit layer can be prevented. This makes it possible to maintain the ionization rate ratio k at approximately zero, and provides an advantageous effect of providing a semiconductor photodetector that is highly reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0209] Variation of embodiment 9. A front-illuminated APD, which is an example of a semiconductor light-receiving element according to a modification of the ninth embodiment, will be described below.

[0210] The semiconductor photodetector according to the modified example of the ninth embodiment is structurally different in that the i-type InAlAs multiplication layer 13 in the front-illuminated APD, which is an example of the semiconductor photodetector 170 according to the ninth embodiment, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0211] The layer structure and thickness of the i-type InAlAs digital alloy structure multiplication layer are similar to those of the i-type InAlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modified example of the second embodiment, and therefore description thereof will be omitted.

[0212] <Function of Semiconductor Photodetector (APD) According to Modification of Ninth Embodiment> In the semiconductor light receiving element according to the modification of the ninth embodiment, it is not necessary to form the p-type diffusion region 15, that is, there is no high-temperature heat treatment required for Zn diffusion in forming the p-type diffusion region 15, so that the InAlAs digital alloy structure multiplication layer can be prevented from becoming disordered, and it is possible to maintain the long dead space length as shown in Fig. 9B without shortening the dead space length as shown in Fig. 9C. As a result, it is possible to maintain the ionization rate ratio k at approximately zero.

[0213] <Effects of the Modification of the Ninth Embodiment> As described above, the semiconductor photodetector according to the modification of the ninth embodiment has a digital alloy structure multiplication layer whose thickness is controlled within a preset range, and since high-temperature heat treatment is not required, disordering of the InAlAs digital alloy electron transit layer and the InAlAs digital alloy structure multiplication layer can be prevented. Furthermore, the presence of the separation groove can relieve stress, so that a semiconductor photodetector having higher reliability, wider bandwidth operation, and excellent low-noise characteristics can be obtained.

[0214] Embodiment 10 FIG. 21 is a cross-sectional view illustrating the element structure of a back-illuminated APD, which is an example of a semiconductor light-receiving element 170a according to the tenth embodiment.

[0215] <Element structure of semiconductor photodetector (APD) according to the tenth embodiment> While the front-illuminated APD, which is an example of the semiconductor light-receiving element 170 according to the ninth embodiment, receives light from the front side as shown in Fig. 20, the back-illuminated APD, which is an example of the semiconductor light-receiving element 170a according to the tenth embodiment, is characterized in that it has an element structure in which a part of the n-type electrode 31b on the back side is removed to provide an opening 33, and light is made incident on the n-type InP substrate 1 through an anti-reflective coating film 35 formed so as to cover the opening 33, as shown in Fig. 21. That is, the opening 33 covered with the anti-reflective coating film 35, which is an incident region of the incident light 90, is provided on the back side of the n-type InP substrate 1 facing the p-type electrode 32. In addition, the center part of the p-type InGaAs contact layer 8 is partially removed, and the surface protective film 18 made of an insulating film made of an oxide film such as SiN or SiO2 is formed on the exposed p-type InAlAs conductive layer 25, and the surface protective film 18 is further covered with the p-type electrode 32, thereby increasing the reflectance of light from the p-type electrode 32.

[0216] The back-illuminated APD, which is an example of the semiconductor photodetector 170a according to the tenth embodiment, can reduce stress due to heat treatment and the like in the manufacturing process by using the separation grooves, similar to the semiconductor photodetector 170 according to the ninth embodiment, and therefore can prevent disordering of the InAlAs digital alloy structure multiplication layer.

[0217] In addition, since the area of ​​the p-type InAlAs conductive layer 25 can be made smaller in a back-illuminated APD such as the semiconductor photodetector 170a than in a front-illuminated APD, it is possible to further reduce stress caused by heat treatment in the manufacturing process, and thus the i-type InAlAs digital alloy structure electron transit layer 3 is further prevented from becoming disordered. As a result, even though a heat treatment process is performed in forming the device structure, the i-type InAlAs digital alloy structure electron transit layer 3 is prevented from becoming disordered, and a semiconductor photodetector with high reliability, wideband operation, and excellent low noise characteristics can be obtained. In addition, as described above, the reflectance of light from the p-type electrode 32 is increased, and light that is not absorbed by the i-type InGaAs light absorption layer 5 and transmitted through the i-type InGaAs light absorption layer 5 is reflected by the p-type electrode 32 and returns to the i-type InGaAs light absorption layer 5, thereby increasing sensitivity. As a result, the i-type InGaAs light absorption layer 5 can be made thinner, thereby shortening the transit time of electrons and holes. By combining this with the i-type InAlAs digital alloy structure electron transit layer 3, a semiconductor light receiving element capable of further broadening the bandwidth can be obtained.

[0218] In addition, in a back-illuminated APD such as the semiconductor photodetector 170a, the area of ​​the mesa-shaped p-type InAlAs conductive layer 25 can be reduced compared to that of a front-illuminated APD, and therefore the effect of stress from the mesa portion of the p-type InAlAs conductive layer 25 is reduced, and therefore no disorder occurs in the i-type InAlAs digital alloy structure electron transit layer 3. In addition, since stress is relaxed even during operation of the semiconductor photodetector 170a, no disorder occurs in the i-type InAlAs digital alloy structure electron transit layer 3 even after a long period of time. In other words, the semiconductor photodetector 170a according to the tenth embodiment can operate in a wide band for a long period of time and maintain low noise.

[0219] <Advantages of the Tenth Embodiment> As described above, in the semiconductor photodetector of the tenth embodiment, the area of ​​the p-type conductive layer can be reduced, which further reduces the stress generated in the heat treatment process, thereby further preventing disordering of the i-type InAlAs digital alloy structure electron transit layer. In addition, the separation groove can further reduce the stress, which results in an advantageous effect of providing a semiconductor photodetector that is highly reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0220] A variation of embodiment 10. A front-illuminated APD, which is an example of a semiconductor light-receiving element according to a modification of the tenth embodiment, will be described below.

[0221] The semiconductor photodetector according to the modified example of the tenth embodiment is structurally different in that the i-type InAlAs multiplication layer 13 in the front-illuminated APD, which is an example of the semiconductor photodetector 170a according to the tenth embodiment, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0222] The layer structure and thickness of the i-type InAlAs digital alloy structure multiplication layer are similar to those of the i-type InAlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modified example of the second embodiment, and therefore description thereof will be omitted.

[0223] <Function of Semiconductor Photodetector (APD) According to Modification of Tenth Embodiment> In the semiconductor light receiving element according to the modification of the tenth embodiment, it is not necessary to form the p-type diffusion region 15, that is, there is no high-temperature heat treatment required for Zn diffusion in forming the p-type diffusion region 15, so that the InAlAs digital alloy structure multiplication layer can be prevented from becoming disordered, and it is possible to maintain the long dead space length as shown in Fig. 9B without shortening the dead space length as shown in Fig. 9C. As a result, it is possible to maintain the ionization rate ratio k at approximately zero.

[0224] <Effects of the Modification of the Tenth Embodiment> As described above, the semiconductor photodetector according to the modification of the tenth embodiment has a digital alloy structure multiplication layer whose thickness is controlled within a preset range, and since high-temperature heat treatment is not required, disordering of the InAlAs digital alloy electron transit layer and the InAlAs digital alloy structure multiplication layer can be prevented. Furthermore, the presence of the separation groove can relieve stress, so that a semiconductor photodetector having higher reliability, wider bandwidth operation, and excellent low-noise characteristics can be obtained.

[0225] Embodiment 11 FIG. 22 is a cross-sectional view showing the element structure of a back illuminated APD, which is an example of a semiconductor light receiving element 180 according to the eleventh embodiment.

[0226] <Element structure of semiconductor photodetector (APD) according to embodiment 11> The semiconductor light receiving element 180 according to the eleventh embodiment includes an Fe-doped semi-insulating InP substrate 1a and an Fe-doped semi-insulating InP layer having a carrier concentration of 1 to 5×10 18 cm -3 and a p-type InAlGaAs contact layer 40 having a thickness of 0.1 to 1 μm and a carrier concentration of 1 to 5×10 18 cm -3 and a p-type InP conductive layer 41 having a layer thickness of 0.1 to 1 μm, and a p-type or low carrier concentration (5×10 17 cm -3 5×10 17 cm -3 and an i-type InGaAs light absorbing layer 43 having a thickness of 0.1 to 2.0 μm and a carrier concentration of 1×10 17 cm -3 ~5×10 18 cm -3 a p-type InP electric field relaxation layer 44 having a thickness of 10 to 100 nm, an i-type InAlAs multiplication layer 45, an n-type InAlAs electric field adjustment layer 46 having a thickness of 10 to 50 nm, and a carrier concentration of 1×10 17 cm -3and an i-type InAlAs digital alloy structure electron transit layer 47 having a digital alloy structure in which an i-type AlAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) and an i-type InAs layer (for example, a layer thickness of two atomic layers, about 0.6 nm) are alternately laminated multiple times, and the carrier concentration is 1×10 16 ~5×10 18 cm -3 and an n-type InAlAs field adjustment layer 48 having a thickness of 0.1 to 2 μm and a carrier concentration of 5×10 17 ~8×10 18 cm -3 and an n-type InAlAs conductive layer 49 having a thickness of 0.1 to 2 μm and a carrier concentration of 5×10 17 ~8×10 18 cm -3 The n-type InGaAs contact layer 50 has a thickness of 0.1 to 2 μm, an n-type electrode 51 formed on the n-type InGaAs contact layer 50, a p-type electrode 52 formed on the p-type InAlGaAs contact layer 40, a metal film 53 formed on the back side of the Fe-doped semi-insulating InP substrate 1a, and an anti-reflective coating film 35 provided in an opening 33 of the metal film 53. The p-type InAlGaAs contact layer 40 and the p-type InP conductive layer 41 are also called p-type semiconductor layers. The central portion of the n-type InGaAs contact layer 50 is partially removed, and a surface protective film 18 made of an insulating film made of an oxide film such as SiN or SiO2 is formed on the exposed n-type InAlAs conductive layer 49, and the surface protective film 18 is covered with the n-type electrode 51 to increase the reflectance of light from the n-type electrode 51.

[0227] <Manufacturing method of semiconductor photodetector (APD) according to embodiment 11> A method for manufacturing the semiconductor light receiving element 180 according to the eleventh embodiment will be described below. By using MOVPE or MBE, a Fe-doped semi-insulating InP substrate 1a is doped with a carrier concentration of 1 to 5×10 18 cm -3The p-type InAlGaAs contact layer 40 is crystal-grown to a thickness of 0.1 to 1 μm. An n-type InP substrate may be used instead of the Fe-doped semi-insulating InP substrate 1a. The p-type InAlGaAs contact layer 40 may be made of p-type InP, p-type InGaAsP, or p-type InGaAs instead of p-type InAlGaAs.

[0228] On the p-type InAlGaAs contact layer 40, a carrier concentration of 1 to 5×10 18 cm -3 The p-type InP conductive layer 41 is crystal-grown to a thickness of 0.1 to 1 μm. Here, the p-type InP conductive layer 41 may be made of p-type InGaAsP or p-type InAlGaAs instead of p-type InP.

[0229] Next, an i-type, n-type or p-type InAlAs layer having a small barrier against holes may be provided on the p-type InP conductive layer 41. Furthermore, a p-type or low carrier concentration (5×10 17 cm -3 After the n-type or i-type InAlGaAs / InAlAs graded layer 42 (below) is grown by crystal growth, the i-type InGaAs light absorbing layer 43 is grown by crystal growth to a layer thickness of 0.1 to 2 μm. The i-type InGaAs light absorbing layer 43 is made of a low carrier concentration (5×10 17 cm -3 Here, either the p-type InP conductive layer 41 or the n-type InAlGaAs / InAlAs graded layer 42, or both of them, are not necessarily required.

[0230] Next, the carrier concentration is 1×10 17 ~5×10 18 cm -3 The p-type InP electric field buffer layer 44 is crystal-grown to a thickness of 10 to 100 nm. Examples of p-type dopants for the p-type InP electric field buffer layer 44 include Be, Zn, and C. The p-type InP electric field buffer layer 44 does not necessarily have to be p-type InP, and may be p-type InAlAs or a p-type InAlAs digital alloy structure.

[0231] Furthermore, between the i-type InGaAs light absorption layer 43 and the p-type InP electric field buffer layer 44, an InAlGaAs / InAlAs graded layer having a thickness of 10 to 100 nm and an intermediate band gap value, such as InAlGaAs or InGaAsP, may be provided.

[0232] An i-type InAlAs multiplication layer 45 and an n-type InAlAs field adjustment layer 46 are formed as multiplication layers by crystal growth on the p-type InP field relaxation layer 44. The n-type InAlAs field adjustment layer 46 is provided to prevent the electron transit speed from being saturated or the electrons from being multiplied due to an excessive electric field being applied to the i-type InAlAs digital alloy structure electron transit layer 47.

[0233] An i-type InAlAs digital alloy structure electron transit layer 47 is crystal-grown as an electron transit layer on the n-type InAlAs field adjustment layer 46. The i-type InAlAs digital alloy structure electron transit layer 47 is composed of semiconductor layers in which an AlAs layer (having a thickness of two atomic layers, approximately 0.6 nm) and an InAs layer (having a thickness of two atomic layers, approximately 0.6 nm) are alternately laminated in this order from the Fe-doped semi-insulating InP substrate 1a side. The i-type InAlAs digital alloy structure electron transit layer 47 may alternatively be formed in the order of an InAs layer and an AlAs layer.

[0234] The number of atomic layers of each layer of the i-type InAlAs digital alloy structure electron transit layer 47 is preferably 2 to 4 atomic layers, and is optimally 2 atomic layers, because the thinner the atomic layer thickness of each layer is, the greater the effect of reducing the ionization rate ratio k due to the digital alloy structure.

[0235] The thickness of the i-type InAlAs digital alloy structure electron transit layer 47 is within the range of 50 nm to 1000 nm. For example, if the thickness of the i-type InAlAs digital alloy structure electron transit layer 47 is 500 nm, the number of repetitions of the AlAs layer (two atomic layers) / InAs layer (two atomic layers) is 417. As shown in FIG. 8, the dead space effect is significantly manifested at a layer thickness of 200 nm or less, so the most suitable thickness of the i-type InAlAs digital alloy structure electron transit layer 47 is 50 nm to 200 nm. In addition, if the layer thickness is 400 nm or less, the electron transit speed is high at a distance of 200 nm, which is 50% or more of the layer thickness, so a large dead space effect can be obtained even in the layer thickness range of 50 nm to 400 nm.

[0236] The InAlAs digital alloy structure electron transport layer 47 has an i-type conductivity and a carrier concentration of 1×10 17 cm -3 However, the carrier concentration is 5×10 18 cm -3 It may be p-type or n-type as follows:

[0237] Next, the n-type InAlAs field adjustment layer 48 is crystal-grown to a thickness of 0.1 to 2 μm. Here, the n-type InAlAs field adjustment layer 48 also functions as a window layer, but is not necessarily required. The n-type InAlAs field adjustment layer 48 is a layer for adjusting the electric field on the outermost surface, and has a carrier concentration of 1×10 16 ~5×10 18 cm -3 By weakening the electric field on the outermost surface, local breakdown is suppressed, and the effect of improving reliability is achieved.

[0238] On the n-type InAlAs field adjustment layer 48, an n-type InAlAs conductive layer 49 is grown by crystal growth as an n-type conductive layer, and an n-type InGaAs contact layer 50 is grown by crystal growth as an n-type contact layer. The n-type InAlAs conductive layer 49 and the n-type InGaAs contact layer 50 each have a thickness of 0.1 to 2 μm and a carrier concentration of 5×10 17 cm -3 ~8×10 18 cm -3 It is.

[0239] After the crystal growth of the n-type InGaAs contact layer 50, the n-type InAlAs conductive layer 49 and the n-type InGaAs contact layer 50 are etched into a mesa shape to form a first mesa. Then, the second mesa is formed by etching the p-type InAlGaAs contact layer 40 so as to include the first mesa outside the first mesa. The second mesa does not need to reach the p-type InAlGaAs contact layer 40 as long as the i-type InGaAs light absorption layer 43 can be electrically isolated. The distance between the first mesa and the second mesa is preferably 1 μm or more. Alternatively, the first mesa may be formed after the second mesa is formed.

[0240] A p-type electrode 52 is formed on the p-type InAlGaAs contact layer 40, and an n-type electrode 51 is formed on the n-type InGaAs contact layer 50. Since the ohmic resistance of an n-type semiconductor is one order of magnitude smaller than that of a p-type semiconductor, it is not necessarily necessary to use the n-type InGaAs contact layer 50 having a small band gap, and n-type InP, n-type InGaAlAs, or n-type InGsAsP may also be used. Alternatively, a direct contact may be made to the n-type InAlAs conductive layer 49. Through the above steps, the semiconductor light receiving element 180 according to the eleventh embodiment is completed.

[0241] <Functions and Effects of Semiconductor Photodetector (APD) According to Eleventh Embodiment> The semiconductor light receiving element 180 of the eleventh embodiment is characterized in that the conductivity type of the semiconductor light receiving element 170a of the tenth embodiment is inverted from n type to p type and from p type to n type, and the conductivity type of the upper surface side is made n type.

[0242] A first function and effect of the semiconductor light receiving element 180 according to the eleventh embodiment will be described below. If the i-type InAlAs digital alloy structure electron transit layer 47 is held at high temperature for a long time during epitaxial crystal growth, it may become disordered and turn into an InAlAs random alloy structure. In the semiconductor photodetector 180 according to the eleventh embodiment, the total thickness of the semiconductor layers above the i-type InAlAs digital alloy structure electron transit layer 47 is about one-third thinner than that of the semiconductor photodetector 170a according to the tenth embodiment. That is, in the semiconductor photodetector 180 according to the eleventh embodiment, the crystal growth time required for epitaxially growing the remaining semiconductor layers after the i-type InAlAs digital alloy structure electron transit layer 47 is about one-third shorter than that of the semiconductor photodetector 190 according to the seventh embodiment, so that the i-type InAlAs digital alloy structure electron transit layer 47 is less likely to become disordered.

[0243] A second function and effect of the semiconductor light receiving element 180 according to the eleventh embodiment will be described below. The upper electrode of the semiconductor light receiving element, that is, the electrode on the front surface side, is a p-type electrode 32 in the back-illuminated APD shown in Fig. 21, and an n-type electrode 51 in the back-illuminated APD shown in Fig. 22. To increase the speed, it is necessary to reduce the electrode area of ​​the front surface side electrode and reduce the electric capacitance. However, when the electrode area of ​​the upper electrode is reduced, the contact resistance between the electrode and the semiconductor layer increases, which causes a problem that the RC time constant increases and the response band becomes narrower.

[0244] In the semiconductor light receiving element 180 according to the eleventh embodiment, the upper electrode, i.e., the n-type electrode 51, is in contact with the n-type semiconductor, so that the ohmic resistance is reduced to one tenth of that in the contact between the p-type electrode and the p-type semiconductor. This allows the area of ​​the n-type electrode 51 to be reduced, which has the effect of reducing the stress from the electrode and making disorder less likely to occur in the i-type InAlAs digital alloy structure electron transit layer 47. In the above description, an APD has been described as an example of the semiconductor light receiving element 180 according to the eleventh embodiment, but a PD may also have an element structure in which the conductivity types of the semiconductor light receiving element 150 according to the seventh embodiment are inverted from n-type to p-type and from p-type to n-type.

[0245] <Advantages of the Eleventh Embodiment> As described above, according to the semiconductor light receiving element of the eleventh embodiment, the crystal growth time required for epitaxially growing the remaining semiconductor layers after the InAlAs digital alloy structure electron transit layer is grown is about one third shorter than that of the semiconductor light receiving element of the tenth embodiment, and therefore the InAlAs digital alloy structure electron transit layer is less likely to become disordered, resulting in an effect of obtaining a semiconductor light receiving element that is highly reliable, operates in a wide band, and has excellent low noise characteristics. As described above, since the reflectance of light from the n-type electrode 51 is increased, light that is not absorbed by the i-type InGaAs light absorbing layer 43 and is transmitted through the i-type InGaAs light absorbing layer 43 is reflected by the n-type electrode 51 and returns to the i-type InGaAs light absorbing layer 43, thereby increasing the sensitivity. As a result, the i-type InGaAs light absorbing layer 43 can be made thinner, and the transit time of electrons and holes can be shortened, and by combining the i-type InAlAs digital alloy structure electron transit layer 47, an effect of obtaining a semiconductor light receiving element that can be further widebanded is obtained.

[0246] A variation of embodiment 11. A front-illuminated APD and a back-illuminated APD, which are examples of semiconductor light-receiving elements according to modifications of the eleventh embodiment, will be described below.

[0247] The semiconductor photodetector according to the modified example of the eleventh embodiment is structurally different from the front-illuminated APD and back-illuminated APD, which are examples of the semiconductor photodetector 180 according to the eleventh embodiment, in that the i-type InAlAs multiplication layer 45, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0248] The layer structure and thickness of the i-type InAlAs digital alloy structure multiplication layer are similar to those of the i-type InAlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modified example of the second embodiment, and therefore description thereof will be omitted.

[0249] <Function of Semiconductor Light-Receiving Element According to Modification of Eleventh Embodiment> In the semiconductor photodetector (APD) according to the modified example of the eleventh embodiment, the crystal growth time required for epitaxially growing the remaining semiconductor layers after the crystal growth of the i-type InAlAs digital alloy structure multiplication layer is approximately one-third shorter than that of the semiconductor photodetector 190 according to the seventh embodiment, so that disordering of the i-type InAlAs digital alloy structure multiplication layer is less likely to occur.

[0250] <Effects of the Modification of the Eleventh Embodiment> As described above, the semiconductor photodetector according to the modification of the eleventh embodiment has a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, and the crystal growth time required for epitaxially growing the remaining semiconductor layers after the i-type InAlAs digital alloy structure multiplication layer is grown is shorter than that of an element structure having an opposite conductivity type. This prevents the InAlAs digital alloy electron transit layer and the InAlAs digital alloy structure multiplication layer from becoming disordered, thereby providing a semiconductor photodetector that is more reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0251] Embodiment 12 FIG. 23 is a cross-sectional view showing the element structure of a front-illuminated type PD, which is an example of a semiconductor light-receiving element 190 according to the twelfth embodiment.

[0252] <Characteristics of the element structure (PD) of the semiconductor photodetector according to the twelfth embodiment> The semiconductor photodetector 190 according to the twelfth embodiment is structurally different from the semiconductor photodetector 100 according to the first embodiment in that an electron transit layer is provided on the p-type electrode 32 side, i.e., on the light receiving portion side, of the i-type InGaAs light absorption layer 5. That is, from the n-type InP substrate 1 side, the i-type InGaAs light absorption layer 5, the i-type InAlGaAs / InAlAs graded layer 6, and the i-type InAlAs digital alloy structure electron transit layer 3a are formed in this order.

[0253] The thickness and carrier concentration of each layer of the semiconductor light receiving element 190 according to the twelfth embodiment are similar to those of the first embodiment, and therefore the description thereof will be omitted.

[0254] As shown in Figure 8, in the case of the InAlAs random alloy structure, the hole dead space length Dh is approximately 80 nm, whereas in the case of the InAlAs digital alloy structure, the hole dead space length Dh is approximately 170 nm. In other words, since the hole dead space length is about twice as long as the electron dead space length, holes can travel fast with a layer thickness of 200 nm or less. Therefore, by providing a hole transit layer with an i-type InAlAs digital alloy structure, a broadband PD can be achieved.

[0255] <Advantages of the 12th embodiment> As described above, the semiconductor light receiving element according to the twelfth embodiment has an InAlAs digital alloy electron transit layer, which provides an effect of providing a semiconductor light receiving element that operates over a wide band.

[0256] Embodiment 13 FIG. 24 is a cross-sectional view showing the element structure of a front-illuminated APD, which is an example of the semiconductor light-receiving element 200 according to the thirteenth embodiment.

[0257] <Features of the element structure (APD) of the semiconductor light receiving element according to the thirteenth embodiment> The semiconductor photodetector 200 according to the thirteenth embodiment is structurally different from the semiconductor photodetector 110 according to the second embodiment in that an electron transit layer is provided on the p-electrode 32 side, i.e., on the light receiving portion side, of the i-type InGaAs light absorption layer 5. That is, from the n-type InP substrate 1 side, the i-type InGaAs light absorption layer 5, the i-type InAlGaAs / InAlAs graded layer 6, and the i-type InAlAs digital alloy structure electron transit layer 3a are formed in this order.

[0258] The thickness and carrier concentration of each layer of the semiconductor light receiving element 200 according to the thirteenth embodiment are similar to those of the second embodiment, and therefore a description thereof will be omitted.

[0259] As shown in Figure 8, in the case of the InAlAs random alloy structure, the hole dead space length Dh is approximately 80 nm, whereas in the case of the InAlAs digital alloy structure, the hole dead space length Dh is approximately 170 nm. In other words, since the hole dead space length is about twice as long as the electron dead space length, holes can travel quickly with a layer thickness of 200 nm or less. Therefore, by inserting an i-type InAlAs digital alloy structure hole transit layer, it is possible to achieve a broadband APD.

[0260] <Advantages of the Thirteenth Embodiment> As described above, the semiconductor photodetector according to the thirteenth embodiment has an InAlAs digital alloy electron transit layer, which makes it possible to obtain a semiconductor photodetector that operates over a wide bandwidth and has excellent low noise characteristics.

[0261] A variation of embodiment 13. A front-illuminated APD, which is an example of a semiconductor light-receiving element according to a modification of the thirteenth embodiment, will be described below.

[0262] The semiconductor photodetector according to the modified example of the thirteenth embodiment is structurally different in that the i-type InAlAs multiplication layer 13 in the front-illuminated APD, which is an example of the semiconductor photodetector 200 according to the thirteenth embodiment, i.e., the InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAlAs digital alloy structure multiplication layer.

[0263] The layer structure and thickness of the i-type InAlAs digital alloy structure multiplication layer are similar to those of the i-type InAlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modified example of the second embodiment, and therefore description thereof will be omitted.

[0264] <Function of Semiconductor Photodetector (APD) According to Modification of Thirteenth Embodiment> In the semiconductor light receiving element according to the modification of the thirteenth embodiment, since an InAlAs digital alloy structure multiplication layer is adopted, it is possible to maintain a long dead space length as shown in Fig. 9B. As a result, it is possible to maintain the ionization rate ratio k at approximately zero.

[0265] <Effects of the Modification of the Thirteenth Embodiment> As described above, the semiconductor photodetector according to the modified example of the thirteenth embodiment has a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, and thus has the effect of providing a semiconductor photodetector which is highly reliable, operates over a wide bandwidth, and has excellent low noise characteristics.

[0266] Embodiment 14 25 is a configuration diagram showing an optical line terminal (OLT) 260 of a 50G-PON system according to a fourteenth embodiment. The optical line terminal 260 includes a forward error correction (FEC) 261, a driver amplifier 262, a light source 263, a wavelength division multiplexing (WDM) 264, a clock data recovery (CDR) 265 which is a clock and data recovery circuit, a limiting amplifier 266, a burst TIA 267, and a DA-APD 268 of the present disclosure. Note that the DA-PD of the present disclosure may be applied instead of the DA-APD 268 of the present disclosure.

[0267] The APD of the present disclosure refers to an APD described in each of the above-mentioned embodiments in which the electron transit layer has an InAlAs digital alloy structure, or an APD in which both the electron transit layer and the multiplication layer have an InAlAs digital alloy structure. Furthermore, the PD of the present disclosure refers to a PD described in each of the above-mentioned embodiments in which the electron transit layer has an InAlAs digital alloy structure.

[0268] 26 is a configuration diagram illustrating an optical line terminal (ONU) 270 of a 50G-PON system according to embodiment 14. The optical line terminal 270 includes a WDM 271, a light source 272, a driver amplifier 273, an FEC 274, a DA-APD 275 of the present disclosure, a TIA 276, a limiting amplifier 277, and a CDR 278.

[0269] 27 is a configuration diagram showing an optical line terminal (OLT) 250a of a 50G-PON system as a comparative example. The optical line terminal 250a as the comparative example includes a forward error correction (FEC) circuit FEC251, a driver amplifier 252, a light source 253, a wavelength division multiplexing (WDM) circuit WDM254, a digital signal processing circuit DSP255, an analog-to-digital converter (ADC) circuit ADC256, a burst TIA257, and a conventional APD258.

[0270] As shown in Fig. 27, the 50G-PON system of the comparative example requires digital bandwidth compensation, i.e., a DSP 255. On the other hand, the 50G-PON system using the DA-APD of the present disclosure does not require digital bandwidth compensation. This is because the use of the DA-APD of the present disclosure, i.e., an APD having at least an InAlAs digital alloy structure electron transit layer, makes it possible to reduce the electrical capacitance without deteriorating the bandwidth.

[0271] To increase the number of branches in a PON system and eliminate the need for an SOA, it is necessary to improve the signal-to-noise ratio of the receiver and increase the receiving sensitivity. For example, if an optical demultiplexer is added to increase the number of branches from the current level, the amount of light will be halved, so the signal-to-noise ratio must be improved by at least 3 dB. The signal-to-noise ratio of a receiver using an APD is expressed by the following equation (14). SN ratio=Iph 2M 2 / (2q(Iph+Id)M 2 ·F·B +4Kb T Ft B / Rt) (14)

[0272] In equation (14), Iph is the photocurrent of the APD, M is the multiplication factor, q is the unit charge, Id is the dark current to be multiplied, F is the excess noise factor of the APD, B is the bandwidth, Kb is the Boltzmann constant, T is the absolute temperature, Ft is the noise figure of the amplifier, and Rt is the input resistance. The term on the left of the denominator represents the shot noise of the APD, and the term on the right of the denominator represents the thermal noise of the amplifier.

[0273] To simplify equation (14), we assume that Id is sufficiently smaller than Iph, and that the APD shot noise term and the amplifier thermal noise term are equal when the gain is at the maximum SNR. If we then replace the amplifier thermal noise term with the APD shot noise term, the SNR can be expressed by the following equation (15). SN ratio=Iph / (4q F B) (15)

[0274] Moreover, the excess noise factor F is given by the following equation (16). F = M(1-(1-k)·((M-1) 2 / M 2 )) (16)

[0275] In the case of a conventional InAlAs random alloy structure multiplication layer, as mentioned above, it is difficult to thin the layer (to about 70 nm) to the point where the dead space effect appears due to the influence of the tunnel current, so there are no examples of its application to APDs. For this reason, the system is designed with the ionization rate ratio k for an unthinned InAlAs multiplication layer set to 0.2. When the ionization rate ratio k=0.2 and the multiplication factor is 12 times, the excess noise factor F=3.9.

[0276] On the other hand, in the 50G-PON system according to the fourteenth embodiment, an APD with an InAlAs digital alloy structure as a multiplication layer, that is, the DA-APD of the present disclosure, is applied as a semiconductor light receiving element. In the case of the InAlAs digital alloy structure multiplication layer of the present disclosure, the dead space effect works even with a layer thickness of 100 nm or more, so it can be applied to an APD. In this case, the ionization rate ratio k=0, and when the multiplication factor is 12 times, the excess noise factor F=1.9. Therefore, the excess noise is about half that of the conventional APD. As a result, the DA-APD of the present disclosure is applied, and the signal-to-noise ratio is improved by 3 dB.

[0277] Generally, in a 50G-PON system, inserting one stage of a 2-way demultiplexer to increase the number of branches increases the loss by 3 dB. Therefore, by applying the DA-APD disclosed herein as a semiconductor photodetector, it becomes possible to insert one more stage of demultiplexer into a 50G-PON system.

[0278] 28 is a diagram illustrating a configuration of an optical line terminal (OLT) of a 50G-PON system according to a fourteenth embodiment. An optical line terminal 260a of a 50G-PON system includes an FEC 261, a driver amplifier 262, a light source 263, a WDM 264, a DSP 265a, an ADC 266a, a burst TIA 267, and a DA-APD 268 of the present disclosure. Note that the DA-PD of the present disclosure may be applied instead of the DA-APD 268 of the present disclosure.

[0279] 29 is a diagram illustrating a configuration of an optical line terminal (ONU) of a 50G-PON system according to embodiment 14. The optical line terminal 260b of the 50G-PON system includes an FEC 261, a driver amplifier 262, a light source 263, a WDM 264, a DSP 265a, an ADC 266a, a TIA 267a, and a DA-APD 268 of the present disclosure.

[0280] The effects of the semiconductor light receiving element according to the present disclosure will be further described. Among the DA-APDs disclosed herein, the APD having an InAlAs digital alloy structure multiplication layer controls the thickness of the multiplication layer within a predetermined range to set the ionization rate ratio k to zero, thereby making the multiplication time in formula (6) nearly zero. As a result, the response bandwidth of the APD does not deteriorate even if the multiplication factor is increased. In other words, in the DA-APD disclosed herein, the bandwidth is limited only by the RC time constant and the carrier transit time, as in the case of conventional PDs. Therefore, the wide bandwidth required for 50G-PON systems is possible, and reception is possible without digital bandwidth compensation by DSP.

[0281] In addition, when the ionization rate ratio k approaches zero, excess noise that deteriorates receiver sensitivity is suppressed, making it unnecessary to amplify the optical signal using an SOA. Furthermore, even in PON systems other than 50G-PON systems, it becomes possible to achieve more branching than before. As a result, PON systems can be made cheaper and more energy-efficient.

[0282] <Advantages of the Fourteenth Embodiment> As described above, according to the optical line terminal of embodiment 14, the DA-APD or DA-PD disclosed herein is used as the semiconductor photodetector, thereby achieving the effect of obtaining an optical line terminal that can increase the transmission distance of optical signals and reduce power consumption.

[0283] Embodiment 15 Fig. 30 is a diagram illustrating a configuration of a multi-level intensity modulation transmitting / receiving apparatus 300 according to embodiment 15. Fig. 31A and Fig. 31B are diagrams illustrating received waveforms of the multi-level intensity modulation transmitting / receiving apparatus 300 according to embodiment 15.

[0284] The multilevel intensity modulation transmitting / receiving device 300 is a multilevel intensity modulation transmitting / receiving device using a PAM (Pulse Amplitude Modulation) method, which is a multilevel intensity modulation method. In the transmitting section, a digital signal generated in a DSP 301 is converted to an analog signal in a DAC 302a, amplified in a driver amplifier 303, and driven by a light source 304 consisting of a DFB laser or EML to emit an optical signal to an optical fiber cable 310.

[0285] Meanwhile, in the receiving section, the light passes through the optical fiber cable 310 and the optical system and enters the DA-APD 305, which is a semiconductor light receiving element of the present disclosure, where the light signal is converted to a current and multiplied, and is further amplified in the Linear-TIA 306, after which it is converted to a digital signal in the ADC 302b, and signal processing is performed by the DSP 301. Note that the DA-PD of the present disclosure may be used instead of the DA-APD 305 of the present disclosure.

[0286] <Functions and Effects of the Multilevel Intensity Modulation Transmitter / Receiver According to the Fifteenth Embodiment> In a PAM-based multilevel intensity modulation transmitting / receiving device 300, it is necessary to receive not only binary signals of 1 and 0 such as NRZ (None Return to Zero) and RZ (Return to Zero), but also, for example, four values ​​of different optical signal intensity in PAM4 (Pulse Amplitude Modulation-4). An example of a PAM4 received waveform is shown in FIG. 31A. An index called TDECQ (Transmitter Dispersion and Eye Closure Quaternary) is used to judge the quality of the received waveform in PAM4. TDECQ is calculated by the following equation (17). TDECQ(dB)=10·log(OMA / (6·Qt·R)) (17)

[0287] In equation (17), the optical modulation amplitude (OMA) is the total amplitude from level 0 to level 3, Qt is a value that depends on the SER (Symbol Error Rate) defined by the IEEE (Institute of Electrical and Electronics Engineers), and R is the additional noise value required to achieve the SER value. TDECQ (dB) is defined as, for example, 3 dB or less. To reduce TDECQ (dB), (1) The eye opening at each level must be uniform. (2) Low noise at each level is necessary.

[0288] In order to ensure uniform eye openings for each of the four levels of optical signal strength, the semiconductor photodetector must have excellent linearity. Here, a semiconductor photodetector has good linearity when the photocurrent Iph increases in proportion to the optical input power Pin. In other words, the linearity is good if Iph / Pin is constant even if the optical input power Pin changes.

[0289] In addition, PAM needs to receive signals with low to high intensity, so it needs to have a good dynamic range. In other words, even if the optical input power Pin increases, if the drop in Iph / Pin is small, the dynamic range is good. As shown in the received waveform in Figure 31B, if the linearity and dynamic range deteriorate, the eye opening formed between level 2 and level 3 deteriorates.

[0290] In the case of APDs, the linearity deteriorates when the photocurrent increases with an increase in optical input, which causes an increase in the number of holes and electrons traveling in the multiplication layer and the light absorption layer, causing a change in the electric field distribution in the multiplication layer and the light absorption layer. This phenomenon is called the space charge effect.

[0291] The inventors have studied a model of degradation of the linearity of an APD. Figures 32A and 32B are diagrams for explaining the operation of a PD when a high optical input is applied. As shown in Figure 32A, when the optical input increases and the photocurrent increases, a space charge effect acts as if a voltage drop occurs due to the series resistance and no voltage is applied to the pn junction. This voltage drop reduces the multiplication factor. This is because the generated electrons and holes affect the electric field distribution, as shown in Figure 32B. The series resistance Rli that degrades the linearity of an APD is expressed by the following equation (18). Rli = Rsc + Rd + Rlo (18)

[0292] In equation (18), Rsc is the resistance due to the space charge effect, Rd is the element resistance, and Rlo is the load resistance. Rd and the load resistance are usually several tens of Ω, but Rsc can be several hundreds of Ω or more.

[0293] The inventors have found that, when the time it takes for electrons and holes generated by light absorption to pass through the depletion layer is Td, Rsc can be expressed by the following formula (19). Rsc=W Td / (2εS) (19) In equation (19), W is the thickness of the depletion layer, ε is the dielectric constant, and S is the pn junction area. The resistance Rsc due to the space charge effect is proportional to the time it takes for electrons and holes to pass through the depletion layer, Td. Therefore, it is possible to reduce Rsc by increasing the speed at which electrons and holes travel and reducing Td.

[0294] In the PD and APD having at least the InAlAs digital alloy structure electron transit layer of the present disclosure, the transit time of electrons in the electron transit layer is short, so Rsc is reduced, and as a result, the eye opening becomes uniform, so that TDECQ satisfies the specified value. Furthermore, it is possible to increase the transmission distance and reduce the driving current of the transmitting laser.

[0295] Among the DA-APDs of the present disclosure, a case where an APD in which both the electron transit layer and the multiplication layer have an InAlAs digital alloy structure is used will be described below. First, the operation of the APD when a large amount of light is input will be described. FIG. 33 is a diagram for explaining the operation of the APD when a large amount of light is input. When a large number of electrons and holes are generated in the multiplication layer, the electric field in the multiplication layer of the APD changes, that is, the so-called space charge effect occurs. This space charge effect reduces the multiplication factor of the APD and deteriorates the linearity. As described above, the deterioration of the linearity of the APD is caused by the series resistance Rsc, so it is necessary to reduce the residence time Tdm of the electrons and holes in the depletion layer. In particular, as the multiplication factor increases, the residence time Tdm in the multiplication layer increases. Tdm is the same as the so-called multiplication time, and is expressed by the following formula (20). Residence time Tdm=multiplication time=2πNkMτav (20)

[0296] In equation (20), N is the Emmons coefficient (which depends gently on the ionization rate ratio k), M is the multiplication factor, and τav is the average time it takes for electrons and holes to travel through the multiplication layer. The residence time Tdm excludes the one-way transit time of carriers crossing the multiplication layer. N is 0.55, 0.83, 1.1, and 2.0 when the ionization rate ratio k=0.5 (InP), 0.2 (InAlAs), 0.1 (Si), and 0 to 0.001 (InAlAs digital alloy structure), respectively.

[0297] Figure 34 shows the residence time Tdm of electrons and holes for each material that composes the multiplication layer. In the InAlAs digital alloy structure multiplication layer, the residence time Tdm within the multiplication layer is dramatically reduced. In other words, electrons and holes are quickly discharged from the multiplication layer, suppressing the space charge effect in the multiplication layer, and as a result, the linearity and dynamic range are improved in the InAlAs digital alloy structure multiplication layer.

[0298] As a result, while the conventional APD had a non-uniform PAM4 eye opening as shown in Fig. 31B, the DA-APD of the present disclosure has a uniform eye opening as shown in Fig. 31A, making it possible for TDECQ to satisfy the specified value. Therefore, when the DA-APD of the present disclosure is used, an APD can be used in a PAM transceiver as well, making it possible to increase the transmission distance of an optical signal and reduce the drive current of the transmitting laser.

[0299] <Advantages of the 15th embodiment> As described above, according to the multi-level intensity modulation transceiver of embodiment 15, the DA-APD or DA-PD disclosed herein is used as the semiconductor photodetector, thereby achieving the effect of obtaining a multi-level intensity modulation transceiver that can increase the transmission distance of an optical signal and reduce power consumption.

[0300] Embodiment 16 Fig. 35 is a schematic diagram showing the configuration of a radio on fiber system 400 (Radio on fiber: RoF) according to a sixteenth embodiment. Fig. 36 is a schematic diagram showing the configuration of a radio on fiber system 450, which is a comparative example. The radio on fiber system 400 includes a light source 401, a transmission line 402 such as an optical fiber cable, a DA-APD 403 of the present disclosure, and an antenna 404. Note that a DA-PD of the present disclosure may be used instead of the DA-APD 403 of the present disclosure.

[0301] In a radio-on-fiber system 400 according to the sixteenth embodiment, an analog electric amplitude signal is input to a light source 401 such as an LD and converted into an optical amplitude signal. The converted optical amplitude signal is transmitted through an optical fiber cable, i.e., a transmission line 402. The transmitted optical amplitude signal is multiplied and converted into an electric amplitude signal using a DA-APD 403 of the present disclosure. The converted electric amplitude signal is transmitted to an antenna 404 and radiated as a radio wave signal.

[0302] The radio-on-fiber system 400 according to the sixteenth embodiment can efficiently supply a signal to the antenna 404 located at a distance from the electric signal source. In addition, since no analog-to-digital or digital-to-analog conversion is performed during transmission, the system has a simple configuration and consumes little power.

[0303] <Functions and Effects of Radio on Fiber System According to Sixteenth Embodiment> In the comparative example radio-on-fiber system 450 shown in FIG. 36, if a signal is attenuated during transmission through the optical fiber cable, the signal cannot be amplified by the PD 406, and therefore a sufficient radio signal cannot be emitted from the antenna.

[0304] Furthermore, when a conventional APD is used, as shown in Figures 32A and 32B, an increase in the number of electrons and holes in the multiplication layer causes a change in the electric field distribution, resulting in saturation of the multiplication factor and making it impossible to ensure a dynamic range. This causes problems such as not only being unable to obtain a sufficient amplitude of the electrical signal, but also distorting the analog signal. As a result, it is difficult to apply a conventional APD to the radio-on-fiber system 450 in the comparative example.

[0305] On the other hand, in the PD and APD used in the radio-on-fiber system 400 according to the sixteenth embodiment, which have at least the InAlAs digital alloy structure electron transit layer of the present disclosure, the time Td for electrons and holes to pass through the depletion layer is short, and therefore Rsc is small. As a result, it is possible to obtain a response with good linearity over a wide dynamic range and a large current amplitude.

[0306] Furthermore, in the DA-APD403 having the electron transit layer and multiplication layer made of the InAlAs digital alloy structure of the present disclosure, as shown in FIG. 34, the residence time Tdm of electrons and holes in the multiplication layer is short, so that the change in the electric field distribution in the multiplication layer is suppressed. As a result, a response with excellent linearity can be obtained over a wide dynamic range. In other words, since the DA-APD403 of the present disclosure multiplies the signal, the original signal can be reproduced and a large current amplitude can be obtained.

[0307] The multiplication factor of the DA-APD 403 of the present disclosure can be within the range of 1.2 to 10. However, since a larger multiplication factor causes signal distortion, it is preferable to use a multiplication factor within the range of 1.2 to 5. In addition, considering the loss of the optical fiber and the fact that the quantum efficiency of the APD is about 80% and not 100%, it is optimal to use a multiplication factor of 2 to 3 to compensate for such loss.

[0308] <Advantages of the Sixteenth Embodiment> As described above, according to the radio-on-fiber system of the sixteenth embodiment, the radio-on-fiber system is configured using the DA-APD or DA-PD of the present disclosure, which has the effect of making it possible to output a strong radio signal even if the optical transmission distance is long.

[0309] Embodiment 17 37 is a schematic diagram illustrating a configuration of a digital coherent receiving device 500 according to the seventeenth embodiment. The digital coherent receiving device 500 according to the seventeenth embodiment is characterized in that it uses the DA-APD 505a of the present disclosure. Note that the DA-PD of the present disclosure may be used instead of the DA-APD 505a of the present disclosure.

[0310] In digital coherent communication, optical signals in which both phase and intensity are modulated are polarization-multiplexed and transmitted through optical fibers. In a digital coherent receiving device 500, an optical signal input from an optical fiber cable 501 is first polarization-separated by a polarization separator 502. After polarization separation, each polarized signal light is input to a 90-degree hybrid device 503a and a 90-degree hybrid device 503b, respectively. Meanwhile, a laser light locally emitted from a semiconductor laser 504 is separated into two signals with a phase shift of 90 degrees from each other.

[0311] The signal light and the laser light are multiplexed, and the signal light is further separated into orthogonal components (I, Q) and output. The four optical signals, i.e., four optical signals in total, orthogonal I and Q components for each polarization, are respectively incident on four balanced detectors 505 arranged in 90-degree hybrid devices 503a, 503b, in which two DA-APDs 505a of the present disclosure are connected in series as a pair. The electrical signal output from the balanced detector 505 is input to the DSP 506. The digital coherent receiving device 500 according to the seventeenth embodiment has the above configuration.

[0312] <Operation of the digital coherent receiving device according to the seventeenth embodiment> FIG. 38A is a diagram illustrating waveforms of a digital coherent receiving device that is a comparative example, and FIG. 38B is a diagram illustrating waveforms of a digital coherent receiving device according to the seventeenth embodiment.

[0313] In the conventional balanced detector, a PD was used as a semiconductor light receiving element that receives signal light. On the other hand, when the DA-APD505a of the present disclosure is used, it is possible to multiply the signal, so that it is possible to suppress the local light to a small level. In addition, when the conventional APD is used, as shown in FIG. 33, when the number of electrons and holes in the multiplication layer increases, the electric field distribution changes, so that the multiplication factor is saturated and the dynamic range cannot be secured. For this reason, there was a problem that not only was it not possible to obtain a sufficient amplitude of the electrical signal, but the analog signal was also distorted. As a result, as shown in FIG. 38A, in the comparative example, the interval between the waveform A1 and the waveform B1 became narrow, and the intensity signal of the constellation waveform was distorted, so that it was difficult to apply the APD.

[0314] On the other hand, in the PD and APD that have at least the InAlAs digital alloy structure electron transit layer of the present disclosure and are used in the digital coherent receiving device 500 according to the seventeenth embodiment, the time Td for electrons and holes to pass through the depletion layer is short, so Rsc is small. Since the influence of the resistance Rsc due to the space charge effect is small, a constellation waveform with excellent linearity can be obtained over a wide dynamic range.

[0315] Furthermore, in the DA-APD 505a having an electron transit layer and a multiplication layer made of an InAlAs digital alloy structure according to the present disclosure, the residence time Tdm of electrons and holes in the multiplication layer is short, as shown in Fig. 34, and therefore the change in the electric field distribution in the multiplication layer is suppressed. As a result, as shown in Fig. 38B, when the DA-APD 505a according to the present disclosure is used, the interval between waveform A and waveform B becomes wider, and a constellation waveform with excellent linearity over a wide dynamic range is obtained. In other words, even if the signal is multiplied by the APD, the original signal can be reproduced, and a large current amplitude can be obtained.

[0316] The gain of the DA-APD 505a of the present disclosure can be within a range of 1.2 to 10. However, since a larger gain causes signal distortion, it is preferable to use the gain within a range of 1.2 to 5.

[0317] <Advantages of the 17th embodiment> As described above, according to the digital coherent receiving device of the seventeenth embodiment, the DA-APD or DA-PD disclosed herein is applied as a semiconductor photodetector for receiving an optical signal, thereby making it possible to reduce the drive current of the local light (laser), that is, to reduce the power consumption of the digital coherent receiving device.

[0318] Embodiment 18 39 is a schematic diagram illustrating a configuration of a SPAD sensor (Single Photon Avalanche Diode) system according to embodiment 18. The SPAD sensor system 600 includes a photoelectron measurement circuit 601, a SPAD sensor 602 including a DA-APD according to the present disclosure, and a quenching circuit 603.

[0319] SPADs can be used not only to count the number of photons but also as highly sensitive light receiving elements. However, they require constant cycling from A: Quenching voltage, which will be described later, to B: Geiger mode voltage, which will be described later. The cycling period is on the order of nanoseconds to microseconds. If the cycling period between A: Quenching voltage and B: Geiger mode voltage can be shortened, it is possible to increase the response speed of the SPAD. In order to increase the response speed of the SPAD, it is necessary to reduce the pn junction capacitance, and it is effective to increase the thickness of the depletion layer by thickening the transport layer.

[0320] In a DA-APD having at least the InAlAs digital alloy structure electron transport layer of the present disclosure, the transport time is short even if the transport layer is made thick, so there is little deterioration in response speed. In other words, when the DA-APD of the present disclosure is used in a SPAD, it becomes possible to switch between A: Quenching voltage and B: Geiger mode voltage, which have a fast response speed, and it is possible to improve the response band of the SPAD sensor 602.

[0321] Furthermore, when the SPAD sensor system 600 uses the DA-APD 5 having an electron transit layer and a multiplication layer made of the InAlAs digital alloy structure of the present disclosure, photons incident on the SPAD sensor system 600 are absorbed in the light absorption layer of the SPAD sensor 602 made of the DA-APD of the present disclosure, generating pairs of electrons and holes, and the electrons flow into the multiplication layer. An electric field about 10% higher than the avalanche breakdown electric field is applied to the multiplication layer.

[0322] This state is called the Geiger mode. In the Geiger mode, the electrons are 10 6 The electrons generated flow as a current and are passed through the photoelectron measurement circuit 601. If the current generated by one photon is known in advance, it is possible to count the number of photons incident on the SPAD sensor system 600.

[0323] FIG. 40A is a diagram showing the multiplication characteristics of a SAPD sensor system according to a comparative example, and FIG. 40B is a diagram showing the multiplication characteristics of a SAPD sensor system according to the eighteenth embodiment. If an electric field equal to or greater than the avalanche breakdown electric field is continuously applied to the multiplication layer, an excess current will flow, so the voltage applied to the SPAD sensor 602 is quickly reduced after detecting a photon to weaken the electric field of the multiplication layer. This is called quenching. That is, as shown in the comparison of the multiplication characteristics of the SPAD sensor in FIG. 40A and FIG. 40B, the voltage is reduced from B: Geiger mode voltage to A: quenching voltage to stop the chain multiplication, and then the voltage is increased again from A: quenching voltage to B: Geiger mode voltage to make it possible to receive the incident photons with high sensitivity.

[0324] The quenching circuit 603 that controls the voltage can be a passive circuit or an active circuit. In a passive circuit, when a current flows due to a photon incident on the SPAD sensor 602, a voltage drop occurs in a resistor connected in series to the SPAD sensor 602, and the voltage applied to the SPAD sensor 602 decreases. In other words, the quenching circuit 603 operates to repeatedly apply to the SPAD sensor 602 a voltage equal to or greater than the breakdown voltage and a voltage less than the breakdown voltage.

[0325] <Actions and Effects of the SPAD Sensor System According to the Eighteenth Embodiment> The SPAD sensor system 600 according to the eighteenth embodiment can be used not only for counting the number of photons but also as a highly sensitive semiconductor light receiving element. However, it is necessary to constantly repeat the process from B: Geiger mode voltage to A: quenching voltage. The repetition period is on the order of nanoseconds to microseconds. If the difference between A: quenching voltage and B: Geiger mode voltage can be reduced, it is possible to shorten the repetition period and increase the response speed of the SPAD sensor system 600.

[0326] In the passive quenching circuit 603, it is possible to reduce the resistance value connected in series to the SPAD sensor 602, thereby increasing the response speed of the SPAD sensor 602. In addition, in the active quenching circuit 603, the voltage amplitude is reduced, which allows for simplification of the drive circuit and power saving, and further allows for a wider response band.

[0327] The effect of using the InAlAs digital alloy structure of the present disclosure as a multiplication layer will be described below. In the InAlAs digital alloy structure multiplication layer of the present disclosure, as shown in Figs. 7A and 9B, the dead space length is long, so multiplication does not occur at low electric fields. However, as the electric field is increased, the dead space length becomes shorter, so the multiplication factor increases rapidly and leads to breakdown. In an APD with an InAlAs random alloy multiplication layer and an APD with a digital alloy InAlAs multiplication layer having a thick multiplication layer, if the voltage at which the dark current exceeds 10 μA is set as the breakdown voltage, the multiplication factor at 90% of the breakdown voltage exceeds 10 times. On the other hand, in the InAlAs digital alloy structure multiplication layer of the present disclosure, the multiplication factor at a voltage that is 90% of the breakdown voltage is 10 times or less.

[0328] The voltage required for breakdown depends on the device structure, such as the thickness of the light absorption layer and the carrier concentration of the electric field relaxation layer, so here we verify the effect using the quantifiable electric field of the multiplication layer. Note that above the reach-through voltage (approximately 12 V), the voltage applied to the SPAD sensor 602 is proportional to the electric field of the multiplication layer.

[0329] 41 is a diagram showing the calculation of the difference between the quenching electric field and the Geiger mode electric field for each material constituting the multiplication layer. It can be seen that in the InAlAs digital alloy structure multiplication layer of the present disclosure, the difference between the quenching electric field and the Geiger mode electric field of each multiplication layer is 170 kV / cm, which is peculiarly low. The electric field is 120 kV / cm lower than that of an InAlAs digital alloy structure multiplication layer having a superlattice structure similar to the InAlAs digital alloy structure multiplication layer of the present disclosure but a layer thickness of 200 nm or more that is not thinned.

[0330] <Advantages of the 18th embodiment> As described above, according to the SPAD sensor system of embodiment 18, the DA-APD disclosed herein is used in the SPAD sensor, so that the difference between the quenching electric field and the Geiger mode electric field, i.e., the applied voltage difference, can be reduced, thereby achieving the effect of obtaining a SPAD sensor system that enables an improved response band, a simplified quenching circuit, and reduced power consumption.

[0331] Embodiment 19 Fig. 42 is a diagram illustrating a configuration of a LiDAR (Light Detection And Ranging) device according to embodiment 19. Fig. 43A is a diagram illustrating a received waveform of an APD 700 of a LiDAR device that is a comparative example, and Fig. 43B is a diagram illustrating a received waveform of an APD of the LiDAR device 700 according to embodiment 19.

[0332] A LIDAR device 700 according to the nineteenth embodiment includes a light source 701, a DA-APD 702 of the present disclosure, a TIA 703, and a distance measurement circuit 704. Note that a DA-PD of the present disclosure may be used instead of the DA-APD 702 of the present disclosure. The light source 701 emits pulsed light (hereinafter referred to as pulsed light) or frequency-modulated light.

[0333] In the LIDAR device 700 according to the nineteenth embodiment, the distance to the object 705 is calculated by measuring the time it takes for the pulsed light emitted from the light source to hit the object 705 and return to the semiconductor light receiving element. An LD or the like is used as the light source 701. To measure long distances, the amount of light from the LD needs to be increased, but an upper limit is set for the amount of light emitted from the LD for eye safety reasons. For this reason, it is necessary to increase the sensitivity of the semiconductor light receiving element. Therefore, in the LIDAR device 700 according to the nineteenth embodiment, the DA-APD 702 disclosed herein is used with high amplification as the semiconductor light receiving element.

[0334] The detected light pulse is multiplied by the DA-APD 702 of the present disclosure and converted into a current pulse. It is then amplified by the TIA 703 and input to the distance measurement circuit 704, and the time when the intensity of the pulse signal exceeds a preset discrimination line is determined as the arrival time, as shown in Figures 43A and 43B. The timing of the emission of the light pulse from the light source 701 is input as a signal to the distance measurement circuit 704, and the distance to the object 705 can be calculated by multiplying the time difference between the two by the speed of light and dividing the result by 2. A method is also used in which frequency-modulated light is emitted and the distance is calculated from the frequency difference between the emitted wave and the reflected wave.

[0335] <Functions and Effects of the LIDAR Device According to the Nineteenth Embodiment> Since the reflectance of the object 705 is not necessarily high and the reflection direction varies, it is necessary to detect weak light with an APD. In a conventional APD, as shown in FIG. 43A, when the voltage is set to achieve high multiplication, the multiplication time becomes long and the current pulse width output from the APD becomes wide. In addition, the tunnel current increases, making it difficult to distinguish the optical pulse. Even in a method of calculating the distance from the frequency difference between the emitted wave and the reflected wave, it becomes difficult to distinguish the frequency.

[0336] On the other hand, in the PD and APD used in the LIDAR device 700 according to the nineteenth embodiment, which have at least the InAlAs digital alloy structure electron transit layer of the present disclosure, the time Td for electrons and holes to pass through the depletion layer is short, and thus the deterioration of the response speed is small. Therefore, a highly sensitive receiver can be realized by reducing the pn junction capacitance of the APD and increasing the feedback resistance of the TIA 703. As a result, not only can it measure the distance to a distant object 705, but it can also reduce the optical output of the light source 701, thereby saving power and improving safety for the eyes.

[0337] Furthermore, in the DA-APD 505a having the electron transit layer and multiplication layer made of the InAlAs digital alloy structure of the present disclosure, even at a high multiplication rate of 20 times or more, as described in the explanation of the operation of the first embodiment, the tunnel current does not increase, so that it is possible to easily identify weak light. Also, as shown in FIG. 34, since the residence time in the multiplication layer is short, as shown in FIG. 43B, a current pulse with a large peak intensity is obtained, so that the identification sensitivity is high. As a result, not only is it possible to measure the distance to a distant object, but the light output of the light source can be reduced, so that power consumption is reduced, and further, safety to the eyes is improved.

[0338] <Advantages of the 19th embodiment> As described above, according to the LIDAR device of embodiment 19, the reflected light from an object is received by the DA-APD or DA-PD of the present disclosure, which makes it possible to measure the distance to a distant object, reduces the power consumption of the light source, and provides a LIDAR device that is also safer for the eyes.

[0339] Although the present disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to application to a particular embodiment, but may be applied to the embodiments alone or in various combinations.

[0340] Therefore, countless modifications not illustrated are assumed within the scope of the technology of the present disclosure, including, for example, modifying, adding, or omitting at least one component, and further, extracting at least one component and combining it with a component of another embodiment. [Explanation of symbols]

[0341] 1 n-type InP substrate, 1a Fe-doped semi-insulating InP substrate, 2 n-type InP buffer layer, 2a n-type InAlAs buffer layer, 2b n-type InP conductive layer, 3, 47 i-type InAlAs digital alloy structure electron transport layer, 4 i-type InAlGaAs graded layer, 5, 43 i-type InGaAs light absorption layer, 6 i-type InAlGaAs / InAlAs graded layer, 7 p-type InP window layer, 8 p-type InGaAs contact layer, 11 n-type InP window layer, 13, 45 i-type InAlAs multiplication layer, 15 p-type diffusion region, 17 isolation groove, 18 surface protection film, 20 Fe-doped semi-insulating InP buried layer, 25 p-type InAlAs conductive layer, 31, 31a, 31b, 51 n-type electrode, 32, 52 p-type electrode, 33 opening, 35 anti-reflective coating film, 40 p-type InAlGaAs contact layer, 41 p-type InP conductive layer, 42 i-type InAlGaAs / InAlAs graded layer, 14, 44 p-type InP field relaxation layer, 46 n-type InAlAs field adjustment layer, 48 n-type InAlAs field adjustment layer, 49 n-type InAlAs conductive layer, 50 n-type InGaAs contact layer, 53 metal film, 90 incident light, 100, 100a, 110, 110a, 120, 120a, 130, 130a, 140, 140a, 150, 150a, 160, 160a, 170, 170a, 180, 190, 200 semiconductor light receiving element, 250a, 260, 260a, 260b, 270 optical line termination device, 251, 261, 274 FEC, 252, 262, 273, 303 Driver amplifier, 253, 263, 272, 304, 401, 701 Light source, 254, 264, 271 WDM, 255, 265a, 301, 506 DSP, 256, 266a, 302b ADC, 258 APD, 257, 267 Burst TIA, 265, 278 CDR, 266, 277 Limiting amplifier, 267a, 276, 703 TIA, 268, 275, 305, 403, 505a, 702 DA-APD, 300 Multilevel intensity modulation transmitter / receiver, 302a DAC, 310, 501 Optical fiber cable, 306 Linear-TIA, 400, 450 Radio-on-fiber system, 402 Transmission line, 404 Antenna, 406 PD, 500 Digital coherent receiver, 501 Optical fiber cable, 502 Polarization separator, 503a, 503b90 degree hybrid device, 504, semiconductor laser, 505, balanced detector, 600, SPAD sensor system, 601, photoelectron measurement circuit, 602, SPAD sensor, 603, quenching circuit, 700, lidar device, 704, ranging circuit, 705, object

Claims

1. an InP substrate; an n-type semiconductor layer formed on the InP substrate; an i-type electron transit layer having a digital alloy structure formed on the n-type semiconductor layer; an n-type electric field buffer layer formed on the i-type electron transit layer; an i-type multiplication layer formed on the n-type electric field buffer layer; a p-type electric field buffer layer formed on the i-type multiplication layer; a light absorbing layer formed on the p-type electric field buffer layer; A semiconductor light receiving element comprising:

2. The semiconductor photodetector according to claim 1, characterized in that the digital alloy structure is formed by alternately stacking two types of semiconductor layers, each made of a different semiconductor material, at a period of 2 to 6 atomic layers.

3. 3. The semiconductor light-receiving element according to claim 2, wherein the two types of semiconductor layers are a combination of an InAs layer and an AlAs layer, an InAlAs layer and an InGaAs layer, or InGaAlAs layers having different composition ratios.

4. 2. The semiconductor light-receiving element according to claim 1, wherein the i-type multiplication layer has a digital alloy structure and a thickness of the i-type multiplication layer is 60 nm or more and 130 nm or less.

5. 5. The semiconductor photodetector according to claim 1, wherein the n-type semiconductor layer is an n-type conductive layer, and an n-type electrode is provided on a partially exposed portion of the n-type conductive layer formed on the InP substrate.

6. 5. The semiconductor light-receiving element according to claim 1, wherein an i-type or n-type window layer is formed on the light absorption layer, a p-type impurity diffusion region is formed at least inside the window layer, and a p-type electrode is provided on top of the p-type impurity diffusion region.

7. 7. The semiconductor light-receiving element according to claim 6, wherein an isolation trench is provided on the outer periphery of the p-type impurity diffusion region, the isolation trench reaching the n-type semiconductor layer.

8. 7. The semiconductor light-receiving element according to claim 6, wherein a light incidence area is provided on the back surface of said InP substrate opposite to said p-type electrode.

9. an InP substrate; a p-type semiconductor layer formed on the InP substrate; a light absorbing layer formed on the p-type semiconductor layer; a p-type electric field buffer layer formed on the light absorption layer; an i-type multiplication layer formed on the p-type electric field buffer layer; an n-type electric field buffer layer formed on the i-type multiplication layer; an i-type electron transit layer having a digital alloy structure formed on the n-type electric field buffer layer; A semiconductor light receiving element comprising:

10. The semiconductor photodetector according to claim 9, characterized in that the digital alloy structure is formed by alternately stacking two types of semiconductor layers, each made of a different semiconductor material, at a period of 2 to 6 atomic layers.

11. 11. The semiconductor light-receiving element according to claim 10, wherein the two types of semiconductor layers are a combination of an InAs layer and an AlAs layer, an InAlAs layer and an InGaAs layer, or InGaAlAs layers having different composition ratios.

12. 10. The semiconductor light-receiving element according to claim 9, wherein the i-type multiplication layer has a digital alloy structure and a thickness of the i-type multiplication layer is 60 nm or more and 130 nm or less.

13. The semiconductor light-receiving element according to any one of claims 1 to 4 and 9 to 12; an optical multiplexer / demultiplexer that inputs an optical signal to the semiconductor light-receiving element; an amplifier circuit that amplifies the electrical signal output from the semiconductor light-receiving element; a clock data recovery circuit connected to the amplifier circuit and recovering clock data from the amplified electrical signal; a forward error correction circuit connected to the clock data recovery circuit for correcting an error in the clock data; An optical line terminal comprising:

14. The semiconductor light-receiving element according to any one of claims 1 to 4 and 9 to 12; an optical multiplexer / demultiplexer that inputs an optical signal to the semiconductor light-receiving element; an amplifier circuit that amplifies the electrical signal output from the semiconductor light-receiving element; an analog-to-digital conversion circuit connected to the amplifier circuit and converting the amplified electrical signal into a digital signal; a digital signal processing circuit connected to the analog-to-digital conversion circuit and processing the digital signal; a forward error correction circuit connected to the digital signal processing circuit for correcting errors in the digital signal; An optical line terminal comprising:

15. a semiconductor light-receiving element according to any one of claims 1 to 4 and 9 to 12, which receives a multilevel intensity-modulated optical signal; an amplifier circuit that amplifies the electrical signal output from the semiconductor light-receiving element; an analog-to-digital conversion circuit connected to the amplifier circuit and converting the amplified electrical signal into a digital signal; a digital signal processing circuit connected to the analog-to-digital conversion circuit and processing the digital signal; A multilevel intensity modulation transmitting and receiving device comprising:

16. a light source that emits an analog modulated optical signal; a semiconductor light-receiving element according to any one of claims 1 to 4 and 9 to 12, which receives the analog-modulated optical signal; a transmission path for transmitting the analog electrical signal output from the semiconductor light receiving element to an antenna; an antenna connected to the transmission line and configured to emit the analog electrical signal as a radio wave signal; A radio-on-fiber system comprising:

17. The semiconductor light-receiving element according to any one of claims 1 to 4 and 9 to 12; a polarization separator that separates the polarizations of the intensity- and phase-modulated polarization multiplexed optical signal; a 90-degree hybrid that splits and combines the optical signals output from the polarization splitter; a digital signal processing circuit connected to the 90-degree hybrid device and processing a digital signal; A digital coherent receiving device comprising:

18. a SPAD sensor configured by the semiconductor light receiving element according to any one of claims 1 to 4 and 9 to 12; a quenching circuit that repeatedly applies a voltage equal to or greater than a breakdown voltage and a voltage less than the breakdown voltage to the SPAD sensor; an optoelectronic measurement circuit that measures the electrical signal output from the SPAD sensor; A SPAD sensor system comprising:

19. a light source that emits pulsed or frequency-modulated light; a semiconductor light-receiving element according to any one of claims 1 to 4 and 9 to 12, which receives light emitted from the light source and reflected by an object; an amplifier circuit that amplifies the electrical signal output from the semiconductor light-receiving element; a distance measuring circuit that calculates a distance based on the electrical signal amplified by the amplifier circuit; A lidar device comprising:

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