Power supply system, plasma processing device, and control method

Abstract

A power supply system of a plasma processing device disclosed herein comprises a high-frequency power supply, a bias power supply, and a power supply control unit. The high-frequency power supply generates high-frequency power for plasma generation. The bias power supply supplies an electrical bias to a substrate support part. The power supply control unit determines a frequency of high-frequency power for each of a plurality of designated phase periods among a plurality of phase periods within a waveform period of the electrical bias so as to suppress reflection of the high-frequency power. The power supply control unit determines the frequency of the high-frequency power for each phase period other than the plurality of designated phase periods among the plurality of phase periods by interpolation using the frequency of the high-frequency power of each of the plurality of designated phase periods.

Description

Power supply system, plasma processing apparatus, and control method

[0001] SUMMARY Exemplary embodiments of the present disclosure relate to a power supply system, a plasma processing apparatus, and a control method.

[0002] A plasma processing apparatus is used in plasma processing of a substrate. In the plasma processing apparatus, bias high frequency power is used to attract ions from a plasma generated in a chamber to the substrate. Patent Document 1 listed below discloses a plasma processing apparatus in which the power level and frequency of the bias high frequency power are modulated.

[0003] Japanese Patent Application Laid-Open No. 2009-246091

[0004] The present disclosure provides a technique for suppressing the reflection of high frequency power while suppressing fluctuations in the frequency of the high frequency power.

[0005] In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support, and a power supply system. The substrate support is disposed within the chamber. The power supply system includes a radio frequency power supply, a bias power supply, and a power supply controller. The radio frequency power supply is configured to supply radio frequency power to generate plasma within the chamber. The bias power supply is configured to supply an electrical bias to the substrate support repeatedly at time intervals of a waveform period to attract ions from the plasma to a substrate on the substrate support. The waveform period includes a plurality of phase periods, and the plurality of phase periods includes a plurality of designated phase periods that is less than the number of the plurality of phase periods. The power supply controller determines the frequency of the radio frequency power for each of the plurality of designated phase periods by adjusting the frequency of the radio frequency power for an m-th designated phase period among the plurality of designated phase periods in an i-th waveform period in a series of waveform periods based on changes in the frequency of the radio frequency power for the m-th designated phase periods up to the i-th waveform period in the series and changes in the degree of reflection of the radio frequency power, so as to suppress reflection of the radio frequency power. The power supply control unit determines the frequency of the high frequency power for each of the phase periods other than the plurality of designated phase periods among the plurality of phase periods in the i-th waveform cycle by interpolation using the frequency of the high frequency power for each of the plurality of designated phase periods.

[0006] According to one exemplary embodiment, it is possible to suppress the reflection of high frequency power while suppressing fluctuations in the frequency of the high frequency power.

[0007] 10 is a diagram illustrating an example of the configuration of a plasma processing system; FIG. 11 is a diagram illustrating an example of the configuration of a capacitively coupled plasma processing apparatus; FIG. 12 is a diagram illustrating an example of the waveform of an electric bias; FIG. 4A and FIG. 4B are timing charts illustrating an example of source high frequency power and an electric bias in a plasma processing apparatus according to an exemplary embodiment; FIG. 5A is a flowchart of a control method according to an exemplary embodiment, and FIG. 5B is a flowchart of process STa shown in FIG. 5A; FIG. 5B is a timing chart related to a power supply system according to an exemplary embodiment; FIG. 13 is a flowchart illustrating an example of a process in process STc shown in FIG. 5B; FIG. 14 is a flowchart illustrating an example of a process in process ST9 shown in FIG. 8; FIG. 15 is a flowchart illustrating another example of a process in process STc shown in FIG. 5B; FIG. 16 is a flowchart illustrating an example of a process in process ST9a shown in FIG. 10; FIG. 17 is a timing chart illustrating an example of a source high frequency power and an electric bias in a plasma processing apparatus according to an exemplary embodiment.

[0008] Various exemplary embodiments will be described in detail below with reference to the drawings, in which the same or equivalent parts are designated by the same reference numerals.

[0009] FIG. 1 is a diagram illustrating an exemplary configuration of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 (described later), and the gas exhaust port is connected to an exhaust system 40 (described later). The substrate support 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate.

[0010] The plasma generating unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), or surface wave plasma (SWP).

[0011] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various processes described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is realized, for example, by a computer 2a. The processing unit 2a1 may be configured to read a program from the storage unit 2a2 and execute the read program to perform various control operations. This program may be stored in the storage unit 2a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 by the processing unit 2a1 for execution. The medium may be various storage media readable by the computer 2a, or may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a programmable logic device such as a CPU (Central Processing Unit) or an FPGA (Field-Programmable Gate Array). The storage unit 2a2 may include a RAM (Random Access Memory), a ROM (Read Only Memory), a HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

[0012] The following describes a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1. Fig. 2 is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0013] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply system 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one process gas into the plasma processing chamber 10. The gas inlet includes a showerhead 13. The substrate support 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The substrate support 11 is electrically insulated from the housing of the plasma processing chamber 10.

[0014] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.

[0015] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that the annular region 111b may also be provided by another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member.

[0016] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0017] The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow passage 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow passage 1110a. In one embodiment, the flow passage 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas to a gap between the backside of the substrate W and the central region 111a.

[0018] The showerhead 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

[0019] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.

[0020] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0021] The power supply system 30 includes a high frequency power supply 31 and a bias power supply 32. The high frequency power supply 31 constitutes the plasma generating unit 12 of one embodiment. The high frequency power supply 31 is configured to generate source high frequency power. In the following description, the high frequency power generated by the high frequency power supply 31 is referred to as source high frequency power HF. The source high frequency power HF has a frequency. In the following description, the frequency of the source high frequency power HF is referred to as source frequency. The source high frequency power HF has a sinusoidal waveform whose frequency is the source frequency. The source frequency may be a frequency within a range of 10 MHz to 150 MHz.

[0022] The high frequency power supply 31 is electrically connected to the high frequency electrode via a matching box 33 and is configured to supply source high frequency power HF to the high frequency electrode. The high frequency electrode may be provided within the substrate support 11. The high frequency electrode may be at least one electrode provided within the conductive member or ceramic member 1111a of the base 1110. Alternatively, the high frequency electrode may be an upper electrode. When the source high frequency power HF is supplied to the high frequency electrode, plasma is generated from the gas within the chamber 10.

[0023] The matching circuit 33 has a variable impedance. The variable impedance of the matching circuit 33 is set to reduce reflection of the source high frequency power HF from the load. The matching circuit 33 can be controlled by, for example, the control unit 2.

[0024] In one embodiment, the high frequency power supply 31 may include a signal generator 31g, a D / A converter 31c, and an amplifier 31a. The signal generator 31g generates a high frequency signal having a source frequency f. The signal generator 31g may be configured with a programmable logic device such as a programmable processor or a field-programmable gate array (FPGA).

[0025] The output of the signal generator 31g is connected to the input of the D / A converter 31c. The D / A converter 31c converts the high frequency signal from the signal generator 31g into an analog signal. The output of the D / A converter 31c is connected to the input of the amplifier 31a. The amplifier 31a amplifies the analog signal from the D / A converter 31c to generate the source high frequency power HF. The gain of the amplifier 31a is specified to the high frequency power supply 31 by the control unit 2. Note that the high frequency power supply 31 does not need to include the D / A converter 31c. In this case, the output of the signal generator 31g is connected to the input of the amplifier 31a, and the amplifier 31a amplifies the high frequency signal from the signal generator 31g to generate the source high frequency power HF.

[0026] The bias power supply 32 is electrically coupled to the substrate support 11. The bias power supply 32 is electrically connected to a bias electrode in the substrate support 11 and is configured to supply an electric bias EB to the bias electrode. The bias electrode may be at least one electrode provided in the conductive member or ceramic member 1111 a of the base 1110. The bias electrode may be common to the radio frequency electrode. When the electric bias EB is supplied to the bias electrode, ions from the plasma are attracted to the substrate W.

[0027] Reference will now be made to FIG. 3 in addition to FIG. 2. FIG. 3 is a diagram showing an example of the waveform of the electric bias. The bias power supply 32 is configured to periodically apply an electric bias EB having a waveform period CY to the bias electrode. That is, the electric bias EB is applied to the bias electrode in each of a plurality of waveform periods CY, which are repetitions of the waveform period CY. The waveform period CY is defined by the bias frequency. The bias frequency is, for example, not less than 50 kHz and not more than 27 MHz. The time length of the waveform period CY is the reciprocal of the bias frequency.

[0028] The electric bias EB may be a bias high frequency power LF having a bias frequency. That is, the electric bias EB may have a sinusoidal waveform whose frequency is the bias frequency. In this case, the bias power supply 32 is electrically connected to the bias electrode via a matching box 34. The variable impedance of the matching box 34 is set to reduce reflection of the bias high frequency power LF from the load.

[0029] Alternatively, the electric bias EB may include a voltage pulse VP. The voltage pulse VP is applied to the bias electrode within a waveform period CY. The voltage pulse VP is applied to the bias electrode periodically at time intervals equal to the time length of the waveform period CY. The waveform of the voltage pulse VP may be a square wave, a triangular wave, or any other waveform. The polarity of the voltage pulse VP is set so as to generate a potential difference between the substrate W and the plasma, thereby attracting ions from the plasma to the substrate W. The voltage pulse VP is applied to the bias electrode so that the waveform period CY includes a period during which the potential of the substrate W is negative. The voltage pulse VP applied to the bias electrode may have a negative potential, a positive potential, or a potential that changes between a positive potential and a negative potential. The voltage pulse VP may be a negative voltage pulse or a negative DC voltage pulse. Note that when the electric bias EB is a voltage pulse VP, the plasma processing apparatus 1 does not need to include a matching unit 34.

[0030] As shown in FIG. 2 , the plasma processing apparatus 1 may further include a sensor 35 and / or a sensor 36. The sensor 35 is configured to measure the power level Pr of the source high frequency power HF reflected from the load. The sensor 35 includes, for example, a directional coupler. The directional coupler may be provided between the high frequency power supply 31 and the matching device 33. The sensor 35 may further measure the power level Pf of the forward wave of the source high frequency power HF. The power level Pr of the reflected wave measured by the sensor 35 is notified to the high frequency power supply 31. In addition, the power level Pf of the forward wave may be notified from the sensor 35 to the high frequency power supply 31. The sensor 35 may notify the high frequency power supply 31 of the reflectivity, i.e., Pr / Pf. The reflectivity may be determined from the power levels Pf and Pr in the high frequency power supply 31. Note that a detection circuit 35b may be connected between the sensor 35 and the high frequency power supply 31, and the power levels Pf and Pr may be determined from the output of the detection circuit 35b.

[0031] The sensor 36 includes a voltage sensor and a current sensor. The sensor 36 detects a voltage V in a power supply line connecting the high frequency power supply 31 and the high frequency electrode. Ｓ and current I Ｓ The source high frequency power HF is supplied to the high frequency electrode via this power supply line. The sensor 36 may be provided between the high frequency power supply 31 and the matching box 33. The voltage V Ｓ and current I Ｓ is notified to the high frequency power supply 31. The sensor 36 detects the voltage V Ｓ and current I Ｓ The impedance Z of the load of the high frequency power supply 31 determined from Ｌ The high frequency power supply 31 may be notified of the impedance Z Ｌ is the voltage V Ｓ and current I Ｓ The sensor 36 may be determined from the voltage V Ｓ and current I Ｓ The phase difference θ between the voltage V Ｓ and current I ＳThe sensor 36 may be determined from the voltage V Ｓ and current I Ｓ The reflection coefficient Γ determined from the voltage V Ｓ and current I Ｓ It may be identified from

[0032] The power supply system 30 may further include a DC power supply 38. The DC power supply 38 is configured to apply a DC voltage DCS to the upper electrode. The DC power supply 38 may apply a negative DC voltage to the upper electrode. The DC power supply 38 may be a variable DC power supply.

[0033] 2 and 3, and also FIGS. 4(a) and 4(b). Each of FIGS. 4(a) and 4(b) is a timing chart showing an example of the source RF power and the electric bias in a plasma processing apparatus according to an exemplary embodiment. In these figures, "ON" for the source RF power HF indicates that the source RF power HF is being supplied, and "OFF" for the source RF power HF indicates that the supply of the source RF power HF is stopped. Also, in FIG. 4(b), "HIGH" for the source RF power HF indicates that a source RF power HF having a power level higher than the power level indicated by "LOW" is being supplied. Also, in these figures, "ON" for the electric bias EB indicates that the electric bias EB is being supplied, and "OFF" for the electric bias EB indicates that the supply of the electric bias EB is stopped. In (b) of Figure 4, "HIGH" of the electric bias EB indicates that an electric bias EB having a level higher than the level indicated by "LOW" is being supplied. When the electric bias EB is the bias high frequency power LF, the level of the electric bias EB is the power level of the bias high frequency power LF. When the electric bias EB includes a voltage pulse VP, the electric bias EB has a higher level as the energy of the ions attracted to the substrate W becomes higher. When the electric bias EB includes a voltage pulse VP, the level of the electric bias EB may be the absolute value of the voltage level of the voltage pulse VP in the negative direction relative to a reference voltage (e.g., 0 V).

[0034] The high frequency power supply 31 is configured to supply source high frequency power HF in parallel with the periodic supply of electric bias EB from the bias power supply 32. That is, as shown in Fig. 4A, the electric bias EB and the source high frequency power HF may be supplied simultaneously and continuously from the start to the end of the process.

[0035] Alternatively, as shown in FIG. 4B, the pulse of the electric bias EB and the pulse of the source high frequency power HF may be supplied synchronously with each other. That is, the pulse period PP １ , PP ２ , PP３ , ... (i.e., multiple pulse periods PP), a pulse of the electric bias EB and a pulse of the source high frequency power HF may be supplied simultaneously. Each of the multiple pulse periods PP includes multiple waveform periods CY. That is, in each of the multiple pulse periods PP, the electric bias EB is supplied periodically. The pulse of the electric bias EB may be an ON / OFF pulse that alternates between a supply state (ON state in FIG. 4B) and a stop state (OFF state in FIG. 4B). Alternatively, the pulse of the electric bias EB may be a HIGH / LOW pulse that alternates between a high level state (HIGH state in FIG. 4B) and a low level state (LOW state in FIG. 4B). Furthermore, the pulse of the source high frequency power HF may be an ON / OFF pulse that alternates between a supply state (ON state in FIG. 4B) and a stop state (OFF state in FIG. 4B). Alternatively, the pulse of the source high frequency power HF may be a HIGH / LOW pulse that alternates between a high level state (HIGH state in FIG. 4(b)) and a low level state (LOW state in FIG. 4(b)). The power level of the source high frequency power HF may be modulated during a period when the source high frequency power HF is ON. The power level of the source high frequency power HF may be modulated during a period when the power level of the source high frequency power HF is HIGH. The power level of the source high frequency power HF may be modulated during a period when the power level of the source high frequency power HF is LOW.

[0036] The high frequency power supply 31 is configured to adjust the source frequency of the source high frequency power HF for each of a plurality of phase periods PH in each waveform period CY in order to suppress reflection of the source high frequency power HF from the load. The plurality of phase periods PH are a plurality of periods that divide the waveform period CY. As shown in FIG. 3 , each waveform period CY is divided into a plurality of phase periods PH. １ ~PH Ｎ "N" is the number of phase periods in each waveform period CY.

[0037] The source frequency of the high frequency power supply 31 may be adjusted by adjusting the frequency of the high frequency signal by the signal generator 31g. The source frequency is determined by a power supply control unit. The power supply control unit may be provided inside the high frequency power supply 31 or may be provided outside the high frequency power supply 31. The signal generator 31g may function as the power supply control unit, or another device within the high frequency power supply 31 may function as the power supply control unit. Alternatively, the control unit 2 may function as the power supply control unit.

[0038] A source frequency control method will be described below with reference to Figures 5(a), 5(b), 6, and 7. Also, a process related to the determination of the source frequency by the power supply control unit will be described. Figure 5(a) is a flowchart of a control method according to an exemplary embodiment, and Figure 5(b) is a flowchart of step STa shown in Figure 5(a). Each of Figures 6 and 7 is a timing chart related to a power supply system according to an exemplary embodiment.

[0039] The control method shown in FIG. 5A (hereinafter referred to as "method MT") includes steps STa and STb. In step STa, a source high frequency power HF is supplied from the high frequency power supply 31 to the high frequency electrode to generate plasma from the gas in the chamber 10. In step STb, an electric bias EB is repeatedly supplied to the substrate support 11 at a time interval of a waveform period CY to attract ions from the plasma to the substrate W on the substrate support 11. In steps STa and STb, the source high frequency power HF and the electric bias EB may be supplied simultaneously and continuously, as shown in FIG. 4A. Alternatively, as shown in FIG. 4B, pulses of the source high frequency power HF and the electric bias EB may be supplied in synchronized fashion.

[0040] As shown in FIG. 5B, process STa includes process STc and process STd. In process STc and process STd, the power supply control unit determines the source frequency f of the source high frequency power HF supplied during multiple phase periods PH within the waveform period CY. As shown in FIG. 6, the multiple phase periods PH within the waveform period CY include multiple designated phase periods DP. The number of designated phase periods DP within the waveform period CY is M. M is less than N, which is the number of phase periods PH within the waveform period CY. Note that, although the number M of the designated phase periods DP within the waveform period CY is 11 in the example of FIG. 6, the number M is not limited to 11.

[0041] In step STc, the power supply control unit determines the source frequency f for the multiple designated phase periods DP within the waveform period CY by performing feedback processing on the series CYS of the waveform period CY. The feedback processing will be described later. In step STd, the power supply control unit determines the source frequency f for each of the multiple phase periods PH within the waveform period CY other than the multiple designated phase periods DP by interpolation using the source frequencies f for the multiple designated phase periods DP. The interpolation may be linear interpolation using the source frequencies f for each of two adjacent designated phase periods DP. The interpolation may also be interpolation using other methods.

[0042] The intervals between multiple designated phase periods DP within the waveform period CY may be set to be smaller in sections within the waveform period CY where the change in the potential of the substrate W is large than in sections within the waveform period CY where the change in the potential of the substrate W is small.

[0043] The phases of the plurality of designated phase periods DP in the waveform period CY may be predetermined. As shown in FIG. 7, when the electric bias EB includes a voltage pulse VP, the waveform period CY has a first period P １ , the second period P ２ , the third period P ３ The voltage pulse VP may include a first period P １ The power supply is in an OFF state during the second period P ２ is the first period P １ The voltage pulse VP continues for a second period P２ The third period P ３ is the second period P ２ The voltage pulse VP continues for a third period P ３ It is in the OFF state.

[0044] In one embodiment, the plurality of designated phase periods DP are ２ The interval between the first period P of the plurality of designated phase periods DP １ and the third period P ３ In this case, the interval between the first and second periods P ２ In this case, the source frequency f can be adjusted to more effectively suppress reflections of the source high frequency power HF.

[0045] In one embodiment, the third period P of the plurality of designated phase periods DP ３ The interval in the first period P of the plurality of designated phase periods DP １ , and the first period P of the plurality of designated phase periods DP １ The interval between the third period P of the plurality of designated phase periods DP may be smaller than the interval between the third period P ３ The interval in the first period P of the designated phase periods DP １ If the interval between the voltage pulses VP and VP is smaller than the interval between the voltage pulses VP and VP, the source frequency f can be adjusted to more effectively suppress the reflection of the source high frequency power HF immediately after the voltage pulses VP are switched from the ON state to the OFF state.

[0046] In one embodiment, the second period P ２ is the first sub-period SP １ , second sub-period SP ２ , and the third sub-period SP ３ The first sub-period SP １ is the first period P １ The first sub-period SP is the period immediately following the first sub-period SP. １ During the second sub-period SP, the voltage level of the voltage pulse VP changes in the negative direction from its reference voltage level (e.g., 0 V) ​​to a set voltage level. ２is the first sub-period SP １ The second sub-period SP ２ In the third sub-period SP, the voltage level of the voltage pulse VP is the set voltage level. ３ is the second sub-period SP ２ The third sub-period SP ３ During the first sub-period SP, the voltage level of the voltage pulse VP changes from its set voltage level to the reference voltage level. １ , second sub-period SP ２ , and the third sub-period SP ３ The intervals between the multiple designated phase periods DP in each may be the same or may be different from each other.

[0047] In one embodiment, a plurality of designated phase periods DP may be predetermined from a source frequency f for each of a plurality of phase periods PH in a waveform period CY, which is obtained by performing a feedback process, described below, for each phase period PH in the series CYS of waveform periods CY. Specifically, ｎ The source frequency f[n] and the (n-u)th phase period PH within the waveform period CY ｎ－ｕ The absolute value of the difference between the source frequency f[n-u] and the source frequency f[n] and the (n+u)th phase period PH within the waveform period CY ｎ＋ｕ When the absolute values ​​of the differences between the source frequency f[n+u] and the source frequency f[n-u] are greater than a predetermined value, and both the source frequency f[n-u] and the source frequency f[n+u] are greater than or smaller than the source frequency f[n], the phase period PH ｎ A plurality of designated phase periods DP may be pre-selected from the plurality of phase periods PH so as to exclude

[0048] Alternatively, the multiple designated phase periods DP may be determined by calculation by the power supply control unit. In one embodiment, the power supply control unit acquires, during the preparation period, a series of source frequencies f for the multiple phase periods PH in the waveform period CY obtained by performing a feedback process, described below, for each phase period PH in the series CYS of the waveform period CY. The power supply control unit determines the multiple designated phase periods DP such that the intervals between the multiple designated phase periods DP become smaller in sections where the source frequency f changes more significantly in the series of source frequencies f obtained by smoothing the series of source frequencies f.

[0049] In one embodiment, the power supply control unit may acquire a voltage waveform of the electric bias EB. In this embodiment, the power supply control unit may acquire the voltage waveform of the electric bias EB during the first period P １ , the second period P ２ , and the third period P ３ and the first period P １ , the second period P ２ , and the third period P ３ The intervals between the multiple designated phase periods DP in each of the designated phase periods DP may be set as described above.

[0050] Hereinafter, a feedback process for determining the source frequency f for each of the plurality of designated phase periods DP in the step STc will be described. ｉ mth designated phase period DP ｍ The source frequency f[i,m] for the mth designated phase period DP in the preceding several waveform periods CY in the sequence CYS is ｍ The waveform period CY is determined so as to suppress the degree of reflection based on the change in the source frequency and the degree of reflection of the source high frequency power. ｉ The preceding waveform period CY in the series CYS is the waveform period CY ｉ－Ｉｆｂ and C.Y. ｉ－２×Ｉｆｂ Here, "Ifb" is an integer of 1 or greater.

[0051] The feedback process includes a first feedback process and / or a second feedback process. The first feedback process is applied when the source high frequency power HF and the electrical bias EB are supplied simultaneously and continuously, as shown in FIG. 4A. In the first feedback process, the series CYS is composed of a plurality of waveform periods CY that are continuously repeated.

[0052] The second feedback process is applied when a pulse of the source high frequency power HF and a pulse of the electrical bias EB are supplied in synchronization with each other, as shown in FIG. 4B. In the second feedback process, the sequence CYS is a sequence of waveform periods CY in the same order in each of the plurality of pulse periods PP, i.e., the kth waveform period CY in each of the plurality of pulse periods PP. ｋ In the example shown in FIG. 4B, the second feedback process may be applied to all waveform periods CY of each of the plurality of pulse periods PP. Alternatively, the second feedback process may be applied to the first to K waveform periods CY of each of the plurality of pulse periods PP. １ For each of the first to second waveform periods CY, a second feedback process may be applied, and the (K １ The first feedback process may be applied to the K+1)th to last waveform periods CY. １ is an integer equal to or greater than 1. Alternatively, the first to Kth pulses of each of the plurality of pulse periods PP １ For each of the first to second waveform periods CY, a second feedback process may be applied, and the (K １ +1) to the last waveform period CY, １ The source frequency for each designated phase period of the th waveform period CY may be used in the same designated phase period.

[0053] An example of the feedback processing in the process STc will be described below with reference to Figures 8 and 9. Figure 8 is a flowchart showing an example of the processing in the process STc shown in Figure 5(b). Figure 9 is a flowchart showing an example of the processing in the process ST9 shown in Figure 8. The example of the feedback processing described below is an example in which the above-mentioned "Ifb" is 1. However, as described above, "Ifb" may be an integer greater than 1.

[0054] 8, the process STa may include processes ST1 to ST9. The processes ST1 to ST9 are performed in a plurality of designated phase periods DP in each waveform period CY in the series CYS, i.e., the designated phase periods DP １ ~DP Ｍ This is performed for each of the following.

[0055] In step ST1, the power supply control unit sets i to 1. "i" represents the order of the waveform period CY in the series CYS. In the subsequent step ST2, the power supply control unit sets a source frequency f[i,m] and a shift value Δf[i,m]. In step ST2, the source frequency f[i,m] and the shift value Δf[i,m], i.e., the source frequency f[1,m] and the shift value Δf[1,m], are set to respective values ​​that are set in advance.

[0056] In the subsequent step ST3, the power supply control unit ｉ mth designated phase period DP ｍ , a source high frequency power HF having a source frequency f[i, m] is supplied from a high frequency power supply 31.

[0057] In the subsequent step ST4, the power supply control unit ｉ The designated phase period DP ｍ The degree of reflection of the source high frequency power HF at ｄ In step ST4, it is determined whether [i, m] is large enough to satisfy the frequency change condition. ｉ The designated phase period DP ｍ The degree of reflection of the source high frequency power HF at ｄIn step ST4, the frequency change condition is satisfied when [i, m] is greater than the threshold value. ｄ [i, m] is the first threshold P ｔｈ１ [m]. Note that the first threshold P ｔｈ１ may be the same as or different from each other.

[0058] If it is determined in step ST4 that the frequency change condition is satisfied, the power supply control unit 100 changes the waveform period CY in the series CYS in step ST5. ｉ＋１ The designated phase period DP ｍ The source frequency f[i+1,m] for is set by the following formula: f[i+1,m]=f[i,m]+Δf[i,m]

[0059] On the other hand, if it is determined in step ST4 that the frequency change condition is not satisfied, the power supply control unit sets the source frequency f[i+1, m] according to the following equation in step ST6: f[i+1, m]=f[i, m]

[0060] Next, steps ST7 to ST9 are performed. Steps ST7 to ST9 are repeated until an instruction to end the steps is given. In step ST7, the power supply control unit increments i by 1. In the following step ST8, the power supply control unit increments the waveform period CY in the series CYS. ｉ The designated phase period DP ｍ , a source high frequency power HF having a source frequency f[i, m] is supplied from a high frequency power supply 31.

[0061] In the subsequent step ST9, the power supply control unit calculates the degree of reflection P ｄ [i, m] in the sequence CYS. ｉ＋１ The designated phase period DP ｍ Determine the source frequency f[i+1,m] for

[0062] 9, the process ST9 starts with a process ST901. In the process ST901, the power supply control unit calculates the degree of reflection P ｄ In step ST901, it is determined whether the reflection degree P ｄ[i, m] is P ｄ [i, m]>P ｄ Alternatively, if the i-th waveform period CY in the series CYS is satisfied, it may be determined that the trend is increasing. ｉ The mth designated phase period DP over two or more waveform periods CY up to ｍ If the degree of reflection at ｄ It may be determined that [i, m] is on the rise.

[0063] In step ST901, the degree of reflection P ｄ If it is determined that [i, m] is not increasing, the power supply control unit maintains the sign of the shift value Δf[i, m] in step ST902. That is, in step ST902, the power supply control unit sets the shift value Δf[i, m] using the following formula: Δf[i, m]=Δf[i-1, m]

[0064] On the other hand, in step ST901, the degree of reflection P ｄ If it is determined that [i, m] is on the increase, the power supply control unit changes the sign of the shift value Δf[i, m] in step ST903. That is, in step ST903, the power supply control unit sets the shift value Δf[i, m] using the following formula: Δf[i, m]=-Δf[i-1, m]

[0065] In the next step ST904, the power supply control unit ｉ The designated phase period DP ｍ The degree of reflection of the source high frequency power HF at ｄ In step ST904, it is determined whether [i, m] is large enough to satisfy the frequency change condition. ｉ The designated phase period DP ｍ The degree of reflection of the source high frequency power HF at ｄ Satisfied if [i, m] is greater than a threshold.

[0066] In one embodiment, the designated phase period DP in any waveform period in the series CYS ｍ The degree of reflection at and the first threshold P ｔｈ１If it is determined that the degree of reflection is small as a result of the comparison with [m], the designated phase period DP ｍ The degree of reflection at and the second threshold P ｔｈ２ The frequency change condition may not be satisfied in step ST904 until it is determined that the degree of reflection is large as a result of the comparison with the second threshold value P ｔｈ２ [m] is the first threshold P ｔｈ１ [m] or more. ｔｈ２ [m] is the first threshold P ｔｈ１ The second threshold value P for each of the multiple designated phase periods DP may be greater than [m]. ｔｈ２ [m] may be the same or different.

[0067] Specifically, the designated phase period DP in any waveform period in the series CYS ｍ The degree of reflection at ｔｈ１ If it is determined that the specified phase period DP is less than [m], the specified phase period DP is ｍ A second threshold P is used as a threshold to be compared with the degree of reflection at ｔｈ２ [m] may be used. Then, the designated phase period DP in any waveform period in the series CYS ｍ The degree of reflection at ｔｈ２ If it is determined that the specified phase period DP is greater than [m], the specified phase period DP is then set in step ST904. ｍ A first threshold P is used as a threshold to be compared with the degree of reflection at ｔｈ１ [m] may also be used.

[0068] If it is determined in step ST904 that the frequency change condition is satisfied, the power supply control unit 100 changes the waveform period CY in the series CYS in step ST905. ｉ＋１ The designated phase period DP ｍ The source frequency f[i+1,m] for is set by the following formula: f[i+1,m]=f[i,m]+Δf[i,m]

[0069] On the other hand, if the frequency change condition is not satisfied in step ST904, the power supply control unit sets the source frequency f[i+1, m] according to the following equation in step ST906: f[i+1, m]=f[i, m]

[0070] In the method MT, the degree of reflection P ｄ By adjusting the source frequency f[i+1,m] according to [i,m], reflection of the source high frequency power HF is suppressed. Furthermore, in the method MT, the source frequency for the plurality of designated phase periods DP is determined by the above-mentioned feedback process. Furthermore, in the method MT, the source frequency for each of the plurality of phase periods PH other than the plurality of designated phase periods DP is determined by interpolation based on the source frequencies for the plurality of designated phase periods DP. Therefore, according to the method MT, large fluctuations in the source frequency within the waveform period CY are suppressed. Furthermore, as described above, in determining whether the frequency change condition exists, the first threshold P ｔｈ１ and the second threshold P ｔｈ２ By using (2), the source frequency is prevented from being changed excessively. Furthermore, when the method MT is repeated, a high reproducibility of the time variation of the source frequency can be achieved.

[0071] Another example of the process in step STc will be described below with reference to Figures 10 and 11. Figure 10 is a flow chart showing another example of the process in step STc shown in Figure 5(b). Figure 11 is a flow chart showing an example of the process in step ST9a shown in Figure 10. The process in step STc shown in Figures 10 and 11 will be described below from the perspective of differences from the process shown in Figures 8 and 9. In the process shown in Figures 10 and 11, the power supply control unit calculates the shift value Δf[i,m] as the degree of reflection P ｄ It is set to a value according to the magnitude of [i, m].

[0072] 10, the power supply control unit sets the source frequency f[i, m] and the coefficient α[i, m] in a step ST2a between the step ST1 and the step ST3. In the step ST2a, the source frequency f[i, m] and the coefficient α[i, m], i.e., the source frequency f[1, m] and the coefficient α[1, m], are set to respective values ​​that are set in advance.

[0073] If it is determined in step ST4 that the frequency change condition is satisfied, the power supply control unit sets the shift value Δf[i,m] by the following formula in step ST5a between step ST4 and step ST5. ｄ [i,m]-P ｔｈ１ [m])

[0074] Then, in step ST9a following step ST8, the power supply control unit calculates the degree of reflection P ｄ [i, m] in the sequence CYS. ｉ＋１ The designated phase period DP ｍ Determine the source frequency f[i+1,m] for

[0075] 11, the process ST9a starts with a step ST901. ｄ If it is determined that [i, m] is not increasing, the power supply control unit maintains the sign of the coefficient α[i, m] in step ST902a. That is, in step ST902a, the power supply control unit sets the coefficient α[i, m] using the following formula: α[i, m] = α[i-1, m]

[0076] On the other hand, in step ST901, the degree of reflection P ｄ If it is determined that [i, m] is on the increase, the power supply control unit changes the sign of the coefficient α[i, m] in step ST903a. That is, in step ST903a, the power supply control unit sets the coefficient α[i, m] using the following formula: α[i, m] = -α[i-1, m]

[0077] As shown in FIG. 11 , if it is determined in step ST904 that the frequency change condition is satisfied, in step ST905a between step ST904 and step ST905, the power supply control unit sets the shift value Δf[i,m] by the following equation: Δf[i,m]=α[i,m]*(P ｄ [i,m]-P ｔｈ１ [m])

[0078] Below, the degree of reflection P ｄ [i, m] will be explained. The degree of reflection P ｄ[i, m] is the waveform period CY ｉ The designated phase period DP ｍ The plurality of evaluation values ​​are obtained by obtaining a plurality of evaluation values ​​at each of a plurality of sample time points in the designated phase period DP. The plurality of evaluation values ​​reflect the magnitude of the reflection of the source high frequency power HF at each of the plurality of sample time points. The number of sample time points in each of the plurality of designated phase periods DP may be the same.

[0079] Reflection degree P ｄ [i, m] is the waveform period CY ｉ The designated phase period DP ｍ The representative value is a representative value of the evaluation values ​​at each of the multiple sample points in time. The representative value may be an average value of the multiple evaluation values, a weighted average value of the multiple evaluation values, or a maximum value of the multiple evaluation values. Each of the multiple evaluation values ​​may be a power level Pr of the reflected wave, a reflectivity (i.e., Pr / Pf), an impedance Z Ｌ and the characteristic impedance, or the reflection coefficient Γ. Each of the plurality of evaluation values ​​may be the difference between the resistance value of the input of the matching box 33 (i.e., the input of the matching box 33 on the high frequency power source 31 side) or the transmission system of the source high frequency power HF as seen from the high frequency power source 31 and a predetermined resistance value (50Ω, etc.). Alternatively, each of the plurality of evaluation values ​​may be the voltage V at the input of the transmission system of the source high frequency power HF or the matching box. Ｓ and current I Ｓ and a predetermined value (such as 90 degrees).

[0080] In one embodiment, the degree of reflection P ｄ [i, m] is the waveform period CY ｉ The designated phase period DP ｍ The weighted average value is a weighted average value of the evaluation values ​​at each of a plurality of sample points in the designated phase period DP. To calculate the weighted average value, the power supply control unit calculates the average value of a plurality of values ​​obtained by multiplying the plurality of evaluation values ​​by a window function. The window function is ｍThe weight decreases according to the time difference from the center of the specified phase period DP. A triangular window, a Gaussian window, a Hanning window, a Hamming window, or the like is used as the window function. According to the weighted average value using such a window function, the degree of reflection P that may occur due to the phase of the source high frequency power HF in each specified phase period DP is ｄ It is possible to suppress the variation in the calculated values ​​of [i, m].

[0081] 12 is a timing chart showing an example of the source high frequency power and the electric bias in a plasma processing apparatus according to an exemplary embodiment. Similar to FIG. 4B, FIG. 12 shows an example in which a pulse of the electric bias EB and a pulse of the source high frequency power HF are supplied in synchronization with each other. In FIG. 12, the pulse period PP ｋ As shown in FIG. 12, each pulse period PP is a first feedback period P Ｆ [1] and the second feedback period P Ｆ [2]. The first feedback period P Ｆ [1] is the period from the start of the pulse period PP to the time between the start and the end of the pulse period PP. Ｆ [2] is the first feedback period P Ｆ This is the period following [1] and continuing until the end of the pulse period PP. Ｆ [1] and the second feedback period P Ｆ Each of [2] may include multiple waveform periods CY.

[0082] The power supply control unit Ｆ The second feedback process may be performed to determine the source frequency f for each of the plurality of designated phase periods DP in each of the plurality of waveform periods CY in [1]. Ｆ The source frequency f of each phase period other than the multiple designated phase periods DP in each of the multiple waveform periods CY in [1] may be determined by interpolation using the source frequencies f for the multiple designated phase periods DP.

[0083] The power supply control unit Ｆ The last designated phase period in the j-th waveform period CY in [1] and the first feedback period P Ｆ The first designated phase period DP in the (j+1)th waveform period CY in [1] １ The source frequency f of each phase period between the last designated phase period and the first designated phase period DP １ Alternatively, the value may be set to a value obtained by interpolation (for example, linear interpolation) using the source frequency f of the first feedback period P Ｆ The number of designated phase periods included in each of the plurality of waveform periods CY in [1] may be different. Ｆ In each of the plurality of waveform periods CY in [1], the time positions of the plurality of designated phase periods may be different.

[0084] As described above, in the period between the supply of a pulse of source high frequency power HF and the supply of the next pulse of source high frequency power HF, source high frequency power HF having a power level lower than that of the pulse may be supplied. Hereinafter, this period in which source high frequency power HF having a power level lower than that of the pulse of source high frequency power HF is supplied will be referred to as a LOW period. The source frequency f used in the LOW period may be constant or may be predetermined.

[0085] First feedback period P Ｆ The first phase period PH in the first waveform period CY in [1] １ is the first designated phase period DP among the multiple designated phase periods DP. １ Alternatively, the first feedback period P Ｆ The first phase period PH in the first waveform period CY in [1] １ is the first designated phase period DP among the multiple designated phase periods DP. １ In the latter case, the power supply control unit may determine whether the final point in the LOW period is equal to the first feedback period P Ｆ The first designated phase period DP in [1] １The source frequency f in each phase period between the LOW period and the first feedback period P Ｆ The first designated phase period DP in [1] １ Alternatively, the source frequency f may be set to a value obtained by interpolation (for example, linear interpolation) using the source frequency f.

[0086] The power supply control unit also Ｆ The power supply control unit may perform the first feedback process described above to determine the source frequency f for each of the plurality of designated phase periods DP in each of the plurality of waveform periods CY in [2]. Ｆ Alternatively, the source frequency f for each phase period other than the plurality of designated phase periods DP in each of the plurality of waveform periods CY in [2] may be determined by interpolation using the source frequency f for the plurality of designated phase periods DP. Ｆ [2] as the source frequency for the plurality of phase periods PH in each of the plurality of waveform periods CY in the immediately preceding first feedback period P Ｆ The source frequency for multiple phase periods PH in the final waveform period CY in [1] may be used.

[0087] The above-described feedback process can also be used in the process of determining the source frequency f for each of the multiple phase periods PH in order to determine the multiple designated phase periods DP. In this case, the designated phase periods DP in the above-described feedback process ｍ The processing for the phase period PH ｎ This applies to:

[0088] Although various exemplary embodiments have been described above, the present invention is not limited to the above-described exemplary embodiments, and various additions, omissions, substitutions, and modifications may be made. Furthermore, elements in different embodiments may be combined to form other embodiments.

[0089] Various exemplary embodiments included in the present disclosure are now described in [E1] to [E10] below.

[0090] [E1] A method for manufacturing a semiconductor device, comprising: a chamber; a substrate support disposed within the chamber; and a power supply system, wherein the power supply system includes: a radio frequency power supply configured to supply source radio frequency power to generate plasma within the chamber; a bias power supply configured to supply an electrical bias to the substrate support repeatedly at time intervals of a waveform period to attract ions from the plasma to a substrate on the substrate support; and a power supply controller, wherein the waveform period includes a plurality of phase periods, the plurality of phase periods including a plurality of designated phase periods that is less than the number of the plurality of phase periods; and wherein the power supply controller determines a source frequency of the source radio frequency power for an m-th designated phase period among the plurality of designated phase periods in an i-th waveform period in the series of waveform periods, based on a change in the source frequency and a change in the degree of reflection of the source radio frequency power for the m-th designated phase period up to the i-th waveform period in the series, so as to suppress reflection of the source radio frequency power, the source frequency for each of the phase periods other than the plurality of designated phase periods among the plurality of phase periods in the i-th waveform period is determined by interpolation using the source frequencies for each of the plurality of designated phase periods.

[0091] [E2] The plasma processing apparatus according to E1, wherein the phase of each of the plurality of designated phase periods in the waveform cycle is determined in advance.

[0092] [E3] The plasma processing apparatus according to E2, wherein the electrical bias includes voltage pulses that are generated periodically at time intervals equal to the time length of the waveform period, the waveform period including a first period in which the voltage pulse is in an OFF state, a second period following the first period in which the voltage pulse is in an ON state, and a third period following the second period in which the voltage pulse is in an OFF state, and wherein an interval in the second period of the plurality of designated phase periods is smaller than an interval in each of the first period and the third period of the plurality of designated phase periods.

[0093] [E4] The plasma processing apparatus according to E3, wherein the intervals between the plurality of designated phase periods in the third period are the same as or smaller than the intervals between the plurality of designated phase periods in the first period.

[0094] [E5] The plasma processing apparatus according to E3 or E4, wherein the voltage pulse has a negative set voltage level with respect to a reference voltage level, the second period includes a first sub-period in which the voltage level of the voltage pulse changes from the reference voltage level to the set voltage level, a second sub-period in which the voltage level of the voltage pulse is the set voltage level, and a third sub-period in which the voltage level of the voltage pulse changes from the set voltage level to the reference voltage level, and wherein the intervals in the first sub-periods of the plurality of designated phase periods, the intervals in the second sub-periods of the plurality of designated phase periods, and the intervals in the third sub-periods of the plurality of designated phase periods are different from one another.

[0095] [E6] The plasma processing apparatus according to E1, wherein the power supply control unit is configured to: determine the source frequency for each of the plurality of designated phase periods by performing the same process as the process for determining the source frequency for each of the plurality of designated phase periods during a preparation period before performing the process; and determine the plurality of designated phase periods such that the intervals between the plurality of designated phase periods become smaller for sections in which the source frequency changes more significantly in the series of source frequencies obtained by smoothing the series of source frequencies for each of the plurality of phase periods.

[0096] [E7] The plasma processing apparatus according to any one of E1 to E6, wherein the power supply control unit is configured to use linear interpolation as the interpolation.

[0097] [E8] The plasma processing apparatus according to any one of E1 to E7, wherein the power supply control unit is configured, when a comparison of the degree of reflection in the m-th designated phase period among the plurality of designated phase periods in the i-th waveform period in the series with a first threshold value indicates that the degree of reflection is small, not to change the source frequency for the m-th designated phase period until a comparison of the degree of reflection in the m-th designated phase period in a waveform period after the i-th waveform period in the series with a second threshold value indicates that the degree of reflection is large, and the second threshold value is larger than the first threshold value.

[0098] [E9] A power supply system comprising: a radio frequency power supply configured to supply source radio frequency power to generate plasma in a chamber of a plasma processing apparatus; a bias power supply configured to supply an electrical bias to the substrate support repeatedly at a time interval of a waveform period to attract ions from the plasma to a substrate on the substrate support in the chamber; and a power supply control unit, wherein the waveform period includes a plurality of phase periods, the plurality of phase periods including a plurality of designated phase periods which are fewer than the number of the plurality of phase periods; and the power supply control unit is configured to: determine the source frequency of the source radio frequency power for an m-th designated phase period among the plurality of designated phase periods in an i-th waveform period in the series of waveform periods by adjusting the source frequency of the source radio frequency power for the m-th designated phase period among the plurality of designated phase periods based on changes in the source frequency and changes in the degree of reflection of the source radio frequency power for the m-th designated phase period up to the i-th waveform period in the series so as to suppress reflection of the source radio frequency power; and determine the source frequency for each of the plurality of phase periods other than the plurality of designated phase periods among the plurality of phase periods in the i-th waveform period by interpolation using the source frequencies for each of the plurality of designated phase periods.

[0099] [E10] A method for generating a plasma in a chamber of a plasma processing apparatus, comprising: (a) supplying a source radio frequency power from a radio frequency power supply to generate plasma in the chamber; (b) repeatedly supplying an electric bias to the substrate support at a time interval of a waveform period to attract ions from the plasma to a substrate on the substrate support disposed in the chamber, the method comprising: (a) determining a source frequency for an m-th designated phase period among the plurality of designated phase periods in an i-th waveform period in the series of waveform periods by adjusting the source frequency of the source radio frequency power for the m-th designated phase period among the plurality of designated phase periods from a change in the source frequency and a change in the degree of reflection of the source radio frequency power for the m-th designated phase period up to the i-th waveform period in the series so as to suppress reflection of the source radio frequency power; and (d) determining the source frequency for each of the plurality of phase periods other than the plurality of designated phase periods among the plurality of phase periods in the i-th waveform period by interpolation using the source frequencies for each of the plurality of designated phase periods. A control method comprising:

[0100] From the foregoing, it will be understood that various embodiments of the present disclosure have been described herein for purposes of illustration, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Accordingly, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the appended claims.

[0101] 1... plasma processing apparatus, 10... chamber, 11... substrate support part, 30... power supply system, 31... high frequency power supply, 32... bias power supply

Claims

1. A method for manufacturing a semiconductor device comprising: a chamber; a substrate support disposed within the chamber; and a power supply system, the power supply system including: a radio frequency power supply configured to supply radio frequency power to generate plasma within the chamber; a bias power supply configured to supply an electrical bias to the substrate support repeatedly at a time interval of a waveform period to attract ions from the plasma to a substrate on the substrate support; and a power supply controller, the waveform period including a plurality of phase periods, the plurality of phase periods including a plurality of designated phase periods which are less than the number of the plurality of phase periods, the power supply controller determining the frequency of the radio frequency power for an m-th designated phase period among the plurality of designated phase periods in an i-th waveform period in a series of waveform periods based on a change in the frequency of the radio frequency power for the m-th designated phase period up to the i-th waveform period in the series and a change in a degree of reflection of the radio frequency power, so as to suppress reflection of the radio frequency power, a frequency of the high frequency power for each of the plurality of phase periods other than the plurality of designated phase periods among the plurality of phase periods in the i-th waveform period is determined by interpolation using the frequency of the high frequency power for each of the plurality of designated phase periods.

2. The plasma processing apparatus according to claim 1, wherein the phase of each of the plurality of designated phase periods in the waveform cycle is determined in advance.

3. The plasma processing apparatus of claim 2, wherein the electrical bias includes a voltage pulse that is generated periodically at a time interval equal to the time length of the waveform period, the waveform period including a first period during which the voltage pulse is in an OFF state, a second period following the first period during which the voltage pulse is in an ON state, and a third period following the second period during which the voltage pulse is in an OFF state, and an interval during the second period of the multiple designated phase periods is smaller than an interval during each of the first period and the third period of the multiple designated phase periods.

4. A plasma processing apparatus as described in claim 3, wherein the intervals between the plurality of designated phase periods in the third period are the same as the intervals between the plurality of designated phase periods in the first period or are smaller than the intervals between the plurality of designated phase periods in the first period.

5. A plasma processing apparatus as described in claim 3 or 4, wherein the voltage pulse has a negative set voltage level with respect to a reference voltage level, the second period includes a first subperiod in which the voltage level of the voltage pulse changes from the reference voltage level to the set voltage level, a second subperiod in which the voltage level of the voltage pulse is the set voltage level, and a third subperiod in which the voltage level of the voltage pulse changes from the set voltage level to the reference voltage level, and wherein the intervals in the first subperiods of the multiple designated phase periods, the intervals in the second subperiods of the multiple designated phase periods, and the intervals in the third subperiods of the multiple designated phase periods are different from each other.

6. The plasma processing apparatus of claim 1, wherein the power supply control unit is configured to: determine the frequency of the high frequency power for each of the plurality of designated phase periods by performing the same process as the process for determining the frequency of the high frequency power for each of the plurality of designated phase periods during a preparation period before performing the process for determining the frequency of the high frequency power for each of the plurality of designated phase periods; and determine the plurality of designated phase periods such that the intervals between the plurality of designated phase periods are smaller in a section where the change in the frequency of the high frequency power is larger in the series of frequencies of the high frequency power obtained by smoothing the series of frequencies of the high frequency power for each of the plurality of phase periods.

7. The plasma processing apparatus according to any one of claims 1 to 4 and 6, wherein the power supply control unit is configured to use linear interpolation as the interpolation.

8. The plasma processing apparatus of any one of claims 1 to 4 and 6, wherein the power supply control unit is configured, when a comparison of the degree of reflection in the mth designated phase period among the multiple designated phase periods in the ith waveform period in the series with a first threshold value indicates that the degree of reflection is small, not to change the frequency of the high-frequency power for the mth designated phase period until a comparison of the degree of reflection in the mth designated phase period in a waveform period after the ith waveform period in the series with a second threshold value indicates that the degree of reflection is large, and the second threshold value is greater than the first threshold value.

9. A power supply system comprising: a radio frequency power supply configured to supply radio frequency power to generate plasma in a chamber of a plasma processing apparatus; a bias power supply configured to supply an electrical bias to the substrate support repeatedly at a time interval of a waveform period to attract ions from the plasma to a substrate on a substrate support in the chamber; and a power supply control unit, wherein the waveform period includes a plurality of phase periods, the plurality of phase periods including a plurality of designated phase periods which are less than the number of the plurality of phase periods, and the power supply control unit is configured to: determine the frequency of the radio frequency power for an m-th designated phase period among the plurality of designated phase periods in an i-th waveform period in a series of waveform periods by adjusting the frequency of the radio frequency power for the m-th designated phase period up to the i-th waveform period in the series and a change in the degree of reflection of the radio frequency power so as to suppress reflection of the radio frequency power, and determine the frequency of the radio frequency power for each of the plurality of designated phase periods among the plurality of phase periods in the i-th waveform period by interpolation using the frequency of the radio frequency power for each of the plurality of designated phase periods.

10. A method for manufacturing a plasma processing apparatus comprising: (a) supplying high frequency power from a high frequency power supply to generate plasma in a chamber of a plasma processing apparatus; (b) supplying an electrical bias to a substrate support disposed in the chamber, repeatedly at a time interval of a waveform period, to attract ions from the plasma to a substrate on the substrate support; wherein the waveform period includes a plurality of phase periods, the plurality of phase periods including a plurality of designated phase periods less than the number of the plurality of phase periods; and (a) comprises: (c) determining the frequency of the high frequency power for an m-th designated phase period among the plurality of designated phase periods in an i-th waveform period in a series of the waveform periods, based on a change in the frequency of the high frequency power for the m-th designated phase period up to the i-th waveform period in the series and a change in the degree of reflection of the high frequency power, so as to suppress reflection of the high frequency power; (d) determining the frequency of the high frequency power for each of the phase periods other than the plurality of designated phase periods among the plurality of phase periods in the i-th waveform period by interpolation using the frequency of the high frequency power for each of the plurality of designated phase periods.