Circuit board, semiconductor device, method for manufacturing circuit board, and method for manufacturing semiconductor device

Abstract

Provided is a circuit board in which adhesion strength between a resin and a metal plate can be improved and which can reduce a semiconductor device in size. The circuit board comprises an insulating plate and a metal plate. The metal plate is joined to the upper surface of the insulating plate. The metal plate includes a plurality of recesses provided on the surface of the metal plate. The minimum interval between the recesses adjacent to each other is 0.2 mm or less. The width of each of the plurality of recesses is 0.2 mm or less. The depth of each of the plurality of recesses is less than 0.05 mm.

Description

Circuit board, semiconductor device, method of manufacturing circuit board, and method of manufacturing semiconductor device

[0001] The present disclosure relates to a circuit board, a semiconductor device, a method for manufacturing a circuit board, and a method for manufacturing a semiconductor device.

[0002] The semiconductor elements inside power semiconductor devices used in inverters and the like are bonded to the surface of a metal substrate provided on a ceramic substrate. The surface of the metal substrate, in areas where electronic components such as semiconductor elements and wiring are not mounted, is sealed with a resin such as epoxy resin. Thermal stress during the manufacturing process or operation of the semiconductor device can cause the resin to peel off from the metal plate.

[0003] Patent Document 1 discloses a semiconductor device in which a plurality of holes are formed in a conductive plate to which a power semiconductor chip is bonded. The holes create an anchor effect, improving adhesion between the mold resin and the conductive plate.

[0004] Japanese Patent Application Laid-Open No. 2021-39962

[0005] As the demand for miniaturization of power semiconductor devices increases, the spacing between multiple semiconductor elements and the distance between the semiconductor elements and the edge of the metal plate tend to decrease, which reduces the space available for forming recesses to improve adhesion between the resin and the metal plate, making it difficult to ensure sufficient adhesive strength between the resin and the metal plate.

[0006] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a circuit board that improves the adhesive strength between a resin and a metal plate and enables miniaturization of a semiconductor device.

[0007] The circuit board according to the present disclosure includes an insulating plate and a metal plate. The metal plate is bonded to an upper surface of the insulating plate. The metal plate includes a plurality of recesses formed on the surface of the metal plate. The minimum distance between adjacent recesses is 0.2 mm or less. The width of each of the recesses is 0.2 mm or less. The depth of each of the recesses is less than 0.05 mm.

[0008] According to the present disclosure, a circuit board is provided that improves the adhesive strength between a resin and a metal plate and enables miniaturization of a semiconductor device.

[0009] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings.

[0010] 1 is a plan view showing the configuration of a circuit board in embodiment 1. FIG. 2 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 1. FIG. 3 is an enlarged plan view showing the configuration of a recess. FIG. 4 is a cross-sectional view showing the configuration of a recess. FIG. 5 is a diagram showing the relationship between the minimum distance between adjacent recesses and adhesive strength. FIG. 6 is a diagram showing the appearance of a metal plate and a resin part after a shear test. FIG. 7 is a diagram showing the appearance of a metal plate and a resin part after a shear test. FIG. 8 is a plan view showing the configuration of a circuit board in modified example 1 of embodiment 1. FIG. 9 is an enlarged plan view showing the configuration of a recess. FIG. 10 is a cross-sectional view showing the configuration of a recess in modified example 2 of embodiment 1. FIG. 11 is a cross-sectional view showing the configuration of a recess in modified example 2 of embodiment 1. FIG. 12 is a cross-sectional view showing the configuration of a recess of a circuit board in embodiment 2. FIG. 13 is a plan view showing the configuration of a circuit board in embodiment 3. FIG. 14 is a cross-sectional view showing the configuration of a recess of a circuit board in embodiment 4. FIG. 15 is a plan view showing the configuration of a circuit board in embodiment 5.

[0011] <First Embodiment> Fig. 1 is a plan view showing the configuration of a circuit board 101 in a first embodiment. Fig. 2 is a cross-sectional view showing the configuration of a semiconductor device 201 in a first embodiment. Fig. 2 shows a cross section taken along line AA' in Fig. 1.

[0012] The circuit board 101 includes an insulating plate 10, a metal plate 20, and a heat sink 30. The semiconductor device 201 includes the circuit board 101, a semiconductor element 40, and a resin part 50. The semiconductor device 201 is mounted on a power conversion device such as an inverter, for example.

[0013] The insulating plate 10 is made of an inorganic material such as ceramic. The heat sink 30 is bonded to the lower surface of the insulating plate 10. The metal plate 20 is bonded to the upper surface of the insulating plate 10. The metal plate 20 is made of copper, aluminum, or the like, for example.

[0014] The metal plate 20 includes a plurality of recesses 21. The plurality of recesses 21 are provided on the surface of the metal plate 20. The recesses 21 in the first embodiment are provided so as to surround a semiconductor element mounting area 41. The semiconductor element mounting area 41 is a predetermined area on the surface of the metal plate 20, and corresponds to an area where a semiconductor element 40 (described later) is mounted.

[0015] FIG. 3 is an enlarged plan view showing the configuration of the recess 21. FIG. 3 shows the planar configuration of region P in FIG. 1. FIG. 4 is a cross-sectional view showing the configuration of the recess 21. FIG. 4 shows a cross section taken along line B-B' in FIG. 3. In embodiment 1, the recess 21 is a non-through hole. The planar shape of the recess 21 is circular. The minimum distance Ds between adjacent recesses 21 is 0.2 mm or less. If the adjacent recesses 21 are defined as a first recess 21A and a second recess 21B, the minimum distance Ds is not the distance between the center of the first recess 21A and the center of the second recess 21B. The minimum distance Ds corresponds to the distance between the closest portions of the sidewalls of the first recess 21A and the second recess 21B. The diameter of the recess 21, i.e., the width W of the recess 21, is 0.2 mm or less. The depth Dp of the recess 21 is less than 0.05 mm.

[0016] The semiconductor element 40 is bonded to the surface of the metal plate 20 via a bonding material 61. The semiconductor element 40 is mounted in a semiconductor element mounting area 41. The bonding material 61 is made of a conductive material such as solder or a sintered material. The sintered material contains, for example, Ag or Cu. The semiconductor element 40 is made of a semiconductor such as Si. The semiconductor may be SiC, GaN, Ga ２ O ３ , GeO ２Preferably, the semiconductor element 40 is a so-called wide bandgap semiconductor such as diamond. The semiconductor element 40 is a power semiconductor element, a control IC (Integrated Circuit) for controlling the power semiconductor element, or the like. The semiconductor element 40 includes, for example, an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), a Schottky barrier diode, or the like. Alternatively, the semiconductor element 40 may include a reverse-conducting IGBT (RC-IGBT) in which an IGBT and a free wheel diode are formed within a single semiconductor substrate.

[0017] Resin portion 50 seals insulating plate 10, metal plate 20, the plurality of recesses 21, and semiconductor element 40. Resin portion 50 in the first embodiment seals circuit board 101 and semiconductor element 40 so that the underside of heat sink 30 is exposed. Resin portion 50 is made of a resin that is insulating and hardenable. Examples of such resin include silicone resin and epoxy resin.

[0018] FIG. 5 shows the relationship between the minimum distance Ds between adjacent recesses 21 and adhesive strength. The adhesive strength is the strength of adhesion between the metal plate 20 and the resin portion 50. In FIG. 5, the adhesive strength is expressed as a reference ratio, i.e., as a ratio to the adhesive strength when the reference recesses 21 are not provided. In this test, the depth Dp of the recesses 21 is 0.015 mm, and the width W of the recesses 21 is 0.08 mm. The smaller the minimum distance Ds between the recesses 21, the better the adhesive strength. For example, when the minimum distance Ds is 0.2 mm, the adhesive strength is approximately 3.6 times that when the recesses 21 are not provided. Furthermore, when the minimum distance Ds is 0.1 mm, the adhesive strength is approximately 3.9 times that when the recesses 21 are not provided. Therefore, the smaller the minimum distance Ds, the better the adhesive strength.

[0019] 6 and 7 are diagrams showing the appearance of the metal plate 20 and the resin part 50 after a shear test. The shear test was performed on the resin formation area 62 shown in each of FIGS. 6 and 7. In FIG. 6, the minimum spacing Ds of the recesses 21 is 0.1 mm. In FIG. 7, the minimum spacing Ds of the recesses 21 is 0.2 mm. The depth Dp of the recesses 21 is 0.015 mm in both cases. The width W of the recesses 21 is 0.08 mm in both cases.

[0020] As shown in FIG. 6 , when the minimum distance Ds is 0.1 mm, cohesive failure of the resin portion 50 occurs over the entire resin formation area 62. In contrast, as shown in FIG. 7 , when the minimum distance Ds is 0.2 mm, cohesive failure of the resin portion 50 occurs only in the recesses 21. In areas where no recesses 21 are provided, i.e., areas between adjacent recesses 21, interfacial failure occurs between the metal plate 20 and the resin portion 50. According to the failure patterns shown in FIGS. 6 and 7 , when the minimum distance Ds is wide, the contact area between the resin portion and the metal substrate is small, and sufficient adhesive effect cannot be obtained. On the other hand, when the minimum distance Ds is narrowed, the contact area increases, improving the adhesive strength between the resin portion and the metal substrate.

[0021] To summarize the above, the circuit board 101 in embodiment 1 includes an insulating plate 10 and a metal plate 20. The metal plate 20 is bonded to the upper surface of the insulating plate 10. The metal plate 20 includes a plurality of recesses 21 provided on the surface of the metal plate 20. The minimum distance Ds between adjacent recesses 21 is 0.2 mm or less, and more preferably 0.1 mm or less. The width W of each of the plurality of recesses 21 is 0.2 mm or less. The depth Dp of each of the plurality of recesses 21 is less than 0.05 mm.

[0022] Moreover, the semiconductor device 201 in the first embodiment includes a circuit board 101, a semiconductor element 40, and a resin part 50. The semiconductor element 40 is mounted on the surface of the metal plate 20. The resin part 50 seals the insulating plate 10, the multiple recesses 21 of the metal plate 20, and the semiconductor element 40. The multiple recesses 21 are provided so as to surround the semiconductor element 40.

[0023] With this configuration, even if the area where the recess 21 is formed is reduced, sufficient adhesive strength is ensured between the resin part 50 and the metal plate 20. For example, the recess 21 that achieves sufficient adhesive strength is formed even in a narrow area with a width W of about 1 to 2 mm between the semiconductor element 40 and the end of the metal plate 20. Therefore, the semiconductor element 40 and the like can be mounted with high density, and as a result, the semiconductor device 201 can be made smaller.

[0024] Furthermore, because the width W of the recess 21 is small and the depth Dp is shallower than conventional recesses 21, the time required to process the recess 21 is reduced. This reduces the cost of the semiconductor device 201. When the recess 21 is formed using a laser, the laser energy required to form the recess 21 is also reduced. The area of ​​the metal plate 20 that is oxidized by the laser irradiation is narrowed. This makes it possible to form the recess 21 closer to the semiconductor element mounting area 41. As a result, the semiconductor device 201 can be made smaller. Furthermore, the metal oxide layer in and around the recess 21 functions as a solder barrier layer. The area of ​​the solder layer that has poor adhesion to the resin part 50 is reduced, improving the adhesive strength between the resin part 50 and the circuit board 101.

[0025] (Variation 1 of Embodiment 1) Figure 8 is a plan view showing the configuration of a circuit board 101A in Variation 1 of Embodiment 1. The recesses 21 in the circuit board 101A are non-through grooves. Figure 9 is an enlarged plan view showing the configuration of the recesses 21. Figure 9 shows the planar configuration of region Q in Figure 8. The planar shape of the recesses 21 is linear, and the linear grooves are provided so as to surround the semiconductor element mounting area 41. The minimum distance Ds between adjacent recesses 21 is 0.2 mm or less. The groove width, i.e., the width W of the recesses 21, is 0.2 mm or less. The depth Dp of the recesses 21 is less than 0.05 mm.

[0026] The planar pattern of the recesses 21 may have a lattice shape or a slit shape. The lattice shape is formed by vertically extending grooves and horizontally extending grooves intersecting each other. The slit shape is formed by discretely arranging grooves extending in one direction.

[0027] (Second Modification of First Embodiment) Figures 10 to 12 are cross-sectional views showing the configuration of recesses 21 in a second modification of the first embodiment. As shown in Figure 10, the cross-sectional shape of recesses 21 may be triangular. For example, recesses 21 are blind holes having a conical shape. As shown in Figure 11, the bottom of recesses 21 may be rounded. As shown in Figure 12, protrusions 22 may be formed on the edges of each of the multiple recesses 21. The cross-sectional shape of the protrusions 22 is not limited to a triangle.

[0028] Second Embodiment In a second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0029] 13 is a cross-sectional view showing the configuration of recesses 21 of a circuit board in embodiment 2. Metal plate 20 includes protrusions 22. Protrusions 22 are provided on the edges of each of the plurality of recesses 21. Protrusions 22 correspond to burrs on recesses 21. Burrs are also called kaeri. For adjacent first recesses 21A and second recesses 21B, a portion of protrusion 22 of first recess 21A and a portion of protrusion 22 of second recess 21B overlap each other. In other words, the minimum distance Ds is set so that protrusions 22 of first recess 21A and protrusions 22 of second recess 21B overlap each other.

[0030] The projections 22 of adjacent recesses 21 overlap each other, emphasizing the unevenness of the surface of the metal plate 20. As a result, the contact area between the resin part 50 and the metal plate 20 increases, improving the adhesive strength. For example, if the number of recesses 21 in the second embodiment is the same as the number of recesses 21 in the first embodiment, the adhesive strength in the second embodiment is higher than that in the first embodiment, even though the processing time and processing area are approximately the same. The ease of assembly and reliability of the semiconductor device 201 are improved.

[0031] Third Embodiment In a third embodiment, the same components as those in the first or second embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0032] 14 is a cross-sectional view showing the configuration of a recess 21 of a circuit board in embodiment 3. The protrusions 22 of the metal plate 20 protrude outward from the edge of the recess 21. When the recess 21 is formed by a laser, the protrusions 22 protrude toward the portion not irradiated by the laser. Even if the minimum distance Ds between adjacent recesses 21 is the same as in embodiment 1, the protrusions 22 increase the contact area between the resin part 50 and the metal plate 20. This improves the adhesive strength. Even when shear stress is applied, the metallic protrusions 22, which are stronger than the resin part 50, absorb the stress, improving the adhesive strength.

[0033] Fourth Embodiment In a fourth embodiment, the same components as those in any of the first to third embodiments are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0034] 15 is a plan view showing the configuration of a circuit board 104 in embodiment 4. The metal plate 20 includes a high-density region 42 and a low-density region. The high-density region 42 is provided at the four corners of the metal plate 20. The low-density region corresponds to the region other than the high-density region 42. The density of the multiple recesses 21 in the low-density region is lower than the density of the multiple recesses 21 in the high-density region 42. The minimum distance Ds between adjacent recesses 21 and the width W of the recesses 21 are 0.2 mm or less.

[0035] Thermal stress tends to concentrate in the four corners of the metal plate 20. In areas other than the four corners where thermal stress is small, the density of the recesses 21 is reduced, thereby shortening the processing time for the recesses 21.

[0036] Fifth Embodiment In a fifth embodiment, the same components as those in any of the first to fourth embodiments are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0037] 16 is a plan view showing the configuration of a circuit board 105 according to the fifth embodiment. The recess 21 according to the fifth embodiment is provided so as to surround not only the semiconductor element mounting area 41 but also the wiring bonding area 43. The wiring bonding area 43 is a predetermined area on the surface of the metal plate 20, and corresponds to the bonding portion where the metal plate 20 and the wiring 70 are bonded.

[0038] The semiconductor device 201 in the fifth embodiment includes a wiring 70 bonded to a wiring bonding area 43 on the surface of the metal plate 20. One end of the wiring 70 is bonded to the metal plate 20 via, for example, solder. The wiring 70 is electrically connected to the semiconductor element 40 via the solder and the metal plate 20. The other end of the wiring 70 is configured to be connectable to an external circuit (not shown). The wiring 70 is, for example, a metal plate processed into a predetermined shape.

[0039] With this configuration, recesses 21 having a solder barrier function are formed around the joints. The area of ​​the solder layer that has poor adhesion to the resin part 50 is reduced, improving the adhesive strength between the resin part 50 and the metal plate 20.

[0040] Sixth Embodiment In a sixth embodiment, the same components as those in any of the first to fifth embodiments are given the same reference numerals, and detailed description thereof will be omitted.

[0041] In the method for manufacturing a circuit board according to the sixth embodiment, the recesses 21 are formed by a laser. By forming the recesses 21 by a laser, it is possible to reduce the processing time and improve the processing accuracy.

[0042] When the metal plate 20 is made of Cu, the laser used to process the recesses 21 is a UV laser or a green laser. By using a wavelength at which the light absorption rate of Cu is high, the processing time for the recesses 21 is shortened.

[0043] Seventh Embodiment In the seventh embodiment, the same components as those in any of the first to sixth embodiments are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0044] In the method for manufacturing the semiconductor device 201 according to the seventh embodiment, the resin portion 50 is formed by transfer molding. This improves the filling of the resin into the recess 21, and improves the assembly efficiency of the semiconductor device 201.

[0045] Although this disclosure has been described in detail, the above description is illustrative in all respects and is not restrictive. It is understood that countless variations not illustrated can be envisioned.

[0046] It is possible to freely combine the embodiments, and to modify or omit the embodiments as appropriate.

[0047] 10 insulating plate, 20 metal plate, 21 recess, 21A first recess, 21B second recess, 22 protrusion, 30 heat sink, 40 semiconductor element, 41 semiconductor element mounting area, 42 high-density area, 43 wiring bonding area, 50 resin part, 61 bonding material, 62 resin forming area, 70 wiring, 101 circuit board, 101A circuit board, 104 circuit board, 105 circuit board, 201 semiconductor device, Dp depth, Ds minimum spacing.

Claims

1. Insulating board and, The insulating plate comprises a metal plate joined to the upper surface of the insulating plate, The metal plate includes a plurality of recesses provided on the surface of the metal plate, The minimum distance between adjacent recesses is 0.2 mm or less. The width of each of the aforementioned multiple recesses is 0.2 mm or less. A circuit board in which the depth of each of the aforementioned multiple recesses is less than 0.05 mm.

2. The plurality of recesses include a first recess and a second recess that are adjacent to each other. The metal plate includes projections formed on the edges of each of the plurality of recesses. The circuit board according to claim 1, wherein a portion of the projection of the first recess and a portion of the projection of the second recess overlap each other.

3. The metal plate includes projections formed on the edges of each of the plurality of recesses. The circuit board according to claim 1, wherein the projection protrudes outward toward the edge.

4. The metal plate includes high-density regions provided at the four corners of the metal plate and low-density regions provided in the regions other than the four corners. The circuit board according to any one of claims 1 to 3, wherein the density of the plurality of recesses in the low-density region is lower than the density of the plurality of recesses in the high-density region.

5. A circuit board according to any one of claims 1 to 3, A semiconductor element mounted on the surface of the metal plate, The insulating plate, the plurality of recesses in the metal plate, and the resin portion that seals the semiconductor element are provided. The plurality of recesses are provided so as to surround the semiconductor element in the semiconductor device.

6. The metal plate further comprises wiring bonded to the surface of the metal plate and electrically connected to the semiconductor element, The semiconductor device according to claim 5, wherein the plurality of recesses are provided so as to surround the joint between the wiring and the metal plate.

7. A method for manufacturing a circuit board according to any one of claims 1 to 3, A method for manufacturing a circuit board, comprising forming the aforementioned plurality of recesses with a laser.

8. The aforementioned metal plate is made of Cu, The method for manufacturing a circuit board according to claim 7, wherein the laser is a UV laser or a green laser.

9. A method for manufacturing a semiconductor device for manufacturing the semiconductor device described in claim 5, A method for manufacturing a semiconductor device, wherein the resin portion is formed by transfer molding.