Semiconductor device and power conversion device
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2026-03-17
- Publication Date
- 2026-06-17
AI Technical Summary
The existing methods for mounting semiconductor modules on a substrate are affected by the joining accuracy, leading to misalignment issues when multiple semiconductor modules are fixed to a housing.
A semiconductor device design where terminals passing through through-holes of a substrate are fixed to a housing, allowing semiconductor modules to be mounted on the substrate without being affected by the bonding accuracy of the modules to the housing.
This design enables reliable mounting of semiconductor modules on a substrate, independent of the bonding accuracy, thereby improving the reliability and efficiency of semiconductor device assembly.
Abstract
Description
Semiconductor device and power conversion device
[0001] The present disclosure relates to a semiconductor device and a power conversion device.
[0002] As power conversion devices become smaller and more densely packed, there has been an increase in products in which a plurality of semiconductor modules are mounted on a single substrate.
[0003] Patent Document 1 discloses a method for manufacturing a power semiconductor module in which multiple semiconductor modules are housed in a single housing. In this method, first terminals extending from the multiple semiconductor modules are respectively joined to multiple terminals provided in the single housing. Furthermore, second terminals extending from the multiple semiconductor modules are respectively passed through multiple through holes in a single substrate and joined. This allows multiple semiconductor modules to be mounted on a single substrate.
[0004] International Publication No. WO2013 / 171946
[0005] The relative positions of the multiple through-holes in the substrate are fixed. Therefore, it is necessary to align the second terminals of each semiconductor module with the corresponding through-holes. Therefore, whether or not the semiconductor modules can be mounted on the substrate depends on the accuracy of the joining when the multiple semiconductor modules are fixed to the housing. In other words, if the multiple semiconductor modules are joined to the housing with misalignment, the semiconductor modules cannot be mounted on the substrate.
[0006] In order to solve the above-mentioned problems, the first object of the present disclosure is to provide a semiconductor device in which semiconductor modules can be mounted on a substrate without being affected by the joining accuracy when fixing multiple semiconductor modules to a housing.
[0007] A second object of the present disclosure is to provide a power conversion device having a semiconductor device that allows semiconductor modules to be mounted on a substrate without being affected by the joining accuracy when fixing multiple semiconductor modules to a housing.
[0008] An aspect of the present disclosure is preferably a semiconductor device comprising a plurality of semiconductor modules, a housing, and a plurality of terminals fixed to the housing, each semiconductor module having a semiconductor element, a lead frame having one end connected to a control electrode of the semiconductor element, and a sealing material that seals the semiconductor element and the lead frame, the other end of the lead frame extending to the outside of the sealing material, first ends of the plurality of terminals each being pulled out from the same surface of the housing, and second ends of the plurality of terminals being pulled out from the housing and each being joined to the other end of the lead frame of the plurality of semiconductor modules.
[0009] According to an aspect of the present disclosure, the terminals that pass through the through holes of the substrate are fixed to the housing, so that the semiconductor modules can be mounted on the substrate without being affected by the joining accuracy when fixing the semiconductor modules to the housing.
[0010] FIG. 1 is a perspective view showing a semiconductor module mounted on a cooler according to a first embodiment of the present disclosure. FIG. 2 is a perspective view of a semiconductor device mounted on a cooler according to a first embodiment of the present disclosure. FIG. 3 is a perspective view of a substrate according to a first embodiment of the present disclosure. FIG. 4 is a perspective view of a semiconductor device mounted on a substrate according to a first embodiment of the present disclosure. FIG. 5 is a side view of a semiconductor device with terminals according to a first embodiment of the present disclosure. FIG. 6 is a side view of a semiconductor device without terminals according to a first embodiment of the present disclosure. FIG. 7 is a top view of a semiconductor device according to a first embodiment of the present disclosure, showing an enlarged view of a joint portion between a terminal and a lead frame. FIG. 8 is a top view of a semiconductor device according to a first embodiment of the present disclosure, showing an enlarged view of a joint portion between a terminal and a lead frame. FIG. 9 is an enlarged view of a joint portion between a terminal and a lead frame according to a first embodiment of the present disclosure. FIG. 10 is an enlarged view of a state in which a terminal and a lead frame are joined according to a first embodiment of the present disclosure. FIG. 11 is a top view of a semiconductor device according to a first embodiment of the present disclosure, showing an enlarged view of a terminal. FIG. 12 is a top view of a semiconductor device according to a first embodiment of the present disclosure, showing an enlarged view of a terminal. FIG. 13 is a top view of a semiconductor device according to a first embodiment of the present disclosure, showing an enlarged view of a terminal. FIG. 14 is a view showing a guide groove provided in a sealing material according to a first embodiment of the present disclosure. FIG. 15 is a view showing a dowel provided in a sealing material according to a first embodiment of the present disclosure. Fig. 1 is a circuit diagram of a semiconductor module according to a first embodiment of the present disclosure; Fig. 2 is a top view of a semiconductor device according to a first embodiment of the present disclosure, showing a state in which the semiconductor module is connected to a capacitor; Fig. 3 is a top view of a semiconductor device according to a first embodiment of the present disclosure; Fig. 4 is a block diagram showing a configuration of a power conversion system according to a second embodiment of the present disclosure;
[0011] Embodiments of the present disclosure will be described with reference to the drawings. The same or corresponding components will be designated by the same reference numerals, and repeated description may be omitted.
[0012] First Embodiment
[0013] 1 is a perspective view showing a plurality of semiconductor modules 110 mounted on a cooler according to a first embodiment of the present disclosure. The plurality of semiconductor modules 110 are mounted on a cooler 150. Each semiconductor module 110 includes a semiconductor element 111, an insulating layer 114, circuit patterns 117 and 118, a lead frame 115, a bonding material 112, wiring 113, and a sealing material 116 that seals these components.
[0014] The semiconductor element 111 is, for example, a Si RC-IGBT (Reverse Conducting Insulated Gate Bipolar Transistor) or a SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor).
[0015] The circuit pattern 117 controls the switching of the semiconductor element 111. Heat dissipation can be improved by using a metal material with high thermal conductivity for the circuit pattern 117. Note that the circuit pattern 118 (not shown) provided on the back side of the insulating layer 114 is exposed from the sealing material 116.
[0016] The insulating layer 114 is disposed between the circuit patterns 117 and 118, and insulates them. By using a resin that is resistant to deformation as the insulating layer 114, it is possible to prevent cracks from occurring even when minute deformations of the member occur due to heat cycles or the like. Furthermore, by using a material with high thermal conductivity, it is possible to improve the heat dissipation of the circuit patterns 117 and 118 via the insulating layer 114, and to prevent the temperature rise of the semiconductor device 100. The material of the insulating layer 114 is not limited to resin, and may be AlN, Al 2 O 3 , Si 3 N 4 etc. may also be used.
[0017] The lead frame 115 is electrically connected to the emitter electrode or collector electrode of the semiconductor element 111. The lead frame 115 is also electrically connected to a control electrode of the semiconductor element 111, such as a gate electrode.
[0018] The lead frame 115 extends from the semiconductor element 111 and the circuit patterns 117 and 118 .
[0019] The bonding material 112 is disposed between the semiconductor element 111 and the circuit pattern 117, between the semiconductor element 111 and the lead frame 115, and between the circuit pattern 117 and the lead frame 115, and bonds these together. The bonding material 112 is preferably a material with high electrical conductivity and thermal conductivity, and solder, silver, or the like is used. In addition to the above properties, lead-free solder also serves as a buffer material that reduces stress, and its use can improve the reliability of the semiconductor device 100. Alternatively, sintered silver can also be used.
[0020] The wiring 113 electrically connects the semiconductor element 111 and the lead frame 115 .
[0021] The material of the sealing material 116 is preferably one that can improve the reliability of the semiconductor module 110, such as a thermosetting epoxy resin material, and the sealing method is, for example, a transfer molding method.
[0022] FIG. 2 is a perspective view of the semiconductor device 100 mounted on the cooler 150 according to the first embodiment of the present disclosure. The circuit pattern 118 mounted on the semiconductor module 110 and the cooler 150 are joined using solder, silver, or the like (not shown) that has high electrical and thermal conductivity. FIG. 3 is a perspective view of the substrate 200 according to the first embodiment of the present disclosure. FIG. 4 is a perspective view of the semiconductor device 100 mounted on the substrate 200 according to the first embodiment of the present disclosure. The semiconductor device 100 includes a semiconductor module 110 and a housing 120. Note that, although a case where a plurality of semiconductor modules 110 are provided will be described here, it is sufficient that there is one or more semiconductor modules 110.
[0023] The housing 120 is fixed to the cooler 150. By fixing the housing 120 and the cooler 150 together, the housing 120 can function to suppress vibration of the cooler 150. Therefore, vibration countermeasures for the semiconductor device 100 can be implemented without attaching any additional components. This makes it possible to achieve both miniaturization of the device and improvement of its reliability.
[0024] The housing 120 is a frame that fixes the semiconductor module 110. The material of the housing 120 is, for example, resin or metal, but is not limited to this.
[0025] A plurality of terminal holes 122 are provided on the top surface of the housing 120, and a plurality of terminals 121 are fixed through the plurality of terminal holes 122. The relative positions of the terminal holes 122 are the same as the relative positions of the through holes 210 provided in the board 200 that controls the semiconductor module 110. It is desirable that the terminals 121 do not deviate from the terminal holes 122 of the housing 120. Therefore, it is preferable that the housing 120 and the terminals 121 are integrally molded.
[0026] A first end of the terminal 121 is drawn upward from the housing 120 and passed through a through hole 210 of the substrate 200. Furthermore, the first end and the through hole 210 are electrically connected.
[0027] In order to facilitate connection to the through-holes 210, it is desirable that the first ends of the terminals 121 are pulled out straight upward from the housing 120 and passed through the through-holes 210 of the board 200 without being bent. Note that the direction in which the first ends of the multiple terminals 121 are pulled out does not necessarily have to be toward the top of the housing, as long as they are pulled out from the same surface.
[0028] Furthermore, it is desirable that the shape of the first end of terminal 121 be a press-fit shape, since this facilitates connection to through-hole 210 .
[0029] On the other hand, the second end of the terminal 121 is drawn out from the housing 120 and joined to the lead frame 115 that is electrically connected to the control electrode of the semiconductor element 111 .
[0030] The terminals 121 drawn out from the side surface of the housing 120 are preferably bent along the outer shape of the semiconductor module 110 before reaching the second end.
[0031] A guide pin 125 that protrudes longer than the first end of the terminal 121 is formed on the upper surface of the housing 120 from which the first end of the terminal 121 is pulled out. By inserting the guide pin 125 into a hole 230 formed in the board 200, positioning is facilitated when passing the first end through a through hole 210 in the board 200. Furthermore, a support screw 123 is formed on the upper surface of the housing 120, and the housing 120 and the board 200 are fixed together using the support screw 123 and a hole 220 formed in the board 200. The support screw 123 acts as a spacer, allowing the housing 120 and the board 200 to be fixed together while maintaining a certain distance from each other.
[0032] 5 is a side view of the semiconductor device 100 in the presence of the terminal 121 according to the first embodiment of the present disclosure. The terminal 121 includes an extending portion that is perpendicular to the bonding surface with the lead frame 115, from when the terminal 121 is pulled out from the side surface of the housing 120 to the second end. Here, the length of the extending portion is designated as a. On the other hand, FIG. 6 is a side view of the semiconductor device 100 in the absence of the terminal 121 according to the first embodiment of the present disclosure. The distance in the side view from the position where the second end of the terminal 121 is pulled out from the side surface of the housing 120 to the bonding surface of the lead frame 115 is designated as b.
[0033] Since the terminal 121 is pressed against the lead frame 115 and the electrical connection between the terminal 121 and the lead frame 115 is easily ensured, it is desirable that the length a of the extension portion be longer than the distance b.
[0034] 7 and 8 are top views of the semiconductor device 100 according to the first embodiment of the present disclosure, showing enlarged views of the joint between the terminal 121 and the lead frame 115. Both figures illustrate a case in which the semiconductor device 100 includes two semiconductor modules 110-1 and 110-2. Both figures also illustrate a case in which the second end of the terminal 121 is misaligned when it is joined to the lead frame 115. In such a case, there is a risk that the insulation distance D between the lead frame 115 of the semiconductor module 110-1 and the terminal 121 joined to the lead frame 115 of the semiconductor module 110-2 may be shortened. To address this issue, it is desirable that the second end of the terminal 121 have a width narrower than that of the lead frame 115, as shown in FIG. Here, "width" refers to the width of the terminal 121 and the lead frame 115 as viewed from above.
[0035] Here, FIG. 8 shows a case where the width of the terminal 121 is greater than the width of the lead frame 115, and it is clear that the insulation distance D is shorter than that in FIG.
[0036] 9 is an enlarged view of a joint between terminal 121 and lead frame 115 according to the first embodiment of the present disclosure. As shown in the figure, it is desirable that lead frame 115 does not come into contact with any members other than terminal 121 outside sealing material 116. This is to prevent the heat generated when laser-bonding lead frame 115 and terminal 121 from volatilizing members that come into contact with lead frame 115 outside sealing material 116, which could affect the quality of the joint.
[0037] 10 and 11 are enlarged views of the joining of terminal 121 and lead frame 115 according to the first embodiment of the present disclosure. As shown in the figures, both the second end of terminal 121 and lead frame 115 extending outside sealing material 116 are flat, and it is desirable that both sides of the flat plate are exposed. As a result, even if there is a large misalignment between the second end of terminal 121 and lead frame 115, the positions can be corrected before joining by using jig 300.
[0038] In the correction, the terminals 121 and the lead frame 115 are fitted into grooves in the jig 300. The exposed sides of the flat terminals 121 and the lead frame 115 are aligned with the grooves, which causes the terminals 121 to deform and correct the misalignment. In order to achieve both deformability and reliability, it is desirable that the terminals 121 be made of a ductile material.
[0039] 12 and 13 are top views of the semiconductor device 100 according to the first embodiment of the present disclosure, and are enlarged views of the terminal 121. A notch 301 is provided in the terminal 121 from when it is pulled out of the housing 120 to the second end. In FIG. 12, the notch 301 is located at the bent position. On the other hand, in FIG. 13, the notch 301 is located at the base of the bend. This configuration can further increase the deformability of the terminal 121, thereby further enhancing the above-described correction effect.
[0040] 14 is a diagram showing a guide groove 119 provided in the sealing material 116 according to the first embodiment of the present disclosure. From the viewpoint of stabilizing the joining quality, a guide groove 119 for conveying the second end of the terminal 121 to the lead frame 115 is provided on the side surface of the sealing material 116 from which the lead frame 115 extends. The guide groove 119 here is configured to pass from the upper surface of the sealing material 116 facing the housing 120 to the base of the lead frame 115. The entrance of the groove is also V-shaped. However, the shape of the guide groove 119 is not limited to this.
[0041] 15 is a diagram illustrating dowels 124 provided on the sealing material 116 according to the first embodiment of the present disclosure. The sealing material 116 may have positioning dowels 124 provided on the surface that contacts the cooler 150, as shown in the figure. Meanwhile, holes 151 into which the dowels 124 fit are formed on the side of the cooler 150. By connecting the semiconductor module 110 to the cooler 150 using the dowels 124 in this manner, misalignment between the semiconductor module 110 and the housing 120 is reduced. As a result, misalignment between the lead frame 115 and the terminals 121 is also reduced.
[0042] FIG. 16 is a circuit diagram of a semiconductor module 110 according to the first embodiment of the present disclosure. FIG. 17 is a top view of the semiconductor device 100 according to the first embodiment of the present disclosure, illustrating the state in which the semiconductor module 110 is connected to a capacitor 500. Here, the semiconductor module 110 includes two semiconductor elements 111, with the collector electrode of the semiconductor element 111-1 designated as C1. The emitter electrode of the semiconductor element 111-2 designated as E2. Furthermore, the emitter electrode of the semiconductor element 111-1 and the collector electrode of the semiconductor element 111-2 are designated as E1C2. The collector electrode C1 and the emitter electrode E2 are connected to the capacitor 500 by a bus bar 400 made of a metal plate or the like, as shown in FIG.
[0043] It is desirable that semiconductor module 110 have a 2-in-1 type circuit configuration as shown in Fig. 16, because this simplifies the wiring of bus bar 400 and shortens the distance to capacitor 500. Furthermore, from the viewpoint of ensuring the insulation distance described with reference to Figs. 7 and 8, it is desirable that bus bar 400 has a width narrower than lead frame 115 when viewed from above.
[0044] FIG. 18 is a top view of a semiconductor device 100 according to a first embodiment of the present disclosure. Here, the lead frame 115 controlling the semiconductor element 111-1 located on the high side of the 2-in-1 circuit is designated H. Similarly, the lead frame 115 controlling the semiconductor element 111-2 located on the low side is designated L. The lead frames 115 electrically connected to the collector electrode C1, emitter electrode E2, and electrode E1C2 are designated C1, E2, and E1C2, respectively. In the semiconductor module 110, potential differences of several hundred volts occur between C1 and E2, between H and E1C2, and between L and C1, so a distance must be maintained between the lead frames 115 for insulation. Therefore, it is desirable for the lead frames 115 to extend from each of the opposing side surfaces of the encapsulant 116, as shown in the figure. The semiconductor module 110 can be made smaller even when the lead frames 115 are spaced farther apart than when they are extended from one surface or two non-opposing surfaces of the encapsulant 116.
[0045] As described above, in the present disclosure, the terminals 121 that pass through the through holes 210 of the substrate 200 are fixed to the housing 120. Therefore, whether or not the semiconductor module 110 can be mounted on the substrate 200 is not affected by the joining accuracy when the semiconductor module 110 is fixed to the housing 120. This makes it possible to provide a semiconductor device 100 that allows the semiconductor modules 110 to be mounted on the substrate 200 without being affected by the joining accuracy when fixing multiple semiconductor modules 110 to the housing 120.
[0046] The semiconductor element 111 is not limited to being made of silicon, but may also be made of a wide-bandgap semiconductor having a bandgap larger than that of silicon. Examples of wide-bandgap semiconductors include silicon carbide, gallium nitride-based materials, and diamond. A semiconductor element 111 made of such a wide-bandgap semiconductor has high voltage resistance and allowable current density, allowing for miniaturization. By using this miniaturized semiconductor element 111, the semiconductor device 100 incorporating the semiconductor element 111 can also be miniaturized and highly integrated. Furthermore, the high heat resistance of the semiconductor element 111 allows for miniaturization of the heat sink's heat dissipation fins, enabling air-cooling instead of water-cooling, thereby further miniaturizing the semiconductor device 100. Furthermore, the semiconductor element 111 has low power loss and high efficiency, allowing for high efficiency in the semiconductor device 100. While it is desirable for all of the semiconductor elements 111 to be made of wide-bandgap semiconductors, the effects described in this embodiment can be achieved even if only one of the elements is made of a wide-bandgap semiconductor. This point is common to all of the following embodiments.
[0047] In this embodiment, the semiconductor device 100 according to the first embodiment is applied to a three-phase inverter power conversion device. Note that the present disclosure is not limited to a specific power conversion device, and may be applied to, for example, an inverter device, a converter device, a servo amplifier, or a power supply unit.
[0048] 19 is a block diagram showing the configuration of a power conversion system according to a second embodiment of the present disclosure. This power conversion system includes a power supply 10, a power conversion device 20, and a load 30. The power supply 10 is a DC power supply and supplies DC power to the power conversion device 20. The power supply 10 can be configured from a variety of sources, such as a DC system, a solar cell, or a storage battery, or it may be configured from a rectifier circuit connected to an AC system or an AC / DC converter. The power supply 10 may also be configured from a DC / DC converter that converts DC power output from the DC system into a predetermined power.
[0049] The power conversion device 20 is a three-phase inverter connected between the power source 10 and the load 30, and converts DC power supplied from the power source 10 into AC power and supplies the AC power to the load 30. The power conversion device 20 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, a drive circuit 202 that outputs drive signals that drive each switching element of the main conversion circuit 201, and a control circuit 203 that outputs control signals to the drive circuit 202.
[0050] The load 30 is a three-phase electric motor driven by AC power supplied from the power conversion device 20. The load 30 is not limited to a specific application, but is an electric motor mounted on various electrical devices, and is used as an electric motor for, for example, a hybrid vehicle, an electric vehicle, a railroad car, an elevator, or an air conditioning device.
[0051] The power conversion device 20 will be described in detail below. The main conversion circuit 201 includes switching elements and freewheel diodes (not shown), and converts DC power supplied from the power source 10 into AC power by switching the switching elements, and supplies the AC power to the load 30. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 according to this embodiment is a two-level three-phase full-bridge circuit, and can be configured with six switching elements and six freewheel diodes connected in anti-parallel to each switching element.
[0052] Each switching element and each freewheel diode of the main conversion circuit 201 is configured by the semiconductor device 100 corresponding to the above-described first embodiment. Six switching elements are connected in series in pairs to form upper and lower arms, each of which constitutes a phase (U phase, V phase, W phase) of a full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 30.
[0053] The drive circuit 202 may be built into the semiconductor device 100, or may be provided separately from the semiconductor device 100. The drive circuit 202 generates drive signals for driving the switching elements of the main conversion circuit 201 and supplies them to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with control signals from a control circuit 203 (described later), the drive circuit 202 outputs to the control electrodes of each switching element a drive signal that turns the switching element on and a drive signal that turns the switching element off. When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) that is equal to or higher than the threshold voltage of the switching element, and when maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) that is equal to or lower than the threshold voltage of the switching element.
[0054] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the desired power is supplied to the load 30. Specifically, it calculates the time (on time) that each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 30. For example, the main conversion circuit 201 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. The control circuit 203 then outputs a control signal to the drive circuit 202 so that an on signal is output to the switching element that should be in the on state at each point in time, and an off signal is output to the switching element that should be in the off state at each point in time. In accordance with this control signal, the drive circuit 202 outputs an on signal or an off signal as a drive signal to the control electrode of each switching element.
[0055] In the power conversion device according to the present embodiment, the semiconductor device 100 according to the first embodiment is used as the switching element of the main conversion circuit 201, so it is possible to provide a power conversion device having a semiconductor device that allows a semiconductor module to be mounted on a substrate without being affected by the joining accuracy when fixing the semiconductor module to a housing. In this case, the main conversion circuit 201 can be made low-profile and the terminals of the main conversion circuit 201 can be arranged at a narrow pitch, which also makes it possible to miniaturize the power conversion device.
[0056] In the present embodiment, an example in which the present disclosure is applied to a two-level three-phase inverter has been described, but the present disclosure is not limited to this and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is described, but a three-level or multi-level power conversion device may also be used. In addition, when power is supplied to a single-phase load, the present disclosure may also be applied to a single-phase inverter. Furthermore, when power is supplied to a DC load, etc., the present disclosure may also be applied to a DC / DC converter or an AC / DC converter.
[0057] Furthermore, the power conversion device to which the present disclosure is applied is not limited to cases in which the above-mentioned load is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a contactless power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.
[0058] The present disclosure is not limited to the above-described embodiments, and various modifications can be made in the implementation stage without departing from the spirit of the present disclosure. Furthermore, the embodiments may be implemented in appropriate combinations, and in such cases, the combined effects can be obtained.
[0059] 10 power supply, 20 power conversion device, 30 load, 100 semiconductor device, 110 semiconductor module, 111 semiconductor element, 112 bonding material, 113 wiring, 114 insulating layer, 115 lead frame, 116 sealing material, 117 circuit pattern, 118 circuit pattern, 119 guide groove, 120 housing, 121 terminal, 122 terminal hole, 123 support screw, 124 dowel, 125 guide pin, 150 cooler, 151 hole, 200 substrate, 201 main conversion circuit, 202 drive circuit, 203 control circuit, 210 through hole, 220 hole, 230 hole, 300 jig, 301 notch, 400 bus bar, 500 capacitor
Claims
1. Multiple semiconductor modules, The casing and The housing is equipped with a plurality of terminals fixed to it, Each semiconductor module comprises a semiconductor element, a lead frame with one end connected to the control electrode of the semiconductor element, and a sealing material that seals the semiconductor element and the lead frame. The other end of the lead frame extends beyond the sealing material, A semiconductor device in which the first ends of each of the plurality of terminals are drawn out from the same side of the housing, and the second ends of the plurality of terminals are drawn out from the housing and joined to the other ends of the lead frames of the plurality of semiconductor modules.
2. The aforementioned semiconductor module is controlled, and further comprises a substrate having multiple through-holes, The first ends of the plurality of terminals are passed through the plurality of through-holes of the substrate and electrically connected to the through-holes. The semiconductor device according to claim 1, wherein the relative positions of the plurality of terminals in the housing are the same as the relative positions of the plurality of through-holes in the substrate.
3. The semiconductor device according to claim 1 or 2, further comprising a cooler fixed to the housing and joined to the semiconductor module.
4. The semiconductor device according to claim 3, wherein the sealing material has a dowel on the surface that contacts the cooler, and the cooler has a hole formed therein that fits into the dowel.
5. The semiconductor device according to claim 1 or 2, wherein the housing is provided with a guide pin that protrudes longer than the first end of the terminal on the surface from which the first end of the terminal is drawn out.
6. The semiconductor device according to claim 1 or 2, wherein the housing is provided with a support screw that protrudes from the surface from which the first end of the terminal is drawn out.
7. The semiconductor device according to claim 1 or 2, wherein the terminal includes an extension perpendicular to the bonding surface with the lead frame between the point where it is drawn out from the housing and the second end, and the length of the extension is longer than the distance in a side view from the point where the second end is drawn out from the housing to the bonding surface.
8. The semiconductor device according to claim 1 or 2, wherein the second end of the terminal has a width narrower than the lead frame when viewed from above.
9. The semiconductor device according to claim 1 or 2, wherein the lead frame does not come into contact with any member other than the terminal outside the sealing material.
10. The semiconductor device according to claim 1 or 2, wherein the second end of the terminal and the lead frame extending outside the sealing material are both flat plates, and both sides of the flat plate are exposed.
11. The terminal is bent along the outer shape of the semiconductor module before reaching the second end. The semiconductor device according to claim 1 or 2, wherein a notch is provided at the bending position or at the base of the bend.
12. The semiconductor device according to claim 1 or 2, wherein the side surface of the sealing material on which the lead frame extends is provided with a guide groove for transporting the second end of the terminal to the lead frame.
13. The semiconductor module includes a first semiconductor element and a second semiconductor element configured in a 2-in-1 type circuit. The busbar that electrically connects the first lead frame drawn from the collector electrode of the first semiconductor element to the capacitor has a width narrower than the first lead frame when viewed from above. The semiconductor device according to claim 1 or 2, wherein the busbar that electrically connects the second lead frame drawn from the emitter electrode of the second semiconductor element to the capacitor has a width narrower than the second lead frame when viewed from above.
14. The semiconductor device according to claim 1 or 2, wherein the lead frame is drawn out from each of the opposing sides of the sealing material.
15. The semiconductor device according to claim 1 or 2, characterized in that the semiconductor element is formed of a wide-bandgap semiconductor.
16. The semiconductor device according to claim 1 or 2, wherein the housing is a frame integrally molded with the terminals.
17. A semiconductor device according to claim 1 or 2, comprising a main conversion circuit that converts and outputs input power, A power conversion device characterized by comprising a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit.