Semiconductor device

Abstract

This semiconductor device comprising transistor parts and diode parts includes: a drift region which has a first conductivity type and is provided on a semiconductor substrate; a plurality of trench parts; a base region which has a second conductivity type and is provided above the drift region; an emitter region which has the first conductivity type, is provided on the front surface of the semiconductor substrate, and has a higher doping concentration than the base drift region; a contact region which has the second conductivity type, is provided above the drift region, and has a higher doping concentration than the base region; cathode regions which have the first conductivity type, are provided on the rear surface of the semiconductor substrate, and have a higher doping concentration than the drift region; and collector regions which have the second conductivity type, are provided on the rear surface of the semiconductor substrate, and have a higher doping concentration than the base region. The semiconductor device comprises a mixture part in which transistor regions provided with the collector regions at the lower portions thereof and diode regions provided with the cathode regions at the lower portions thereof are alternately provided in a trench extending direction.

Description

Semiconductor Devices

[0001] The present invention relates to a semiconductor device.

[0002] A semiconductor device having an IGBT region and an FWD region is known (for example, see Patent Document 1). [Prior art documents] [Patent documents] [Patent document 1] JP 2016-136620 A General disclosure

[0003] (Problem to be Solved) It is necessary to efficiently dissipate the heat generated during operation.

[0004] (Means for Solving the Problem) A first aspect of the present invention provides a semiconductor device including a transistor portion and a diode portion, the semiconductor device including: a drift region of a first conductivity type provided in a semiconductor substrate; a plurality of trench portions extending in a predetermined trench extension direction on a front surface side of the semiconductor substrate; a base region of a second conductivity type provided above the drift region; an emitter region of the first conductivity type provided on the front surface of the semiconductor substrate and having a doping concentration higher than that of the drift region; a contact region of a second conductivity type provided above the drift region and having a doping concentration higher than that of the base region; a cathode region of the first conductivity type provided on a back surface of the semiconductor substrate and having a doping concentration higher than that of the drift region; and a collector region of the second conductivity type provided on the back surface of the semiconductor substrate and having a doping concentration higher than that of the base region, and the semiconductor device includes a mixed portion in which transistor regions below the collector regions and diode regions below the cathode regions are alternately provided in the trench extension direction.

[0005] The mixing section may be provided between the transistor section and the diode section.

[0006] In the trench arrangement direction, the width of the mixed portion may be smaller than the width of the transistor portion.

[0007] In the trench arrangement direction, the width of the mixing portion may be smaller than the width of the diode portion.

[0008] The length of the transistor region of the mixed portion in the trench extension direction may be 5 μm or more and 250 μm or less.

[0009] The mixed portion may have a diode portion-side mixed region adjacent to the diode portion and a transistor portion-side mixed region adjacent to the transistor portion, and the width of the mixed portion in the trench arrangement direction may be 4.6 μm or more and less than the width of a virtual diode portion obtained by adding the diode portion-side mixed regions to both ends of the diode portion.

[0010] When the ratio of the length of the transistor region of the mixed portion to the length of the diode region is 1:1 in the trench extension direction, the ratio of the width of the transistor portion side mixed region to the width of the diode portion side mixed region may be 1:1 in the trench arrangement direction.

[0011] When the length of the transistor region in the mixed portion is greater than the length of the diode region in the trench extension direction, the width of the transistor portion side mixed region may be greater than the width of the diode portion side mixed region in the trench arrangement direction.

[0012] When the length of the transistor region in the mixed portion is smaller than the length of the diode region in the trench extension direction, the width of the transistor portion side mixed region in the trench arrangement direction may be smaller than the width of the diode portion side mixed region.

[0013] The semiconductor device may include an active region having the transistor portion and the diode portion, and an edge termination structure portion provided on the outer periphery of the active region when viewed from above, and the mixed portion may be provided between an end of the diode portion and the edge termination structure portion in the trench extension direction.

[0014] The diode section may have a dummy trench section and a gate trench section, and the gate trench section of the diode section may be provided extending from the diode section to the mixing section.

[0015] The semiconductor device may include an accumulation region of the first conductivity type provided above the drift region and having a doping concentration higher than that of the drift region.

[0016] The accumulation region may be provided in each of the transistor section, the mixing section, and the diode section.

[0017] The semiconductor device may include a backside lifetime control region provided on the backside of the semiconductor substrate.

[0018] The semiconductor device may include a front surface side lifetime control region provided on the front surface side of the semiconductor substrate, and the front surface side lifetime control region may extend from an end of the mixed portion on the diode portion side toward the transistor portion by 0 μm or more and 360 μm or less.

[0019] The semiconductor device may include a contact trench portion extending from the front surface of the semiconductor substrate in a depth direction of the semiconductor substrate.

[0020] The semiconductor device may include a plug region of a second conductivity type provided below the contact trench portion and having a doping concentration higher than that of the base region.

[0021] The above summary of the invention does not list all of the features of the present invention, and subcombinations of these features may also be inventions.

[0022] 4A shows an example of a top view of a semiconductor device 100 according to an embodiment. FIG. 4B is an enlarged view showing an example of region A in FIG. 1. FIG. 4C is a view showing an example of an aa' cross section in FIG. 2. FIG. 4D is a view showing an example of a b-b' cross section in FIG. 2. FIG. 4E is a view showing another example of the aa' cross section in FIG. 2. FIG. 4F is a view showing another example of the aa' cross section in FIG. 2. FIG. 4G is a view showing another example of the aa' cross section in FIG. 2. FIG. 4H is an enlarged view showing an example of region B in FIG. 1. FIG. 4H is a view showing an example of a c-c' cross section in FIG. 4A showing an example of an arrangement of a collector region 22 and a cathode region 82. FIG. 4I is an enlarged view showing another example of region B in FIG. 1. FIG. 4I is an enlarged view showing yet another example of region B in FIG. 1. FIG. 4I is an enlarged view showing another example of region A in FIG. 1. FIG. 4I is an enlarged view showing yet another example of region A in FIG. 1.

[0023] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention as claimed. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0024] In this specification, one side in a direction parallel to the depth direction of a semiconductor substrate is referred to as "upper" and the other side as "lower." Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the front surface, and the other surface is referred to as the back surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the directions when the semiconductor device is mounted.

[0025] In this specification, technical matters may be explained using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes merely identify the relative positions of components and do not limit a specific direction. For example, the Z-axis does not limit the height direction relative to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When the Z-axis direction is described without specifying positive or negative, it means a direction parallel to the +Z-axis and -Z-axis.

[0026] In this specification, orthogonal axes parallel to the front and back surfaces of the semiconductor substrate are referred to as the X-axis and Y-axis. Furthermore, an axis perpendicular to the front and back surfaces of the semiconductor substrate is referred to as the Z-axis. In this specification, the direction of the Z-axis may be referred to as the depth direction. Furthermore, in this specification, the direction parallel to the front and back surfaces of the semiconductor substrate, including the X-axis and Y-axis, may be referred to as the horizontal direction.

[0027] The region from the center of the semiconductor substrate in the depth direction to the front surface of the semiconductor substrate may be referred to as the front surface side. Similarly, the region from the center of the semiconductor substrate in the depth direction to the back surface of the semiconductor substrate may be referred to as the back surface side.

[0028] In this specification, when we say "same" or "equal," it may also include cases where there is an error due to manufacturing variations, etc. The error is, for example, within 10%.

[0029] In this specification, the conductivity type of a doped region doped with an impurity is described as P-type or N-type. In this specification, the impurity may particularly mean either an N-type donor or a P-type acceptor, and may be referred to as a dopant. In this specification, doping means introducing a donor or an acceptor into a semiconductor substrate to form a semiconductor exhibiting an N-type conductivity or a P-type conductivity.

[0030] Fig. 1 shows an example of a top view of a semiconductor device 100 according to an embodiment. Fig. 1 shows the positions of each component projected onto the front surface of a semiconductor substrate 10. Fig. 1 shows only some of the components of the semiconductor device 100, and some components are omitted.

[0031] The semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 has edges 102 in a top view. In this specification, the term "top view" simply refers to a view from the front surface side of the semiconductor substrate 10. The semiconductor substrate 10 of this example has two pairs of edges 102 that face each other in a top view. In FIG. 1 , the X-axis and the Y-axis are parallel to one of the edges 102. The Z-axis is perpendicular to the front surface of the semiconductor substrate 10.

[0032] An active region 160 is provided in the semiconductor substrate 10. The active region 160 is a region through which a main current flows in the depth direction between the front and back surfaces of the semiconductor substrate 10 when the semiconductor device 100 is in operation. An emitter electrode is provided above the active region 160, but is omitted in FIG. 1 .

[0033] The active region 160 is provided with a transistor section 70 including a transistor element such as an IGBT, and a diode section 80 including a diode element such as a free wheel diode (FWD). For example, the semiconductor device 100 is a reverse conducting IGBT (RC-IGBT). Note that the semiconductor device 100 may be either an IGBT or a MOS transistor.

[0034] 1, the transistor sections 70 and the diode sections 80 are alternately arranged along a predetermined arrangement direction (the X-axis direction in this example) on the front surface of the semiconductor substrate 10. However, a mixing section 90 is provided between the transistor sections 70 and the diode sections 80 in the X-axis direction. The mixing section 90 will be described later.

[0035] In FIG. 1 , the region where the transistor section 70 is arranged is marked with the symbol "I," and the region where the diode section 80 is arranged is marked with the symbol "F." In this specification, the direction perpendicular to the arrangement direction in a top view may be referred to as the extension direction (the Y-axis direction in FIG. 1 ). The transistor section 70 and the diode section 80 may each have a longitudinal direction in the extension direction. In other words, the length of the transistor section 70 in the Y-axis direction is greater than the width in the X-axis direction. Similarly, the length of the diode section 80 in the Y-axis direction is greater than the width in the X-axis direction. The extension direction of the transistor section 70 and the diode section 80 may be the same as the longitudinal direction of each trench section, which will be described later.

[0036] 1, the end of the transistor section 70 in the Y-axis direction is located closer to the edge 102 than the end of the diode section 80 in the Y-axis direction. In addition, the width of the transistor section 70 in the X-axis direction is wider than the width of the diode section 80 in the X-axis direction.

[0037] The diode section 80 has an N+ type cathode region in a region that contacts the back surface of the semiconductor substrate 10. In this specification, the region in which the cathode region is provided and that extends in the Y-axis direction is referred to as the diode section 80. In this specification, an extension region in which the diode section 80 extends in the Y-axis direction to the edge termination structure section 162, which will be described later, may also be included in the diode section 80. A collector region is provided on the back surface of the extension region.

[0038] The transistor section 70 has a P+ type collector region in a region in contact with the back surface of the semiconductor substrate 10. In this specification, the region in which the collector region is provided and which extends in the Y-axis direction is referred to as the transistor section 70. The transistor section 70 has an N-type emitter region, a P-type base region, a gate conductive portion, and a gate trench portion having a gate insulating film periodically arranged on the front surface side of the semiconductor substrate 10.

[0039] The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. As an example, the semiconductor device 100 may have pads such as a gate pad, an anode pad, a cathode pad, and a current detection pad (current sense unit). Each pad is disposed near an edge 102. The vicinity of the edge 102 refers to the region between the edge 102 and the emitter electrode in a top view. When the semiconductor device 100 is mounted, each pad may be connected to an external circuit via wiring such as a wire.

[0040] The gate metal layer 50 is disposed between the active region 160 and the edge 102 of the semiconductor substrate 10 in a top view. The gate metal layer 50 connects the gate trench portion and the gate pad. In this example, the gate metal layer 50 surrounds the active region 160 in a top view. The region surrounded by the gate metal layer 50 in a top view may be the active region 160.

[0041] A temperature detection diode may be provided in the center of the active region 160, and the temperature detection diode may be connected to the anode pad and the cathode pad.

[0042] The semiconductor device 100 of this example includes an edge termination structure 162 between the active region 160 and the edge 102. The edge termination structure 162 of this example is disposed between the gate metal layer 50 and the edge 102. The edge termination structure 162 alleviates electric field concentration on the front surface side of the semiconductor substrate 10. The edge termination structure 162 may include multiple guard rings. The guard rings are P-type regions that contact the front surface of the semiconductor substrate 10. By providing multiple guard rings, the depletion layer on the upper surface side of the active region 160 can be extended outward, improving the breakdown voltage of the semiconductor device 100. The edge termination structure 162 may further include at least one of a field plate and a resurf annularly disposed around the active region 160.

[0043] 2 is an enlarged view showing an example of region A in Fig. 1. Region A is a region that straddles the transistor section 70, the mixing section 90, and the diode section 80 at the edge side on the negative side in the Y-axis direction of the semiconductor device 100 in a top view. Note that, within the range shown in Fig. 2, the front surface structure of the mixing section 90 is substantially the same as the front surface structure of the transistor section 70, and therefore a description thereof will be omitted except for the differences.

[0044] The transistor section 70 is a region in which a collector region 22 is provided on the back surface side of the semiconductor substrate 10. In this example, the collector region 22 is, for example, a P+ type. The transistor section 70 includes a transistor such as an IGBT.

[0045] The diode section 80 is a region in which a cathode region 82 is provided on the back surface side of the semiconductor substrate 10. In this example, the cathode region 82 is, for example, an N+ type. The diode section 80 includes a diode such as a free wheel diode (FWD) provided adjacent to the transistor section 70 on the front surface of the semiconductor substrate 10.

[0046] The semiconductor substrate 10 may be a silicon substrate, a silicon carbide substrate, a nitride semiconductor substrate such as gallium nitride, etc. The semiconductor substrate 10 in this example is a silicon substrate.

[0047] The semiconductor device 100 of this example includes, on the front surface of the semiconductor substrate 10, a gate trench portion 40, a dummy trench portion 30, an emitter region 12, a base region 14, a contact region 15, and a well region 17. The semiconductor device 100 of this example also includes an emitter electrode 52 and a gate metal layer 50 provided above the front surface of the semiconductor substrate 10.

[0048] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the emitter region 12, the base region 14, the contact region 15, and the well region 17. The gate metal layer 50 is provided above the gate trench portion 40 and the well region 17.

[0049] The emitter electrode 52 and the gate metal layer 50 are formed of a material containing metal. At least a portion of the emitter electrode 52 may be formed of aluminum, an aluminum-silicon alloy, or an aluminum-silicon-copper alloy. At least a portion of the gate metal layer 50 may be formed of aluminum, an aluminum-silicon alloy, or an aluminum-silicon-copper alloy. The emitter electrode 52 and the gate metal layer 50 may have a barrier metal formed of titanium, a titanium compound, or the like below the region formed of aluminum or the like. The emitter electrode 52 and the gate metal layer 50 are provided separately from each other.

[0050] The emitter electrode 52 and the gate metal layer 50 are provided above the semiconductor substrate 10 with an interlayer insulating film 38 sandwiched therebetween. The interlayer insulating film 38 is omitted in Fig. 2. A contact hole 54, a contact hole 55, and a contact hole 56 are provided to penetrate the interlayer insulating film 38.

[0051] The contact hole 55 connects the gate conductive portion in the gate trench portion 40 of the transistor section 70 to the gate metal layer 50. A plug made of tungsten or the like may be formed inside the contact hole 55 via a barrier metal.

[0052] The contact hole 56 connects the dummy conductive portion in the dummy trench portion 30 provided in the transistor portion 70 and the diode portion 80 to the emitter electrode 52. A plug made of tungsten or the like may be formed inside the contact hole 56 via a barrier metal.

[0053] The connection portion 25 electrically connects a front surface electrode, such as the emitter electrode 52 or the gate metal layer 50, to the semiconductor substrate 10. In one example, the connection portion 25 is provided in a region between the gate metal layer 50 and the gate conductive portion, including the inside of the contact hole 55. The connection portion 25 is also provided in a region between the emitter electrode 52 and the dummy conductive portion, including the inside of the contact hole 56. The connection portion 25 is made of a conductive material, such as a metal such as tungsten or polysilicon doped with impurities. The connection portion 25 may also include a barrier metal such as titanium nitride. In this example, the connection portion 25 is polysilicon (N+) doped with N-type impurities. The connection portion 25 is provided above the front surface of the semiconductor substrate 10 via an insulating film, such as an oxide film.

[0054] The gate trench portions 40 are arranged at predetermined intervals along a predetermined arrangement direction (the X-axis direction in this example). The gate trench portions 40 in this example may have two extension portions 41 that extend parallel to the front surface of the semiconductor substrate 10 and along an extension direction perpendicular to the arrangement direction (the Y-axis direction in this example), and a connection portion 43 that connects the two extension portions 41.

[0055] It is preferable that at least a portion of the connection portion 43 is formed in a curved shape. By connecting the ends of the two extension portions 41 of the gate trench portion 40, it is possible to alleviate electric field concentration at the ends of the extension portions 41. At the connection portion 43 of the gate trench portion 40, the gate metal layer 50 may be connected to the gate conductive portion.

[0056] The dummy trench portion 30 is a trench portion in which a dummy conductive portion provided therein is electrically connected to the emitter electrode 52. Like the gate trench portion 40, the dummy trench portions 30 are arranged at predetermined intervals along a predetermined arrangement direction (the X-axis direction in this example). Like the gate trench portion 40, the dummy trench portion 30 in this example may have a U-shape on the front surface of the semiconductor substrate 10. That is, the dummy trench portion 30 may have two extension portions 31 extending along the extension direction and a connection portion 33 connecting the two extension portions 31.

[0057] The transistor section 70 of this example has a structure in which two gate trench sections 40 and three dummy trench sections 30 are repeatedly arranged. That is, the transistor section 70 of this example has gate trench sections 40 and dummy trench sections 30 in a ratio of 2:3. For example, the transistor section 70 has one extension section 31 between two extension sections 41. The transistor section 70 also has two extension sections 31 adjacent to the gate trench section 40.

[0058] However, the ratio of the gate trench portions 40 to the dummy trench portions 30 is not limited to this example. The ratio of the gate trench portions 40 to the dummy trench portions 30 may be 1:1 or 2:4. Furthermore, the transistor portion 70 may not be provided with dummy trench portions 30, and may be entirely made up of gate trench portions 40.

[0059] The well region 17 is provided closer to the front surface of the semiconductor substrate 10 than the drift region 18, which will be described later. The well region 17 is an example of a well region provided on the edge side of the semiconductor device 100. The well region 17 is, for example, P+ type. The well region 17 is provided within a predetermined range from the end of the active region 160 on the side where the gate metal layer 50 is provided. The diffusion depth of the well region 17 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. Part of the gate trench portion 40 and the dummy trench portion 30 on the gate metal layer 50 side are provided in the well region 17. The bottoms of the ends of the gate trench portion 40 and the dummy trench portion 30 in the extension direction may be covered by the well region 17.

[0060] In the transistor section 70, the contact holes 54 are provided above the emitter region 12 and the contact region 15. In the diode section 80, the contact holes 54 are provided above the base region 14. None of the contact holes 54 are provided above the well regions 17 provided at both ends in the Y-axis direction. In this manner, one or more contact holes 54 are formed in the interlayer insulating film. The one or more contact holes 54 may be provided extending in the extension direction.

[0061] Below the contact holes 54, contact trench portions 60 are provided, extending from the front surface of the semiconductor substrate 10 in the depth direction of the semiconductor substrate 10 (in this example, the Z-axis direction). The contact trench portions 60 electrically connect the emitter electrode 52 and the semiconductor substrate 10. The contact trench portions 60 are provided extending in the Y-axis direction in a top view. In other words, the contact trench portions 60 are arranged in a stripe pattern along the gate trench portions 40 and the dummy trench portions 30.

[0062] Mesa portion 71, mesa portion 81, and mesa portion 91 are mesa portions provided adjacent to trench portions in a plane parallel to the front surface of semiconductor substrate 10. A mesa portion is a portion of semiconductor substrate 10 sandwiched between two adjacent trench portions, and may be a portion extending from the front surface of semiconductor substrate 10 to the deepest bottom of each trench portion. An extension portion of each trench portion may be considered as one trench portion. In other words, the region sandwiched between the two extension portions may be considered as a mesa portion.

[0063] The mesa portion 71 is provided in the transistor portion 70 adjacent to at least one of the dummy trench portion 30 or the gate trench portion 40. The mesa portion 71 has a well region 17, an emitter region 12, a base region 14, and a contact region 15 on the front surface of the semiconductor substrate 10. In the mesa portion 71, the emitter regions 12 and the contact regions 15 are provided alternately in the extension direction.

[0064] The mesa portion 91 is provided in the mixed portion 90. Similar to the mesa portion 71, the mesa portion 91 has, in the range shown in FIG. 2 , a well region 17, a base region 14, and emitter regions 12 and contact regions 15 provided alternately in the extension direction on the front surface of the semiconductor substrate 10.

[0065] The mesa portion 81 is provided in a region of the diode portion 80 that is sandwiched between adjacent dummy trench portions 30. The mesa portion 81 of this example has a base region 14 on the front surface of the semiconductor substrate 10, and a well region 17 on the negative side in the Y-axis direction. The mesa portion 81 may have a contact region 15, similar to the mixed portion 90, provided on the front surface of the base region 14.

[0066] The base region 14 is a region provided on the front surface side of the semiconductor substrate 10 in the transistor section 70 and the diode section 80. The base region 14 is, for example, a P-type. The base region 14 may be provided on the front surface of the semiconductor substrate 10 at both ends in the Y-axis direction of the mesa section 71 and the mesa section 91. Note that FIG. 2 shows only the end of the base region 14 on the negative side in the Y-axis direction.

[0067] The emitter region 12 has the same conductivity type as the drift region 18 but has a higher doping concentration than the drift region 18. In this example, the emitter region 12 is, for example, N+ type. An example of the dopant for the emitter region 12 is arsenic (As). The emitter region 12 is provided on the front surface of the mesa portion 71 in contact with the gate trench portion 40. The emitter region 12 may be provided extending in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The emitter region 12 is also provided below the contact hole 54.

[0068] Furthermore, the emitter region 12 may or may not be in contact with the dummy trench portion 30. In this example, the emitter region 12 is in contact with the dummy trench portion 30. The emitter region 12 does not have to be provided in the mesa portion 81 and the mesa portion 91.

[0069] The contact region 15 has the same conductivity type as the base region 14 but has a higher doping concentration than the base region 14. In this example, the contact region 15 is, for example, P+ type. In this example, the contact region 15 is provided on the front surfaces of the mesa portion 71 and the mesa portion 91. The contact region 15 may be provided in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 or the mesa portion 91 to the other. The contact region 15 may or may not be in contact with the gate trench portion 40. Furthermore, the contact region 15 may or may not be in contact with the dummy trench portion 30. In this example, the contact region 15 is in contact with the dummy trench portion 30 and the gate trench portion 40. The contact region 15 is also provided below the contact hole 54.

[0070] 3A is a diagram showing an example of the aa' cross section in FIG. 2. The aa' cross section is an XZ plane that passes through the emitter region 12 in the mixed portion 90. In the aa' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The emitter electrode 52 is provided above the semiconductor substrate 10 and the interlayer insulating film 38. Although the aa' cross section does not pass through the transistor portion 70, the transistor portion 70 has substantially the same structure as the mixed portion 90 on the same XZ plane, and therefore is not shown in the figure.

[0071] The drift region 18 is a region provided in the semiconductor substrate 10. In this example, the drift region 18 is, for example, N-type. The drift region 18 may be a region remaining in the semiconductor substrate 10 without other doped regions being formed therein. That is, the doping concentration of the drift region 18 may be the same as the doping concentration of the semiconductor substrate 10.

[0072] The buffer region 20 is a region provided below the drift region 18. In this example, the buffer region 20 has the same conductivity type as the drift region 18, for example, N-type. The doping concentration of the buffer region 20 is higher than the doping concentration of the drift region 18. The buffer region 20 may function as a field stop layer that prevents a depletion layer spreading from the lower surface side of the base region 14 from reaching the collector region 22 and the cathode region 82.

[0073] The collector region 22 is a region of a different conductivity type from the drift region 18, which is provided below the buffer region 20 in the transistor section 70. The cathode region 82 is a region of the same conductivity type as the drift region 18, which is provided below the buffer region 20 in the diode section 80.

[0074] The collector electrode 24 is provided on the rear surface 23 of the semiconductor substrate 10. The collector electrode 24 is made of a conductive material such as a metal.

[0075] The base region 14 is a region of a different conductivity type from the drift region 18, and is provided above the drift region 18 in the mesa portion 71, the mesa portion 81, and the mesa portion 91. In this example, the base region 14 is a P-type, for example. The base region 14 is provided in contact with the gate trench portion 40. The base region 14 may be provided in contact with the dummy trench portion 30.

[0076] The emitter region 12 is provided between the base region 14 and the front surface 21 of the semiconductor substrate 10. In this example, the emitter region 12 is provided in the mesa portion 71 and the mesa portion 91, but not in the mesa portion 81. The emitter region 12 is provided in contact with the gate trench portion 40. The emitter region 12 may or may not be in contact with the dummy trench portion 30.

[0077] The contact region 15 is provided above the base region 14 in the mesa portion 71 and the mesa portion 91. The contact region 15 is provided in contact with the dummy trench portion 30 in the mesa portion 71 and the mesa portion 91. In other cross sections, the contact region 15 may be provided on the front surface of the mesa portion 71 and the mesa portion 91.

[0078] The contact trench portion 60 has a conductive material filled in the contact hole 54. The contact trench portion 60 is provided between two adjacent trench portions among the multiple trench portions. The contact trench portion 60 in this example is provided so as to penetrate the emitter region 12 from the front surface 21, and is in contact with the plug region 19 at the bottom surface. The contact trench portion 60 may be made of the same material as the emitter electrode 52. The contact trench portion 60 may also have a plug via a barrier metal.

[0079] The lower end of the contact trench portion 60 may be deeper or shallower than the lower end of the emitter region 12. Providing the contact trench portion 60 reduces the resistance of the base region 14, making it easier to extract minority carriers (e.g., holes). This improves the breakdown resistance, such as latch-up resistance, caused by minority carriers.

[0080] The contact trench portion 60 has a bottom surface that is substantially flat. The bottom surface of the contact trench portion 60 is covered with the plug region 19. The contact trench portion 60 in this example has a tapered shape with inclined sidewalls. However, the sidewalls of the contact trench portion 60 may be provided substantially perpendicular to the front surface 21.

[0081] The plug region 19 is provided below the contact trench portion 60. The plug region 19 has the same conductivity type as the base region 14, but is a region with a higher doping concentration than the base region 14. In this example, the plug region 19 is, for example, a P+ type. For example, the plug region 19 is made of boron (B) or boron fluoride (BF ２ The plug region 19 may have the same doping concentration as the contact region 15. The plug region 19 suppresses latch-up by drawing out minority carriers.

[0082] The plug region 19 may be provided on the sidewall and bottom surface of the contact trench portion 60. In this example, the plug region 19 may be provided in each of the mesa portion 71, the mesa portion 81, and the mesa portion 91. The plug region 19 may be provided extending in the Y-axis direction.

[0083] The accumulation region 16 is a region provided above the drift region 18. In this example, the accumulation region 16 has the same conductivity type as the drift region 18 and is a region with a higher doping concentration than the drift region 18. In this example, the accumulation region 16 is, for example, an N+ type. In this example, the accumulation region 16 is provided in each of the transistor section 70, the mixing section 90, and the diode section 80. However, the accumulation region 16 may be provided only in the transistor section 70, and not in the mixing section 90 or the diode section 80. Alternatively, the accumulation region 16 may be provided in the transistor section 70 and the mixing section 90, and not in the diode section 80.

[0084] The accumulation region 16 in this example is provided in contact with the gate trench portion 40. The accumulation region 16 may or may not be in contact with the dummy trench portion 30. By providing the accumulation region 16, the carrier injection enhancement effect (IE effect) can be enhanced, and the on-voltage of the transistor portion 70 can be reduced.

[0085] One or more gate trenches 40 and one or more dummy trenches 30 are provided in the front surface 21 of the semiconductor substrate 10. Each trench extends from the front surface 21 of the semiconductor substrate 10 to the drift region 18. In regions where at least one of the emitter region 12, the base region 14, the contact region 15, and the accumulation region 16 is provided, each trench also penetrates these regions to reach the drift region 18. The trenches penetrating the doped regions are not limited to those manufactured in the order of forming the doped regions and then the trenches. The trenches penetrating the doped regions may also include those formed after the trenches are formed.

[0086] The gate trench portion 40 has a gate trench, a gate insulating film 42, and a gate conductive portion 44 formed in the front surface 21 of the semiconductor substrate 10. The gate insulating film 42 is provided to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is provided inside the gate trench, further inward than the gate insulating film 42. The gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 may be formed of a conductive material such as polysilicon. The gate trench portion 40 is covered with an interlayer insulating film 38 on the front surface 21 of the semiconductor substrate 10.

[0087] The gate conductive portion 44 includes a region facing the adjacent base region 14 on the mesa portion 71 side across the gate insulating film 42 in the depth direction of the semiconductor substrate 10. When a predetermined voltage is applied to the gate conductive portion 44, a channel is formed by an electron inversion layer in the surface layer of the interface of the base region 14 that contacts the gate trench.

[0088] The dummy trench portion 30 may have the same structure as the gate trench portion 40. The dummy trench portion 30 has a dummy trench, a dummy insulating film 32, and a dummy conductive portion 34 formed on the front surface 21 of the semiconductor substrate 10. The dummy insulating film 32 is provided to cover the inner wall of the dummy trench. The dummy conductive portion 34 is formed inside the dummy trench and is provided further inward than the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy trench portion 30 is covered with an interlayer insulating film 38 on the front surface 21 of the semiconductor substrate 10.

[0089] The interlayer insulating film 38 is provided on the front surface 21 of the semiconductor substrate 10. An emitter electrode 52 is provided above the interlayer insulating film 38. One or more contact holes 54 are provided in the interlayer insulating film 38 to electrically connect the emitter electrode 52 to the semiconductor substrate 10. Contact holes 55 and 56 may also be provided so as to penetrate the interlayer insulating film 38.

[0090] The semiconductor device 100 of this example includes a back surface side lifetime control region 151 and a front surface side lifetime control region 152. However, the semiconductor device 100 does not necessarily need to include either the back surface side lifetime control region 151 or the front surface side lifetime control region 152.

[0091] The backside lifetime control region 151 and the frontside lifetime control region 152 are regions in which lifetime killers are intentionally formed by, for example, implanting impurities into the semiconductor substrate 10. The lifetime killers are carrier recombination centers. The lifetime killers may be lattice defects. For example, the lifetime killers may be vacancies, divacancies, complex defects formed by these with elements constituting the semiconductor substrate 10, or dislocations. The lifetime killers may also be rare gas elements such as helium and neon, or metal elements such as platinum. Electron beams or protons may be used to form the lattice defects. By providing the backside lifetime control region 151 and the frontside lifetime control region 152, the turn-off time can be shortened and the tail current can be suppressed, thereby reducing losses during switching.

[0092] The back surface-side lifetime control region 151 is provided closer to the back surface 23 than the center of the semiconductor substrate 10 in the depth direction of the semiconductor substrate 10. The back surface-side lifetime control region 151 in this example is provided in the buffer region 20. The back surface-side lifetime control region 151 in this example is provided over the entire surface of the semiconductor substrate 10 in the XY plane, and can be formed without using a mask.

[0093] The back side lifetime control region 151 may be formed by implantation from the back side 23 of the semiconductor substrate 10. This can suppress any influence on the front surface 21 of the semiconductor device 100. For example, the back side lifetime control region 151 is formed by irradiating helium or protons from the back side 23 of the semiconductor device 100. Whether the back side lifetime control region 151 is formed by implantation from the front surface 21 or the back side 23 of the semiconductor device 100 can be determined by acquiring the state of the front surface 21 of the semiconductor device 100 using the SR method or measuring leakage current.

[0094] The front surface side lifetime control region 152 is provided closer to the front surface 21 than the center of the semiconductor substrate 10 in the depth direction of the semiconductor substrate 10. The front surface side lifetime control region 152 of this example is provided in the drift region 18. The front surface side lifetime control region 152 of this example is provided extending a distance W in the X-axis direction from the end of the mixture section 90 on the diode section 80 side toward the transistor section 70. The extension distance W may be 0 μm or more and 360 μm or less, or may be 2.0 μm or more and 360 μm or less. The lower limit of the extension distance W may be the width of one mesa section 91.

[0095] In the X-axis direction, the front surface side lifetime control region 152 extending from the diode section 80 may extend through the mixed section 90 to a part of the transistor section 70, or may terminate within the mixed section 90 without reaching the transistor section 70. By providing the front surface side lifetime control region 152, hole injection can be suppressed, thereby reducing reverse recovery loss.

[0096] The front surface side lifetime control region 152 may be formed by irradiation from the front surface 21 of the semiconductor substrate 10. The front surface side lifetime control region 152 may be formed by irradiation from the back surface 23 of the semiconductor substrate 10. The elements, doses, etc. used to form the back surface side lifetime control region 151 and the front surface side lifetime control region 152 may be the same or different.

[0097] The front surface side lifetime control region 152 may be provided below the gate trench portion 40. When a particle beam or the like for forming the front surface side lifetime control region 152 passes through the MOS gate structure of the semiconductor device 100, defects may occur at the interface between the gate oxide film and the semiconductor substrate, causing fluctuations in the threshold voltage. However, by setting the extension distance W from the diode portion 80 within the above-mentioned range, it is possible to suppress fluctuations in the threshold voltage.

[0098] 3B is a diagram showing an example of the bb' cross section in Fig. 2. The bb' cross section is an XZ plane that passes through the contact region 15 in the transistor section 70. Like the aa' cross section, the bb' cross section does not pass through the transistor section 70, but since the transistor section 70 has almost the same structure as the mixing section 90 on the same XZ plane, it is not shown in the figure.

[0099] In the bb' cross section, the mesa portion 71 and the mesa portion 91 have a base region 14, a contact region 15, an accumulation region 16, and a plug region 19. As in the aa' cross section, the mesa portion 91 has the contact region 15, the accumulation region 16, and the plug region 19. In the bb' cross section, the mesa portion 71 has the same structure as the mesa portion 91. As in the aa' cross section, the mesa portion 81 has the base region 14, the accumulation region 16, and the plug region 19.

[0100] 3C is a diagram showing another example of the a-a' cross section in FIG. 2. The a-a' cross section is an XZ plane that passes through the emitter region 12 in the mixed portion 90. In the a-a' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The emitter electrode 52 is provided above the semiconductor substrate 10 and the interlayer insulating film 38. Note that although the a-a' cross section does not pass through the transistor portion 70, the transistor portion 70 has substantially the same structure as the mixed portion 90 on the same XZ plane, and therefore is not shown in the figure.

[0101] 3C differs from FIG. 3A in that it does not include the back surface side lifetime control region 151. The back surface side lifetime control region 151 may not be provided depending on the doping concentration of the buffer region 20 and the application of the semiconductor device 100.

[0102] 3D is a diagram showing another example of the aa' cross section in FIG. The aa' cross section is an XZ plane passing through the emitter region 12 in the mixed portion 90. In the aa' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The emitter electrode 52 is provided above the semiconductor substrate 10 and the interlayer insulating film 38.

[0103] 3D differs from FIG. 3A in that the front surface side lifetime control region 152 is provided over the entire surface. Furthermore, the semiconductor device 100 of this example does not have an extension distance W. The front surface side lifetime control region 152 may be formed by implantation from the back surface 23 side of the semiconductor substrate 10, similar to the back surface side lifetime control region 151. This makes it possible to suppress the influence on the front surface 21 side of the semiconductor device 100. For example, the front surface side lifetime control region 152 is formed by irradiating helium or protons from the back surface 23 side of the semiconductor device 100. The front surface side lifetime control region 152 of this example is provided over the entire surface of the semiconductor substrate 10 in the XY plane, and can be formed without using a mask.

[0104] 3E is a diagram showing another example of the a-a' cross section in FIG. 2. The a-a' cross section is an XZ plane that passes through the emitter region 12 in the mixed portion 90. In the a-a' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The emitter electrode 52 is provided above the semiconductor substrate 10 and the interlayer insulating film 38. Note that although the a-a' cross section does not pass through the transistor portion 70, the transistor portion 70 has substantially the same structure as the mixed portion 90 on the same XZ plane, and therefore is not shown in the figure.

[0105] 3E differs from FIG. 3A in that it does not include back surface side lifetime control region 151 and front surface side lifetime control region 152. Back surface side lifetime control region 151 and front surface side lifetime control region 152 may not be provided depending on the doping concentration of buffer region 20 and the application of semiconductor device 100.

[0106] 3F is a diagram showing another example of the a-a' cross section in FIG. 2. The a-a' cross section is an XZ plane that passes through the emitter region 12 in the mixed portion 90. In the a-a' cross section, the semiconductor device 100 of this example has a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The emitter electrode 52 is provided above the semiconductor substrate 10 and the interlayer insulating film 38. Note that although the a-a' cross section does not pass through the transistor portion 70, the transistor portion 70 has substantially the same structure as the mixed portion 90 on the same XZ plane, and therefore is not shown in the figure.

[0107] 3F differs from FIG. 3A in that it does not include the front surface side lifetime control region 152. The front surface side lifetime control region 152 may not be provided depending on the doping concentration of the buffer region 20 and the application of the semiconductor device 100.

[0108] 4A is an enlarged view showing an example of region B in Fig. 1. Region B is a region on the edge side on the negative side in the Y-axis direction of the semiconductor device 100, centered on the diode section 80, spanning over part of the mixed section 90 and the transistor section 70, in a top view. Fig. 4A also shows an enlarged view of region C of the mesa section 91 of the mixed section 90.

[0109] The mixed portion 90 is a region in which, in the Y-axis direction, transistor regions 970 each having a collector region 22 provided therebelow and diode regions 980 each having a cathode region 82 provided therebelow are alternately provided. The mixed portion 90 is provided between the transistor portion 70 and the diode portion 80. The mixed portion 90 has a gate trench portion 40 and a dummy trench portion 30. The ratio of the gate trench portion 40 to the dummy trench portion 30 in the mixed portion 90 may be the same as that in the transistor portion 70. A contact hole 54 is provided above the mesa portion 91 of the mixed portion 90.

[0110] The transistor region 970 has emitter regions 12 and contact regions 15 alternately provided in the Y-axis direction on the front surface of the mesa portion 91. In other words, the front surface structure of the transistor region 970 is common to the front surface structure of the transistor portion 70. In Figure 4A, the transistor regions 970 of the transistor portion 70 and the mixing portion 90, i.e., the regions that operate as transistors, are hatched.

[0111] As shown in the enlarged view of region C, the diode region 980 is adjacent to the transistor region 970 in the Y-axis direction. The diode region 980 has a base region 14 provided on the front surface 21 of the semiconductor substrate 10. In other words, the front surface structure of the diode region 980 is common to the front surface structure of the diode section 80.

[0112] In the semiconductor device 100 of this example, the region that operates as a transistor (hatched region) and the region that operates as a diode form a sawtooth-shaped boundary in the mixed portion 90 .

[0113] RC-IGBTs suppress temperature changes by having both the transistor and diode bear the heat generated during continuous operation or when a short circuit occurs. During continuous operation, temperature changes are suppressed by diffusing heat to the diode when the transistor is operating, and to the transistor when the diode is operating. During this process, heat is exchanged through the boundary between the transistor and diode. By dissipating heat suddenly generated in the transistor during a short circuit to the diode, it is possible to improve short-circuit resistance.

[0114] In the semiconductor device 100 of this example, the region operating as a transistor and the region operating as a diode form a sawtooth-shaped boundary in the mixed region 90, so the boundary is longer than when the boundary between the transistor and the diode is linear. This promotes thermal diffusion and improves short-circuit resistance. The improved short-circuit resistance allows for an increase in saturation current, which in turn reduces turn-on loss.

[0115] The width Xm of the mixed portion 90 in the X-axis direction may be 50 μm or more and 200 μm or less. The width Xm of the mixed portion 90 may be smaller than the width of the transistor portion 70 and may be smaller than the width Xf of the diode portion.

[0116] In the Y-axis direction, the length Yi of the transistor region 970 of the mixed section 90 may be 5 μm or more and 250 μm or less. In the example of FIG. 4A , the ratio in the Y-axis direction of the length Yi of the transistor region 970 of the mixed section 90 to the length Yf of the diode region 980 is 1:1.

[0117] The region of mixing section 90 adjacent to diode section 80 is the diode section-side mixing region, and the region adjacent to transistor section 70 is the transistor section-side mixing region, and the range obtained by adding the diode section-side mixing region to both ends of diode section 80 in the X-axis direction is the virtual diode section 1080, and the range obtained by adding the transistor section-side mixing region to both ends of transistor section 70 is the virtual transistor section 1070. In other words, virtual diode section 1080 and virtual transistor section 1070 correspond to the diode section and transistor section, respectively, when mixing section 90 is not provided.

[0118] In the X-axis direction, the following relationship holds between the width Xfv of the virtual diode section 1080, the width Xf of the diode section, and the width Xmf of the mixed region on the diode section side: Xfv=Xf+2Xmf

[0119] In the X-axis direction, the width Xm of the mixed portion 90 may be 4.6 μm or more and may be the width Xfv of the virtual diode portion 1080 or less.

[0120] The ratio of the total area of ​​the transistor regions 970 to the total area of ​​the diode regions 980 in the mixing section 90 is determined according to the ratio in the X-axis direction between the width Xmi of the transistor section-side mixing region and the width Xmf of the diode section-side mixing region, and the ratio in the Y-axis direction between the length Yi of the transistor region 970 and the length Yf of the diode region 980. Therefore, when the ratio of the width Xmi of the transistor section-side mixing region to the width Xmf of the diode section-side mixing region is equal to the ratio of the length Yi of the transistor region 970 to the length Yf of the diode region 980, that is, when Xmi:Xm=Yi:Yf is established, the total area of ​​the transistor regions 970 is equal to the area of ​​the transistor section-side mixing region, and the total area of ​​the diode regions 980 is equal to the area of ​​the diode section-side mixing region.

[0121] In this case, the area of ​​the region operating as a transistor, i.e., the sum of the area of ​​the transistor section 70 and the total area of ​​the transistor region 970, is equal to the area of ​​the virtual transistor section 1070, and the area of ​​the region operating as a diode, i.e., the sum of the area of ​​the diode section 80 and the total area of ​​the diode region 980, is equal to the area of ​​the virtual diode section 1080. As a result, the characteristics of the transistor section 70 and the diode section 80 are maintained when the mixing section 90 is not provided, while the provision of the mixing section 90 promotes heat diffusion and improves short-circuit resistance. The improved short-circuit resistance allows for an increase in saturation current, which in turn reduces turn-on loss.

[0122] As shown in FIG. 4A , when the ratio of the length Yi of the transistor region 970 to the length Yf of the diode region 980 is 1:1 in the Y-axis direction, the ratio of the width Xmi of the transistor portion side mixed region to the width Xmf of the diode portion side mixed region may be 1:1 in the X-axis direction.

[0123] 4B is a diagram showing an example of the cc' cross section in Fig. 4A. The cc' cross section is a YZ plane passing through the mesa portion 91. In the transistor region 970, a collector region 22 is provided on the rear surface 23 of the semiconductor substrate 10, and in the diode region 980, a cathode region 82 is provided on the rear surface 23 of the semiconductor substrate 10.

[0124] 4C shows an example of the arrangement of the collector region 22 and the cathode region 82. Although Fig. 4C is a top view of the semiconductor device 100, for convenience, members above the collector region 22 and the cathode region 82 are omitted.

[0125] In the transistor section 70, a collector region 22 is provided on the rear surface 23 of the semiconductor substrate 10, and in the diode section 80, a cathode region 82 is provided on the rear surface 23 of the semiconductor substrate 10. In the edge termination structure section 162, the collector region 22 may be provided on the rear surface 23 of the semiconductor substrate 10.

[0126] In the mixing section 90, the collector regions 22 corresponding to the transistor regions 970 and the cathode regions 82 corresponding to the diode regions 980 are alternately arranged in the Y-axis direction. As a result, the collector regions 22 corresponding to the transistor regions 970 in the transistor section 70 and the mixing section 90 and the cathode regions 82 corresponding to the diode sections 80 and the diode regions 980 in the mixing section 90 form a sawtooth boundary line in the mixing section 90.

[0127] Fig. 5 is an enlarged view showing another example of region B in Fig. 1. In the example of Fig. 5, in the Y-axis direction, the length Yi of the transistor region 970 in the mixed portion 90 is greater than the length Yf of the diode region 980, and in the X-axis direction, the width Xmi of the transistor portion-side mixed region is greater than the width Xmf of the diode portion-side mixed region.

[0128] Fig. 6 is an enlarged view showing yet another example of region B in Fig. 1. In the example of Fig. 6, in the Y-axis direction, the length Yi of the transistor region 970 in the mixed portion 90 is smaller than the length Yf of the diode region 980, and in the X-axis direction, the width Xmi of the transistor portion-side mixed region is smaller than the width Xmf of the diode portion-side mixed region.

[0129] Figure 7A is an enlarged view showing another example of region A in Figure 1. In this example, the mixing section 90 is also provided between the end of the diode section 80 and the edge termination structure section 162 in the Y-axis direction.

[0130] 1 to 6 in that the diode section 80 of this example has a gate trench section 40. The gate trench section 40 of the diode section 80 is provided to extend from the diode section 80 to the mixing section 90.

[0131] The region between the end of the diode section 80 and the edge termination structure 162 is sometimes referred to as the extension region of the diode section 80. The electric field strength is strongest near the end of the diode section 80 during reverse recovery operation, and current is concentrated there. Therefore, in the extension region, a cathode region 82 is not provided on the back surface of the semiconductor substrate 10, and instead a collector region 22 is provided. By not operating the extension region as a diode, current concentration during reverse recovery can be suppressed, and the current withstand capacity during reverse recovery can be increased.

[0132] In the semiconductor device 100 of this example, the mixed portion 90 is expanded into the extension region of the diode portion 80, and a gate trench portion 40 is provided that extends from the diode portion 80 to the mixed portion 90, thereby causing the ineffective region that does not function as a diode to function as a transistor, and promoting thermal diffusion as shown in Figures 1 to 6, thereby improving short-circuit resistance. Improving short-circuit resistance makes it possible to increase the saturation current, and as a result, reduce turn-on loss.

[0133] 7B is an enlarged view showing yet another example of region A in FIG. The semiconductor device 100 of this example has emitter regions 12 and contact regions 15 alternately provided in the Y-axis direction between the end of the diode section 80 and the edge termination structure 162. The diode section 80 of this example has a gate trench section 40. The gate trench section 40 of the diode section 80 is provided extending from the diode section 80 to the mixing section 90.

[0134] In other words, in the semiconductor device 100 of this example, the transistor region 970 is provided in the extension region of the diode section 80. This allows the ineffective region that does not function as a diode to function as a transistor, thereby increasing the active area.

[0135] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0136] It should be noted that the order of execution of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order.

[0137] 10...Semiconductor substrate, 12...Emitter region, 14...Base region, 15...Contact region, 16...Accumulation region, 17...Well region, 18...Drift region, 19...Plug region, 20...Buffer region, 21...Front surface, 22...Collector region, 23...Back surface, 24...Collector electrode, 25...Connection portion, 30...Dummy trench portion, 31...Extension portion, 32...Dummy insulating film, 33...Connection portion, 34...Dummy conductive portion, 38...Interlayer insulating film, 40...Gate trench portion, 41...Extension portion, 42...Gate insulating film, 43...Connection portion, 44...Gate conductive portion, 50...Gate metal layer, 52...Emitter electrode, 54...Contact hole, 55...Contact hole, 56...Contact hole, 60...Contact trench portion, 70...Transistor portion, 71...Mesa portion, 80...Diode portion, 81...Mesa portion, 82...Cathode region, 90...Mixed portion, 91...Mesa portion, 100...Semiconductor device, 102...Edge, 151...Back surface side lifetime control region, 152...Front surface side lifetime control region, 160...Active region, 162...Edge termination structure portion, 970...Transistor region, 980...Diode region, 1070...Virtual transistor portion, 1080...Virtual diode portion

Claims

1. A semiconductor device comprising a transistor section and a diode section, A first-conductivity drift region provided on the semiconductor substrate, On the front side of the semiconductor substrate, there are a plurality of trench portions extending in a predetermined trench extension direction, A second conductivity type base region is provided above the drift region, An emitter region of a first conductivity type, provided on the front surface of the semiconductor substrate, having a doping concentration higher than that of the drift region, A second conductive contact region is provided above the drift region and has a higher doping concentration than the base region, A cathode region of a first conductivity type is provided on the back surface of the semiconductor substrate, and has a doping concentration higher than that of the drift region. A collector region of second conductivity type is provided on the back surface of the semiconductor substrate, and has a doping concentration higher than that of the base region. It has, In the trench extension direction, the trench comprises a mixed section in which transistor regions with the collector region located at the bottom and diode regions with the cathode region located at the bottom are alternately provided. The mixing unit is provided between the transistor unit and the diode unit. Semiconductor equipment.

2. A semiconductor device comprising a transistor section and a diode section, A first-conductivity drift region provided on the semiconductor substrate, On the front side of the semiconductor substrate, there are a plurality of trench portions extending in a predetermined trench extension direction, A second conductivity type base region is provided above the drift region, An emitter region of a first conductivity type, provided on the front surface of the semiconductor substrate, having a doping concentration higher than that of the drift region, A second conductive contact region is provided above the drift region and has a higher doping concentration than the base region, A cathode region of a first conductivity type is provided on the back surface of the semiconductor substrate, and has a doping concentration higher than that of the drift region. A collector region of second conductivity type is provided on the back surface of the semiconductor substrate, and has a doping concentration higher than that of the base region. It has, In the trench extension direction, the trench comprises a mixed section in which transistor regions with the collector region located at the bottom and diode regions with the cathode region located at the bottom are alternately provided. In the trench arrangement direction, the width of the mixing portion is smaller than the width of the diode portion. Semiconductor equipment.

3. In the trench arrangement direction, the width of the mixing portion is smaller than the width of the transistor portion. The semiconductor device according to claim 1 or 2.

4. In the trench extension direction, the length of the transistor region of the mixing portion is 5 μm or more and 250 μm or less. The semiconductor device according to claim 1 or 2.

5. The mixing section has a diode-side mixing region adjacent to the diode section and a transistor-side mixing region adjacent to the transistor section. In the trench arrangement direction, the width of the mixing portion is 4.6 μm or more, and is less than or equal to the width of the virtual diode portion, which is the sum of the mixing regions on the diode side at both ends of the diode portion. The semiconductor device according to claim 1 or 2.

6. In the trench extension direction, if the ratio of the length of the transistor region to the length of the diode region in the mixed portion is 1:1, then in the trench arrangement direction, the ratio of the width of the mixed region on the transistor side to the width of the mixed region on the diode side is 1:

1. The semiconductor device according to claim 5.

7. In the trench extension direction, if the length of the transistor region in the mixing portion is greater than the length of the diode region, then in the trench arrangement direction, the width of the transistor-side mixing region is greater than the width of the diode-side mixing region. The semiconductor device according to claim 5.

8. In the trench extension direction, if the length of the transistor region in the mixing portion is smaller than the length of the diode region, then in the trench arrangement direction, the width of the mixing region on the transistor portion side is smaller than the width of the mixing region on the diode portion side. The semiconductor device according to claim 5.

9. A semiconductor device comprising a transistor section and a diode section, A first-conductivity drift region provided on the semiconductor substrate, On the front side of the semiconductor substrate, there are a plurality of trench portions extending in a predetermined trench extension direction, A second conductivity type base region is provided above the drift region, An emitter region of a first conductivity type, provided on the front surface of the semiconductor substrate, having a doping concentration higher than that of the drift region, A second conductive contact region is provided above the drift region and has a higher doping concentration than the base region, A cathode region of a first conductivity type is provided on the back surface of the semiconductor substrate, and has a doping concentration higher than that of the drift region. A collector region of second conductivity type is provided on the back surface of the semiconductor substrate, and has a doping concentration higher than that of the base region. It has, In the trench extension direction, the trench comprises a mixed section in which transistor regions with the collector region located at the bottom and diode regions with the cathode region located at the bottom are alternately provided. An active region having the transistor portion and the diode portion, In a top view, the edge termination structure provided on the outer periphery of the active region and Equipped with, The mixing portion is provided between the end of the diode portion and the edge termination structure portion in the trench extension direction. Semiconductor equipment.

10. The diode section has a dummy trench section and a gate trench section. The gate trench portion of the diode section extends from the diode section to the mixing section. The semiconductor device according to claim 9.

11. It comprises a first conductivity type accumulation region located above the drift region, with a doping concentration higher than that of the drift region. The semiconductor device according to any one of claims 1, 2, and 9.

12. The storage region is provided in the transistor section, the mixing section, and the diode section, respectively. The semiconductor device according to claim 11.

13. The semiconductor substrate includes a rear-side lifetime control region provided on the back side. The semiconductor device according to any one of claims 1, 2, and 9.

14. The semiconductor substrate is provided with a front-side lifetime control region on the front-side surface, The aforementioned front-side lifetime control region extends from the diode-side end of the mixing section toward the transistor section for a distance of 0 μm or more and 360 μm or less. The semiconductor device according to any one of claims 1, 2, and 9.

15. The semiconductor substrate is provided with a contact trench portion that extends from the front surface of the semiconductor substrate in the depth direction of the semiconductor substrate. The semiconductor device according to any one of claims 1, 2, and 9.

16. A second conductivity type plug region is provided below the contact trench portion and has a higher doping concentration than the base region. The semiconductor device according to claim 15.