Semiconductor device

Abstract

The present invention provides a semiconductor device in which warpage of a semiconductor module can be suppressed. The semiconductor device is configured such that a semiconductor module (1) has a heatsink plate (3), a conductive plate (4) bonded to the upper surface (S1) of the heatsink plate (3) by a first resin sheet (7), and a semiconductor chip (5) bonded to the upper surface of the conductive plate (4) by a bonding material (10). The semiconductor device is also configured such that a cooler (2) is bonded to the lower surface (S6) of the semiconductor module (1) by a second resin sheet (12). The semiconductor device is also configured such that a resin sheet with higher insulation than the second resin sheet (12) is used as the first resin sheet (7), and a resin sheet with higher heat conductivity than the first resin sheet (7) is used as the second resin sheet (12).

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Conventionally, semiconductor devices have been known that include a semiconductor module having a Cu base, an insulating circuit board disposed on the Cu base, and a semiconductor chip disposed on the insulating circuit board, and a cooler disposed below the Cu base. In such semiconductor devices, bonding materials (e.g., solder) are typically used between the Cu base and the insulating circuit board and between the insulating circuit board and the semiconductor chip, and a compound is disposed between the Cu base and the cooler. Patent Document 1 (Patent Document 1) discloses a configuration in which a second heat spreader, an insulating heat dissipation sheet, a first heat spreader, a step absorber, a power semiconductor, and an electrode are arranged in this order. Patent Document 1 also discloses a configuration in which a high-thermal-dissipation sheet or graphite having adhesive properties and heat dissipation properties is used as the step absorber. Patent Document 2 (Patent Document 2) discloses a configuration in which a Cu base plate, a heat dissipation sheet, a Cu pattern, and a power semiconductor chip are arranged in this order. Patent Document 3 discloses a configuration in which a power semiconductor element is disposed on the upper surface side of a lead frame, a cooler is disposed on the lower surface side of the lead frame, and a thermally conductive resin sheet is disposed between the lead frame and the cooler. Patent Document 4 describes a resin case having a roughened adhesive surface as the adhesive surface that comes into contact with the adhesive layer.

[0003] JP 2022-057425 A JP 2023-118508 A JP 2011-116913 A JP 2024-3877 A

[0004] However, when using the above-described configuration in which a bonding material is used to bond the Cu base and the insulating circuit board, and the insulating circuit board and the semiconductor chip, the number of thermal processes to melt the bonding material increases, which may cause warping of the semiconductor module due to heat. Furthermore, if the semiconductor module warps, a gap may form between the semiconductor module and the cooler, potentially deteriorating heat dissipation. Furthermore, if the semiconductor module is pressed against the cooler to reduce the gap, stress may be applied to the semiconductor module, potentially causing damage (failure) of the semiconductor module. Furthermore, if a gap occurs, the compound must be made thicker to eliminate the gap. The present disclosure aims to provide a semiconductor device capable of suppressing warping of the semiconductor module.

[0005] In order to achieve the above object, a semiconductor device according to one aspect of the present disclosure comprises a semiconductor module having a heat sink, a conductive plate joined to the upper surface of the heat sink by a first resin sheet, and a semiconductor chip joined to the upper surface of the conductive plate by a bonding material, and a cooler joined to the lower surface of the semiconductor module by a second resin sheet, wherein the first resin sheet has higher insulating properties than the second resin sheet, and the second resin sheet has higher thermal conductivity than the first resin sheet.

[0006] Furthermore, the first resin sheet and the second resin sheet are sheets formed by hardening a thermosetting resin to which an inorganic filler has been added, and the temperature at which the first resin sheet and the second resin sheet harden may be lower than the melting point of the bonding material.

[0007] The semiconductor module may also have a heat sink, a first resin sheet, a conductive plate, a bonding material, and a sealing resin that seals the semiconductor chip, and the temperature at which the first resin sheet hardens may be lower than the temperature at which the sealing resin hardens.

[0008] The semiconductor module also has a heat sink, a first resin sheet, a conductive plate, a bonding material, and a sealing resin that seals the semiconductor chip, wherein the first resin sheet covers the entire upper surface of the heat sink, the conductive plate overlaps a portion of the upper surface of the first resin sheet excluding the outer edge, and a groove portion is formed in the area of ​​the upper surface of the first resin sheet surrounding the contact area that is in contact with the conductive plate, extending from the upper surface of the first resin sheet to the inside of the heat sink so as to surround the contact area, and the sealing resin may penetrate into the groove portion.

[0009] The semiconductor module also has a heat sink, a first resin sheet, a conductive plate, a bonding material, and a sealing resin that seals the semiconductor chip, and the first resin sheet covers the entire upper surface of the heat sink except for the outer edge, and a groove portion is formed in the area of ​​the upper surface of the heat sink surrounding the contact area that is in contact with the first resin sheet, extending from the upper surface of the heat sink to the inside, surrounding the contact area, and the sealing resin may penetrate into the groove portion.

[0010] The semiconductor module may also include a heat sink, a first resin sheet, a conductive plate, a bonding material, and a sealing resin that seals the semiconductor chip, and the lower surface of the semiconductor module may be an uneven surface that has been roughened.

[0011] The upper surface of the cooler may be roughened to form an uneven surface.

[0012] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions.

[0013] According to one aspect of the present disclosure, a semiconductor device capable of suppressing warpage of a semiconductor module can be provided.

[0014] 10 is a diagram showing a cross-sectional configuration of a semiconductor device according to an embodiment; FIG. 11 is a diagram showing the top surface of a semiconductor module when cut along line A-A in FIG. 1; FIG. 12 is a diagram showing an interface between a semiconductor module and a second resin sheet by enlarging area B in FIG. 1; FIG. 13 is a diagram showing an interface between a cooler and a second resin sheet by enlarging area C in FIG. 1; FIG. 14 is a flowchart showing a method for manufacturing a semiconductor device according to an embodiment; FIG. 15 is a diagram showing a cross-sectional configuration of a semiconductor device according to a comparative example; FIG. 16 is a flowchart showing a method for manufacturing a semiconductor device according to a comparative example; FIG. 17 is a diagram showing a cross-sectional configuration of a semiconductor device according to a modified example (1); FIG. 18 is a flowchart showing a method for manufacturing a semiconductor device according to a modified example (2); FIG. 19 is a diagram showing the top surface of a semiconductor module when cut along line D-D in FIG.

[0015] The inventors of the present disclosure discovered the following problem during extensive research into the semiconductor device described above, which includes a semiconductor module having a Cu base, an insulated circuit board disposed on the Cu base, and a semiconductor chip disposed on the insulated circuit board, and a cooler disposed below the Cu base. The Cu base and the insulated circuit board and the insulated circuit board and the semiconductor chip are bonded with a bonding material, and a compound is disposed between the Cu base and the cooler. First, the inventors of the present disclosure considered replacing the insulating layer of the insulated circuit board (DCB board), the combination of the Cu base and the bonding material, and the compound with the same type of resin sheet having insulating and thermally conductive properties, in order to reduce the number of thermal processes required to melt the bonding material. With such a configuration, for example, when applying it to semiconductor elements (such as power semiconductor elements) that handle high voltages and generate a large amount of heat, the resin sheet would be required to have high levels of insulating and thermal conductivity. However, there were no resin sheets that possessed both high levels of insulating and thermal conductivity, making it difficult to achieve the above configuration. In the present disclosure, "electrical insulation and thermal conductivity of the resin sheet" refers to the electrical insulation and thermal conductivity of the resin sheet in the thickness direction. That is, in the following description, "electrical insulation and thermal conductivity of the first resin sheet 7" refers to the electrical insulation and thermal conductivity of the first resin sheet 7 in the thickness direction, and "electrical insulation and thermal conductivity of the second resin sheet 12" refers to the electrical insulation and thermal conductivity of the second resin sheet 12 in the thickness direction.

[0016] An example of a semiconductor device and a manufacturing method thereof according to an embodiment of the present disclosure will be described below with reference to the drawings. In the description of the drawings, identical or similar parts will be designated by identical or similar reference numerals, and redundant description will be omitted. However, the drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each layer, and the like may differ from the actual ones. Furthermore, parts with different dimensional relationships and ratios may be included between the drawings. The embodiments described below exemplify devices and methods for embodying the technical concept of the present disclosure. The technical concept of the present disclosure does not specify the materials, shapes, structures, arrangements, and the like of component parts to those described below. The definitions of directions such as up / down and left / right in the following description are merely for the convenience of explanation and do not limit the technical concept of the present disclosure. For example, if an object is rotated 90 degrees and observed, up / down is read as being converted to left / right, and if it is rotated 180 degrees and observed, up / down is read as being reversed. The embodiments of the present disclosure will be described in the following order: 1. Overall Configuration of the Semiconductor Device 2. Manufacturing Method of the Semiconductor Device 3. Actions and Effects 4. Modifications

[0017] [1. Overall Configuration of the Semiconductor Device] FIG. 1 is a cross-sectional view of a semiconductor device according to this embodiment. As shown in FIG. 1, the semiconductor device according to this embodiment includes a semiconductor module 1 and a cooler 2. The semiconductor module 1 is a power semiconductor module having power semiconductor elements (hereinafter also referred to as "semiconductor chips"), which are semiconductor elements for generating electric power. For example, the semiconductor module 1 is capable of controlling the rotation speed and acceleration of a motor connected to an inverter (not shown). The semiconductor module 1 includes a heat sink 3, a conductive plate 4 disposed on an upper surface S1 of the heat sink 3, a semiconductor chip 5 disposed on an upper surface S2 of the conductive plate 4, and a sealing resin 6 that seals these components. The heat sink 3 is formed in a rectangular shape larger than the conductive plate 4 in a plan view so as to cover the entire lower surface S3 of the conductive plate 4 (the surface facing the cooler 2). The corners of the heat sink 3 may be chamfered into an R-shape or a C-shape. The heat sink 3 is primarily composed of a metal with excellent thermal conductivity. Examples of the metal include copper (Cu), aluminum (Al), or an alloy containing one of these. The thickness of the heat sink 3 may be, for example, 0.1 mm or more and 2.5 mm or less.

[0018] The conductive plate 4 is bonded to the upper surface S1 of the heat sink 3 by a first resin sheet 7 having insulating and thermally conductive properties. That is, the lower surface of the first resin sheet 7 contacts the heat sink 3, and the upper surface S4 contacts the conductive plate 4, functioning as an adhesive layer that bonds (i.e., adheres) the heat sink 3 and the conductive plate 4 together. The first resin sheet 7 is formed in the same shape as the upper surface S1 in a plan view so as to cover the entire upper surface S1 of the heat sink 3. The first resin sheet 7 is a resin sheet having higher insulating properties than the second resin sheet 12 described below. That is, the withstand voltage [kV] of the first resin sheet 7 is greater than the withstand voltage [kV] of the second resin sheet 12. By increasing the insulating properties of the first resin sheet 7, the first resin sheet 7 can electrically insulate the conductive plate 4 and the heat sink 3, preventing electrical connection between the conductive plate 4 and the heat sink 3. The withstand voltage of the first resin sheet 7 may be, for example, 4 kV / 100 μm or more. The thermal conductivity of the first resin sheet 7 may be, for example, 3.6 W / mK or more.

[0019] The first resin sheet 7 may be, for example, a sheet formed by curing a thermosetting resin composition in which an inorganic filler with excellent insulating properties and thermal conductivity is added to a thermosetting resin (base resin). When such a sheet is used, for example, the first resin sheet 7, in which the thermosetting resin (base resin) is in a semi-cured state, is placed between the heat sink 3 and the conductive plate 4, and then pressure and heat are applied to completely cure the first resin sheet 7 while in contact with the heat sink 3 and the conductive plate 4, thereby achieving bonding (adhesion) using the first resin sheet 7. Examples of thermosetting resins include epoxy resin, liquid crystal polymer (LCP resin), thermosetting urethane resin, silicone resin, and polyimide resin. Examples of inorganic fillers include boron nitride (BN), aluminum oxide (Al ２ O ３ Examples of the first resin sheet 7 include a combination of epoxy resin and boron nitride (BN), a combination of liquid crystal polymer and boron nitride and aluminum oxide, a combination of urethane resin and boron nitride, and a combination of silicone resin and aluminum nitride.

[0020] Furthermore, when using a sheet formed by curing the above-described thermosetting resin composition (thermosetting resin + inorganic filler), the temperature at which the first resin sheet 7 cures (i.e., the curing temperature) is adjusted to be lower than the melting point of the bonding material 10 (e.g., approximately 220°C). This allows the temperature among the curing conditions (pressure and temperature) for the first resin sheet 7 to be lower, thereby reducing the heat applied to the semiconductor module 1 in the process of completely curing the semi-cured first resin sheet 7. More preferably, the temperature at which the first resin sheet 7 cures (i.e., the curing temperature) is adjusted to be lower than the melting point of the bonding material 10 and lower than the temperature at which the sealing resin 6 cures (melting point of the bonding material 10 > curing temperature of the sealing resin 6 ≥ curing temperature of the first resin sheet 7). This allows the semi-cured first resin sheet 7 to be completely cured by the application of pressure and heat for resin sealing in the resin sealing process, thereby reducing the number of heating cycles performed in the manufacturing process. The temperature at which the first resin sheet 7 is cured may be adjusted by, for example, adjusting the amount of inorganic filler or various additives added. The temperature at which the first resin sheet 7 is cured may be, for example, about 120° C. or higher and 180° C. or lower.

[0021] The thicker the first resin sheet 7, the better the insulation, but the lower the thermal conductivity of the first resin sheet 7, resulting in heat accumulation in the semiconductor chip 5. On the other hand, the thinner the first resin sheet 7, the better the thermal conductivity of the first resin sheet 7, but the lower the insulation of the first resin sheet 7, increasing the possibility of electrical connection between the conductive plate 4 and the heat sink 3. Therefore, it is preferable to set the thickness of the first resin sheet 7 within a numerical range, with the lower limit being a thickness that can achieve a withstand voltage that does not cause dielectric breakdown at the voltage handled by the semiconductor module 1, and the upper limit being a thickness that can achieve thermal conductivity comparable to that of the bonding material 10 (solder). For example, the thickness may be between 50 μm and 500 μm.

[0022] 2, a groove 9 is formed in the upper surface S4 of the first resin sheet 7 in a region surrounding a contact region (hereinafter also referred to as the "first contact region 8") that is in contact with the conductive plate 4, the groove 9 extending from the upper surface S4 of the first resin sheet 7 into the heat sink 3. FIG. 2 is a diagram showing the upper surface of the semiconductor module 1 when cut along line A-A in FIG. 1. The sealing resin 6, the second resin sheet 12, and the cooler 2 are not shown in FIG. 2. FIG. 2 also illustrates an example in which the groove 9 is formed in a region surrounding the first contact region 8 so as to surround the first contact region 8. The sealing resin 6 enters the groove 9 through the opening of the groove 9 and fills the interior of the groove 9. By allowing the sealing resin 6 to penetrate into the grooves 9, even if moisture penetrates from the outside (outer edge) of the structure (heat sink 3, first resin sheet 7, conductive plate 4, bonding material 10, and semiconductor chip 5) sealed with the sealing resin 6, the intruding moisture can be stopped by the sealing resin 6 in the grooves 9, preventing moisture from penetrating into the portion between the conductive plate 4 and the heat sink 3 of the first resin sheet 7. Here, for example, if a thermosetting resin composition containing boron nitride (BN) is used as the first resin sheet 7, the insulation properties of the first resin sheet 7 will deteriorate if the first resin sheet 7 comes into contact with moisture. Therefore, as described above, preventing moisture from penetrating into the portion between the conductive plate 4 and the heat sink 3 of the first resin sheet 7 more reliably prevents the conductive plate 4 from being electrically connected to the heat sink 3. The grooves 9 can be formed, for example, by joining the heat sink 3 and the conductive plate 4 with the first resin sheet 7 and then irradiating the upper surface S4 of the first resin sheet 7 with a laser beam to perform laser processing.

[0023] The conductive plate 4 is formed in a rectangular shape smaller than the first resin sheet 7 (heat sink 3) in a plan view so as to overlap the portion (center) of the upper surface S4 of the first resin sheet 7 excluding the outer edge. The conductive plate 4 functions as a circuit board for forming a circuit pattern. FIG. 1 illustrates an example in which the semiconductor device of the present disclosure is applied to a configuration including a lead frame (lead frame type), and the die pad (i.e., a metal plate) of the lead frame is used as the conductive plate 4. Like the heat sink 3, the conductive plate 4 is primarily composed of a metal with excellent conductivity. Examples of the metal that can be used include copper (Cu), aluminum (Al), or an alloy containing one of these. The thickness of the conductive plate 4 may be, for example, 0.1 mm or more and 2.0 mm or less.

[0024] The semiconductor chip 5 is bonded to the upper surface S2 of the conductive plate 4 by a bonding material 10. For example, solder or a sintered material (copper, silver, etc.) can be used as the bonding material 10. In this embodiment, the semiconductor chip 5 is formed of an insulated gate bipolar transistor (IGBT). However, it may also be formed of a metal oxide semiconductor field effect transistor (MOSFET), a static induction (SI) thyristor, a gate turn-off (GTO) thyristor, a diode, etc. The semiconductor chip 5 may be formed of, for example, silicon (Si), silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga ２ O ３ ) or the like. The semiconductor chip 5 has a collector electrode (not shown) arranged on its bottom surface, and an emitter electrode (not shown) and a gate electrode (not shown) arranged on its top surface. The collector electrode of the semiconductor chip 5 is bonded to the top surface S2 of the conductive plate 4 by a bonding material 10. The emitter electrode of the semiconductor chip 5 is bonded to a bonding wire 11. A control terminal (not shown) is electrically connected to the gate electrode of the semiconductor chip 5 via a bonding wire or the like (not shown). The semiconductor chip 5 controls the on / off of the current flowing between the collector electrode and the emitter electrode of the semiconductor chip 5 by sending on / off electrical signals to the gate electrode and the emitter electrode.

[0025] The sealing resin 6 is formed in a rectangular parallelepiped shape to seal the heat sink 3, first resin sheet 7, conductive plate 4, bonding material 10, semiconductor chip 5, etc. The lower surface S5 of the sealing resin 6 is formed flush with the lower surface S6 of the heat sink 3 so that the lower surface S6 of the heat sink 3 is exposed. For example, epoxy, silicone, urethane, polyimide, or polyamide can be used as the sealing resin 6. Epoxy resin mixed with filler is particularly suitable. The sealing resin 6 also penetrates into and fills the grooves 9 formed on the upper surface S4 of the first resin sheet 7.

[0026] As shown in FIG. 3 , the lower surface of the semiconductor module 1 (including the lower surface S5 of the sealing resin 6 and the lower surface S6 of the heat sink 3) is roughened to form an uneven surface. FIG. 3 is an enlarged view of region B in FIG. 1 , showing the interface between the semiconductor module 1 and the second resin sheet 12. The uneven surface allows the second resin sheet 12 to penetrate into the unevenness of the uneven surface, providing an anchoring effect and improving adhesion of the second resin sheet 12. This prevents moisture from penetrating between the semiconductor module 1 and the second resin sheet 12 from the outside. Repeated heat cycles of operating and stopping the semiconductor device may cause the sealing resin 6 to expand and contract repeatedly, potentially causing cracks to propagate from the outer edge to the interior at the interface between the semiconductor module 1 and the second resin sheet 12. In contrast, the improved adhesion of the second resin sheet 12 as described above can also suppress crack propagation at the interface between the semiconductor module 1 and the second resin sheet 12. The arithmetic mean roughness Ra of the uneven surface may be, for example, 1 μm or more and 10 μm or less. Preferably, it may be, for example, 2 μm or more and 5 μm or less. If the arithmetic mean roughness Ra is too large, the recesses may be left unfilled with the second resin sheet 12, which may deteriorate the adhesion of the second resin sheet 12. On the other hand, if the arithmetic mean roughness Ra is too small, the anchor effect may not be obtained, which may deteriorate the adhesion of the second resin sheet 12. The arithmetic mean roughness Ra can be measured using a laser microscope, an atomic force microscope, or the like. Examples of surface roughening methods that can be used include laser processing, polishing, blasting, cutting, and etching.

[0027] The cooler 2 is bonded to the underside of the semiconductor module 1 (including the underside S5 of the sealing resin 6 and the underside S6 of the heat sink 3) by a thermally conductive second resin sheet 12. That is, the underside of the second resin sheet 12 contacts the cooler 2, and the upper side contacts the semiconductor module 1, functioning as an adhesive layer that bonds (adheses) the cooler 2 to the semiconductor module 1. The second resin sheet 12 is formed in the same shape as the underside of the semiconductor module 1 in a plan view so as to cover the entire underside of the semiconductor module 1. A resin sheet having higher thermal conductivity than the first resin sheet 7 is used as the second resin sheet 12. That is, the thermal resistance [K / W] of the second resin sheet 12 is set to be greater than the thermal resistance [K / W] of the first resin sheet 7. Alternatively, the thermal conductivity [W / mK] of the second resin sheet 12 is set to be greater than the thermal conductivity [W / mK] of the first resin sheet 7. Increasing the thermal conductivity of the second resin sheet 12 improves the thermal conduction from the semiconductor module 1 to the cooler 2, and allows for more efficient dissipation of heat generated in the semiconductor module 1. The thermal conductivity of the second resin sheet 12 may be, for example, 7 W / mK or more and 800 W / mK or less. The second resin sheet 12 may be a non-insulating resin sheet (a resin sheet with excellent conductivity).

[0028] The second resin sheet 12 may be, for example, a sheet formed by curing a thermosetting resin composition in which an inorganic filler with excellent thermal conductivity is added to a thermosetting resin (base resin). When using such a sheet, for example, the second resin sheet 12, in which the thermosetting resin (base resin) is in a semi-cured state, is placed between the cooler 2 and the semiconductor module 1, and then pressure and heat are applied to completely cure the second resin sheet 12 while in contact with the cooler 2 and the semiconductor module 1, thereby achieving bonding (adhesion) using the second resin sheet 12. Examples of thermosetting resins include urethane resin and epoxy resin. Examples of inorganic fillers include graphite, carbon nanotubes, carbon fiber, silver (Ag), and aluminum (Al). An example of the second resin sheet 12 is a combination of urethane resin and graphite. Furthermore, when a sheet formed by curing the above-described thermosetting resin composition (thermosetting resin + inorganic filler) is used, the temperature at which the second resin sheet 12 is cured (curing temperature) is adjusted to be lower than the melting point of the bonding material 10. This allows the temperature for curing the second resin sheet 12 to be reduced, and reduces the heat applied to the semiconductor module 1 in the process of completely curing the semi-cured second resin sheet 12. The temperature at which the second resin sheet 12 is cured may be, for example, about 90°C or higher and 180°C or lower.

[0029] The thinner the second resin sheet 12, the better the thermal conductivity of the second resin sheet 12, but if it is too thin, a gap will form between the semiconductor module 1 and the cooler 2, reducing the thermal conductivity from the semiconductor module 1 to the cooler 2. Therefore, it is preferable to set the thickness of the second resin sheet 12 within a numerical range, with the lower limit being a thickness that can eliminate the gap between the semiconductor module 1 and the cooler 2, and the upper limit being a thickness that can achieve thermal conductivity equivalent to that of the bonding material 10 (solder). For example, the thickness may be between 100 μm and 500 μm.

[0030] The upper surface S7 of the cooler 2 is a substantially flat cooling surface that exchanges heat with the semiconductor module 1 via the second resin sheet 12. The cooling surface (upper surface S7) is formed in a rectangular shape larger than the lower surface S6 of the heat sink 3 in a plan view, so as to cover the entire lower surface S6 of the heat sink 3. The cooler 2 dissipates heat generated by the semiconductor chip 5 (i.e., heat accumulated in the semiconductor module 1) by cooling the lower surface (lower surface S6 of the heat sink 3). The cooler 2 may be a cooler through which a refrigerant flows or a heat sink with multiple heat dissipation fins. As shown in FIG. 4 , the upper surface S7 of the cooler 2 is an uneven surface that has been roughened. FIG. 4 is an enlarged view of region C in FIG. 1 , showing the interface between the cooler 2 and the second resin sheet 12. The uneven surface allows the second resin sheet 12 to penetrate into the unevenness of the uneven surface, providing an anchoring effect and improving adhesion of the second resin sheet 12. Here, repeated heat cycles of operating and stopping the semiconductor device cause the sealing resin 6 to repeatedly expand and contract, which may cause cracks to propagate from the outer edge to the inside at the interface between the second resin sheet 12 and the cooler 2. In contrast, as described above, improving the adhesion of the second resin sheet 12 can suppress the propagation of cracks at the interface between the second resin sheet 12 and the cooler 2. The arithmetic mean roughness Ra of the uneven surface may be, for example, 1 μm or more and 10 μm or less. Preferably, it may be, for example, 2 μm or more and 5 μm or less. If the arithmetic mean roughness Ra is too large, unfilled portions of the second resin sheet 12 may occur in the recesses, which may deteriorate the adhesion of the second resin sheet 12. On the other hand, if the arithmetic mean roughness Ra is too small, the anchor effect may not be obtained, which may deteriorate the adhesion of the second resin sheet 12. The arithmetic mean roughness Ra can be measured using a laser microscope, an atomic force microscope, or the like. Examples of surface roughening that can be applied include laser processing, polishing, blasting, cutting, and etching.

[0031] [2. Semiconductor Device Manufacturing Method] Next, an example of a semiconductor device manufacturing method according to this embodiment will be described with reference to the drawings. FIG. 5 is a flowchart showing the semiconductor device manufacturing method according to this embodiment. First, the bonding material 10 and the semiconductor chip 5 are placed, in this order, on the upper surface S2 of the conductive plate 4 (in FIG. 1, this is the die pad of the lead frame) (step S101 in FIG. 5). Next, the conductive plate 4, bonding material 10, and semiconductor chip 5 are heated as a whole to melt the bonding material 10, and the conductive plate 4 and the semiconductor chip 5 are bonded together by the bonding material 10 (step S101 in FIG. 5). Next, bonding wires 11 are connected to the semiconductor chip 5 (step S102 in FIG. 5). Next, the lower surface S3 of the conductive plate 4 is temporarily bonded to the upper surface S1 of the heat sink 3 using a semi-cured first resin sheet 7 (step S103 in FIG. 5). Next, a laser beam is irradiated onto the upper surface S4 of the first resin sheet 7 to form grooves 9 (step S103 in FIG. 5).

[0032] Next, the heat sink 3, the first resin sheet 7, the conductive plate 4, and the semiconductor chip 5 are placed in a mold (not shown) for resin sealing, and the sealing resin 6 is injected to perform resin sealing (step S103 in FIG. 5 ). During this process, the semi-cured first resin sheet 7 is completely cured by the pressure and heat applied for resin sealing, and the first resin sheet 7 is tightly attached to the heat sink 3 and the conductive plate 4, bonding (adhering) them together. For example, the pressure and temperature (e.g., approximately 200°C) applied for resin sealing in the resin sealing process satisfy both the curing conditions of the sealing resin 6 and the first resin sheet 7, thereby bonding (adhering) the heat sink 3 and the conductive plate 4 together. This completes the semiconductor module 1. Next, the lower surface of the semiconductor module 1 (including the lower surface S5 of the sealing resin 6 and the lower surface S6 of the heat sink 3) and the upper surface S7 of the cooler 2 are roughened to form irregular surfaces (step S104 in FIG. 5 ). Next, the lower surface of the semiconductor module 1 is attached to the upper surface S7 of the cooler 2 using the second resin sheet 12 (step S104 in FIG. 5). For example, by applying pressure and heat to a pressure and temperature (e.g., about 200°C) that satisfy the curing conditions of the second resin sheet 12, the cooler 2 and the semiconductor module 1 are joined (adhered) by the second resin sheet 12. As a result, the semiconductor device according to this embodiment shown in FIG. 1 is completed.

[0033] [3. Functions and Effects] Here, an example of a semiconductor device according to a comparative example will be described with reference to FIG. 6 . As shown in FIG. 6 , the semiconductor device according to the comparative example differs from the semiconductor device according to the present embodiment shown in FIG. 1 in that the semiconductor module 1 is configured by stacking an insulating circuit board 13 and a semiconductor chip 5 in this order on the upper surface S1 of the heat sink 3. The insulating circuit board 13 may be, for example, a direct copper bonded (DCB) board. The insulating circuit board 13 includes an insulating layer 14 (e.g., ceramic), a conductive plate 4 disposed on the upper surface S8 of the insulating layer 14, and a cooling plate 15 (e.g., a metal plate) disposed on the lower surface S9 of the insulating layer 14. The semiconductor device according to the comparative example also includes a case 16 that houses the semiconductor module 1 and a silicone gel 17 that seals the semiconductor module 1 instead of the sealing resin 6. In addition, the heat sink 3 and the insulating circuit board 13 are bonded with a bonding material 18, the insulating circuit board 13 and the semiconductor chip 5 are bonded with a bonding material 10, and a compound 19 is placed between the heat sink 3 and the cooler 2.

[0034] In manufacturing the semiconductor device according to the comparative example, first, the bonding material 10 and the semiconductor chip 5 are placed in this order on the top surface S2 of the insulating circuit board 13 (conductive plate 4) (step S201 in FIG. 7 ). Next, the insulating circuit board 13, bonding material 10, and semiconductor chip 5 are heated together to melt the bonding material 10, and the insulating circuit board 13 and semiconductor chip 5 are bonded together (step S201 in FIG. 7 ). Next, bonding wires 11 are connected to the semiconductor chip 5 (step S202 in FIG. 7 ). Next, the bonding material 18 and the insulating circuit board 13 (including the semiconductor chip 5) are placed in this order on the top surface S1 of the heat sink 3 (step S203 in FIG. 7 ). Next, the heat sink 3, bonding material 18, insulating circuit board 13, and semiconductor chip 5 are heated together to melt the bonding material 18, and the heat sink 3 and insulating circuit board 13 are bonded together (step S203 in FIG. 7 ). Next, the lower end of the case 16 is bonded to the heat sink 3 using an adhesive (not shown) (step S204 in FIG. 7). Next, silicone gel 17 is poured into the case 16 to seal the heat sink 3, the insulating circuit board 13, and the semiconductor chip 5 (step S204 in FIG. 7). This completes the semiconductor module 1. Next, the lower surface of the semiconductor module 1 (including the lower surface S11 of the case 16 and the lower surface S6 of the heat sink 3) is attached to the upper surface S7 of the cooler 2 (step S205 in FIG. 7). At this time, a compound 19 is placed in the gap between the semiconductor module 1 and the cooler 2. As a result, the semiconductor device according to the comparative example shown in FIG. 6 is completed.

[0035] With this manufacturing procedure, in the semiconductor device according to the comparative example, a first thermal process is performed to melt the bonding material 10 when bonding the insulating circuit board 13 and the semiconductor chip 5, and a second thermal process is performed to melt the bonding material 18 when bonding the heat sink 3 and the insulating circuit board 13 with the bonding material 18. Therefore, the number of thermal processes is increased, which may cause warping of the semiconductor module 1 due to heat. Furthermore, if the semiconductor module 1 warps, a gap may form between the semiconductor module 1 and the cooler 2, potentially degrading heat dissipation. Furthermore, if the semiconductor module 1 is pressed against the cooler 2 to reduce the gap, stress may be applied to the semiconductor module 1, potentially causing damage (failure) of the semiconductor module 1. Furthermore, if a gap occurs, the compound 19 needs to be made thicker to eliminate the gap.

[0036] In contrast, in the semiconductor device according to this embodiment, as shown in FIG. 1 , the semiconductor module 1 includes a heat sink 3, a conductive plate 4 bonded to the upper surface S1 of the heat sink 3 by a first resin sheet 7, and a semiconductor chip 5 bonded to the upper surface of the conductive plate 4 by a bonding material 10. The cooler 2 is bonded to the lower surface S6 of the heat sink 3 by a second resin sheet 12. The first resin sheet 7 is made of a resin sheet having higher insulating properties than the second resin sheet 12, and the second resin sheet 12 is made of a resin sheet having higher thermal conductivity than the first resin sheet 7. The high insulating properties of the first resin sheet 7 electrically insulate the conductive plate 4 from the heat sink 3, and the first resin sheet 7 prevents the conductive plate 4 from being electrically connected to the heat sink 3. The high thermal conductivity of the second resin sheet 12 allows efficient heat conduction from the semiconductor module 1 to the cooler 2.

[0037] Furthermore, in the semiconductor device according to this embodiment, the first resin sheet 7 is used to bond the heat sink 3 and the conductive plate 4, and the second resin sheet 12 is used to bond the semiconductor module 1 and the cooler 2. This reduces the number of thermal processes required to melt the bonding material, thereby suppressing warping of the semiconductor module 1 due to heat. This reduces the gap between the semiconductor module 1 and the cooler 2, thereby preventing deterioration of heat dissipation. Furthermore, because the gap is reduced, the force pressing the semiconductor module 1 against the cooler 2 is reduced, preventing damage (failure) of the semiconductor module 1. Furthermore, the compound 19 (see FIG. 6 ) used to fill the gap between the semiconductor module 1 and the cooler 2 can be omitted. Although pressure and heat are applied to completely cure the semi-cured first resin sheet 7 and the second resin sheet 12, the curing temperature for the first resin sheet 7 and the second resin sheet 12 is lower than the temperature during the thermal process to melt the bonding material, so the effect of heating on warping is minimal. In particular, by hardening the first resin sheet 7 through the application of pressure and heat for resin sealing, which is performed in the resin sealing process, warping of the semiconductor module 1 due to heat can be further suppressed.

[0038] In other words, the inventors of the present disclosure have used different types of resin sheets (resin sheets with different properties) for the first resin sheet 7 and the second resin sheet 12, rather than the same type of resin sheet. Specifically, a resin sheet with a high level of insulation is used as the first resin sheet 7, and a resin sheet with a high level of thermal conductivity is used as the second resin sheet 12. By using resin sheets with different properties, a high level of insulation and thermal conductivity is achieved overall. With this configuration, the semiconductor device according to this embodiment can be configured such that the combination of the insulating layer 14, cooling plate 15, and bonding material 18 shown in FIG. 6 is replaced with the first resin sheet 7, and the compound 19 shown in FIG. 6 is replaced with the second resin sheet 12. As a result, the number of thermal processes for melting the bonding material (i.e., processes that affect warping of the semiconductor module 1) can be reduced.

[0039] [4. Modifications] (1) Note that, although the present embodiment has been described as an example in which the present invention is applied to a configuration (lead frame type) in which a lead frame is provided and the die pad of the lead frame serves as the conductive plate 4, other configurations may also be employed. For example, as shown in Fig. 8, the present invention may be applied to a known configuration (substrate type) in which the conductive plate 4 is a metal plate having no leads (inner leads, outer leads), and the heat sink 3, first resin sheet 7, and conductive plate 4 form an insulating circuit board 20. In the substrate type, terminal pins (not shown) or the like are used as main terminals (P terminals, N terminals, M terminals, etc.) for external connection.

[0040] Next, an example of a manufacturing method for a semiconductor device according to Modification (1) is described. First, the lower surface S3 of the conductive plate 4 is bonded (adhered) to the upper surface S1 of the heat sink 3 using a first resin sheet 7 to form an insulated circuit board 20 (step S301 in FIG. 9 ). Next, the bonding material 10 and the semiconductor chip 5 are placed in this order on the upper surface S2 of the insulated circuit board 20 (conductive plate 4) (step S301 in FIG. 9 ). Next, the entire insulated circuit board 20, bonding material 10, and semiconductor chip 5 are heated to melt the bonding material 10, bonding the insulated circuit board 20 and the semiconductor chip 5 together (step S301 in FIG. 9 ). Next, bonding wires 11 are connected to the semiconductor chip 5 (step S302 in FIG. 9 ). Next, a laser beam is irradiated onto the upper surface S4 of the first resin sheet 7 to form grooves 9 (step S302 in FIG. 9 ). Next, the insulating circuit board 20 and the semiconductor chip 5 are placed in a mold (not shown) for resin sealing, and the sealing resin 6 is injected to perform resin sealing (step S303 in FIG. 9). In this way, the semiconductor module 1 is formed.

[0041] Next, the lower surface of the semiconductor module 1 (including the lower surface S5 of the sealing resin 6 and the lower surface S6 of the heat sink 3) and the upper surface S7 of the cooler 2 are roughened to form an uneven surface (step S304 in FIG. 9 ). Next, the lower surface of the semiconductor module 1 (including the lower surface S5 of the sealing resin 6 and the lower surface S6 of the heat sink 3) is attached to the upper surface S7 of the cooler 2 using the second resin sheet 12 (step S304 in FIG. 9 ). As a result, the semiconductor device according to the modified example (1) shown in FIG. 8 is completed. Note that when applied to a board type, a case for housing the semiconductor module 1 may be provided. If a case is provided, the resin sealing process in step S303 in FIG. 9 may be replaced by a process of injecting silicone gel into the case after the case is attached.

[0042] (2) In the present embodiment, the grooves 9 are formed on the upper surface S4 of the first resin sheet 7, extending from the upper surface S4 of the first resin sheet 7 to the interior of the heat sink 3. However, other configurations may also be employed. For example, as shown in FIGS. 10 and 11 , when the first resin sheet 7 covers the entire upper surface S1 of the heat sink 3 except for the outer edge thereof, the grooves 9 may be formed in a region of the upper surface S1 of the heat sink 3 surrounding a contact region (hereinafter also referred to as a "second contact region 21") that is in contact with the first resin sheet 7 (i.e., a region not covered by the first resin sheet 7). In this case, the grooves 9 are configured to extend from the upper surface S1 of the heat sink 3 to the interior, surrounding the second contact region 21. Furthermore, the sealing resin 6 enters the grooves 9 through openings in the grooves 9 and fills the interior of the grooves 9. By allowing the sealing resin 6 to enter the grooves 9, even if moisture infiltrates from the outside (outer edge) of the structure sealed with the sealing resin 6 (heat sink 3, first resin sheet 7, conductive plate 4, bonding material 10, and semiconductor chip 5), the infiltrating moisture can be stopped by the sealing resin 6 in the grooves 9, and moisture can be prevented from infiltrating into the portion between the conductive plate 4 of the first resin sheet 7 and the heat sink 3. FIG. 11 is a diagram showing the top surface of the semiconductor module 1 when broken along line D-D in FIG. 10. The sealing resin 6, second resin sheet 12, and cooler 2 are not shown in FIG.

[0043] 1...Semiconductor module, 2...Cooler, 3...Heat sink, 4...Conductive plate, 5...Semiconductor chip, 6...Sealing resin, 7...First resin sheet, 8...First contact area (contact area), 9...Groove portion, 10...Joint material, 11...Bonding wire, 12...Second resin sheet, 13...Insulating circuit board, 14...Insulating layer, 15...Cooling plate, 16...Case, 17...Silicon gel, 18...Joint material, 19...Compound, 20...Insulating circuit board, 21...Second contact area (contact area)

Claims

1. A semiconductor device comprising: a semiconductor module having a heat sink, a conductive plate bonded to the upper surface of the heat sink by a first resin sheet, and a semiconductor chip bonded to the upper surface of the conductive plate by a bonding material; and a cooler bonded to the lower surface of the semiconductor module by a second resin sheet, wherein the first resin sheet has higher insulation properties than the second resin sheet, and the second resin sheet has higher thermal conductivity than the first resin sheet.

2. The semiconductor device according to claim 1, wherein the first resin sheet and the second resin sheet are sheets formed by hardening a thermosetting resin to which an inorganic filler has been added, and the temperature at which the first resin sheet and the second resin sheet harden is lower than the melting point of the bonding material.

3. The semiconductor device according to claim 2, wherein the semiconductor module has a sealing resin that seals the heat sink, the first resin sheet, the conductive plate, the bonding material, and the semiconductor chip, and the temperature at which the first resin sheet hardens is equal to or lower than the temperature at which the sealing resin hardens.

4. The semiconductor device according to claim 1, wherein the semiconductor module has a sealing resin that seals the heat sink, the first resin sheet, the conductive plate, the bonding material, and the semiconductor chip, the first resin sheet covering the entire upper surface of the heat sink, the conductive plate overlapping a portion of the upper surface of the first resin sheet excluding the outer edge, a groove portion is formed in the area of ​​the upper surface of the first resin sheet surrounding a contact area that is in contact with the conductive plate, the groove portion extending from the upper surface of the first resin sheet to the inside of the heat sink so as to surround the contact area, and the sealing resin penetrates into the groove portion.

5. The semiconductor device according to claim 1, wherein the semiconductor module has a sealing resin that seals the heat sink, the first resin sheet, the conductive plate, the bonding material, and the semiconductor chip, the first resin sheet covering the entire upper surface of the heat sink except for the outer edge, a groove portion is formed in the area of ​​the upper surface of the heat sink surrounding the contact area that is in contact with the first resin sheet, extending from the upper surface of the heat sink to the interior so as to surround the contact area, and the sealing resin penetrates into the groove portion.

6. The semiconductor device according to claim 1, wherein the semiconductor module has a sealing resin that seals the heat sink, the first resin sheet, the conductive plate, the bonding material, and the semiconductor chip, and the underside of the semiconductor module is an uneven surface that has been roughened.

7. The semiconductor device according to any one of claims 1 to 6, wherein the upper surface of the cooler is an uneven surface that has been roughened.