Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device according to an embodiment of the present invention comprises: a nitride semiconductor layer; a first insulating film provided on the nitride semiconductor layer; a first electrode which is positioned on the first insulating film and which is electrically connected to the nitride semiconductor layer; a second electrode which is positioned on the nitride semiconductor layer and which is electrically connected to the nitride semiconductor layer; a third electrode which has a first portion that is positioned on the nitride semiconductor layer and that is electrically connected to the nitride semiconductor layer, and a second portion that is positioned on the first portion and that has a length in a first direction in which the first electrode and the second electrode are aligned that is longer than the length of the first portion in the first direction; a first field plate electrode which is electrically connected to the second electrode and which extends in the direction of the third electrode; a second insulating film which is positioned between the first electrode and the third electrode; and an insulating part which includes a first insulating film and a second insulating film between an area from the first portion side to the first field plate electrode side. The first electrode is positioned between the second electrode and the third electrode, and the insulating part has a first region including anions.

Description

Semiconductor device and manufacturing method thereof

[0001] FIELD Embodiments of the present invention relate to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] Semiconductor elements such as transistors and diodes are used in circuits such as switching power supply circuits and inverter circuits. These semiconductor elements are required to have high breakdown voltage and low on-resistance. There is a trade-off between breakdown voltage and on-resistance that is determined by the element material.

[0003] Advances in technological development have enabled semiconductor devices to achieve low on-resistance close to the limits of silicon, the primary device material. To further improve breakdown voltage or further reduce on-resistance, a change in device material is necessary. By using nitride semiconductors such as gallium nitride and aluminum gallium nitride as the device material, the trade-off relationship determined by the device material can be improved. This makes it possible to dramatically increase the breakdown voltage and reduce the on-resistance of semiconductor devices.

[0004] Japanese Patent Application Laid-Open No. 2017-092083

[0005] The problem to be solved by the present invention is to provide a highly reliable semiconductor device.

[0006] a third electrode having a first portion located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, a second portion located on the first portion and having a length in a first direction in which the first electrode and the second electrode are aligned longer than the length of the first portion, a first field plate electrode electrically connected to the second electrode and extending toward the third electrode, a second insulating film located between the first electrode and the third electrode, and an insulating portion including the first insulating film and the second insulating film between the first portion and the first field plate electrode. The first electrode is located between the second electrode and the third electrode, and the insulating portion has a first region containing anions.

[0007] Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment. Schematic diagram of a semiconductor device according to an embodiment.

[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following description, the same or similar components will be denoted by the same reference numerals, and a description of a component that has already been described may be omitted.

[0009] In this specification, the term "nitride semiconductor layer" includes "GaN-based semiconductors." "GaN-based semiconductors" is a general term for semiconductors containing gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and those with intermediate compositions.

[0010] In this specification, "undoped" means that the impurity concentration is 2×10 １６ cm －３ This means that:

[0011] In this specification, in order to indicate the positional relationship of parts, etc., the upward direction of the drawing will be described as "up" and the downward direction of the drawing will be described as "down." In this specification, the concepts of "up" and "down" do not necessarily refer to the direction of gravity.

[0012] First Embodiment A semiconductor device according to a first embodiment includes a nitride semiconductor layer, a first insulating film (gate insulating film) provided on the nitride semiconductor layer, a first electrode (gate electrode) located on the first insulating film and electrically connected to the nitride semiconductor layer, a second electrode (source electrode) located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, a third electrode (drain electrode) located on the nitride semiconductor layer and having a first portion electrically connected to the nitride semiconductor layer, and a second portion located on the first portion and having a length in a first direction in which the first electrode and the second electrode are aligned longer than the length of the first portion, a first field plate electrode electrically connected to the second electrode and extending toward the third electrode, a second insulating film (interlayer insulating film) located between the first electrode and the third electrode, and an insulating portion including the first insulating film and the second insulating film between the first portion and the first field plate electrode. In embodiments including modifications of the first embodiment, some or all of the changed or added configurations can be adopted in other embodiments.

[0013] Fig. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. The semiconductor device is, for example, a HEMT (High Electron Mobility Transistor) 100 using a GaN-based semiconductor. Fig. 2 is a cross-sectional view of the semiconductor device 100 taken along line AA' in Fig. 1. Fig. 1 is a cross-sectional view of the semiconductor device 100 taken along line BB' in Fig. 2.

[0014] HEMT 100 comprises a substrate 1A, a buffer layer 1B, a nitride semiconductor layer 1 including a channel layer 1C (first nitride semiconductor layer) and a barrier layer 1D (second nitride semiconductor layer), a gate insulating film (first insulating film) 2, a gate electrode (first electrode) 3, a gate field plate electrode (third field plate electrode) 4, a source electrode (second electrode) 5, a first source field plate electrode (first field plate electrode) 6, a second source field plate electrode (fourth field plate electrode) 7, a drain electrode (third electrode) 8, a drain field plate electrode (second field plate electrode) 9 and an interlayer insulating film (second insulating film) 10.

[0015] The substrate 1A is made of, for example, silicon (Si). Other than silicon, for example, sapphire (Al ２O ３ ) or silicon carbide (SiC) can also be used.

[0016] A buffer layer 1B is provided on the substrate 1A. The buffer layer 1B has a function of reducing the lattice mismatch between the substrate 1A and the channel layer 1C. The buffer layer 1B is made of, for example, aluminum gallium nitride (Al Ｗ Ga １－Ｗ N (0<W≦1) multilayer structure.

[0017] The channel layer 1C is provided on the buffer layer 1B. The channel layer 1C is also called an electron transit layer. The channel layer 1C is made of, for example, undoped aluminum gallium nitride (Al Ｘ Ga １－Ｘ N (0≦X<1). More specifically, for example, it is undoped gallium nitride (GaN). The thickness of the channel layer 1C is, for example, 0.1 μm or more and 10 μm or less. In the embodiment, the thickness is the length (height) of each member in the stacking direction (Y direction) of the channel layer 1C and the barrier layer 1D, including the channel layer 1C.

[0018] The barrier layer 1D is provided on the channel layer 1C. The barrier layer 1D is also called an electron supply layer. The band gap of the barrier layer 1D is larger than the band gap of the channel layer 1C. The barrier layer 1D is made of, for example, undoped aluminum gallium nitride (Al Ｙ Ga １－Ｙ N (0<Y≦1, X<Y)). More specifically, for example, undoped Al ０．２５ Ga ０．７５ The barrier layer 1D has a thickness of, for example, 2 nm or more and 100 nm or less.

[0019] A heterojunction interface is formed between the channel layer 1C and the barrier layer 1D. Two-dimensional electron gas (2DEG) is formed at the heterojunction interface and serves as carriers for the HEMT 100.

[0020] The gate insulating film 2 is provided between the source electrode 5 and the drain electrode 8. The nitride semiconductor layer 1 and the gate insulating film 2 are stacked in the second direction. The gate insulating film 2 is, for example, an oxide or a nitride. The gate insulating film 2 is, for example, a silicon oxide (SiO２ ), silicon nitride (SiN), aluminum oxide, silicon oxynitride, or aluminum oxynitride. The gate insulating film 2 is a dense insulating film. The density of the gate insulating film 2 is, for example, 2 [g / cm ３ ] or more 3.16 [g / cm ３ The thickness of the gate insulating film 2 is, for example, 10 nm or more and 100 nm or less.

[0021] The gate electrode 3 is located on the gate insulating film 2 and is electrically connected to the nitride semiconductor layer 1. The gate electrode 3 is electrically connected to the channel layer 1C and the barrier layer 1D. The gate electrode 3 is connected to the barrier layer 1D via the gate insulating film 2, for example. The gate electrode 3 is provided between the source electrode 5 and the drain electrode 8.

[0022] The gate electrode 3 is an electrode having a plurality of fingers extending in the third direction (Z direction). Each of the comb-shaped fingers of the gate electrode 3 extends in the third direction and is aligned in the first direction (X direction). The gate electrode 3 is an electrode provided on a gate insulating film 2 provided on the channel layer 1C and the barrier layer 1D. The gate electrode 3 is connected to the channel layer 1C and the barrier layer 1D via the gate insulating film 2. The gate electrode 3 is in direct contact with the gate insulating film 2, for example. The gate electrode 3 is provided between the source electrode 5 and the drain electrode 8 in the first direction. A gate field plate electrode 4 is preferably provided on the gate electrode 3.

[0023] The third direction intersects with the first direction and the second direction. The first direction intersects with the third direction and the second direction. It is preferable that the third direction is perpendicular to a plane formed by the first direction and the second direction, the first direction is perpendicular to a plane formed by the third direction and the second direction, and the second direction is perpendicular to a plane formed by the third direction and the first direction.

[0024] The gate electrode 3 is made of, for example, titanium nitride (TiN).

[0025] A gate insulating film 2 is provided between the gate electrode 3 and the barrier layer 1D, and the semiconductor device 100 can be made into a MIS (Metal Insulator Semiconductor) type HEMT.

[0026] The gate field plate electrode 4 is electrically and directly connected to the gate electrode 3. The gate field plate electrode 4 is made primarily of, for example, aluminum. The gate field plate electrode 4 includes, for example, a columnar portion in contact with the gate electrode 3 and a plate-shaped portion in contact with the columnar portion. The columnar portion is sandwiched between the plate-shaped portion and the gate electrode 3. The width in the first direction of the plate-shaped portion of the gate field plate electrode 4 is preferably longer than the width of the gate electrode 3 in the first direction. The width in the first direction of the columnar portion of the gate field plate electrode 4 is preferably shorter than the width of the gate electrode 3 in the first direction. Another gate field plate electrode (not shown) connected to the gate electrode 3 may be provided. The end face of the gate field plate electrode 4 (including an optional gate field plate electrode (not shown)) on the drain electrode 8 side is preferably located closer to the source electrode 5 in the first direction than the end face of the drain field plate electrode 9 on the source electrode 5 side.

[0027] The source electrode 5 is an electrode having a plurality of fingers extending in the third direction. Each of the comb-shaped fingers of the source electrode 5 extends in the third direction and is aligned in the first direction (X direction). For example, the fingers of the source electrode 5 are sandwiched between the fingers of the gate electrode 3. The source electrode 5 is provided on the nitride semiconductor layer 1, and more specifically, on the channel layer 1C and the barrier layer 1D. The source electrode 5 is electrically connected to the channel layer 1C and the barrier layer 1D.

[0028] The source electrode 5 is, for example, a metal electrode. The source electrode 5 is, for example, an aluminum-based aluminum film containing 50 wt % or more of aluminum, or a laminated structure of titanium (Ti) and aluminum (Al). It is desirable for there to be an ohmic contact between the source electrode 5 and the barrier layer 1D.

[0029] The cross section of the source electrode 5 on the element region has, for example, a T-shape. The source electrode 5 includes, for example, a bottom portion which is a columnar portion in contact with the barrier layer 1D and an upper portion which is a plate-like portion in contact with the columnar portion. The columnar portion is sandwiched between the plate-like portion and the barrier layer 1D. The source electrode 5 preferably has a bottom portion and an upper portion whose lateral length is longer than the lateral length of the bottom portion.

[0030] The semiconductor device 100 preferably includes a first source field plate electrode 6. The first source field plate electrode 6 is made primarily of, for example, aluminum. Providing a field plate electrode can alleviate electric field concentration on the electrode. The first source field plate electrode 6 is directly and electrically connected to the source electrode 5.

[0031] The cross section of the first source field plate electrode 6 on the element region is, for example, T-shaped. The first source field plate electrode 6 includes, for example, a bottom portion that is a columnar portion in contact with the source electrode 5 and an upper portion that is a plate-shaped portion in contact with the columnar portion. The columnar portion is sandwiched between the plate-shaped portion and the source electrode 5. The width in the first direction of the plate-shaped portion of the first source field plate electrode 6 is preferably longer than the width in the first direction of the source electrode 5. The width in the first direction of the columnar portion of the first source field plate electrode 6 is preferably shorter than the width in the first direction of the source electrode 5. The end face of the first source field plate electrode 6 on the drain electrode 8 side is preferably located closer to the drain electrode 8 in the first direction than the end face of the gate electrode 3 on the drain electrode 8 side.

[0032] The semiconductor device 100 preferably includes a second source field plate electrode 7. The second source field plate electrode 7 is made mainly of, for example, aluminum. Providing a field plate electrode can alleviate electric field concentration on the electrode. The second source field plate electrode 7 is directly and electrically connected to the source electrode 5. The end face of the second source field plate electrode 7 on the gate electrode 3 side is preferably located closer to the drain electrode 8 in the first direction than the end face of the gate electrode 3 on the drain electrode 8 side.

[0033] The drain electrode 8 is provided on the channel layer 1C and the barrier layer 1D. The drain electrode 8 is electrically connected to the channel layer 1C and the barrier layer 1D. The drain electrode 8 is in contact with, for example, the barrier layer 1D.

[0034] The drain electrode 8 is, for example, a metal electrode. The drain electrode 8 has, for example, a laminated structure of titanium (Ti) and aluminum (Al). It is desirable that there is an ohmic contact between the drain electrode 8 and the barrier layer 1D.

[0035] The cross section of the drain electrode 8 on the element region has, for example, a T-shape. The drain electrode 8 includes, for example, a first portion 8a which is a columnar portion in contact with the barrier layer 1D and a second portion 8b which is a plate-like portion in contact with the columnar portion. The first portion 8a is electrically connected to the nitride semiconductor layer 1. The second portion 8b is located on the first portion 8a, and the length in the first direction in which the gate electrode 3 and the source electrode 5 are aligned is longer than the length of the first portion 8a in the first direction. The first portion 8a is sandwiched between the second portion 8b and the barrier layer 1D. It is preferable that the first portion 8a and the second portion 8b are directly electrically connected to each other.

[0036] The semiconductor device 100 preferably includes a drain field plate electrode 9. The drain field plate electrode 9 is made primarily of, for example, aluminum. Providing the field plate electrode can alleviate electric field concentration on the electrode. The drain field plate electrode 9 is directly and electrically connected to the drain electrode 8.

[0037] The cross section of the drain field plate electrode 9 on the element region is, for example, T-shaped. The drain field plate electrode 9 includes, for example, a third portion 9a which is a columnar portion in contact with the drain electrode 8, and a fourth portion 9b which is a plate-shaped portion. The third portion 9a is sandwiched between the fourth portion 9b and the drain electrode 8. The length in the first direction of the fourth portion 9b of the drain field plate electrode 9 is preferably longer than the length in the first direction of the second portion 8b of the drain electrode 8. The end face of the drain field plate electrode 9 on the side of the first source field plate electrode 6 is preferably located closer to the gate electrode 3 in the first direction than the end face of the drain electrode 8 on the side of the gate electrode 3.

[0038] 1, the drain field plate electrode 9 has a single T-shaped structure, but it can also be a multi-stage field plate electrode in which T-shaped members are stacked in the second direction. When the drain field plate electrode 9 has multiple stages, the columnar portion of the top stage is referred to as the fourth portion 9a. When the drain field plate electrode 9 has multiple stages, the plate-shaped portion of the top stage is referred to as the fourth portion 9b.

[0039] The distance between the source electrode 5 and the drain electrode 8 (the distance between the ends of the source electrode 5 and the drain electrode 8) is, for example, 5 μm or more and 30 μm or less.

[0040] The source electrode 5 and the drain electrode 8 may be configured to be in direct contact with the channel layer 1C.

[0041] The interlayer insulating film 10 is made of, for example, an oxide or a nitride. ２ ), silicon nitride (SiN), silicon oxynitride (SiON), or high dielectric constant (high-k) materials. High-k materials include hafnium oxide (HfO ２ ) and the like. The interlayer insulating film 10 is preferably a multi-layer insulating film. When the interlayer insulating film 10 is a multi-layer insulating film, the insulating films of the respective layers may be different types of insulating films. Each insulating film constituting the interlayer insulating film 10 is independently made of silicon oxide (SiO ２ ), silicon nitride (SiN), and silicon oxynitride (SiON).

[0042] The interlayer insulating film 10 is preferably in direct contact with the side surface of the drain electrode 8. The interlayer insulating film 10 is preferably in direct contact with the side surface of the drain field plate electrode 9.

[0043] The insulating section 20, which includes the gate insulating film 2 and the interlayer insulating film between the first section 8a side and the first source field plate electrode 6 side, preferably has a first region 11 containing anions.

[0044] Furthermore, the insulating section 20 including the gate insulating film 2 and the interlayer insulating film between the second section 8b side and the gate insulating film 2 side preferably has a first region 11 containing anions.

[0045] It is preferable that the insulating portion 20, which includes the gate insulating film 2 and the interlayer insulating film between the first portion 8 a side and the first source field plate electrode 6 side, and which includes the gate insulating film 2 and the interlayer insulating film between the second portion 8 b side and the gate insulating film 2 side, has a first region 20 containing anions.

[0046] The first region 11 is, for example, a region doped with anions. The insulating portion 20 may extend in the second direction beyond the range shown in FIG. 1. The insulating portion 20 is a region in an insulating film in the semiconductor device 100.

[0047] The first region 11 preferably extends in the third direction. The first region 11 is present in the element region, and may also be present in the element isolation region.

[0048] The first region 11 is preferably provided around the drain electrode 8 sandwiched between the finger portions of the gate electrodes 3 aligned in the first direction.

[0049] In addition to the interlayer insulating film 10 between the first portion 8 a side and the first source field plate electrode 6 side, a first region 11 may be included in the region in the gate insulating film 2. In the following, the description of the first region 11 in the interlayer insulating film 10 can be replaced with the description of the first region 11 in the gate insulating film 2.

[0050] The anions contained in the first region 11 are preferably halogen elements. The anions contained in the first region 11 are preferably ions of one or more elements selected from the group consisting of F, Cl, Br, and I.

[0051] The anion concentration (halogen element concentration) contained in the first region 11 is preferably equal to or lower than the carrier concentration of the two-dimensional electron gas. For example, the anion concentration (halogen element concentration) contained in the first region 11 is 4×10 １６ [ / cm ３ ] or more 8 x 10 １７ [ / cm ３ ] or less is preferable, and 8 × 10１６ [ / cm ３ ] or more 8 x 10 １７ [ / cm ３ ] or less is more preferable, and 4 × 10 １７ [ / cm ３ ] or more 8 x 10 １７ [ / cm ３ ] The following is even more preferred:

[0052] The first region 11 is preferably in direct contact with the drain electrode 8. The first region 11 is preferably not in direct contact with the gate electrode 3 and the source electrode 5.

[0053] The element type and element concentration (ion concentration) of the semiconductor layer or semiconductor region can be measured, for example, by SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy Dispersive X-ray Spectroscopy). Furthermore, the relative level of element concentration can also be determined from the level of carrier concentration determined, for example, by SCM (Scanning Capacitance Microscopy). Furthermore, distances such as the depth, thickness, width, and spacing of the impurity region can be determined, for example, by SIMS. Furthermore, distances such as the depth, thickness, width, and spacing of the impurity region can also be determined, for example, from a comparison image of an SCM image and an atom probe image.

[0054] The first region 11 preferably extends from the drain electrode 8 side to the gate electrode 3 side. The end of the first region 11 on the gate electrode 3 side is preferably located closer to the drain electrode 8 in the first direction than the end face of the first source field plate electrode 6 on the drain electrode 8 side.

[0055] 3 shows a partial schematic diagram of the periphery of the drain electrode 8. The range of the first region 11 shown in FIG. 3 is wider than the range of the first region 11 in FIG. 1. Negatively charging the interlayer insulating film 10 and / or the gate insulating film 2 around the drain electrode 8 reduces current collapse. Reducing current collapse suppresses an increase in on-resistance over time, improving the reliability of the semiconductor device 100. From the viewpoint of reducing current collapse, it is preferable that the first region 11 be included in the interlayer insulating film 10.

[0056] When the distance in the first direction from the end face of the second portion 8 b of the drain electrode 8 facing the gate electrode 3 to the end face of the first source field plate electrode 6 facing the drain electrode 8 is taken as d1 (the distance between A and B in FIG. 3 ), from the viewpoint of reducing current collapse, the distance d2 in the first direction from the end face of the second portion 8 b facing the gate electrode 3 to the end of the first region 11 facing the gate electrode 3 (the distance between A and C in FIG. 3 ) is preferably greater than 0 μm and less than d1, more preferably 0.2 μm or more and less than d1, and even more preferably 0.2 μm or more and less than (d1) / 2.

[0057] When the distance in the first direction from the end face of the second portion 8b of the drain electrode 8 on the gate electrode 3 side to the end face of the first portion 8a on the gate electrode 3 side is d3 (the distance between A and D in Figure 3), from the viewpoint of reducing current collapse, the distance d4 in the first direction from the end face of the second portion 8b on the gate electrode 3 side to the end of the first region 11 on the first portion 8a side (the distance between A and E in Figure 3) is preferably more than 0 [μm] and not more than d3, more preferably 0.2 [μm] or more and not more than d3, and even more preferably d3 (d4 = d3).

[0058] When the distance in the first direction from the end face of the second portion 8b of the drain electrode 8 on the gate electrode 3 side to the end face of the fourth portion 9b on the gate electrode 3 side is d5 (the distance between A and F in Figure 3), from the viewpoint of reducing current collapse, the distance d2 in the first direction from the end face of the second portion 8b on the gate electrode 3 side to the end of the first region 11 on the gate electrode 3 side is preferably longer than d5 and less than d1, more preferably d5 + 0.2 [μm] or more (the length obtained by adding 0.2 [μm] to d5) and d1 - 0.2 [μm] or less (the length obtained by subtracting 0.2 [μm] from d1), and even more preferably d5 + 0.2 [μm] or more and (d1) / 2 or less.

[0059] When the distance in the first direction from the end face of the second portion 8b of the drain electrode 8 on the gate electrode 3 side to the end face of the third portion 9a on the gate electrode 3 side is d6 (the distance between A and G in Figure 3), from the viewpoint of reducing current collapse, the distance d7 in the first direction from the end face of the second portion 8b on the gate electrode 3 side to the end of the first region 11 on the third portion 9a side is preferably more than 0 [μm] and not more than d6, more preferably not less than d3 and not more than d6, and even more preferably d6 (d7 = d6).

[0060] From the viewpoint of reducing current collapse, the first region 11 preferably contacts the corner of the second portion 8 b on the gate electrode 3 side and on the gate insulating film 2 side, and more preferably covers the corner. The first region 11 is preferably included in the interlayer insulating film 10 that covers the corner of the second portion 8 b on the gate electrode 3 side and on the gate insulating film 2 side.

[0061] From the viewpoint of reducing current collapse, it is preferable that the first region 11 contacts the corner of the fourth portion 9 b on the gate electrode 3 side and on the gate insulating film 2 side, and more preferable that the first region 11 covers the corner. It is preferable that the first region 11 is included in the interlayer insulating film 10 that covers the corner of the fourth portion 9 b on the gate electrode 3 side and on the gate insulating film 2 side.

[0062] The anion concentration in the first region 11 may be graded toward the first direction. The anion concentration in the first region 11 may be graded toward the first direction so that it is higher on the drain electrode 8 side and thinner on the gate electrode 3 side. The anion concentration in the first region 11 may be graded so that it is higher in a corner region on the gate insulating film 2 side of the surface of the second portion 8b facing the gate electrode 3 and lower on the gate electrode 3 side or the first portion 8a side. The anion concentration in the first region 11 may be graded so that it is higher in a corner region on the gate insulating film 2 side of the surface of the fourth portion 9b facing the gate electrode 3 and lower on the gate electrode 3 side or the third portion 9a side.

[0063] Current collapse is reduced by negatively charging the interlayer insulating film 10 around the drain electrode 8. The reduction in current collapse suppresses an increase in on-resistance over time, improving the reliability of the semiconductor device 100.

[0064] The first region 11 preferably extends from the gate insulating film 2 side toward the drain field plate electrode 9 side. The end of the first region 11 on the drain field plate electrode 9 side in the second direction is preferably located closer to the drain field plate electrode 9 than the end face of the second portion 8 b on the gate insulating film 2 side.

[0065] It is preferable that the first region 11 is included in the region in the interlayer insulating film 10 between the second portion 8 b side and the gate insulating film 2 side.

[0066] 4 is a partial schematic diagram of the periphery of the drain electrode 8. The range of the first region 11 shown in FIG. 4 is wider than the range of the first region 11 in FIG. 1. Negatively charging the interlayer insulating film 10 around the drain electrode 8 reduces current collapse. Reducing current collapse suppresses an increase in on-resistance over time, improving the reliability of the semiconductor device 100.

[0067] When the distance in the second direction from the end face of the second portion 8 b of the drain electrode 8 on the gate insulating film 2 side to the end face of the gate insulating film 2 on the drain electrode 8 side is d8 (the J-K distance in FIG. 4 ), from the viewpoint of reducing current collapse, the distance d9 in the second direction from the end face of the second portion 8 b on the gate insulating film 2 side to the end face of the first region 11 on the gate insulating film 2 side is preferably longer than 0 [nm] and not longer than d8 (or less than d8), more preferably longer than 0 [nm] and not longer than d8 - 20 [nm] (the distance obtained by subtracting 20 [nm] from d8), and even more preferably 0 [nm] or longer than (d8) / 2 and not longer than (d8) / 2 (or less than (d8) / 2).

[0068] When the distance in the second direction from the end face of the second portion 8b of the drain electrode 8 on the gate insulating film 2 side to the end face of the second portion 8b of the drain electrode 8 on the drain field plate electrode 9 side is d10 (the J-M distance in FIG. 4 ), from the viewpoint of reducing current collapse, the distance d11 in the second direction from the end face of the second portion 8b on the gate insulating film 2 side to the end face of the first region 11 on the drain field plate electrode 9 side (the J-N distance in FIG. 3 ) is preferably 0 nm or more, more preferably d10 + 100 nm or more (the length of d10 plus 100 nm), and even more preferably d10 + 500 nm or more (the length of d10 plus 500 nm). From the viewpoint of reducing current collapse, d11 (the J-N distance in FIG. 3 ) can be set to d10 or less.

[0069] When the distance in the second direction from the end face of the second portion 8 b of the drain electrode 8 on the gate insulating film 2 side to the end face of the fourth portion 9 b of the drain field plate electrode 9 on the drain electrode 8 side is d12 (the J-P distance in FIG. 4 ), from the viewpoint of reducing current collapse, d11 (the J-N distance in FIG. 3 ) is preferably equal to or greater than d12.

[0070] When the distance in the second direction from the end face of the second portion 8 b of the drain electrode 8 facing the gate insulating film 2 to the end face of the fourth portion 9 b of the drain field plate electrode 9 opposite to the drain electrode 8 side is taken as d13 (the distance between J and Q in FIG. 4 ), from the viewpoint of reducing current collapse, d11 (the distance between J and N in FIG. 3 ) is preferably equal to or greater than d13, and more preferably equal to or greater than d13 and equal to or less than d13 + 5 μm (the length obtained by adding 5 μm to d13).

[0071] The first region 11 is preferably included in the gate insulating film 2. A configuration in which the first region 11 is included in the interlayer insulating film 10, or a configuration in which the first region 11 is included in the interlayer insulating film 10 and the gate insulating film 2 is preferred.

[0072] When the first region 11 is included in the gate insulating film 2, it is preferable that the first region 11 is included within the region from the surface of the gate insulating film 2 on the barrier layer 1D side in the second direction to the end face of the second part 8b of the drain electrode 8 on the gate insulating film 2 side.

[0073] When the first region 11 is included in the gate insulating film 2, it is preferable that the first region 11 be included within a region from a position halfway through the thickness of the gate insulating film 2 from the surface of the gate insulating film 2 on the interlayer insulating film 10 side in the second direction to an end face of the second part 8 b of the drain electrode 8 on the gate insulating film 2 side.

[0074] The anion concentration in the first region 11 may be graded toward the second direction. The anion concentration in the first region 11 may be graded toward the second direction so as to be thinner on the gate insulating film 2 side. The anion concentration in the first region 11 may be graded so as to be higher on the surface side of the second portion 8 b facing the gate insulating film 2 and lower on the gate insulating film 2 side.

[0075] When the first region 11 is included in the gate insulating film 2, the anion concentration in the first region 11 included in the gate insulating film 2 may be graded toward the second direction. The anion concentration in the first region 11 included in the gate insulating film 2 may be graded toward the second direction so as to be higher on the drain electrode 8 side and lower on the barrier layer 1D side.

[0076] By providing the first region 11, current collapse on the drain electrode 8 side can be suppressed, and the semiconductor device 100 with excellent reliability can be obtained.

[0077] Anions may be contained in the gate insulating film 2 and the barrier layer 1D below the drain electrode 8. The concentration of anions contained in the interlayer insulating film 10 and the barrier layer 1D is preferably 0% or more and 30% or less of the average anion concentration in the first region 11.

[0078] It is preferable that no anions are contained around the gate electrode 3 side and / or the source electrode 5 side.

[0079] The semiconductor device 100 can be a normally-off type HEMT. FIG. 5 shows a schematic diagram of a normally-off type semiconductor device 101 as a modification of the first embodiment. The semiconductor device 101 includes a p-type GaN film 12 between the gate electrode 3 and the gate insulating film 2. Even in a normally-off type HEMT, providing a first region 11 makes it possible to obtain a semiconductor device with excellent reliability. The first region 11 of the semiconductor device 101 is included in the gate insulating film 2, but is not included in the interlayer insulating film 10. FIG. 5 is a schematic diagram of the CC' cross section of the semiconductor device 100 of FIG. 2.

[0080] The semiconductor device 100 can be a normally-off type HEMT. FIG. 6 is a schematic diagram of a normally-off type semiconductor device 102 as a modification of the first embodiment. A recess is provided in the barrier layer 1D of the semiconductor device 102, and the gate electrode 3 is connected to the channel layer 1C via the gate insulating film 2. Even in a normally-off type HEMT, providing a first region 11 makes it possible to obtain a semiconductor device with excellent reliability. The first region 11 of the semiconductor device 101 is included in the gate insulating film 2 and the interlayer insulating film 10. FIG. 6 is a schematic diagram of the CC' cross section of the semiconductor device 100 of FIG. 2.

[0081] Even when the first region 11 of the embodiment is included in a normally-off type HEMT, current collapse is reduced, and a semiconductor device with excellent reliability can be obtained.

[0082] Second Embodiment The semiconductor device of the second embodiment is a modification of the semiconductor device of the first embodiment. FIG. 7 shows a schematic cross-sectional view of a semiconductor device 103 of the second embodiment. The semiconductor device 103 of the second embodiment is common to the semiconductor device 100 of the first embodiment, except that the interlayer insulating film 10 is multi-layered. In embodiments including modifications of the first embodiment, some or all of the modified or added configurations can be adopted in other embodiments. Descriptions of content common to the embodiments will be omitted. In the second embodiment, as in the first embodiment, a semiconductor device 103 with reduced current collapse and excellent reliability can be provided. FIG. 7 is a schematic view of the CC' cross section of the semiconductor device 100 of FIG. 2.

[0083] 7 includes a third insulating film 10A, a fourth insulating film 10B, and a fifth insulating film 10C as the interlayer insulating film 10. The fourth insulating film 10B is located between the third insulating film 10A and the fifth insulating film 10C. The surface of the third insulating film 10A opposite to the gate insulating film 2 side is in direct contact with the second portion 8b of the drain electrode 8. The fifth insulating film 10C is an interlayer insulating film between the first field plate electrode 6 and the drain field plate electrode 9.

[0084] An insulating portion 20 including the gate insulating film 2 and the third insulating film 3A between the first portion 8a side and the first field plate electrode 6 side has a first region 11 containing anions.

[0085] A method for manufacturing the semiconductor device 103 will be described using an example in which the third insulating film 10A includes the first region 11. A flowchart of the method for manufacturing the semiconductor device 103 is shown in Fig. 8. The method for manufacturing the semiconductor device 103 will be described with reference to the schematic diagrams of Fig. 9 to Fig. 15. The schematic diagrams of Fig. 9 to Fig. 15 show a portion of the semiconductor device 104.

[0086] The method for manufacturing the semiconductor device 103 includes a step (S01) of implanting anions into the gate insulating film 2 on the nitride semiconductor layer 1 and / or the third insulating film 10A on the gate insulating film 2 to form a region into which the anions have been implanted; a step (S02) of opening the gate insulating film 2 and the third insulating film 10A in the region into which the anions have been implanted; and a step (S03) of forming the drain electrode 8 in the opened portion of the gate insulating film 2 and the third insulating film 10A.

[0087] FIG. 9 is a schematic diagram of a member having a gate insulating film 2 provided on a nitride semiconductor layer 1 and a third insulating film 10Aa provided on the gate insulating film 2. Using the member of FIG. 9 , a step (S01) of ion-implanting anions into the gate insulating film 2 on the nitride semiconductor layer 1 and / or the third insulating film 10Aa on the gate insulating film 2 to form an anion-implanted region is performed to obtain the member shown in the schematic diagram of FIG. 10 . A mask having an opening corresponding to a region where the first region 11 is to be formed is formed on the member of FIG. 9 , and anions are ion-implanted into the third insulating film 10Aa to obtain the member shown in the schematic diagram of FIG. 10 . The member shown in the schematic diagram of FIG. 10 includes an anion-implanted region 11. The implantation depth can be adjusted by adjusting the ion concentration acceleration voltage. Oblique ion implantation can create a concentration difference between the first and second directions. The anion-implanted region 11 becomes the first region 11. For example, it is preferable that the concentration of anions on the gate insulating film 2 side of the first region 11 present in the third insulating film 10A is lower than the concentration of anions on the fourth insulating film 10B side of the first region 11 present in the third insulating film 10A.

[0088] In the step (S01) of implanting anions into the gate insulating film 2 on the nitride semiconductor layer 1 and / or the third insulating film 10Aa on the gate insulating film 2 to form an anion-implanted region, the anions are implanted into the region where the drain electrode 8 is to be formed, but the ions are not implanted into the regions where the gate electrode 3 and the source electrode 5 are to be formed.

[0089] Next, openings are made in the third insulating film 10A and the gate insulating film 2 in the portion where the drain electrode 8 is to be formed, to obtain the member shown in the schematic diagram of Fig. 11. A step (S02) of openings is made in the gate insulating film 2 and the third insulating film 10A in the region 11 where anions have been implanted to the member shown in the schematic diagram of Fig. 10, to obtain the member shown in the schematic diagram of Fig. 11.

[0090] Next, drain electrode 8 is formed to obtain the component shown in the schematic diagram of Fig. 12. A step (S03) of forming drain electrode 8 in the openings of gate insulating film 2 and third insulating film 10A is performed on the component shown in the schematic diagram of Fig. 11 to obtain the component shown in the schematic diagram of Fig. 12. Regions 11 into which anions are implanted are included on both sides of drain electrode 8 in the first direction. After forming drain electrode 8, fourth insulating film 10B, a field plate electrode, and fifth insulating film 10C are formed, and semiconductor device 103 can be obtained.

[0091] The step (S01) of implanting anions into the gate insulating film 2 on the nitride semiconductor layer 1 and / or the third insulating film 10A on the gate insulating film 2 to form an anion-implanted region can be performed in multiple steps. For example, ion implantation is performed on a member having a gate insulating film 2 formed on the nitride semiconductor layer 1 as shown in the schematic diagram of FIG. 13 , and the third insulating film 10A is formed on the gate insulating film 2 implanted with anions, thereby obtaining the member shown in the schematic diagram of FIG. 14 . Next, ion implantation is performed on the third insulating film 10A to obtain the member shown in the schematic diagram of FIG. 15 . Then, the step (S02) of opening the gate insulating film 2 and the third insulating film 10A in the anion-implanted region and the step (S03) of forming a drain electrode 8 in the opening are performed, thereby obtaining the semiconductor device 103.

[0092] By performing the ion implantation step in multiple steps, the region and concentration of ions implanted can be controlled more precisely than when a single ion implantation step is performed.

[0093] FIG. 16 is a schematic diagram of a semiconductor device 104 that is a modification of the second embodiment. The interlayer insulating film 10 of the semiconductor device 104 includes a third insulating film 10Aa, a third insulating film 10Ab, a fourth insulating film 10B, and a fifth insulating film 10C. The third insulating film 10Aa, the third insulating film 10Ab, the fourth insulating film 10B, and the fifth insulating film 10C are stacked in this order from the gate insulating film 2 side. A portion of the gate electrode 3 extends on the third insulating film 10Ab. The surface of the third insulating film 10Aa facing the gate insulating film 2 is in direct contact with the gate insulating film 2. FIG. 16 is a schematic diagram of a CC' cross section of the semiconductor device 100 of FIG. 2.

[0094] The third insulating film 10Aa is provided closer to the gate insulating film 2 than the third insulating film 10Ab. The third insulating film 10Aa and the third insulating film 10Ab of the semiconductor device 104 in Fig. 16 are formed by dividing the third insulating film 10A in Fig. 7. When intentionally distinguishing between them, the third insulating film 10Aa can be referred to as the 3a insulating film 10Aa, and the third insulating film 10Ab can be referred to as the 3b insulating film 10Ab.

[0095] The third insulating film 10Aa is an interlayer insulating film between the gate electrode 3, the source electrode 5, the drain electrode 8, the second source field plate electrode 7, the first source field plate electrode, and the drain field plate electrode.

[0096] The third insulating film 10Ab is an interlayer insulating film between the gate electrode 3, gate field plate electrode 4, source electrode 5, drain electrode 8, second source field plate electrode 7, first source field plate electrode, and drain field plate electrode.

[0097] When the third insulating film 10Aa includes the first region 11, the average concentration of anions included in the first region 11 in the third insulating film 10Aa is preferably lower than the average concentration of anions included in the first region 11 in the third insulating film 10Ab. From the viewpoint of reducing an increase in Ron around the drain electrode 8, it is preferable that the anion concentration on the third insulating film 10Aa side is low and the anion concentration on the third insulating film 10Ab side is high.

[0098] A method for manufacturing the semiconductor device 104 will be described using an example in which the first region 11 is included in the third insulating film 10Aa, the third insulating film 10Ab, the fourth insulating film 10B, and the fifth insulating film 10C. Fig. 17 shows a flowchart of the method for manufacturing the semiconductor device 103. The method for manufacturing the semiconductor device 104 will be described with reference to the schematic diagrams of Fig. 18 to Fig. 23. The schematic diagrams of Fig. 18 to Fig. 23 show a portion of the semiconductor device 104.

[0099] The method for manufacturing the semiconductor device 104 includes the steps of: implanting anions into the gate insulating film 2 on the nitride semiconductor layer 1 and / or the third insulating film 10Ab on the gate insulating film 2 to form a region into which the anions have been implanted (S01); opening the gate insulating film 2 and the third insulating film 10Ab in the region into which the anions have been implanted (S02); forming the drain electrode 8 in the opened portion of the gate insulating film 2 and the third insulating film 10Ab (S03); forming the fourth insulating film 10B on the drain electrode 8 (S04); implanting anions into the fourth insulating film 10B on the drain electrode 8 (S05); opening the fourth insulating film 10B into which the anions have been implanted (S06); and forming the drain field plate electrode in the opened portion of the fourth insulating film 10B (S07).

[0100] FIG. 17 is a schematic diagram of a member having a gate insulating film 2 provided on a nitride semiconductor layer 1, a third insulating film 10Aa provided on the gate insulating film 2, and a third insulating film 10Ab provided on the third insulating film 10Aa. Using the member of FIG. 17 , a step (S01) of ion-implanting anions into the gate insulating film 2 on the nitride semiconductor layer 1 and / or the third insulating film 3Aa on the gate insulating film 2 (the third insulating film 10Ab, or the third insulating film 10Aa and the third insulating film 10Ab) to form an anion-implanted region is performed, thereby obtaining the member shown in the schematic diagram of FIG. 18 . A mask having an opening corresponding to a region where the first region 11 is to be formed is formed on the member of FIG. 17 , and anions are implanted into the third insulating film 10Ab to obtain the member shown in the schematic diagram of FIG. 18 . The member shown in the schematic diagram of FIG. 18 includes the anion-implanted region 11. The implantation depth can be adjusted by adjusting the ion concentration acceleration voltage. Oblique ion implantation can generate a concentration difference between the first direction and the second direction. In the step (S01) of implanting anions into the gate insulating film 2 on the nitride semiconductor layer 1 and / or the third insulating film 10Ab on the gate insulating film 2, ions may also be implanted into the third insulating film 10Aa, or ions may not be implanted into the third insulating film 10Aa.

[0101] In the step (S01) of implanting anions into the gate insulating film 2 on the nitride semiconductor layer 1 and / or the third insulating film 10Ab on the gate insulating film 2 to form a region into which the anions are implanted, the anions are implanted into the region in which the drain electrode 8 is to be formed, but the ion implantation is not performed into the regions in which the gate electrode 3 and the source electrode 5 are to be formed on the nitride semiconductor layer 1.

[0102] Next, openings are made in the gate insulating film 2, the third insulating film 10Aa, and the third insulating film 10Ab in the portion where the drain electrode 8 is to be formed, to obtain the member shown in the schematic diagram of Fig. 19. A step (S02) of making openings in the gate insulating film 2, the third insulating film 10Aa, and the third insulating film 10Ab in the region 11 where anions have been implanted is performed on the member shown in the schematic diagram of Fig. 18, to obtain the member shown in the schematic diagram of Fig. 19.

[0103] Next, a drain electrode 8 is formed to obtain the member shown in the schematic diagram of Fig. 20. Using the member shown in the schematic diagram of Fig. 19, a step (S03) of forming a drain electrode 8 in the opened portion is carried out to obtain the member shown in the schematic diagram of Fig. 20. Regions 11 into which anions are implanted are included on both sides of the drain electrode 8 in the first direction.

[0104] Next, a fourth insulating film 10B is formed to obtain the member shown in the schematic diagram of Fig. 21. Using the member shown in the schematic diagram of Fig. 20, a step (S04) of forming a fourth insulating film 10B on the drain electrode 8 is performed to obtain the member shown in the schematic diagram of Fig. 21.

[0105] Next, anions are formed in fourth insulating film 10B to obtain the member shown in the schematic diagram of Fig. 22. Using the member shown in the schematic diagram of Fig. 22, a step (S05) of ion-implanting anions into fourth insulating film 10B on drain electrode 8 is performed to obtain the member shown in the schematic diagram of Fig. 22. The distance in the first direction of region 11 into which anions are implanted and formed in third insulating film 10Ab and the distance in the first direction of region 11 into which anions are implanted and formed in fourth insulating film 10B may be the same or different.

[0106] Next, a field plate electrode is formed to obtain the component shown in the schematic diagram of Fig. 23. Semiconductor device 103 can be obtained. Using the component shown in the schematic diagram of Fig. 22, a step (S06) of opening fourth insulating film 10B into which anions have been implanted, and a step (S07) of forming a drain field plate electrode in the opened portion of fourth insulating film 10B are performed to obtain the component shown in the schematic diagram of Fig. 23. Further steps such as forming fifth insulating film 10C are performed to obtain semiconductor device 104.

[0107] By employing the semiconductor device manufacturing method of the embodiment, it is possible to selectively implant anions around the drain electrode 8 and, optionally, around the drain field plate electrode 9 to form the first region 11. By forming the first region 11 in a suitable region depending on the design of the semiconductor device, current collapse can be reduced, contributing to improved reliability of the semiconductor device.

[0108] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments may be embodied in various other forms, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. For example, components of one embodiment may be replaced or changed with components of another embodiment. These embodiments and modifications thereof are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0109] The following are the technical solutions of the embodiments. Technical Solution 1: A semiconductor device comprising a nitride semiconductor layer, a first insulating film provided on the nitride semiconductor layer, a first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer, a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, a first portion located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, and a third electrode having a second portion located on the first portion and having a length in a first direction in which the first electrode and the second electrode are arranged longer than the length of the first portion in the first direction. A first field plate electrode electrically connected to the second electrode and extending in the direction of the third electrode, a second insulating film located between the first electrode and the third electrode, and an insulating portion including the first insulating film and the second insulating film between the first portion side and the first field plate electrode side. The first electrode is located between the second electrode and the third electrode, and the insulating portion has a first region containing anions. Technical Solution 2: The semiconductor device according to Technical Solution 1, wherein the anions contained in the first region are ions of one or more elements selected from the group consisting of F, Cl, Br, and I. Technical Solution 3: The concentration of the anions contained in the first region is 4×10 １６ [ / cm ３ or more and 8×10 １７ [ / cm ３] or less. Technical Proposal 4 The semiconductor device according to any one of Technical Proposals 1 to 4, wherein the first region extends from the third electrode side to the first electrode side, and an end of the first region on the electrode 3 side is located closer to the third electrode than an end face of the first field plate electrode on the third electrode side in the first direction. Technical Proposal 5 The semiconductor device according to any one of Technical Proposals 1 to 5, wherein, when a distance in the first direction from an end face of the second portion of the third electrode on the first electrode side to an end face of the first field plate electrode on the third electrode side is d1, a distance in the first direction from the end face of the second portion on the first electrode side to the end face of the first region on the first electrode side is longer than 0 μm and shorter than d1. a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer; a third electrode having a first portion located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, and a second portion located on the first portion, the second portion having a length in a first direction in which the first electrode and the second electrode are aligned longer than a length of the first portion in the first direction; a first field plate electrode electrically connected to the second electrode and extending toward the third electrode; a second insulating film located between the first electrode and the third electrode; and an insulating portion including the first insulating film and the second insulating film between the second portion side and the first insulating film side, wherein the first direction is a direction in which the first electrode and the second electrode are aligned, the first electrode is located between the second electrode and the third electrode, and the insulating portion includes a first region containing anions. Technical Proposal 7 The semiconductor device according to Technical Proposal 6, further comprising a second field plate electrode on the third electrode, wherein the third electrode and the second field plate electrode are stacked in a second direction, the first region extends from the first insulating film side to the second field plate electrode side, and an end of the first region on the second field plate electrode side in the second direction is located closer to the second field plate electrode than an end face of the second portion on the first insulating film side.Technical Solution 8: The semiconductor device according to Technical Solution 6 or 7, wherein the first region is included in a region in the second insulating film between the second portion side and the first insulating film side. Technical Solution 9: The semiconductor device according to Technical Solution 7, wherein, when a distance in the second direction from an end face of the second portion of the third electrode on the first insulating film side to an end face of the first insulating film on the third electrode side is d8, a distance in the second direction from the end face of the second portion on the first insulating film side to an end face of the first region on the first insulating film side is greater than 0 μm and not greater than d8 or less than d8. Technical Solution 10: The semiconductor device according to Technical Solution 7 or 8, wherein, when a distance in the second direction from an end face of the second portion of the third electrode on the first insulating film side to an end face of the second portion of the third electrode on the second field plate electrode side is d10, a distance d11 in the second direction from the end face of the second portion on the first insulating film side to the end face of the first region on the second field plate electrode side is greater than 0 μm. a second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer; a third electrode located on the nitride semiconductor layer and having a first portion located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, and a second portion located on the first portion and having a length in a first direction in which the first electrode and the second electrode are aligned longer than a length of the first portion in the first direction; a first field plate electrode electrically connected to the second electrode and extending toward the third electrode; a second insulating film located between the first electrode and the third electrode; and an insulating portion including the first insulating film and the third insulating film between the first portion side and the first field plate electrode side, wherein the first direction is a direction in which the first electrode and the second electrode are aligned, the first electrode is located between the second electrode and the third electrode, and the second insulating film includes a third insulating film between the upper portion and the first insulating film, The insulating portion includes a first region containing anions.Technical Proposal 12: The semiconductor device according to Technical Proposal 11, wherein a surface of the third insulating film opposite to the first insulating film side is in direct contact with the second portion of the third electrode, or a surface of the third insulating film on the first insulating film side is in direct contact with the first insulating film. Technical Proposal 13: The semiconductor device according to Technical Proposal 11 or 12, further comprising: a second field plate electrode on the third electrode electrically connected to the third electrode; and a fourth insulating film on the third insulating film that is an interlayer insulating film for the second field plate electrode; and the first region is also included in the fourth insulating film. Technical Proposal 14: The semiconductor device according to Technical Proposal 13, wherein a concentration of anions on the first insulating film side of the first region present in the third insulating film is lower than a concentration of anions on the fourth insulating film side of the first region present in the third insulating film. Technical Proposal 15: The semiconductor device according to any one of Technical Proposals 11 to 14, wherein the first region is included in the second insulating film that covers a corner of the second portion on the first electrode side and on the first insulating film side. Technical Solution 16: A method for manufacturing a semiconductor device, comprising the steps of: implanting anions into a first insulating film on a nitride semiconductor layer and / or a third insulating film on the first insulating film to form a region into which the anions have been implanted; opening the first insulating film and the third insulating film in the region into which the anions have been implanted; and forming a drain electrode in the opened portion of the first insulating film and the third insulating film. Technical Solution 17: A method for manufacturing a semiconductor device according to Technical Solution 16, further comprising the steps of: forming a fourth insulating film on the third electrode; implanting anions into the fourth insulating film on the third electrode; opening the fourth insulating film into which the anions have been implanted; and forming a second field plate electrode in the opened portion of the fourth insulating film. Technical Solution 18: A method for manufacturing a semiconductor device according to Technical Solution 16 or 17, wherein the anions are ions of one or more elements selected from the group consisting of F, Cl, Br, and I. Technical Solution 19: The concentration of anions contained in the first region is 4×10 １６ [ / cm ３ ] or more 8 x 10 １７ [ / cm ３19. The method for manufacturing a semiconductor device according to any one of Technical Schemes 16 to 18, wherein ion implantation is not performed on a region where a gate electrode and a source electrode are formed on the nitride semiconductor layer.

[0110] 1: Nitride semiconductor layer 1A: Substrate 1B: Buffer layer 1C: Channel layer 1D: Barrier layer 2: Gate insulating film (first insulating film) 3: Gate electrode (first electrode) 4: Gate field plate electrode (third field plate electrode) 5: Source electrode (second electrode) 6: First source field plate electrode (first field plate electrode) 7: Second source field plate electrode (fourth field plate electrode) 8: Drain electrode (third electrode) 8a: First part 8b: Second part 9: Drain field plate electrode (second field plate electrode) 9a: Third part 9b: Fourth part 10: Interlayer insulating film (second insulating film) 10A: Third insulating film (third insulating film 10Aa, third insulating film 10Ab) 10B: Fourth insulating film 10C: Fifth insulating film 20: Insulating part 11: First region 12: GaN film 100: Semiconductor device 101: Semiconductor device 102: Semiconductor device 103: Semiconductor device 104: Semiconductor device

Claims

1. Nitride semiconductor layer, A first insulating film provided on the nitride semiconductor layer, A first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer, A second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, A third electrode having a first part located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, and a second part located on the first part, the length in the first direction in which the first electrode and the second electrode are aligned being longer than the length of the first part in the first direction, A first field plate electrode is electrically connected to the second electrode and extends in the direction of the third electrode, A second insulating film located between the first electrode and the third electrode, An insulating portion including the first insulating film and the second insulating film between the first part side and the first field plate electrode side, Equipped with, The first electrode is located between the second electrode and the third electrode. The insulating portion is a semiconductor device having a first region containing anions.

2. The semiconductor device according to claim 1, wherein the anions included in the first region are ions of one or more elements selected from the group consisting of F, Cl, Br, and I.

3. The anion concentration in the first region is 4 × 10 １６ [ / cm ３ ] 8 x 10 １７ [ / cm ３ The semiconductor device according to claim 1, wherein the semiconductor device is as follows:

4. The first region extends from the third electrode side to the first electrode side, The semiconductor device according to claim 1, wherein the end of the first region on the electrode 3 side is located on the third electrode side of the end face of the first field plate electrode on the third electrode side in the first direction.

5. The semiconductor device according to any one of claims 1 to 4, wherein, when d1 is the distance from the end face of the second portion of the third electrode on the first electrode side to the end face of the first field plate electrode on the third electrode side in the first direction, the distance from the end face of the second portion on the first electrode side to the end of the first region on the first electrode side in the first direction is greater than 0 [μm] and less than d1.

6. Nitride semiconductor layer, A first insulating film provided on the nitride semiconductor layer, A first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer, A second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, A third electrode having a first part located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, and a second part located on the first part, the length in the first direction in which the first electrode and the second electrode are aligned being longer than the length of the first part in the first direction, A first field plate electrode is electrically connected to the second electrode and extends in the direction of the third electrode, A second insulating film located between the first electrode and the third electrode, An insulating portion including the first insulating film and the second insulating film between the second portion and the first insulating film, Equipped with, The first direction is the direction in which the first electrode and the second electrode are aligned. The first electrode is located between the second electrode and the third electrode. The insulating portion is a semiconductor device including a first region containing anions.

7. A second field plate electrode is further provided on the third electrode, The third electrode and the second field plate electrode are stacked in the second direction. The first region extends from the first insulating film side to the second field plate electrode side, The semiconductor device according to claim 6, wherein the end of the first region on the second field plate electrode side in the second direction is located on the second field plate electrode side than the end face of the second part on the first insulating film side.

8. The semiconductor device according to claim 6, wherein the first region is included in the region of the second insulating film between the second part side and the first insulating film side.

9. The semiconductor device according to claim 7, wherein, when the distance from the end face of the second portion of the third electrode on the first insulating film side to the end face of the first insulating film on the third electrode side in the second direction is d8, the distance from the end face of the second portion on the first insulating film side to the end of the first region on the first insulating film side in the second direction is greater than 0 [μm] and less than or equal to d8 or less than d8.

10. The semiconductor device according to claim 7 or 8, where d10 is the distance from the end face of the second portion of the third electrode on the first insulating film side to the end face of the second portion of the third electrode on the second field plate electrode side, and d11 is the distance from the end face of the second portion on the first insulating film side to the end of the first region on the second field plate electrode side in the second direction, and d11 is greater than 0 [μm].

11. Nitride semiconductor layer, A first insulating film provided on the nitride semiconductor layer, A first electrode located on the first insulating film and electrically connected to the nitride semiconductor layer, A second electrode located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, A third electrode having a first part located on the nitride semiconductor layer and electrically connected to the nitride semiconductor layer, and a second part located on the first part, the length in the first direction in which the first electrode and the second electrode are aligned being longer than the length of the first part in the first direction, A first field plate electrode is electrically connected to the second electrode and extends in the direction of the third electrode, A second insulating film located between the first electrode and the third electrode, An insulating portion including the first insulating film and the third insulating film between the first part side and the first field plate electrode side, Equipped with, The first direction is the direction in which the first electrode and the second electrode are aligned. The first electrode is located between the second electrode and the third electrode. The second insulating film includes a third insulating film between the upper part and the first insulating film. The insulating portion is a semiconductor device including a first region containing anions.

12. The semiconductor device according to claim 11, wherein the surface of the third insulating film opposite to the first insulating film side is in direct contact with the second portion of the third electrode, or the surface of the third insulating film on the first insulating film side is in direct contact with the first insulating film.

13. The third electrode further comprises a second field plate electrode electrically connected to the third electrode, The third insulating film is further provided with a fourth insulating film which is an interlayer insulating film of the second field plate electrode, The semiconductor device according to claim 11, wherein the first region is also included in the fourth insulating film.

14. The semiconductor device according to claim 13, wherein the concentration of anions on the first insulating film side of the first region present in the third insulating film is lower than the concentration of anions on the fourth insulating film side of the first region present in the third insulating film.

15. The semiconductor device according to any one of claims 11 to 14, wherein the second insulating film covering the corner on the first electrode side of the second part on the first insulating film side includes the first region.

16. A step of ion implanting anions into a first insulating film on a nitride semiconductor layer and / or a third insulating film on the first insulating film to form a region in which anions are implanted, A step of opening the first insulating film and the third insulating film in the region where the anions are implanted, A method for manufacturing a semiconductor device, comprising the step of forming drain electrodes in the open portions of the first insulating film and the third insulating film.

17. A step of forming a fourth insulating film on the third electrode, A step of ion implanting anions into the fourth insulating film on the third electrode, The process of opening the fourth insulating film into which the anions have been ion-implanted, A method for manufacturing a semiconductor device according to claim 16, further comprising the step of forming a second field plate electrode in an open portion of the fourth insulating film.

18. The method for manufacturing a semiconductor device according to claim 16, wherein the anion is an ion of one or more elements selected from the group consisting of F, Cl, Br, and I.

19. The anion concentration in the first region is 4 × 10 １６ [ / cm ３ ] 8 x 10 １７ [ / cm ３ The method for manufacturing a semiconductor device according to claim 16, which is as follows:

20. A method for manufacturing a semiconductor device according to any one of claims 16 to 19, wherein ion implantation is not performed in the region on the nitride semiconductor layer where the gate electrode and source electrode are formed.