Power Conversion Equipment

Abstract

The power conversion device (100) includes a power converter (6) including a plurality of arms (13p, 13n) and a control device (5). Each of the plurality of arms (13p, 13n) has a plurality of converter cells (1) connected in cascade to one another, and each of the plurality of converter cells (1) has a plurality of switching elements (31p, 31n) and a capacitor (32). The control device (5) includes a power calculation unit (214) that calculates a capacitor flow-in power flowing into the capacitor (32) based on a voltage command value, an arm current, a capacitor voltage, and a power loss occurring in the converter cell (1), and a capacitance estimation unit (216) that estimates the capacitance of the capacitor (32) based on the capacitor flow-in power and the capacitor voltage.

Description

[Technical field]

[0001] The present disclosure relates to a power conversion device. [Background technology]

[0002] In recent years, modular multilevel converters (MMCs) have become known as high-voltage, large-capacity power conversion devices that are applied to high-voltage systems such as power grids. MMCs are composed of arms in which multiple unit converters called cells are cascaded. Each cell has multiple semiconductor switches and capacitors, and outputs the voltage across the capacitor or zero voltage by turning the semiconductor switches on and off.

[0003] The capacitance of the capacitor provided in the unit converter decreases due to aging, etc. Since the decrease in capacitance may lead to failure of the MMC type power converter, techniques for checking the deterioration state of the capacitor are known.

[0004] For example, the power conversion device disclosed in JP2010-511876A (Patent Document 1) includes a phase module shunt including a series circuit consisting of a submodule having a capacitor and a power semiconductor, and a capacitor diagnostic means for determining the capacitance of the capacitor in a time-dependent manner. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Special Publication No. 2010-511876 Summary of the Invention [Problem to be solved by the invention]

[0006] In Patent Document 1, the phase module branch current is integrated between the conduction and interruption of the power semiconductor of the submodule to obtain the charge change of the capacitor, and the change in capacitance of the capacitor of the phase module is determined based on the charge change and the voltage change of the capacitor. However, with the above configuration, in the section where the integration of the phase module branch current is performed, sampling at a high sampling frequency and high-speed calculation are required, which may increase the processing load.

[0007] An object of one aspect of the present disclosure is to provide a power conversion device that can reduce the processing load when estimating the capacitance of a capacitor of a converter cell. [Means for solving the problem]

[0008] According to an embodiment, there is provided a power conversion device that performs power conversion between an AC circuit and a DC circuit. The power conversion device includes a power converter including a plurality of arms for each phase of the AC circuit, and a control device that controls the power converter. Each of the plurality of arms has a plurality of converter cells cascaded to each other, and each of the plurality of converter cells has a plurality of switching elements and a capacitor connected to the plurality of switching elements. The control device includes a power calculation unit that calculates a capacitor flowing power flowing into a capacitor of the converter cell based on a voltage command value for the power converter, an arm current flowing through the arm including the converter cell, a capacitor voltage indicating a voltage of a capacitor of the converter cell, and a power loss occurring in the converter cell, and a capacitance estimation unit that estimates a capacitance of the capacitor based on the capacitor flowing power and the capacitor voltage. Effect of the Invention

[0009] According to the power conversion device according to the present disclosure, it is possible to reduce the processing load when estimating the capacitance of the capacitor of the converter cell. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram illustrating a configuration example of a power conversion device. [Diagram 2] FIG. 2 is a circuit diagram illustrating an example of a converter cell. [Diagram 3] FIG. 2 is a block diagram showing an example of a hardware configuration of a control device. [Figure 4] FIG. 2 is a diagram illustrating an internal configuration of a control device according to the first embodiment. [Diagram 5] FIG. 2 illustrates an example of a configuration of a basic control unit according to the first embodiment. [Figure 6] 4 is a block diagram showing an example of the configuration of an arm control unit according to the first embodiment. FIG. [Figure 7] 4 is a block diagram showing an example of the configuration of an individual cell control unit according to the first embodiment. FIG. [Figure 8] 4 is a block diagram showing an example of the configuration of an incoming power calculation unit according to the first embodiment. FIG. [Figure 9] 4 is a block diagram showing an example of the configuration of a frequency component extraction unit according to the first embodiment. FIG. [Figure 10] 4 is a block diagram showing an example of the configuration of a capacitance calculation unit according to the first embodiment. FIG. [Figure 11] FIG. 11 is a block diagram showing an example of a configuration of a basic control unit according to a second embodiment. [Figure 12] FIG. 11 is a block diagram showing an example of the configuration of an individual cell control unit according to a second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, the present embodiment will be described with reference to the drawings. In the following description, the same components are denoted by the same reference numerals. Their names and functions are also the same. Therefore, detailed description thereof will not be repeated.

[0012] [Configuration underlying each embodiment] <Overall composition> FIG. 1 is a diagram showing a configuration example of a power conversion device. Referring to FIG. 1, a power conversion device 100 is connected between an AC circuit 2 and a DC circuit 4. The DC circuit 4 is, for example, a DC power system including a DC transmission network or the like, or a DC terminal of another power conversion device. In the latter case, a BTB (Back To Back) system for connecting AC power systems having different rated frequencies or the like is configured by linking two power converters. The DC circuit 4 may be configured to include a power storage device connected to the DC terminal of the power converter 6. The power storage device includes, for example, an electric double layer capacitor or a storage battery such as a lithium ion battery.

[0013] The power conversion device 100 includes a self-excited power converter 6 that performs power conversion between a DC circuit 4 and an AC circuit 2, and a control device 5 for controlling the power converter 6. Typically, the power converter 6 is configured by a modular multilevel converter including a plurality of converter cells (corresponding to "cells" in FIG. 1) 1 connected in series with each other. A "converter cell" is also called a "sub module" or a "unit converter."

[0014] In the example of Fig. 1, the power converter 6 includes a plurality of arms for each phase of the AC circuit 2. Specifically, the power converter 6 includes a plurality of leg circuits 8u, 8v, 8w (hereinafter, collectively referred to as "leg circuits 8" when referring to any one of them) connected in parallel between a positive DC terminal (i.e., a high-potential DC terminal) Np and a negative DC terminal (i.e., a low-potential DC terminal) Nn. The leg circuits 8 are connected between the AC circuit 2 and the DC circuit 4, and perform power conversion between the two circuits.

[0015] AC terminals Nu, Nv, and Nw provided in leg circuits 8u, 8v, and 8w corresponding to the U-phase, V-phase, and W-phase of the AC circuit 2, respectively, are connected to the AC circuit 2 via a transformer 3. The AC circuit 2 is, for example, a three-phase AC power system including an AC power source. For ease of illustration, FIG. 1 does not show the connection between the AC terminals Nv, Nw and the transformer 3. DC terminals (i.e., the positive DC terminal Np and the negative DC terminal Nn) provided in common to each leg circuit 8 are connected to the DC circuit 4.

[0016] Instead of using the transformer 3 in Fig. 1, the leg circuits 8u, 8v, 8w may be configured to be connected to the AC circuit 2 via an interconnection reactor. Furthermore, instead of the AC terminals Nu, Nv, Nw, the leg circuits 8u, 8v, 8w may each be provided with a primary winding, and the leg circuits 8u, 8v, 8w may be AC-connected to the transformer 3 or the interconnection reactor via a secondary winding magnetically coupled to the primary winding. In this case, the primary winding may be the reactors 7a, 7b described below. That is, the leg circuit 8 is electrically (i.e., DC- or AC-connected) connected to the AC circuit 2 via a connection part provided in each leg circuit 8u, 8v, 8w, such as the AC terminals Nu, Nv, Nw or the above-mentioned primary winding.

[0017] The leg circuit 8u includes a positive side arm 13pu from the positive DC terminal Np to the AC terminal Nu, and a negative side arm 13nu from the negative DC terminal Nn to the AC terminal Nu. A connection point between the positive side arm 13pu and the negative side arm 13nu is connected to the transformer 3 as the AC terminal Nu. The positive DC terminal Np and the negative DC terminal Nn are connected to the DC circuit 4. The leg circuit 8v includes a positive side arm 13pv and a negative side arm 13nv, and the leg circuit 8w includes a positive side arm 13pw and a negative side arm 13nw.

[0018] Hereinafter, when referring to the positive arms 13pu, 13pv, 13pw collectively or arbitrarily, they will be referred to as "positive arm 13p." When referring to the negative arms 13nu, 13nv, 13nw collectively or arbitrarily, they will be referred to as "negative arm 13n." When referring to the positive arms 13pu, 13pv, 13pw and the negative arms 13nu, 13nv, 13nw collectively or arbitrarily, they will be referred to as "arm 13."

[0019] Since the leg circuits 8v, 8w have the same configuration as the leg circuit 8u, the leg circuit 8u will be described below as a representative. In the leg circuit 8u, the positive side arm 13pu includes a plurality of converter cells 1_1 to 1_M connected in cascade to each other and a reactor 7a. The plurality of converter cells 1 and the reactor 7a are connected in series to each other. The negative side arm 13nu includes a plurality of converter cells 1_1 to 1_M connected in cascade to each other and a reactor 7b. The plurality of converter cells 1 and the reactor 7b are connected in series to each other.

[0020] In this embodiment, for example, the number of converter cells included in each arm 13 is M, where M is greater than or equal to 2. Converter cells 1_1 to 1_M may be collectively referred to as converter cells 1. Values ​​and variables after the underscores in converter cells 1_1 to 1_M indicate the index of converter cell 1. An arbitrary converter cell 1 may be referred to as "converter cell 1_i" using index i. However, index i is not related to the physical arrangement of converter cells 1.

[0021] The reactor 7a may be inserted at any position in the positive arm 13pu, and the reactor 7b may be inserted at any position in the negative arm 13nu. There may be a plurality of reactors 7a and a plurality of reactors 7b. The inductance values ​​of the reactors may be different from each other. Furthermore, only the reactor 7a in the positive arm 13pu or only the reactor 7b in the negative arm 13nu may be provided.

[0022] The power conversion device 100 further includes an AC voltage detector 10, an AC current detector 15, DC voltage detectors 11a and 11b, and arm current detectors 9a and 9b provided in each leg circuit 8. These detectors measure electrical quantities (i.e., current, voltage) used to control the power conversion device 100. Signals detected by these detectors are input to the control device 5.

[0023] The AC voltage detector 10 detects the U-phase AC voltage Vacu, the V-phase AC voltage Vacv, and the W-phase AC voltage Vacw (hereinafter collectively referred to as "AC voltage Vac") of the AC circuit 2. The AC current detector 15 detects the U-phase AC current actual value Isysu, the V-phase AC current actual value Isysv, and the W-phase AC current actual value Isysw of the AC circuit 2. The DC voltage detector 11a detects the DC voltage Vdcp of the positive DC terminal Np connected to the DC circuit 4. The DC voltage detector 11b detects the DC voltage Vdcn of the negative DC terminal Nn connected to the DC circuit 4.

[0024] The arm current detectors 9a and 9b provided in the U-phase leg circuit 8u detect the positive arm current Ipu flowing in the positive arm 13pu and the negative arm current Inu flowing in the negative arm 13nu. The arm current detectors 9a and 9b provided in the V-phase leg circuit 8v detect the positive arm current Ipv and the negative arm current Inv. The arm current detectors 9a and 9b provided in the W-phase leg circuit 8w detect the positive arm current Ipw and the negative arm current Inw.

[0025] In the following description, the positive arm currents Ipu, Ipv, and Ipw are collectively referred to as the positive arm current Iarmp. The negative arm currents Inu, Inv, and Inw are collectively referred to as the negative arm current Iarmn. The positive arm current Iarmp and the negative arm current Iarmn are collectively referred to as the arm current Iarm.

[0026] As shown in FIG. 1, AC terminal Nu, which is a connection point between positive arm 13pu and negative arm 13nu of leg circuit 8u, is connected to transformer 3. Therefore, AC current Iacu flowing from AC terminal Nu to transformer 3 has a current value obtained by subtracting negative arm current Inu from positive arm current Ipu. The same is true for AC currents Iacv and Iacw. Therefore, "Iacu = Ipu - Inu", "Iacv = Ipv - Inv", and "Iacw = Ipw - Inw" are established. Hereinafter, AC currents Iacu, Iacv, and Iacw output from power converter 6 are also collectively referred to as "AC current Iac".

[0027] The positive DC terminals of the leg circuits 8u, 8v, 8w of each phase are commonly connected as a positive DC terminal Np, and the negative DC terminals are commonly connected as a negative DC terminal Nn. From this configuration, the DC current Idc flowing from the positive terminal of the DC circuit 4 and returning to the DC circuit 4 via the negative terminal is defined as "Idc = (Ipu + Ipv + Ipw + Inu + Inv + Inw) / 2".

[0028] If the DC current component included in the leg current is shared equally by each phase, the current capacity of the cells can be made equal. Considering this, the difference between the leg current and 1 / 3 of the DC current value can be calculated as the current value of the circulating current that does not flow in the DC circuit 4 but flows between the legs of each phase. Therefore, if the circulating currents of the U phase, V phase, and W phase are Izu, Izv, and Izw, respectively, then "Izu = (Ipu + Inu) / 2 - Idc / 3", "Izv = (Ipv + Inv) / 2 - Idc / 3", and "Izw = (Ipw + Inw) / 2 - Idc / 3" are established. Hereinafter, the circulating currents Izu, Izv, and Izw are also collectively referred to as "circulating current Iz".

[0029] <Example of converter cell configuration> Fig. 2 is a circuit diagram showing an example of a converter cell. The converter cell 1 shown in Fig. 2 has a circuit configuration called a half-bridge configuration. The converter cell 1 includes a series body formed by connecting two switching elements 31p and 31n in series, a capacitor 32 as a power storage element, a voltage detector 33, a bypass switch 34, and a cooling fin 35 for cooling the switching elements 31p and 31n. The series body and the capacitor 32 are connected in parallel. The voltage detector 33 detects a capacitor voltage Vc, which is the voltage across the capacitor 32.

[0030] The two switching elements 31p and 31n are configured by connecting a free wheel diode in anti-parallel to a self-extinguishing semiconductor switching element such as an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), or a GCT (Gate Commutated Turn-off) thyristor. The capacitor 32 is mainly a film capacitor or the like.

[0031] In the following description, the switching elements 31p and 31n are also collectively referred to as the switching element 31. Moreover, the on / off of the semiconductor switching element in the switching element 31 is simply described as "on / off of the switching element 31." The switching elements 31p and 31n are switched on and off according to gate signals Gp and Gn received from the control device 5, respectively.

[0032] 2, both terminals of switching element 31n are input / output terminals G1, G2. The voltage across capacitor 32 and zero voltage are output by the switching operations of switching elements 31p and 31n. For example, when switching element 31p is on and switching element 31n is off, the voltage across capacitor 32 is output. When switching element 31p is off and switching element 31n is on, zero voltage is output.

[0033] The bypass switch 34 is connected between the input / output terminals G1, G2. The bypass switch 34 is connected in parallel with the switching element 31n. The bypass switch 34 is turned on in response to a drive signal BP received from the control device 5, and the input / output terminals G1, G2 are bypassed (i.e., the converter cell 1 is short-circuited). For example, when an element of the converter cell 1 fails, the bypass switch 34 is used to short-circuit the converter cell 1. As a result, even if any converter cell 1 fails, the power converter 6 can continue to operate by using the other converter cells 1.

[0034] The cooling fins 35 are thermally connected to the cooling media WI, WO for cooling the switching elements 31p, 31n. The cooling media WI, WO are, for example, pure water, and are also called cooling water. The cooling media WI, WO are circulated by a pump (not shown). The cooling medium WI is the cooling water that flows into the cooling fins 35, and the cooling medium WO is the cooling water that flows out from the cooling fins 35.

[0035] In addition, temperature detectors DWI, DWO are provided inside or outside the converter cell 1. The temperature detector DWI detects a temperature Twi of the cooling medium WI flowing into the cooling fins 35, and outputs the temperature Twi to the control device 5. The temperature detector DWO detects a temperature Two of the cooling medium WO flowing out from the cooling fins 35, and outputs the temperature Two to the control device 5.

[0036] In the example of Fig. 2, the temperature detectors DWI and DWO are provided for each converter cell 1. However, there may be a configuration in which the cooling medium WI input to each cooling fin 35 branches off from a connection point F1 of the piping and is supplied, and the cooling medium WO output from each cooling fin 35 merges with a connection point F2 of the piping. In this case, the temperature detector DWI may be provided at the connection point F1, and the temperature detector DWO may be provided at the connection point F2. Note that the temperatures of the cooling medium WI branching off from the connection point F1 and input to each cooling fin 35 are all the same, and the temperatures of the cooling medium WO output from each cooling fin 35 and merging with the connection point F2 are also all the same.

[0037] In this embodiment, a case will be described in which the converter cell 1 has a half-bridge cell configuration shown in Fig. 2. However, the converter cell 1 may be, for example, a converter cell to which a full-bridge configuration circuit, a circuit called a clamped double cell, or the like is applied.

[0038] <Example of control device hardware configuration> Fig. 3 is a block diagram showing an example of a hardware configuration of a control device. The control device 5 in Fig. 3 is configured based on a computer. Referring to Fig. 3, the control device 5 includes one or more input converters 70, one or more S / H (sample and hold) circuits 71, a multiplexer (MUX: multiplexer) 72, an A / D converter 73, one or more CPUs (Central Processing Units) 74, a RAM (Random Access Memory) 75, a ROM (Read Only Memory) 76, one or more input / output interfaces 77, an auxiliary storage device 78, and a bus 79 connecting the above components to each other.

[0039] The input converter 70 includes an auxiliary transformer for each input channel, and each auxiliary transformer converts the detection signal from each electrical quantity detector in FIG. 1 into a signal with a voltage level suitable for subsequent signal processing.

[0040] A sample-and-hold circuit 71 is provided for each input converter 70. The sample-and-hold circuit 71 samples and holds a signal representing an electrical quantity received from the corresponding input converter 70 at a specified sampling frequency.

[0041] The multiplexer 72 sequentially selects the signals held in the multiple sample-and-hold circuits 71. The A / D converter 73 converts the signal selected by the multiplexer 72 into a digital value. Note that by providing multiple A / D converters 73, A / D conversion may be performed in parallel on detection signals of multiple input channels.

[0042] The CPU 74 controls the entire control device 5 and executes arithmetic processing according to a program. The RAM 75 as a volatile memory and the ROM 76 as a non-volatile memory are used as the main memory of the CPU 74. The ROM 76 stores programs and setting values ​​for signal processing. The auxiliary storage device 78 is a non-volatile memory with a larger capacity than the ROM 76, and stores programs, data on detected electric quantity values, and the like.

[0043] The input / output interface 77 is an interface circuit for communication between the CPU 74 and an external device.

[0044] At least a part of the control device 5 may be configured using circuits such as a field programmable gate array (FPGA) and an application specific integrated circuit (ASIC). Alternatively, at least a part of the control device 5 may be configured using analog circuits.

[0045] Each embodiment will now be described in detail. Embodiment 1 <Control device functional configuration> (Internal configuration overview) Fig. 4 is a diagram showing an internal configuration of the control device according to the first embodiment. Referring to Fig. 4, control device 5 includes HMI (Human Machine Interface) 501, U-phase basic control unit 502U, V-phase basic control unit 502V, W-phase basic control unit 502W, U-phase positive side arm control unit 503UP, U-phase negative side arm control unit 503UN, V-phase positive side arm control unit 503VP, V-phase negative side arm control unit 503VN, W-phase positive side arm control unit 503WP, and W-phase negative side arm control unit 503WN. Note that in this specification, various electrical quantities used for calculations in these control units constituting control device 5 are converted into units of the PU (Per Unit) method.

[0046] In the following description, U-phase basic control unit 502U, V-phase basic control unit 502V, and W-phase basic control unit 502W are also collectively referred to as "basic control unit 502." U-phase positive side arm control unit 503UP, V-phase positive side arm control unit 503VP, and W-phase positive side arm control unit 503WP are also collectively referred to as "positive side arm control unit 503P." U-phase negative side arm control unit 503UN, V-phase negative side arm control unit 503VN, and W-phase negative side arm control unit 503WN are also collectively referred to as "negative side arm control unit 503N." Positive side arm control unit 503P and negative side arm control unit 503N are also collectively referred to as "arm control unit 503."

[0047] The configuration of the basic control unit 502 and the arm control unit 503 is realized by, for example, a processing circuit. The processing circuit may be dedicated hardware, or may be the CPU 74 that executes a program stored in the internal memory of the control device 5. When the processing circuit is dedicated hardware, the processing circuit is configured by, for example, an FPGA, an ASIC, or a combination of these.

[0048] The basic control unit 502 of each phase generates an arm voltage command value Varmpr for the positive arm 13p, Varmnr for the negative arm 13n, a capacitor voltage command value Vcpr for the positive arm 13p, and a capacitor voltage command value Vcnr for the negative arm 13n, using the electrical quantities measured by the above-mentioned detectors. In the following description, when it is not specified which arm among the arms, it is simply described as arm voltage command value Varmr and capacitor voltage command value Vcr. In addition, the basic control unit 502 generates a reference phase θp detected from the AC current Iac. The arm voltage command value Varmr is a command value for the arm voltage output from the arm including the converter cell 1.

[0049] The arm control unit 503 generates gate signals Gp, Gn for controlling the on and off of the switching elements 31p, 31n provided in each converter cell 1 constituting the arm based on each arm voltage command value Varmr, the capacitor voltage command value Vcr, and the reference phase θp, and outputs the gate signals Gp, Gn to each converter cell 1.

[0050] (Example of basic control unit configuration) 5 is a diagram showing an example of the configuration of the basic control unit according to the embodiment 1. With reference to FIG. 5, basic control unit 502 includes an arm voltage command generating unit 601, a capacitor voltage command generating unit 610, and a reference phase detecting unit 620.

[0051] The arm voltage command generating unit 601 generates an arm voltage command value Varmpr for the M converter cells 1 included in the positive arm 13p and an arm voltage command value Varmnr for the M converter cells 1 included in the negative arm 13n. The arm voltage command generating unit 601 outputs the arm voltage command value Varmpr to the positive arm control unit 503P and outputs the arm voltage command value Varmnr to the negative arm control unit 503N. Hereinafter, the arm voltage command values ​​Varmpr and Varmnr are also collectively referred to as the "arm voltage command value Varmr".

[0052] The capacitor voltage command generating unit 610 generates a capacitor voltage command value Vcrp for the capacitor 32 of the M converter cells 1 included in the positive arm 13p, and generates a capacitor voltage command value Vcrn for the capacitor 32 of the M converter cells 1 included in the negative arm 13n. The capacitor voltage command generating unit 610 outputs the capacitor voltage command value Vcrp to the positive arm control unit 503P, and outputs the capacitor voltage command value Vcrn to the negative arm control unit 503N.

[0053] The capacitor voltage command value Vcrp is set to, for example, the average voltage of the capacitor 32 of each converter cell 1 included in the positive side arm 13p, and the capacitor voltage command value Vcrn is set to, for example, the average voltage of the capacitor 32 of each converter cell 1 included in the negative side arm 13n. Hereinafter, the capacitor voltage command values ​​Vcrp, Vcrn are also collectively referred to as the "capacitor voltage command value Vcr."

[0054] The reference phase detection unit 620 detects a reference phase θp, which is the phase of the frequency synchronized with the AC voltage Vac output from the power converter 6, from the AC current Vac of each phase.

[0055] The following describes a specific configuration of the valve branch voltage command generating unit 601. The valve branch voltage command generating unit 601 includes an AC current control unit 603, a DC current control unit 604, a circulating current control unit 605, a command distributor 606, an AC current limiter 608, and a DC current limiter 609.

[0056] The AC current limiter 608 generates an AC current command value Iacref* by limiting the AC current command value Iacref to within a range R1 indicated by the AC current limit, based on the M abnormality signals Emp and the M abnormality signals Emn. The M abnormality signals Emp each indicate an abnormality in the capacitors 32 of the M converter cells 1 included in the positive arm 13p. The M abnormality signals Emn each indicate an abnormality in the capacitors 32 of the M converter cells 1 included in the negative arm 13n. Hereinafter, the abnormality signals Emp and Emn are also collectively referred to as "abnormality signals Em."

[0057] Specifically, when the capacitance of the capacitor 32 in at least one converter cell 1 of the M converter cells 1 included in each arm 13 is less than the threshold value Th (for example, when at least one of the M abnormality signals Em indicates an abnormality), the AC current limiter 608 outputs a value obtained by limiting the AC current command value Iacref to a value equal to or greater than the lower limit value Imin1 and equal to or less than the upper limit value Imax1 (i.e., within the range R1) as the AC current command value Iacref*. On the other hand, when the capacitance of the capacitor 32 in at least one converter cell 1 of the M converter cells 1 included in each arm 13 is equal to or greater than the threshold value Th, the AC current limiter 608 does not execute the above-mentioned limitation and outputs the AC current command value Iacref as it is. In this case, "Iacref*=Iacref".

[0058] The AC current control unit 603 executes control to make the AC current Iac output from the power converter 6 follow the AC current command value Iacref (or the AC current command value Iacref*). Specifically, the AC current control unit 603 generates an AC control command value Vacr by feedback control for making the deviation between the AC current Iac and the AC current command value Iacref zero, and feedforward control of the AC voltage Vac of the AC circuit 2. That is, the AC current control unit 603 generates an AC control command value Vacr for making the AC current Iac follow the AC current command value Iacref. The AC current command value Iacref is set in advance by, for example, a system operator or the like. The feedforward control is performed to improve the disturbance responsiveness of the AC circuit 2 to voltage fluctuations. The feedforward control of the AC voltage Vac may not be executed.

[0059] The DC current limiter 609 generates a DC current command value Idcref* by limiting the DC current command value Idcref within a range R2 indicated by the DC current limit, based on the M abnormality signals Emp and the M abnormality signals Emn.

[0060] Specifically, when the capacitance of the capacitor 32 in at least one converter cell 1 of the M converter cells 1 included in each arm 13 is less than the threshold value Th (for example, when at least one of the M abnormality signals Em indicates an abnormality), the DC current limiter 609 outputs a value obtained by limiting the DC current command value Idcref to a value equal to or greater than the lower limit value Imin2 and equal to or less than the upper limit value Imax2 (i.e., within the range R2) as the DC current command value Idcref*. On the other hand, when the capacitance of the capacitor 32 in at least one converter cell 1 of the M converter cells 1 included in each arm 13 is equal to or greater than the threshold value Th, the DC current limiter 609 does not execute the above-mentioned limitation and outputs the DC current command value Idcref as it is. In this case, "Idcref*=Idcref".

[0061] The DC current control unit 604 executes control to make the DC current Idc output from the power converter 6 follow the DC current command value Idcref (or the DC current command value Idcref*). Specifically, the DC current control unit 604 generates a DC control command value Vdcr for making the deviation between the DC current Idc and the DC current command value Idcref zero, based on the DC voltage command value Vdcref and the DC current command value Idcref. That is, the DC current control unit 604 generates a DC control command value Vdcr for making the DC current Idc follow the DC current command value Idcref. At this time, the DC voltage command value Vdcref may be calculated based on the detected DC voltage Vdc. The DC current command value Idcref is set in advance, for example, by a system operator or the like.

[0062] The circulating current control unit 605 executes control to make the circulating current Iz follow the circulating current command value Izref. Specifically, the circulating current control unit 605 generates a circulating control command value Vzr for making the deviation between the circulating current Iz and the circulating current command value Izref zero. In one aspect, the circulating current command value Izref is set to zero, for example. In another aspect, the circulating current command value Izref is set so that the difference between the average values ​​of the capacitor voltages of the leg circuits 8u, 8v, and 8w becomes small, and further so that the difference between the average values ​​of the capacitor voltages of the positive side arm 13p and the negative side arm 13n for each phase becomes small.

[0063] The AC current control unit 603, the DC current control unit 604, and the circulating current control unit 605 described above may be configured as a proportional controller, a PI controller, a PID controller, or other controllers used for feedback control.

[0064] The command distributor 606 receives the AC control command value Vacr, the circulating control command value Vzr, the DC control command value Vdcr, and the neutral point voltage Vsn as inputs. Since the AC side of the power converter 6 is connected to the AC circuit 2 via the transformer 3, the neutral point voltage Vsn can be obtained from the voltage of the DC power supply of the DC circuit 4. The DC control command value Vdcr may be determined by the above-mentioned DC output control, or may be a constant value.

[0065] Based on these inputs, the command distributor 606 calculates the voltages to be output by the positive arm 13p and the negative arm 13n. The command distributor 606 generates an arm voltage command value Varmpr for the positive arm 13p and an arm voltage command value Varmnr for the negative arm 13n by subtracting the voltage drops due to the inductance components in the positive arm 13p and the negative arm 13n from the calculated voltages.

[0066] The generated arm voltage command values ​​Varmpr, Varmnr are output voltage command values ​​that make the AC current Iac follow the AC current command value Iacref, make the circulating current Iz follow the circulating current command value Izref, and make the DC voltage Vdc follow the DC voltage command value Vdcref, and also feedforward control the AC voltage Vac.

[0067] (Example of arm control unit configuration) Fig. 6 is a block diagram showing a configuration example of an arm control unit according to the first embodiment. Referring to Fig. 6, the arm control unit 503 includes M individual cell control units 202_1, ..., 202_M (hereinafter also collectively referred to as "individual cell control units 202"). In addition, an arbitrary individual cell control unit 202 is also referred to as an "individual cell control unit 202_i" using an index i.

[0068] The individual cell control unit 202_i individually controls the corresponding converter cell 1_i. The individual cell control unit 202_i receives, from the basic control unit 502, an arm voltage command value Varmr, an arm current Iarm, a capacitor voltage command value Vcr, a reference phase θp, a carrier frequency fc, and a carrier phase θc.

[0069] The individual cell control unit 202_i generates gate signals Gp(i), Gn(i) for the converter cell 1_i and a drive signal BP(i) for the bypass switch 34, and outputs them to the converter cell 1_i. Meanwhile, the individual cell control unit 202_i receives the detection value of the capacitor voltage Vc(i) from the voltage detector 33 of the converter cell 1_i, and receives temperatures Twi(i), Two(i) from the temperature detectors DWI, DWO. The individual cell control unit 202_i outputs the abnormality signal Em(i) generated based on the capacitor voltage Vc(i) and temperatures Twi(i), Two(i) to the basic control unit 502, and the capacitor voltage Vc(i).

[0070] <Example of configuration of individual cell control unit> Fig. 7 is a block diagram showing an example of the configuration of an individual cell control unit according to Embodiment 1. With reference to Fig. 7, individual cell control unit 202 includes a carrier wave generation unit 203, an individual voltage control unit 205, a gate signal generation unit 207, a coefficient calculation unit 210, a power loss calculation unit 212, an incoming power calculation unit 214, a capacitance estimation unit 216, an abnormality determination unit 218, and a BPS drive unit 220.

[0071] (Gate signal generation method) First, a method for generating the gate signals Gp and Gn will be described.

[0072] The carrier wave generating unit 203 generates a carrier signal CS having a certain frequency (i.e., carrier frequency) used in phase shift PWM (Pulse Width Modulation) control. The phase shift PWM control shifts the timing of PWM signals output to each of a plurality of (e.g., M) converter cells 1 constituting the same arm (e.g., the positive arm 13p or the negative arm 13n) from each other. It is known that this reduces harmonic components contained in the composite voltage of the output voltages of the converter cells 1.

[0073] The carrier wave generating unit 203 generates carrier signals CS that are out of phase with each other among the M converter cells 1, based on the common carrier phase θc and carrier frequency fc received from the basic control unit 502. The carrier signal CS is, for example, a periodic signal such as a triangular wave signal.

[0074] The individual voltage control unit 205 receives as input the arm voltage command value Varmr of the arm to which the corresponding converter cell 1 belongs, the detected value of the arm current Iarm of the arm, the capacitor voltage command value Vcr, and the capacitor voltage Vc of the corresponding converter cell 1. The capacitor voltage command value Vcr may be set to the average value of the capacitor voltages Vc of the entire power converter 6, or may be set to the average value of the capacitor voltages of M converter cells 1 included in the same arm.

[0075] The individual voltage control unit 205 performs a calculation on the deviation of the capacitor voltage Vc from the capacitor voltage command value Vcr to calculate a control output value for individual voltage control. The functional unit for calculating the control output value is configured by, for example, a controller that executes PI control or PID control. The control output value for charging and discharging the capacitor 32 in a direction to eliminate the deviation is calculated by multiplying the calculated value by the controller by "+1" or "-1" depending on the polarity of the arm current Iarm. Alternatively, the control output value for charging and discharging the capacitor 32 in a direction to eliminate the deviation may be calculated by multiplying the calculated value by the controller by the arm current Iarm.

[0076] The individual voltage control unit 205 outputs a cell voltage command value Vcellr by adding the arm voltage command value Varmr and the control output value. The cell voltage command value Vcellr is a command value for the cell voltage output from the converter cell 1.

[0077] The gate signal generating unit 207 generates gate signals Gp and Gn by PWM-modulating the cell voltage command value Vcellr using the carrier signal CS from the carrier wave generating unit 203.

[0078] (Capacitance estimation method) Next, a method for estimating the capacitance of the capacitor 32 of the converter cell 1 will be described.

[0079] The power loss calculation unit 212 calculates the power loss occurring in the converter cell 1. Specifically, the power loss calculation unit 212 calculates a power loss PRest which is an estimated value of an instantaneous power loss occurring in a resistive element included in the converter cell 1, and a power loss PSCest which is an estimated value of an instantaneous power loss occurring in a plurality of switching elements 31p, 31n included in the converter cell 1. The resistive element is a resistive element connected in parallel with the capacitor 32.

[0080] The power loss PRest is expressed by the following formula (1) using the capacitor voltage Vc and the resistance value R of the resistance element connected in parallel with the capacitor 32. The resistance value R is, for example, a value obtained by measurement or the like of a characteristic test of the converter cell 1 performed in advance. Note that in the following formula (1), V c For example, "V in a formula" should be written in subscript form. c " is the same as "Vc in the text." This also applies to the formulas described later.

[0081]

number

[0082] The power loss calculation unit 212 calculates the power loss PSCest using an arithmetic expression based on the arm current Iarm of the arm to which the corresponding converter cell 1 belongs. Specifically, the power loss PSCest is expressed by the following equation (2). b0, b1, and b2 are coefficients. In equation (2), the multiplication symbol is omitted. This also applies to the following equations.

[0083]

number

[0084] Here, the coefficients b0, b1, and b2 are calculated by the coefficient calculation unit 210. Specifically, the calculation utilizes the fact that the coefficients b0, b1, and b2 change with respect to the junction temperature. The coefficient calculation unit 210 calculates the coefficients b0, b1, and b2 of the formula (2) based on the differential temperature between the temperature Twi of the cooling medium WI flowing into the cooling fin 35 and the temperature Two of the cooling medium WO flowing out from the cooling fin 35, and the arm current Iarm. Specifically, the coefficient calculation unit 210 calculates the time-average loss Pscav of the power generated in the multiple switching elements 31p and 31n of the converter cell 1 based on the differential temperature, and calculates the coefficients b0, b1, and b2 of the formula (2) using the time-average loss Pscav. On the other hand, the time-average loss Pscav is expressed by the following formula (3) using the time-average value |Iarm|av of the absolute value of the arm current Iarm and the effective value IarmR of the arm current Iarm.

[0085]

number

[0086] The coefficient calculation unit 210 selects appropriate coefficients b0, b1, and b2 that satisfy the relational expression (3), using the time average loss Pscav, the time average value |Iarm|av, and the effective value IarmR, and a lookup table prepared in advance.

[0087] The calculation method for calculating the time-average loss Pscav from the difference between the temperatures Twi and Two is explained below. Specifically, the specific heat capacity of the cooling medium WI and WO is Cp [J / (K g)], and the density is ρ [g / cm 3 ] and the flow rate of the cooling media WI, WO flowing through one cooling fin 35 is Qw [L / s], the time-average loss Pscav generated in the multiple switching elements 31p, 31n of the converter cell 1 is expressed by the following equation (4).

[0088]

number

[0089] The coefficient calculation unit 210 may calculate the time average loss Pscav based on the differential power between the AC active power output from the power converter 6 to the AC circuit 2 and the active power output from the power converter 6 to the DC circuit 4. A calculation method of the time average loss Pscav will be described. Here, the AC active power in the AC circuit 2 is Pac, the DC active power in the DC circuit 4 is Pdc, and the number of all converter cells 1 included in the power converter 6 is Nall. In addition, in the power converter 6, the loss generated other than the converter cell 1 is Pother. In the converter cell 1, the loss generated other than the multiple switching elements 31p, 31n is Psmother. In this case, assuming that the loss generated in the converter cell 1 is uniform, the time average loss Pscav generated in the multiple switching elements 31p, 31n of the converter cell 1 is expressed by the following formula (5).

[0090]

number

[0091] Here, the loss Pother and the loss Psmother may be either actual measured values ​​or estimated values. For example, one type of loss Pother is the loss Ptr generated in the transformer 3, but it is difficult to actually measure the loss Ptr. Therefore, the loss Ptr may be calculated (estimated) using the no-load loss Ptri, the load loss Ptrcn when the current flowing into the transformer 3 is at its maximum, the ratio a between the effective value of the AC current obtained by the AC current detector 15 and the effective value of the maximum current flowing into the transformer 3, and the following formula (6).

[0092]

number

[0093] Moreover, an example of the loss Psmother is the power loss PRest that occurs at the resistance value R of a resistance element connected in parallel to the capacitor 32, and can be calculated using the formula (1).

[0094] Furthermore, the coefficients b0, b1, and b2 may be approximated from data on losses relative to currents obtained by measurements or the like of a previously performed characteristic test of the converter cell 1, and may be preset to values ​​under specified temperature conditions. In this case, the coefficient calculation unit 210 is not necessary.

[0095] Fig. 8 is a block diagram showing a configuration example of an incoming power calculation unit according to the first embodiment. With reference to Fig. 8, incoming power calculation unit 214 calculates capacitor incoming power flowing into capacitor 32 of converter cell 1 based on a cell voltage command value Vcellr for converter cell 1 of power converter 6, an arm current Iarm flowing in an arm including converter cell 1, and a power loss occurring in converter cell 1. Specifically, incoming power calculation unit 214 includes multipliers 251 and 252, an adder 254, a subtractor 256, calculators 258 and 259, and a frequency component extraction unit 261.

[0096] The multiplier 251 outputs the product of the cell voltage command value Vcellr and the capacitor voltage Vc of the converter cell 1. The multiplier 252 calculates the product of the multiplied value output from the multiplier 251 and the arm current Iarm as the cell incoming power Psmest, which is the instantaneous power flowing into the converter cell 1. That is, the incoming power calculation unit 214 calculates the cell incoming power Psmest by multiplying the cell voltage command value Vcellr, the capacitor voltage Vc, and the arm current Iarm together, as shown in the following equation (7).

[0097]

number

[0098] The adder 254 outputs the sum of the power loss PSCest and the power loss PRest occurring in the converter cell 1. The subtractor 256 outputs the subtraction value obtained by subtracting the sum from the cell incoming power Psmest as the capacitor incoming power Pcest, which is an estimate of the instantaneous power flowing into the capacitor 32 of the converter cell 1. That is, the incoming power calculation unit 214 calculates the capacitor incoming power Pcest by subtracting the power loss PSCest and the power loss PRest from the cell incoming power Psmest, as shown in the following equation (8).

[0099]

number

[0100] The calculator 258 outputs the sine of the reference phase θp (i.e., sinθp). The calculator 259 outputs the cosine of the reference phase θp (i.e., cosθp). The frequency component extractor 261 calculates a value obtained by extracting a specified frequency component from the power flowing into the capacitor Pcest based on the power flowing into the capacitor Pcest and the sine and cosine of the reference phase θp as the power flowing into the capacitor Pc1fest.

[0101] 9 is a block diagram showing an example of the configuration of a frequency component extraction unit according to the first embodiment. Referring to FIG. 9, the frequency component extraction unit 261 multiplies an input value Xin by a sine wave sinθ and a cosine wave cosθ that oscillate at a specified frequency to be extracted, and filters the doubled values ​​to extract a DC component. The frequency component extraction unit 261 calculates the square root of the sum of the squares of each DC component, and outputs the square root as an output value Xout. Specifically, the frequency component extraction unit 261 includes multipliers 271, 274, 281, and 284, proportional units 272 and 282, filters 273 and 283, an adder 291, and a calculator 292.

[0102] For example, if the reference angular frequency is "ω", the time is "t", and the order of the specified frequency is "k", the phase θ is expressed as "k*ω*t". Also, the input value Xin is defined as the following equation (9).

[0103]

number

[0104] "n" is the order relative to the reference angular frequency ω, An (where n≧0) is the magnitude of the frequency component of each order, and φn is the phase of the frequency component of each order. As shown in the following equation (10), multiplier 271 calculates a value obtained by multiplying input value Xin by a sine wave sinθ (=sin(kωt)). As shown in the following equation (11), multiplier 281 calculates a value obtained by multiplying input value Xin by a cosine wave cosθ (=cos(kωt)).

[0105]

number

[0106] Proportionalizer 272 multiplies the value obtained by multiplier 271 by "2". Proportionalizer 282 multiplies the value obtained by multiplier 271 by "2". Filter 273 outputs value XoutS obtained by extracting a DC component from the value calculated by proportionalizer 272. Filter 283 outputs value XoutC obtained by extracting a DC component from the value calculated by proportionalizer 282. Filters 273, 283 may be any filter capable of extracting a DC component, and may be, for example, a low-pass filter. As a result, only the frequency component of "n=k" is extracted, and therefore values ​​XoutS and XoutC are expressed by equations (12) and (13), respectively.

[0107]

number

[0108] The multiplier 274 squares the value XoutS. The multiplier 284 squares the value XoutC. The adder 291 outputs the sum of the square of the value XoutS and the square of the value XoutC. The calculator 292 outputs the output value Xout, which is the square root of the sum. Therefore, the following equation (14) is obtained for the output value Xout.

[0109]

number

[0110] It is possible to extract the magnitude Ak (ie, the output value Xout) of the kth order frequency component based on the reference angular frequency ω contained in the input value Xin.

[0111] In this embodiment, the specified frequency is the same as the frequency of the AC voltage Vac in the AC circuit 2. Therefore, the phase angle rotating at the specified frequency is equal to "θp". Therefore, the frequency component extractor 261 uses the phase θp to extract the capacitor flow-in power Pc1fest (i.e., corresponding to the output value Xout), which is the specified frequency component of the capacitor flow-in power Pcest (i.e., corresponding to the input value Xin).

[0112] The reason for extracting the power Pc1fest flowing into the capacitor 32 is that the instantaneous power flowing into the capacitor 32 contains many frequency components that are the same as the frequency of the AC voltage Vac. This is shown below.

[0113] If the voltage output by the converter cell 1 is "Vsm", the voltage Vsm is ideally composed of a DC component and a fundamental frequency component, with the DC component being Vdcsm and the fundamental frequency component being Vacsm. In this case, the voltage Vsm is expressed by the following equation (15).

[0114]

number

[0115] In addition, the arm current Iarm is also ideally composed of a DC component and a fundamental frequency component, with the DC component being Idcarm and the fundamental frequency component being Iacarm. In this case, the arm current Iarm is expressed by the following equation (16).

[0116]

number

[0117] Here, "α" is the phase difference with respect to the AC component of the voltage Vsm output by the converter cell 1. Therefore, ideally, the cell inflow power Psmest derived by equation (7) is equal to the value obtained by multiplying equations (15) and (16), and is therefore expressed by the following equation (17).

[0118]

number

[0119] However, the DC component Psmdc of the cell incoming power Psmest is expressed by the following equation (18), the fundamental frequency component Psm1f of the cell incoming power Psmest is expressed by the following equation (19), the phase φ1f is expressed by the following equation (20), the twice the fundamental frequency component Psm2f of the cell incoming power Psmest is expressed by the following equation (21), and the phase φ2f is expressed by the following equation (22).

[0120]

number

[0121] This shows that the cell inflow power Psmest contains many components with the same frequency as the fundamental frequency of the AC voltage Vac. Therefore, the capacitor inflow power Pcest, which is obtained by subtracting the power losses PRest and PSCest from the cell inflow power Psmest, also contains many components with the same frequency as the fundamental frequency of the AC voltage Vac.

[0122] The specified frequency component may be any other frequency component that is contained in large amounts in the capacitor flow-in power Pcest. For example, according to formulas (17), (20), and (22), the cell flow-in power Psmest also contains a component that is twice the fundamental frequency of the AC voltage Vac. Therefore, the specified frequency component may be a component that is twice the fundamental frequency of the AC voltage Vac.

[0123] As described above, the incoming power calculation unit 214 calculates the cell incoming power Psmest flowing into the converter cell 1 based on the cell voltage command value Vcellr, the capacitor voltage Vc, and the arm current Iarm. The incoming power calculation unit 214 calculates the capacitor incoming power Pc1fest based on a subtraction value (i.e., the capacitor incoming power Pcest) obtained by subtracting the power losses PRest, PSCest occurring in the converter cell 1 from the cell incoming power Psmest. Specifically, the incoming power calculation unit 214 calculates a value obtained by extracting a specified frequency component (e.g., a fundamental frequency component) from the subtraction value as the capacitor incoming power Pc1fest.

[0124] Referring again to FIG. 7, the capacitance estimating unit 216 calculates the capacitance Cest, which is an estimate of the capacitance of the capacitor 32, based on the power flowing into the capacitor Pc1fest and the capacitor voltage Vc.

[0125] Fig. 10 is a block diagram showing an example of the configuration of a capacitance calculation unit according to the first embodiment. With reference to Fig. 10, a capacitance estimation unit 216 calculates a capacitor current Ic flowing into the capacitor 32. When the capacitance of the capacitor 32 is C, the following equation (23) is established.

[0126]

number

[0127] Furthermore, the capacitance estimation unit 216 calculates the instantaneous power Pc flowing into the capacitor 32 based on the capacitor voltage Vc and the capacitor current Ic. The instantaneous power Pc is expressed by the following equation (24). As a result, the following equation (25) is obtained.

[0128]

number

[0129] Specifically, the capacitance estimation unit 216 includes a multiplier 301 , a differentiator 302 , calculators 304 and 305 , a frequency component extraction unit 306 , a proportional unit 311 , and a divider 312 .

[0130] Multiplier 301 calculates the square of capacitor voltage Vc. Differentiator 302 calculates the differential value shown in equation (25) by differentiating the square of capacitor voltage Vc with respect to time. Calculator 304 outputs the sine of reference phase θp (i.e., sin θp). Calculator 305 outputs the cosine of reference phase θp (i.e., cos θp).

[0131] The frequency component extracting unit 306 extracts the fundamental frequency component Vcsq1f of the time differential value of the square of the capacitor voltage Vc based on the value calculated by the differentiator 302 and the sine and cosine of the reference phase θp.

[0132] Here, the instantaneous power Pc shown in equation (24) and the power Pcest flowing into the capacitor shown in equation (8) ideally coincide with each other. Therefore, the values ​​extracted from the instantaneous power Pc and the power Pcest flowing into the capacitor at the same frequency components also ideally coincide with each other. Therefore, the following equation (26) is established for the capacitance Cest, which is an estimate of the capacitance C.

[0133]

number

[0134] This enables the capacitance estimating unit 216 to calculate the capacitance Cest of the capacitor 32.

[0135] (Abnormal signal output) 7 again, the abnormality determination unit 218 outputs an abnormality signal Em indicating an abnormality in the converter cell 1 based on the capacitance Cest of the capacitor 32 of the converter cell 1 and a threshold value Th. Specifically, the abnormality determination unit 218 outputs the abnormality signal Em when the capacitance Cest is less than the threshold value Th, and does not output the abnormality signal Em when the capacitance Cest is equal to or greater than the threshold value Th. The threshold value Th is set to a capacitance value such that the capacitor voltage exceeds an upper limit value on the hardware (e.g., insulation specifications, etc.) due to ripples in the capacitor voltage Vc when the power supplied to the power converter 6 is large, for example.

[0136] When the abnormality signal Em is output, the BPS driving unit 220 receives the abnormality signal Em. Here, it is assumed that the number M of converter cells 1 included in each arm is greater than the number required for operation. In this case, the BPS driving unit 220 outputs a driving signal BP for closing the bypass switch 34 in response to receiving the abnormality signal Em. That is, the BPS driving unit 220 closes the bypass switch 34 when the capacitance Cest of the capacitor 32 of the converter cell 1 is less than the threshold value Th. This allows the maintenance of the power converter 6 to continue without restricting the power, or allows the operation of the power converter 6 to continue until operation is stopped due to part replacement.

[0137] The abnormality signal Em is also transmitted to the HMI 501 shown in FIG. 4. By receiving each abnormality signal Em, the HMI 501 can monitor which capacitor 32 in the power converter 6 has deteriorated. In one aspect, when the capacitance Cest of the capacitor 32 in at least one converter cell 1 among the multiple converter cells 1 is less than a threshold value Th, the HMI 501 receives the abnormality signal Em corresponding to the at least one converter cell 1. In this case, the HMI 501 notifies information for identifying the at least one converter cell 1. For example, the HMI 501 displays the information on a display or the like.

[0138] This allows the system operator to quickly identify the converter cells 1 that require part replacement when operation is stopped for maintenance or part replacement of the power converter 6, thereby shortening the period of operation outage. In addition, the system operator can also identify the number of converter cells 1 that require part replacement in advance, eliminating the need to prepare more spare converter cells 1 than necessary, thereby reducing management costs, etc.

[0139] <Advantages> According to the first embodiment, a calculation for estimating a capacitance is performed based on current and voltage detection values, voltage command values, and the like, which are obtained at any time, without using a complex integral calculation, etc. Therefore, the processing load of the calculation can be reduced.

[0140] Embodiment 2 In the above-mentioned first embodiment, the coefficient calculation unit 210, the power loss calculation unit 212, and the flowing power calculation unit 214, which are functional components for calculating the capacitor flowing power Pc1fest, are provided in the individual cell control unit 202. In the second embodiment, a configuration will be described in which these functional components are provided in the basic control unit 502 of each phase.

[0141] Fig. 11 is a block diagram showing a configuration example of a basic control unit according to the second embodiment. Referring to Fig. 11, the basic control unit 502A has a configuration in which coefficient calculation units 210P, 210N, power loss calculation units 212P, 212N, incoming power calculation units 214P, 214N, and a capacitor voltage average value calculation unit 230 are added to the basic control unit 502 shown in Fig. 5. Detailed description of the same configuration as the basic control unit 502 will not be given.

[0142] The capacitor voltage average value calculation unit 230 receives input of M capacitor voltages Vc of the positive-side arm 13p, and calculates a voltage average value VcavP that is the average value of the M capacitor voltages Vc. The capacitor voltage average value calculation unit 230 receives input of M capacitor voltages Vc of the negative-side arm 13n, and calculates a voltage average value VcavN that is the average value of the M capacitor voltages Vc. The voltage average value VcavP is input to the power loss calculation unit 212P, and the voltage average value VcavN is input to the power loss calculation unit 212N.

[0143] The coefficient calculation method by the coefficient calculation units 210P and 210N is generally similar to the method by the coefficient calculation unit 210 described above. Specifically, the coefficient calculation unit 210P calculates the coefficients b0P, b1P, and b2P of the equation (2) based on the positive arm current Iarmp of the positive arm 13p and the temperature difference between temperatures Twi and Two. Similarly, the coefficient calculation unit 210N calculates the coefficients b0N, b1N, and b2N of the equation (2) based on the negative arm current Iarmn of the negative arm 13n and the temperature difference between temperatures Twi and Two.

[0144] In this case, however, the temperature Twi is the average temperature of the cooling medium WI flowing into each converter cell 1 included in the positive side arm 13p and the negative side arm 13n. The temperature Two is the average temperature of the cooling medium WO flowing into each converter cell 1 included in the positive side arm 13p and the negative side arm 13n.

[0145] In the following, for ease of explanation, the converter cell 1 included in the positive arm 13p is also referred to as the "converter cell 1p," and the converter cell 1 included in the negative arm 13n is also referred to as the "converter cell 1n."

[0146] The power loss calculation unit 212P calculates an average power loss PRP that occurs in a resistance element included in the converter cell 1p. In this case, "VcavP" and "PRP" are used instead of "Vc" and "PRest" in the formula (1), respectively. The power loss calculation unit 212P also calculates an average power loss PSCP that occurs in a plurality of switching elements 31p, 31n in the converter cell 1p. In this case, coefficients b0P, b1P, and b2P are used instead of coefficients b0, b1, and b2 in the formulas (2) and (3), and the positive arm current Iarmp is used instead of the arm current Iarm. Also, "PSCP" is used instead of "PSCest" in the formula (2).

[0147] The power loss calculation unit 212N calculates an average power loss PRN occurring in a resistive element in the converter cell 1n. In this case, "VcavN" and "PRest" in the formula (1) are replaced with "VcavN" and "PRest", respectively. The power loss calculation unit 212N also calculates a power loss PSCN occurring in a plurality of switching elements 31p, 31n in the converter cell 1n. In this case, coefficients b0N, b1N, and b2N are used instead of coefficients b0, b1, and b2 in the formulas (2) and (3), and a negative arm current Iarmn is used instead of the arm current Iarm. Also, "PSCN" is used instead of "PSCest" in the formula (2).

[0148] The inflow power calculation unit 214P calculates the average capacitor inflow power Pc1favP flowing into the capacitor 32 of the converter cell 1p based on the arm voltage command value Varmpr for the power converter 6, the positive arm current Iarmp flowing through the positive arm 13p, and the average power losses PRP and PSCP generated in each converter cell 1p.

[0149] Specifically, the incoming power calculation unit 214P calculates the cell incoming power PsmP flowing into the converter cell 1p by multiplying the arm voltage command value Varmpr, the voltage average value VcavP, and the positive side arm current Iarmp, and dividing the product by the number M. That is, "PsmP=(Varmpr*VcavP*Iarmp) / M". This utilizes the fact that the cell incoming power flowing into the converter cell 1p is approximately equal to the value obtained by dividing the arm incoming power flowing into the positive side arm 13p by "M".

[0150] Next, the flowing power calculation unit 214P calculates the capacitor flowing power PcavP flowing into the capacitor 32 of the converter cell 1p by subtracting the power loss PRP and the power loss PSCP from the cell flowing power PsmP. Then, the flowing power calculation unit 214P calculates the capacitor flowing power Pc1favP by extracting the fundamental frequency component from the capacitor flowing power PcavP.

[0151] Similarly, the inflow power calculation unit 214N calculates the average capacitor inflow power Pc1favN flowing into the capacitor 32 of the converter cell 1n based on the arm voltage command value Varmnr for the power converter 6, the negative arm current Iarmn flowing through the negative arm 13p, and the average power losses PRN and PSCN generated in each converter cell 1n.

[0152] Specifically, the incoming power calculation unit 214N calculates the cell incoming power PsmN flowing into the converter cell 1n by multiplying the arm voltage command value Varmnr, the voltage average value VcavN, and the negative arm current Iarmn together, and dividing the product by the number M. That is, "PsmN=(Varmnr*VcavN*Iarmn) / M".

[0153] Next, the incoming power calculation unit 214N calculates the capacitor incoming power PcavN flowing into the capacitor 32 of the converter cell 1n by subtracting the power loss PRN and the power loss PSCN from the cell incoming power PsmN. Then, the incoming power calculation unit 214N calculates the capacitor incoming power Pc1favN by extracting the fundamental frequency component from the capacitor incoming power PcavN. Hereinafter, the capacitor incoming powers Pc1favP and Pc1favN are also collectively referred to as "capacitor incoming power Pc1fav."

[0154] Fig. 12 is a block diagram showing a configuration example of an individual cell control unit according to embodiment 2. Referring to Fig. 12, individual cell control unit 202A is obtained by deleting coefficient calculation unit 210, power loss calculation unit 212, and incoming power calculation unit 214 from individual cell control unit 202 shown in Fig. 7, and by replacing capacitance estimation unit 216 with capacitance estimation unit 216A.

[0155] The capacitance estimation unit 216A differs from the capacitance estimation unit 216 in that it receives an input of the power flowing into the capacitor Pc1fav instead of the power flowing into the capacitor Pc1fest. The capacitance estimation unit 216A calculates the capacitance Cest of the capacitor 32 by using "Pc1fav" instead of "Pc1fest" in the equation (26).

[0156] <Advantages> According to the second embodiment, the capacitance of the capacitor can be estimated by utilizing the fact that the cell inflow power flowing into the converter cell is approximately equal to the arm inflow power flowing into the arm divided by the number of converter cells. Therefore, the amount of calculation for estimating the capacitance can be further reduced.

[0157] Other embodiments. The configurations exemplified as the above-mentioned embodiments are examples of the configurations of the present disclosure, and may be combined with other known technologies, or may be modified, such as by omitting some parts, without departing from the scope of the present disclosure. In addition, the above-mentioned embodiments may be implemented by appropriately adopting the processes and configurations described in other embodiments.

[0158] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0159] 1 converter cell, 2 AC circuit, 3 transformer, 4 DC circuit, 5 control device, 6 power converter, 7a, 7b reactor, 8u, 8v, 8w leg circuit, 9a, 9b arm current detector, 10 AC voltage detector, 11a, 11b DC voltage detector, 13nu, 13nv, 13nw, 13p negative arm, 13pu, 13pv, 13pw positive arm, 15 AC current detector, 31n, 31p switching element, 32 capacitor, 33 voltage detector, 34 bypass switch, 35 cooling fin, 70 input converter, 71 sample-and-hold circuit, 72 multiplexer, 73 A / D converter, 75 RAM, 76 ROM, 77 input / output interface, 78 auxiliary storage device, 79 bus, 100 power converter, 202, 202A individual cell control unit, 203 Carrier wave generation unit, 205 individual voltage control unit, 207 gate signal generation unit, 210, 210N, 210P coefficient calculation unit, 212, 212N, 212P power loss calculation unit, 214, 214N, 214P inflow power calculation unit, 216, 216A capacitance estimation unit, 218 abnormality determination unit, 220 BPS drive unit, 230 capacitor voltage average value calculation unit, 502 basic control unit, 503P, 503N arm control unit, 601 arm voltage command generation unit, 603 AC current control unit, 604 DC current control unit, 605 circulating current control unit, 606 command distribution unit, 608 AC current limiter, 609 DC current limiter, 610 capacitor voltage command generation unit, 620 reference phase detection unit.

Claims

1. A power conversion device that performs power conversion between AC circuits and DC circuits, A power converter including multiple arms for each phase of the aforementioned AC circuit, The power converter is controlled by a control device, Each of the aforementioned multiple arms has a plurality of transducer cells that are cascaded together, Each of the plurality of converter cells has a plurality of switching elements and a capacitor connected to the plurality of switching elements. The control device is A power calculation unit calculates the capacitor inflow power flowing into the capacitor of the converter cell based on the voltage command value for the power converter, the arm current flowing through the arm including the converter cell, the capacitor voltage indicating the voltage of the capacitor of the converter cell, and the power loss generated in the converter cell. A power conversion device including a capacitance estimation unit that estimates the capacitance of the capacitor based on the power flowing into the capacitor and the capacitor voltage.

2. The power calculation unit, Based on the voltage command value, the capacitor voltage, and the arm current, the cell inflow power flowing into the converter cell is calculated. The power conversion device according to claim 1, wherein the capacitor input power is calculated based on a subtraction value obtained by subtracting the power loss generated in the converter cell from the cell input power.

3. The power conversion device according to claim 2, wherein the power calculation unit calculates a value obtained by extracting a predetermined frequency component from the subtracted value as the capacitor inflow power.

4. The power conversion device according to claim 3, wherein the aforementioned frequency component is the fundamental frequency component of the AC voltage of the AC circuit, or a frequency component that is twice the fundamental frequency component.

5. The power conversion device according to any one of claims 1 to 4, wherein the control device further includes a power loss calculation unit that calculates a first power loss generated in the plurality of switching elements included in the converter cell as the power loss generated in the converter cell.

6. The power conversion device according to claim 5, wherein the power loss calculation unit further calculates a second power loss generated in a resistive element included in the converter cell as the power loss generated in the converter cell.

7. The power conversion device according to claim 5, wherein the power loss calculation unit calculates the first power loss using a calculation formula based on the arm current.

8. The converter cell has cooling fins for cooling the switching element, The power conversion device according to claim 7, further comprising a coefficient calculation unit that calculates the coefficient of the calculation formula based on the difference temperature between a first temperature of the cooling medium flowing into the cooling fins and a second temperature of the cooling medium flowing out from the cooling fins, and the arm current.

9. The converter cell has cooling fins for cooling the switching element, The power conversion device according to claim 7, further comprising a coefficient calculation unit that calculates the coefficients of the calculation formula based on the active power output from the power converter to the DC circuit, the difference in power between the active power output from the power converter to the AC circuit, and the arm current.

10. The power conversion device according to any one of claims 1 to 4, wherein the voltage command value is a cell voltage command value for the cell voltage output from the converter cell.

11. The power conversion device according to any one of claims 1 to 4, wherein the voltage command value is an arm voltage command value for the arm voltage output from the arm including the converter cell.

12. The power conversion device according to any one of claims 1 to 4, wherein the control device further includes a notification unit that notifies information for identifying the at least one converter cell when the capacitance of the capacitor in at least one of the plurality of converter cells is below a threshold.

13. The control device is A DC current control unit that performs control to make the DC current output from the power converter follow a DC current command value, The power conversion device according to any one of claims 1 to 4, further comprising a DC current limiting unit that limits the DC current command value to within the range indicated by a DC current limit value when the capacitance of the capacitor in at least one of the plurality of converter cells is less than a threshold value.

14. The control device is An AC current control unit that performs control to make the AC current output from the power converter follow an AC current command value, The power conversion device according to any one of claims 1 to 4, further comprising: an AC current limiting unit that limits the AC current command value to within a range indicated by an AC current limit value when the capacitance of the capacitor in at least one of the plurality of converter cells is less than a threshold value.

15. The converter cell further includes a bypass switch for bypassing the input and output terminals of the converter cell. The power conversion device according to any one of claims 1 to 4, further comprising a bypass switch control unit that closes the bypass switch when the capacitance of the capacitor in the converter cell is less than a threshold.

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