Semiconductor device and manufacturing method thereof

JPWO2026028484A5Active Publication Date: 2026-07-07MITSUBISHI ELECTRIC CORP

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
MITSUBISHI ELECTRIC CORP
Filing Date
2024-12-26
Publication Date
2026-07-07

AI Technical Summary

Technical Problem

Conventional bonding materials for semiconductor devices, such as solders and sintered materials, fail to provide adequate heat resistance, reliability, and heat dissipation, especially when bonding semiconductor elements with large thermal expansion coefficient differences, leading to cracking, delamination, and reduced heat dissipation performance.

Method used

A semiconductor device design that includes a sintered body layer directly bonded to the semiconductor element and a solder interposed in the gap at the bonding interface, with the sintered body layer formed by sintering metal particles and the solder filling the gap to enhance bonding strength and heat dissipation.

Benefits of technology

The design achieves a bonding layer with high heat resistance, reliability, and heat dissipation, enabling semiconductor devices to operate at higher temperatures and withstand thermal expansion without delamination.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The semiconductor device includes a semiconductor element (1) and a metal member (2) to be joined, and further includes a sintered layer (3) of metal particles that joins the semiconductor element (1) and the member (2) and is in direct contact with the semiconductor element (1) and the member (2), and solder (4) that is interposed in the gap at the joining interface between the member (2) and the sintered layer (3). This makes it possible to provide a semiconductor device that includes a joining layer that has high heat resistance, high reliability, and high heat dissipation.
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Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] In recent years, there has been a strong demand for technologies to improve the heat resistance, reliability, and heat dissipation of bonding layers in semiconductor devices. In particular, there is a strong demand for improved heat resistance, reliability, and heat dissipation of bonding layers that bond semiconductor elements and terminals, which have large differences in thermal expansion coefficients, to metal-based bonded components. Traditionally, semiconductor elements have often been made from silicon (Si), with operating temperatures ranging from 100°C to 125°C. Meanwhile, development of next-generation devices made from silicon carbide (SiC) and gallium nitride (GaN) has been thriving as a means of energy conservation. To reduce power loss, SiC and GaN devices are expected to have operating temperatures of 175°C or higher, and it is said that this could reach 250°C in the future.

[0003] For conventional Si devices, lead-containing solders, such as Sn-38Pb (by mass%) and Pb-5Sn (by mass%), and Sn-based solders, such as Sn-3Ag-0.5Cu (by mass%) or Sn-9Zn (by mass%) and Sn-0.7Cu (by mass%), have been used as joining materials. For gallium arsenide devices, gold-containing solders, such as 80Au-20Sn (by mass%) and Sn-10Au (by mass%), have been used. However, from the perspective of reducing environmental impact, Pb-based solders, which contain large amounts of toxic lead (Pb), are problematic. Furthermore, gold-containing solders are costly due to the rising cost of precious metals and limited reserves. For these reasons, Sn-based solders are a candidate for joining materials for Si, SiC, and GaN devices. However, Sn has a low melting point of 232°C, and the above-mentioned Sn-3Ag-0.5Cu solder is a eutectic solder, so its melting point is even lower, at approximately 220°C. To increase the melting point of Sn-based solders, Sn-5Sb (mass%) or Sn-10Sb (mass%), which contain Sb, are available. However, the melting point is only increased by about 20°C, from 230°C to 240°C, so the heat resistance of the bonding layer remains poor at the operating temperatures of the semiconductor devices mentioned above. Furthermore, even if a high-melting-point metal is added to Sn above the eutectic composition, the difference between the liquidus and solidus increases, resulting in poor wetting during solder bonding. Furthermore, shrinkage cavities and voids are frequently generated, reducing the reliability of the bonding layer. Furthermore, at low temperatures (below freezing), Sn undergoes a phase transformation from β-Sn to the brittle α-Sn. Therefore, when a heat cycle test, which involves repeating low-temperature (-) and high-temperature (+) cycles—a type of reliability test—is conducted, cracks occur early, resulting in failure and insufficient reliability of the bonding layer. Furthermore, if cracks occur in the bonding layer, the heat dissipation ability of the bonding layer decreases, causing the bonded semiconductor element to heat up more during actual operation. This creates a negative spiral in which further cracks occur in the bonding layer, potentially causing thermal runaway in the semiconductor element. Therefore, when solder is used as a bonding material for semiconductor elements, the heat resistance, reliability, and heat dissipation of the bonding layer are insufficient.

[0004] Therefore, sintered bonding materials have been attracting attention as an alternative bonding material to solder. Sintered bonding materials include those formed by blending nano- or micro-sized metal particles, known as sinterable metals or metal pastes, with organic solvents. In these sintered bonding materials, the organic components covering the surfaces of the metal particles decompose due to heat, causing the metal particles to sinter together and form a bonding layer, resulting in sintered bonding. The heat resistance temperature of the bonding layer after sintering is approximately the same as the melting point of the metal particles used (e.g., 960°C for Ag), providing a higher heat resistance than solder. Although depending on the organic components, organic solvents decompose at approximately 200–300°C, allowing bonding at temperatures that do not degrade the bonded components. Furthermore, when using a blend of metal particles and organic solvents as a sintered bonding material, pressure is required to densely sinter the metal particles after the organic components volatilize to enhance heat dissipation. When bonding without pressure, there is a limit to how much the heat generated during sintering alone can promote the diffusion of the metal particles, resulting in insufficient bonding strength and low reliability of the bonding layer. Furthermore, when bonding is performed without pressure, if the bonded members warp or deform due to thermal expansion or other factors, the sintered bonding material does not melt, and therefore cannot follow the deformation, which can lead to delamination at the bonding interface between the bonded members and the sintered body layer. If delamination occurs, heat dissipation performance deteriorates. If high pressures, for example, of 100 MPa or more, are applied to bond the members in order to form a bonding layer with high reliability and heat dissipation, the semiconductor element will be destroyed and will not function normally electrically.

[0005] Patent Document 1 discloses a semiconductor device in which a semiconductor element and a circuit board are bonded using both a sintered bonding material and a solder. The semiconductor device described in Patent Document 1 has a structure in which the semiconductor element and the circuit board are directly bonded with solder, and a sintered body layer formed by sintering metal particles, which is a sintered bonding material, is provided in the bonding interface region between the solder bonding layer and the circuit board. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-106654 Summary of the Invention [Problem to be solved by the invention]

[0007] The semiconductor device described in Patent Document 1 uses both a sintered bonding material and a solder bonding material. However, among the bonding layers that bond the semiconductor element to the circuit board, the sintered body layer is provided only on the circuit board side, and the proportion of the solder layer in the bonding layer is still high. As a result, the heat resistance, reliability, and heat dissipation of the bonding layer are insufficient, as described above.

[0008] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a semiconductor device having a bonding layer that has high heat resistance, high reliability, and high heat dissipation properties, and a method for manufacturing the semiconductor device. [Means for solving the problem]

[0009] The semiconductor device according to the present disclosure is a semiconductor device including a semiconductor element and a bonded member made of metal, and includes a sintered body layer of metal particles that bonds the semiconductor element and the bonded member and is provided so as to be in direct contact with the semiconductor element and the bonded member, and a bonding interface between the bonded member and the sintered body layer. whole and solder interposed in the gap. The workpieces have openings penetrating the upper and lower surfaces of the workpieces, and the sintered body layer is provided directly below the openings. do.

[0010] The method for manufacturing a semiconductor device according to the present disclosure includes a metal particle layer forming step of forming a metal particle layer having a sintering temperature lower than the melting point of solder on an upper surface of a semiconductor element; a member to be joined positioning step of positioning a member to be joined so that it is in direct contact with the upper surface of the metal particle layer; a solder supplying step of supplying the solder to the member to be joined so that it does not come into contact with the metal particle layer; a first joining step of heating at a first temperature lower than the melting point of the solder and equal to or higher than the sintering temperature to sinter the metal particle layer, thereby forming a sintered body layer and joining the semiconductor element and the member to be joined; and a second joining step of heating at a second temperature equal to or higher than the melting point of the solder to melt the solder, and interposing the molten solder in a gap at the joining interface between the member to be joined and the sintered body layer to join the member to be joined and the sintered body layer. [Effects of the Invention]

[0011] According to the semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure, it is possible to provide a semiconductor device and a method for manufacturing the semiconductor device that include a bonding layer that has high heat resistance, high reliability, and high heat dissipation properties. [Brief explanation of the drawings]

[0012] [Figure 1] 3 is a schematic cross-sectional view of the semiconductor device according to the first embodiment taken along line XX in FIG. 2. [Figure 2] 1 is a schematic top view of a semiconductor device according to a first embodiment. [Figure 3] 2 is an enlarged view of a region A in FIG. 1 of the semiconductor device according to the first embodiment. [Figure 4] 3 is a flowchart showing the steps of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 5] 7 is a schematic cross-sectional view of the semiconductor device taken along the line XX in FIG. 6, illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Figure 6] 1 is a schematic top view of a semiconductor device for explaining a method for manufacturing a semiconductor device according to a first embodiment. [Figure 7] 10 is a schematic top view showing a semiconductor element and terminals of a semiconductor device according to a modification of the first embodiment. FIG. [Figure 8] 10 is a schematic cross-sectional view of the semiconductor device according to the second embodiment taken along line XX in FIG. 9. [Figure 9] FIG. 10 is a schematic top view of a semiconductor device according to a second embodiment. [Figure 10] 9 is an enlarged view of a region A in FIG. 8 of the semiconductor device according to the second embodiment. [Figure 11] 7 is a schematic cross-sectional view of the semiconductor device taken along the line XX in FIG. 6, illustrating a manufacturing method of the semiconductor device according to the second embodiment. [Figure 12] 1 is a schematic top view of a semiconductor device for explaining a method for manufacturing a semiconductor device according to a first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0013] <Introduction> One side in a direction parallel to the depth direction of the semiconductor device is referred to as "top" and the other side as "bottom." Of the two main surfaces of the semiconductor element 1, layer, or other member, one surface is referred to as the top surface and the other surface is referred to as the bottom surface. The directions of "top" and "bottom" are not limited to the direction of gravity or the directions when the semiconductor device is mounted.

[0014] Furthermore, the drawings are schematic, and the relative sizes and positions of images shown in different drawings are not necessarily accurately depicted and may be changed as appropriate. In the following description, similar components are denoted by the same reference numerals, and their names and functions are also the same. Therefore, detailed descriptions thereof may be omitted.

[0015] Embodiment 1 The first embodiment will be described below with reference to the drawings. FIG. 1 is a schematic cross-sectional view of a semiconductor device 100 according to the first embodiment. FIG. 2 is a schematic top view of the semiconductor device 100 according to the first embodiment. FIG. 1 shows a cross section taken along the dashed dotted line X-X shown in FIG. 2. FIG. 3 is an enlarged view of a region A shown in FIG. 1.

[0016] 1 to 3, the configuration of the semiconductor device 100 will be described. As shown in Fig. 2, the semiconductor device 100 includes a semiconductor element 1, a member to be joined 2, and a joining layer 5 made of a sintered body layer 3 and solder 4.

[0017] The semiconductor element 1 is made of various semiconductor materials such as silicon (Si), silicon carbide (SiC), or gallium nitride (GaN). The thickness of the semiconductor element 1 is preferably 100 μm or more to prevent the semiconductor element 1 from cracking due to external force. As shown in FIG. 2, the shape of the semiconductor element 1 may be rectangular when viewed from above, and one side of the semiconductor element 1 may be 5 mm or more when viewed from above.

[0018] Although not shown, the semiconductor element 1 has an electrode layer on the upper surface side. The electrode layer may be made of an aluminum alloy. For example, the electrode layer is made of an aluminum-silicon alloy (Al—Si alloy).

[0019] A plating layer may be provided on the upper surface of the electrode layer. The plating layer may be made of, for example, Au, nickel or a nickel alloy, or palladium. The plating layer may have a laminated structure including, for example, two or more metal layers. The laminated structure may be made of, for example, a Ni layer, a Pd layer, and an Au layer, and is preferably formed in the order Ni, Pd, and Au from the upper surface side of the semiconductor element 1. By forming Pd on Ni, it is possible to suppress diffusion of Ni to the bonding interface between the semiconductor element 1 and the sintered body layer 3 described below. For example, the Ni layer may be 15 μm thick, the Pd layer may be 100 nm thick, and the Au layer may be 200 nm thick. The electrode layer and plating layer may be collectively referred to as the electrode layer.

[0020] The members to be joined 2 are intended to be members made of a sinterable metal and a sinterable bonding material, which will be described later. In this embodiment, the members to be joined 2 are terminals, as shown in FIGS. 1 and 2. The terminals are preferably made of copper, for example. By using copper, adhesion to the solder and the sinterable bonding material and heat dissipation can be further improved. In addition, the thickness of the members to be joined 2 is preferably 1 mm or more to ensure heat dissipation and formability for forming the openings 2a, which will be described later. The members to be joined 2 may also be mounted components, such as capacitors.

[0021] 1 and 2, the members to be joined 2 preferably have an opening 2a penetrating the upper and lower surfaces of the members to be joined 2. As shown in FIG. 2, the inner wall 2b of the members to be joined 2 that forms the opening 2a is preferably perpendicular to the bonding interface between the members to be joined 2 and the sintered body layer 3. In addition, in FIG. 1, the width of the opening 2a is exaggerated compared to its actual width. In order to allow the molten solder to flow through the opening 2a, it is desirable that the width of the opening 2a be 1 mm or more. In this embodiment, the shape of the opening 2a is rectangular, as shown in FIG. 2.

[0022] 1 and 2, the members to be joined 2 may have a metal plating portion 6 at a location where the sintered body layer 3 and the solder 4 come into contact. By applying metal plating to the members to be joined 2 at this location, it is possible to improve the adhesion between the members to be joined 2 and the sintered body layer 3 and the solder 4. The metal plating portion 6 is made of, for example, Ag, Au, Sn, or an alloy plating containing any of these as the main component.

[0023] As shown in FIGS. 1 and 3 , the sintered body layer 3 bonds the semiconductor element 1 and the member to be joined 2 and is provided so as to be in direct contact with the semiconductor element 1 and the member to be joined 2. In this embodiment, the sintered body layer 3 is provided on an electrode layer provided on the upper surface of the semiconductor element 1. The sintered body layer 3 is formed by sintering metal particles, which are sintering bonding materials. The metal particles are preferably composed of Ag, Cu, Au, Ni, or an alloy containing these as their main components, which have high thermal conductivity. However, Au is expensive, Cu reduces sintered density due to oxidation, and Ni is inferior to Ag in terms of sintered density reduction due to oxidation and heat dissipation. Therefore, the metal particles are preferably composed of Ag or an alloy containing Ag as its main component. Furthermore, the particle size of the metal particles is arbitrary as long as the sintering temperature of the metal particles is lower than the melting point of the solder. In this embodiment, the particle size of the metal particles is 100 nm or more and less than 10 μm. When the particle size of metal particles is on the nano-order, they can be sintered at a temperature lower than the metal's natural melting point, so in some cases it is desirable for the particle size to be less than 1 μm in relation to the solder material.

[0024] As shown in FIGS. 1 and 3 , the solder 4 is provided so as to fill the gap at the bonding interface between the workpiece 2 and the sintered body layer 3. Specifically, if a gap occurs between the workpiece 2 and the sintered body layer 3, it is desirable that the solder 4 be provided so as to fill the gap. The solder 4 here also includes intermetallic compounds formed by the reaction between the solder and the workpiece 2 or the sintered body layer 3, and the solder 4 may be composed solely of the intermetallic compounds. As shown in FIGS. 1 and 3 , it is desirable that the solder 4 be provided so as to fill the entire gap at the bonding interface between the workpiece 2 and the sintered body layer 3. Specifically, if a gap occurs between the workpiece 2 and the sintered body layer 3, it is desirable that the solder 4 be provided so as to fill the entire gap. Furthermore, as shown in FIG. 1 , it is desirable that the solder 4 be in contact with the inner wall 2 b of the workpiece 2. The solder may be made of, for example, Sn, In, Bi, Zn, Al, or an alloy containing these as its main component, and preferably Sn or an alloy containing Sn as its main component.

[0025] The semiconductor device 100 of this embodiment is configured as described above. By providing a sintered body layer 3 that bonds the semiconductor element 1 and the bonded member 2 and is provided so as to be in direct contact with the semiconductor element 1 and the bonded member 2, and a bonding layer 5 made of solder 4 that is interposed in the gap at the bonding interface between the bonded member 2 and the sintered body layer 3, it is possible to provide a semiconductor device and a method for manufacturing a semiconductor device that include a bonding layer that has high heat resistance, high reliability, and high heat dissipation. The reason for this will be explained below.

[0026] First, by sintering and bonding the semiconductor element 1 and the workpiece 2 using a sintering bonding material, the proportion of the sintered body layer 3 in the bonding layer 5 can be increased, resulting in a highly heat-resistant and highly reliable bonding layer. Furthermore, by interposing solder 4 in the gap at the bonding interface between the workpiece 2 and the sintered body layer 3, even if the workpiece 2 deforms due to thermal expansion or other factors during sintering, delamination at the bonding interface between the workpiece 2 and the sintered body layer 3 can be suppressed. As a result, a highly heat-resistant, highly reliable, and highly heat-dissipating bonding layer can be formed, enabling semiconductor devices to operate at high temperatures. Furthermore, by interposing solder 4 in the entire gap at the bonding interface between the workpiece 2 and the sintered body layer 3, delamination at the bonding interface between the workpiece 2 and the sintered body layer 3 can be further suppressed. Furthermore, since the solder 4 contacts the inner wall 2b of the workpiece 2, the contact area between the workpiece 2 and the solder 4 increases, resulting in a stronger and more heat-dissipating bonding layer.

[0027] In the present invention, since the semiconductor element 1 is not easily thermally deformed, i.e., peeling is less likely to occur at the bonding interface between the semiconductor element 1 and the sintered body layer 3, the solder 4 is interposed only at the bonding interface between the sintered body layer 3 and the member to be joined 2, which is generally more susceptible to thermal deformation than the semiconductor element 1. However, the solder 4 may also be interposed at the bonding interface between the semiconductor element 1 and the sintered body layer 3. The ease of peeling also varies depending on the positional relationship in the direction of gravity. An object placed below the direction of gravity is more likely to adhere to the sintered body layer 3 due to the influence of gravity than an object placed above the direction of gravity, i.e., peeling is less likely to occur. Therefore, it is desirable to interpose the solder 4 at the bonding interface between the sintered body layer 3 and an object placed above the direction of gravity.

[0028] Furthermore, in this embodiment, the members to be joined 2 have metal-plated portions 6 at locations that come into contact with the sintered body layer 3 and the solder 4. As described above, by applying metal plating to these locations of the members to be joined 2, it is possible to improve the adhesion between the members to be joined 2 and the sintered body layer 3 and the solder 4, thereby further improving heat dissipation. Therefore, it is possible to further realize high-temperature operation of the semiconductor device.

[0029] Furthermore, when the semiconductor element 1 is made of SiC, the breakdown voltage is higher than that of Si, so a higher voltage is applied during use of the semiconductor device, and the temperature is likely to rise. Therefore, SiC is required to have higher heat dissipation properties. By applying the present invention, even when the semiconductor element 1 is made of SiC, a bonding layer with high heat resistance, high reliability, and high heat dissipation properties can be formed, thereby realizing high-temperature operation of the semiconductor device.

[0030] Furthermore, by using Ag as the metal particles as in this embodiment, the heat dissipation properties of the sintered body layer 3 can be further improved, so that a bonding layer with even higher heat dissipation properties can be formed, further enabling the semiconductor device to operate at higher temperatures.

[0031] Next, an example of a method for manufacturing a semiconductor device according to this embodiment will be described with reference to FIGS. 4 to 6. FIG. 4 is a flowchart showing an example of the steps of the method for manufacturing a semiconductor device according to this embodiment. FIG. 5 is a schematic cross-sectional view showing a semiconductor device after the metal particle layer forming step, the bonded member arranging step, and the solder supplying step of the method for manufacturing a semiconductor device according to this embodiment have been performed, and before the first bonding step has been performed. FIG. 6 is a schematic top view showing a semiconductor device after the metal particle layer forming step, the bonded member arranging step, and the solder supplying step of the method for manufacturing a semiconductor device according to this embodiment have been performed, and before the first bonding step has been performed. Note that the method for manufacturing a semiconductor device according to this embodiment is partially similar to conventional methods for manufacturing semiconductor devices, and therefore the following description will mainly focus on the differences from conventional methods for manufacturing semiconductor devices.

[0032] As shown in FIG. 4, the method for manufacturing a semiconductor device includes a metal particle layer forming step, a bonded member arranging step, a solder supplying step, a first bonding step, a second bonding step, and a cooling step.

[0033] First, the metal particle layer formation process will be described. A metal particle layer 7 having a sintering temperature lower than the melting point of the solder is formed on the upper surface of the semiconductor element 1. In this embodiment, the metal particle layer 7 is formed on an electrode layer provided on the upper surface of the semiconductor element 1. In this embodiment, the metal particle layer 7 is composed of Ag. Here, an example of a method for forming the metal particle layer 7 will be described. For example, a method can be used in which a paste containing metal particles and a solvent is prepared and then applied to the upper surface of the semiconductor element 1. The application method can be, for example, metal mask printing or dispense application. The solvent is selected to have a low boiling point so that it evaporates completely during the heating process performed in the first bonding process. Examples of solvents that can be used include Texanol, butyl carbitol, butyl carbitol acetate, and hexyl carbitol. Note that if the proportion of solvent in the paste is high, it is possible that not all of the solvent evaporates during heating. Furthermore, the spacing between the metal particles increases, which can hinder sintering of the metal particles. Therefore, it is preferable to have a low proportion of solvent in the paste. For example, it is desirable that the solvent content in the paste be 15 wt % or less.

[0034] Next, the bonded member placement step will be described. The bonded members 2 are placed so that they are in direct contact with the upper surfaces of the metal particle layer 7. At this time, it is desirable to pressurize the bonded members 2 toward the semiconductor element 1 with a pressure large enough to ensure that the metal particle layer 7 adheres to the entire bonded surface of the bonded members 2, but not so large that the metal particles spread to the side surfaces 2c and upper surfaces of the bonded members 2 other than the bonded surface. Note that the pressure is, for example, 3 to 10 N, depending on the viscosity of the solvent contained in the paste for the metal particle layer 7. In this embodiment, the bonded members 2 have openings 2a penetrating the upper and lower surfaces of the bonded members 2. Furthermore, as described above, the bonded members 2 may have a metal-plated portion 6. In this case, the metal-plated portion of the bonded members 2 may be in direct contact with the upper surface of the metal particle layer 7, as shown in FIG. 5. Note that in this embodiment, the bonded members 2 are terminals. The metal plating portion 6 can be formed by wet plating methods such as electrolytic plating and electroless plating, but dry plating methods such as sputtering, ion plating, and hot dip plating may also be used.

[0035] Next, the solder supplying step will be described. As shown in FIGS. 5 and 6, the solder 4 is supplied to the workpieces 2 so as not to come into contact with the metal particle layer 7. In this embodiment, the solder 4 is made of Sn. If the solder 4 comes into contact with the metal particle layer 7 during supplying, the solder 4 and the metal particles will react during heating in the first and second joining steps, forming a large amount of intermetallic compound. This may result in failure to achieve a sintered bond between the semiconductor element 1 and the workpieces 2, and a soldered bond between the workpieces 2 and the sintered body layer 3. Therefore, to form an appropriate amount of intermetallic compound, it is necessary to prevent the solder 4 from coming into contact with the metal particles during heating in the first joining step. Therefore, in the solder supplying step, the solder 4 is supplied so as not to come into contact with the metal particles. In this embodiment, the solder 4 is supplied to the upper surface of the workpieces 2 so that the solder 4 is positioned above the opening 2a. This prevents the solder 4 from coming into contact with the metal particle layer 7. The solder 4 must melt at a temperature higher than the heating temperature used in the first joining step, i.e., the sintering temperature of the metal particles. Therefore, a solder 4 with a melting point higher than the sintering temperature of the metal particles used is used. The solder 4 may be in the form of a sheet, thread, or pellet, for example, but in this embodiment, a sheet-like solder 4 is used, which makes it easier to control the amount of solder 4 supplied.

[0036] Next, the first bonding step will be described. The metal particle layer 7 is sintered by heating at a first temperature lower than the melting point of the solder 4 but equal to or higher than the sintering temperature of the metal particles, forming a sintered body layer 3 and bonding the semiconductor element 1 and the bonded member 2. A sintering process using a paste containing metal particles and a solvent as the sintering bonding material will be described. The organic components covering the surfaces of the metal particles are decomposed by heat, sintering the metal particles together to form a sintered body layer 3, thereby sinter-bonding the semiconductor element 1 and the bonded member 2. When a paste containing metal particles and a solvent is used as the sintering bonding material, sinter-bonding can be achieved without applying pressure during sintering. The heat-resistant temperature of the sintered body layer 3 after sinter-bonding is approximately the same as the melting point of the metal particles used (e.g., 960°C for Ag), providing higher heat resistance than solder. Note that, although depending on the organic component, organic solvents decompose at approximately 200–300°C, allowing sinter-bonding at temperatures that do not deteriorate the bonded member 2. An example of a heating method is to place a semiconductor device composed of the joined member 2, solder 4, metal particle layer 7, and semiconductor element 1 combined in the above-mentioned process into a normal pressure heating furnace filled with an inert gas such as nitrogen, and heat the device by setting the temperature inside the heating furnace to the above-mentioned first temperature.

[0037] Next, the second joining step will be described. The solder 4 is melted by heating at a second temperature equal to or higher than the melting point of the solder 4, and the molten solder 4 is interposed in the gap at the joining interface between the joined member 2 and the sintered body layer 3, thereby joining the joined member 2 and the sintered body layer 3. One example of a heating method is a method in which the temperature inside a heating furnace is set to the second temperature after the first joining step. Note that the second temperature is preferably 10°C or more higher than the melting point of the solder 4 in order to completely melt the solder 4. Furthermore, in this embodiment, in the solder supplying step, the solder 4 is supplied onto the upper surface of the joined member 2 so that the solder 4 is positioned above the opening 2a. Therefore, in the second joining step, the solder 4 arranged on the opening 2a melts, and the molten solder 4 passes through the opening 2a provided in the joined member 2, and the molten solder 4 penetrates the sintered body layer 3 from the portion of the sintered body layer 3 located directly below the opening 2a toward the outside. As a result, as shown in FIG. 1 , the molten solder 4 can be interposed in the gaps at the joining interface between the joined member 2 and the sintered body layer 3. Note that it is desirable to interpose the molten solder 4 in the entire gap at the joining interface between the joined member 2 and the sintered body layer 3. In the solder supplying step, the amount of solder 4 supplied may be appropriately changed so that the molten solder 4 is interposed in the entire gap at the joining interface between the joined member 2 and the sintered body layer 3. Furthermore, when Ag-based metal particles and Sn-based solder 4 are used as in this embodiment, Sn easily penetrates Ag, and therefore the molten solder 4 easily penetrates the sintered body layer 3 in the second joining step. Therefore, it is possible to easily interpose the molten solder 4 in the gap at the joining interface between the joined members 2 and the sintered body layer 3. Furthermore, in the second joining step, by controlling the heating temperature and heating time, it is possible to cause the solder 4 to react with the joined members 2 or the sintered body layer 3 to form an intermetallic compound. In this case, the solder 4 itself may be eliminated to leave only the intermetallic compound, or the solder 4 may be left to contain both the intermetallic compound and the solder 4. When the solder 4 itself is eliminated, it is possible to leave only the intermetallic compound, which has a higher heat resistance than the solder 4, and therefore it is possible to form a joining layer 5 that is more heat resistant than when the solder 4 is left.Furthermore, when the solder 4 is left, the solder 4, which has higher ductility than the intermetallic compound, can be interposed, so the bonding layer 5 is less likely to crack than when the solder 4 itself is removed, and a highly reliable bonding layer 5 can be formed. Furthermore, when metal particles composed of Ag and solder 4 composed of Sn are used as in this embodiment, the intermetallic compound can be composed of Sn and Ag, and a bonding layer 5 with higher heat dissipation and higher reliability can be formed.

[0038] Finally, the cooling step will be described. The semiconductor device is cooled, and the sintered body layer 3 and the solder 4 are cooled to complete the bonding.

[0039] The semiconductor device 100 is fabricated through the above-described steps. In the first bonding step, a paste containing a mixture of metal particles and a solvent is used as the sintering bonding material. However, a sheet of solidified powdered metal particles may also be used as the sintering bonding material. However, when a sheet of solidified powdered metal particles is used, pressure must be applied during the sintering step of the first bonding step to achieve sinter bonding. Therefore, it is preferable to use a paste containing a mixture of metal particles and a solvent that can be sinter bonded without pressure during sintering. Conventionally, when a mixture of metal particles and an organic solvent is used as the sintering bonding material in the first bonding step, pressure is required to densely sinter the metal particles to enhance heat dissipation after the organic components volatilize. However, when bonding is performed without pressure, there is a limit to how much heat alone during sintering can promote the diffusion of the metal particles, resulting in a problem of insufficient bonding strength and low reliability of the bonding layer 5. Furthermore, in conventional bonding without pressure, if the members to be bonded 2 deform due to thermal expansion or the like, the sinter bonding material does not melt, and therefore cannot follow the deformation, which can result in peeling at the bonding interface between the members to be bonded 2 and the sintered body layer 3. When peeling occurs, there is a problem of deterioration in heat dissipation. However, in this embodiment, even when sinter bonding is performed without pressure, molten solder 4 can be interposed in the gaps between the metal particles, ensuring the heat dissipation and reliability of the bonding layer 5.

[0040] Furthermore, in the above, in the solder supplying step, the solder 4 is supplied to the upper surface of the workpiece 2 so that the solder 4 is positioned over the opening 2a, but the solder may be supplied not only over the opening 2a but also to the side surface 2c of the workpiece 2. For example, paste solder may be used and applied to the side surface 2c of the workpiece 2. By supplying the solder to the side surface 2c in the solder supplying step, the solder 4 supplied to the side surface 2c of the workpiece 2 melts in the second joining step, and the molten solder 4 flows over the side surface 2c of the workpiece 2, allowing the molten solder 4 to permeate the sintered body layer 3 from the outer portion toward the inside. Therefore, by supplying solder to both the opening 2a and the side surface 2c of the workpiece 2 in the solder supplying step, the molten solder 4 can penetrate the sintered body layer 3 from both the outside and the inside of the sintered body layer in the second joining step, and the molten solder 4 can be more reliably interposed in gaps throughout the entire joining interface between the workpiece 2 and the sintered body layer 3. Note that if solder is supplied not only to the opening 2a but also to the side surface 2c of the workpiece 2, there is a possibility that the solder 4 will fall onto the semiconductor element 1 or that the solder 4 will come into contact with the metal particle layer 7. Therefore, by using methods such as making the size of the workpiece 2 smaller than the size of the electrode layer provided on the upper surface of the semiconductor element 1, sloping the side surface 2c of the workpiece 2 so that it has a trapezoidal shape, or appropriately controlling the amount of solder 4 supplied, it is possible to prevent the solder 4 from falling onto the semiconductor element 1 and the solder 4 from coming into contact with the metal particle layer 7.

[0041] Next, a modification of the first embodiment will be described with reference to Fig. 7. In Fig. 7, the size of the opening 2a in the member to be joined 2 is exaggerated compared to the actual size of the opening 2a. Fig. 7 is a schematic top view showing the semiconductor element 1 and the member to be joined 2 of the semiconductor device according to the first modification. In Fig. 7, a terminal is shown as an example of the member to be joined 2.

[0042] As shown in Figures 7(a), (b), (c), and (d), the shape of the opening 2a of the terminal may be changed as appropriate. As shown in Figure 7(a), the opening 2a may be circular, or as shown in Figure 7(b), the opening 2a may be rectangular. As shown in Figure 7(c), the opening 2a may be semi-elliptical. Furthermore, as shown in Figure 7(d), multiple openings 2a may be provided in a mesh pattern. Note that, considering ease of manufacturing, it is preferable that the openings 2a be circular. Furthermore, by providing multiple openings 2a in a mesh pattern, the molten solder 4 can be evenly distributed in the gaps at the bonding interface between the joined member 2 and the sintered body layer 3.

[0043] Embodiment 2 A semiconductor device 200 according to a second embodiment will be described with reference to Figures 8 to 10. Figure 8 is a schematic cross-sectional view of the semiconductor device 200 according to the second embodiment. Figure 9 is a schematic top view of the semiconductor device 200 according to the second embodiment. Note that Figure 8 shows a cross section taken along the dashed dotted line X-X shown in Figure 9. Figure 10 is an enlarged view of region A shown in Figure 8. Note that in Figures 8 to 10, the members to be joined 2 are shown as terminals.

[0044] As shown in Figures 8 to 10, the semiconductor device 200 of embodiment 2 differs from the semiconductor device 100 of embodiment 1 in that the member to be joined 2 does not have an opening 2a that penetrates the upper and lower surfaces of the member to be joined 2.

[0045] As shown in FIGS. 8 and 10 , the sintered body layer 3 bonds the semiconductor element 1 and the workpiece 2, and is provided so as to be in direct contact with the semiconductor element 1 and the workpiece 2, as in the first embodiment. Also, as in the first embodiment, the solder 4 is provided so as to be interposed in the gap at the bonding interface between the workpiece 2 and the sintered body layer 3, as shown in FIGS. 8 and 10 . Also, as in the first embodiment, the solder 4 may contain an intermetallic compound formed by a reaction between the solder and the workpiece 2 or the sintered body layer 3, or the solder 4 may be composed solely of the intermetallic compound. In the second embodiment, the solder 4 is provided over the entire lower surface of the workpiece 2 as shown in FIGS. 8 and 10 . However, as in the first embodiment, it is sufficient that the solder 4 is provided so as to be interposed at least in the gap at the bonding interface between the workpiece 2 and the sintered body layer 3.

[0046] The semiconductor device 200 of the second embodiment is configured as described above. As in the first embodiment, the semiconductor device 200 according to the second embodiment is provided with a sintered body layer 3 that bonds the semiconductor element 1 and the bonded member 2 and is provided so as to be in direct contact with the semiconductor element 1 and the bonded member 2, and a bonding layer 5 made of solder 4 that is interposed in the gap at the bonding interface between the bonded member 2 and the sintered body layer 3. Therefore, the semiconductor device 200 of the second embodiment can achieve the same effects as the first embodiment.

[0047] Next, a method for manufacturing a semiconductor device according to a second embodiment will be described with reference to Figures 11 and 12. Figure 11 is a schematic cross-sectional view showing a semiconductor device after the metal particle layer forming step, the bonded member arranging step, and the solder supplying step of the method for manufacturing a semiconductor device according to the second embodiment have been performed, and before the first bonding step has been performed. Figure 12 is a schematic top view showing a semiconductor device after the metal particle layer forming step, the bonded member arranging step, and the solder supplying step of the method for manufacturing a semiconductor device according to the second embodiment have been performed, and before the first bonding step has been performed.

[0048] The method for manufacturing a semiconductor device according to the second embodiment differs from that according to the first embodiment in that the member to be joined 2 does not have an opening 2a penetrating the upper and lower surfaces of the member to be joined 2, and therefore the solder supplying step and the second joining step are partially different. The following description will focus on the differences between the solder supplying step and the second joining step, and the rest of the method is the same as that according to the first embodiment.

[0049] First, an example of the solder supplying process will be described for a case where the workpieces 2 do not have an opening 2a penetrating the top and bottom surfaces of the workpieces 2. As shown in FIGS. 11 and 12, the solder 4 is supplied to the workpieces 2 so as not to come into contact with the metal particle layer 7. In the second embodiment, as shown in FIGS. 11 and 12, the solder 4 is supplied to the top and side surfaces 2c of the workpieces 2. As described above, when solder is supplied to the side surfaces 2c of the workpieces 2, there is a possibility that the solder 4 will fall onto the semiconductor element 1 or that the solder 4 will come into contact with the metal particle layer 7. Therefore, by using methods such as reducing the size of the workpieces 2 relative to the size of the electrode layer provided on the top surface of the semiconductor element 1, inclining the side surfaces 2c of the workpieces 2, or appropriately controlling the amount of solder 4 supplied, it is possible to prevent the solder 4 from falling onto the semiconductor element 1 and the solder 4 from coming into contact with the metal particle layer 7. In the second embodiment, a solder paste is used and applied to the top and side surfaces of the workpieces 2. 11 and 12, the solder 4 is supplied to both the top surface and the side surface 2c of the member 2 to be joined, but it is sufficient that the solder 4 is supplied to at least the side surface 2c of the member 2 to be joined.

[0050] Next, an example of the second joining step will be described for the case where the members to be joined 2 do not have an opening 2a penetrating the top and bottom surfaces of the members to be joined 2. The solder 4 is melted by heating at a second temperature equal to or higher than the melting point of the solder 4, and the molten solder 4 is interposed in the gap at the joining interface between the members to be joined 2 and the sintered body layer 3, thereby joining the members to be joined 2 and the sintered body layer 3. In the second embodiment, the solder 4 is supplied to at least the side surface 2c of the members to be joined 2 in the solder supplying step. Therefore, in the second joining step, the solder 4 supplied to the side surface 2c of the members to be joined 2 melts, and the molten solder 4 flows over the side surface 2c of the members to be joined 2, so that the molten solder 4 permeates the sintered body layer 3 from the outer portion toward the inside. As a result, as shown in FIG. 1 , the molten solder 4 is interposed in the gap at the joining interface between the members to be joined 2 and the sintered body layer 3. Furthermore, in the second joining step, similarly to the first embodiment, by controlling the heating temperature and heating time, it is possible to cause a reaction between the solder 4 and the joined member 2 or the sintered body layer 3 to form an intermetallic compound. At this time, the solder 4 may be eliminated to leave only the intermetallic compound, or the solder 4 may be left to contain both the intermetallic compound and the solder 4.

[0051] The semiconductor device 200 is fabricated through the above steps.

[0052] The configurations shown in the above embodiments are merely examples of the contents of the present disclosure and may be combined with other known technologies. Furthermore, it is also possible to combine the embodiments with each other and the modified examples with each other. Furthermore, it is also possible to omit or modify part of the configurations without departing from the scope of the present disclosure.

[0053] Various aspects of the present disclosure are summarized below as appendices.

[0054] (Appendix 1) A semiconductor device including a semiconductor element and a member to be joined made of metal, a sintered layer of metal particles that bonds the semiconductor element and the workpiece and is provided so as to be in direct contact with the semiconductor element and the workpiece; and solder interposed in a gap at a joining interface between the member to be joined and the sintered body layer. (Appendix 2) 2. The semiconductor device according to claim 1, wherein the solder includes an intermetallic compound of the solder. (Appendix 3) 3. The semiconductor device according to claim 1, wherein the solder is provided so as to be interposed in a gap across the entire bonding interface between the member to be bonded and the sintered body layer. (Appendix 4) 4. The semiconductor device according to any one of claims 1 to 3, wherein the member to be joined has a metal-plated portion at a portion that comes into contact with the sintered body layer and the solder. (Appendix 5) 5. The semiconductor device according to any one of claims 1 to 4, wherein the members to be joined have an opening penetrating the upper and lower surfaces of the members to be joined. (Appendix 6) 6. The semiconductor device according to claim 5, wherein the solder contacts an inner wall of the member to be joined that defines the opening. (Appendix 7) 7. The semiconductor device according to claim 5, wherein a plurality of the openings are provided in the member to be joined. (Appendix 8) 8. The semiconductor device according to claim 1, wherein the member to be joined is a terminal. (Appendix 9) 9. The semiconductor device according to any one of claims 1 to 8, wherein the metal particles are made of Ag. (Appendix 10) 10. The semiconductor device according to any one of claims 1 to 9, wherein the solder is made of Sn. (Appendix 11) 11. The semiconductor device according to any one of claims 1 to 10, wherein the semiconductor element is made of SiC. (Appendix 12) a metal particle layer forming step of forming a metal particle layer having a sintering temperature lower than the melting point of solder on the upper surface of the semiconductor element; a bonded member placement step of placing a bonded member so as to be in direct contact with an upper surface of the metal particle layer; a solder supplying step of supplying the solder to the workpieces so as not to come into contact with the metal particle layer; a first joining step of sintering the metal particle layer by heating at a first temperature that is lower than the melting point of the solder and equal to or higher than the sintering temperature to form a sintered body layer and join the semiconductor element and the member to be joined; a second joining step of heating the solder at a second temperature equal to or higher than the melting point of the solder to melt the solder, and interposing the molten solder in a gap at the joining interface between the joined member and the sintered body layer to join the joined member and the sintered body layer. (Appendix 13) 13. The method for manufacturing a semiconductor device according to claim 12, wherein in the second joining step, the solder is reacted with the member to be joined or the sintered body layer to further form an intermetallic compound. (Appendix 14) 14. The method for manufacturing a semiconductor device according to claim 13, wherein in the second joining step, the solder is reacted with the joined member or the sintered body layer to further form an intermetallic compound, thereby causing the solder to disappear. (Appendix 15) the workpieces have openings penetrating the upper and lower surfaces of the workpieces, In the solder supplying step, the solder is supplied onto the upper surface of the workpiece so that the solder is disposed above the opening; The method for manufacturing a semiconductor device according to any one of Appendices 12 to 14, wherein in the second joining step, the molten solder passes through the opening, thereby interposing the molten solder in a gap at the joining interface between the joined member and the sintered body layer, thereby joining the joined member and the sintered body layer. (Appendix 16) In the solder supplying step, the solder is supplied to at least a side surface of the workpiece, The method for manufacturing a semiconductor device according to any one of appendices 12 to 14, wherein in the second joining step, the molten solder flows over the side surfaces of the members to be joined, thereby interposing the molten solder in a gap at the joining interface between the members to be joined and the sintered body layer, thereby joining the members to be joined and the sintered body layer. (Appendix 17) 17. The method for manufacturing a semiconductor device according to any one of claims 12 to 16, wherein the members to be joined are terminals. [Explanation of symbols]

[0055] 1 semiconductor element, 2 bonded member, 2a opening, 2b inner wall, 2c side surface, 3 sintered body layer, 4 solder, 5 bonding layer, 6 metal plating portion, 7 metal particle layer

Claims

1. A semiconductor device comprising a semiconductor element and a bonded member made of metal, The semiconductor element and the member to be joined are joined, and a sintered layer of metal particles is provided so as to be in direct contact with the semiconductor element and the member to be joined, The solder is interposed in the gaps of the entire bonding interface between the member to be joined and the sintered body layer. The member to be joined has an opening that penetrates the upper and lower surfaces of the member to be joined. The sintered body layer is provided directly below the opening, and is a semiconductor device.

2. The semiconductor device according to claim 1, wherein the solder comprises an intermetallic compound of the solder.

3. The semiconductor device according to claim 1, wherein the solder is not provided at the bonding interface between the semiconductor element and the sintered body layer, but is provided at the bonding interface between the member to be bonded and the sintered body layer.

4. The semiconductor device according to claim 1, wherein the member to be joined has a metal-plated portion in the portion that comes into contact with the sintered body layer and the solder.

5. The semiconductor device according to claim 1, wherein the solder is in contact with the inner wall of the member to be joined that constitutes the opening.

6. The semiconductor device according to claim 1, wherein a plurality of openings are provided in the member to be joined.

7. The semiconductor device according to any one of claims 1 to 6, wherein the member to be joined is a terminal.

8. The semiconductor device according to any one of claims 1 to 6, wherein the metal particles are composed of Ag.

9. The semiconductor device according to any one of claims 1 to 6, wherein the solder is composed of Sn.

10. The semiconductor device according to any one of claims 1 to 6, wherein the semiconductor element is composed of SiC.

11. A metal particle layer formation step, in which a metal particle layer having a sintering temperature lower than the melting point of solder is formed on the upper surface of a semiconductor device, A step of arranging the member to be joined so as to be in direct contact with the upper surface of the metal particle layer, A solder supply step of supplying the solder to the member to be joined so as not to come into contact with the metal particle layer, A first joining step involves heating the metal particle layer at a first temperature lower than the melting point of the solder and higher than the sintering temperature to sinter it, thereby forming a sintered body layer and joining the semiconductor element and the member to be joined. A method for manufacturing a semiconductor device, comprising: a second joining step of heating the solder to a second temperature above its melting point to melt the solder, interposing the molten solder in the gap at the joining interface between the member to be joined and the sintered body layer, thereby joining the member to be joined and the sintered body layer.

12. The method for manufacturing a semiconductor device according to claim 11, wherein in the second bonding step, the solder is reacted with the member to be bonded or the sintered body layer to further form an intermetallic compound.

13. The method for manufacturing a semiconductor device according to claim 12, wherein in the second bonding step, the solder is reacted with the member to be bonded or the sintered body layer to further form an intermetallic compound and the solder is removed.

14. The member to be joined has an opening that penetrates the upper and lower surfaces of the member to be joined. In the solder supply step, the solder is supplied to the upper surface of the member to be joined such that the solder is positioned on the opening. The method for manufacturing a semiconductor device according to claim 11, wherein in the second joining step, the molten solder passes through the opening, interposing the molten solder in the gap at the joining interface between the member to be joined and the sintered body layer, thereby joining the member to be joined and the sintered body layer.

15. In the solder supply step, the solder is supplied to at least the side surface of the member to be joined. The method for manufacturing a semiconductor device according to claim 11, wherein in the second joining step, the molten solder flows along the side surface of the member to be joined, thereby interposing the molten solder in the gap at the joining interface between the member to be joined and the sintered body layer, and joining the member to be joined and the sintered body layer.

16. The method for manufacturing a semiconductor device according to any one of claims 12 to 15, wherein the member to be joined is a terminal.