Power conditioner
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2024-09-02
- Publication Date
- 2026-03-05
AI Technical Summary
Existing power conditioners fail to prevent overcurrents when unbalanced loads are applied to the AC side of inverters, leading to potential damage due to increased negative-phase-sequence currents.
A power conditioner with a controller that calculates positive- and negative-sequence currents and virtual impedances, adjusting voltage commands to suppress these currents below rated levels, using FPGA or ASIC hardware for high-speed calculations.
Effectively prevents overcurrents on the AC side of inverters by controlling output currents to remain below rated levels even with unbalanced loads, ensuring stable operation.
Abstract
Description
Power conditioner
[0001] The present disclosure relates to a technique for controlling a power conditioner.
[0002] Patent Document 1 discloses a power conversion device (power conditioner). Specifically, when a negative-phase voltage on the AC side of an inverter is equal to or greater than a predetermined value, the power conditioner determines that the inverter is in islanding operation and controls the inverter to stop.
[0003] Japanese Patent No. 7151911
[0004] However, when an unbalanced load is applied to the AC side of the inverter, the negative-phase-sequence voltage increases, and the negative-phase-sequence current also increases, which may cause the inverter output current to exceed its rated current, resulting in an overcurrent.
[0005] One object of the present disclosure is to provide a technique that can prevent an overcurrent from occurring on the AC side of an inverter even when an unbalanced load is applied to the AC side of the inverter.
[0006] One aspect of the present disclosure relates to a power conditioner. The power conditioner includes an inverter that converts DC power supplied from a DC power source into AC power and supplies the AC power to a power grid, and a controller that controls the inverter. The controller calculates positive-sequence currents on d- and q-axes based on an AC output current of the inverter, and calculates negative-sequence currents on the d- and q-axes based on the AC output current of the inverter. The controller also calculates positive-sequence virtual impedances for suppressing the positive-sequence current on the AC side of the inverter based on an AC output voltage of the inverter, and calculates negative-sequence virtual impedances for suppressing the negative-sequence current on the AC side of the inverter based on the AC output voltage of the inverter. The controller also calculates first three-phase positive-sequence voltages based on the positive-sequence currents on the d- and q-axes and the positive-sequence virtual impedances, and calculates first three-phase negative-sequence voltages based on the negative-sequence currents on the d- and q-axes and the negative-sequence virtual impedances. Furthermore, the controller calculates three-phase first positive-sequence voltages when the positive-sequence current is equal to or greater than a first threshold, and calculates three-phase second positive-sequence voltages that are zero when the positive-sequence current is less than the first threshold, and calculates three-phase first negative-sequence voltages when the negative-sequence current is equal to or greater than a second threshold, and calculates three-phase second negative-sequence voltages that are zero when the negative-sequence current is less than the second threshold. Furthermore, the controller controls the inverter based on voltage command values obtained by subtracting the three-phase second positive-sequence voltages and the three-phase second negative-sequence voltages from three-phase voltage commands generated based on predetermined parameters.
[0007] According to the present disclosure, positive-phase-sequence currents on the dq axes are calculated based on the output currents on the AC side of the inverter, and negative-phase-sequence currents on the dq axes are calculated based on the output currents on the AC side of the inverter. Furthermore, a positive-phase virtual impedance for suppressing the positive-phase current on the AC side of the inverter is calculated based on the output voltage of the AC side of the inverter, and a negative-phase virtual impedance for suppressing the negative-phase current on the AC side of the inverter is calculated based on the output voltage of the AC side of the inverter. Furthermore, first three-phase positive-phase voltages are calculated based on the positive-phase-sequence currents on the dq axes and the positive-phase virtual impedance, and first three-phase negative-phase voltages are calculated based on the negative-phase-sequence currents on the dq axes and the negative-phase virtual impedance. Furthermore, first three-phase positive-phase voltages are calculated when the positive-phase currents are equal to or greater than a first threshold, and zero when the positive-phase currents are less than the first threshold. First three-phase negative-phase voltages are calculated when the negative-phase currents are equal to or greater than a second threshold, and zero when the negative-phase currents are less than the second threshold. Furthermore, the inverter is controlled based on a voltage command value obtained by subtracting the three-phase second positive-phase voltage and the three-phase second negative-phase voltage from a three-phase voltage command generated based on predetermined parameters. As a result, even if an unbalanced load is applied to the AC side of the inverter, the inverter output current is controlled to be less than the rated current. Therefore, it is possible to prevent an overcurrent on the AC side of the inverter.
[0008] FIG. 1 is a diagram for explaining an overview of a power conversion system according to an embodiment. FIG. 2 is a block diagram showing an example of functions of a controller according to an embodiment. FIG. 3 is a block diagram showing a specific example of a positive-phase virtual impedance control unit according to an embodiment. FIG. 4 is a block diagram showing a specific example of a negative-phase virtual impedance control unit according to an embodiment. FIG. 5 is a diagram for explaining specific examples of a first threshold value and a second threshold value according to an embodiment. FIG. 6 is a diagram for explaining an example of a processing result when an unbalanced load is applied according to an embodiment.
[0009] A power conditioner according to an embodiment of the present disclosure will be described with reference to the accompanying drawings. Elements common to the drawings will be designated by the same reference numerals, and duplicated descriptions will be omitted.
[0010] 1. Overview of the Power Conversion System FIG. 1 is a diagram illustrating an overview of a power conversion system 1 according to an embodiment. The power conversion system 1 includes a DC power supply 11, a power conditioner 10, a transformer 20, a power grid 30, a circuit breaker 40, and an unbalanced load 50. The power conditioner 10 includes an inverter 12 and a controller 100. The unbalanced load 50 includes three loads (Ra, Rb, and Rc). The loads Ra, Rb, and Rc are configured, for example, so that the potential differences generated across the loads are different. The unbalanced load 50 is, for example, a generator.
[0011] The DC power supply 11 is a power storage device (e.g., a solar cell module) that stores electricity generated by renewable energy, such as solar power, wind power, and hydropower.
[0012] The inverter 12 is a device that converts DC power output from the DC power supply 11 into AC power and supplies the AC power to the power grid 30 via the transformer 20. The inverter 12 is, for example, a voltage-controlled grid forming (GFM) inverter.
[0013] The controller 100 is connected to the inverter 12 and controls the inverter 12. The controller 100 receives the output voltage Vs and output current Io output from the inverter 12. The output voltage Vs includes a positive-phase voltage Vps and a negative-phase voltage Vns. The output current Io includes a positive-phase current Ipo and a negative-phase current Ino. The output voltage Vs input to the controller 100 is, for example, a detected value of the output voltage Vs (also referred to as a Vs detected value). The Vs detected value includes a detected value of the positive-phase voltage Vps (also referred to as a Vps detected value) and a detected value of the negative-phase voltage Vns (also referred to as a Vns detected value). The output current Io input to the controller 100 is a detected value of the output current Io (also referred to as an Io detected value). The Io detection value includes a detection value of a positive-phase current Ipo (also referred to as an Ipo detection value) and a detection value of a negative-phase current Ino (also referred to as an Ino detection value). These detection values are detected, for example, by a detector (not shown) provided between the inverter 12 and the transformer 20.
[0014] The controller 100 generates a pulse width modulation signal (PWM signal) for controlling the output voltage Vs of the inverter 12 based on the Vs detection value and the Io detection value, and outputs the PWM signal to the inverter 12 so that the inverter 12 operates in accordance with the PWM signal.
[0015] Consider a case where an unbalanced load 50 is connected to the AC side (grid side) of the inverter 12 via the circuit breaker 40. In this case, the three-phase line on the grid side becomes unbalanced, causing the negative-phase voltage Vns to rise. As the negative-phase voltage Vns rises, the negative-phase current Ino also rises, which is likely to cause the output current Io of the inverter 12 to exceed the rated current. Therefore, an overcurrent occurs on the AC side of the inverter 12.
[0016] In this way, when an unbalanced load 50 is applied to the AC side of the inverter 12, it is preferable to control the output current of the inverter 12 to be less than the rated current, thereby preventing the AC side of the inverter 12 from becoming an overcurrent.
[0017] According to the power conditioner 10 (controller 100), positive-sequence currents on the d- and q-axes are calculated based on the AC output current Io of the inverter 12, and negative-sequence currents on the d- and q-axes are calculated based on the AC output current Io of the inverter 12. Furthermore, a positive-sequence virtual impedance for suppressing the positive-sequence current Ipo on the AC side of the inverter 12 is calculated based on the AC output voltage Vs of the inverter 12, and a negative-sequence virtual impedance for suppressing the negative-sequence current Ino on the AC side of the inverter 12 is calculated based on the AC output voltage Vs of the inverter 12. Furthermore, three-phase first positive-sequence voltages are calculated based on the positive-sequence currents on the d- and q-axes and the positive-sequence virtual impedances, and three-phase first negative-sequence voltages are calculated based on the negative-sequence currents on the d- and q-axes and the negative-sequence virtual impedances. Furthermore, when the positive-sequence current Ipo is equal to or greater than a first threshold, a three-phase first positive-sequence voltage is calculated. When the positive-sequence current Ipo is less than the first threshold, a three-phase second positive-sequence voltage is calculated. When the negative-sequence current Ino is equal to or greater than a second threshold, a three-phase first negative-sequence voltage is calculated. When the negative-sequence current Ino is less than the second threshold, a three-phase second negative-sequence voltage is calculated. Furthermore, the inverter 12 is controlled based on a voltage command value obtained by subtracting the three-phase second positive-sequence voltage and the three-phase second negative-sequence voltage from a three-phase voltage command generated based on predetermined parameters. As a result, even if an unbalanced load 50 is applied to the AC side of the inverter 12, the output current Io of the inverter 12 is controlled to be less than the rated current. Therefore, it is possible to prevent an overcurrent on the AC side of the inverter 12. Details of the processing by the controller 100 will be described later.
[0018] 2. Controller 2-1. Configuration Example The controller 100 has hardware that realizes various functions. The hardware includes a processing circuit capable of high-speed calculations. Examples of the processing circuit include an FPGA (Field Programmable Gate Array) and an ASIC (Application Specific Integrated Circuit). In addition to the processing circuit, the hardware may also include a storage device and a computing unit (e.g., a CPU) that executes programs stored in the storage device.
[0019] 2 is a block diagram showing an example of functions of the controller 100 according to the embodiment. The controller 100 includes a dq-axis positive-sequence current calculation unit 110, a dq-axis negative-sequence current calculation unit 120, a positive-sequence virtual impedance control unit 111, a negative-sequence virtual impedance control unit 121, a VSG control unit 140, a voltage adjustment unit 150, a voltage control unit 160, a dq / abc-axis conversion unit 170, a current control unit 180, and a PWM control unit 190.
[0020] The dq-axis positive-sequence current calculation unit 110 calculates the dq-axis positive-sequence currents based on the detected Io value. The dq-axis positive-sequence currents include a d-axis positive-sequence current Ipd and a q-axis positive-sequence current Ipq. The dq-axis positive-sequence current Ipd and the q-axis positive-sequence current Ipq calculated by the dq-axis positive-sequence current calculation unit 110 are expressed, for example, by the following equation (1):
[0021]
[0022] The d- and q-axis negative-sequence current calculation unit 120 calculates the d- and q-axis negative-sequence currents based on the detected Io value. The d- and q-axis negative-sequence currents include a d-axis negative-sequence current Ind and a q-axis negative-sequence current Inq. The d- and q-axis negative-sequence current Ind and Inq calculated by the d- and q-axis negative-sequence current calculation unit 120 are expressed, for example, by the following equation (2):
[0023]
[0024] The positive-sequence virtual impedance control unit 111 performs control to suppress the d-axis and q-axis positive-sequence currents (the d-axis positive-sequence current Ipd and the q-axis positive-sequence current Ipq). Specifically, the positive-sequence virtual impedance control unit 111 calculates a three-phase positive-sequence voltage Vp2_uvw based on the d-axis positive-sequence current Ipd, the q-axis positive-sequence current Ipq, the Vs detected value, and the Io detected value. The three-phase positive-sequence voltage Vp2_uvw is also referred to as a three-phase second positive-sequence voltage Vp2_uvw. A more detailed example of the positive-sequence virtual impedance control unit 111 will be described later.
[0025] The negative-sequence virtual impedance control unit 121 performs control to suppress the d-axis and q-axis negative-sequence currents (d-axis negative-sequence current Ind and q-axis negative-sequence current Inq). The negative-sequence virtual impedance control unit 121 calculates a three-phase negative-sequence voltage Vn2_uvw based on the d-axis negative-sequence current Ind, the q-axis negative-sequence current Inq, the Vs detected value, and the Io detected value. The three-phase negative-sequence voltage Vn2_uvw is also referred to as a three-phase second negative-sequence voltage Vn2_uvw. A more detailed example of the negative-sequence virtual impedance control unit 121 will be described later.
[0026] The Vs detection value input to the positive-phase virtual impedance control unit 111 and the negative-phase virtual impedance control unit 121 may be acquired, for example, via a PLL (Phase Locked Loop) provided in the controller 100. The PLL is a circuit that synchronizes the phase of an input voltage signal and an output voltage signal. This allows the Vs detection value to be synchronized with the phase of the output voltage Vs of the inverter 12, thereby properly connecting the inverter 12 to the power grid 30.
[0027] The VSG control unit 140 executes VSG (Virtual Synchronous Generator) control. VSG is an example of a method for stabilizing the power grid 30, and refers to a virtual synchronous generator that simulates the dynamic characteristics of a synchronous generator in the inverter 12. In other words, the VSG control unit 140 controls a virtual synchronous generator. The VSG control unit 140 calculates a phase command value θref for the output voltage Vs of the inverter 12 using parameters that indicate the dynamic characteristics of the generator. Examples of the parameters include an inertia constant M and a damping constant D.
[0028] The voltage adjustment unit 150 has a function of stabilizing the output voltage Vs of the inverter 12. For example, when the unbalanced load 50 or the power grid 30 fluctuates, the voltage adjustment unit 150 performs voltage adjustment to stabilize the output voltage Vs of the inverter 12. The voltage adjustment unit 150 is, for example, an automatic voltage regulator (AVR). In order to stabilize the output voltage Vs of the inverter 12, the voltage adjustment unit 150 calculates a d-axis voltage command value Vdref and a q-axis voltage command value Vqref. In the example shown in FIG. 2 , the q-axis voltage command value Vqref is set to zero.
[0029] The voltage control unit 160 generates a d-axis positive-sequence current command value Ipd_ref and a q-axis positive-sequence current command value Ipq_ref based on predetermined parameters. The predetermined parameters include a phase command value θref, a d-axis voltage command value Vdref, and a q-axis voltage command value Vqref. When the q-axis voltage command value Vqref is zero, the q-axis positive-sequence current command value Ipq_ref is zero.
[0030] The dq / abc-axis converter 170 generates a current command Iins based on the d-axis positive-sequence current command value Ipd_ref and the q-axis positive-sequence current command value Ipq_ref. Specifically, the dq / abc-axis converter 170 converts the d-axis positive-sequence current command value Ipd_ref and the q-axis positive-sequence current command value Ipq_ref into the abc-axis. The current command Iins is a three-phase component and is also referred to as a three-phase current command Iins.
[0031] Based on the three-phase current commands Iins, the current control unit 180 calculates a voltage command Vins for controlling the output current Io of the inverter 12. The current control unit 180 is also referred to as a current minor loop. The voltage command Vins is a three-phase component, and is also referred to in detail as a three-phase voltage command Vins.
[0032] The PWM control unit 190 generates a PWM signal for controlling the inverter 12 based on a voltage command value Vref obtained by subtracting the three-phase second positive-phase voltage Vp2_uvw and the three-phase second negative-phase voltage Vn2_uvw from the three-phase voltage command Vins.
[0033] For example, consider a case where, after the unbalanced load 50 is applied, the output current Io of the inverter 12 is equal to or greater than a predetermined current (e.g., a rated current) and at least one of the positive-phase current Ipo and the negative-phase current Ino needs to be suppressed. In this case, by calculating the difference between the three-phase second positive-phase voltage Vp2_uvw for suppressing the positive-phase current Ipo and the three-phase second negative-phase voltage Vn2_uvw for suppressing the negative-phase current Ino from the three-phase voltage command Vins, the voltage command value Vref is generated so that the output current Io of the inverter 12 is less than the predetermined current. This makes it possible to control the inverter 12 so as to suppress an overcurrent.
[0034] The controller 100 may be configured without the current control unit 180. For example, the electrical signals output from the voltage control unit 160 may be a d-axis positive-sequence voltage command value Vpd_ref (not shown) and a q-axis positive-sequence voltage command value Vpq_ref (not shown). In this case, the dq / abc-axis converter 170 generates a voltage command Vins (three-phase voltage command Vins) based on the d-axis positive-sequence voltage command value Vpd_ref and the q-axis positive-sequence voltage command value Vpq_ref. This allows the controller 100 to be configured without the current control unit 180.
[0035] 3 is a block diagram showing a specific example of the positive-sequence virtual impedance control unit 111 according to the embodiment. The positive-sequence virtual impedance control unit 111 includes a dq-axis coordinate transformation unit 112, an impedance calculation unit 113, a dq / abc-axis transformation unit 114, and a threshold determination unit 115.
[0036] The dq-axis coordinate converter 112 calculates a dq-axis positive-sequence current Ip_dq based on the d-axis positive-sequence current Ipd and the q-axis positive-sequence current Ipq. The dq-axis positive-sequence current Ip_dq is expressed in a dq-axis coordinate system in which the d-axis positive-sequence current Ipd is on the real axis and the q-axis positive-sequence current Ipq is on the imaginary axis. For example, the dq-axis positive-sequence current Ip_dq is expressed by the following equation (3):
[0037]
[0038] The dq-axis coordinate transformation unit 112 may be provided in the dq-axis positive-sequence current calculation unit 110, instead of in the positive-sequence virtual impedance control unit 111. In this case, the positive-sequence virtual impedance control unit 111 receives the dq-axis positive-sequence current Ip_dq generated by the dq-axis positive-sequence current calculation unit 110.
[0039] The impedance calculation unit 113 calculates a positive-sequence virtual impedance Rv_p based on the output voltage Vs on the AC side of the inverter 12. The positive-sequence virtual impedance Rv_p means an impedance for suppressing a positive-sequence current Ips on the AC side of the inverter 12.
[0040] For example, if the output voltages Vs of all three-phase lines on the AC side of the inverter 12 are less than a predetermined voltage after the unbalanced load 50 is applied, it is estimated that all three-phase lines are short-circuited. In this case, the positive-sequence current Ips increases, causing the output current Io to exceed a predetermined current (e.g., rated current), which could result in an overcurrent on the AC side of the inverter 12. Therefore, the impedance calculation unit 113 calculates a positive-sequence virtual impedance Rv_p to suppress the positive-sequence current Ips.
[0041] As another example, if the output voltages Vs of all three-phase lines on the AC side of the inverter 12 are normal (e.g., 100%) after the unbalanced load 50 is applied, it is estimated that all three-phase lines are in a normal state. In this case, the output current Io becomes less than a predetermined current, and therefore, control may be performed to maintain the positive-sequence current Ips. For example, the impedance calculation unit 113 disables the setting of the positive-sequence virtual impedance Rv_p. When the setting of the positive-sequence virtual impedance Rv_p is disabled, the impedance calculation unit 113 may set the positive-sequence virtual impedance Rv_p to zero.
[0042] The dq / abc-axis converter 114 calculates a three-phase first positive-sequence voltage Vp1_uvw based on the phase command value θ and a dq-axis positive-sequence voltage Vp_dq obtained by multiplying the dq-axis positive-sequence current Ip_dq by the positive-sequence virtual impedance Rv_p. The three-phase first positive-sequence voltage Vp1_uvw is a voltage obtained by converting the dq-axis positive-sequence voltage Vp_dq into three-phase components. The phase command value θ is generated, for example, by the VSG controller 140.
[0043] The threshold determination unit 115 includes a process (referred to as the first process) of determining whether the absolute value of the positive-phase current Ips is greater than or equal to the first threshold THp, and a process (referred to as the second process) of calculating the three-phase second positive-phase voltage Vp2_uvw based on the result of the determination process.
[0044] In the first process, if the absolute value of the positive-sequence current Ips is determined to be equal to or greater than the first threshold THp, the threshold determination unit 115 outputs a determination value (referred to as a first determination value R1) of 1. If the absolute value of the positive-sequence current Ips is determined to be less than the first threshold THp, the threshold determination unit 115 outputs 0 (zero) as the first determination value R1.
[0045] In the second process, the threshold determination unit 115 calculates the three-phase second positive-phase voltage Vp2_uvw by multiplying the three-phase first positive-phase voltage Vp1_uvw by the first determination value R1. For example, when the first determination value R1 is 1, the threshold determination unit 115 sets the three-phase second positive-phase voltage Vp2_uvw to the three-phase first positive-phase voltage Vp1_uvw. When the first determination value R1 is 0, the threshold determination unit 115 sets the three-phase second positive-phase voltage Vp2_uvw to 0 (zero).
[0046] In this way, when the first judgment value R1 is 1, the function of the positive phase virtual impedance control unit 111 (positive phase virtual impedance Rv_p) is substantially enabled, and when the first judgment value R1 is 0, the function of the positive phase virtual impedance control unit 111 (positive phase virtual impedance Rv_p) is substantially disabled.
[0047] Note that even when the first determination value R1 is 1, if the setting of the positive-sequence virtual impedance Rv_p is disabled (zero), the three-phase second positive-sequence voltage Vp2_uvw becomes 0 (zero). The positive-sequence virtual impedance control unit 111 can also set the three-phase second positive-sequence voltage Vp2_uvw in consideration of the states of both the output voltage Vs and the output current Io (positive-sequence current Ips). The first threshold value THp used in the first process and the second process will be described in detail later.
[0048] 4 is a block diagram showing a specific example of the negative-phase virtual impedance control unit 121 according to the embodiment. The negative-phase virtual impedance control unit 121 includes a dq-axis coordinate conversion unit 122, an impedance calculation unit 123, a dq / abc-axis conversion unit 124, and a threshold determination unit 125.
[0049] The dq-axis coordinate converter 122 calculates the dq-axis negative-sequence current In_dq based on the d-axis negative-sequence current Ind and the q-axis negative-sequence current Inq. The dq-axis negative-sequence current In_dq is expressed in a dq-axis coordinate system in which the d-axis negative-sequence current Ind is on the real axis and the q-axis negative-sequence current Inq is on the imaginary axis. For example, the dq-axis negative-sequence current In_dq is expressed by the following equation (4):
[0050]
[0051] The dq-axis coordinate transformation unit 122 may be provided in the dq-axis negative-sequence current calculation unit 120, instead of in the negative-sequence virtual impedance control unit 121. In this case, the negative-sequence virtual impedance control unit 121 receives the dq-axis negative-sequence current In_dq generated by the dq-axis negative-sequence current calculation unit 120.
[0052] The impedance calculation unit 123 calculates the negative-phase virtual impedance Rv_n based on the output voltage Vs on the AC side of the inverter 12. The negative-phase virtual impedance Rv_n means an impedance for suppressing the negative-phase current Ins on the AC side of the inverter 12.
[0053] For example, after the unbalanced load 50 is applied, if the output voltage Vs of one phase of the three-phase line on the AC side of the inverter 12 is less than a predetermined voltage and the output voltages Vs of the other two phases are normal (e.g., 100%), it is estimated that an unbalanced state exists. In this case, the negative-phase current Ins increases, causing the output current Io to exceed a predetermined current (e.g., rated current), which could result in an overcurrent on the AC side of the inverter 12. Therefore, the impedance calculation unit 123 calculates the negative-phase virtual impedance Rv_n to suppress the negative-phase current Ins.
[0054] As another example, if the output voltages Vs of all three-phase lines on the AC side of the inverter 12 are normal (e.g., 100%) after the unbalanced load 50 is applied, it is estimated that all three-phase lines are in a normal state. In this case, the output current Io becomes less than a predetermined current, so control may be performed to maintain the negative-phase current Ins. For example, the impedance calculation unit 123 disables the setting of the negative-phase virtual impedance Rv_n. When the setting of the negative-phase virtual impedance Rv_n is disabled, the impedance calculation unit 123 sets the negative-phase virtual impedance Rv_n to zero.
[0055] The dq / abc-axis converter 124 calculates a three-phase first negative-sequence voltage Vn1_uvw based on the phase command value θ and a dq-axis negative-sequence voltage Vn_dq obtained by multiplying the dq-axis negative-sequence current In_dq by the negative-sequence virtual impedance Rv_n. The three-phase first negative-sequence voltage Vn1_uvw is a voltage obtained by converting the dq-axis negative-sequence voltage Vn_dq into three-phase components. The phase command value θ is generated, for example, by the VSG controller 140.
[0056] The threshold determination unit 125 includes a process (referred to as the third process) of determining whether the absolute value of the negative-phase current Ins is greater than or equal to the second threshold THn, and a process (referred to as the fourth process) of calculating the three-phase second negative-phase voltage Vn2_uvw based on the result of the determination process.
[0057] In the third process, if the absolute value of the negative-phase current Ins is determined to be equal to or greater than the second threshold THn, the threshold determination unit 125 outputs a determination value (referred to as a second determination value R2) of 1. If the absolute value of the negative-phase current Ins is determined to be less than the second threshold THn, the threshold determination unit 125 outputs 0 (zero) as the second determination value R2.
[0058] In the fourth process, the threshold determination unit 125 multiplies the three-phase first negative-phase voltage Vn1_uvw by the second determination value R2 to calculate the three-phase second negative-phase voltage Vn2_uvw. For example, when the second determination value R2 is 1, the threshold determination unit 125 sets the three-phase second negative-phase voltage Vn2_uvw to the three-phase first negative-phase voltage Vn1_uvw. When the second determination value R2 is 0, the threshold determination unit 125 sets the three-phase second negative-phase voltage Vn2_uvw to 0.
[0059] In this way, when the second judgment value R2 is 1, the function of the reverse-phase virtual impedance control unit 121 (reverse-phase virtual impedance Rv_n) is substantially enabled, and when the second judgment value R2 is 0, the function of the reverse-phase virtual impedance control unit 121 (reverse-phase virtual impedance Rv_n) is substantially disabled.
[0060] Even if the second determination value R2 is 1, if the setting of the negative-sequence virtual impedance Rv_n is disabled (zero), the three-phase second negative-sequence voltage Vn2_uvw becomes 0 (zero). The negative-sequence virtual impedance control unit 121 can also set the three-phase second negative-sequence voltage Vn2_uvw in consideration of the states of both the output voltage Vs and the output current Io (negative-sequence current Ins). The second threshold value THn used in the third process and the fourth process will be described in detail later.
[0061] 2-5. Specific Examples of the First Threshold and the Second Threshold FIG. 5 is a diagram for explaining specific examples of the first threshold THp and the second threshold THn according to the embodiment. The first threshold THp and the second threshold THn when the unbalanced load 50 is applied are determined by the state of the output voltage Vs on the AC side of the inverter 12. As shown in FIG. 5, there are four cases of the state of the output voltage Vs, for example.
[0062] Case 1 is a case where the output voltages Vs of all three-phase lines (u-phase, v-phase, and w-phase) on the AC side of the inverter 12 are normal (e.g., 100%). In this case, as described above, it is estimated that all three-phase lines are normal. Therefore, it is preferable to disable the functions of the positive-phase virtual impedance control unit 111 and the negative-phase virtual impedance control unit 121, i.e., to set both the first determination value R1 and the second determination value R2 to 0 (zero).
[0063] According to Case 1, the first threshold value THp is a value set based on the positive-sequence current Ips estimated when all output voltages Vs of the three-phase lines on the AC side of the inverter 12 are less than a predetermined voltage. The second threshold value THn is a value set based on the negative-sequence current Ins estimated when all output voltages Vs of the three-phase lines on the AC side of the inverter 12 are less than a predetermined voltage. An example of the first threshold value THp is 130%, and an example of the second threshold value THn is 10%.
[0064] Case 2 is a case where the output voltage Vs of one of the three-phase lines (u-phase, v-phase, and w-phase) on the AC side of the inverter 12 is less than a predetermined voltage, and the output voltages Vs of the other two phases are normal (e.g., 100%). In the example shown in FIG. 5 , the output voltage Vs of the u-phase is less than a predetermined voltage, and the output voltages Vs of the v-phase and w-phase are 100% of their normal values. In this case, as described above, it is estimated that the three-phase lines on the AC side of the inverter 12 are in an unbalanced state. This increases the negative-phase current Ins, causing the output current Io to exceed a predetermined current (e.g., the rated current), resulting in an overcurrent on the AC side of the inverter 12. Therefore, in order to suppress the negative-phase current Ins while maintaining the positive-phase current Ips, it is preferable to disable the function of the positive-phase virtual impedance control unit 111, i.e., set the first determination value R1 to 0 (zero), and enable the function of the negative-phase virtual impedance control unit 121, i.e., set the second determination value R2 to 1.
[0065] According to Case 2, the first threshold THp is a value set based on the positive-sequence current Ips estimated when the output voltage Vs of one phase of the three-phase lines on the AC side of the inverter 12 is less than a predetermined voltage and the output voltages Vs of the other two phases are normal (e.g., 100%). The second threshold THn is a value set based on the negative-sequence current Ins estimated when the output voltage Vs of one phase of the three-phase lines on the AC side of the inverter 12 is less than a predetermined voltage and the output voltages Vs of the other two phases are normal (e.g., 100%). An example of the first threshold THp is 130%, and an example of the second threshold THn is 10%.
[0066] Case 3 is a case where the output voltages Vs of two of the three-phase lines (u-phase, v-phase, and w-phase) on the AC side of the inverter 12 are less than a predetermined voltage, and the output voltage Vs of the remaining phase is at a normal value (e.g., 100%). In the example shown in FIG. 5 , the output voltages Vs of the u-phase and v-phase are less than a predetermined voltage, and the output voltage Vs of the w-phase is at 100% of its normal value. In this case, it is estimated that the three-phase lines on the AC side of the inverter 12 are in a two-phase short circuit. As a result, both the positive-phase current Ips and the negative-phase current Ins increase, and the output current Io exceeds a predetermined current (e.g., a rated current), resulting in an overcurrent on the AC side of the inverter 12. Therefore, in order to suppress both the positive-phase current and the negative-phase current Ins, it is preferable to enable the function of the positive-phase virtual impedance control unit 111, i.e., set the first determination value R1 to 1, and enable the function of the negative-phase virtual impedance control unit 121, i.e., set the second determination value R2 to 1.
[0067] According to Case 3, the first threshold THp is a value set based on the positive-sequence current Ips estimated when the output voltages Vs of two phases of the three-phase lines on the AC side of the inverter 12 are less than a predetermined voltage and the output voltage Vs of the remaining phase is a normal value (e.g., 100%). The second threshold THn is a value set based on the negative-sequence current Ins estimated when the output voltages Vs of two phases of the three-phase lines on the AC side of the inverter 12 are less than a predetermined voltage and the output voltage Vs of the remaining phase is a normal value (e.g., 100%). An example of the first threshold THp is 130%, and an example of the second threshold THn is 10%.
[0068] Case 4 is a case in which the output voltages Vs of all three-phase lines (u-phase, v-phase, and w-phase) on the AC side of the inverter 12 are less than a predetermined voltage. In this case, it is estimated that the three-phase lines on the AC side of the inverter 12 are in a three-phase short circuit. This causes the positive-phase current Ips to increase, and the output current Io to exceed a predetermined current (e.g., rated current), resulting in an overcurrent on the AC side of the inverter 12. Therefore, in order to maintain the negative-phase current Ins while suppressing the positive-phase current Ips, it is preferable to enable the function of the positive-phase virtual impedance control unit 111, i.e., set the first determination value R1 to 1, and disable the function of the negative-phase virtual impedance control unit 121, i.e., set the second determination value R2 to 0 (zero).
[0069] According to Case 4, the first threshold value THp is a value set based on the positive-sequence current Ips estimated when all output voltages Vs of the three-phase lines on the AC side of the inverter 12 are less than a predetermined voltage. The second threshold value THn is a value set based on the negative-sequence current Ins estimated when all output voltages Vs of the three-phase lines on the AC side of the inverter 12 are less than a predetermined voltage. An example of the first threshold value THp is 130%, and an example of the second threshold value THn is 10%.
[0070] In this way, the first threshold value THp and the second threshold value THn are set independently depending on the state of the output voltage Vs of the three-phase line on the AC side of the inverter 12. This makes it possible to set the first threshold value THp and the second threshold value THn for suppressing an overcurrent on the AC side of the inverter 12, whether the three-phase line on the AC side of the inverter 12 is in an unbalanced state after the unbalanced load 50 is applied or in any other state (two-phase short circuit or three-phase short circuit). Note that if the first threshold value THp and the second threshold value THn differ for each case, the controller 100 may be configured to determine any one of Cases 1 to 4 and switch the settings of the first threshold value THp and the second threshold value THn depending on the determined case.
[0071] 3. Example of Processing Result FIG. 6 is a diagram illustrating an example of a processing result when an unbalanced load 50 is applied according to an embodiment. For example, consider a case where the unbalanced load 50 applied to the AC side of the inverter 12 is composed of loads Rb and Rc (load Rb ≠ load Rc), and Ra is unloaded. In this case, when the AC side of the inverter 12 is in an unbalanced state, i.e., when case 2 shown in FIG. 5 applies, the negative-phase-sequence voltage Vns increases, causing the negative-phase-sequence current Ino to also increase, and the peak value of the output current Io of the inverter 12 exceeds a predetermined current (e.g., rated current). In the example shown in FIG. 6, the peak value of the output current Io of the inverter 12 is 1.9 [pu (Per Unit)], or 190 [%]. The rated current of the inverter 12 is, for example, 130%. The rated current of the inverter 12 varies depending on the specifications of the inverter 12.
[0072] In contrast, in this embodiment, the positive-phase virtual impedance control unit 111 and the negative-phase virtual impedance control unit 121 are used. As a result, the negative-phase virtual impedance Rv_n for suppressing the negative-phase current Ino is activated, thereby suppressing the negative-phase current Ino. Therefore, the peak value of the output current Io of the inverter 12 is reduced to the same level as before the unbalanced load 50 was connected. In the example shown in FIG. 6 , the peak value of the output current Io of the inverter 12 is 1.27 [pu], i.e., 127 [%]. Thus, even if the unbalanced load 50 is connected to the AC side of the inverter 12, the positive-phase virtual impedance control unit 111 and the negative-phase virtual impedance control unit 121 prevent the output current Io of the inverter 12 from falling below the rated current, thereby preventing an overcurrent on the AC side of the inverter 12.
[0073] 4. Effects According to the power conditioner 10 (controller 100), a dq-axis positive-sequence current Ip_pd and a dq-axis negative-sequence current In_pd are calculated based on the AC-side output current Io of the inverter 12. In addition, a positive-sequence virtual impedance Rv_p for suppressing the AC-side positive-sequence current Ipo of the inverter 12 and a negative-sequence virtual impedance Rv_n for suppressing the AC-side negative-sequence current Ino of the inverter 12 are calculated based on the AC-side output voltage Vs of the inverter 12. Then, a three-phase first positive-sequence voltage Vp1_uvw is calculated based on the d- and q-axes positive-sequence current Ip_pd and the positive-sequence virtual impedance Rv_p, a three-phase first negative-sequence voltage Vn1_uvw is calculated based on the d- and q-axes negative-sequence current In_pd and the negative-sequence virtual impedance Rv_n, a three-phase second positive-sequence voltage Vp2_uvw is calculated based on a first determination value R1 indicating whether the positive-sequence current Ipo is equal to or greater than a first threshold value THp, and a three-phase second negative-sequence voltage Vn2_uvw is calculated based on a second determination value R2 indicating whether the negative-sequence current Ino is equal to or greater than a second threshold value THn. Thereafter, the inverter 12 is controlled based on a voltage command value Vref obtained by subtracting the three-phase second positive-sequence voltage Vp2_uvw and the three-phase second negative-sequence voltage Vn2_uvw from a three-phase voltage command Vins generated based on predetermined parameters. As a result, even if an unbalanced load 50 is applied to the AC side of the inverter 12, the output current Io of the inverter 12 is controlled to be less than the rated current. Therefore, it is possible to prevent the AC side of the inverter 12 from becoming an overcurrent.
[0074] REFERENCE SIGNS LIST 1... power conversion system, 10... power conditioner, 11... DC power supply, 12... inverter, 20... transformer, 30... power system, 40... circuit breaker, 50... unbalanced load, 100... controller
Claims
1. A power supply system comprising: an inverter that converts DC power supplied from a DC power source into AC power and supplies the AC power to a power grid; and a controller that controls the inverter, wherein the controller: calculates positive-sequence currents of dq axes based on an output current on the AC side of the inverter; calculates negative-sequence currents of dq axes based on an output current on the AC side of the inverter; calculates positive-sequence virtual impedances for suppressing the positive-sequence current on the AC side of the inverter based on an output voltage on the AC side of the inverter; calculates negative-sequence virtual impedances for suppressing the negative-sequence current on the AC side of the inverter based on the output voltage on the AC side of the inverter; calculates first positive-sequence voltages of three phases based on the positive-sequence currents of the dq axes and the positive-sequence virtual impedances; calculates first negative-sequence voltages of three phases based on the negative-sequence currents of the dq axes and the negative-sequence virtual impedances; and calculates second positive-sequence voltages that are equal to the first positive-sequence voltages of three phases when the positive-sequence currents are equal to or greater than a first threshold, and are equal to zero when the positive-sequence currents are less than the first threshold. a power conditioner configured to: calculate a three-phase second negative-sequence voltage to be set to the three-phase first negative-sequence voltage when the negative-sequence current is equal to or greater than a second threshold value; and set to zero when the negative-sequence current is less than the second threshold value; and control the inverter based on a voltage command value obtained by subtracting the three-phase second positive-sequence voltage and the three-phase second negative-sequence voltage from a three-phase voltage command generated based on predetermined parameters.
2. A power conditioner according to claim 1, wherein the first three-phase positive-sequence voltage is a voltage obtained by converting into three-phase components the positive-sequence voltage of the dq axes obtained by multiplying the positive-sequence current of the dq axes by the positive-sequence virtual impedance, and the first three-phase negative-sequence voltage is a voltage obtained by converting into three-phase components the negative-sequence voltage of the dq axes obtained by multiplying the negative-sequence current of the dq axes by the negative-sequence virtual impedance.
3. A power conditioner according to claim 1, wherein the first threshold value is a value set based on a positive-phase current estimated when all output voltages of the three-phase lines on the AC side of the inverter are less than a predetermined voltage, and the second threshold value is a value set based on a negative-phase current estimated when the output voltages of two of the three-phase lines on the AC side of the inverter are less than the predetermined voltage.
4. A power conditioner according to claim 1, wherein the first threshold value is a value set based on a positive-phase current estimated when the output voltages of two of the three-phase lines of the inverter are less than a predetermined voltage, and the second threshold value is a value set based on a negative-phase current estimated when the output voltage of one of the three-phase lines of the inverter is less than the predetermined voltage.
5. A power conditioner according to claim 1, wherein the predetermined parameters include a phase command value of the output voltage of the inverter calculated based on parameters indicating the dynamic characteristics of a synchronous generator, a d-axis voltage command value, and a q-axis voltage command value, and the three-phase voltage commands are voltages obtained by voltage controlling three-phase current commands obtained by converting a d-axis positive-sequence current command value and a q-axis positive-sequence current command value, which are generated based on the phase command value, the d-axis voltage command value, and the q-axis voltage command value, into three-phase components.
6. A power conditioner according to claim 1, wherein the predetermined parameters include a phase command value of the output voltage of the inverter calculated based on parameters indicating the dynamic characteristics of a synchronous generator, a d-axis voltage command value, and a q-axis voltage command value, and the three-phase voltage commands are voltages obtained by converting a d-axis positive-sequence voltage command value and a q-axis positive-sequence voltage command value, which are generated based on the phase command value, the d-axis voltage command value, and the q-axis voltage command value, into three-phase components.