Pixel, display device including the same, and electronic apparatus including the same

Abstract

The pixel includes a first subpixel comprising a first light-emitting element connected between a high power line transmitting a high power voltage and a first low power line transmitting a first low power voltage lower than the high power voltage, and a second subpixel comprising a second light-emitting element connected between a high power line and a second low power line transmitting a second low power voltage lower than the high power voltage. The first low power voltage is higher than the second low power voltage.

Description

Technology Field

[0001] The present invention relates to a display device. More specifically, the present invention relates to a pixel comprising subpixels, a display device comprising such pixel, and an electronic device comprising such display device. Background Technology

[0002] A display device may include a display panel and a panel driver. The display panel may include pixels. The panel driver may provide gate signals, data voltage, etc., to each of the pixels. A pixel may include subpixels. Subpixels may display different colors, and a pixel may display a single color formed from different colors.

[0003] A subpixel may include a light-emitting element connected between a high-power line transmitting a high-power voltage and a low-power line transmitting a low-power voltage. The power consumption of the subpixel may correspond to the product of the voltage difference between the high-power voltage and the low-power voltage and the current flowing through the light-emitting element. The problem to be solved

[0004] One objective of the present invention is to provide a pixel with reduced power consumption, a display device including the pixel, and an electronic device including the display device.

[0005] However, the objectives of the present invention are not limited to such objectives, and may be expanded in various ways without departing from the spirit and scope of the invention. means of solving the problem

[0006] To achieve one objective of the present invention as described above, a pixel according to embodiments comprises a first subpixel including a first light-emitting element connected between a high power line transmitting a high power voltage and a first low power line transmitting a first low power voltage lower than the high power voltage, and a second subpixel including a second light-emitting element connected between the high power line and a second low power line transmitting a second low power voltage lower than the high power voltage. The first low power voltage is higher than the second low power voltage.

[0007] In one embodiment, the pixel may further include a third subpixel comprising a third light-emitting element connected between the high power line and the second low power line.

[0008] In one embodiment, the first light-emitting element may emit red light, the second light-emitting element may emit green light, and the third light-emitting element may emit blue light.

[0009] In one embodiment, the turn-on voltage of the first light-emitting element may be lower than the turn-on voltage of the second light-emitting element, and the turn-on voltage of the second light-emitting element may be lower than the turn-on voltage of the third light-emitting element.

[0010] In one embodiment, the first cathode electrode to which the second electrode of the first light-emitting element is connected, the second electrode of the second light-emitting element, and the second cathode electrode to which the second electrode of the third light-emitting element is connected are extended in a first direction, and

[0011] The first low power line connected to the first cathode electrode and the second low power line connected to the second cathode electrode may be extended in a second direction that intersects the first direction.

[0012] In one embodiment, the pixel may further include a third subpixel comprising a third light-emitting element connected between the high power line and a third low power line transmitting a third low power voltage lower than the high power voltage. The second low power voltage may be higher than the third low power voltage.

[0013] In one embodiment, the first cathode electrode to which the second electrode of the first light-emitting element is connected, the second cathode electrode to which the second electrode of the second light-emitting element is connected, and the third cathode electrode to which the second electrode of the third light-emitting element is connected may be extended in a first direction, and the first low-power line connected to the first cathode electrode, the second low-power line connected to the second cathode electrode, and the third low-power line connected to the third cathode electrode may be extended in a second direction that intersects the first direction.

[0014] In one embodiment, the voltage difference between the first low power supply voltage and the second low power supply voltage may be about 0.1V or more and about 2.0V or less.

[0015] In one embodiment, the first light-emitting element and the second light-emitting element may each be a micro light-emitting diode.

[0016] In one embodiment, each of the first subpixel and the second subpixel may further include a first transistor comprising a gate connected to a first node, a first terminal connected to a second node, and a second terminal connected to a third node; a second transistor that transmits a data voltage to the second node in response to a first gate signal; a third transistor that connects the first node and the third node in response to a second gate signal; a fourth transistor that transmits a first initialization voltage to the first node in response to a third gate signal; a fifth transistor that transmits the high power supply voltage to the second node in response to a light emission signal; a sixth transistor that connects the third node and a fourth node to which the first electrode of a corresponding light emission element among the first light emission element and the second light emission element is connected in response to the light emission signal; a seventh transistor that transmits a second initialization voltage to the fourth node in response to a fourth gate signal; and a first capacitor connected between the high power supply line and the first node.

[0017] In one embodiment, each of the first subpixel and the second subpixel may further include an eighth transistor that transmits a bias voltage to the second node in response to the fourth gate signal.

[0018] In one embodiment, each of the first subpixel and the second subpixel may further include a second capacitor connected between a gate line transmitting the first gate signal and the first node.

[0019] In one embodiment, the voltage level of the first low power supply voltage in the low-luminance mode may be higher than the voltage level of the first low power supply voltage in the medium-luminance mode, which has a higher luminance level than the low-luminance mode, and the voltage level of the second low power supply voltage in the low-luminance mode may be higher than the voltage level of the second low power supply voltage in the medium-luminance mode.

[0020] In one embodiment, in a high-brightness mode with a higher brightness level than the medium-brightness mode, the voltage level of the first low-power voltage may be lower than the voltage level of the first low-power voltage in the medium-brightness mode, and the voltage level of the second low-power voltage in the high-brightness mode may be lower than the voltage level of the second low-power voltage in the medium-brightness mode.

[0021] To achieve one objective of the present invention as described above, a display device according to embodiments includes a display panel including a pixel and a panel driver that provides a high power supply voltage, a first low power supply voltage lower than the high power supply voltage, and a second low power supply voltage lower than the high power supply voltage to the pixel. The pixel includes a first subpixel including a first light-emitting diode connected between a high power supply line transmitting the high power supply voltage and a first low power supply line transmitting the first low power supply voltage, and a second subpixel including a second light-emitting diode connected between the high power supply line and a second low power supply line transmitting the second low power supply voltage. The first low power supply voltage is higher than the second low power supply voltage.

[0022] In one embodiment, the pixel may further include a third subpixel comprising a third light-emitting element connected between the high power line and the second low power line.

[0023] In one embodiment, the first light-emitting element may emit red light, the second light-emitting element may emit green light, and the third light-emitting element may emit blue light.

[0024] In one embodiment, the turn-on voltage of the first light-emitting element may be lower than the turn-on voltage of the second light-emitting element, and the turn-on voltage of the second light-emitting element may be lower than the turn-on voltage of the third light-emitting element.

[0025] In one embodiment, the pixel may further include a third subpixel comprising a third light-emitting element connected between the high power line and a third low power line transmitting a third low power voltage lower than the high power voltage. The second low power voltage may be higher than the third low power voltage.

[0026] To achieve one objective of the present invention as described above, an electronic device according to embodiments comprises a display device and a processor for controlling the display device, wherein the display device comprises a display panel including a pixel and a panel driver that provides a high power supply voltage, a first low power supply voltage lower than the high power supply voltage, and a second low power supply voltage lower than the high power supply voltage to the pixel. The pixel comprises a first subpixel including a first light-emitting diode connected between a high power supply line transmitting the high power supply voltage and a first low power supply line transmitting the first low power supply voltage, and a second subpixel including a second light-emitting diode connected between the high power supply line and a second low power supply line transmitting the second low power supply voltage. The first low power supply voltage is higher than the second low power supply voltage. Effects of the invention

[0027] In a pixel, a display device, and an electronic device according to embodiments of the present invention, as low power voltages with different voltage levels are applied to subpixels included in the pixel, the power consumption of the pixel may be reduced. Accordingly, the power consumption of a display device including the pixel may be reduced, and the power consumption of an electronic device including the display device may be reduced.

[0028] However, the effects of the present invention are not limited to the effects described above, and may be extended in various ways without departing from the spirit and scope of the present invention. Brief explanation of the drawing

[0029] FIG. 1 is a block diagram showing a display device according to one embodiment. Figure 2 is a circuit diagram showing the pixel of Figure 1. Figure 3 is a graph showing the voltage-current relationship of the light-emitting elements of Figure 2. Figure 4 is a diagram illustrating the voltages of the subpixels of Figure 2. Figure 5 is a plan view showing the pixels of Figure 2. FIG. 6 is a cross-sectional view obtained along the II' line, II-II' line, and III-III' line of FIG. 5. FIG. 7 is a block diagram showing a display device according to one embodiment. Figure 8 is a circuit diagram showing the pixels of Figure 7. Figure 9 is a diagram illustrating the voltages of the subpixels of Figure 8. Figure 10 is a plan view showing the pixels of Figure 8. FIG. 11 is a cross-sectional view obtained along the IV-IV' line, VV' line, and VI-VI' line of FIG. 10. FIG. 12 is a table showing the first to third low power supply voltages in luminance modes. FIG. 13 is a block diagram showing an electronic device according to one embodiment. FIG. 14 is a diagram showing an example of how the electronic device of FIG. 13 is implemented as a smart watch. Specific details for implementing the invention

[0030] Hereinafter, a pixel, a display device, and an electronic device according to embodiments of the present invention may be described in more detail with reference to the attached drawings. Identical or similar reference numerals may be used for identical components in the attached drawings.

[0031] FIG. 1 is a block diagram showing a display device (100) according to one embodiment.

[0032] Referring to FIG. 1, the display device (100) may include a display panel (110) and a panel driver (PD). The panel driver (PD) may include a gate driver (120), a data driver (130), a power management circuit (140), and a controller (150).

[0033] The display panel (110) may include a plurality of pixels (PX). Each of the pixels (PX) may include a plurality of subpixels. The subpixels may display different colors. Each of the pixels (PX) may display a single color composed of the different colors displayed in the subpixels.

[0034] The gate driver (120) can provide a first gate signal (GW), a second gate signal (GC), a third gate signal (GI), a fourth gate signal (GB), and a light emission signal (EM) to each of the pixels (PX). The gate driver (120) can generate the first gate signal (GW), the second gate signal (GC), the third gate signal (GI), the fourth gate signal (GB), and the light emission signal (EM) based on a gate control signal (GCS). The gate control signal (GCS) may include a gate clock signal, a gate start signal, etc.

[0035] The data driver (130) can provide a data voltage (VDATA) to each of the pixels (PX). The data driver (130) can generate the data voltage (VDATA) based on output image data (IMD2) and a data control signal (DCS). The data driver (130) can convert the output image data (IMD2) in digital form into an analog data voltage (VDATA). The data control signal (DCS) may include a data clock signal, a load signal, an output data enable signal, etc.

[0036] The power management circuit (140) can provide a high power voltage (VDD), a first low power voltage (VSS1), a second low power voltage (VSS2), a first initialization voltage (VINIT), a second initialization voltage (VAINT), and a bias voltage (VOBS) to pixels (PX). The power management circuit (140) can generate the high power voltage (VDD), the first low power voltage (VSS1), the second low power voltage (VSS2), the first initialization voltage (VINIT), the second initialization voltage (VAINT), and the bias voltage (VOBS) based on a power control signal (PCS).

[0037] The controller (150) can control the gate driver (120), the data driver (130), and the power management circuit (140). The controller (150) can provide a gate control signal (GCS) to the gate driver (120), provide output image data (IMD2) and a data control signal (DCS) to the data driver (130), and provide a power control signal (PCS) to the power management circuit (140). The controller (150) can convert input image data (IMD1) into output image data (IMD2). The controller (150) can generate the gate control signal (GCS), the data control signal (DCS), and the power control signal (PCS) based on the control signal (CTRL). The control signal (CTRL) may include a vertical synchronization signal, a horizontal synchronization signal, a master clock signal, an input data enable signal, etc.

[0038] Figure 2 is a circuit diagram showing a pixel (PX) of Figure 1.

[0039] Referring to FIGS. 1 and 2, a pixel (PX) may include a first subpixel (SP1), a second subpixel (SP2), and a third subpixel (SP3).

[0040] The first subpixel (SP1) may include a first light-emitting element (LED1). The first light-emitting element (LED1) may be connected between a high power line (VDDL) that transmits a high power voltage (VDD) and a first low power line (VSSL1) that transmits a first low power voltage (VSS1). The first light-emitting element (LED1) may include a first terminal connected to a fourth node (N4) of the first subpixel (SP1) and a second terminal connected to the first low power line (VSSL1). The first low power voltage (VSS1) may be lower than the high power voltage (VDD). For example, the high power voltage (VDD) may be approximately 4.6V.

[0041] The second subpixel (SP2) may include a second light-emitting element (LED2). The second light-emitting element (LED2) may be connected between a high power line (VDDL) and a second low power line (VSSL2) that transmits a second low power voltage (VSS2). The second light-emitting element (LED2) may include a first terminal connected to a fourth node (N4) of the second subpixel (SP2) and a second terminal connected to the second low power line (VSSL2). The first low power voltage (VSS1) may be higher than the second low power voltage (VSS2). For example, the first low power voltage (VSS1) may be about 0.5V, and the second low power voltage (VSS2) may be about 0V.

[0042] The third subpixel (SP3) may include a third light-emitting element (LED3). The third light-emitting element (LED3) may be connected between a high power line (VDDL) and a second low power line (VSSL2). The third light-emitting element (LED3) may include a first terminal connected to a fourth node (N4) of the third subpixel (SP3) and a second terminal connected to the second low power line (VSSL2).

[0043] In one embodiment, the first light-emitting element (LED1) can emit red light, the second light-emitting element (LED2) can emit green light, and the third light-emitting element (LED3) can emit blue light. In this case, the first subpixel (SP1), the second subpixel (SP2), and the third subpixel (SP3) may be a red subpixel, a green subpixel, and a blue subpixel, respectively.

[0044] In one embodiment, the first light-emitting element (LED1), the second light-emitting element (LED2), and the third light-emitting element (LED3) may each be a micro light-emitting diode (μLED).

[0045] Each of the first subpixel (SP1), the second subpixel (SP2), and the third subpixel (SP3) may further include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), a seventh transistor (T7), and a first capacitor (CST). In one embodiment, each of the first subpixel (SP1), the second subpixel (SP2), and the third subpixel (SP3) may further include an eighth transistor (T8). In one embodiment, each of the first subpixel (SP1), the second subpixel (SP2), and the third subpixel (SP3) may further include a second capacitor (CB).

[0046] The first transistor (T1) may include a gate connected to a first node (N1), a first terminal connected to a second node (N2), and a second terminal connected to a third node (N3). The first transistor (T1) may generate a driving current corresponding to the voltage difference between the first node (N1) and the second node (N2). In one embodiment, the first transistor (T1) may further include a back gate (or body) that receives a high power supply voltage (VDD).

[0047] The second transistor (T2) can transmit a data voltage (VDATA) to the second node (N2) in response to the first gate signal (GW). The second transistor (T2) may include a gate that receives the first gate signal (GW), a first terminal that receives the data voltage (VDATA), and a second terminal connected to the second node (N2).

[0048] The third transistor (T3) can connect the first node (N1) and the third node (N3) in response to the second gate signal (GC). The third transistor (T3) may include a gate that receives the second gate signal (GC), a first terminal connected to the third node (N3), and a second terminal connected to the first node (N1). In one embodiment, the third transistor (T3) may further include a back gate (or body) that receives the second gate signal (GC).

[0049] The fourth transistor (T4) can transmit a first initialization voltage (VINIT) to the first node (N1) in response to the third gate signal (GI). The fourth transistor (T4) may include a gate that receives the third gate signal (GI), a first terminal that receives the first initialization voltage (VINIT), and a second terminal connected to the first node (N1). In one embodiment, the third transistor (T3) may further include a back gate (or body) that receives the third gate signal (GI).

[0050] The fifth transistor (T5) can transmit a high power supply voltage (VDD) to the second node (N2) in response to a light emission signal (EM). The fifth transistor (T5) may include a gate that receives the light emission signal (EM), a first terminal that receives the high power supply voltage (VDD), and a second terminal connected to the second node (N2).

[0051] The sixth transistor (T6) can connect the third node (N3) and the fourth node (N4) in response to a light emission signal (EM). The sixth transistor (T6) may include a gate that receives the light emission signal (EM), a first terminal connected to the third node (N3), and a second terminal connected to the fourth node (N4).

[0052] The seventh transistor (T7) can transmit a second initialization voltage (VAINT) to the fourth node (N4) in response to the fourth gate signal (GB). The seventh transistor (T7) may include a gate that receives the fourth gate signal (GB), a first terminal that receives the second initialization voltage (VAINT), and a second terminal connected to the fourth node (N4).

[0053] The eighth transistor (T8) can transmit a bias voltage (VOBS) to the second node (N2) in response to the fourth gate signal (GB). The eighth transistor (T8) may include a gate that receives the fourth gate signal (GB), a first terminal that receives the bias voltage (VOBS), and a second terminal connected to the second node (N2).

[0054] In one embodiment, the first transistor (T1), the second transistor (T2), the fifth transistor (T5), the sixth transistor (T6), the seventh transistor (T7), and the eighth transistor (T8) may each be a P-type transistor (e.g., a PMOS transistor), and the third transistor (T3) and the fourth transistor (T4) may each be an N-type transistor (e.g., an NMOS transistor).

[0055] The first capacitor (CST) can be connected between the high power line (VDDL) and the first node (N1). The first capacitor (CST) may include a first terminal connected to the high power line (VDDL) and a second terminal connected to the first node (N1). The first capacitor (CST) can store the voltage of the first node (N1).

[0056] A second capacitor (CB) may be connected between a gate line (GL) transmitting a first gate signal (GW) and a first node (N1). The second capacitor (CB) may include a first terminal connected to the gate line (GL) and a second terminal connected to the first node (N1). The second capacitor (CB) may boost the voltage of the first node (N1) in response to a change in the first gate signal (GW).

[0057] FIG. 3 is a graph showing the voltage (VLED)-current (ILED) relationship of the light-emitting elements (LED1, LED2, and LED3) of FIG. 2. FIG. 4 is a diagram for explaining the voltages (VLED1, VLED2, and VLED3) of the subpixels (SP1, SP2, and SP3) of FIG. 2.

[0058] Referring to FIGS. 2, 3, and 4, the turn-on voltage (VF1) of the first light-emitting element (LED1), the turn-on voltage (VF2) of the second light-emitting element (LED2), and the turn-on voltage (VF3) of the third light-emitting element (LED3) may be different from each other. The turn-on voltage may be a voltage at which a driving current begins to flow in the light-emitting element. The first light-emitting element (LED1), the second light-emitting element (LED2), and the third light-emitting element (LED3) emitting different colors may include different materials, and accordingly, the turn-on voltage (VF1) of the first light-emitting element (LED1), the turn-on voltage (VF2) of the second light-emitting element (LED2), and the turn-on voltage (VF3) of the third light-emitting element (LED3) may be different from each other.

[0059] In one embodiment, the turn-on voltage (VF1) of the first light-emitting element (LED1) may be lower than the turn-on voltage (VF2) of the second light-emitting element (LED2), and the turn-on voltage (VF2) of the second light-emitting element (LED2) may be lower than the turn-on voltage (VF3) of the third light-emitting element (LED3). For example, the turn-on voltage (VF1) of the first light-emitting element (LED1) may be about 1.5V, the turn-on voltage (VF2) of the second light-emitting element (LED2) may be about 2.0V, and the turn-on voltage (VF3) of the third light-emitting element (LED3) may be about 2.35V.

[0060] Since the turn-on voltage (VF1) of the first light-emitting element (LED1), the turn-on voltage (VF2) of the second light-emitting element (LED2), and the turn-on voltage (VF3) of the third light-emitting element (LED3) are different from each other, when the same driving current flows through the first light-emitting element (LED1), the second light-emitting element (LED2), and the third light-emitting element (LED3), the driving voltage (VLED1) of the first light-emitting element (LED1), the driving voltage (VLED2) of the second light-emitting element (LED2), and the driving voltage (VLED3) of the third light-emitting element (LED3) may be different from each other. For example, when a driving current of 1000 nA flows through the first light-emitting element (LED1), the second light-emitting element (LED2), and the third light-emitting element (LED3), the driving voltage (VLED1) of the first light-emitting element (LED1) may be lower than the driving voltage (VLED2) of the second light-emitting element (LED2), and the driving voltage (VLED2) of the second light-emitting element (LED2) may be lower than the driving voltage (VLED3) of the third light-emitting element (LED3).

[0061] When the first transistor (T1) is turned on and the driving current (ILED) flows from the high power line (VDDL) to the low power line, the voltage between the first and second terminals of the fifth transistor (T5) and the voltage between the first and second terminals of the sixth transistor (T6) can be ignored, so the sum of the voltage between the first and second terminals of the first transistor (T1) (i.e., drain-source voltage (VDS)) and the voltage between the first and second terminals of the light-emitting element (i.e., driving voltage (VLED)) can be substantially equal to the value obtained by subtracting the low power voltage from the high power voltage (VDD).

[0062] In a comparative example, the second terminal of the first light-emitting element (LED1), the second terminal of the second light-emitting element (LED2), and the second terminal of the third light-emitting element (LED3) can all be connected to the second low power line (VSSL2), and accordingly, the second terminal of the first light-emitting element (LED1), the second terminal of the second light-emitting element (LED2), and the second terminal of the third light-emitting element (LED3) can all receive the second low power voltage (VSS2). In a comparative example, the sum of the drain-source voltage (VDS1) of the first transistor (T1) of the first subpixel (SP1) and the driving voltage (VLED1) of the first light-emitting element (LED1), the sum of the drain-source voltage (VDS2) of the first transistor (T1) of the second subpixel (SP2) and the driving voltage (VLED2) of the second light-emitting element (LED2), and the sum of the drain-source voltage (VDS3) of the first transistor (T1) of the third subpixel (SP3) and the driving voltage (VLED3) of the third light-emitting element (LED3) may all be substantially equal to the value obtained by subtracting the second low power supply voltage (VSS2) from the high power supply voltage (VDD). In this case, since the driving voltage (VLED1) of the first light-emitting element (LED1) is lower than the driving voltage (VLED2) of the second light-emitting element (LED2) and the driving voltage (VLED3) of the third light-emitting element (LED3), the drain-source voltage (VDS1) of the first transistor (T1) of the first subpixel (SP1) may be greater than the drain-source voltage (VDS2) of the first transistor (T1) of the second subpixel (SP2) and the drain-source voltage (VDS3) of the first transistor (T1) of the third subpixel (SP3). Accordingly, the power consumption of the first subpixel (SP1) may increase unnecessarily due to the increase in power consumption of the first transistor (T1) of the first subpixel (SP1).

[0063] In the present embodiment, the sum of the drain-source voltage (VDS1) of the first transistor (T1) of the first subpixel (SP1) and the driving voltage (VLED1) of the first light-emitting element (LED1) may be substantially equal to the value obtained by subtracting the first low power supply voltage (VSS1) from the high power supply voltage (VDD), the sum of the drain-source voltage (VDS2) of the first transistor (T1) of the second subpixel (SP2) and the driving voltage (VLED2) of the second light-emitting element (LED2) may be substantially equal to the value obtained by subtracting the second low power supply voltage (VSS2) from the high power supply voltage (VDD), and the sum of the drain-source voltage (VDS3) of the first transistor (T1) of the third subpixel (SP3) and the driving voltage (VLED3) of the third light-emitting element (LED3) may be substantially equal to the value obtained by subtracting the second low power supply voltage (VSS2) from the high power supply voltage (VDD). Since the first low power supply voltage (VSS1) is higher than the second low power supply voltage (VSS2), the drain-source voltage (VDS1) of the first transistor (T1) of the first subpixel (SP1) can be reduced, and accordingly, the power consumption of the first subpixel (SP1) can be reduced. Accordingly, the power consumption of the pixel (PX) can be reduced, and the power consumption of the display device (100) can be reduced.

[0064] In one embodiment, the voltage difference between the first low power voltage (VSS1) and the second low power voltage (VSS2) may be about 0.1V or more and about 2.0V or less. In other words, the value obtained by subtracting the second low power voltage (VSS2) from the first low power voltage (VSS1) may be about 0.1V or more and about 2.0V or less.

[0065] FIG. 5 is a plan view showing a pixel (PX) of FIG. 2. FIG. 6 is a cross-sectional view obtained along the II' line, II-II' line, and III-III' line of FIG. 5.

[0066] Referring to FIGS. 2, FIGS. 5, and FIGS. 6, the pixel (PX) may include a pixel circuit layer (PCL) and a light-emitting element layer (EML).

[0067] The pixel circuit layer (PCL) may include first to eighth transistors (T1, T2, T3, T4, T5, T6, T7, and T8), first and second capacitors (C1 and C2), and lines including a first low power line (VSSL1) and a second low power line (VSSL2). The pixel circuit layer (PCL) may include a substrate, semiconductor layers, conductive layers, and insulating layers disposed between the substrate, semiconductor layers, and conductive layers.

[0068] The light-emitting element layer (EML) may be disposed on the pixel circuit layer (PCL). The light-emitting element layer (EML) may include a first anode electrode (PXE1), a second anode electrode (PXE2), a third anode electrode (PXE3), a first cathode electrode (CE1), a second cathode electrode (CE2), a first light-emitting element (LED1), a second light-emitting element (LED2), and a third light-emitting element (LED3).

[0069] The first anode electrode (PXE1), the second anode electrode (PXE2), the third anode electrode (PXE3), the first cathode electrode (CE1), and the second cathode electrode (CE2) may be disposed on the pixel circuit layer (PCL). The first anode electrode (PXE1) may be connected to the fourth node (N4) of the first subpixel (SP1), the second anode electrode (PXE2) may be connected to the fourth node (N4) of the second subpixel (SP2), and the third anode electrode (PXE3) may be connected to the fourth node (N4) of the third subpixel (SP3). The first cathode electrode (CE1) may be connected to the first low power line (VSSL1), and the second cathode electrode (CE2) may be connected to the second low power line (VSSL2). Accordingly, a first low power supply voltage (VSS1) can be applied to the first cathode electrode (CE1), and a second low power supply voltage (VSS2) can be applied to the second cathode electrode (CE2).

[0070] Each of the first anode electrode (PXE1), the second anode electrode (PXE2), the third anode electrode (PXE3), the first cathode electrode (CE1), and the second cathode electrode (CE2) may include a metal, a transparent conductive oxide, etc. In one embodiment, each of the first anode electrode (PXE1), the second anode electrode (PXE2), the third anode electrode (PXE3), the first cathode electrode (CE1), and the second cathode electrode (CE2) may have a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, or a stacked structure of APC alloy and ITO (ITO / APC / ITO). The APC alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0071] Each of the first light-emitting element (LED1), the second light-emitting element (LED2), and the third light-emitting element (LED3) may include an inorganic material such as GaN. Each of the first light-emitting element (LED1), the second light-emitting element (LED2), and the third light-emitting element (LED3) may include an active layer (MQW), an N-type semiconductor (NSEM), a P-type semiconductor (PSEM), a first electrode (CTE1), and a second electrode (CTE2).

[0072] The active layer (MQW) can be placed between an N-type semiconductor (NSEM) and a P-type semiconductor (PSEM). The active layer (MQW) may include a material with a single or multiple quantum well structure. When the active layer (MQW) includes a material with a multiple quantum well structure, the active layer (MQW) may have a structure in which multiple well layers and barrier layers are alternately stacked. In this case, the well layers may include InGaN, and the barrier layers may include GaN or AlGaN. The active layer (MQW) may have a structure in which semiconductor materials with large band gap energies and semiconductor materials with small band gap energies are alternately stacked, or it may include different Group 3 to Group 5 semiconductor materials depending on the wavelength of the emitted light.

[0073] An N-type semiconductor (NSEM) can be placed between the active layer (MQW) and the second electrode (CTE2). For example, the N-type semiconductor (NSEM) can be formed of GaN doped with N-type conductive dopants such as Si, Ge, Sn, etc.

[0074] A p-type semiconductor (PSEM) can be placed between the active layer (MQW) and the first electrode (CTE1). For example, the p-type semiconductor (PSEM) can be formed of GaN doped with a p-type conductive dopant such as Mg, Zn, Ca, Se, Ba, etc.

[0075] The first electrode (CTE1) can be placed between the P-type semiconductor (PSEM) and the anode electrodes (PXE1, PXE2, and PXE3). The second electrode (CTE2) can be placed between the N-type semiconductor (NSEM) and the cathode electrodes (CE1 and CE2).

[0076] A bank (BNK) covering the edges of the anode electrodes (PXE1, PXE2, and PXE3) and the edges of the cathode electrodes (CE1 and CE2) may be disposed on the pixel circuit layer (PCL). The bank (BNK) may include organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0077] An insulating layer (INS) may be placed on the bank (BNK). The insulating layer (INS) may cover the edges of the anode electrodes (PXE1, PXE2, and PXE3) and the edges of the cathode electrodes (CE1 and CE2). The insulating layer (INS) may include inorganic materials such as silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, aluminum oxide, etc.

[0078] In one embodiment, the first cathode electrode (CE1) and the second cathode electrode (CE2) may be extended in a first direction (DR1), and the first low power line (VSSL1) and the second low power line (VSSL2) may be extended in a second direction (DR2) that intersects the first direction (DR1). The first cathode electrode (CE1) may be connected to the first low power line (VSSL1) through a contact hole formed in the area where the first cathode electrode (CE1) and the first low power line (VSSL1) intersect, and the second cathode electrode (CE2) may be connected to the second low power line (VSSL2) through a contact hole formed in the area where the second cathode electrode (CE2) and the second low power line (VSSL2) intersect.

[0079] FIG. 7 is a block diagram showing a display device (101) according to one embodiment.

[0080] Referring to FIG. 7, the display device (101) may include a display panel (110) and a panel driver (PD). The panel driver (PD) may include a gate driver (120), a data driver (130), a power management circuit (141), and a controller (150). In the display device (101) described with reference to FIG. 7, descriptions of configurations that are substantially identical or similar to the display device (100) described with reference to FIG. 1 are omitted.

[0081] The power management circuit (141) can provide a high power voltage (VDD), a first low power voltage (VSS1), a second low power voltage (VSS2), a third low power voltage (VSS3), a first initialization voltage (VINIT), a second initialization voltage (VAINT), and a bias voltage (VOBS) to the pixels (PX). The power management circuit (140) can generate a high power voltage (VDD), a first low power voltage (VSS1), a second low power voltage (VSS2), a third low power voltage (VSS3), a first initialization voltage (VINIT), a second initialization voltage (VAINT), and a bias voltage (VOBS) based on a power control signal (PCS).

[0082] Figure 8 is a circuit diagram showing the pixel (PX) of Figure 7.

[0083] Referring to FIGS. 7 and 8, the pixel (PX) may include a first sub-pixel (SP1), a second sub-pixel (SP2), and a third sub-pixel (SP3). In the pixel (PX) described with reference to FIG. 8, descriptions of configurations that are substantially identical or similar to the pixel (PX) described with reference to FIG. 2 are omitted.

[0084] The third subpixel (SP3) may include a third light-emitting element (LED3). The third light-emitting element (LED3) may be connected between a high power line (VDDL) and a third low power line (VSSL3) that transmits a third low power voltage (VSS3). The third light-emitting element (LED3) may include a first terminal connected to a fourth node (N4) of the third subpixel (SP3) and a second terminal connected to the third low power line (VSSL3). The second low power voltage (VSS2) may be higher than the third low power voltage (VSS3). For example, the second low power voltage (VSS2) may be about 0.3V, and the third low power voltage (VSS3) may be about 0V.

[0085] FIG. 9 is a diagram illustrating the voltages (VLED1, VLED2, and VLED3) of the subpixels (SP1, SP2, and SP3) of FIG. 8.

[0086] Referring to FIGS. 8 and 9, the sum of the drain-source voltage (VDS1) of the first transistor (T1) of the first subpixel (SP1) and the driving voltage (VLED1) of the first light-emitting element (LED1) may be substantially equal to the value obtained by subtracting the first low power supply voltage (VSS1) from the high power supply voltage (VDD), the sum of the drain-source voltage (VDS2) of the first transistor (T1) of the second subpixel (SP2) and the driving voltage (VLED2) of the second light-emitting element (LED2) may be substantially equal to the value obtained by subtracting the second low power supply voltage (VSS2) from the high power supply voltage (VDD), and the sum of the drain-source voltage (VDS3) of the first transistor (T1) of the third subpixel (SP3) and the driving voltage (VLED3) of the third light-emitting element (LED3) may be substantially equal to the value obtained by subtracting the third low power supply voltage (VSS3) from the high power supply voltage (VDD). Since the first low power supply voltage (VSS1) is higher than the second low power supply voltage (VSS2) and the third low power supply voltage (VSS3), the drain-source voltage (VDS1) of the first transistor (T1) of the first subpixel (SP1) can be reduced, and accordingly, the power consumption of the first subpixel (SP1) can be reduced. Additionally, since the second low power supply voltage (VSS2) is higher than the third low power supply voltage (VSS3), the drain-source voltage (VDS2) of the first transistor (T1) of the second subpixel (SP2) can be reduced, and accordingly, the power consumption of the second subpixel (SP2) can be reduced. Accordingly, the power consumption of the pixel (PX) can be reduced, and the power consumption of the display device (101) can be reduced.

[0087] FIG. 10 is a plan view showing a pixel (PX) of FIG. 8. FIG. 11 is a cross-sectional view obtained along the IV-IV' line, VV' line, and VI-VI' line of FIG. 10.

[0088] The pixel (PX) may include a pixel circuit layer (PCL) and a light-emitting element layer (EML). In the pixel (PX) described with reference to FIGS. 10 and 11, descriptions of configurations that are substantially identical or similar to the pixel (PX) described with reference to FIGS. 5 and 6 are omitted.

[0089] The light-emitting element layer (EML) may be disposed on the pixel circuit layer (PCL). The light-emitting element layer (EML) may include a first anode electrode (PXE1), a second anode electrode (PXE2), a third anode electrode (PXE3), a first cathode electrode (CE1), a second cathode electrode (CE2), a third cathode electrode (CE3), a first light-emitting element (LED1), a second light-emitting element (LED2), and a third light-emitting element (LED3).

[0090] The first anode electrode (PXE1), the second anode electrode (PXE2), the third anode electrode (PXE3), the first cathode electrode (CE1), the second cathode electrode (CE2), and the third cathode electrode (CE3) may be disposed on the pixel circuit layer (PCL). The first cathode electrode (CE1) may be connected to the first low power line (VSSL1), the second cathode electrode (CE2) may be connected to the second low power line (VSSL2), and the third cathode electrode (CE3) may be connected to the third low power line (VSSL3). Accordingly, a first low power voltage (VSS1) may be applied to the first cathode electrode (CE1), a second low power voltage (VSS2) may be applied to the second cathode electrode (CE2), and a third low power voltage (VSS3) may be applied to the third cathode electrode (CE3).

[0091] In one embodiment, the first cathode electrode (CE1), the second cathode electrode (CE2), and the third cathode electrode (CE3) may be extended in a first direction (DR1), and the first low power line (VSSL1), the second low power line (VSSL2), and the third low power line (VSSL3) may be extended in a second direction (DR2) that intersects the first direction (DR1). The first cathode electrode (CE1) can be connected to the first low power line (VSSL1) through a contact hole formed in the area where the first cathode electrode (CE1) and the first low power line (VSSL1) intersect, the second cathode electrode (CE2) can be connected to the second low power line (VSSL2) through a contact hole formed in the area where the second cathode electrode (CE2) and the second low power line (VSSL2) intersect, and the third cathode electrode (CE3) can be connected to the third low power line (VSSL3) through a contact hole formed in the area where the third cathode electrode (CE3) and the third low power line (VSSL3) intersect.

[0092] FIG. 12 is a table showing the first to third low power voltages (VSS1, VSS2, and VSS3) in luminance modes (LBM, MBM, and HBM).

[0093] Referring to FIGS. 7 and FIGS. 12, the display device (101) can control the voltage levels of the first to third low power voltages (VSS1, VSS2, and VSS3) according to the luminance modes (LBM, MBM, and HBM). The controller (150) can generate a power control signal (PCS) based on the luminance modes (LBM, MBM, and HBM), and the power management circuit (141) can control the voltage levels of the first to third low power voltages (VSS1, VSS2, and VSS3) based on the power control signal (PCS).

[0094] The luminance modes (LBM, MBM, and HBM) may include a low luminance mode (LBM), a medium luminance mode (MBM), and a high luminance mode (HBM). The display device (101) may change the luminance modes (LBM, MBM, and HBM) according to external illumination. The display device (101) may operate in a low luminance mode (LBM) in a dark indoor environment and in a high luminance mode (HBM) in a bright outdoor environment.

[0095] In low brightness mode (LBM), the brightness level of the display device (101) may be lower than the brightness level of the display device (101) in medium brightness mode (MBM), and in high brightness mode (HBM), the brightness level of the display device (101) may be higher than the brightness level of the display device (101) in medium brightness mode (MBM). For example, in low brightness mode (LBM), the maximum brightness of the display device (101) may be about 5 nits, in medium brightness mode (MBM), the maximum brightness of the display device (101) may be about 600 nits, and in high brightness mode (HBM), the maximum brightness of the display device (101) may be about 4000 nits.

[0096] In low brightness mode (LBM), the voltage level of the first low power supply voltage (VSS1) (LV3_1), the voltage level of the second low power supply voltage (VSS2) (LV3_2), and the voltage level of the third low power supply voltage (VSS3) (LV3_3) may each be higher than the voltage level of the first low power supply voltage (VSS1) (LV2_1), the voltage level of the second low power supply voltage (VSS2) (LV2_2), and the voltage level of the third low power supply voltage (VSS3) (LV2_3) in medium brightness mode (MBM). Since the driving voltage of the light-emitting element in low brightness mode (LBM) is lower than the driving voltage of the light-emitting element in medium brightness mode (MBM), the voltage levels (LV3_1, LV3_2, LV3_3) of the low power supply voltage (VSS1, VSS2, and VSS3) in low brightness mode (LBM) may be higher than the voltage levels (LV2_1, LV2_2, LV2_3) of the low power supply voltage (VSS1, VSS2, and VSS3) in medium brightness mode (MBM), and accordingly, the power consumption of the display device (101) may be reduced.

[0097] In high brightness mode (HBM), the voltage level (LV1_1) of the first low power supply voltage (VSS1), the voltage level (LV1_2) of the second low power supply voltage (VSS2), and the voltage level (LV1_3) of the third low power supply voltage (VSS3) may be lower than the voltage level (LV2_1) of the first low power supply voltage (VSS1), the voltage level (LV2_2) of the second low power supply voltage (VSS2), and the voltage level (LV2_3) of the third low power supply voltage (VSS3) in medium brightness mode (MBM), respectively. Since the driving voltage of the light-emitting element in the high brightness mode (HBM) is higher than the driving voltage of the light-emitting element in the medium brightness mode (MBM), the voltage levels (LV1_1, LV1_2, LV1_3) of the low power supply voltage (VSS1, VSS2, and VSS3) in the high brightness mode (HBM) may be lower than the voltage levels (LV2_1, LV2_2, LV2_3) of the low power supply voltage (VSS1, VSS2, and VSS3) in the medium brightness mode (MBM), and accordingly, the display device (101) can display an image of high brightness.

[0098] FIG. 13 is a block diagram showing an electronic device (1000) according to one embodiment. FIG. 14 is a diagram showing an example in which the electronic device (1000) of FIG. 13 is implemented as a smart watch.

[0099] Referring to FIGS. 13 and 14, an electronic device (1000) can output various information through a display module (1040) within an operating system. When a processor (1010) executes an application stored in memory (1020), the display module (1040) can provide application information to a user through a display panel (1041). In other words, the processor (1010) can control the display module (1040). In one embodiment, the processor (1010) can provide input image data (IMD1 of FIGS. 1 and 7) and a control signal (CTRL of FIGS. 1 and 7) to the display module (1040).

[0100] In one embodiment, as shown in FIG. 14, the electronic device (1000) may be implemented as a smart watch. However, the present invention is not limited thereto, and in other embodiments, the electronic device (1000) may be implemented as a television, mobile phone, video phone, smart pad, computer monitor, tablet PC, vehicle navigation system, laptop, head-mounted display device, etc.

[0101] The processor (1010) can obtain external input through the input module (1030) or the sensor module (1061) and can execute an application corresponding to the external input. For example, when a user selects a camera icon displayed on the display panel (1041), the processor (1010) can obtain user input through the input sensor (1061-2) and activate the camera module (1071). The processor (1010) can transmit image data corresponding to the captured image obtained through the camera module (1071) to the display module (1040). The display module (1040) can display an image corresponding to the captured image through the display panel (1041). Some of the components of the electronic device (1000) may be integrated and provided as a single component, or a single component may be separated into two or more components.

[0102] The electronic device (1000) can communicate with an external electronic device (1002) through a network (e.g., a short-range wireless communication network or a long-range wireless communication network). In one embodiment, the electronic device (1000) may include a processor (1010), memory (1020), input module (1030), display module (1040), power module (1050), built-in module (1060), and external module (1070). In one embodiment, at least one of the above-described components of the electronic device (1000) may be omitted, or one or more other components may be added. In one embodiment, some of the above-described components (e.g., a sensor module (1061), an antenna module (1062), or an acoustic output module (1063)) may be integrated into another component (e.g., a display module (1040)).

[0103] The processor (1010) can execute software to control at least one other component (e.g., a hardware or software component) of an electronic device (1000) connected to the processor (1010) and can perform various data processing or operations. In one embodiment, as at least part of the data processing or operations, the processor (1010) can store commands or data received from other components (e.g., an input module (1030), a sensor module (1061), or a communication module (1073)) in a volatile memory (1021), process the commands or data stored in the volatile memory (1021), and the resulting data can be stored in a non-volatile memory (1022).

[0104] The processor (1010) may include a main processor (1011) and an auxiliary processor (1012). The main processor (1011) may include one or more of a central processing unit (1011-1, CPU) or an application processor (AP). The main processor (1011) may further include one or more of a graphic processing unit (1011-2, GPU), a communication processor (CP), and an image signal processor (ISP). At least two of the above-described processing units and processors may be implemented as a single integrated configuration (e.g., a single chip), or each may be implemented as an independent configuration (e.g., multiple chips).

[0105] The auxiliary processor (1012) may include a controller (1012-1). The controller (1012-1) may include an interface conversion circuit and a timing control circuit. The controller (1012-1) may receive a video signal from the main processor (1011) and output video data by converting the data format of the video signal to match the interface specifications with the display module (1040). The controller (1012-1) may output various control signals required for driving the display module (1040).

[0106] The auxiliary processor (1012) may further include a data conversion circuit (1012-2), a gamma correction circuit (1012-3), a rendering circuit (1012-4), etc. The data conversion circuit (1012-2) can receive image data from the controller (1012-1) and can compensate the image data so that the image is displayed at a desired brightness according to the characteristics of the electronic device (1000) or the user's settings, etc., or can convert the image data to reduce power consumption or compensate for afterimages, etc. The gamma correction circuit (1012-3) can convert image data or gamma reference voltage, etc. so that the image displayed on the electronic device (1000) has desired gamma characteristics. The rendering circuit (1012-4) can receive image data from the controller (1012-1) and can render the image data by considering the pixel arrangement of the display panel (1041) applied to the electronic device (1000). At least one of the data conversion circuit (1012-2), gamma correction circuit (1012-3), and rendering circuit (1012-4) may be integrated into another component (e.g., a main processor (1011) or a controller). At least one of the data conversion circuit (1012-2), gamma correction circuit (1012-3), and rendering circuit (1012-4) may also be integrated into a data driver (1043) described later.

[0107] The memory (1020) can store various data used by at least one component of the electronic device (1000) (e.g., a processor (1010) or a sensor module (1061)) and input or output data for commands related thereto. The memory (1020) may include at least one of a volatile memory (1021) and a non-volatile memory (1022).

[0108] The input module (1030) can receive commands or data to be used for components of the electronic device (1000) (e.g., processor (1010), sensor module (1061), or sound output module (1063)) from outside the electronic device (1000) (e.g., user or external electronic device (1002)).

[0109] The input module (1030) may include a first input module (1031) into which commands or data are input from a user and a second input module (1032) into which commands or data are input from an external electronic device (1002). The first input module (1031) may include a microphone, a mouse, a keyboard, a key (e.g., a button), or a pen (e.g., a passive pen or an active pen). The second input module (1032) may support a specified protocol that can be connected to the external electronic device (1002) via a wired or wireless connection. In one embodiment, the second input module (1032) may include a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface. The second input module (1032) may include a connector that can be physically connected to the external electronic device (1002), such as an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0110] The display module (1040) can provide information visually to the user. The display module (1040) may include a display panel (1041), a gate driver (1042), and a data driver (1043). The display module (1040) may further include a window, a chassis, and a bracket for protecting the display panel (1041). The display module (1040) may correspond to the display device (100) of FIG. 1 and the display device (101) of FIG. 7. The display panel (1041), the gate driver (1042), and the data driver (1043) may correspond to the display panel (110), the gate driver (120), and the data driver (130) of FIG. 1 and FIG. 7, respectively.

[0111] The power module (1050) can supply power to components of the electronic device (1000). The power module (1050) may include a battery that charges the power voltage. The battery may include a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. The power module (1050) may include a power management circuit (1051). The power management circuit (1051) may supply power optimized for each of the modules described above and the modules described below. The power management circuit (1051) may correspond to the power management circuit (140) of FIG. 1 and the power management circuit (141) of FIG. 7. The power module (1050) may include a wireless power transmission and reception member electrically connected to the battery. The wireless power transmission and reception member may include a plurality of coil-shaped antenna radiators.

[0112] The electronic device (1000) may further include an internal module (1060) and an external module (1070). The internal module (1060) may include a sensor module (1061), an antenna module (1062), and an audio output module (1063). The external module (1070) may include a camera module (1071), a light module (1072), and a communication module (1073).

[0113] The sensor module (1061) can detect input by the user's body or input by a pen of the first input module (1031), and can generate an electrical signal or data value corresponding to the input. The sensor module (1061) may include at least one of a fingerprint sensor (1061-1), an input sensor (1061-2), and a digitizer (1061-3).

[0114] The processor (1010) can output commands or data to the display module (1040), sound output module (1063), camera module (1071), or light module (1072) based on input data received from the input module (1030). For example, the processor (1010) can generate image data in response to input data applied via a mouse or active pen, etc., and output it to the display module (1040), or generate command data in response to input data and output it to the camera module (1071) or light module (1072). If the processor (1010) does not receive input data from the input module (1030) for a certain period of time, it can switch the operating mode of the electronic device (1000) to a low-power mode or sleep mode to reduce the power consumed by the electronic device (1000).

[0115] The processor (1010) can output commands or data to the display module (1040), sound output module (1063), camera module (1071), or light module (1072) based on sensing data received from the sensor module (1061). For example, the processor (1010) can compare authentication data authorized by the fingerprint sensor (1061-1) with authentication data stored in the memory (1020) and then execute an application according to the comparison result. The processor (1010) can execute commands or output corresponding image data to the display module (1040) based on sensing data detected by the input sensor (1061-2) or the digitizer (1061-3). If the sensor module (1061) includes a temperature sensor, the processor (1010) can receive temperature data regarding the temperature measured from the sensor module (1061) and can further perform brightness correction, etc. on the image data based on the temperature data. Industrial applicability

[0116] The display device according to exemplary embodiments of the present invention can be applied to display devices included in computers, laptops, mobile phones, smartphones, smart pads, smart watches, PMPs, PDAs, MP3 players, etc.

[0117] Although pixels, display devices, and electronic devices according to exemplary embodiments of the present invention have been described above with reference to the drawings, the aforementioned embodiments are exemplary and may be modified and changed by those skilled in the art without departing from the technical spirit of the present invention as described in the following claims. Explanation of the symbols

[0118] 100, 101: Display device 110: Display panel 1000: Electronic devices 1010: Processor C1: First capacitor C2: Second capacitor CE1: First cathode electrode CE2: Second cathode electrode CE3: Third cathode electrode LED1: First light-emitting element LED2: Second light-emitting element LED3: Third light-emitting element PD: Panel driver PX: Pixel SP1: 1st subpixel SP2: 2nd subpixel SP3: 3rd subpixel T1: First transistor T2: Second transistor T3: Third transistor T4: 4th transistor T5: Fifth transistor T6: 6th transistor T7: The 7th transistor T8: 8th transistor VDDL: High power supply line VSSL1: 1st low-power line VSSL2: 2nd low-power line VSSL3: 3rd low-power line

Claims

Claim 1 A pixel comprising: a first subpixel including a first light-emitting element connected between a high power line transmitting a high power voltage and a first low power line transmitting a first low power voltage lower than the high power voltage; and a second subpixel including a second light-emitting element connected between the high power line and a second low power line transmitting a second low power voltage lower than the high power voltage, wherein the first low power voltage is higher than the second low power voltage. Claim 2 A pixel according to claim 1, further comprising a third subpixel including a third light-emitting element connected between the high power line and the second low power line. Claim 3 A pixel according to claim 2, wherein the first light-emitting element emits red light, the second light-emitting element emits green light, and the third light-emitting element emits blue light. Claim 4 In claim 2, the turn-on voltage of the first light-emitting element is lower than the turn-on voltage of the second light-emitting element, and the turn-on voltage of the second light-emitting element is lower than the turn-on voltage of the third light-emitting element, a pixel. Claim 5 In claim 2, the first cathode electrode to which the second electrode of the first light-emitting element is connected, the second electrode of the second light-emitting element, and the second cathode electrode to which the second electrode of the third light-emitting element is connected are extended in a first direction, and the first low-power line connected to the first cathode electrode and the second low-power line connected to the second cathode electrode are extended in a second direction intersecting the first direction, a pixel. Claim 6 In claim 1, the pixel further comprises a third subpixel including a third light-emitting element connected between the high power line and a third low power line transmitting a third low power voltage lower than the high power voltage, wherein the second low power voltage is higher than the third low power voltage. Claim 7 In claim 6, the first cathode electrode to which the second electrode of the first light-emitting element is connected, the second cathode electrode to which the second electrode of the second light-emitting element is connected, and the third cathode electrode to which the second electrode of the third light-emitting element is connected are extended in a first direction, and the first low-power line connected to the first cathode electrode, the second low-power line connected to the second cathode electrode, and the third low-power line connected to the third cathode electrode are extended in a second direction intersecting the first direction, a pixel. Claim 8 A pixel according to claim 1, wherein the voltage difference between the first low power supply voltage and the second low power supply voltage is 0.1V or more and 2.0V or less. Claim 9 A pixel according to claim 1, wherein each of the first light-emitting element and the second light-emitting element is a micro light-emitting diode. Claim 10 In claim 1, each of the first subpixel and the second subpixel comprises: a first transistor including a gate connected to a first node, a first terminal connected to a second node, and a second terminal connected to a third node; a second transistor that transmits a data voltage to the second node in response to a first gate signal; a third transistor that connects the first node and the third node in response to a second gate signal; a fourth transistor that transmits a first initialization voltage to the first node in response to a third gate signal; a fifth transistor that transmits the high power supply voltage to the second node in response to a light emission signal; a sixth transistor that connects the third node and a fourth node to which the first electrode of a corresponding light emission element among the first light emission element and the second light emission element is connected in response to the light emission signal; a seventh transistor that transmits a second initialization voltage to the fourth node in response to a fourth gate signal; and a first capacitor connected between the high power supply line and the first node. Claim 11 In claim 10, the pixel further comprises an eighth transistor that transmits a bias voltage to the second node in response to the fourth gate signal, wherein each of the first subpixel and the second subpixel further comprises the first subpixel and the second subpixel. Claim 12 In claim 10, each of the first subpixel and the second subpixel further comprises a second capacitor connected between a gate line transmitting the first gate signal and the first node. Claim 13 A pixel according to claim 1, wherein the voltage level of the first low power supply voltage in the low-luminance mode is higher than the voltage level of the first low power supply voltage in the medium-luminance mode, which has a higher luminance level than the low-luminance mode, and the voltage level of the second low power supply voltage in the low-luminance mode is higher than the voltage level of the second low power supply voltage in the medium-luminance mode. Claim 14 In claim 13, the voltage level of the first low power supply voltage in the high-brightness mode, which has a higher brightness level than the medium-brightness mode, is lower than the voltage level of the first low power supply voltage in the medium-brightness mode, and the voltage level of the second low power supply voltage in the high-brightness mode is lower than the voltage level of the second low power supply voltage in the medium-brightness mode, pixel. Claim 15 A display device comprising: a display panel including a pixel; and a panel driver providing a high power supply voltage, a first low power supply voltage lower than the high power supply voltage, and a second low power supply voltage lower than the high power supply voltage to the pixel, wherein the pixel includes a first subpixel including a first light-emitting diode connected between a high power supply line transmitting the high power supply voltage and a first low power supply line transmitting the first low power supply voltage; and a second subpixel including a second light-emitting diode connected between the high power supply line and a second low power supply line transmitting the second low power supply voltage, wherein the first low power supply voltage is higher than the second low power supply voltage. Claim 16 A display device according to claim 15, wherein the pixel further comprises a third subpixel including a third light-emitting element connected between the high power line and the second low power line. Claim 17 A display device according to claim 16, wherein the first light-emitting element emits red light, the second light-emitting element emits green light, and the third light-emitting element emits blue light. Claim 18 A display device according to claim 16, wherein the turn-on voltage of the first light-emitting element is lower than the turn-on voltage of the second light-emitting element, and the turn-on voltage of the second light-emitting element is lower than the turn-on voltage of the third light-emitting element. Claim 19 In claim 15, the pixel further comprises a third subpixel including a third light-emitting element connected between the high power line and a third low power line transmitting a third low power voltage lower than the high power voltage, and the second low power voltage is higher than the third low power voltage, a display device. Claim 20 An electronic device comprising a display device and a processor for controlling the display device, wherein the display device comprises: a display panel including a pixel; and a panel driver providing to the pixel a high power supply voltage, a first low power supply voltage lower than the high power supply voltage, and a second low power supply voltage lower than the high power supply voltage, wherein the pixel comprises: a first subpixel including a first light-emitting diode connected between a high power supply line transmitting the high power supply voltage and a first low power supply line transmitting the first low power supply voltage; and a second subpixel including a second light-emitting diode connected between the high power supply line and a second low power supply line transmitting the second low power supply voltage, wherein the first low power supply voltage is higher than the second low power supply voltage.

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