Clock synchronization method, device, and computer-readable storage medium
Patent Information
- Authority / Receiving Office
- KR · KR
- Patent Type
- Applications
- Current Assignee / Owner
- SHENZHEN INOVANCE TECH CO LTD
- Filing Date
- 2024-02-27
- Publication Date
- 2026-08-03
Smart Images
Figure PCT00004_ABST
Abstract
Description
Technology Field
[0001] This application claims priority to Chinese patent application No. 202311584833.2 filed on November 23, 2023, and all contents of said Chinese patent application are incorporated by reference into this application.
[0002] The present application relates to the field of communication technology, and in particular to a clock synchronization method, a device, and a computer-readable storage medium. Background Technology
[0003] Clock synchronization refers to the process of maintaining the synchronization of the clocks of a transmitting device and a receiving device in a communication system to ensure data accuracy and consistency.
[0004] Since wired and wireless communication methods and transmission media differ, clock synchronization must be performed using different methods. In the case of mixed wired and wireless networking, based on the principle of independent synchronization between wireless and wired, overall network synchronization requires the following steps: namely, synchronization between wired controllers and actuators directly connected thereto is achieved according to a clock synchronization source external to the wired controller; synchronization between wireless base stations is achieved according to a clock synchronization source external to the wireless base station; and synchronization between wireless base stations and terminals is achieved through a wireless interface synchronization signal.
[0005] After wired and wireless systems complete independent synchronization, they identify tasks through data packets. However, wireless systems generally process data based on frames; since the clock synchronization sources of wireless frames and wired data packets differ after receiving wired data packets—meaning there may be slight differences in their clock frequencies and phases—the wireless frames and wired data packets cannot be aligned in a timely manner due to these slight discrepancies, which can affect overall real-time data processing and factory production operations.
[0006] The above description is intended merely to aid in understanding the technical solution of the present application and does not constitute prior art. The problem to be solved
[0007] The primary objective of the present application is to provide a clock synchronization method, a device, and a computer-readable storage medium to solve the technical problem of low reliability of clock synchronization in wired-wireless fusion control systems. means of solving the problem
[0008] To achieve the above-mentioned purpose, the present application provides a clock synchronization method applicable to a base station of a convergence control system, wherein the convergence control system further comprises a controller, an actuator, and a terminal device, wherein a first side of the controller is connected to the actuator via a wired connection method, and a second side is connected to the base station via a wired connection method, wherein the actuator is connected to the actuator or the base station via a wired connection method, and wherein the terminal device is connected to the base station via a wireless connection method, and wherein the clock synchronization method is
[0009] A step of selecting a master clock source inside the base station as the clock synchronization source of the fusion control system;
[0010] A step of constructing a wired synchronization master clock message and a wireless interface synchronization master clock message according to the above clock synchronization source;
[0011] The method includes the step of transmitting the wired synchronization master clock message to a wired connected device and transmitting the wireless interface synchronization master clock message to a wireless connected device.
[0012] In one embodiment, the step of constructing a wired synchronization master clock message and a wireless interface synchronization master clock message according to the clock synchronization source is
[0013] A step of distributing a clock signal corresponding to the above-mentioned clock synchronization source to a clock divider and a phase lock loop;
[0014] A step of frequency-dividing the clock signal through the clock divider to generate corresponding second pulses and time information;
[0015] A step of generating a master time stamp operation clock by removing dithering from the clock signal through the phase lock loop;
[0016] A step of generating the wired synchronization master clock message according to the above second pulse and the above time information; and
[0017] It includes the step of generating the wireless interface synchronization master clock message according to the master time stamp operation clock, the second pulse, and the time information.
[0018] In one embodiment, the step of selecting a master clock source inside the base station as a clock synchronization source of the fusion control system is
[0019] When the above base station is a master base station, a step of obtaining the wireless system design requirements of the fusion control system and determining the determination vibrator frequency deviation index according to the wireless system design requirements;
[0020] The method includes the step of using a target crystal vibrator selected according to the crystal vibrator frequency deviation index as the clock synchronization source.
[0021] In one embodiment, prior to the step of selecting a master clock source inside the base station as a clock synchronization source of the fusion control system,
[0022] When the above base station is installed as a slave base station, the step of receiving the wired synchronization master clock message transmitted from the above master base station;
[0023] The method includes the step of executing a synchronization clock recovery operation according to the above wired synchronization master clock message;
[0024] The step of selecting a master clock source inside the base station as the clock synchronization source of the fusion control system is
[0025] The method includes the step of using the recovered synchronization clock as the clock synchronization source.
[0026] In one embodiment, after the step of transmitting the wired synchronization master clock message to a wired connection device and transmitting the wireless interface synchronization master clock message to a wireless connection device,
[0027] A step of calculating the data distribution time period of the controller through the business control cycle parameter;
[0028] The method includes the step of transmitting timing information to the controller during the data distribution time period according to a second pulse corresponding to the clock synchronization source.
[0029] To achieve the above-mentioned purpose, the present application provides a clock synchronization method, which is applied to a controller of a fusion control system, and said clock synchronization method is
[0030] A step of receiving a wired synchronization master clock message transmitted from a base station;
[0031] It includes the step of executing a synchronization clock recovery operation according to the above wired synchronization master clock message.
[0032] In one embodiment, after the step of executing a synchronization clock recovery operation according to the wired synchronization master clock message,
[0033] It includes the step of receiving timing information transmitted from the base station and processing a task within a prescribed time corresponding to the timing information.
[0034] To achieve the above-mentioned purpose, the present application provides a clock synchronization method, which is applied to an actuator of a fusion control system, and said clock synchronization method,
[0035] A step of receiving a wired synchronization master clock message transmitted from a base station or controller;
[0036] It includes the step of executing a synchronization clock recovery operation according to the above wired synchronization master clock message.
[0037] To achieve the above-mentioned purpose, the present application provides a clock synchronization method, which is applied to a wireless connection device of a convergence control system, and said clock synchronization method is
[0038] A step of receiving a wireless interface synchronization master clock message transmitted from a base station;
[0039] A step of acquiring a master time stamp operation clock related to the above wireless interface synchronization master clock message, and a slave time stamp operation clock used locally;
[0040] It includes the step of executing a synchronization clock recovery operation according to the master time stamp operation clock and the slave time stamp operation clock.
[0041] In one embodiment, prior to the step of executing a synchronization clock recovery operation according to the master time stamp operation clock and the slave time stamp operation clock,
[0042] A step of transmitting a delay message to the base station and determining the transmission time of the delay message;
[0043] The method includes the step of receiving the reception time at which the delay message transmitted from the base station is received; and
[0044] The step of executing a synchronization clock recovery operation according to the master time stamp operation clock and the slave time stamp operation clock is
[0045] It includes the step of executing a synchronization clock recovery operation according to the master time stamp operation clock, the slave time stamp operation clock, and the transmission and reception times of the delay message.
[0046] In addition, to achieve the above-described purpose, the present application further provides a base station, said base station comprising a storage device, a processor, and a clock synchronization program stored on said storage device and operable on said processor, said clock synchronization program configured to implement the steps of the above-described clock synchronization method.
[0047] In addition, to achieve the above-described purpose, the present application further provides a controller, said controller comprising a storage device, a processor, and a clock synchronization program stored on said storage device and operable on said processor, said clock synchronization program configured to implement the steps of the above-described clock synchronization method.
[0048] In addition, to achieve the above-described purpose, the present application further provides an actuator, said actuator comprising a storage device, a processor, and a clock synchronization program stored on said storage device and operable on said processor, said clock synchronization program configured to implement the steps of the above-described clock synchronization method.
[0049] In addition, to achieve the above-described purpose, the present application further provides a wireless connection device, wherein the wireless connection device comprises a storage device, a processor, and a clock synchronization program stored on the storage device and operable on the processor, and the clock synchronization program is configured to implement the steps of the clock synchronization method described above.
[0050] Additionally, to achieve the above-described purpose, the present application further provides a computer-readable storage medium, wherein a clock synchronization program is stored on the computer-readable storage medium, and the steps of the clock synchronization method described above are realized when the clock synchronization program is executed by a processor. Effects of the invention
[0051] In one technical solution provided in this application, a master clock source within a base station is used as the clock synchronization source of a convergence control system, and corresponding wired synchronization master clock messages and wireless interface synchronization master clock messages are constructed and then transmitted to wired connected devices and wireless connected devices, respectively. By doing so, it is ensured that the reference clock source used by the devices in the next stage is identical, thereby maintaining the clock synchronization results of wired connected devices and wireless connected devices in alignment. This effectively resolves the problem of time deviation between the two and ensures the reliability of the clock synchronization results of the entire convergence control system. Brief explanation of the drawing
[0052] Figure 1 is a schematic diagram of clock synchronization in a wired system. Figure 2 is a schematic diagram of clock synchronization in a wireless system. Figure 3 is a schematic diagram of clock synchronization in a fusion control system. FIG. 4 is a schematic flowchart of a first embodiment of the clock synchronization method of the present application. FIG. 5 is a schematic diagram of a joint control system in the first embodiment of the clock synchronization method of the present application. FIG. 6 is a signaling flowchart of a first embodiment of the clock synchronization method of the present application. FIG. 7 is a schematic flowchart of step (S11) of the first embodiment of the clock synchronization method of the present application. FIG. 8 is a schematic flowchart of step (S12) of the first embodiment of the clock synchronization method of the present application. FIG. 9 is a schematic diagram of a wireless system with enhanced determinism among the first embodiments of the clock synchronization method of the present application. FIG. 10 is a schematic diagram of the flow prior to step (S11) of the first embodiment of the clock synchronization method of the present application. FIG. 11 is a schematic diagram of the flow after step (S13) of the first embodiment of the clock synchronization method of the present application. FIG. 12 is a schematic flowchart of a second embodiment of the clock synchronization method of the present application. FIG. 13 is a schematic diagram of the flow after step (S22) of the second embodiment of the clock synchronization method of the present application. FIG. 14 is a schematic flowchart of a third embodiment of the clock synchronization method of the present application. FIG. 15 is a schematic diagram of the flow prior to step (S33) of the third embodiment of the clock synchronization method of the present application. FIG. 16 is a signaling flowchart in the third embodiment of the clock synchronization method of the present application. FIG. 17 is a schematic diagram of an example of a joint control system of the clock synchronization method of the present application. FIG. 18 is a simplified flowchart of an example of a joint control system for the clock synchronization method of the present application. FIG. 19 is a schematic diagram of sequence synchronization of an example of a joint control system of the clock synchronization method of the present application. FIG. 20 is a schematic diagram of the structure of a device in a hardware operating environment regarding an embodiment of the present application. The realization of the purpose, functional features, and advantages of the present application will be further explained by associating embodiments and referring to the attached drawings. Specific details for implementing the invention
[0053] It should be understood that the specific embodiments described herein are for the purpose of interpreting this application only and are not intended to limit this application.
[0054] Conventional industrial wired system clock synchronization sources originate from a controller or actuator, or a clock synchronization source is externally connected to a controller or actuator, and application examples are as shown in FIG. 1, wherein the controller is an external clock synchronization source, the controller is a clock synchronization source, and the actuator is a clock synchronization source, respectively. Here, the external synchronization clock source is, for example, a GNSS (Global Navigation Satellite System), a clock server, etc.; and the actuator is, for example, a servo, a motor, etc.
[0055] Conventional industrial wireless systems generally conduct wireless communication using 3GPP (3rd Generation Partnership Project) 4 / 5G (Generation Mobile Communication Network) standards and WIFI devices.
[0056] In particular, since there are situations where it is difficult to coordinate clock synchronization between devices of different operators or between different standard or networking systems of the same operator in TDD (Time Division Duplexing) systems, the clock synchronization source is generally derived from a single common standard clock source to prevent interference between different base stations and uplink / downlink interference between different terminals. For example, a satellite clock synchronization source, GNSS, clock server, etc., is externally connected to a wireless base station. An application example is illustrated in FIG. 2, and after the synchronization clock source is externally connected to the base station, it is connected to wireless connection devices such as Industrial Customer Premise Equipment (CPE) and gateways to perform clock synchronization.
[0057] In mixed wired and wireless networking, since both wired and wireless modes each have their own synchronization methods, overall network synchronization issues become critical and can easily occur. If problems exist in overall network synchronization, they affect the control of the entire industrial network, ultimately impacting the entire business process.
[0058] In a wired-wireless convergence control system, a synchronization method in which wired and wireless are independent is generally adopted, that is, a networking block diagram as shown in Fig. 3 is adopted, and the overall network synchronization includes the following steps.
[0059] 1) Synchronization between a wired master-slave controller and an actuator directly connected thereto may be performed by externally connecting a clock synchronization source to the master controller and synchronizing the slave controller and the actuator with the master controller, or, the controller may select a local clock source as the clock source to perform synchronization;
[0060] 2) Wireless base stations maintain synchronization through an external clock synchronization source, for example, by completing synchronization via 1588;
[0061] 3) Synchronization between the wireless base station and the terminal is completed through a wireless interface.
[0062] However, the above-mentioned plan has the following problems.
[0063] 1) Wireless systems generally process data based on frames; however, since the clock synchronization sources of the wireless frame and the wired data packet differ after the wired data packet is received—that is, there may be slight differences in the clock frequency and phase of the two—the wireless frame and the wired data packet cannot be aligned in time due to these slight differences, which may affect the overall real-time data processing and factory production operations;
[0064] 2) For example, the clock source is selected from a local clock source from a controller or actuator, and generally cannot meet the requirements for clock frequency deviation precision. For example, the clock frequency deviation of wired Ethernet does not exceed ±100 ppm, which far exceeds the clock frequency deviation <±25 ppm (802.11b) defined in WiFi standards; <±20 ppm (802.11g / a / n). Industrial wireless communication follows, for example, 3GPP standards, and the clock frequency deviation of the wireless interface is required to be less than ±0.05 ppm.
[0065] 3) GNSS satellite synchronization has low reliability, is easily interfered with, and is difficult to install. Additionally, time servers or other external clock sources corresponding to the 1588 protocol have the disadvantages of a large initial workload, difficulty in locating failures, and high costs.
[0066] The present application provides a novel clock synchronization method, wherein a master clock source within a base station is used as the clock synchronization source for a convergence control system, and clock synchronization is performed for each type of wired and wireless connected device according to the said clock synchronization source, thereby ensuring the reliability of the overall system clock synchronization.
[0067] To better understand the technical solution described above, a more detailed description of exemplary embodiments of the present application will be provided with reference to the drawings attached below. Although exemplary embodiments of the present application are illustrated in the attached drawings, it should be understood that the present application can be realized in various forms, not limited to the embodiments described herein. Conversely, the provision of such embodiments is intended to enable a clearer understanding of the present application and to fully convey the scope of the present application to those skilled in the art.
[0068] An embodiment of the present application provides a clock synchronization method and is applied to a master base station in a fusion control system. Referring to FIG. 4, FIG. 4 is a flowchart of a first embodiment of the clock synchronization method of the present application.
[0069] In this embodiment, the clock synchronization method includes the following steps.
[0070] Step (S11): Select the master clock source inside the base station as the clock synchronization source of the fusion control system;
[0071] Step (S12): Construct a wired synchronization master clock message and a wireless interface synchronization master clock message according to the clock synchronization source;
[0072] As illustrated in FIG. 5, the joint control system mainly comprises multiple base stations, controllers, actuators, and terminal devices. When one of the multiple base stations is selected as the master base station, the remaining base stations become slave base stations. In terms of the connection method, the first side of the controller is connected to the actuator via a wired connection method, and the second side is connected to the base station via a wired connection method; the actuator is connected to the actuator or the base station via a wired connection method, and the drawing illustrates only one of these connection methods; and the terminal device is connected to the base station via a wireless connection method.
[0073] The base station is a core device within the system and is responsible for managing and controlling each type of connected device, providing services and resource settings thereto, and coordinating communication and data transmission between different devices; wired connected devices refer to devices interconnected with the base station via a wired connection, the connection method being, for example, fiber optics, cables, etc., and generally include devices such as controllers and actuators; wireless connected devices refer to devices interconnected with the master base station via a wireless connection, and it can be understood that terminal devices such as smartphones, servos, and motors are included.
[0074] The master clock source within the base station refers to the primary clock device responsible for providing internal base station time. The master clock source is critical to the base station and even to the entire convergence control system, as it provides the clock reference for the entire system, ensuring synchronization and coordination among devices.
[0075] In one embodiment, a master clock source inside the base station is selected, and the master clock source may be a local crystal oscillator, an external clock device, etc., and the present embodiment does not make specific limitations thereon, and then the master clock source is used as the clock synchronization source of the entire fusion control system.
[0076] Referring to FIG. 6, wired synchronization master clock message and wireless interface synchronization master clock message are constructed according to the clock synchronization source, wherein the wired synchronization master clock message is for realizing clock synchronization between a base station and a wired connected device, and the wireless interface synchronization master clock message is for realizing clock synchronization between a base station and a wireless connected device.
[0077] In one embodiment, referring to FIG. 7, step (S11) includes the following steps.
[0078] Step (S111): When the base station is a master base station, obtain the wireless system design requirements of the convergence control system, and determine the determination vibrator frequency deviation index according to the wireless system design requirements;
[0079] Step (S112): The target crystal vibrator selected according to the crystal vibrator frequency deviation index is used as the clock synchronization source.
[0080] When the current base station serves as the master base station, its internal master clock source is the most fundamental clock synchronization source for the entire joint control system. Since the master base station may contain multiple local crystal oscillator clock sources, it can be understood that in such cases, one of them must be selected as the master clock source.
[0081] In one embodiment, wireless system design requirements for a convergence control system are obtained, including frequency synchronization requirements, frequency deviation precision requirements, time phase synchronization requirements, temperature range, etc. Next, based on the wireless system design requirements, crystal vibrator frequency deviation indicators, etc. are determined, and are multidimensional indicators such as crystal vibrator aging rate, crystal vibrator initial frequency deviation, and overall temperature range frequency deviation.
[0082] For example, crystal oscillator types include quartz crystal oscillators (OSC), temperature-compensated crystal oscillators (TCXO), voltage-controlled crystal oscillators (VCXO), and oven-controlled crystal oscillators (OCXO). Crystal oscillator frequency deviation indicators are determined based on current wireless system design requirements and device life cycles, specifically including crystal oscillator aging rates within a 10-year time range, crystal oscillator initial frequency deviation, and frequency deviation over the entire temperature range. Based on these crystal oscillator frequency deviation indicators, maximum spectrum overlap analysis is performed for all crystal oscillator types, and a suitable target crystal oscillator is selected as a clock synchronization source according to wireless system design requirements (e.g., frequency synchronization requirements ≤ 10 PPM or 20 PPM).
[0083] This method selects a suitable target crystal oscillator from multiple local crystal oscillators within the master base station based on the crystal oscillator frequency deviation index and uses it as the clock synchronization source. Local crystal oscillators can generate clock signals without relying on an external clock source, which enables the master base station to generate accurate time information even without an external network connection. Furthermore, since it is not easily affected by the external environment, its independence and stability are significantly stronger.
[0084] In one embodiment, referring to FIG. 8, step (S12) includes the following steps.
[0085] Step (S121): Distributing the clock signal corresponding to the clock synchronization source to the clock divider and the phase lock loop;
[0086] A crystal oscillator is an electronic oscillator that generates a stable frequency through crystal vibration; since the frequency of the clock signal generated by this is fixed and cannot satisfy synchronization requirements, it can be understood that frequency adjustment must be performed.
[0087] In one embodiment, after connecting the target determination vibrator to the driver, a suitable power supply is provided for the determination vibrator driver to ensure that the voltage and current meet the requirements of the driver, and then a clock signal corresponding to the clock synchronization source is measured and acquired through a test device such as an oscilloscope.
[0088] Step (S122): Frequency divide the clock signal through the clock divider to generate corresponding second pulses and time information;
[0089] It can be understood that a clock divider is a circuit that performs frequency division on an input high-frequency clock signal according to a constant frequency division multiple to obtain a relatively low-frequency signal for use in a digital system.
[0090] In one embodiment, since the frequency of the clock signal generated by the driver is relatively high, the clock signal is input to a clock divider, and count frequency division is performed on the input clock signal through a programmable device such as a Complex Programmable Logic Device (CPLD) or a Field Programmable Gate Array (FPGA), and then output again to finally obtain a frame header pulse signal. Here, the frame header pulse signal is substantially a single short pulse signal (e.g., 1ms or 10ms) intended to mark the time domain start point of a wireless frame.
[0091] By designing a counter circuit on an FPGA or CPLD, the number of frame header pulse signals is counted. Whenever a frame header pulse signal is detected, the counter increments by 1, and when the value of the counter reaches a preset value, it generates a single short pulse signal, i.e., a pulse per second (PP1S). For example, if the frame header pulse signal is 10ms, PP1S is formed when the counter accumulates to 100.
[0092] A frame header pulse signal can be used as an interrupt trigger signal to read the current reference time (e.g., a reference time provided by a local real-time clock or an external clock reference source) and combine the count value of the frame header pulse signal to calculate the current time information (Time of Day, TOD). For example, when the frame header pulse signal is detected, the reference time provided by the real-time clock is 10:30:25 and the count value of the frame header pulse signal is 8, then the TOD can be calculated as 10:30:25 + 80ms.
[0093] Step (S123): generate a master time stamp operation clock by removing dithering from the clock signal through the phase lock loop;
[0094] This plan adopts a time stamp labeling method to enhance transmission determinism between the base station and the wireless connected device.
[0095] A Phase Locked Loop (PLL) is a common circuit designed to generate a stable clock signal. It can be understood that this eliminates dithering in the clock signal and provides a single, stable clock signal as the system's operating clock.
[0096] In one embodiment, a clock signal is input to a phase-locked loop circuit, and after removing dithering, a stable clock signal with low dithering is output. Then, the clock signal generated by the phase-locked loop is connected to a clock input port of a device such as a processor, a switching chip, or a network port PHY chip to form a stable working clock.
[0097] Since such devices generally have a built-in clock module, the aforementioned working clock can be used to time stamp data packets or events, and this time stamp records the time of event occurrence to configure a master time stamp working clock.
[0098] Step (S124): Generate the wired synchronization master clock message according to the second pulse and the time information; and
[0099] It can be understood that the second pulse signal is generally used for synchronization clocks and timing, and can trigger a processor as a reference time to execute specific operations.
[0100] In this method, a second pulse is used as a single input signal. When a specific second pulse is detected, the processor codes the current time information according to this signal into a specific format (e.g., binary format), making transmission and interpretation convenient. Next, according to protocol and format requirements, time information in a specific format is written into a blank message to generate a wired synchronization master clock message.
[0101] Step (S125): Generates the wireless interface synchronization master clock message according to the master time stamp operation clock, the second pulse, and the time information.
[0102] In one embodiment, as illustrated in FIG. 9, a master clock message to be stamped is generated at the application adapter layer according to the second pulse and time information, and the specific method is the same as in step (S124). Based on this, a master time stamp label is stamped at the deterministic time stamp location (e.g., physical layer, data link layer, etc.) of the master clock message to be stamped based on the master time stamp operation clock, and a wireless interface synchronization master clock message is generated. By using the master time stamp label here as a time information label, the wireless connection device in the next stage can help maintain synchronization with the base station clock by adjusting its own clock.
[0103] In this method, a master clock message is generated based on second pulses and time information. Since the second pulse is a time signal generated in real time, it is not affected by network delays or transmission times, nor is it influenced by the network or external servers, which helps improve the independence and stability of clock synchronization. Furthermore, this method installs a single deterministic wireless system; that is, the base station is located at the deterministic time stamp location. By stamping a master time stamp label on the master clock message, the wireless connected device can stamp a corresponding slave time stamp label after receiving the master clock message, thereby enabling clock synchronization based on the two labels. By installing it in this manner, and considering that network delays and waves affect message transmission, the time stamp synchronization adopted in this method helps the receiving end better understand the transmission time of the data message, thereby resisting the influence of network delays and waves on clock synchronization precision.
[0104] Step (S13): Transmit the wired synchronization master clock message to the wired connected device and transmit the wireless interface synchronization master clock message to the wireless connected device.
[0105] It will be understood that the base station, as the master device, must transmit a master clock message to the device in the next stage so that the device in the next stage can recover the synchronization clock.
[0106] In one embodiment, a wired synchronization master clock message is transmitted to a wired connected device via a network port transmission method, and a wireless interface synchronization master clock message is also transmitted to a wireless connected device via a wireless interface transmission method.
[0107] Here, messages are transmitted between the base station and the wired connected device via a network port, and this mainly concerns the following two types of clock synchronization protocols.
[0108] Type 1: 802.1as, PTCP (Path MTU Discovery Protocol), and CIP sync (Common Internet Protocol Signaling Synchronization) are clock synchronization protocols derived from 1588.
[0109] 802.1as implements more specific regulations and restrictions on 1588, PTCP truncates 1588 functions, and CIP sync uses the ETE measurement method of the 1588 protocol and extends the time step detection function.
[0110] Taking a master base station and a slave base station as an example, in this type of synchronization, the master station transmits information to the slave station using independent messages, and the slave station also responds via independent messages; the core algorithm must be implemented at both the master and slave stations.
[0111] Type 2: Powerlink (Powerlink Communication), SercosIII (Siemens Real-Time Communication Protocol), and EtherCAT (Ethernet for Control Automation Technology).
[0112] Features: Logical circular structure, simplified link delay calculation algorithm, and the calculation of both link delay and dwell time must be implemented at the master station.
[0113] Wired PTP clock synchronization precision: Taking IEEE 802.1as as an example, IEEE 802.1as performs deletion adjustments based on IEEE 1588, and the protocol operates at the link layer, inserting time information into data frames and transmitting them to each network node, and can ensure that the clock synchronization error is within 1 µs.
[0114] Also, referring to FIG. 10, prior to step (S11), the following steps are included.
[0115] Step (S14): When the base station is installed as a slave base station, receive the wired synchronization master clock message transmitted from the master base station;
[0116] Step (S15): Execute a synchronization clock recovery operation according to the wired synchronization master clock message;
[0117] When the current base station is a slave base station, it is not necessary to perform operations such as frequency division or dithering removal on the local crystal oscillator; it can be understood that clock synchronization simply needs to be performed according to the message transmitted from the master base station of the previous stage.
[0118] In one embodiment, the master base station monitors the corresponding port according to the port information transmitting the message, and receives the wired synchronization master clock message transmitted by the master base station in real time. After the message is received, the following operations are performed.
[0119] Meanwhile, the location and format in which time information is included in the message are determined according to the communication protocol used by the master base station for message transmission, a field or data structure containing master clock source time information is located, and interpretation and processing are performed thereon to obtain readable time information.
[0120] On the other hand, the local clock current local time is obtained through a method of calling the interface.
[0121] Thus, the time difference between the master base station's time information and the local time information can be calculated by comparing them. The time difference can be obtained through a simple subtraction operation, that is, by subtracting the local time from the master base station's time.
[0122] After the time deviation is calculated, the calculated time deviation must be applied to the clock of the local device to adjust the local clock and perform clock synchronization. Specific adjustment methods include, for example, adjusting the time counter, adjusting the clock frequency, and resetting the clock. Taking the time counter adjustment as an example, in some devices, the clock counter is used to record time, so the clock time can be changed by adjusting the counter value; for example, if the counter value is 1 second faster than the actual time, the clock can be adjusted by subtracting 1 second from the counter value.
[0123] Step (S11) includes the following steps.
[0124] Step (S16): The recovered synchronization clock is used as the clock synchronization source.
[0125] In one embodiment, after the slave base station completes the synchronization clock recovery operation, the slave base station maintains the clock of the slave base station so that it matches the clock of the master base station, thereby allowing clock synchronization to proceed for the device of the next stage by using the clock source inside the slave base station as a new clock synchronization source.
[0126] Here, during the process of clock synchronization for the next stage device of the slave base station, the second pulse and time information used can continuously utilize the previous second pulse and time information to improve the overall efficiency of time synchronization.
[0127] Also, referring to FIG. 11, after step (S13), the following steps are further included.
[0128] Step (S17): Calculate the data distribution time period of the controller through the business control cycle parameter;
[0129] After the base station and the controller complete clock synchronization, it can be understood that this proposal further provides a sequence control method between the base station and the controller to support the realization of business functions between the two.
[0130] Task control cycle parameters refer to time parameters that control the realization of task functions, and generally include frame structure, transmission sequence, connection control cycle, and scheduling cycle. Here, the frame structure defines the time slot and time length of each communication frame to enable the master base station and the controller to proceed with the exchange of data transmission and control signaling within a specific time; the transmission sequence determines the timing and order of data transmission to ensure that data is transmitted and processed according to the correct order and sequence; the connection control cycle controls the connection and disconnection of user devices to ensure the rational distribution and management of network resources; and the control cycle schedules and distributes wireless resources to satisfy different task requirements and optimize network performance.
[0131] In one embodiment, the base station calculates the application layer data distribution time zone provided by the controller through the above-described parameters and determines information such as the timing, order, and length of the transmission time of data transmission.
[0132] For example, assuming that a base station needs to transmit actuator feedback data to a controller, the base station first calculates the application layer data distribution time provided by the controller based on business control cycle parameters (e.g., frame structure, transmission sequence, etc.). By doing so, it can calculate that one frame of actuator feedback data needs to be transmitted to the controller at 10ms intervals.
[0133] Step (S18): Timing information is transmitted to the controller during the data distribution time period according to the second pulse corresponding to the clock synchronization source.
[0134] In one embodiment, the base station transmits timing information to the controller at a corresponding time according to its own interrupt (i.e., a second pulse corresponding to a clock synchronization source) and notifies the controller that it has completed a task operation (e.g., data collection, processing, distribution, etc.) within a specified time.
[0135] For example, the base station transmits timing information to the controller at intervals of 10ms according to the second pulse, and may include a time stamp, time interrupt, data packet transmission time area, etc. Thereby, after receiving the timing information transmitted by the base station, the controller arranges the distribution of application layer data at intervals of 10 milliseconds.
[0136] Through this method, the base station and the controller can communicate and collaborate at a predetermined time, supporting the realization of business functions and the reliability of data transmission, thereby ensuring the stability and performance of the communication system and improving the user experience.
[0137] In one technical solution provided in this embodiment, a master clock source within the base station is used as the clock synchronization source of the convergence control system, and corresponding wired synchronization master clock messages and wireless interface synchronization master clock messages are constructed and then transmitted to the wired connected device and the wireless connected device, respectively. By doing so, it is ensured that the reference clock source used by the device in the next stage is identical, thereby maintaining the clock synchronization results of the wired connected device and the wireless connected device in alignment. This effectively resolves the problem of time deviation between the two and ensures the reliability of the clock synchronization results of the entire convergence control system.
[0138] An embodiment of the present application provides a clock synchronization method and is applied to a controller in a fusion control system. Referring to FIG. 12, FIG. 12 is a flowchart of a second embodiment of the clock synchronization method of the present application.
[0139] In this embodiment, the clock synchronization method includes the following steps.
[0140] Step (S21): Receive a wired synchronization master clock message transmitted from the base station;
[0141] Step (S22): Execute the synchronization clock recovery operation according to the wired synchronization master clock message.
[0142] Optionally, since the second side of the controller in the converged control system is connected to the base station via a wired connection method, the controller receives a wired synchronization master clock message transmitted from the base station through a network port.
[0143] On the one hand, the time information of the base station is determined according to the wired synchronization master clock message, and on the other hand, the time information of the controller local is acquired and a comparison is performed between the two time informations. Based on the comparison result, a synchronization clock recovery operation is performed for the actuator. The specific principle is identical to the synchronization clock recovery operation of the slave base station in the first embodiment, and a redundant explanation thereof is omitted here.
[0144] Also, referring to FIG. 13, after step (S22), the following steps are included.
[0145] Step (S23): Receives timing information transmitted from the base station and processes the task within a specified time corresponding to the timing information.
[0146] After the base station and the controller complete clock synchronization, it can be understood that this proposal further provides a sequence control method between the base station and the controller to support the realization of business functions between the two.
[0147] In one embodiment, when the controller receives timing information transmitted from a base station, the controller performs tasks such as, for example, data collection, processing, and distribution within a specific time period according to the timing information.
[0148] For example, after the controller receives timing information transmitted from the base station, the controller performs collaborative operations at a predetermined time point, for example, by arranging the distribution of application layer data at time points of 10ms, and supports the transmission and playback of data fed back by the actuator, thereby ensuring the reliability and real-time nature of data transmission.
[0149] For actuators in a converged control system, since the actuator is connected to the actuator or base station via a wired connection method, the actuator receives a wired synchronization master clock message transmitted from the base station or controller through a network port. Subsequently, it executes a synchronization clock recovery operation according to the wired synchronization master clock message, and the specific principle is the same as that of the actuator, so a redundant explanation regarding this is omitted here.
[0150] In one technical solution provided in this embodiment, the wired connection device receives a wired synchronization master clock message transmitted from the base station and executes a synchronization clock recovery operation according to the wired synchronization master clock message. That is, the wired connection device performs synchronization based on the master clock source within the base station, and the wireless connection device does the same; that is, the reference clock sources of the wired connection device and the wireless connection device are identical. Consequently, the clock synchronization results of both devices are maintained in agreement, thereby effectively resolving the problem of time deviation between the two and ensuring the reliability of the clock synchronization results of the entire fusion control system.
[0151] An embodiment of the present application provides a clock synchronization method and is applied to a wireless connected device in a fusion control system. Referring to FIG. 14, FIG. 14 is a flowchart of a third embodiment of the clock synchronization method of the present application.
[0152] In this embodiment, the clock synchronization method includes the following steps.
[0153] Step (S31): Receive a wireless interface synchronization master clock message transmitted from the base station;
[0154] Step (S32): Obtain the master time stamp operation clock associated with the wireless interface synchronization master clock message, and the slave time stamp operation clock used locally;
[0155] Step (S33): A synchronization clock recovery operation is executed according to the master time stamp operation clock and the slave time stamp operation clock.
[0156] In one embodiment, as illustrated in FIG. 9, the entire base station is the physical layer, and a wireless interface synchronization master clock message is transmitted to a wireless connected device through the wireless interface of a determinism-enhanced wireless system. Correspondingly, the wireless connected device receives a wireless signal carrying the wireless interface synchronization master clock message transmitted from the base station and obtains a digital data stream through steps such as signal conversion and digital demodulation.
[0157] Subsequently, the digital data stream passes through physical layer processing to perform operations such as channel decoupling, channel estimation, and balancing, thereby recovering the original data information. After being processed via the physical layer, the data is transported to the data link layer for further processing, which includes operations such as interpreting message header information and extracting valid data.
[0158] After passing through the above-described processing, a master time stamp operation clock related to the wireless interface synchronization master clock message is obtained, and additionally, a slave time stamp operation clock used locally by the wireless connected device can be obtained.
[0159] Thus, the time difference between the base station and the wireless connected device can be determined according to the master time stamp operation clock and the slave time stamp operation clock, and a synchronization clock recovery operation can be executed according to the time difference.
[0160] For example, a deterministic time stamp location is established, including but not limited to a physical layer, a data link layer, or other location. Next, on the said deterministic time stamp location, a master time stamp label stamped on a master time stamp operation clock and a slave time stamp label stamped on a slave time stamp operation clock are established, wherein the master time stamp label represents the transmission time of the message and the slave time stamp label represents the reception time of the message. Next, based on the master time stamp label and the slave time stamp label (i.e., transmission time and reception time), a time difference between the base station and the wireless connected device is calculated, and based on the said time difference, the wireless connected terminal can correct its own time to maintain synchronization with the time of the master base station.
[0161] Subsequently, the PTP protocol stack (Precision Time Protocol) can be operated to recover the second pulse and time information, and clock synchronization can be performed for the next stage device of the wireless connection device.
[0162] Also, referring to FIG. 15, prior to step (S33), the following steps are additionally included.
[0163] Step (S34): Transmit a delay message to the base station, and determine the transmission time of the delay message;
[0164] Step (S35): Receive the reception time at which the delay message transmitted from the base station is received;
[0165] Step (S33) includes the following steps.
[0166] Step (S36): A synchronization clock recovery operation is executed according to the master time stamp operation clock, the slave time stamp operation clock, and the transmission and reception times of the delay message.
[0167] It can be understood that the base station acts as a master clock source, and during the synchronization process with a wireless connected device, it transparently transmits time stamp information such as that of a processor, a switching chip, and a network port PHY chip through a wireless interface to synchronize the time stamp information of the wireless connected device with the time stamp of the base station. Additionally, referring to FIG. 16, the determinism of wireless interface transmission can be guaranteed through the reserve of wireless interface resources.
[0168] In one embodiment, a master clock message transmitted by a base station is received and understood as a Sync message (Synchronization message), and the time (t1) when the base station transmits the Sync message and the time (t2) when the wireless connected device receives the Sync message can be determined, specifically according to the master time stamp label and the slave time stamp label.
[0169] In one embodiment, a wireless connection device transmits a delay message (Delay Request message, abbreviated as Delay_Req message below) to a base station. On the one hand, the wireless connection device determines the transmission time (t3) of the Delay_Req message, and on the other hand, after receiving the Delay_Req message, the base station transmits the reception time (t4) to the wireless connection device.
[0170] Through the above message transmission process, the wireless connected device acquires a total of four times, t1, t2, t3, and t4, and uses these four times to calculate the path delay and time deviation between the base station and the wireless connected device, and the formula is as follows.
[0171] Total round-trip link delay between base station and wireless connected device = [(t2 - t1) + (t4 - t3)]
[0172] Unidirectional link delay between base station and wireless connected device = [(t2-t1)+(t4-t3)] / 2
[0173] Clock deviation of wireless connected device relative to base station Offset = (t2 - t1) - [(t2 - t1) + (t4 - t3)] / 2 = [(t2 - t1) - (t4 - t3)] / 2
[0174] If the wireless connection device adjusts the local time according to the time deviation calculated as described above, clock synchronization with the base station can be realized.
[0175] This method improves accuracy and reliability by obtaining the transmission and reception times of delay messages based on wireless interface synchronization master clock messages and incorporating them into the time deviation to compensate for the uncertainty in transmission time caused by multiple factors to a certain extent, thereby correcting the local clock more accurately and ensuring that the synchronization between the clock of the wireless connected device and the base station is maintained.
[0176] In one technical solution provided in this embodiment, the wireless connection device receives a wireless interface synchronization master clock message transmitted from a base station, and then performs a comparison between the related master time stamp operation clock and the slave time stamp operation clock used locally to execute a synchronization clock recovery operation. That is, the wireless connection device performs synchronization based on the master clock source within the base station, and the wired connection device does the same; in other words, the reference clock sources of the wireless connection device and the wired connection device are identical. Consequently, the clock synchronization results of both devices are maintained in agreement, thereby effectively resolving the problem of time deviation between the two and ensuring the reliability of the clock synchronization results of the entire fusion control system.
[0177] For example, a wired wireless convergence control system as illustrated in FIG. 17 includes multiple base stations, controllers, actuators, and wireless terminals, and as shown in FIG. 18, one of the base stations is selected as the master base station and selected as the clock synchronization source for the entire system, and then devices such as controllers, actuators, and wireless terminals on the link nodes are synchronized.
[0178] Step 1: Install Base Station 0 as the master base station;
[0179] Step 2: Complete synchronization between Base Station 0 and Base Station 1;
[0180] Step 3: Complete synchronization between Base Station 0 and Controller 0;
[0181] Step 4: Complete synchronization between Base Station 1 and Controller 1;
[0182] Step 5: Complete synchronization between Controller 0 and the actuator directly connected thereto;
[0183] Step 6: Complete synchronization between Controller 1 and the actuator directly connected thereto;
[0184] Step 7: Complete synchronization between Base Station 0 and the terminal directly connected thereto;
[0185] Step 8: Complete synchronization between Base Station 1 and the terminal directly connected thereto;
[0186] In addition, after the industrial wireless base station is clock-synchronized with the wired controller and actuator, the following sequence control alignment is designed as an example to realize the synchronization sequence between the industrial wireless and wired systems, as shown in FIG. 19.
[0187] The frame structure of the base station has a period of 1ms and has a total of 8 slots, slots 0 to 3 are D slots, the sequence length is 0.5ms, and corresponds to D in the diagram, and slots 4 to 7 are U slots, the sequence length is 0.5ms, and corresponds to U in the diagram.
[0188] Wireless transmission must be advanced by two slots, that is, the application layer data of the controller must be transmitted to the base station 250us ahead.
[0189] Wireless reception processing must delay two slots, that is, for the wireless terminal to decode the data, it must transmit to the driver with a delay of 250us.
[0190] The entire wireless processing requires 1ms, and includes occupying two slots for transmission, two slots for reception, and four slots for wireless interface transmission.
[0191] The controller's interrupt is 250us ahead of the base station's interrupt, and the time to receive data and process and distribute application layer data packets is 1ms.
[0192] The time for the actuator to receive data, process and transmit feedback data packets is 1ms, and the data being fed back is the current loop, position loop, etc. of the previous control cycle.
[0193] In Fig. 19:
[0194] △t1 PLC is the time when the PLC receives data, executes operations, and transmits data, and the execution cycle begins;
[0195] △t1 PLC_MS is the time that PLC data is transmitted to the MS via a wire;
[0196] △t1 MS_SLAVE is the wireless transmission time transmitted to the servo after the MS receives the data packet from the wired slave station and has elapsed wireless processing;
[0197] △t1 SLAVE is the execution time after the servo receives the PLC data packet + the time for the current loop and position loop to sample the data packet;
[0198] △t1 SLAVE_MS is the wireless transmission time when TS receives the servo's data packet and transmits it to the PLC after wireless processing;
[0199] △t1 MS_PLC is the time it takes for the servo's data packet to be transmitted from the MS to the PLC via the wire;
[0200] △t1 PLC is the time during which the PLC receives data, executes operations, and transmits data, and the execution cycle ends;
[0201] △t1 PLC_Send is the absolute time of PLC data packet transmission, and is year, month, day, hour, minute, second;
[0202] △t1 PLC_Receive is the absolute time of the servo data packet to the PLC, and is year, month, day, hour, minute, second;
[0203] △t1 PLC_Receive =△t1 PLC_Send +△t1 PLC +△t1 PLC_MS +△t1 MS_SLAVE +△t1 SLAVE +△t1 SLAVE_MS +△t1MS_PLC +△t1 PLC' am.
[0204] Referring to FIG. 20, FIG. 20 is a schematic diagram of the structure of a device in a hardware operating environment regarding an embodiment of the present application.
[0205] As illustrated in FIG. 20, the device may include a processor (1001) (e.g., a Central Processing Unit (CPU)), a communication bus (1002), a user interface (1003), a network interface (1004), and a storage device (1005). Here, the communication bus (1002) is configured to enable connection communication between these components. The user interface (1003) may include an input unit such as a display screen or a keyboard, and optionally, the user interface (1003) may further include a standard wired interface or a wireless interface. The network interface (1004) may optionally include a standard wired interface or a wireless interface (e.g., a Wireless-Fidelity (WI-FI) interface). The storage device (1005) may be a high-speed random access memory (RAM) storage device, or a stable non-volatile memory (NVM), for example, a magnetic disk storage device. The storage device (1005) may also be a storage device that is optionally independent of the aforementioned processor (1001).
[0206] If you are skilled in the relevant technical field, the structure illustrated in FIG. 20 does not constitute a limitation on the device, and may include more or fewer members, combine some members, or have different arrangements of members.
[0207] As illustrated in FIG. 20, a storage device (1005), which is a type of storage medium, may include an operating system, a data storage module, a network communication module, a user interface module, and a clock synchronization program.
[0208] In the device illustrated in FIG. 20, the network interface (1004) is configured to primarily perform data communication with other devices; the user interface (1003) is configured to primarily perform data interaction with the user; the processor (1001) and storage device (1005) of the device of the present application may be installed in the device, and the device calls a clock synchronization program stored in the storage device (1005) through the processor (1001) to execute the clock synchronization method provided in the embodiment of the present application.
[0209] An embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and the computer program implements steps of any embodiment of the clock synchronization method described above when run by a processor.
[0210] Since the embodiments of the computer-readable storage medium portion correspond to the embodiments of the method portion, the embodiments of the computer-readable storage medium portion refer to the description of the embodiments of the method portion, and redundant descriptions thereof are omitted.
[0211] In this document, the terms “comprising,” “comprising,” or any other variations thereof are intended to describe a process, method, object, or system comprising a series of elements that includes, by means of non-exclusive inclusion, not only including such elements but also other elements not explicitly listed, or further including elements unique to such process, method, object, or system. Without further limitation, an element limited by the phrase “one ......comprising” does not exclude the existence of a separate identical element in the process, method, object, or system comprising said element.
[0212] The numbers of the embodiments of the present application described above are for illustrative purposes only and do not represent the superiority or inferiority of the embodiments.
[0213] Through the above description of the implementation, a person skilled in the art will clearly understand that the method of the above-described embodiment can be realized by combining software with an essential general-purpose hardware platform, and of course, can also be realized through hardware, but in many cases, the former is a more desirable method of implementation. Based on this understanding, the technical solution of the present application, or parts that contribute to the existing technology, can be implemented in the form of a software product, and said computer software product is stored on a storage medium (e.g., ROM / RAM, magnetic disk, optical disk) as described above, and includes multiple instructions to enable a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to realize the method described in each embodiment of the present application.
[0214] The above description is merely an optional embodiment of the present application and does not limit the scope of the patent of the present application; any equivalent structure or equivalent flow transformation, or any direct or indirect operation in other related technical fields, performed using the specifications and attached drawings of the present application, is likewise included within the scope of protection of the present application.
Claims
Claim 1 A clock synchronization method, wherein the clock synchronization method is applied to a base station of a convergence control system, and the convergence control system further comprises a controller, an actuator, and a terminal device, wherein a first side of the controller is connected to the actuator via a wired connection method, and a second side is connected to the base station via a wired connection method, and the actuator is connected to the actuator or the base station via a wired connection method, and the terminal device is connected to the base station via a wireless connection method, and wherein the clock synchronization method comprises the steps of: selecting a master clock source within the base station as the clock synchronization source of the convergence control system; constructing a wired synchronization master clock message and a wireless interface synchronization master clock message according to the clock synchronization source; and transmitting the wired synchronization master clock message to a wired connection device and transmitting the wireless interface synchronization master clock message to a wireless connection device. Claim 2 A clock synchronization method according to claim 1, wherein the step of constructing a wired synchronization master clock message and a wireless interface synchronization master clock message according to the clock synchronization source comprises: distributing a clock signal corresponding to the clock synchronization source to a clock divider and a phase lock loop; frequency dividing the clock signal through the clock divider to generate a corresponding second pulse and time information; removing dithering from the clock signal through the phase lock loop to generate a master time stamp working clock; generating the wired synchronization master clock message according to the second pulse and the time information; and generating the wireless interface synchronization master clock message according to the master time stamp working clock, the second pulse, and the time information. Claim 3 A clock synchronization method according to claim 1, wherein the step of selecting a master clock source inside the base station as a clock synchronization source of the fusion control system comprises: a step of obtaining a wireless system design requirement of the fusion control system when the base station is a master base station and determining a determination oscillator frequency deviation index according to the wireless system design requirement; and a step of making a target determination oscillator selected according to the determination oscillator frequency deviation index the clock synchronization source. Claim 4 A clock synchronization method according to claim 1, comprising, prior to the step of selecting a master clock source inside the base station as a clock synchronization source of the fusion control system, a step of receiving a wired synchronization master clock message transmitted from the master base station when the base station is installed as a slave base station; and a step of executing a synchronization clock recovery operation according to the wired synchronization master clock message, wherein the step of selecting a master clock source inside the base station as a clock synchronization source of the fusion control system includes a step of using the recovered synchronization clock as the clock synchronization source. Claim 5 A clock synchronization method characterized by comprising: a step of, in any one of claims 1 to 4, after the step of transmitting the wired synchronization master clock message to a wired connection device and transmitting the wireless interface synchronization master clock message to a wireless connection device, a step of calculating the data distribution time period of the controller through a task control cycle parameter; and a step of transmitting timing information to the controller in the data distribution time period according to a second pulse corresponding to the clock synchronization source. Claim 6 A clock synchronization method, wherein the clock synchronization method is applied to a controller of a convergence control system, and the clock synchronization method comprises: receiving a wired synchronization master clock message transmitted from a base station; and executing a synchronization clock recovery operation according to the wired synchronization master clock message. Claim 7 A clock synchronization method characterized by including, in claim 6, a step of receiving timing information transmitted by the base station and processing a task within a prescribed time corresponding to the timing information, after the step of executing a synchronization clock recovery operation according to the wired synchronization master clock message. Claim 8 A clock synchronization method, wherein the clock synchronization method is applied to an actuator of a convergence control system, and the clock synchronization method comprises: receiving a wired synchronization master clock message transmitted from a base station or a controller; and executing a synchronization clock recovery operation according to the wired synchronization master clock message. Claim 9 A clock synchronization method, wherein the clock synchronization method is applied to a wireless connection device of a convergence control system, and the clock synchronization method comprises: receiving a wireless interface synchronization master clock message transmitted from a base station; acquiring a master time stamp operation clock associated with the wireless interface synchronization master clock message and a slave time stamp operation clock used locally; and executing a synchronization clock recovery operation according to the master time stamp operation clock and the slave time stamp operation clock. Claim 10 A clock synchronization method according to claim 9, comprising: a step of transmitting a delay message to a base station and determining the transmission time of the delay message prior to the step of executing a synchronization clock recovery operation according to the master time stamp operation clock and the slave time stamp operation clock; and a step of receiving the reception time at which the delay message transmitted by the base station is received; wherein the step of executing a synchronization clock recovery operation according to the master time stamp operation clock and the slave time stamp operation clock comprises the step of executing a synchronization clock recovery operation according to the master time stamp operation clock, the slave time stamp operation clock, and the transmission time and reception time of the delay message. Claim 11 A base station comprising a storage device, a processor, and a clock synchronization program stored on the storage device and operable on the processor, wherein the clock synchronization program is configured to implement the steps of a clock synchronization method of any one of claims 1 to 5. Claim 12 A controller comprising a storage device, a processor, and a clock synchronization program stored on the storage device and operable on the processor, wherein the clock synchronization program is configured to implement the steps of a clock synchronization method of any one of claims 6 to 7. Claim 13 An actuator comprising a storage device, a processor, and a clock synchronization program stored on the storage device and operable on the processor, wherein the clock synchronization program is configured to realize the steps of the clock synchronization method of claim 8. Claim 14 A wireless connection device comprising a storage device, a processor, and a clock synchronization program stored on the storage device and operable on the processor, wherein the clock synchronization program is configured to implement the steps of a clock synchronization method of any one of claims 9 to 10. Claim 15 A computer-readable storage medium, wherein a clock synchronization program is stored on the computer-readable storage medium, and the clock synchronization program implements the steps of a clock synchronization method of any one of claims 1 to 10 when executed by a processor.