Display device

Abstract

A display device according to one embodiment of the present invention comprises a display panel, a bottom chassis disposed below the display panel, and a circuit board disposed below the bottom chassis and electrically connected to the display panel. The circuit board comprises a circuit base layer, at least one circuit element disposed on the lower surface of the circuit base layer, and a printed layer disposed on the upper surface of the circuit base layer having an emissivity of 0.3 or less. The bottom chassis comprises an opening that overlaps with the at least one circuit element in a planar manner. Accordingly, degradation of the display panel included in the display device is prevented, and the display efficiency and lifespan of the display panel can be improved.

Description

Technology Field

[0001] The present invention relates to a display device, and more specifically, to a display device with improved display efficiency and lifespan. Background Technology

[0002] Display panels included in a display device can be classified into transmissive display panels that selectively transmit source light generated from a light source, and emissive display panels that generate source light within the display panel itself. To generate a color image, the display panel may include different types of light control patterns depending on the pixels. The light control patterns may transmit only a specific wavelength range of the source light or change the color of the source light. Some light control patterns may also change the characteristics of the light without changing the color of the source light.

[0003] Generally, a circuit board is connected to the display panel after the display panel is manufactured. For example, the Tape Automated Bonding (TAB) mounting method bonds the circuit board to the display panel using an anisotropic conductive film (ACF).

[0004] Recently, active research is being conducted on design proposals for display devices that effectively dissipate heat generated from the display panel or circuit board included in the display device, while simultaneously reducing the thickness of the display device. The problem to be solved

[0005] The present invention aims to provide a display device that can prevent thermal damage to the display panel while reducing the overall thickness of the display device. means of solving the problem

[0006] A display device according to one embodiment of the present invention comprises a display panel, a bottom chassis disposed below the display panel, and a circuit board electrically connected to the display panel and disposed below the bottom chassis, wherein the circuit board comprises a circuit base layer, at least one circuit element disposed on the lower surface of the circuit base layer, and a printing layer disposed on the upper surface of the circuit base layer having an emissivity of 0.3 or less, and the bottom chassis comprises an opening that overlaps with the at least one circuit element in a planar manner.

[0007] The planar area of ​​the opening is larger than the planar area of ​​the at least one circuit element, and the at least one circuit element can be fully superimposed on the opening.

[0008] The distance between one end of the bottom chassis defining the opening and one end of the at least one circuit element may be 5mm or more and 20mm or less.

[0009] The width of the opening in the first direction is greater than the width of the at least one circuit element in the first direction, and the width in the second direction intersecting the first direction of the opening may be greater than the width of the at least one circuit element in the second direction.

[0010] The above printed layer may include a white color.

[0011] The planar area of ​​the opening relative to the planar area of ​​the circuit base layer may be 0.8 or more and less than 1.

[0012] A display device according to one embodiment of the present invention may further include an insulating layer disposed below the bottom chassis and having an emissivity of 0.3 or less.

[0013] At least a portion of the above insulating layer may be placed inside the opening.

[0014] The above at least one circuit element includes a first sub-circuit element and a second sub-circuit element spaced apart from the first sub-circuit element, and the opening may overlap with each of the first sub-circuit element and the second sub-circuit element.

[0015] The above opening may include a first opening that overlaps the first sub-circuit element, and a second opening that overlaps the second sub-circuit element and is spaced apart from the first opening.

[0016] A display device according to one embodiment of the present invention further includes a connecting circuit board that electrically connects the display panel and the circuit board, and the connecting circuit board may be bent at a predetermined curvature.

[0017] A display device according to one embodiment of the present invention may further include a housing that accommodates the display panel and the circuit board, and a window disposed on the display panel.

[0018] The above display panel may include a light-emitting element that outputs source light, a light control layer disposed on the light-emitting element and comprising a plurality of light control patterns, and a color filter layer disposed on the light control layer and comprising a plurality of color filters.

[0019] The bottom chassis and the circuit board are spaced apart by a predetermined distance, and the distance may be 0.5 mm or more and 1 mm or less.

[0020] A display device according to one embodiment of the present invention may further include a heat dissipation layer disposed between the display panel and the bottom chassis.

[0021] A display device according to one embodiment of the present invention comprises a display module including a display panel and a bottom chassis, electrically connected to the display panel, a circuit base layer, at least one circuit element disposed on the lower surface of the circuit base layer, and a circuit board disposed on the upper surface of the circuit base layer and including a printing layer having an emissivity of 0.3 or less, and a radiant heat blocking layer disposed between the display module and the circuit base layer and having an emissivity of 0.3 or less, wherein the circuit base layer comprises a circuit portion on which at least one circuit element is disposed, and a peripheral portion that does not overlap with the circuit element, and the distance from the upper surface of the circuit portion to the lower surface of the display module is greater than the distance from the upper surface of at least some of the peripheral portions to the lower surface of the display module.

[0022] An opening is defined in the bottom chassis that overlaps with the circuit element in a planar plane, and the planar area of ​​the opening may be larger than the planar area of ​​the circuit element.

[0023] A display device according to one embodiment of the present invention comprises a display panel, a heat dissipation layer disposed below the display panel, a bottom chassis disposed below the heat dissipation layer and including an opening that exposes the lower surface of the heat dissipation layer, and a circuit board electrically connected to the display panel and disposed below the bottom chassis, wherein the circuit board comprises a circuit base layer, at least one circuit element disposed on the lower surface of the circuit base layer, and a printing layer disposed on the upper surface of the circuit base layer and having an emissivity of 0.3 or less.

[0024] A display device according to one embodiment of the present invention may further include an insulating layer disposed between the heat dissipation layer and the circuit board, having an emissivity of 0.3 or less.

[0025] In a display device according to one embodiment of the present invention, the printing layer may include a white color. Effects of the invention

[0026] According to a display device of one embodiment of the present invention, while the gap between the display module and the circuit board is reduced, radiant heat generated from circuit elements mounted on the circuit board is prevented from being transferred to the display panel, thereby preventing the deterioration of the display panel. Accordingly, the lifespan and display efficiency of the display panel can be improved. Brief explanation of the drawing

[0027] FIG. 1 is an exploded perspective view of a display device according to one embodiment of the present invention. FIGS. 2a and FIGS. 2b are each perspective views of some components included in a display device according to one embodiment of the present invention. FIG. 3 is a cross-sectional view of a display module according to one embodiment of the present invention. FIG. 4a is a plan view of a display panel according to one embodiment of the present invention. FIG. 4b is a cross-sectional view of a display panel according to one embodiment of the present invention. FIG. 4c is a cross-sectional view of a display panel according to one embodiment of the present invention. FIG. 5a is a cross-sectional view illustrating a part of the configuration of a display device according to one embodiment of the present invention. FIG. 5b is a plan view schematically illustrating a part of the configuration of a display device according to one embodiment of the present invention. FIG. 6a is a cross-sectional view illustrating a part of the configuration of a display device according to one embodiment of the present invention. FIG. 6b is a plan view schematically illustrating a part of the configuration of a display device according to one embodiment of the present invention. FIGS. 7a to 7c are each cross-sectional views illustrating a part of the configuration of a display device according to one embodiment of the present invention. FIGS. 8a and FIGS. 8b are graphs showing the front temperature of a display panel over time of a display device according to one embodiment of the present invention and a display device according to a comparative example, respectively. Specific details for implementing the invention

[0028] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0029] In this specification, where a component (or region, layer, part, etc.) is described as being "on," "connected," or "combined" with another component, it means that it may be directly connected / combined with the other component or that a third component may be placed between them.

[0030] Identical reference numerals denote identical components. Additionally, in the drawings, the thicknesses, proportions, and dimensions of the components are exaggerated for the effective illustration of the technical content. "And / or" includes all one or more combinations that the associated components may define.

[0031] Terms such as "first," "second," etc., may be used to describe various components, but said components should not be limited by said terms. These terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. A singular expression includes a plural expression unless the context clearly indicates otherwise.

[0032] Additionally, terms such as "below," "lower side," "above," and "upper side" are used to describe the relationships between the components depicted in the drawings. These terms are relative concepts and are described based on the directions indicated in the drawings.

[0033] Terms such as "include" or "have" are intended to indicate the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0034] In this specification, "directly placed" may mean that there are no additional layers, films, regions, plates, etc. between a part such as a layer, film, region, or plate and another part. For example, "directly placed" may mean placing two layers or two members without using additional members such as adhesive members between them.

[0035] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Furthermore, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an overly ideal or overly formal sense unless explicitly defined herein.

[0036] Hereinafter, a display panel according to one embodiment of the present invention and a method for manufacturing the same will be described with reference to the drawings.

[0037] FIG. 1 is an exploded perspective view of a display device according to one embodiment of the present invention.

[0038] In one embodiment, the display device (DD) may be a large display device such as a television, a monitor, or an external billboard. Additionally, the display device (DD) may be a display device used in small and medium-sized products such as a personal computer, a laptop computer, a personal digital terminal, a car navigation unit, a game console, a smartphone, a tablet, and a camera. Additionally, these are presented merely as embodiments and may be adopted as other display devices without departing from the concept of the present invention.

[0039] A display device (DD) of one embodiment may include a window (WM), a display module (DM), and a housing (HAU). The display module (DM) may include a display panel (DP, see FIG. 3) which is a display element. Meanwhile, although not shown in the drawings, the display device (DD) may include various elements that are activated according to an electrical signal, such as a touch element or a detection element, in addition to the display element.

[0040] Meanwhile, FIG. 1 and the drawings below illustrate the first direction (DR1) to the third direction (DR3), and the directions indicated by the first to third directions (DR1, DR2, DR3) described in this specification are relative concepts and can be converted to other directions.

[0041] For convenience of explanation in this specification, the third direction (DR3) is defined as the direction in which an image is provided to the user. Additionally, the first direction (DR1) and the second direction (DR2) are orthogonal to each other, and the third direction (DR3) may be a normal direction to the plane defined by the first direction (DR1) and the second direction (DR2). In FIG. 1, the plane defined by the first direction (DR1) and the second direction (DR2) may be a display surface in which an image is provided.

[0042] For convenience of explanation, the thickness direction of the display device (DD) in this specification is indicated by the third direction (DR3). The front (or top) and back (or bottom) surfaces of each layer or unit described below are distinguished by the third direction (DR3). Meanwhile, unless otherwise stated, the directions indicated by the first to third directions (DR1, DR2, DR3) in this specification may mean all directions parallel to each of the respective directions.

[0043] Although omitted in FIG. 1, a circuit board (MPCB, see FIG. 2a) to be described later is electrically connected to the display module (DM). A detailed description of the display module (DM) and the circuit board (MPCB) will be provided later.

[0044] In a display device (DD) of one embodiment, a window (WM) may be disposed on a display module (DM). The window (WM) may be made of a material including glass, sapphire, or plastic. The window (WM) includes a transparent area (TA) that transmits an image provided from the display module (DM) and a light-blocking area (BA) adjacent to the transparent area (TA) and through which the image is not transmitted. Meanwhile, unlike as shown in FIG. 1, the window (WM) may be omitted in a display device (DD) of one embodiment.

[0045] In a display device (DD) of one embodiment, a display module (DM) may be positioned below a window (WM). The display module (DM) may include a display panel (DP, see FIG. 3) and an optical structure layer (OSL, see FIG. 3), etc., which will be described later.

[0046] On a plane, one side of the display module (DM) where the image is displayed is defined as the display surface. The display surface includes a display area (DM-DA) where the image is displayed and a non-display area (DM-NDA) where the image is not displayed. The display area (DM-DA) is defined at the center of the display module (DM) on the plane and can overlap with the transparent area (TA) of the window (WM).

[0047] The housing (HAU) may be positioned below the display module (DM) to house the display module (DM). The housing (HAU) may be positioned to cover the display panel (DP) so that the upper surface, which is the display surface of the display panel (DP), is exposed. The housing (HAU) may cover the side and bottom surfaces of the display panel (DP) and expose the entire upper surface of the display panel (DP).

[0048] FIGS. 2a and FIGS. 2b are each perspective views of some components included in a display device according to an embodiment of the present invention. FIGS. 2a and FIGS. 2b illustrate a configuration in which a display module (DM) and a circuit board (MPCB) are electrically connected. FIGS. 2a illustrates the state before the connecting circuit board (FPCB) connecting the display module (DM) and the circuit board (MPCB) is bent, and FIGS. 2b illustrates the state after the connecting circuit board (FPCB) connecting the display module (DM) and the circuit board (MPCB) is bent.

[0049] At least one circuit element (TE) may be mounted on the circuit board (MPCB). The circuit element (TE) receives image data and control signals from an external graphic control unit (not shown). The circuit element (TE) may provide control signals and driving signals, etc., to the display module (DM). Multiple circuit elements (TE) may be provided. Although FIG. 2a illustrates an example in which four circuit elements (TE) are mounted on the circuit board (MPCB), it is not limited thereto, and two or three circuit elements (TE) may be mounted on the circuit board (MPCB), or five or more circuit elements (TE) may be mounted.

[0050] The connection circuit board (FPCB) can be electrically connected to the display module (DM) and the circuit board (MPCB), respectively. The connection circuit board (FPCB) can transmit a signal from the circuit board (MPCB) to the driving circuit and transmit a signal from the driving circuit to the display module (DM). In this embodiment, the driving circuit may be a data driving circuit. The driving circuit may be mounted on the connection circuit board (FPCB). However, it is not limited thereto, and the driving circuit may be mounted on the circuit board (MPCB) or on the display module (DM).

[0051] In one embodiment of the present invention, a connection circuit board (FPCB) can transmit a signal from a circuit element (TE) to a display module (DM). The connection circuit board (FPCB) can be connected to the display module (DM) and the circuit board (MPCB), respectively, by a conductive adhesive member. The conductive adhesive member may include an anisotropic conductive film.

[0052] The FPCB may include a flexible material. The FPCB may be bent to a predetermined curvature, and accordingly, the circuit board (MPCB) may be placed below the display module (DM). When the display module (DM), to which the circuit board (MPCB) is electrically connected, is mounted inside the housing (HAU, see FIG. 1) of the display device (DD, see FIG. 1), the circuit board (MPCB) may be mounted in a state where it is placed below the display module (DM), as shown in FIG. 2b. The following description will be based on the state in which the FPCB is bent as shown in FIG. 2b.

[0053] FIG. 3 is a cross-sectional view of a display module according to an embodiment of the present invention. FIG. 3 shows a cross-section along the II' cutting line shown in FIG. 2a.

[0054] As illustrated in FIG. 3, a display module (DM) according to one embodiment of the present invention may include a display panel (DP) and a lower member (LM). The lower member (LM) may be disposed below the display panel (DP). The lower member (LM) may be disposed below the base layer (BL) of the display panel (DP).

[0055] As shown in FIG. 3, the display panel (DP) includes a base layer (BL), a circuit element layer (DP-CL), a display element layer (DP-LED), and an optical structure layer (OSL).

[0056] The base layer (BL) may include a synthetic resin substrate or a glass substrate. The circuit element layer (DP-CL) includes at least one insulating layer and a circuit element. The circuit element includes signal lines, pixel driving circuits, etc. The circuit element layer (DP-CL) may be formed through a process of forming an insulating layer, a semiconductor layer, and a conductive layer by coating, deposition, etc., and a patterning process of an insulating layer, a semiconductor layer, and a conductive layer by photolithography. The display element layer (DP-LED) includes at least a display element. The optical structure layer (OSL) can convert the color of light provided from the display element. The optical structure layer (OSL) includes a light control pattern and a structure for increasing the light conversion efficiency. Each component included in the display panel (DP) will be described in more detail below in FIGS. 4a to 4c.

[0057] A lower member (LM) is disposed below the display panel (DP), and the lower member (LM) may include a heat dissipation layer (HDL) and a bottom chassis (BC).

[0058] The heat dissipation layer (HDL) can dissipate heat generated from the display panel (DP) to the outside. The heat dissipation layer (HDL) can have substantially the same shape as the display panel (DP) and can have substantially the same area as the display panel (DP).

[0059] The heat dissipation layer (HDL) may include a material with relatively high thermal conductivity, such as a tungsten-copper composite, a molybdenum-copper composite, or graphite. The heat dissipation layer (HDL) may have a porous structure. In this embodiment, the heat dissipation layer (HDL) may include a graphite layer. The thickness of the graphite layer may be, for example, 1 mm or more and 20 mm or less.

[0060] Although not illustrated, the heat dissipation layer (HDL) may be bonded to the lower surface of the display panel (DP) through a separate adhesive layer. The adhesive layer may include, for example, a pressure-sensitive adhesive layer, but is not limited thereto.

[0061] Although not illustrated, the heat dissipation layer (HDL) may further include a protective layer that protects and seals the graphite layer. The protective layer is positioned above and below the graphite layer included in the heat dissipation layer (HDL) to prevent particles of the graphite layer from being released to the outside and contaminating the display panel (DP), etc., and to protect the graphite layer from external impact. In one embodiment, the heat dissipation layer (HDL) may be omitted. If the heat dissipation layer (HDL) is omitted, the bottom chassis (BC) may be placed directly below the base layer (BL).

[0062] The bottom chassis (BC) is positioned below the heat dissipation layer (HDL) to support the heat dissipation layer (HDL) and the display panel (DP) positioned above it. The bottom chassis (BC) may have a certain rigidity and may be configured to prevent the shape of the components positioned above the bottom chassis (BC) from being deformed. The bottom chassis (BC) may include a metal plate or a plastic plate. For example, the bottom chassis (BC) may include stainless steel, aluminum, or an alloy thereof. For example, the bottom chassis (BC) may include SUS304. Alternatively, the bottom chassis (BC) may include polyethylene terephthalate (PET) or polyimide (Pl), etc. The strength of the bottom chassis (BC) may be greater than the strength of the display panel (DP).

[0063] A predetermined opening (BC-OP, FIG. 5a) may be defined in the bottom chassis (BC) to improve heat dissipation characteristics. The predetermined opening (BC-OP, FIG. 5a) defined in the bottom chassis (BC) will be described later.

[0064] FIG. 4a is a plan view of a display panel according to an embodiment of the present invention. FIG. 4b is a cross-sectional view of a display panel according to an embodiment of the present invention. FIG. 4c is a cross-sectional view of a display panel according to an embodiment of the present invention.

[0065] FIG. 4a illustrates the planar arrangement relationship of signal lines (GL1~GLn, DL1~DLm) and pixels (PX11~PXnm) in a display panel (DP) of one embodiment. The signal lines (GL1~GLn, DL1~DLm) may include a plurality of gate lines (GL1~GLn) and a plurality of data lines (DL1~DLm).

[0066] Each of the pixels (PX11~PXnm) is connected to a corresponding gate line among a plurality of gate lines (GL1~GLn) and a corresponding data line among a plurality of data lines (DL1~DLm). Each of the pixels (PX11~PXnm) may include a pixel driving circuit and a display element. Depending on the configuration of the pixel driving circuit of the pixels (PX11~PXnm), more types of signal lines may be provided on the display panel (DP).

[0067] In FIG. 4a, matrix-shaped pixels (PX11–PXnm) are illustrated as an example, but are not limited thereto. The pixels (PX11–PXnm) are Pentile ® It can be arranged in the form of a diamond. For example, the points where pixels (PX11~PXnm) are arranged may correspond to the vertices of a diamond. The gate driver circuit (GDC) can be integrated into a display panel (DP) through an oxide silicon gate driver circuit (OSG) or amorphose silicon gate driver circuit (ASG) process.

[0068] Referring to FIG. 4b, the circuit element layer (DP-CL) may include a transistor (TD) as a circuit element. The configuration of the circuit element layer (DP-CL) may vary depending on the design of the driving circuit of the pixels (PX11~PXnm, see FIG. 4a), and FIG. 4b illustrates an example of a single transistor (TD). An example of the arrangement relationship of the active (AD), source (SD), drain (DD), and gate (GD) constituting the transistor (TD) is illustrated. The active (AD), source (SD), and drain (DD) may be regions distinguished according to the doping concentration or conductivity of the semiconductor pattern.

[0069] The circuit element layer (DP-CL) may include a lower buffer layer (BRL), a first insulating layer (10), a second insulating layer (20), and a third insulating layer (30) disposed on a base layer (BL). For example, the lower buffer layer (BRL), the first insulating layer (10), and the second insulating layer (20) may be inorganic layers, and the third insulating layer (30) may be an organic layer.

[0070] The display element layer (DP-LED) may include a light-emitting element (OLED) as a display element. The light-emitting element (OLED) may generate the source light described above. The light-emitting element (OLED) includes a first electrode (AE), a second electrode (CE), and a light-emitting layer (EML) disposed between them. In this embodiment, the display element layer (DP-LED) may include an organic light-emitting diode as a light-emitting element. In one embodiment of the present invention, the light-emitting element may include a quantum dot light-emitting diode. That is, the light-emitting layer (EML) included in the light-emitting element (OLED) may include an organic light-emitting material as a light-emitting material, or the light-emitting layer (EML) may include quantum dots as a light-emitting material. Alternatively, in this embodiment, the display element layer (DP-LED) may include a micro-light-emitting element as a light-emitting element. The micro-light-emitting element may include, for example, a micro-LED element and / or a nano-LED element. The length and width of the micro-light-emitting element may be between several hundred nanometers and several hundred micrometers.

[0071] The display element layer (DP-LED) includes a pixel defining layer (PDL). For example, the pixel defining layer (PDL) may be an organic layer. At least a portion of the light-emitting element (OLED) may be disposed within an opening defined in the pixel defining layer (PDL).

[0072] A first electrode (AE) is disposed on the third insulating layer (30). The first electrode (AE) can be connected directly or indirectly to a transistor (TD), and the connection structure between the first electrode (AE) and the transistor (TD) is not shown in FIG. 4b. A first opening (OP1) is defined in the pixel defining film (PDL). The first opening (OP1) of the pixel defining film (PDL) exposes at least a portion of the first electrode (AE). In this embodiment, the first opening (OP1) defines a pixel region (PXA-R).

[0073] The hole control layer (HCL), the light-emitting layer (EML), and the electronic control layer (ECL) overlap at least the pixel region (PXA-R). The hole control layer (HCL), the light-emitting layer (EML), the electronic control layer (ECL), and the second electrode (CE) may be commonly disposed in the first to third pixel regions (PXA-R, PXA-G, PXA-B, FIG. 4c). Each of the hole control layer (HCL), the light-emitting layer (EML), the electronic control layer (ECL), and the second electrode (CE) overlapping the first to third pixel regions (PXA-R, PXA-G, PXA-B) may have a single shape. However, not limited thereto, at least one of the hole control layer (HCL), the light-emitting layer (EML), and the electronic control layer (ECL) may be formed separately for each of the first to third pixel regions (PXA-R, PXA-G, PXA-B).

[0074] The hole control layer (HCL) includes a hole transport layer and may further include a hole injection layer. The emission layer (EML) can generate blue light, which is source light. The blue light may include light with a wavelength of 410 nm to 480 nm. The emission spectrum of the blue light may have a maximum peak within 440 nm to 460 nm. The electron control layer (ECL) includes an electron transport layer and may further include an electron injection layer.

[0075] The display element layer (DP-LED) may include a first encapsulation layer (TFE1) that protects the second electrode (CE). The first encapsulation layer (TFE1) may include an organic material or an inorganic material. The first encapsulation layer (TFE1) may have a multilayer structure in which an inorganic layer and an organic layer are repeated. In this embodiment, the first encapsulation layer (TFE1) may include a first encapsulation inorganic layer (IOL1), an encapsulation organic layer (OL), and a second encapsulation inorganic layer (IOL2). The first and second encapsulation inorganic layers (IOL1 / IOL2) protect the light-emitting element (OLED) from external moisture, and the encapsulation organic layer (OL) can prevent defects in the light-emitting element (OLED) caused by foreign substances introduced during the manufacturing process. Although not shown, the display panel (DP) may further include a refractive index control layer on the upper side of the first encapsulation layer (TFE1) to improve light emission efficiency.

[0076] As illustrated in FIG. 4b, an optical structure layer (OSL) is disposed on a first encapsulation layer (TFE1). The optical structure layer (OSL) includes a bank (BK), a first light control pattern (CCF-R), a second encapsulation layer (TFE2), a first color filter (CF-R), a light blocking pattern (BM), and an overcoat layer (OC).

[0077] The bank (BK) may include a base resin and additives. The base resin may consist of various resin compositions that may generally be referred to as binders. The additives may include coupling agents and / or photoinitiators. The additives may further include dispersants.

[0078] Bank (BK) may include a black coloring agent for light blocking. Bank (BK) may include a black dye or a black pigment mixed into a base resin. In one embodiment, the black coloring agent may include carbon black, or a metal such as chromium or an oxide thereof.

[0079] Bank (BK) includes a second opening (OP2) corresponding to a first opening (OP1). In a plane, the second opening (OP2) overlaps the first opening (OP1) and has a larger area than the first opening (OP1).

[0080] A first light control pattern (CCF-R) is disposed inside the second opening (OP2). The first light control pattern (CCF-R) can change the optical properties of the source light. The first light control pattern (CCF-R) may include quantum dots for changing the optical properties of the source light.

[0081] The first light control pattern (CCF-R) may include a quantum dot that converts source light into light of a different wavelength. In the first light control pattern (CCF-R) superimposed on the first pixel area (PXA-R, FIG. 4a), the quantum dot may convert blue light, which is the source light, into red light.

[0082] Quantum dots may have a core-shell structure, and the core of the quantum dot may be selected from group II-VI compounds, group III-VI compounds, group I-III-VI compounds, group III-V compounds, group IV-VI compounds, group IV elements, group IV compounds, and combinations thereof.

[0083] Group II-VI compounds are diatomic compounds selected from the group consisting of CdSe, CdTe, CdS, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS, and mixtures thereof; ternary compounds selected from the group consisting of CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, MgZnS, and mixtures thereof; and may be selected from the group consisting of four-element compounds selected from the group consisting of HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe and mixtures thereof.

[0084] Group III-VI compounds include binary compounds such as In2S3 and In2Se3, and InGaS 3 It may include ternary compounds such as InGaSe3, or any combination thereof.

[0085] Group I-III-VI compounds are ternary compounds selected from the group consisting of AgInS, AgInS2, CuInS, CuInS2, AgGaS2, CuGaS2CuGaO2, AgGaO2, AgAlO2, and mixtures thereof, or AgInGaS2, It can be selected from four-element compounds such as CuInGaS2.

[0086] III-V group compounds may be selected from the group consisting of diatomic compounds selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, and mixtures thereof; ternary compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InAlP, InNP, InNAs, InNSb, InPAs, InPSb, and mixtures thereof; and quaternary compounds selected from the group consisting of GaAlNP, GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb, and mixtures thereof. Meanwhile, III-V group compounds may further include a group II metal. For example, III-II-V group compounds may include InZnP, InGaZnP, InAlZnP, etc.

[0087] Group IV-VI compounds may be selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe, and mixtures thereof; ternary compounds selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, and mixtures thereof; and quaternary compounds selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, and mixtures thereof. Group IV elements may be selected from the group consisting of Si, Ge, and mixtures thereof. Group IV compounds may be ternary compounds selected from the group consisting of SiC, SiGe, and mixtures thereof.

[0088] In this case, the binary, ternary, or quaternary compounds may exist within the particle at a uniform concentration, or they may exist within the same particle with their concentration distributions partially divided into different states. Additionally, they may have a core-shell structure in which one quantum dot surrounds another. In a core-shell structure, the concentration of the element in the shell may have a concentration gradient, decreasing as it approaches the core.

[0089] In some embodiments, the quantum dot may have a core-shell structure comprising a core containing the aforementioned nanocrystal and a shell surrounding the core. The shell of the quantum dot may serve as a protective layer to maintain semiconductor properties by preventing chemical degradation of the core and / or as a charging layer to impart electrophoretic properties to the quantum dot. The shell may be a single layer or a multilayer. Examples of the shell of the quantum dot include oxides of metals or non-metals, semiconductor compounds, or combinations thereof.

[0090] For example, the oxide of the metal or nonmetal mentioned above may be exemplified as a binary compound such as SiO2, Al2O3, TiO2, ZnO, MnO, Mn2O3, Mn3O4, CuO, FeO, Fe2O3, Fe3O4, CoO, Co3O4, NiO, or a ternary compound such as MgAl2O4, CoFe2O4, NiFe2O4, CoMn2O4, but the present invention is not limited thereto.

[0091] In addition, the above semiconductor compounds may be examples of CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, AlSb, etc., but the present invention is not limited thereto.

[0092] Quantum dots can have a full width of half maximum (FWHM) of the emission wavelength spectrum of about 45 nm or less, preferably about 40 nm or less, and more preferably about 30 nm or less, and color purity or color reproducibility can be improved in this range. In addition, since the light emitted through these quantum dots is emitted in all directions, the viewing angle can be improved.

[0093] In addition, the shape of the quantum dots is not specifically limited to shapes commonly used in the field, but more specifically, shapes such as spherical, pyramidal, multi-arm, or cubic nanoparticles, nanotubes, nanowires, nanofibers, and nanoplate particles may be used.

[0094] Quantum dots can control the color of the light they emit depending on their particle size, and accordingly, the quantum dots can have various emission colors such as blue, red, and green. In one embodiment, the quantum dots included in the first light control pattern (CCF-R) superimposed on the first pixel area (PXA-R, FIG. 4B) may have a red emission color. The smaller the particle size of the quantum dots, the more they may emit light in the short wavelength region. For example, among quantum dots having the same core, the particle size of a quantum dot emitting green light may be smaller than the particle size of a quantum dot emitting red light. Additionally, among quantum dots having the same core, the particle size of a quantum dot emitting blue light may be smaller than the particle size of a quantum dot emitting green light. However, the embodiments are not limited thereto, and even among quantum dots having the same core, the particle size may be controlled depending on the shell forming material and shell thickness, etc.

[0095] Meanwhile, if quantum dots have various emission colors such as blue, red, and green, the quantum dots with different emission colors may have different core materials.

[0096] The first light control pattern (CCF-R) may further include a scatterer. The first light control pattern (CCF-R) may include a quantum dot that converts blue light into red light and a scatterer that scatters light.

[0097] The scattering material may be an inorganic particle. For example, the scattering material may comprise at least one of TiO2, ZnO, Al2O3, SiO2, and hollow silica. The scattering material may comprise any one of TiO2, ZnO, Al2O3, SiO2, and hollow silica, or it may be a mixture of two or more materials selected from TiO2, ZnO, Al2O3, SiO2, and hollow silica.

[0098] The first light control pattern (CCF-R) may include a base resin that disperses quantum dots and scatterers. The base resin serves as a medium in which quantum dots and scatterers are dispersed and may consist of various resin compositions that can generally be referred to as binders. For example, the base resin may be an acrylic resin, a urethane resin, a silicone resin, an epoxy resin, etc. The base resin may be a transparent resin.

[0099] In this embodiment, the first light control pattern (CCF-R) can be formed by an inkjet process. A liquid composition is provided within the second opening (OP2). The composition, polymerized by a thermal curing process or a photocuring process, has a reduced volume after curing.

[0100] A step difference may occur between the upper surface of the bank (BK) and the upper surface of the first light control pattern (CCF-R). That is, the upper surface of the bank (BK) may be defined as higher than the upper surface of the first light control pattern (CCF-R). The height difference between the upper surface of the bank (BK) and the upper surface of the first light control pattern (CCF-R) may be, for example, about 2 μm to about 3 μm.

[0101] A second encapsulation layer (TFE2) is disposed on the bank (BK) and the first light control pattern (CCF-R), with at least a portion overlapping the first light control pattern (CCF-R). The second encapsulation layer (TFE2) may include a first inorganic encapsulation layer (IOL1-1), an organic encapsulation layer (OL-1), and a second inorganic encapsulation layer (IOL2-1). In FIG. 4b, the second encapsulation layer (TFE2) is exemplarily illustrated as including one organic encapsulation layer (OL-1) and two inorganic encapsulation layers (IOL1-1, IOL2-1), but is not limited thereto, and at least one of the two inorganic encapsulation layers (IOL1-1, IOL2-1) may be omitted. Additionally, the organic encapsulation layer (OL-1) and the inorganic encapsulation layers (IOL1-1, IOL2-1) may be provided in a greater number than shown in FIG. 4b.

[0102] The inorganic encapsulation layer (IOL1-1, IOL2-1) protects the first light control pattern (CCF-R) from external moisture, and the organic encapsulation layer (OL-1) eliminates the steps defined by the bank (BK) and the first light control pattern (CCF-R) and provides a flat base surface to the member to be placed on the upper side. The inorganic encapsulation layer (IOL1-1, IOL2-1) may include one or more of silicon oxide, silicon oxynitride, and silicon nitride. The organic encapsulation layer (OL-1) may include an organic material, such as an acrylic organic material.

[0103] A first color filter (CF-R) is disposed on the second encapsulation layer (TFE2). The first color filter (CF-R) transmits light within a specific wavelength range and blocks light outside that wavelength range. The first color filter (CF-R) in the first pixel area (PXA-R) can transmit red light and block green and blue light.

[0104] The first color filter (CF-R) comprises a base resin and a dye and / or pigment dispersed in the base resin. The base resin is a medium in which the dye and / or pigment is dispersed and may consist of various resin compositions that can generally be referred to as a binder.

[0105] The first color filter (CF-R), which is placed on a flat surface with the step difference removed by the organic encapsulation layer (OL-1), can have a uniform thickness within the first pixel area (PXA-R). Light converted from blue source light to red light through the first light control pattern (CCF-R) can be provided externally with uniform brightness within the first pixel area (PXA-R).

[0106] A light-blocking pattern (BM) may be placed between the color filters placed in each pixel. The light-blocking pattern (BM) may be placed to overlap with the surrounding area (NPXA). The material constituting the light-blocking pattern (BM) is not particularly limited as long as it is a material that absorbs light. The light-blocking pattern (BM) is a layer having a black color, and in one embodiment, the light-blocking pattern (BM) may include a black coloring agent. The black coloring agent may include a black dye or a black pigment. The black coloring agent may include carbon black, a metal such as chromium, or oxides thereof. Alternatively, the light-blocking pattern (BM) may have a form in which a plurality of different color filters are stacked. The light-blocking pattern (BM) may block light by stacking two or more color filters that absorb light of different wavelengths.

[0107] An overcoat layer (OC) is disposed on the first color filter (CF-R). The overcoat layer (OC) may be an organic layer that protects the first color filter (CF-R). The overcoat layer (OC) may include a photocurable organic material or a thermocurable organic material. However, it is not limited thereto, and the overcoat layer (OC) may include an inorganic material.

[0108] The overcoat layer (OC) may cover the first color filter (CF-R) and flatten the upper surface of the first color filter (CF-R). In one embodiment, a protective glass substrate may be further disposed on the overcoat layer (OC), and an adhesive layer may be disposed between the overcoat layer (OC) and the glass substrate.

[0109] Referring to FIG. 4c, the display element layer (DP-LED) may include a light-emitting element (OLED) as a display element. The light-emitting element (OLED) may generate the source light described above and may include a light-emitting layer (EML, FIG. 4b) arranged to overlap overall over the first pixel area (PXA-R), the second pixel area (PXA-G), and the third pixel area (PXA-B). The light-emitting element (OLED) may overlap at least each of the first pixel area (PXA-R), the second pixel area (PXA-G), and the third pixel area (PXA-B).

[0110] The light control layer (CCL) includes the aforementioned bank (BK) and a plurality of light control patterns (CCF-R, CCF-G, SCP) disposed in a second aperture (OP2, FIG. 4b) defined in the bank (BK). The light control patterns (CCF-R, CCF-G, SCP) may include a first light control pattern (CCF-R) superimposed on a first pixel area (PXA-R), a second light control pattern (CCF-G) superimposed on a second pixel area (PXA-G), and a third light control pattern (SCP) superimposed on a third pixel area (PXA-B). Meanwhile, the third light control pattern (SCP) may be referred to as a transmission pattern.

[0111] A plurality of light control patterns (CCF-R, CCF-G, SCP) are placed within a second aperture (OP2, FIG. 4b) defined in a bank (BK), and at least some of the plurality of light control patterns (CCF-R, CCF-G, SCP) can change the optical properties of the source light.

[0112] In one embodiment, the first light control pattern (CCF-R) can convert blue light, which is the source light, into red light. The second light control pattern (CCF-G) can convert blue light, which is the source light, into green light. The transmission pattern (SCP) may transmit blue light, which is the source light. Meanwhile, in this specification, blue light may include light with a wavelength of 410 nm to 480 nm, red light may include light with a wavelength of 620 nm to 750 nm, and green light may include light with a wavelength of 500 nm to 570 nm.

[0113] The first light control pattern (CCF-R) and the second light control pattern (CCF-G) may include the aforementioned quantum dots and scatterers, and the transmission pattern (SCP) may include only scatterers without including quantum dots. The quantum dots included in the first light control pattern (CCF-R) may be particles that convert blue light, which is the source light, into red light, and the quantum dots included in the second light control pattern (CCF-G) may be particles that convert blue light, which is the source light, into green light.

[0114] A second encapsulation layer (TFE2) is disposed on the bank (BK) and a plurality of light control patterns (CCF-R, CCF-G, SCP). The second encapsulation layer (TFE2) may include the aforementioned organic encapsulation layer and inorganic encapsulation layer.

[0115] A color filter layer (CFL) is disposed on the second encapsulation layer (TFE2). The color filter layer (CFL) may include a plurality of color filters (CF-R, CF-G, CF-B) and an overcoat layer (OC) covering the plurality of color filters (CF-R, CF-G, CF-B). Each of the plurality of color filters (CF-R, CF-G, CF-B) transmits light within a specific wavelength range and blocks light outside that wavelength range. The first color filter (CF-R) superimposed on the first pixel area (PXA-R) can transmit red light and block green and blue light. The second color filter (CF-G) superimposed on the second pixel area (PXA-G) can transmit green light and block red and blue light. A third color filter (CF-B) superimposed on a third pixel area (PXA-B) can transmit blue light and block green and red light. A plurality of color filters (CF-R, CF-G, CF-B) comprise a base resin and a dye and / or pigment dispersed in the base resin. The base resin is a medium in which the dye and / or pigment is dispersed and may consist of various resin compositions that can generally be referred to as a binder.

[0116] The overcoat layer (OC) may be an organic layer that protects a plurality of color filters (CF-R, CF-G, CF-B). The overcoat layer (OC) may include a photocurable organic material or a thermocurable organic material. However, it is not limited thereto, and the overcoat layer (OC) may include an inorganic material.

[0117] FIG. 5a is a cross-sectional view illustrating a part of the configuration of a display device according to an embodiment of the present invention. FIG. 5b is a plan view schematically illustrating a part of the configuration of a display device according to an embodiment of the present invention. FIG. 5a shows a cross-section along the II-II' cutting line shown in FIG. 2b, and among the components included in the display module (DM) shown in FIG. 3, only the base layer (BL), heat dissipation layer (HDL), and bottom chassis (BC) are shown, and the components placed on the top are omitted and not shown. FIG. 5b shows the planar arrangement relationship between the bottom chassis (BC) and the circuit element (TE) shown in FIG. 5a.

[0118] Referring to FIGS. 5a and 5b, a display module (DM) of one embodiment may include a heat dissipation layer (HDL) disposed below a base layer (BL) of a display panel (DP, see FIG. 3) and a bottom chassis (BC) disposed below the heat dissipation layer (HDL). An opening (BC-OP) may be defined in the bottom chassis (BC).

[0119] As described above, as the connection circuit board (FPCB, FIG. 2b) is bent, the circuit board (MPCB) is placed below the display module (DM). The circuit board (MPCB) may include a circuit element (TE) and a circuit base layer (PBL) on which the circuit element (TE) is mounted. The circuit base layer (PBL) includes an upper surface adjacent to the display module (DM) and a lower surface spaced apart from the display module (DM), and the circuit element (TE) may be placed on the lower surface of the circuit base layer (PBL). The circuit element (TE) may be spaced apart from the display module (DM) with the circuit base layer (PBL) in between.

[0120] An opening (BC-OP) defined in the bottom chassis (BC) overlaps with the circuit element (TE) in a plane. In the bottom chassis (BC), the opening (BC-OP) may be provided with a width greater than the plane width of the circuit element (TE). The opening (BC-OP) may be formed to overlap the circuit element (TE) in a plane. Since the opening (BC-OP) has a plane width greater than that of the circuit element (TE), one side of the bottom chassis (BC) defining the opening (BC-OP) may be positioned outward relative to one side of the circuit element (TE). In one embodiment, a first distance (d1) between one side of the bottom chassis (BC) defining the opening (BC-OP) and one side of the circuit element (TE) may be about 5 mm or more and about 20 mm or less. The first distance (d1) may be, for example, about 5 mm or more and about 10 mm or less.

[0121] As an opening (BC-OP) is provided in the bottom chassis (BC), a predetermined internal space (SP) may be defined within the opening (BC-OP). Additionally, the lower surface of the heat dissipation layer (HDL) may be exposed to the outside through the opening (BC-OP). If the heat dissipation layer (HDL) is omitted, the lower surface of the base layer (BL) may be exposed through the opening (BC-OP).

[0122] As an opening (BC-OP) is provided in the bottom chassis (BC), the distance to the circuit board (MPCB) may differ between the part of the display module (DM) where the opening (BC-OP) is provided and the part where the opening (BC-OP) is not provided.

[0123] In the circuit base layer (PBL) included in the circuit board (MPCB), the portion where the circuit element (TE) is placed may be referred to as the circuit portion (PBL-1), and the portion where the circuit element (TE) is not placed may be referred to as the peripheral portion (PBL-2). In one embodiment, a portion of the peripheral portion (PBL-2) overlaps with the portion where the opening (BC-OP) is not provided, and the distance from the upper surface of the peripheral portion (PBL-2) to the display module (DM) may be referred to as the first gap (GP1). The circuit portion (PBL-1) overlaps with the opening (BC-OP) in a plane, and the distance from the upper surface of the circuit portion (PBL-1) to the display module (DM) may be the second gap (GP2).

[0124] The first gap (GP1) may be approximately 0.5 mm or more and approximately 1 mm or less. The first gap (GP1) may be the minimum distance from the upper surface of the circuit base layer (PBL) to the lower surface of the bottom chassis (BC). The first gap (GP1) may be referred to as the gap between the display module (DM) and the circuit board (MPCB).

[0125] The second gap (GP2) has a larger value than the first gap (GP1). The difference between the second gap (GP2) and the first gap (GP1) may be substantially equal to the thickness of the bottom chassis (BC). The second gap (GP2) may be the minimum distance from the upper surface of the circuit base layer (PBL) to the lower surface of the heat dissipation layer (HDL).

[0126] A circuit element (TE) may include a plurality of sub-circuit elements. A circuit element (TE) may include a first sub-circuit element (TE1) and a second sub-circuit element (TE2) spaced apart from the first sub-circuit element (TE1).

[0127] An opening (BC-OP) corresponding to each of a plurality of sub-circuit elements may be provided in the bottom chassis (BC). The opening (BC-OP) defined in the bottom chassis (BC) may include a first opening (BC-OP1) that overlaps with a first sub-circuit element (TE1) and a second opening (BC-OP2) that overlaps with a second sub-circuit element (TE2). The first opening (BC-OP1) may have a planar width greater than that of the first sub-circuit element (TE1). The second opening (BC-OP2) may have a planar width greater than that of the second sub-circuit element (TE2). A predetermined internal space (SP) is defined inside each of the first opening (BC-OP1) and the second opening (BC-OP2), and the lower surface of the heat dissipation layer (HDL) may be exposed by each of the first opening (BC-OP1) and the second opening (BC-OP2).

[0128] Referring to FIG. 5b, the first opening (BC-OP1) has a larger area than the first sub-circuit element (TE1) in a planar plane, and the first sub-circuit element (TE1) can be arranged so that its border is enclosed by the first opening (BC-OP1) in a planar plane. That is, the first sub-circuit element (TE1) can be fully superimposed on the first opening (BC-OP1) in a planar plane.

[0129] In one embodiment, the opening (BC-OP) and the circuit element (TE) may each have a rectangular shape extending in the first direction (DR1) and the second direction (DR2), respectively. The opening (BC-OP) may have a greater width than the circuit element (TE) in the first direction (DR1) and the second direction (DR2), respectively.

[0130] In one embodiment, the distance between the sides of the bottom chassis (BC) defining the first opening (BC-OP1) and the sides of the first sub-circuit element (TE1) may be about 5 mm or more and about 20 mm or less. For example, the distance (d1) between the sides of the bottom chassis (BC) spaced apart along the second direction (DR2) and the sides of the first sub-circuit element (TE1) may be about 5 mm or more and about 20 mm or less. Additionally, the distance (d2) between the sides of the bottom chassis (BC) spaced apart along the first direction (DR1) and the sides of the first sub-circuit element (TE1) may be about 5 mm or more and about 20 mm or less.

[0131] Meanwhile, although the first opening (BC-OP1) and the first sub-circuit element (TE1) are illustrated exemplarily in FIG. 5b, the same description can be applied to the arrangement relationship of the second opening (BC-OP2) and the second sub-circuit element (TE2).

[0132] In a display device according to one embodiment, an opening (BC-OP) is provided in a bottom chassis (BC) included in a display module (DM), and the opening (BC-OP) is defined to overlap with a circuit element (TE) of a circuit board (MPCB) on a plane. Accordingly, heat generated when the circuit element (TE) operates can be effectively blocked from being transferred to the display panel, thereby improving the lifespan and display efficiency of the display panel.

[0133] Unlike the display device of one embodiment, if an opening overlapping with a circuit element is not provided in the bottom chassis, heat generated from the circuit element may be transferred to a display panel positioned above the display module. Consequently, degradation may occur in the portion of the display panel overlapping with the circuit element, thereby reducing the lifespan and display efficiency of that portion. In particular, in a thin display device where the gap between the display module and the circuit board is small, the impact of heat generated from the circuit element on the display panel may increase.

[0134] In a display device according to one embodiment, an internal space (SP) is provided within an opening (BC-OP) provided in a bottom chassis (BC), and the conductive thermal resistance is increased through an air layer in the internal space (SP), thereby preventing heat generated when a circuit element (TE) operates from being transferred to the display panel. Accordingly, in the display device of one embodiment, degradation of the display panel is prevented, and the lifespan and display efficiency of the display panel can be improved.

[0135] FIG. 6a is a cross-sectional view illustrating a partial configuration of a display device according to an embodiment of the present invention. FIG. 6b is a plan view schematically illustrating a partial configuration of a display device according to an embodiment of the present invention. FIG. 6a illustrates a cross-section along the II-II' cutting line shown in FIG. 2b, and among the components included in the display module (DM) shown in FIG. 3, only the base layer (BL), the heat dissipation layer (HDL), and the bottom chassis (BC) are shown, while the components arranged on the upper side are omitted and not shown. FIG. 6b illustrates the planar arrangement relationship between the bottom chassis (BC) and the circuit element (TE) shown in FIG. 6a. Hereinafter, in describing a display device of an embodiment with reference to FIG. 6a and FIG. 6b, the same reference numerals are assigned to components already described in FIG. 5a and FIG. 5b, and detailed descriptions are omitted.

[0136] Referring to FIGS. 6a and 6b, in a display module (DM) of one embodiment, an opening (BC-OP') may be defined in the bottom chassis (BC). The opening (BC-OP') overlaps in a plane with a circuit element (TE). The opening (BC-OP') may be provided to overlap in a plane with a plurality of circuit elements (TE). As illustrated in FIGS. 6a and 6b, the opening (BC-OP') may be provided to overlap with both a first sub-circuit element (TE1) and a second sub-circuit element (TE2). FIGS. 6a and 6b illustrate, by way of example, that the opening (BC-OP') is provided to overlap with two sub-circuit elements (TE1, TE2), but is not limited thereto, the opening (BC-OP') may be defined to overlap with a greater number of circuit elements. For example, as shown in FIG. 2a, when four circuit elements are mounted on a circuit board (MPCB), the opening (BC-OP') may be defined to overlap the entire four circuit elements.

[0137] The opening (BC-OP') may have a planar area larger than the total area of ​​the portion where the first sub-circuit element (TE1) and the second sub-circuit element (TE2) are arranged. The opening (BC-OP') may have a width greater than a first distance (d1') in the second direction (DR2) from one end of the first sub-circuit element (TE1), and a width greater than a second distance (d2') in the first direction (DR1) from one end of the first sub-circuit element (TE1). The opening (BC-OP') may have a width greater than a third distance (d3) in the second direction (DR2) from one end of the second sub-circuit element (TE2), and a width greater than a fourth distance (d4) in the first direction (DR1) from one end of the second sub-circuit element (TE2). The opening (BC-OP') may overlap between the first sub-circuit element (TE1) and the second sub-circuit element (TE2), and accordingly, the bottom chassis (BC) may not overlap between the first sub-circuit element (TE1) and the second sub-circuit element (TE2).

[0138] Each of the first distance (d1'), second distance (d2'), third distance (d3), and fourth distance (d4) may be approximately 5 mm or more and approximately 20 mm or less. Each of the first distance (d1'), second distance (d2'), third distance (d3), and fourth distance (d4) may be, for example, approximately 5 mm or more and approximately 10 mm or less.

[0139] In one embodiment, when the planar area of ​​the circuit base layer (PBL) included in the circuit board (MPCB) is set to 1, the area of ​​the opening (BC-OP') may be 0.8 or more. When the planar area of ​​the circuit base layer (PBL) is set to 1, the area of ​​the opening (BC-OP') may be 0.8 or more and less than 1. As the area of ​​the opening (BC-OP') is provided to have a large value of 80% or more of the circuit base layer (PBL), the heat dissipation characteristics of the display module (DM) can be further improved, and accordingly, the deterioration of the display panel can be effectively prevented.

[0140] FIGS. 7a to 7c are cross-sectional views illustrating a portion of a display device according to an embodiment of the present invention. FIGS. 7a to 7c each illustrate a cross-section along the II-II' cutting line shown in FIG. 2b, and among the components included in the display module (DM) shown in FIG. 3, only the base layer (BL), the heat dissipation layer (HDL), and the bottom chassis (BC) are illustrated, while the components positioned on the upper side are omitted and not illustrated. Hereinafter, in describing a display device of an embodiment with reference to FIGS. 7a to 7c, the same reference numerals are assigned to components already described in FIGS. 5a to 6b, and detailed descriptions are omitted.

[0141] A display device of one embodiment may further include a radiant heat blocking layer disposed between a display module (DM) and a circuit base layer (PBL). The radiant heat blocking layer may have an emissivity of 0.3 or less on its surface. The radiant heat blocking layer may have a color with an emissivity of 0.3 or less. For example, the radiant heat blocking layer may have a white color. The radiant heat blocking layer may be, for example, an insulating layer (WIL, WIL-1) illustrated in FIGS. 7a to 7c. Alternatively, the radiant heat blocking layer may be, for example, a printed layer (WP).

[0142] Referring to FIG. 7a, a display module (DM) of one embodiment may further include an insulating layer (WIL) disposed below a bottom chassis (BC). The insulating layer (WIL) may be attached below the bottom chassis (BC) in the form of an insulating film.

[0143] The insulating layer (WIL) may be a layer for preventing electromagnetic interference between a display module (DM) and a circuit board (MPCB) arranged at a narrow gap. The insulating layer (WIL) may include an insulating material. The insulating layer (WIL) may include an organic insulating material or an inorganic insulating material.

[0144] The insulating layer (WIL) may have a surface emissivity of 0.3 or less. The insulating layer (WIL) may have a color with a surface emissivity of 0.3 or less. For example, the insulating layer (WIL) may have a white color. The insulating layer (WIL) may contain an insulating material that exhibits a white color. As the insulating layer (WIL) has a white color, the emissivity of the insulating layer (WIL) is lowered, thereby minimizing the absorption of radiant heat transferred from the circuit element (TE). Therefore, the heat transferred from the circuit element (TE) to the upper part of the display module (DM) can be minimized, and thus the degradation of the display panel can be effectively prevented.

[0145] Referring to FIG. 7b, a circuit board (MPCB) of one embodiment may further include a printed layer (WP) printed on the upper surface of a circuit base layer (PBL). The printed layer (WP) may be printed on the upper surface of the circuit base layer (PBL) and spaced apart from a circuit element (TE). The printed layer (WP) may be positioned between a circuit element (TE) and a display module (DM).

[0146] The printed layer (WP) may have a surface emissivity of 0.3 or less. The printed layer (WP) may have a color with a surface emissivity of 0.3 or less. For example, the printed layer (WP) may have a white color. The printed layer (WP) may be formed by printing a material having a white color onto the upper surface of the circuit base layer (PBL) through an inkjet coating, spray coating, silkscreen printing process, etc. Although FIG. 7b illustrates the printed layer (WP) being formed entirely on the upper surface of the circuit base layer (PBL) as an example, it is not limited thereto, and the printed layer (WP) may be formed partially on the upper surface of the circuit base layer (PBL). For example, the printed layer (WP) may be formed to overlap only the part where the opening (BC-OP) is defined.

[0147] As the printed layer (WP) has a white color, the emissivity of the printed layer (WP) can be lowered to minimize the absorption of radiant heat transferred from the circuit element (TE). Therefore, the heat transferred from the circuit element (TE) to the upper part of the display module (DM) can be minimized, and accordingly, the degradation of the display panel can be effectively prevented.

[0148] Referring to FIG. 7c, in a display module (DM) of one embodiment, at least a portion of an insulating layer (WIL-1) disposed below a bottom chassis (BC) may be disposed within an opening (BC-OP). The insulating layer (WIL-1) may be disposed on the inner surface of the opening (BC-OP). The insulating layer (WIL-1) may be disposed on the lower surface of a heat dissipation layer (HDL) exposed by the opening (BC-OP). The insulating layer (WIL-1) may be formed through a coating or deposition process so as to be disposed within the opening (BC-OP). FIG. 7c exemplarily illustrates the insulating layer (WIL-1) being disposed entirely within the opening (BC-OP) and in the portion of the bottom chassis (BC) where the opening (BC-OP) is not defined, but is not limited thereto, and the insulating layer (WIL-1) may be formed partially. For example, the insulating layer (WIL-1) may be placed only inside the opening (BC-OP). The insulating layer (WIL-1) may also be placed only on the underside of the heat dissipation layer (HDL) inside the opening (BC-OP).

[0149] Referring to FIGS. 7a to 7c, a display device of one embodiment may include a printed layer (WP) or an insulating layer (WIL, WIL-1) disposed between the bottom chassis (BC) of a display module (DM) and the circuit base layer (PBL) of a circuit board (MPCB) to prevent degradation of the display panel. That is, a display device of one embodiment may include a low-emissivity layer having a white color between the bottom chassis (BC) of a display module (DM) and the circuit base layer (PBL) of a circuit board (MPCB) to prevent radiant heat transmitted from a circuit element (TE) from being transmitted toward the display panel, thereby preventing degradation of the display panel.

[0150] FIGS. 8a and FIGS. 8b are graphs showing the front temperature of a display panel over time of a display device according to one embodiment of the present invention and a display device according to a comparative example, respectively.

[0151] In FIG. 8a, the embodiment shows a temperature graph over time of a display device including a display module (DM) in which an opening (BC-OP) is formed in the bottom chassis (BC), as shown in FIG. 5a. The comparative example shows a temperature graph over time of a display device including a display module in which no opening is formed in the bottom chassis, unlike the embodiment. In FIG. 8a, after operating the same driving pattern on the display devices of the embodiment and the comparative example, the trend of the temperature of the upper surface of the display panel changing over time is shown as a graph.

[0152] Referring to the graph in Fig. 8a, it was confirmed that the display device of the embodiment showed a lower display panel surface temperature than the comparative example over the entire time, and in particular, at the point after 9 minutes of curing, which is the highest temperature point after operation of the display device, it showed 45.3°C, which is 1°C lower than the highest temperature of the comparative example, 46.3°C. Through this, it was confirmed that the display device of one embodiment has a structure in which an opening is formed in the bottom chassis, so the front temperature of the display panel can be effectively lowered.

[0153] In FIG. 8, the embodiment shows a temperature graph over time of a display device in which an insulating layer (WIL) having a white color with an emissivity of 0.3 or less is disposed below the bottom chassis (BC) as shown in FIG. 7b, and a printed layer (WP) having a white color with an emissivity of 0.3 or less is disposed on the upper surface of the circuit base layer (PBL). The comparative example shows a temperature graph over time of a display device in which, unlike the embodiment, no printed layer is formed on the upper surface of the circuit base layer, and an insulating layer having a black color with an emissivity greater than 0.3 is included below the bottom chassis. In FIG. 8b, the trend of the temperature on the upper surface of the display panel changing over time is shown as a graph after operating the same driving pattern on the display devices of the embodiment and the comparative example.

[0154] Referring to the graph in Fig. 8b, it was confirmed that the display device of the embodiment showed a lower display panel surface temperature than the comparative example over the entire time, and in particular, at 20 minutes after operation, it showed 48.9°C, which is 0.5°C lower than the temperature of the comparative example, 49.4°C. Through this, it was confirmed that the display device of one embodiment can effectively lower the front temperature of the display panel by including a printing layer and / or an insulating layer, which is a layer with low emissivity, between the display module and the circuit board.

[0155] Although the present invention has been described above with reference to preferred embodiments, those skilled in the art or those with ordinary knowledge in the relevant technical field will understand that various modifications and changes can be made to the invention without departing from the spirit and technical scope of the invention as set forth in the claims below. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims. Explanation of the symbols

[0157] DD: Display device DP: Display Panel BC: Bottom Chassis MPCB: Circuit board TE: Circuit element BC-OP : Opening WIL: Insulation layer WP: Print layer

Claims

Claim 1 A display device comprising: a display panel; a bottom chassis disposed below the display panel; at least one circuit element electrically connected to the display panel and disposed below the bottom chassis; and a radiant heat blocking layer disposed between the at least one circuit element and the bottom chassis and having an emissivity of 0.3 or less, wherein the bottom chassis includes an opening that overlaps with the at least one circuit element in a plane. Claim 2 A display device according to claim 1, wherein the planar area of ​​the opening is larger than the planar area of ​​the at least one circuit element, and the at least one circuit element overlaps the opening in its entirety. Claim 3 A display device according to paragraph 2, wherein the distance between one end of the bottom chassis defining the opening and one end of the at least one circuit element is 5 mm or more and 20 mm or less. Claim 4 A display device according to paragraph 2, wherein the width of the opening in the first direction is greater than the width of the at least one circuit element in the first direction, and the width in the second direction intersecting the first direction of the opening is greater than the width of the at least one circuit element in the second direction. Claim 5 In claim 1, the radiant heat blocking layer is a display device including a white color. Claim 6 A display device according to claim 1, further comprising a circuit base layer having a lower surface on which at least one circuit element is disposed, wherein the planar area of ​​the opening relative to the planar area of ​​the circuit base layer is 0.8 or more and less than 1. Claim 7 A display device according to claim 1, wherein the radiant heat blocking layer comprises a printing layer disposed between the at least one circuit element and the bottom chassis, and an insulating layer disposed between the printing layer and the bottom chassis. Claim 8 In claim 7, a display device wherein at least a portion of the insulating layer is disposed inside the opening. Claim 9 A display device according to claim 1, wherein the at least one circuit element comprises a first sub-circuit element and a second sub-circuit element spaced apart from the first sub-circuit element, and the opening overlaps with each of the first sub-circuit element and the second sub-circuit element. Claim 10 In claim 9, the opening comprises a first opening that overlaps the first sub-circuit element; and a second opening that overlaps the second sub-circuit element and is spaced apart from the first opening. Claim 11 A display device according to claim 1, further comprising a connecting circuit board that electrically connects the display panel and the at least one circuit element, wherein the connecting circuit board is bent at a predetermined curvature. Claim 12 A display device according to claim 1, further comprising: a housing accommodating the display panel and the at least one circuit element; and a window disposed on the display panel. Claim 13 A display device according to claim 1, wherein the display panel comprises: a light-emitting element that outputs source light; a light control layer disposed on the light-emitting element and comprising a plurality of light control patterns; and a color filter layer disposed on the light control layer and comprising a plurality of color filters. Claim 14 A display device according to claim 1, further comprising a heat dissipation layer disposed between the display panel and the bottom chassis. Claim 15 A display device comprising: a base layer; a display panel including a light-emitting element that outputs source light disposed on the base layer; and a bottom chassis disposed below the base layer; a circuit board electrically connected to the display panel and disposed below the bottom chassis, and comprising at least one circuit element disposed on the lower surface of the circuit base layer; and a radiant heat blocking layer disposed between the display module and the circuit base layer and having an emissivity of 0.3 or less, wherein the circuit base layer comprises a circuit portion having at least one circuit element disposed therein; and a peripheral portion that does not overlap with the circuit element, wherein the distance from the upper surface of the circuit portion to the lower surface of the display module is greater than the distance from the upper surface of at least some of the peripheral portion to the lower surface of the display module. Claim 16 In paragraph 15, an opening is defined in the bottom chassis that overlaps with the circuit element in a planar manner, and the planar area of ​​the opening is larger than the planar area of ​​the circuit element. Claim 17 A display device comprising: a display panel; a heat dissipation layer disposed below the display panel; a bottom chassis disposed below the heat dissipation layer and including an opening that exposes the lower surface of the heat dissipation layer; at least one circuit element electrically connected to the display panel and disposed below the bottom chassis; and a radiant heat blocking layer disposed between the at least one circuit element and the bottom chassis and having an emissivity of 0.3 or less, wherein the opening overlaps the at least one circuit element in a plane. Claim 18 In claim 17, the radiant heat blocking layer comprises a printing layer disposed between the at least one circuit element and the heat dissipation layer, and an insulating layer disposed between the heat dissipation layer and the printing layer, in a display device. Claim 19 In Clause 17, the above-mentioned radiant heat blocking layer is a display device including a white color.

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