Image sensing device
Patent Information
- Application Number
- KR1020250015762
- Authority / Receiving Office
- KR · KR
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-02-07
- Publication Date
- 2026-08-14
Smart Images

Figure PAT00004_ABST
Abstract
Description
Technology Field
[0001] The present invention relates to an image sensing device comprising a single photon avalanche diode (SPAD). Background Technology
[0002] Time of Flight (TOF) technology can extract distance by irradiating pulsed light from a light source placed within or near the sensor, receiving the light reflected from the detection target, and measuring the time between.
[0003] For precise TOF measurement, detection must occur immediately after the reflected light reaches the light receiving element, so a photoelectric conversion element with very high sensitivity is required.
[0004] A single-photon avalanche diode is an optical device that can be manufactured using CMOS technology and has very high gain characteristics. A single-photon avalanche diode is a device with high photoelectric conversion efficiency capable of detecting a single photon by amplifying photons using the avalanche multiplication effect inside the diode when a voltage at the avalanche breakdown condition is applied, and by detecting the amplified photons. The problem to be solved
[0005] An embodiment of the present invention aims to provide an image sensing device capable of improving pixel sensitivity by changing the location of occurrence of avalanche breakdown.
[0007] The technical problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem
[0008] An image sensing device according to one embodiment of the present technology may include: a substrate comprising a first surface and a second surface opposite to the first surface; a first well region comprising first type impurities and located within the substrate to be in contact with the second surface; a second well region comprising second type impurities opposite to the first type and located within the substrate to be in contact with the first well region; a first wiring electrically connected to the first well region through a first contact plug; a second wiring electrically connected to the second well region through a second contact plug; and a field dispersion electrode connected to the third wiring through a third contact plug and located to cover an edge region of the second well region between the first contact plug and the second contact plug.
[0009] An image sensing device according to another embodiment of the present technology may include: a substrate comprising a first well region containing first type impurities and a second well region in contact with the first well region, comprising second type impurities opposite to the first type; an electric field dispersion electrode positioned on the substrate at a first height apart from the substrate and covering the edge region of the second well region; a first wiring positioned on the substrate at a second height higher than the first height and connected to the first well region; a second wiring positioned on the substrate at a second height apart from the substrate and connected to the second well region; and a third wiring positioned on the substrate at a second height apart from the substrate and connected to the electric field dispersion electrode. Effects of the invention
[0010] An embodiment of the present invention can improve the sensitivity of pixels by causing the avalanche breakdown phenomenon to occur in a wide and uniform area. Brief explanation of the drawing
[0011] FIG. 1 is a schematic diagram illustrating the configuration of an imaging device according to one embodiment of the present invention. FIG. 2 is a plan view exemplarily showing the planar structure of pixels included in the pixel array of FIG. 1. FIG. 3 is a plan view illustrating an exemplary planar structure of conduction lines formed on the structure of FIG. 2. FIG. 4 is a cross-sectional view exemplarily showing the structure of a cross section cut along the XX′ cut line in FIG. 3. FIG. 5a is a diagram exemplarily showing the appearance of the electric field generated by a reverse bias voltage in the edge region of a PN junction when an electric field dispersion electrode is not formed. FIG. 5b is a diagram exemplarily showing how an electric field is dispersed in the edge region of a PN junction by an electric field dispersion electrode. FIG. 6a is a drawing showing the structure of metal wiring according to another embodiment of the present invention. FIG. 6b is a drawing showing the structure of metal wiring according to another embodiment of the present invention. FIG. 7 is a drawing showing the structure of an image sensing device according to another embodiment of the present invention. FIG. 8 is a drawing showing the structure of an image sensing device according to another embodiment of the present invention. FIG. 9 is a drawing showing the structure of an image sensing device according to another embodiment of the present invention. FIG. 10 is a drawing showing the structure of an image sensing device according to another embodiment of the present invention. Specific details for implementing the invention
[0012] Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. It should be noted that in assigning reference numerals to the components of each drawing, the same components are given the same reference numeral whenever possible, even if they are shown in different drawings. Furthermore, in describing the embodiments of the present invention, if it is determined that a detailed description of related known components or functions would hinder understanding of the embodiments of the present invention, such detailed description is omitted.
[0014] FIG. 1 is a schematic diagram illustrating the configuration of an imaging device according to one embodiment of the present invention.
[0015] Referring to FIG. 1, the imaging device (ID) may refer to a device such as a digital still camera that captures still images or a digital video camera that captures video. For example, the imaging device (ID) may be implemented as a Digital Single Lens Reflex (DSLR), a mirrorless camera, or a smartphone, but is not limited thereto. The imaging device (ID) may be a concept that includes a device capable of capturing a subject and generating an image by including an imaging element. According to one embodiment, the imaging device (ID) may be a Lidar sensor.
[0016] The imaging device (ID) may include an image sensing device (10) and an image signal processor (ISP, 20).
[0017] The image sensing device (10) may be a Complementary Metal Oxide Semiconductor Image Sensor (CIS) that converts incident light into an electrical signal. The image sensing device (10) may include a light source (11), a lens module (12), a light source driver (13), a pixel array (14), a sensor driver (15), a readout circuit (16), and a timing controller (17).
[0018] The light source (11) can irradiate light onto the target object (1) under the control of the light source driver (13). For example, the light source (11) can emit light of a specific wavelength band (e.g., near-infrared, infrared, or visible light). Although only one light source (11) is shown in FIG. 1 for convenience of explanation, multiple light sources may be arranged around the lens module (12).
[0019] The lens module (12) can collect light reflected from the target object (1) and focus it on the unit pixels (PX) of the pixel array (11).
[0020] The light source driver (13) can drive the light source (11) under the control of the timing controller (17). For example, the light source driver (13) can control the waveform (period, amplitude and pulse width, etc.) of the emitted light (EL) output from the light source (11).
[0021] The pixel array (14) may include a plurality of unit pixels (PX) arranged continuously in the column direction and the row direction. The plurality of unit pixels (PX) may be formed on a semiconductor substrate, and each unit pixel (PX) may generate a pixel signal by converting incident light incident through the lens module (12) into an electrical signal corresponding to the intensity of the incident light.
[0022] Unit pixels (PX) can generate a pixel signal by detecting incident light including reached light (RL) that is incident on a target object (1) after being reflected by an irradiated light (EL) irradiated from a light source (11). In this embodiment, the light incident on a target object (1) after being reflected by an irradiated light (EL) irradiated from an image sensing device (10) is used as the reached light (RL), but the scope of the present invention is not limited thereto. For example, the light source (11) may be provided in a separate device other than the image sensing device (10), and the reached light (RL) may be light that is directly incident on a pixel array (14) after the irradiated light (EL) irradiated from the light source (11). Additionally, the unit pixels (PX) of this embodiment may include a pixel for calculating the distance to a target object (1), a pixel for generating an infrared light image by detecting infrared light, or a pixel for generating a color image by detecting incident visible light.
[0023] Each unit pixel (PX) in this embodiment may include a single photon avalanche diode (SPAD) as a photoelectric conversion element.
[0024] For reference, a single-photon avalanche diode can be used as a photoelectric conversion device comprising a photosensitive PN junction. The single-photon avalanche diode can detect photons reflected by a target object and generate a current pulse corresponding to the detected photons. In this case, the current pulse can be generated by triggering an avalanche breakdown by an incident photon while a reverse bias voltage higher than the breakdown voltage is applied to the cathode and anode of the single-photon avalanche diode. Here, the avalanche breakdown can occur in the depletion region within the single-photon avalanche diode.
[0025] The sensor driver (150) can drive pixels (PX) of the pixel array (14) in response to a timing signal output from the timing controller (17). For example, the sensor driver (15) can generate a control signal that can select and control pixels (PX) included in at least one row line among a plurality of row lines of the pixel array (14).
[0026] The readout circuit (16) can process pixel signals output from the pixel array (14) under the control of the timing controller (17) to generate and store depth data for detecting the distance to the target object (1).
[0027] The timing controller (17) can generate timing signals to control the operation of the light source driver (13), the sensor driver (15), and the readout circuit (16). According to one embodiment, the timing controller (17) can generate timing signals according to a pre-stored sequence, data transmitted from the readout circuit (16), and / or a request from the image signal processor (20). According to one embodiment, the timing controller (17) may include a logic control circuit, a phase lock loop (PLL) circuit, a timing control circuit, and a communication interface circuit, etc.
[0028] The image signal processor (20) can generate processed image data by performing image signal processing on image data (IDATA) received from the image sensing device (1000). For example, the image signal processor (20) can perform image signal processing to improve image quality, such as reducing noise on the image data (IDATA), interpolation of the image data (IDATA), and lens distortion correction. Additionally, the image signal processor (20) can transmit a control signal to the image sensing device (10) to control the operation of the image sensing device (10) (whether it is operating, operation timing, operation mode, etc.).
[0029] FIG. 2 is a plan view exemplarily showing the planar structure of unit pixels included in the pixel array of FIG. 1, and FIG. 3 is a plan view exemplarily showing the planar structure of conductive lines formed on the structure of FIG. 2. In addition, FIG. 4 is a cross-sectional view exemplarily showing the structure of a cross section cut along the X-X' cut line in FIG. 3.
[0030] FIG. 2 may be a diagram showing an exemplary view from a second surface (S2) on the opposite side of a first surface (S1) where light is incident on the substrate (100).
[0031] Referring to FIGS. 2 to 4, the pixel array (14) may include a substrate (100) on which unit pixels (PXs) are formed, a wiring layer (200) formed on a second surface (S2) of the substrate (100), and a light incident layer (300) formed on a first surface (S1) of the substrate (100), and the unit pixel (PX) may include a first well region (112), a first contact region (114), a second well region (122), and a second contact region (124) formed within the substrate (100).
[0032] The substrate (100) may include a semiconductor substrate having a first surface (S1) and a second surface (S2) opposite to the first surface. In this case, the first surface (S1) may be a surface in contact with the light incident layer (300), and the second surface (S2) may be a surface in contact with the wiring layer (200). The substrate (100) may be, for example, a silicon single-crystal substrate, a P-type or N-type bulk substrate, a substrate on which an N-type or P-type epitaxial layer is grown on a P-type bulk substrate, or a substrate on which a P-type or N-type epitaxial layer is grown on an N-type bulk substrate. In this embodiment, the case where the substrate (100) is a P-type bulk substrate is described as an example.
[0033] The first well region (112) may contain impurities of the first type (e.g., P type) and may be located within the substrate (100). For example, a P type substrate may be the first well region (112). The first well region (112) may be located within the substrate (100) in a manner that surrounds the second well region (122) so as to be in contact with the side and bottom surfaces of the second well region (122) in their entirety.
[0034] The first contact region (114) may contain a high concentration of first type (P+) impurities and may be located within the first well region (112) extending a certain depth from the second surface (S2) of the substrate (100). The first contact region (114) may be formed by injecting first type impurities into the first well region (112) at a high concentration. This first contact region (114) may be the anode of a single photon avalanche diode and may be a sensing node from which a current pulse detected by the single photon avalanche diode is output.
[0035] The first contact area (114) may be located in the edge area of the pixel (PX). When viewed in a planar view, the first contact area (114) may be formed in the shape of a band surrounding the second well area (122), as in FIG. 2.
[0036] The second well region (122) may contain impurities of a second type (e.g., N type) opposite to the first type. The second well region (122) may be positioned to extend a certain depth in the depth direction from the second surface (S2) of the substrate (100) such that both the side and bottom surfaces are in contact with the first well region (112). For example, the second well region (122) may be formed by injecting impurities of the second type into the first well region (112).
[0037] When viewed from a vertical plane, the second well region (122) may be formed such that the diameter of the bottom surface is larger than the height (depth) of the side surface, as shown in FIG. 4. Additionally, when viewed from a planar plane, the second well region (122) may be located in the center of the pixel (PX) so as to be surrounded by the first well region (112), as shown in FIG. 2.
[0038] The region where the second well region (122) and the first well region (112) meet can be the PN junction of a single-photon avalanche diode where avalanche breakdown may occur. In FIG. 2, the second well region (122) is shown formed in a rectangular shape in a planar shape, but it may also be formed in a circular shape.
[0039] The second contact region (124) may contain a high concentration of second type (N+) impurities and may be located within the second well region (122) extending a certain depth from the second surface (S2) of the substrate (100). The second contact region (124) may be formed by injecting a high concentration of second type impurities into the second well region (122). When viewed in a planar view, the second contact region (124) may be located in the center of the second well region (122), as in FIG. 2.
[0040] This second contact region (124) may be the cathode of a single-photon avalanche diode and may be a biasing node to which a high voltage reverse bias voltage is applied to cause avalanche breakdown in the single-photon avalanche diode. Accordingly, the single-photon avalanche diode according to the present embodiment may be a cathode-biased single-photon avalanche diode in which a reverse bias voltage is applied to an N-type impurity region (cathode).
[0041] A pixel isolation structure (140) may be formed between adjacent pixels (PX) within the substrate (100). The pixel isolation structure (140) may serve to prevent optical crosstalk between adjacent unit pixels (PX). The pixel isolation structure (140) may include a trench isolation structure in which an insulator is embedded within a trench etched in the substrate (100), and may be formed to penetrate the substrate (100).
[0042] The pixel isolation structure (140) may include a first isolation structure (142) and a second isolation structure (144). The first isolation structure (142) may include a Shallow Trench Isolation (STI) structure extending to a certain depth from the second surface (S2) of the substrate (100), and the second isolation structure (144) may include a Deep Trench Isolation (DTI) structure formed to be connected to the bottom surface of the first isolation structure (142) and to penetrate the substrate (100). The second isolation structure (144) may include a structure in which metal is embedded in an insulator. Additionally, the second isolation structure (144) may be formed to protrude over the first surface (S1) of the substrate (100) and extend between adjacent microlenses (320).
[0043] A wiring layer (200) may be formed on a second surface (S2) of a substrate (100). The wiring layer (200) may be positioned in contact with the second surface (S2) of the substrate (100). The wiring layer (200) may include an interlayer insulating film (210), contact plugs (220), metal wirings (232, 234, 236a, 236b), and an electric field dispersion electrode (240).
[0044] The interlayer insulating film (210) may include at least one of an oxide film and a nitride film and may electrically isolate contact plugs (220), metal wires (232, 234, 236a, 236b) and an electric field dispersion electrode (240) within the wiring layer (200). The contact plugs (220) may electrically connect the metal wires (232, 234, 236a, 236b) to a first contact region (114), a second contact region (124), or an electric field dispersion electrode (240).
[0045] Metal wirings (232, 234, 236a, 236b) may be located in the same layer within the interlayer insulating film (210) and may include wirings that transmit voltage for controlling the operation of a single-photon avalanche diode and current pulses detected in the single-photon avalanche diode. The metal wirings (232, 234, 236a, 236b) may be the lowest metal wirings among the metal wirings for transmitting signals within the wiring layer (200).
[0046] The metal wiring (232) may be metal wiring connected to the sensing node of a single-photon avalanche diode formed in each unit pixel (PX). The metal wiring (232) may be commonly connected to the first contact regions (114) of the unit pixels (PX) through contact plugs (220). The metal wiring (232) may be formed so that the field dispersion electrode (240) is exposed while covering the edge region of the first well region (112) so as to overlap perpendicularly with the first contact region (114) in each unit pixel (PX) region. Additionally, the metal wiring (232) may be formed to extend to the boundary region of neighboring pixels (PX) so that the metal wirings (232) of neighboring pixels (PX) are integrally connected to each other. For example, the metal wiring (232) may be formed as a single metal wiring integrally across the entire pixel array (14).
[0047] The metal wiring (234) may be metal wiring connected to the biasing node of a single photon avalanche diode formed in each unit pixel (PX). The metal wiring (234) may be positioned to overlap with the second contact area (124) of each unit pixel (PX) and may be connected to the second contact area (124) through a contact plug (220). The metal wiring (236a, 236b) may be positioned to overlap with the electric field dispersion electrode (240) and may be connected to the electric field dispersion electrode (240) through a contact plug (220).
[0048] The electric field dispersion electrode (240) may be positioned adjacent to the substrate (100) between the metal wirings (232, 234, 236a, 236b) and the substrate (100), and may be positioned to cover the entire edge region of the second well region (122). The electric field dispersion electrode (240) may be positioned between the contact plugs (220) within the interlayer insulating film (210).
[0049] The electric field dispersion electrode (240) may be formed in a band shape that opens the central part of the second well region (122) and covers the edge region entirely. For example, as shown in FIG. 3, the electric field dispersion electrode (240) may be formed in a square band shape. FIG. 3 only shows the case where the electric field dispersion electrode (240) is formed in a square band shape, but the electric field dispersion electrode (240) can be any shape as long as it opens the central part of the second well region (122) and covers the edge region entirely. Alternatively, the electric field dispersion electrode (240) may be formed in an open curve shape with some areas open, rather than a closed curve shape.
[0050] The electric field dispersion electrode (240) may be formed to cover the edge region of the second well region (122) entirely or partially, and to cover the edge region of the region (PN junction) where the first well region (112) and the second well region (122) meet, entirely or partially. The edge region of the PN junction may refer to the region adjacent to the second surface (S2) of the substrate (100) at the PN junction. Below, an exemplary case is described in which the electric field dispersion electrode (240) entirely covers the edge region of the second well region (122) and the edge region of the PN junction.
[0051] A voltage having a magnitude between the voltage magnitudes applied to the first contact region (114) and the second contact region (124) can be applied to the electric field dispersion electrode (240). At this time, the magnitude of the voltage applied to the electric field dispersion electrode (240) can be selected to suit the concentration of the first well region (112) and the second well region (122).
[0052] Additionally, the distance between the electric field dispersion electrode (240) and the substrate (100) can be positioned as close as possible to the substrate (100) within a range such that the potential difference between the electric field dispersion electrode (240) and the substrate (100) does not exceed the energy barrier of the insulating film (210) located between the electric field dispersion electrode (240) and the substrate (100).
[0053] The electric field dispersion electrode (240) raises the potential of the edge region of the PN junction and the edge region of the second well region (122) (the region adjacent to the edge region of the PN junction) to prevent the electric field from concentrating in the edge region of the PN junction, thereby allowing avalanche breakdown to occur in the lower region of the PN junction rather than in the edge region of the PN junction. The lower region of the PN junction may refer to the region in contact with the bottom surface of the first well region (122) in the PN junction. The function and effect of such an electric field dispersion electrode (240) will be described later with reference to FIG. 5.
[0054] A light incident layer (300) that collects incident light reflected from an object (1) onto unit pixels (PX) may be formed on a first surface (S1) of a substrate (100). For example, the light incident layer (300) may be positioned in contact with the first surface (S1) of the substrate (100). The light incident layer (300) may include an anti-reflection film (310) and a micro lens (320).
[0055] The anti-reflection film (310) is formed on the first surface (S1) of the substrate (100) and can perform the function of protecting the substrate (100) while preventing diffuse reflection of incident light. The micro-lens (320) can be formed in a hemispherical shape on the anti-reflection film (310) and can improve light reception efficiency by increasing the light gathering power for incident light. In this embodiment, only the case where the light incident layer (300) includes the micro-lens (320) has been described, but it is not limited thereto and other types of lens layers may be formed. For example, a metalens may be formed instead of the micro-lens (320).
[0056] In the above-described embodiment, the case was described in which the first well region (112) and the first contact region (114) contain P-type impurities and the second well region (122) and the second contact region (124) contain N-type impurities; however, conversely, the first well region (112) and the first contact region (114) may contain N-type impurities and the second well region (122) and the second contact region (124) may contain P-type impurities. In such a case, the first contact region (114) may be a cathode and may become a sensing node. The second contact region (124) may be an anode and may become a biasing node. Accordingly, as another embodiment, the single-photon avalanche diode may be an anode-biased single-photon avalanche diode in which a low-voltage reverse bias voltage is applied to the P-type impurity region (anode).
[0057] In addition, in the above-described embodiment, the contact plugs (220) are connected to the first well region (112) or the second well region (122) through the first contact region (114) or the second contact region (124), but the contact plugs (220) may also be directly connected to the first well region (112) or the second well region (122).
[0058] FIG. 5a is a diagram exemplifying the appearance of the electric field generated by a reverse bias voltage in the edge region of a PN junction when an electric field dispersion electrode is not formed, and FIG. 5b is a diagram exemplifying the appearance of the electric field being dispersed in the edge region of a PN junction by the electric field dispersion electrode.
[0059] In Figures 5a and 5b, the arrows represent the electric field strength at the PN junction, and the shorter the length of the arrow, the stronger the electric field strength.
[0060] When a reverse bias voltage higher than the breakdown voltage is applied to the anode and cathode of a single-photon avalanche diode to cause avalanche breakdown to occur inside the single-photon avalanche diode, the electric field can be concentrated in the edge region of the PN junction, as shown in FIG. 5a. As a result, the potential difference between the first well region (112) and the second well region (122) in the edge region of the PN junction can be higher than the potential difference between the first well region (112) and the second well region (122) in the lower region of the PN junction.
[0061] Since avalanche breakdown occurs starting from a region with a high potential difference, in the case of the structure of Fig. 5a, avalanche breakdown mainly occurs in a narrow edge region, and as a result, the sensitivity performance of the single-photon avalanche diode may be degraded.
[0062] On the other hand, if the electric field dispersion electrode (240) is positioned adjacent to the edge region of the second well region (122) to raise the potential of that region, the electric field in that region can be dispersed as shown in FIG. 5b. As a result, the potential difference between the first well region (112) and the second well region (122) at the edge region of the PN junction can be lower than the potential difference between the first well region (112) and the second well region (122) at the lower region of the PN junction.
[0063] In this way, when the potential in the lower region of the PN junction, where a wide and uniform potential difference is formed, becomes relatively higher than the potential difference in the edge region, avalanche breakdown can occur in the lower region of the PN junction. That is, the field dispersion electrode (240) can shift the location of avalanche breakdown to cause avalanche breakdown to occur in a wide region where a uniform potential difference is formed. Accordingly, the sensitivity performance of the single-photon avalanche diode can be improved.
[0064] The line width of the field dispersion electrode (240) (length extending from the PN junction in the direction of the second contact region (124)), the magnitude of the voltage applied to the field dispersion electrode (240), and the distance between the field dispersion electrode (240) and the substrate (100) can be determined based on the concentration of the first well region (112) and the second well region (122), and the material properties of the interlayer insulating film (210).
[0065] FIGS. 6a and 6b are drawings showing the structure of metal wiring according to other embodiments of the present invention.
[0066] The metal wirings of FIGS. 6a and 6b differ from the metal wiring of FIG. 3 described above in that the metal wirings (236c, 236d) connected to the electric field dispersion electrode (240) are different.
[0067] In FIG. 3, the metal wirings (236a, 236b) connected to the electric field dispersion electrode (240) are formed as separate island types, but the metal wiring (236c) in FIG. 6a and the metal wiring (236d) in FIG. 6b can be formed in the shape of a square band, such as the electric field dispersion electrode (240). For example, FIG. 6a shows a case where the line width of the metal wiring (236c) is formed smaller than the line width of the electric field dispersion electrode (240), and FIG. 6b shows a case where the line width of the metal wiring (236d) is formed larger than the line width of the electric field dispersion electrode (240) to cover the entire electric field dispersion electrode (240).
[0068] As shown in FIGS. 6a and 6b, metal wirings (236c, 236d) are formed widely in the shape of square strips to cover as much of the second surface (S2) of the unit pixel (PX) as possible, thereby minimizing the leakage of light that has passed through the substrate (100) to the outside.
[0069] FIG. 7 is a diagram showing the structure of an image sensing device according to another embodiment of the present invention.
[0070] Referring to FIG. 7, the metal wiring connected to the electric field dispersion electrode (240) may be formed as a single metal wiring (237) connected to the metal wiring connected to the first contact area (114). For example, the metal wiring (237) may be formed in a form in which the metal wirings (232, 236a, 236b) in FIG. 4 are connected integrally to each other. Accordingly, the electric field dispersion electrode (240) may be electrically connected to a P-type anode (sensing node) through the metal wiring (237).
[0071] In this way, the number of metal wires can be reduced compared to the structure of FIG. 4 described above by using the same metal wire (237) in common for the metal wire connected to the electric field dispersion electrode (240) and the metal wire connected to the first contact area (114).
[0072] FIG. 8 is a diagram showing the structure of an image sensing device according to another embodiment of the present invention.
[0073] Referring to FIG. 8, the unit pixel (PX) may include a first well region (112′), a first contact region (114′), a second well region (122′), and a second contact region (124′) formed within the substrate (100).
[0074] The first well region (112′), the first contact region (114′), the second well region (122′), and the second contact region (124′) differ in that they each contain impurities of the opposite type to the first well region (112), the first contact region (114), the second well region (122), and the second contact region (124) of FIG. 4 described above.
[0075] For example, in FIG. 4, the first well region (112) and the first contact region (114) contain P-type impurities and the second well region (122) and the second contact region (124) contain N-type impurities, whereas in FIG. 8, the first well region (112′) and the first contact region (114′) contain N-type impurities and the second well region (122′) and the second contact region (124′) contain P-type impurities.
[0076] The first contact region (114′) may be a cathode and may be a sensing node. The second contact region (124′) may be an anode and may be a biasing node. Accordingly, the single-photon avalanche diode of the embodiment of FIG. 8 may be an anode-biased single-photon avalanche diode in which a low-voltage reverse bias voltage is applied to a P-type impurity region (anode).
[0077] The formation location and shape of each of the first well region (112′), the first contact region (114′), the second well region (122′), and the second contact region (124′) may be the same as the formation location and shape of the first well region (112), the first contact region (114), the second well region (122), and the second contact region (124) in FIG. 4.
[0078] In such an anode-biased single-photon avalanche diode, the metal wiring connected to the field-dispersing electrode (240) may be formed as a single metal wiring (238) connected to the metal wiring connected to the second contact region (124′). For example, the metal wiring (238) may be formed in such a way that the metal wirings (234, 236a, 236b) in FIG. 4 are connected integrally to each other. Accordingly, the field-dispersing electrode (240) may be electrically connected to a P-type anode (biasing node) through the metal wiring (238).
[0079] In this way, the number of metal wires can be reduced compared to the structure of FIG. 4 described above by using the same metal wire (238) in common for the metal wire connected to the electric field dispersion electrode (240) and the metal wire connected to the second contact area (124′).
[0080] FIGS. 9 and FIGS. 10 are drawings showing the structure of an image sensing device according to other embodiments of the present invention.
[0081] Referring to FIGS. 9 and 10, the pixel array (14) may further include a high dielectric constant insulating film (250a, 250b) located between the electric field dispersion electrode (140) and the substrate (100). In this case, the high dielectric constant insulating film (250a) may be selectively located only below the electric field dispersion electrode (140) with the same size and shape as the electric field dispersion electrode (140), as in FIG. 9. Alternatively, the high dielectric constant insulating film (250b) may be located to cover the first well region (112) and the second well region (122) entirely, as in FIG. 10.
[0082] In this way, the high dielectric constant insulating film (250a, 250b) formed between the electric field dispersion electrode (140) and the substrate (100) can better generate depletion phenomena in the edge region of the PN junction, thereby increasing the electric field dispersion effect.
[0084] The above description is merely an illustrative explanation of the technical concept of the present invention, and those skilled in the art to which the present invention pertains will be able to make various modifications and variations within the scope of the essential characteristics of the present invention.
[0085] Accordingly, the embodiments disclosed in this invention are intended to illustrate, not limit, the technical concept of the invention, and the scope of the technical concept of the invention is not limited by these embodiments. The scope of protection of this invention shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of this invention. Explanation of the symbols
[0086] 10: Image sensing device 11: Light source 12: Lens Module 13: Light Source Driver 14: Pixel array 15: Sensor driver 16: Readout circuit 17: Timing controller 240: Electric field dispersion electrode
Claims
Claim 1 An image sensing device comprising: a substrate including a first surface and a second surface opposite to the first surface; a first well region including first type impurities and located within the substrate to be in contact with the second surface; a second well region including second type impurities opposite to the first type and located within the substrate to be in contact with the first well region; a first wiring electrically connected to the first well region through a first contact plug; a second wiring electrically connected to the second well region through a second contact plug; and an electric field dispersion electrode connected to the third wiring through a third contact plug and located to cover an edge region of the second well region between the first contact plug and the second contact plug. Claim 2 An image sensing device according to claim 1, wherein the electric field dispersion electrode covers the edge region of the junction where the first well region and the second well region meet. Claim 3 The image sensing device according to claim 1, wherein the electric field dispersion electrode covers the edge region of the second well region in a band shape. Claim 4 In claim 2, the third wiring is an image sensing device positioned in an island type so as to overlap with the electric field dispersion electrode. Claim 5 An image sensing device according to claim 2, wherein the third wiring is positioned in a strip shape to overlap with the electric field dispersion electrode. Claim 6 An image sensing device according to claim 1, wherein the first wiring covers the edge region of the first well region so that the electric field dispersion electrode is fully exposed. Claim 7 In claim 1, the third wiring is an image sensing device connected to the first wiring. Claim 8 In claim 1, the third wiring is an image sensing device connected to the second wiring. Claim 9 An image sensing device according to claim 1, wherein the second well region extends in the depth direction from the second surface such that both the side and bottom surfaces are in contact with the first well region. Claim 10 An image sensing device according to claim 1, further comprising a high dielectric constant insulating film located between the electric field dispersion electrode and the substrate. Claim 11 An image sensing device according to claim 10, wherein the high dielectric constant insulating film is selectively located only below the electric field dispersion electrode. Claim 12 An image sensing device according to claim 10, wherein the high dielectric constant insulating film is positioned to cover the first well region and the second well region entirely. Claim 13 An image sensing device according to claim 1, further comprising: a first contact region located within the first well region in contact with the first contact plug and containing the first type of impurities at a higher concentration than the first well region; and a second contact region located within the second well region in contact with the second contact plug and containing the second type of impurities at a higher concentration than the second well region. Claim 14 An image sensing device according to claim 13, wherein the first contact region is located at the edge region of the first well region in the form of a band surrounding the second well region. Claim 15 An image sensing device comprising: a substrate including a first well region containing first type impurities and a second well region in contact with the first well region, containing second type impurities opposite to the first type; an electric field dispersion electrode positioned on the substrate at a first height apart from the substrate and covering an edge region of the second well region; a first wiring positioned on the substrate at a second height higher than the first height and connected to the first well region; a second wiring positioned on the substrate at a second height apart from the substrate and connected to the second well region; and a third wiring positioned on the substrate at a second height apart from the substrate and connected to the electric field dispersion electrode. Claim 16 An image sensing device according to claim 15, wherein the electric field dispersion electrode covers the edge region of the junction where the first well region and the second well region meet. Claim 17 In claim 15, the electric field dispersion electrode is an image sensing device that covers the edge region of the second well region in a band shape. Claim 18 An image sensing device according to claim 17, wherein the third wiring is positioned in a strip shape to overlap with the electric field dispersion electrode. Claim 19 In claim 15, the third wiring is an image sensing device connected to the first wiring. Claim 20 In claim 15, the third wiring is an image sensing device connected to the second wiring.