Display apparatus

Abstract

A display device according to the present specification comprises a substrate including a display area and a non-display area disposed outside the display area, a link area, a bending area, and a pad area located in the non-display area, a plurality of first signal link wires disposed in the link area, a plurality of second signal link wires disposed in the pad area, and a plurality of connecting wires disposed in the bending area and connecting the plurality of first signal link wires and the plurality of second signal link wires, respectively, and the plurality of connecting wires may include a plurality of first connecting wires and a plurality of second connecting wires disposed on different layers with an insulating layer in between.

Description

Technology Field

[0001] This specification relates to a display device. Background Technology

[0002] Display devices are applied to various electronic devices such as TVs, smartphones, laptops, and tablets. To this end, research is continuously being conducted to develop thinner, lighter, and lower power consumption display devices.

[0003] The bezel area of ​​a display device is visible to the user and can be a factor that reduces the sense of immersion regarding the images emitted from the display. Accordingly, there is an increasing demand for display devices that implement a narrow bezel, which expands the display area and reduces the bezel area where the screen is not displayed, or a zero bezel, which creates the effect of having virtually no bezel area.

[0004] Organic Light Emitting Diode Display Devices (OLEDs) are self-emissive devices that can be made into thin films. Accordingly, they are easy to fold or bend using flexible substrates. The problem to be solved

[0005] As a flexible substrate made of a flexible material is applied to the display device, the display panel may include a bending area that allows a portion of the area to be bent to hide the pad area beneath the display area. Accordingly, the bezel area of ​​the display device visible to the user can be reduced.

[0006] The bending area includes a plurality of connection lines to transmit various signals to pixels on the display area, and the plurality of connection lines can be connected to signal lines in a link area adjacent to the display area.

[0007] However, if the connecting wiring placed in the bending area is damaged due to external impact or the like, a problem may occur in which a signal is not provided to the display area, resulting in a malfunction where the display device does not operate.

[0008] Accordingly, the inventors of this specification have invented a display device capable of continuous operation even when an external force is applied to a local area, such as a bending area, through various experiments.

[0009] The problem to be solved according to the embodiments of the present specification is to provide a display device capable of reliably providing a signal to a display area through connecting wiring disposed on a bending area.

[0010] In addition, the problem to be solved according to the embodiments of the present specification is to provide a display device capable of providing a signal to a display area even when damage occurs to the connecting wiring due to an external force being applied to a local area, such as a bending area.

[0011] The problems solved according to one embodiment of this specification are not limited to the purposes mentioned above, and other unmentioned purposes and advantages of the present invention may be understood from the following description and will be more clearly understood by the embodiments of this specification. Furthermore, it will be readily apparent that the purposes and advantages of this specification can be realized by the means and combinations thereof set forth in the claims. means of solving the problem

[0012] A display device according to one embodiment of the present specification comprises a substrate including a display area and a non-display area disposed outside the display area, a link area, a bending area, and a pad area located in the non-display area, a plurality of first signal link wires disposed in the link area, a plurality of second signal link wires disposed in the pad area, and a plurality of connecting wires disposed in the bending area and connecting the plurality of first signal link wires and the plurality of second signal link wires, respectively, and the plurality of connecting wires may include a plurality of first connecting wires and a plurality of second connecting wires disposed on different layers with an insulating layer in between. Effects of the invention

[0013] According to an embodiment of the present specification, by placing connecting wires placed in a bending area of ​​a non-display area at different spaced positions on different layers, it is possible to transmit a signal through other connecting wires placed on different layers.

[0014] Accordingly, even if cracks caused by external force occur in some of the connecting wires providing signals to the display area, signals or voltages for the operation of the display area can be stably provided, thereby improving product reliability.

[0015] According to the embodiments of this specification, the failure rate of the display device due to damage to the connecting wires is lowered, thereby reducing the production energy required for the additional production of the display device, which has the effect of reducing greenhouse gas emissions.

[0016] The effects of this specification are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art from the description below. Brief explanation of the drawing

[0017] FIG. 1 is a plan view of a display panel according to embodiments of the present specification. Figure 2 is an enlarged view of area II of Figure 1. Figure 3 is a cross-sectional view along line I-I' of Figure 1. FIGS. 4 to 7 are drawings according to an embodiment of the present specification. FIGS. 8 to 10 are cross-sectional views according to other embodiments of the present specification. Specific details for implementing the invention

[0018] The advantages and features of this specification and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, this specification is not limited to the embodiments disclosed below but may be implemented in various different forms, and these embodiments are provided merely to ensure that the disclosure of this specification is complete and to fully inform those skilled in the art of the scope of the invention.

[0019] Shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of this specification are exemplary and are not limited to the depicted items. Throughout the specification, the same reference numerals refer to the same components. Furthermore, in describing this specification, if it is determined that a detailed description of related prior art could unnecessarily obscure the essence of this specification, such detailed description is omitted. Where terms such as "includes," "has," or "is made up" are used in this specification, other parts may be added unless "only" is used. Where a component is expressed in the singular, it includes cases where it is included in the plural unless specifically stated otherwise.

[0020] In interpreting the components, they are interpreted to include a margin of error even in the absence of a separate explicit statement.

[0021] In the case of describing a positional relationship, for example, when the positional relationship between two parts is described using expressions such as 'on,' 'upper,' 'lower,' or 'next to,' one or more other parts may be located between the two parts unless 'immediately' or 'directly' is used.

[0022] In the case of an explanation of a temporal relationship, for example, when a temporal sequence is explained using 'after', 'following', 'next', 'before', etc., it may include cases where the sequence is not continuous unless 'immediately' or 'directly' is used.

[0023] Although terms such as "first," "second," etc. are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the technical scope of this specification.

[0024] The features of each of the various embodiments of this specification may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0025] Hereinafter, a display device according to each embodiment of the present invention will be described with reference to the attached drawings.

[0027] FIG. 1 is a plan view of a display panel according to embodiments of the present specification. FIG. 2 is an enlarged view of area II of FIG. 1.

[0028] Referring to FIGS. 1 and 2, a display device (1) according to an embodiment of the present specification may include a display panel (200), a printed circuit board (104), and a driving circuit chip (103), etc.

[0029] The display panel (200) may include a display area (AA) and a non-display area (NAA). The display area (AA) is an area where an image is displayed, and a plurality of pixels (P), data lines (DL), and gate lines (GL) may be arranged therein. The non-display area (NAA) may be an area where an image is not displayed. The non-display area (NAA) may be located in the peripheral area (or border area) of the display panel (200), but is not limited thereto. For example, the area remaining after excluding the light-emitting area on the display area (AA) from which light is emitted outwardly may be referred to as the non-display area (NAA). The bezel area of ​​the display device may be defined by the non-display area (NAA). The bezel area may surround the outer side of the display area (AA).

[0030] Wiring may be arranged in the non-display area (NAA) to provide electrical signals to the display area (AA) or to receive electrical signals from the display area (AA). For example, a gate driver may be arranged in the non-display area (NAA) to supply gate signals to multiple subpixels (SP1, SP2, SP3) of the display area (AA). The gate driver may be arranged at the right and left edges of the non-display area (NAA) using a GIP (Gate In Panel) method. The gate driver may transmit gate signals through gate wiring (GL).

[0031] The non-display area (NAA) may include a pad area (PDA) in which a driving circuit chip (103) and a plurality of pads (PD) are disposed. The driving circuit chip (103) may transmit data signals to a plurality of subpixels (SP1, SP2, SP3) through a plurality of data wires (DL) of the display area (AA). For example, the driving circuit chip (103) may be a data driving circuit chip, but is not limited thereto.

[0032] Gate wires (GL) can be extended in the horizontal direction (X) of the display panel (200), and data wires (DL) can intersect with the gate wires (GL) and be extended in the vertical direction (Y) of the display panel (200).

[0033] The non-display area (NAA) may include a link area (LKA) and a bending area (BDA). The link area (LKA) is positioned between the display area (AA) and the pad area (PDA), and the bending area (BDA) may be positioned between the link area (LKA) and the pad area (PDA).

[0034] The link area (LKA) may include data link wires for electrically connecting a plurality of data wires (DL) of the display area (AA) and the driving circuit chip (103), gate link wires for electrically connecting a driving circuit chip (103) connected to a plurality of gate wires (GL), or touch link wires for electrically connecting touch wires and the driving circuit chip (103).

[0035] Data link wiring, touch link wiring, or gate link wiring extended from the display area (AA) to the link area (LKA) can be extended to the pad area (PDA) via the bending area (BDA).

[0036] The bending area (BDA) may include a first bending area (BDA1), a second bending area (BDA2), and a third bending area (BDA3). The first bending area (BDA1), the second bending area (BDA2), and the third bending area (BDA3) may be arranged in the horizontal direction (X) of the display panel (200). The first bending area (BDA1) may be an area where data lines (DL) extending from the display area (AA) are arranged through the link area (LKA). The second bending area (BDA2) may be an area where touch lines extending from the display area (AA) are arranged through the link area (LKA). The third bending area (BDA3) may be an area where gate lines (GL) are arranged through the link area (LKA). In one example, a second bending region (BDA2) and a third bending region (BDA3) may be positioned on each side with the first bending region (BDA1) in between, but are not limited thereto.

[0037] The bending area (BDA) of the display panel (200) can be bent so that the printed circuit board (104) is positioned to face the back of the display area (AA) of the display panel (200). The printed circuit board (104) may include a control circuit chip. The control circuit chip can control the driving circuit chip (103) and the gate driver.

[0038] As the bending area (BDA) of the display panel (200) bends, the pad area (PDA) of the non-display area (NAA) can be located below the display area (AA). Accordingly, the lower non-display area of ​​the display device (1) perceived from the front of the display device (1) can be reduced.

[0039] The display area (AA) may include a plurality of pixels (P) and holes (H). The holes (H) may be areas where electronic components are placed to add various functions to the display device (1). For example, the electronic components may include a camera module for taking photos or videos, such as in a smartphone, laptop, or tablet, or various sensor devices for detecting external objects. The sensor devices may include at least one of a proximity sensor, a gesture sensor, a color sensor, a bio-sensor, and an infrared sensor, but are not limited thereto.

[0040] A single pixel (P) may be composed of multiple subpixels (SP1, SP2, SP3). An image can be displayed in a display area (AA) through the multiple subpixels (SP1, SP2, SP3). The multiple subpixels (SP1, SP2, SP3) may be arranged in an array on the display area (AA). In one example, the multiple subpixels (SP1, SP2, SP3) may be arranged in a matrix-type array spaced apart from each other in the horizontal direction of the display area (AA) and in the vertical direction intersecting the horizontal direction. The horizontal direction may be the X-axis direction, the horizontal direction, or the row direction, and the vertical direction may be the Y-axis direction, the vertical direction, or the column direction. However, this is not limited thereto, and the arrangement shape, arrangement order, and arrangement direction of the subpixels (SP1, SP2, SP3) may be varied.

[0041] In this specification, one embodiment is described in which a pixel (P) is composed of a first subpixel (SP1), a second subpixel (SP2), and a third subpixel (SP3), but is not limited thereto. For example, additional subpixels may be included in the pixel (P).

[0042] Each subpixel (SP1, SP2, SP3) may be implemented to emit light of the same color for each subpixel, such as white light, or may be implemented to emit light of a different color for each subpixel, such as red, green, or blue light. For example, the first subpixel (SP1) may be implemented as red, the second subpixel (SP2) as green, and the third subpixel (SP3) as blue.

[0043] FIG. 3 is a cross-sectional view along line I-I' of FIG. 1. FIG. 3 schematically shows one subpixel of a display device. For convenience of explanation, the present specification describes the configuration of one subpixel, but is not limited thereto.

[0044] Referring to FIG. 3, the display panel (200) may include a pixel driving circuit comprising a plurality of transistors (220, 240) disposed on a substrate (201), a light-emitting element (260), and a touch sensor unit (287).

[0045] A single subpixel may include a light-emitting element (260) and a pixel driving circuit that applies a driving current to the light-emitting element (260). The pixel driving circuit is disposed on a substrate (201), and the light-emitting element (260) is disposed on the pixel driving circuit. The pixel driving circuit may include a plurality of transistors (220, 240) and a storage capacitor (230). In one example, the plurality of transistors (220, 240) may include a first transistor (220) and a second transistor (240).

[0046] The substrate (201) may be a flexible plastic substrate. If the substrate (201) is a plastic film, it may include multiple layers of insulating material. For example, the substrate (201) may include a first base layer (202), a second base layer (203), and a support layer (204). The first base layer (202) and the second base layer (203) may be spaced apart from each other at the top and bottom, and the support layer (204) may be placed between them.

[0047] The first base layer (202) and the second base layer (203) may include a flexible insulating material. For example, the first base layer (202) and the second base layer (203) may include polyimide. The support layer (204) may support the first and second base layers (202, 203) which are relatively flexible. The support layer (204) may include an insulating material that is relatively rigid compared to the first and second base layers (202, 203). For example, the support layer (204) may include silicon oxide (SiOx) or silicon nitride (SiNx).

[0048] A first buffer layer (205) may be disposed on a substrate (201). The first buffer layer (205) may cover the surface of the substrate (201). The first buffer layer (205) may reduce or prevent the penetration of moisture, oxygen, or impurities through the substrate (201). The first buffer layer (205) may be a single layer or a multilayer made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). The first buffer layer (205) may cover the entire surface of the substrate (201) on the display area (AA). For example, the first buffer layer (205) may extend to a non-display area (NAA) surrounding the outside of the display area (AA).

[0049] A light-shielding layer (209) may be disposed on the first buffer layer (205). The light-shielding layer (209) may block external light incident on the transistor. To this end, the light-shielding layer (209) may include an opaque metallic material. A second buffer layer (212) may be disposed on the light-shielding layer (209). The second buffer layer (212) may protect the transistor from moisture, oxygen, or impurities. The second buffer layer (212) may be a single layer or a multilayer made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. The second buffer layer (212) may cover the entire surface of the substrate (201) on the display area (AA). For example, the second buffer layer (212) may extend to a non-display area (NAA) surrounding the outside of the display area (AA).

[0050] A first transistor (220) may be disposed on the second buffer layer (212). The first transistor (220) may include a first semiconductor layer (221), a first gate insulating layer (222), a first gate electrode (223), a first source electrode (224), and a first drain electrode (225). In one example, the first transistor (220) may be a switching transistor.

[0051] The first semiconductor layer (221) may include a channel region and a source / drain region. The region of the first semiconductor layer (221) that overlaps with the first gate electrode (223) in the upper and lower directions may be the channel region. The source / drain region may be disposed on each side of the channel region. The first semiconductor layer (221) may be composed of one or a combination of a polysilicon semiconductor layer and a low-temperature polysilicon semiconductor layer. In another example, the first semiconductor layer (221) may include an oxide semiconductor layer. For example, it may include at least one of oxide semiconductor materials such as indium gallium zinc oxide (IGZO) or indium zinc oxide (IZO).

[0052] If the first semiconductor layer (221) includes an oxide semiconductor layer, the first transistor (220) may be an oxide thin film transistor. The first semiconductor layer (221) may be arranged to overlap the light shielding layer (209) in the upper and lower directions. The light shielding layer (209) may block external light incident on the first semiconductor layer (221).

[0053] A first gate insulating layer (222) may be disposed between the first semiconductor layer (221) and the first gate electrode (223). The first gate insulating layer (222) may extend outwardly while covering the first semiconductor layer (221). The first gate insulating layer (222) may be composed of a single layer or multiple layers of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). The first gate insulating layer (222) may completely cover the surface of the substrate (201) on the display area (AA). For example, the first gate insulating layer (222) may extend to a non-display area (NAA) surrounding the outside of the display area (AA). In the non-display area (NAA), the second buffer layer (212) and the first gate insulating layer (222) may come into contact with each other from the top and bottom to form a first insulating structure (213).

[0054] A first gate electrode (223) may be disposed on a first gate insulating layer (222). A first interlayer insulating layer (214) may be disposed on the first gate electrode (223). The first interlayer insulating layer (214) may be a single layer or a multilayer made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). In one example, the first interlayer insulating layer (214) may extend to a non-display area (NAA) surrounding the outside of a display area (AA).

[0055] The first source electrode (224) and the first drain electrode (225) can be electrically connected to the first semiconductor layer (221).

[0056] The storage capacitor (230) may include a first storage electrode (231) and a second storage electrode (232). For example, the first storage electrode (231) may be located on the same layer as the first gate electrode (223). For example, the first storage electrode (231) may be placed on the first gate insulating layer (222) at a different location spaced apart from the first gate electrode (223). The first storage electrode (231) may be made of the same material as the first gate electrode (223). The second storage electrode (232) may be placed on the first interlayer insulating layer (214) so ​​as to overlap the first storage electrode (231) in the upper and lower directions.

[0057] The first storage electrode (231) and the second storage electrode (232) may be a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, they are not limited to these materials.

[0058] A second interlayer insulating layer (216) may be disposed on the second storage electrode (232). The second interlayer insulating layer (216) may be a single layer or a multilayer made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). In one example, the second interlayer insulating layer (216) may extend to a non-display area (NAA) surrounding the outside of the display area (AA).

[0059] A second transistor (240) may be disposed on the second interlayer insulating layer (216) spaced apart from the first transistor (220). The second transistor (240) may be electrically connected to the first transistor (220). For example, the second transistor (240) may include a second semiconductor layer (241), a second gate insulating layer (242), a second gate electrode (243), a second source electrode (245), and a second drain electrode (246). In one example, the second transistor (220) may be a driving transistor electrically connected to a light-emitting element (260).

[0060] The second semiconductor layer (241) may include a channel region and a source / drain region. The region of the second semiconductor layer (241) that overlaps with the second gate electrode (243) in the up and down directions may be the channel region. The source / drain region may be disposed on each side of the channel region. The second semiconductor layer (241) may be composed of an oxide semiconductor layer. For example, it may include at least one oxide semiconductor material such as indium gallium zinc oxide (IGZO) or indium zinc oxide (IZO). In one example, the second semiconductor layer (241) may be disposed to overlap with the storage capacitor (230) in the up and down directions. Accordingly, external light incident from outside the substrate (201) to the second semiconductor layer (241) can be blocked by the storage capacitor (230). Thus, it is possible to prevent the characteristics of the second transistor (240) from changing due to external light.

[0061] A second gate insulating layer (242) may be disposed between the second semiconductor layer (241) and the second gate electrode (243). The second gate insulating layer (242) may extend outward while covering the second semiconductor layer (241). For example, the second gate insulating layer (242) may extend to a non-display area (NAA) surrounding the outside of the display area (AA). The second gate insulating layer (242) may be composed of a single layer or multiple layers of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

[0062] The first gate electrode (223) or the second gate electrode (243) may be a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, it is not limited to these materials.

[0063] A third interlayer insulating layer (218) may be disposed on the second gate electrode (243). The third interlayer insulating layer (218) may include an insulating material. For example, the third interlayer insulating layer (218) may be a single layer or a multilayer, including inorganic insulating materials such as silicon oxide (Six), silicon nitride (SiNx), and silicon oxide nitride (SiON). In one example, the third interlayer insulating layer (218) may extend to a non-display area (NAA) surrounding the outside of the display area (AA). In the non-display area (NAA), the second interlayer insulating layer (216), the second gate insulating layer (242), and the third interlayer insulating layer (218) may come into contact with each other from the top and bottom to form a second insulating structure (219).

[0064] A first source electrode (224), a first drain electrode (225), a second source electrode (245), and a second drain electrode (246) may be disposed on the third interlayer insulating layer (218).

[0065] The first source electrode (224) and the first drain electrode (225) can be connected by directly contacting the source / drain regions of the first semiconductor layer (221) through the third interlayer insulating layer (218), the second gate insulating layer (242), the second interlayer insulating layer (216), the first interlayer insulating layer (214), and the first gate insulating layer (222).

[0066] The second source electrode (245) and the second drain electrode (246) can be connected by directly contacting the source / drain regions of the second semiconductor layer (241), respectively, by penetrating the third interlayer insulating layer (218) and the second gate insulating layer (242). The second drain electrode (246) of the second transistor (240) can be electrically connected to the storage capacitor (230). For example, a portion of the second drain electrode (246) can be connected by directly contacting the first storage electrode (231) of the storage capacitor (230) by penetrating the third interlayer insulating layer (218), the second gate insulating layer (242), the second interlayer insulating layer (216), and the first interlayer insulating layer (214).

[0067] The first source electrode (224), the first drain electrode (225), the second source electrode (245), or the second drain electrode (246) may be a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, but is not limited thereto. In one example, the first source electrode (224) or the second drain electrode (225) may be a laminated structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0068] A passivation layer (247) may be disposed on the first source electrode (224), the first drain electrode (225), the second source electrode (245), or the second drain electrode (246). The passivation layer (247) may be a single layer or a multilayer, comprising an inorganic insulating material such as silicon oxide, silicon nitride, and silicon oxynitride. The passivation layer (247) may protect the pixel driving circuit disposed underneath.

[0069] A flattening layer (250) may be disposed on the passivation layer (247). The flattening layer (250) may flatten the step difference caused by the lower pixel driving circuit. The flattening layer (250) may include a multilayer structure of a first flattening layer (251) and a second flattening layer (252). For example, the flattening layer (250) may include an organic insulating material such as polyimide or acrylic resin. In one example, the first flattening layer (251) and the second flattening layer (252) may extend to a non-display area (NAA) surrounding the outside of the display area (AA).

[0070] A pixel contact electrode (255) may be disposed on the first flattening layer (251). The pixel contact electrode (255) may penetrate the first flattening layer (251) and the passivation layer (247) and come into direct contact with the first drain electrode (246) of the second transistor (240).

[0071] A light-emitting element (260) may be formed on a flattening layer (250). For example, a light-emitting element (260) may be disposed on a second flattening layer (252). The light-emitting element (260) may include a first electrode (261), a light-emitting layer (263), a second electrode (265), and a capping layer (267).

[0072] The light-emitting element (260) can be electrically connected to a pixel driving circuit through a first electrode (261). For example, the first electrode (261) can penetrate the second planarization layer (252) and come into direct contact with the pixel contact electrode (255). Accordingly, the first electrode (261) can be electrically connected to the second transistor (240) through the pixel contact electrode (255). However, FIG. 2 is intended to explain an example of a method of supplying current to the first electrode (261) and is not limited to physical contact between the first electrode (261) and the second transistor (240), which is the driving transistor. In one example, the switching transistor electrically connected to the first electrode (261) may be a light-emitting transistor. For example, the light-emitting transistor may control the turn-on and turn-off states of the light-emitting element (260). The pixel contact electrode (255) may include a conductive material. For example, the pixel contact electrode (255) may include metallic materials such as aluminum (Al), chromium (Cr), copper (Cu), titanium (Ti), molybdenum (Mo), and tungsten (W). In one example, the pixel contact electrode (255) may have a multilayer structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0073] The first electrode (261) may include a transparent conductive film. For example, the first electrode (261) may include indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the first electrode (261) may include a single-layer or multi-layer structure comprising a reflective metal film formed of one of silver (Ag), aluminum (Al), gold (Au), nickel (Ni), and chromium (Cr), or an alloy thereof. The first electrode (261) may also be referred to as an anode electrode or a pixel electrode.

[0074] A bank (262) may be disposed on the first electrode (261). The bank (262) may be disposed to cover the edge of the first electrode (261). A portion of the bank (262) may extend to the second flattening layer (252). The upper surface of the first electrode (261) exposed and not covered by the bank (262) may become a light-emitting region. The bank (262) may be composed of an organic insulating material. The bank (262) may include, for example, photosensitive polyimide, photoacrylic, or benzocyclobutene (BCB).

[0075] A spacer (264) may be further disposed on the bank (262). The spacer (264) may be disposed to prevent damage to the bank (262) and the first electrode (261) during the process. The spacer (264) may be made of the same material as the bank (262). The bank (262) and the spacer (264) may be stacked on top of each other to form an organic insulating structure (266).

[0076] A light-emitting layer (263) may be disposed on the first electrode (261). The light-emitting layer (263) may include a hole transport layer (HTL), an organic light-emitting layer (EML), an electron transport layer (ETL), a hole blocking layer (HBL), a hole injecting layer (HIL), an electron blocking layer (EBL), and an electron injecting layer (EIL). The light-emitting layer (263) may have a multi-stack structure in which two or more organic light-emitting layers (EML) are stacked.

[0077] A second electrode (265) may be disposed on the light-emitting layer (263). The second electrode (265) may be commonly connected to the light-emitting layer (263) formed on all pixels. Thus, the second electrode (265) may also be referred to as a cathode electrode or a common electrode. The second electrode (265) may include a semi-transparent conductive material. For example, it may be formed from a metallic material such as magnesium (Mg), silver (Ag), or an alloy of silver (Ag) and magnesium (Mg) (Ag-Mg). In one example, the second electrode (265) may include a transparent conductive film such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

[0078] A capping layer (267) may be disposed on the second electrode (265). The capping layer (267) can improve light extraction efficiency by preventing light generated from the light-emitting layer (263) from being lost.

[0079] A sealing portion (270) may be disposed on the light-emitting element (260). The sealing portion (270) may protect the light-emitting element (260) from external oxygen or moisture. The sealing portion (270) may cover the display area (AA) and extend to the non-display area (NAA) outside the display area (AA).

[0080] The bag portion (270) may include a multilayer structure in which a first bag layer (271), a second bag layer (273), and a third bag layer (275) are arranged. The second bag layer (273) may be configured to be arranged between the first bag layer (271) and the third bag layer (275).

[0081] A first encapsulation layer (271) may be placed on the capping layer (267). A second encapsulation layer (273) may be placed on the first encapsulation layer (271). The second encapsulation layer (273) may have sufficient thickness to cover the first encapsulation layer (271) and have a flat surface. The second encapsulation layer (273) may prevent foreign substances from penetrating into the light-emitting element (260). A third encapsulation layer (275) may be placed on the second encapsulation layer (273). The first encapsulation layer (271) and the third encapsulation layer (275) may extend to a non-display area (NAA) surrounding the outside of the display area (AA).

[0082] The first encapsulation layer (271) and the third encapsulation layer (275) may comprise an inorganic insulating material, and the second encapsulation layer (273) may comprise an organic insulating material. For example, each of the first encapsulation layer (271) and the third encapsulation layer (275) may comprise at least one material selected from silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). The second encapsulation layer (273) may comprise at least one material selected from epoxy, polyimide, polyethylene, and acrylate.

[0083] A touch portion may be disposed on the packaging portion (270). The touch portion may include a touch buffer layer (277), a touch sensor portion (287), an inter-touch layer insulating layer (282), a first touch protection layer (290), and a second touch protection layer (295).

[0084] A touch buffer layer (277) may be disposed on the third encapsulation layer (275). The touch buffer layer (277) can relieve stress between the encapsulation portion (270) and the touch sensor portion (287) layer, thereby preventing damage to the encapsulation portion (270) and the light-emitting element (260). The touch buffer layer (277) may include an inorganic insulating material. For example, the touch buffer layer (277) may include silicon nitride (SiNx).

[0085] The touch sensor unit (287) may include a plurality of touch electrodes (285) and a bridge electrode (281). The plurality of touch electrodes (285) and the bridge electrode (281) may be disposed on different layers. For example, the bridge electrode (281) may be disposed on a touch buffer layer (277). The plurality of touch electrodes (287) may be disposed on a touch interlayer insulating layer (282). The plurality of touch electrodes (287) may include a first touch electrode (283) and a second touch electrode (284). The bridge electrode (281) may electrically connect adjacent first touch electrodes (283). To this end, the first touch electrode (283) may penetrate the touch interlayer insulating layer (282) and be connected to the bridge electrode (281). The touch interlayer insulating layer (282) may include an inorganic insulating material. For example, the interlayer insulation layer (282) may include silicon nitride (SiNx).

[0086] The first touch electrode (283), the second touch electrode (284), or the bridge electrode (281) may include a conductive material. The first touch electrode (283), the second touch electrode (284), or the bridge electrode (281) may include a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0087] The touch buffer layer (277) and the touch layer insulation layer (282) can be extended in the direction of the non-display area (NAA).

[0088] A first touch protection layer (290) may be disposed on the touch sensor portion (287). The first touch protection layer (290) can prevent damage to the touch sensor portion (287) caused by external impact and moisture. The first touch protection layer (290) may include an organic insulating material. For example, the first touch protection layer (290) may be made of a photosensitive acrylic or polyimide-based organic material. The first touch protection layer (290) may extend into a non-display area (NAA).

[0089] A second touch protection layer (295) may be disposed on the first touch protection layer (290). The second touch protection layer (295) may further protect the touch sensor portion (287) from external shocks and moisture. Additionally, the second touch protection layer (295) may flatten the step difference caused by the patterns constituting the lower touch sensor portion (287). The second touch protection layer (295) may include an organic insulating material. For example, the second touch protection layer (295) may include the same organic insulating material as the first touch protection layer (290), but is not limited thereto. For example, the second touch protection layer (295) may include a different organic insulating material than the first touch protection layer (295).

[0090] FIGS. 4 to 7 are drawings according to an embodiment of the present specification. FIG. 4 is a plan view showing an enlarged view of area II of FIG. 2. FIG. 5 is a cross-sectional view along line IV-IV' of FIG. 4. FIG. 6 is a cross-sectional view along line V-V' of FIG. 4. FIG. 7 is a drawing showing a crack defect that occurred during a bending operation. FIGS. 5 and 6 are illustrated up to an organic insulating structure (266) in which a bank (262) and a spacer (264) are stacked on top and bottom, and the encapsulation part (270), touch sensor part (287), etc. placed on top of the organic insulating structure (266) have been omitted.

[0091] FIG. 4 may show a portion of the link area (LKA), bending area (BDA), and pad area (PDA) of the display panel (200). For example, FIG. 4 shows a portion of the area where data link wiring is arranged to transmit a signal to drive a pixel on the display area (AA).

[0092] Referring to FIGS. 4 to 6, a plurality of first signal link wires (SL1) that transmit a signal to a display area (AA) on a link area (LKA) may be arranged. For example, the plurality of first signal link wires (SL1) may include a plurality of data link wires. Each of the plurality of first signal link wires (SL1) may be electrically connected to a second signal link wire (SL2) through a plurality of connection wires (CL).

[0093] A plurality of first signal link wires (SL1) may each extend in the vertical direction (Y) from the link area (LKA). Adjacent first signal link wires (SL1) may be arranged spaced apart from each other in the horizontal direction (X). The horizontal direction (X) may refer to the horizontal direction of the display panel. The vertical direction (Y) may refer to the vertical direction of the display panel.

[0094] A plurality of connecting wires (CL) may extend from the link area (LKA) through the bending area (BDA) to the pad area (PDA). The connecting wires (CL) may extend in the vertical direction (Y) from the bending area (BDA). One side of the plurality of connecting wires (CL) may overlap with the first contact area (CTA1) of the link area (LKA), and the other side extending to the pad area (PDA) through the bending area (BDA) may overlap with the second contact area (CTA2) of the pad area (PD). One side of the connecting wires (CL) may be electrically connected to the first signal link wire (SL1) in the first contact area (CTA1), and the other side may be electrically connected to the second signal link wire (SL2) in the second contact area (CTA2).

[0095] A plurality of connecting wires (CL) may include a plurality of odd-numbered wires (CL_n) (n is a natural number) and a plurality of even-numbered wires (CL_n+1) (n is a natural number). The plurality of odd-numbered wires (CL_n) and the plurality of even-numbered wires (CL_n+1) may be arranged alternately with each other.

[0096] Referring to FIGS. 5 and 6, a first buffer layer (205) may be disposed on a link region (LKA) of a substrate (201). The substrate (201) may be a multilayer structure comprising a first base layer (202), a second base layer (203), and a support layer (204). A first insulating structure (213) may be disposed on the first buffer layer (205). The first insulating structure (213) may be a structure in which a second buffer layer (212) and a first gate insulating layer (222) comprising an inorganic insulating material are in contact with each other from the top and bottom.

[0097] A first signal link wiring (SL1) may be disposed on the first insulating structure (213). For example, the first signal link wiring (SL1) may be a data link line, but is not limited thereto. The first signal link wiring (SL1) may include the same material as one of the first gate electrode (223), the second gate electrode (243), or the second storage electrode (232). For example, the signal link line (DL) may be a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, it is not limited to these materials.

[0098] For convenience of explanation, the present specification describes an embodiment in which the first signal link wiring (SL1) is formed from the same material as the first gate electrode (223) in the same process. Additionally, for convenience of explanation, the present specification describes an embodiment in which the first signal link wiring (SL1) is composed of a single layer, but is not limited thereto. For example, the first signal link wiring (SL1) may be composed of a plurality of layers arranged in different layers.

[0099] A second insulating structure (219) may be disposed on the first signal link wiring (SL1). The second insulating structure (219) may be a structure in which a second gate insulating layer (242) and a third interlayer insulating layer (218) on the display area (AA) are in contact with each other from the top and bottom.

[0100] A link contact electrode (LCT) may be disposed on the second insulating structure (219). The link contact electrode (LCT) may be formed from the same material and in the same process as the second source electrode (245) and the second drain electrode (246) on the display area (AA). The link contact electrode (LCT) may be electrically connected to the first signal link wiring (SL1). For example, the link contact electrode (LCT) may penetrate the second insulating structure (219) to connect to the first signal link wiring (SL1). The end portion of the link contact electrode (LCT) may be located inside the end portion of the second insulating structure (219).

[0101] A first flattening layer (251) may be disposed on the second insulating structure (219) and the link contact electrode (LCT). The first flattening layer (251) may be disposed on the link region (LKA) and the bending region (BDA) of the substrate (201).

[0102] In the bending region (BDA) of the substrate (201), a first buffer layer (205), a first insulating structure (213), and a second insulating structure (219) made of an inorganic insulating material prone to cracking may not be disposed. For example, a first flattening layer (251) containing an organic insulating material may be disposed in the bending region (BDA) of the substrate (201). The first flattening layer (251) may be disposed so as to be in direct contact with the second base layer (203) of the substrate (201) on the bending region (BDA). Since the first buffer layer (205), the first insulating structure (210), and the second insulating structure (219) of the substrate (201) are disposed within the link region (LKA), the ends of these layers may define the boundary between the link region (LKA) and the bending region (BDA). For example, the end portion of the first buffer layer (205) placed at the bottom of the insulating laminated structure can define the boundary between the bending region (BDA) and the link region (LKA).

[0103] A connecting wire (CL) may be disposed on the first planarization layer (251). The connecting wire (CL) may extend to the pad area (PDA) through the link area (LKA) and the bending area (BDA). The connecting wire (CL) may be formed in the same process with the same material as the pixel contact electrode (255) of the display area (AA). In one example, the connecting wire (CL) may have a multilayer structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0104] The connecting wire (CL) can be connected to the link contact electrode (LCT) by penetrating the first flattening layer (251) in the first contact area (CTA1). Accordingly, the connecting wire (CL) can be electrically connected to the first signal link wire (SL1) through the link contact electrode (LCT). In one example, the link contact electrode (LCT) is placed in each first contact area (CTA1), and adjacent link contact electrodes (LCT) can be insulated from each other.

[0105] A second flattening layer (252) may be disposed on the connecting wire (CL). The second flattening layer (252) may be disposed on the link region (LKA) and bending region (BDA) of the substrate (201) while covering the connecting wire (CL). The second flattening layer (252) may flatten the step difference caused by the lower circuit elements.

[0106] An organic insulating structure (266) may be placed on the second flattening layer (252) of the link region (LKA) and the bending region (BDA). The organic insulating structure (266) may be formed in the same process with the same material as the bank (262) and spacer (264) of the display region (AA).

[0107] Accordingly, a first flattening layer (251), a second flattening layer (252), and an organic insulating structure (266) comprising an organic insulating material may be disposed on the substrate (201) of the bending region (BDA).

[0108] Referring to FIGS. 1, 6, and 7, a plurality of connecting wires (CL) may be arranged between the first flattening layer (251) and the second flattening layer (252). The plurality of connecting wires (CL) may include odd-numbered wires (CL_n) and even-numbered wires (CL_n+1) (n is a natural number).

[0109] A plurality of odd-numbered wires (CL_n) and a plurality of even-numbered wires (CL_n+1) may have a straight shape extending over a bending area (BDA). A plurality of odd-numbered wires (CL_n) and a plurality of even-numbered wires (CL_n+1) may be arranged on the same layer. Accordingly, with reference to FIG. 4, a signal provided from a control circuit chip of a printed circuit board may be transmitted from a second signal link wire (SL2) through a second contact area (CTA2) to a first signal link wire (SL1) through a first contact area (CTA1) via one of a plurality of connection wires (CL) arranged spaced apart from each other on the same layer, and provided to a display area (AA).

[0110] Meanwhile, since the bending area (BDA) is exposed at the lower end of the display panel (200), multiple connecting wires (CL) placed on the bending area (BDA) may be vulnerable to external damage. For example, the bending area (BDA) may be bent so as to hide the pad area (PDA) under the display area (AA). As the bending area (BDA) is bent, stress (S) may be applied to the material placed on the connecting wires (CL) in the bending area (BDA), such as the second flattening layer (252) and the organic insulating structure (266). The material placed on the connecting wires (CL) to which stress (S) is applied may develop a crack (CR) in a localized area due to shrinkage or expansion. The crack (CR) developed in the material placed on the connecting wires (CL) may propagate and damage the connecting wires (CL).

[0111] Alternatively, a physical external force may occur in which a local area of ​​the bending area (BDA) is pressed or dented. Consequently, a crack may occur in the connecting wire (CL) placed in the area of ​​the bending area (BDA) where the physical external force is applied. As the crack propagates in the vertical direction of the connecting wire (CL), defects such as the connecting wire (CL) becoming disconnected may occur.

[0112] Referring again to FIGS. 4 and 6, a signal provided from a control circuit chip of a printed circuit board can be transmitted from a second signal link line (SL2) through a second contact area (CTA2) to a first signal link line (SL1) through a first contact area (CTA1) via one of a plurality of connection lines (CL) arranged spaced apart from each other on the same layer, and provided to a display area (AA). Accordingly, if damage occurs in a local area of ​​the bending area (BDA) and a crack occurs in one of the plurality of connection lines (CL), the signal provided through this connection line (CL) is not transmitted to the display area (AA), and a defect such as failure to operate in the display area (AA) may occur. For example, if a crack occurs in the area containing the 98th connection wire (CL_n+1), which is an even-numbered wire among the multiple connection wires (CL), and the 98th connection wire (CL_n+1) is disconnected, the signal provided to the display area (AA) through the 98th connection wire (CL_n+1) may not be provided. Accordingly, a defect may occur in which the display device operation, such as the pixel not being lit in the display area (AA), does not take place.

[0113] Accordingly, another embodiment of the present invention may include a configuration that allows the display area to continue operating even when damage occurs in a local area of ​​the bending area (BDA).

[0114] FIGS. 8 to 10 are cross-sectional views according to other embodiments of the present specification. FIG. 8 is a plan view showing an enlarged view of area II of FIG. 2. FIG. 9 is a cross-sectional view along line VI-VI' of FIG. 8. FIG. 10 is a cross-sectional view along line VII-VII' of FIG. 8. FIGS. 9 and 10 are illustrated only up to an organic insulating structure (266) in which a bank (262) and a spacer (264) are stacked on top and bottom, and the encapsulation part (270), touch sensor part (287), etc. placed on top of the organic insulating structure (266) are omitted.

[0115] Referring to FIGS. 8 to 10, a plurality of first signal link wires (SL1) that transmit a signal to a display area (AA) on a link area (LKA) may be arranged. For example, the plurality of first signal link wires (SL1) may include a plurality of data link wires. Each of the plurality of first signal link wires (SL1) may be electrically connected to a second signal link wire (SL2) through a plurality of connection wires (CL1, CL2).

[0116] Each first signal link wiring (SL1) may extend in the vertical direction (Y) from the link area (LKA). Adjacent first signal link wirings (SL1) may be spaced apart from each other in the horizontal direction (X). The horizontal direction (X) may refer to the horizontal direction of the display panel, and the vertical direction (Y) may refer to the vertical direction of the display panel.

[0117] A plurality of connecting wires (CL1, CL2) may extend from a link area (LKA) through a bending area (BDA) to a pad area (PDA). The plurality of connecting wires (CL1, CL2) may include a plurality of first connecting wires (CL1) and a plurality of second connecting wires (CL2). The plurality of first connecting wires (CL1) and the plurality of second connecting wires (CL2) may be placed on different layers.

[0118] One side of the multiple connecting wires (CL1, CL2) may overlap with the first contact area (CTA1) of the link area (LKA), and the other side may overlap with the second contact area (CTA2) of the pad area (PDA).

[0119] The portions of the first connecting wire (CL1) and the second connecting wire (CL2) that are placed in the link area (LKA) can be arranged to overlap each other in the upper and lower directions along the first direction (DR1), which is the vertical direction (Y) from the first contact area (CTA1).

[0120] In the bending area (BDA), the first connecting wire (CL1) and the second connecting wire (CL2) may be arranged along different directions. For example, each of the first connecting wire (CL1) and the second connecting wire (CL2) may include at least one deflection point in the bending area (BDA). For example, the first connecting wire (CL1) and the second connecting wire (CL2) may include a first deflection point (DP1), a second deflection point (DP2), and a third deflection point (DP3). The first deflection point (DP1) may be located in the bending area (BDA) adjacent to the link area (LKA), and the third deflection point (DP3) may be located in the bending area (BDA) adjacent to the pad area (PDA). Additionally, the second deflection point (DP2) may be located between the first deflection point (DP1) and the third deflection point (DP3).

[0121] The first connecting wire (CL1) may be positioned at the first bending point (DP1) in a second direction (DR2) different from the first direction (DR1), and at the third bending point (DP3) in a third direction (DR3) different from the second direction (DR2). Also, at the second bending point (DP2), it may be positioned along the same direction as the first direction (DR1). For example, the second direction (DR2) may be a diagonal direction facing the lower left direction. The third direction (DR3) may be a diagonal direction facing the lower right direction.

[0122] The other side of the first connecting wire (CL1) extended from the third bending point (DP3) toward the pad area (PDA) may be arranged to overlap the second connecting wire (CL2) above and below along the first direction (DR1), which is the vertical direction (Y) from the second contact area (CTA1) on the pad area (PDA).

[0123] The second connecting wire (CL2) may be positioned in a direction different from the first connecting wire (CL1) at the first bending point (DP1) and the third bending point (DP3). For example, the second connecting wire (CL2) may be positioned in a third direction (DR3) different from the first direction (DR1) and the second direction (DR2) at the first bending point (DP1). Accordingly, the first connecting wire (CL1) and the second connecting wire (CL2), to which a single signal is supplied, may not overlap each other in the upper and lower directions in the bending area (BDA).

[0124] Additionally, the second connecting wire (CL2) may be positioned at the third bending point (DP3) in a second direction (DR2) different from the first direction (DR1) and the third direction (DR3). Furthermore, at the second bending point (DP2), the second connecting wire (CL2) may be positioned along the same direction as the first direction (DR1). For example, the second direction (DR2) may be a diagonal direction facing the lower left direction. The third direction (DR3) may be a diagonal direction facing the lower right direction.

[0125] The other side of the second connecting wire (CL2) positioned in the direction of the pad area (PDA) at the third bending point (DP3) can be positioned to overlap the first connecting wire (CL1) above and below along the first direction (DR1), which is the vertical direction (Y) from the second contact area (CTA2) on the pad area (PDA).

[0126] One side of a plurality of connecting wires (CL1, CL2) extended to a pad area (PDA) through a bending area (BDA) and the other side opposite to it may overlap with a second contact area (CTA2) of the pad area (PDA). One side of the plurality of connecting wires (CL1, CL2) may be electrically connected to a first signal link wire (SL1) in a first contact area (CTA1), and the other side may be electrically connected to a second signal link wire (SL2) in a second contact area (CTA2).

[0127] Referring to FIG. 8, each of the plurality of connecting wires (CL1, CL2) may have odd-numbered wires and even-numbered wires arranged alternately. For example, the first connecting wire (CL1) may include a plurality of first-1 connecting wires (CL1_n) which are odd-numbered wires and a plurality of first-2 connecting wires (CL1_n+1) which are even-numbered wires (n is a natural number). The plurality of first-1 connecting wires (CL1_n) and the plurality of first-2 connecting wires (CL1_n+1) may be arranged on the same layer. This will be described later with reference to FIG. 9.

[0128] For example, the second connecting wire (CL2) may include a plurality of second-1 connecting wires (CL2_n) that are odd-numbered wires and a plurality of second-2 connecting wires (CL2_n+1) that are even-numbered wires (n is a natural number). The plurality of second-1 connecting wires (CL2_n) and the plurality of second-2 connecting wires (CL2_n+1) may be arranged on the same layer. This will be described later with reference to FIG. 9.

[0129] Referring to FIGS. 9 and 10, a first buffer layer (205) may be disposed on a link region (LKA) of a substrate (201). A first insulating structure (213) comprising an inorganic insulating material may be disposed on the first buffer layer (205).

[0130] A first signal link wiring (SL1) may be disposed on the first insulating structure (213). For example, the first signal link wiring (SL1) may be a data link line, but is not limited thereto. A second insulating structure (219) comprising an inorganic insulating material may be disposed on the first signal link wiring (SL1). Since the first buffer layer (205), the first insulating structure (210), and the second insulating structure (219) of the substrate (201) are disposed within the link region (LKA), the ends of these layers may define the boundary between the link region (LKA) and the bending region (BDA). For example, the end of the first buffer layer (205) disposed at the bottom of the insulating laminated structure may define the boundary between the bending region (BDA) and the link region (LKA). For example, the ends of each of the first buffer layer (205), the first insulating structure (210), and the second insulating structure (219) may be configured in an inclined surface shape.

[0131] A first connecting wire (CL2) may be placed on the second insulating structure (219). The first connecting wire (CL2) may be formed in the same process as the second source electrode (245) and the second drain electrode (246) on the display area (AA) using the same material. The first connecting wire (CL2) may be electrically connected to the first signal link wire (SL1). For example, a portion of the first connecting wire (CL2) may pass through the second insulating structure (219) to connect to the first signal link wire (SL1).

[0132] The first connecting wire (CL2) may be extended in the direction of the bending area (BDA). For example, the first connecting wire (CL2) may be positioned along the inclined surface of the end portion of the second insulating structure (219), the first insulating structure (213), and the first buffer layer (205) to extend to the bending area (BDA). The first connecting wire (CL1) extended to the bending area (BDA) may be extended to the pad area (PDA).

[0133] The first buffer layer (205), the first insulating structure (213), and the second insulating structure (219) may not be disposed in the bending region (BDA) of the substrate (201). Accordingly, the first connecting wire (CL1) may be disposed to be in direct contact with the second base layer (203) of the substrate (201).

[0134] A first flattening layer (251) may be disposed on the first connecting wire (CL1) of the link region (LKA) and the bending region (BDA). A second connecting wire (CL2) may be disposed on the first flattening layer (251). The second connecting wire (CL2) may extend through the link region (LKA) and the bending region (BDA) to the pad region (PDA). The second connecting wire (CL2) may be formed in the same process with the same material as the pixel contact electrode (255) of the display region (AA). In one example, the second connecting wire (CL2) may have a multilayer structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0135] The second connecting wire (CL2) can be connected to the first connecting wire (CL1) by penetrating the first flattening layer (251) in the first contact area (CTA1) of the link area (LKA). Accordingly, the second connecting wire (CL2) can be electrically connected to the first signal link wire (SL1) through the first connecting wire (CL1). In one example, the first connecting wire (CL1) is placed in each first contact area (CTA1), and adjacent first connecting wires (CL1) can be insulated from each other.

[0136] A second flattening layer (252) may be disposed on the first flattening layer (251) and the second connecting wire (CL2). The second flattening layer (252) may be disposed on the link region (LKA) and bending region (BDA) of the substrate (201) while covering the second connecting wire (CL2). The second flattening layer (252) may flatten the step difference caused by the lower circuit elements.

[0137] An organic insulating structure (266) may be placed on the second flattening layer (252) of the link region (LKA) and the bending region (BDA). The organic insulating structure (266) may be formed in the same process with the same material as the bank (262) and spacer (264) of the display region (AA).

[0138] Accordingly, a first flattening layer (251), a second flattening layer (252), and an organic insulating structure (266) comprising an organic insulating material may be disposed on the substrate (201) of the bending region (BDA).

[0139] Referring to FIGS. 8 and 9, each of the plurality of connecting wires (CL1, CL2) may be arranged on the same layer with odd-numbered wires and even-numbered wires alternating with each other. FIG. 9 shows a configuration in which a plurality of first connecting wires (CL1) are arranged on a second base layer (203) of a substrate (201) as an example for explanation. For example, a plurality of first connecting wires (CL1) may be arranged such that the 100th first connecting wire (CL1_100), the 101st first connecting wire (CL1_101), the 102nd first connecting wire (CL1_102), the 103rd first connecting wire (CL1_103), the 104th first connecting wire (CL1_102), the 105th first connecting wire (CL1_105), the 106th first connecting wire (CL1_106), the 107th first connecting wire (CL1_107), and the 108th first connecting wire (CL1_108) are arranged alternately.

[0140] A first flattening layer (251) may be placed on the 101st first connecting wire (CL1_101) to the 108th first connecting wire (CL1_108).

[0141] A plurality of second connecting wires (CL2) may be disposed on the first flattening layer (251). For example, the plurality of second connecting wires (CL2) may include a 93rd second connecting wire (CL2_93), a 94th second connecting wire (CL2_94), a 95th second connecting wire (CL2_95), a 96th second connecting wire (CL2_96), a 97th second connecting wire (CL2_97), a 98th second connecting wire (CL2_98), a 99th second connecting wire (CL2_99), a 100th second connecting wire (CL2_100), and a 101st second connecting wire (CL2_101).

[0142] For example, the 100th second connection wire (CL2_100) may be provided with the same signal from the printed circuit board (104, see FIG. 1) through the pad area (PDA) as the 100th first connection wire (CL1_100) placed on the substrate (201), which is a different layer from the 100th second connection wire (CL2_100). For example, the 101st second connection wire (CL2_101) may be provided with the same signal as the 101st first connection wire (CL1_101) placed on a different layer.

[0143] Among the plurality of first connecting wires (CL1) placed in the lower part, the 93rd first connecting wire (CL1_93) to the 108th connecting wire (CL1_101) are each moved and placed in the second direction (DR2) from the first bending point (DP1), and among the plurality of second connecting wires (CL2) placed in the upper part which are different layers and provided with the same signal, the 93rd first connecting wire (CL1_93) to the 101st connecting wire (CL1_101) are moved and placed in the third direction (DR3) different from the second direction (DR2), so that the first connecting wire (CL1) and the second connecting wire (CL2) provided with the same signal do not overlap in the upper and lower directions.

[0144] The odd-numbered first-1 connecting wires (CL1_n) positioned below the insulating layer, which is a first flattening layer (251), can be positioned to overlap in the upper and lower directions with the even-numbered second-2 connecting wires (CL2_n+1) positioned above the insulating layer. The second-2 connecting wires (CL2_n+1) include the n-th second-2 connecting wire (n is a natural number) among a plurality of second connecting wires (CL2), and the first-1 connecting wires (CL1_n) that overlap in the upper and lower directions with the second-2 connecting wires (CL2_n+1) include the first-1 connecting wire (CL1_n, n is a natural number) at the n+7th position, which is a wire positioned at least seven lines apart from the second-2 connecting wire (CL2_n+1) at the n-th position among the plurality of second connecting wires (CL2).

[0145] For example, the 100th first connection wire (CL1_100) may overlap with the 93rd second connection wire (CL2_93) in the upper and lower directions. Also, the 107th first connection wire (CL1_107) may overlap with the 100th second connection wire (CL2_100) in the upper and lower directions. Accordingly, the 100th first connection wire (CL1_100) and the 100th second connection wire (CL2_100), which are provided with the same signal, may be placed at a spaced-apart location on different layers without overlapping in the upper and lower directions. For example, the 100th second connection wire (CL2_100) may be placed at a location moved to the right by at least 7 lines from the 100th first connection wire (CL1_100).

[0146] Accordingly, even if a crack (CR) caused by an external force occurs at the location (A') where the 100th second connecting wire (CL2_100) is placed, the location (A) where the 100th first connecting wire (CL1_100) is placed, which provides the same signal, is positioned at least 7 lines to the left from the 100th second connecting wire (CL2_100), so it may not be affected by the crack. Accordingly, the signal can be transmitted in the direction of the display area (AA) through the 100th first connecting wire (CL1_100), so the display device can be operated normally.

[0147] Additionally, a crack (CR) occurring at the location (A') where the 100th second connecting wire (CL2_100) is placed may propagate vertically and damage the 107th first connecting wire (CL1_107) that overlaps the 100th second connecting wire (CL2_100) in the upper and lower directions. However, even in this case, the 107th second connecting wire (not shown), which is provided with the same signal as the 107th first connecting wire (CL1_107), may not be affected by the crack. Accordingly, since a signal can be transmitted in the direction of the display area (AA) through the 107th second connecting wire (CL2_107), the display device can be operated normally.

[0148] Therefore, even if cracks caused by external forces occur in some of the connecting wires supplying signals to the display area, signals or voltages for the operation of the display area can be stably provided, thereby improving product reliability. Consequently, the failure rate of the display device caused by damage to the connecting wires is reduced, which can lower the production energy required for additional production of the display device and thus have the effect of reducing greenhouse gas emissions.

[0149] A display device according to various embodiments of the present specification may be described as follows.

[0150] A display device according to an embodiment of the present specification comprises a substrate including a display area and a non-display area disposed outside the display area, a link area, a bending area, and a pad area located in the non-display area, a plurality of first signal link wires disposed in the link area, a plurality of second signal link wires disposed in the pad area, and a plurality of connecting wires disposed in the bending area and connecting the plurality of first signal link wires and the plurality of second signal link wires, respectively, and the plurality of connecting wires may include a plurality of first connecting wires and a plurality of second connecting wires disposed on different layers with an insulating layer in between.

[0151] According to various embodiments of the present specification, each of the first signal link wirings disposed in the link area may overlap with the first connection wiring and the second connection wiring in the upper and lower directions.

[0152] According to various embodiments of the present specification, each first connecting wire and second connecting wire may include at least one bending point that bends in different directions in the bending area.

[0153] According to various embodiments of the present specification, a bending point may include a first bending point located in a bending area adjacent to a link area; a third bending point located in a bending area adjacent to a pad area; and a second bending point positioned between the first bending point and the third bending point.

[0154] According to various embodiments of the present specification, the first connecting wiring is arranged in a first direction which is the vertical direction of the display area in the link area, is arranged along a second direction different from the first direction at a first bending point, is arranged along a third direction different from the second direction at a third bending point, and the second bending point is in the same direction as the first direction, wherein the second direction is a diagonal direction toward the lower left direction and the third direction may include a diagonal direction toward the lower right direction.

[0155] According to various embodiments of the present specification, the second connecting wiring is arranged in a first direction which is vertical to the display area in the link area, is arranged along a third direction different from the first direction at a first bending point, is arranged along a second direction different from the third direction at a third bending point, and the second bending point is in the same direction as the first direction, wherein the second direction is a diagonal direction toward the lower left direction and the third direction may include a diagonal direction toward the lower right direction.

[0156] According to various embodiments of the present specification, a plurality of first connecting wires may include first-1 connecting wires and first-2 connecting wires arranged alternately with one another, and a plurality of second connecting wires may include second-1 connecting wires and second-2 connecting wires arranged alternately with one another.

[0157] According to various embodiments of the present specification, the 1-1 connecting wire and the 2-1 connecting wire may each be odd-numbered wires, and the 1-2 connecting wire and the 2-2 connecting wire may each include even-numbered wires.

[0158] According to various embodiments of the present specification, a first-1 connecting wire positioned at the bottom with an insulating layer in between may be positioned to overlap with a second-2 connecting wire positioned at the top of the insulating layer in the upper and lower directions.

[0159] According to various embodiments of the present specification, the second-2 connecting wire includes the nth second-2 connecting wire (n is a natural number) among a plurality of second connecting wires, and the first-1 connecting wire that overlaps with the second-2 connecting wire in the upper and lower directions may include the n+7th first-1 connecting wire (n is a natural number) which is a wire located at least seven lines apart from the nth second-2 connecting wire among a plurality of second connecting wires.

[0160] According to various embodiments of the present specification, the first connecting wire and the second connecting wire can provide the same signal to the display area.

[0161] According to various embodiments of the present specification, the insulating layer may include an organic insulating layer.

[0162] Although the embodiments of this specification have been described in more detail with reference to the attached drawings, this specification is not necessarily limited to these embodiments and may be modified in various ways within the scope of the technical spirit of this specification. Accordingly, the embodiments disclosed in this specification are intended to explain, not limit, the technical spirit of this specification, and the scope of the technical spirit of this specification is not limited by these embodiments. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0163] 1: Display device 200: Display panel AA: Display area NAA: Non-display area LKA: Link Area BDA: Bending area PDA: Pad area SL1: First signal link wiring SL2: Second signal link wiring CTA1: 1st contact area CTA2: Second contact area CL1: First connecting wire CL2: Second connecting wire

Claims

Claim 1 A display device comprising: a substrate including a display area and a non-display area disposed outside the display area; a link area, a bending area, and a pad area located in the non-display area; a plurality of first signal link wires disposed in the link area; a plurality of second signal link wires disposed in the pad area; and a plurality of connecting wires disposed in the bending area and connecting the plurality of first signal link wires and the plurality of second signal link wires, respectively, wherein the plurality of connecting wires include a plurality of first connecting wires and a plurality of second connecting wires disposed on different layers with an insulating layer in between. Claim 2 A display device according to claim 1, wherein each of the first signal link wirings arranged in the link area overlaps the first connecting wiring and the second connecting wiring in the upper and lower directions. Claim 3 A display device according to claim 1, wherein each of the second signal link wirings disposed in the pad area overlaps the first connection wiring and the second connection wiring in the upper and lower directions. Claim 4 A display device according to claim 1, wherein each first connecting wire and second connecting wire includes at least one bending point that bends in different directions in the bending area. Claim 5 A display device according to claim 4, wherein the inflection point comprises: a first inflection point located in a bending area adjacent to the link area; a third inflection point located in a bending area adjacent to the pad area; and a second inflection point disposed between the first inflection point and the third inflection point. Claim 6 A display device according to claim 5, wherein the first connecting wire is arranged in a first direction which is vertical to the display area in the link area, is arranged along a second direction different from the first direction at the first bending point, is arranged along a third direction different from the second direction at the third bending point, and the second bending point is in the same direction as the first direction, wherein the second direction is a diagonal direction toward the lower left direction, and the third direction is a diagonal direction toward the lower right direction. Claim 7 A display device according to claim 5, wherein the second connecting wire is arranged in a first direction which is vertical to the display area in the link area, is arranged along a third direction different from the first direction at the first bending point, is arranged along a second direction different from the third direction at the third bending point, and the second bending point is in the same direction as the first direction, wherein the second direction is a diagonal direction toward the lower left direction and the third direction is a diagonal direction toward the lower right direction. Claim 8 A display device according to claim 1, wherein the plurality of first connecting wires include first-1 connecting wires and first-2 connecting wires arranged alternately with each other, and the plurality of second connecting wires include second-1 connecting wires and second-2 connecting wires arranged alternately with each other. Claim 9 A display device according to claim 8, wherein the 1-1 connecting wire and the 2-1 connecting wire are each odd-numbered wires, and the 1-2 connecting wire and the 2-2 connecting wire are each even-numbered wires. Claim 10 In claim 9, the display device wherein the first-1 connecting wire positioned at the bottom with the insulating layer in between is positioned to overlap the second-2 connecting wire positioned at the top of the insulating layer in the upper and lower directions. Claim 11 In claim 9, the display device wherein the first-2 connecting wires positioned at the bottom with the insulating layer in between are positioned to overlap the second-1 connecting wires positioned at the top of the insulating layer in the upper and lower directions. Claim 12 A display device according to claim 10, wherein the second-2 connecting wire comprises the nth second-2 connecting wire (n is a natural number) among a plurality of second connecting wires, and the first-1 connecting wire, which overlaps with the second-2 connecting wire in the upper and lower directions, comprises the n+7th first-1 connecting wire (n is a natural number) which is a wire positioned at least seven lines apart from the nth second-2 connecting wire among a plurality of second connecting wires. Claim 13 A display device according to claim 1, wherein the first connecting wire and the second connecting wire provide the same signal to the display area. Claim 14 A display device according to claim 1, wherein the insulating layer comprises an organic insulating layer.

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