Wafer-based solar cell, and method for manufacturing a wafer-based solar cell

KR1020260124142APending Publication Date: 2026-08-14HANWHA Q CELLS GMBH
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
KR1020267022156
Authority / Receiving Office
KR · KR
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-15
Filing Date
2024-12-10
Publication Date
2026-08-14

Smart Images

  • Figure PCT00002_ABST
    Figure PCT00002_ABST
Patent Text Reader

Abstract

The present invention relates to a wafer-based solar cell comprising a semiconductor wafer (1) made of a semiconductor material and having at least one p-doping region (2) and at least one n-doping region (3) on the surface of the semiconductor wafer, wherein each of the p-doping region (2) and / or n-doping region (3) is electrically contacted with a metal electrode structure (4) attached to the surface of the semiconductor wafer through opening regions (8) and current contact regions (5) located within said opening regions, and each metal electrode structure (4) covers an electrode covering surface on the surface of the semiconductor wafer. According to the present invention, the opening regions (8) occupy less than 25%, preferably less than 15%, particularly preferably less than 10% of the electrode covering surface, and the current contact regions (5) are formed with a surface density of 1,000 to 50,000, preferably 3,000 to 30,000, particularly preferably 5,000 to 15,000 current contact regions (5) per square millimeter of the electrode covering surface. The present invention also relates to a method for manufacturing such a wafer-based solar cell.
Need to check novelty before this filing date? Find Prior Art

Description

Technology Field

[0001] The present invention relates to a wafer solar cell and a method for manufacturing such a wafer solar cell. Within the meaning of the present invention, a wafer solar cell is considered to be any solar cell manufactured using a semiconductor wafer, wherein the semiconductor wafer used forms the structural framework of the solar cell. This means that no additional substrate material is required in addition to the semiconductor wafer. Such a wafer solar cell having a semiconductor wafer made of a semiconductor material has a semiconductor wafer surface, at least one p-doped region, and at least one n-doped region, wherein the p-doped region and / or n-doped region each make electrical contact with a metal electrode structure attached to the semiconductor wafer surface through current contact regions, and each metal electrode structure covers an electrode covering face on the semiconductor wafer surface. Background Technology

[0002] Metal electrode structures are important for removing charge carriers from wafer solar cells in the form of current flow. Typically, the surface of a semiconductor wafer in a wafer solar cell is passivated by a dielectric passivation layer. To enable the removal of charge carriers from the semiconductor wafer, the two-polarity metal electrode structures must penetrate the dielectric passivation layer, which is electrically non-conductive in at least certain areas. To achieve this, the passivation layer is removed in specific areas to create opening regions. Within these opening regions, electrical contact is established between the semiconductor surface and the metal electrode structures using so-called current contact regions. Current contact regions generally do not occupy the same area as the opening regions.

[0003] To manufacture aperture regions and current contact regions, for example in a screen printing method, a metal paste is printed on a passivation layer, and the metal paste etches or burns away the dielectric passivation layer in at least specific areas during a subsequent tempering step. Within the aperture regions of the passivation layer created in this way, electrical metal-semiconductor contacts are formed in the form of the aforementioned current contact regions. These current contact regions are critical to the electrical contact resistance between the metal electrode structure and the doped semiconductor wafer surface of the wafer solar cell. This contact resistance must be as low as possible. Therefore, the composition of the metal paste and / or the subsequent tempering step, for example with respect to the glass frit etching the passivation layer, are adjusted so that a relatively large area of ​​the passivation layer is etched away to increase the likelihood of obtaining metal-semiconductor contacts with high electrical conductivity in the form of current contact regions. However, the opening regions of the passivation layer represent recombination centers for charge carriers separated from the semiconductor wafer, and as a result, the efficiency of the wafer solar cell is reduced by increased unwanted recombination. Therefore, a compromise is usually made between the efficiency reduction caused by increased recombination and the areal opening portion and contact resistance of the passivation layer that affect the recombination centers. This compromise often provides a degree of opening of the passivation layer in the form of opening regions with a coverage of less than 50% of the electrode covering surface beneath the metal electrode structure.

[0004] Excessively high contact resistance and contact recombination activity are the primary causes of reduced efficiency in wafer solar cells after the application of metal electrode structures. The so-called LECO (Laser Enhanced Contact Optimization) process enables highly controllable and localized improvement of the contact resistance of wafer solar cells after the metal electrode structure has been applied and burned in. Such a method is described, for example, in DE 10 2016 009 560 A1. In this method, electrical contact is made on the front and back surfaces of the wafer solar cell at each metal electrode structure formed as a contact grid on the front surface. The wafer solar cell is then locally irradiated under reverse voltage. The local illumination is generated, for example, by a laser, which scans the wafer solar cell to treat the entire surface of the wafer solar cell. The established current flows from the operating point where the laser is irradiated to the contacts of the wafer solar cell. Due to resistance, a portion of the voltage drops at the solar cell contacts. Accordingly, points close to the contact experience different effective process parameters than points far from the contact. Consequently, the applied reverse voltage, which significantly affects process quality, is unevenly distributed across the entire wafer solar cell. In this way, contact resistance can be improved retrospectively by creating more current contact areas without increasing the density of recombination centers when considered in terms of area.

[0005] In addition, there is a need for wafer solar cells with improved contact resistance and methods for manufacturing them.

[0006] The object of the present invention is to provide a wafer solar cell having improved contact resistance and a method for manufacturing a wafer solar cell to increase the efficiency of the wafer solar cell.

[0007] According to the present invention, this objective is achieved by a wafer solar cell having the features of claim 1 and a method of manufacturing having the features of claim 7. Advantageous improvements and variations are specified in dependent claims.

[0008] Wafer solar cells have improved contact resistance and a consequently improved filling factor. The method of manufacturing such wafer solar cells results in wafer solar cells with improved contact resistance without a significant increase in the recombination rate at the electrode surface.

[0009] The present invention provides that the opening regions occupy less than 25%, preferably less than 15%, and particularly preferably less than 10% of the electrode coating surface, and that the current contact regions are formed with a surface density of 1,000 to 50,000, preferably 3,000 to 30,000, and particularly preferably 5,000 to 15,000 current contact regions per square millimeter of the electrode coating surface.

[0010] At low area coverage of aperture regions, the specific microstructure of the claimed current contact regions, namely the form of a sum of multiple fine current contact regions, was found to lead to a favorable combination of relatively low contact resistance and low recombination activity. This combination entails increased efficiency of the wafer solar cell. The area coverage of the current contact regions is preferably less than 1%, and much more preferably less than 0.2%, based on the electrode coverage surface.

[0011] Preferably, the individual current contact regions are 3 μm 2 Less than, preferably 1.5 μm 2 Less than, particularly preferably 0.5 μm 2It is established that the current contact regions are spaced apart from each other for most of the current contact regions, having an area of ​​less than 50%. In this case, most is understood to mean a ratio of more than 50%.

[0012] Wafer solar cells are advantageously designed to consist of many individual regions with aperture regions spaced apart from each other, which are mainly arranged within polygonally adjacent pyramid-shaped semiconductor structures, and the pyramid-shaped semiconductor structures have polygonally arranged edges with lengths ranging from more than 1 micrometer.

[0013] More preferably, the wafer solar cell is characterized by having only a single aperture region disposed within a majority of the pyramid-shaped semiconductor structures. A majority should be understood to mean a ratio of more than 50%.

[0014] In an advantageous improved form of a wafer solar cell, the aperture regions within the pyramidal semiconductor structures occupy a smaller area compared to the area covered by these pyramidal semiconductor structures, preferably less than 50% of the area, and particularly preferably less than 25% of the area.

[0015] Pyramid-shaped semiconductor structures form three-dimensional surfaces. Therefore, wafer solar cells are advantageously designed so that aperture regions are mainly located at the tip regions of the pyramid-shaped semiconductor structures, and these tip regions are spatially closest to the semiconductor material to which electrical contact will be made when considered in terms of their three-dimensional topology.

[0016] The semiconductor wafer material is preferably silicon. The p-doped region and the n-doped region may be disposed on the same side or opposite sides of the wafer solar cell. The wafer solar cell has a front side facing the sun and a rear side facing away from the sun. The metal electrode structure on the front side is preferably formed by a plurality of electrode fingers with or without a busbar, or by a contact grid. The metal electrode structure on the rear side may be formed by a plurality of electrode fingers with or without a busbar, by a contact grid, or across the full surface.

[0017] In a preferred embodiment, the wafer solar cell has a passivation layer between the metal electrode structure and the semiconductor material in regions around the aperture regions. The passivation layer is typically AlO. x (Aluminum oxide), SiN x (Silicon nitride), SiO x N y (Silicon oxynitride), SiO x It is composed of a material selected from the group consisting of silicon oxide and / or poly-Si (polycrystalline silicon). The passivation layer may be composed of a single material among these materials, but preferably consists of a combination of multiple stacked stacks of these materials. The passivation layer, whether a single layer or a stacked stack, preferably has a total layer thickness of 70 to 200 nm. The dielectric passivation layer reduces the recombination activity of electric charge carriers separated from the semiconductor material.

[0018] Preferably, the wafer solar cell has an additional separating layer between the metal electrode structure and the semiconductor material in regions surrounding the aperture regions on the passivation layer. Preferably, the additional separating layer is selected from the group consisting of transparent conductive oxides (TCOs) such as indium-tin oxide, tungsten-doped indium oxide, aluminum-doped zinc oxide, and zinc-doped indium oxide, and the group consisting of non-conductive oxides selected from the group consisting of nickel oxide, titanium oxide, and magnesium fluoride. This additional separating layer has a layer thickness of less than 80 nm, preferably less than 40 nm, and particularly preferably less than 20 nm. In the process of manufacturing the wafer solar cell, the metal electrode structure is applied to this additional separating layer. The additional barrier of the separating layer further contributes to ensuring that the aperture regions occupy only a small portion of the electrode covering surface and to ensuring that a wafer solar cell having a relatively high specific contact resistance is produced first.

[0019] Furthermore, in a more preferred embodiment, current contact regions located in the opening regions have metal crystallites and / or a metal-silicon alloy adjacent to or protruding into the metal electrode structure. These enable improved contact resistance. These advantageous structures are formed, for example, by a combination of the structural features described above and method steps during manufacturing described in more detail below.

[0020] The wafer solar cell is preferably a PERC (Passivated Emitter Rear Contact), TopCon (Tunnel Oxide Passivated Contact), or IBC (Interdigitated Back Contact) solar cell.

[0021] The present invention also relates to a method for manufacturing a wafer solar cell comprising the aforementioned structural features, wherein the following method steps are used:

[0022] - A step of providing a semiconductor wafer made of a semiconductor material and comprising a semiconductor wafer surface, at least one p-doped region and at least one n-doped region, and having at least one pn junction and a passivation layer deposited on the semiconductor surface,

[0023] - A step of applying a metal electrode structure to the passivation layer such that the metal electrode structure covers the electrode coating surface on the surface of the semiconductor wafer,

[0024] - In a first heat treatment step, heating a semiconductor wafer within a first temperature window of 500 to 850 ℃ so that the metal electrode structure electrically contacts the semiconductor material through opening regions of the passivation layer that occupy less than 25%, preferably less than 15%, particularly preferably less than 10% of the electrode coating surface, and through current contact regions located in these opening regions, and also having an efficiency of less than 18% in the case of an average specific contact resistance (i.e., contact resistance averaged across the surface of the wafer solar cell) of greater than 10 mOhm㎠, preferably greater than 20 mOhm㎠, particularly preferably greater than 50 mOhm㎠.

[0025] - A step of performing an additional processing step for optimizing thermal and / or electrical contact resistance such that the current contact regions are formed within the opening regions with a surface density of 1,000 to 50,000, preferably 3,000 to 30,000, particularly preferably 5,000 to 15,000 current contact regions per square millimeter of the electrode coating surface.

[0026] As a result of the fact that the aperture areas occupy less than 25%, preferably less than 20%, and particularly preferably less than 15% of the electrode coating surface, the passivation layers on the front and / or back are damaged in only a relatively small area. Consequently, the passivation characteristics of the passivation layer, which are beneficial to the efficiency of the wafer solar cell, are maintained over a relatively larger range.

[0027] The first and second processing steps may be applied when either only one or both sides of the front and back surfaces of the semiconductor wafer material provided with the metal electrode structure have the aforementioned features. The manufactured wafer solar cell is preferably bifacial.

[0028] The metal electrode structure is preferably applied by spray printing or screen printing a metal paste. This has, for example, Ni, Cu, Ag, Al, Si and / or alloys thereof.

[0029] Preferably, the passivation layer is manufactured in the form of a monolithic layer or a layer package on a semiconductor wafer provided in such a way that a relatively high contact resistance is provided at high passivation quality. This can be achieved by adding an additional separation layer and / or by making the passivation layer thicker than usual.

[0030] In a preferred embodiment, the passivation layer is formed with a layer thickness greater than 50 nm, preferably in the range of 70 to 200 nm. Alternatively or additionally preferably, an additional separation layer having a layer thickness of less than 40 nm, preferably less than 30 nm, is provided on the passivation layer. This additional separation layer is located on one side of the passivation layer facing away from the semiconductor wafer material.

[0031] Additional processing steps are selected as individual steps or as a combination of steps, preferably from the group consisting of the following:

[0032] - LECO stage (Laser Enhanced Contact Optimization),

[0033] - Tempering stage,

[0034] - Laser heating step, and

[0035] - Photonic sintering.

[0036] Individual or combined steps also ensure that sufficiently low contact resistance is generated for the wafer solar cell. Additional current contact regions are created within the aperture regions without significantly increasing the area ratio of the aperture regions.

[0037] The LECO step should be understood to mean that electrical contact is made on both sides of the wafer solar cell—i.e., the front and back—and while a reverse voltage is applied, a light source, such as a laser beam or a point light source, scans the surface of the wafer solar cell and heats it locally. At least one of the electrical front and back contacts does not span the full surface or is movable, so that, for example, it is possible to irradiate this side with a point light source alternately with other contacts. The electrical contacts are connected to a voltage source, and preferably, a voltage below the breakdown voltage of the wafer solar cell is applied in the reverse direction. Then, the light source is guided upward so that one or both of the front and back of the wafer solar cell are irradiated locally.

[0038] In particular, bifacial wafer solar cells can be irradiated and processed from both sides. Preferably, the front side of the wafer solar cell, representing the sun-facing side, has a lower degree of metallization than the back side, representing the sun-averse side. On the front, a lower degree of metallization balances optical and electrical losses, as the sun-facing side of the solar cell must be as obscured as possible. However, on the back, since optical losses play a negligible role, the optimal point shifts toward a higher degree of metallization toward a larger contact surface, for example, through more and / or wider contact fingers. An increase in the number of fingers also shortens the distance within the wafer solar cell for the generated charge carriers. When the wafer solar cell is irradiated from the back, the front side, which has higher resistance, is placed on the full-surface contact. The resistance at the full-surface contact is very low. Since the back side has lower resistance as described, the voltage loss / voltage drop from the contact point to the operating point, i.e., the irradiated point, is lower. Therefore, this method acts more uniformly across the entire wafer solar cell.

[0039] The tempering step should be understood as meaning heating in a furnace to a temperature in the range of 500°C to 850°C.

[0040] The laser heating step should be understood to mean heating to a temperature in the range of 500°C to 850°C using a laser.

[0041] Photonic sintering should be understood as meaning sintering, which means joining materials below their typical melting point to form a solid using pulsed laser light along with localized heating.

[0042] Furthermore, in a more preferred embodiment, the additional processing step includes a LECO step in which the wafer solar cell is irradiated with a laser from the back side facing away from the sun or the front side facing the sun. It may be advantageous to combine the laser radiation through the corresponding side of the wafer solar cell that scatters less light. This is, for example, a surface with low roughness that is chemically etched or mechanically polished. Typically, this is the back side of the wafer solar cell. This means that the transmitted light acts only locally and generates current over a smaller area. The final local current flow also acts over a smaller area and can be better controlled.

[0043] Preferably, the additional processing step includes a LECO step in which the wafer solar cell is irradiated with a power density of 200 to 1,500,000 W / cm². In a preferred embodiment, the additional processing step includes a LECO step in which an applied reverse voltage is 1 to 40 V in the direction opposite to the forward voltage applied to the solar cell, and a local current of 0.5 to 20 A flows. This local current can be achieved, for example, by a suitable light source such as a laser having a specific wavelength. A light source having the aforementioned power density, preferably a laser, is advantageous.

[0044] Further advantages and features of the present invention are illustrated using the preferred exemplary embodiments described below. The drawings are not drawn to scale but are purely schematic and illustrative. Brief explanation of the drawing

[0045] Figure 1 shows a cross-sectional view of a wafer solar cell according to the prior art. Figure 2 shows a cross-sectional view of a wafer solar cell according to the present invention. FIG. 3 shows a cross-sectional view of another wafer solar cell according to the present invention. Figure 4 shows a flowchart of a manufacturing method according to the present invention. Figure 5 shows a microscopic image of a wafer solar cell that has undergone a plurality of steps of the method illustrated in Figure 4. Figure 6 shows another microscope image of a wafer solar cell that has undergone the method illustrated in Figure 4. Specific details for implementing the invention

[0046] FIG. 1 shows a cross-sectional view of a wafer solar cell according to the prior art. The wafer solar cell has a semiconductor wafer (1) having a semiconductor wafer surface including a front and a back surface. An n-doping region (3) is formed in the front surface, while a p-doping region (2) is formed in the back surface. A passivation layer (6) is applied to both the n-doping region (3) and the p-doping region (2), respectively. A metal electrode structure (4) in the form of a finger electrode is disposed on each passivation layer (6), respectively. The metal electrode structure (4) covers the electrode covering surface when considered in a plan view of the front or back surface. The metal electrode structures (4) are electrically connected to the n-doping or p-doping regions (3, 2) through current contact regions (5) located within the opening regions (8) of the passivation layer (6), respectively. In this wafer solar cell, because the metal electrode structures (4) almost completely penetrate the passivation layers (6) during the manufacturing process to form opening regions (8), the opening regions (8) of the passivation layer (6) occupy significantly more than 50% of the electrode covering surface. The spatial arrangement of the n-doping region (3) and the p-doping region (2) may be opposite to the arrangement shown in FIG. 1.

[0047] FIG. 2 shows a cross-sectional view of a wafer solar cell (1) according to the present invention. The wafer solar cell (1) shown in FIG. 2 corresponds to the wafer solar cell shown in FIG. 1, but differs in that the opening regions (8) of the passivation layer (6) occupy less than 25% of the electrode covering surface, and from a microscopic perspective, the surface density of current contact regions (5) is formed in the range of 1,000 to 10,000, preferably 3,000 to 8,000, particularly preferably 4,000 to 6,000 per square millimeter of the electrode covering surface.

[0048] FIG. 3 shows a cross-sectional view of another wafer solar cell according to the present invention. The wafer solar cell (1) shown in FIG. 3 corresponds to the wafer solar cell shown in FIG. 1, but differs in that an additional separating layer (7) is disposed between the passivation layer (6) and the metal electrode structure (4). In the manufacturing method, the additional separating layer (7) supports a desirable and low surface coverage rate of the opening regions (8) of the passivation layer (6) in the aforementioned microstructure.

[0049] FIG. 4 shows a flowchart of a method according to the present invention. The manufacturing method comprises the following steps: First, a step (21) is performed in the form of providing a semiconductor wafer made of a semiconductor material, comprising a semiconductor wafer surface, at least one p-doped region and at least one n-doped region, at least one pn junction, and a passivation layer deposited on the semiconductor surface. Following step (21), a step (22) in the form of applying a metal electrode structure to the passivation layer by a screen printing step follows. After application, the metal electrode structure covers the electrode covering surface on the semiconductor wafer surface. Step (22) is followed by a step (23) in which the semiconductor wafer is heated in a first temperature window of 500 to 850 degrees in the first heat treatment step, so that the opening regions (8) occupy less than 25%, or preferably less than 15%, or much more preferably less than 10% of the electrode coating surface, and also so that the metal electrode structure is electrically contacted with the semiconductor material through some current contact regions (5) located within the opening regions (8), and the final wafer solar cell has an efficiency of less than 18% in the case of an average non-contact resistance of greater than 10 mOhm㎠, preferably greater than 20 mOhm㎠, and particularly preferably greater than 50 mOhm㎠, when the average non-contact resistance averaged on the surface of the wafer solar cell is greater than 10 mOhm㎠. Step (23) is followed by Step (24), which performs an additional processing step for optimizing thermal and / or electrical contact resistance, wherein additional current contact areas (5) are formed with a surface density of 1,000 to 50,000, or 3,000 to 30,000, or 5,000 to 15,000 current contact areas per square millimeter of electrode coating surface, in addition to the existing current contact areas.

[0050] FIG. 5 shows a microscopic image of a plan view of a passivation layer located beneath a metal electrode structure of a wafer solar cell. This wafer solar cell has undergone a plurality of steps of the method illustrated in FIG. 4. The illustrated wafer solar cell has undergone steps (21, 22, 23) of the method illustrated in FIG. 4, but has not undergone step (24). In the illustrated microscopic image, the metal electrode structure of the wafer solar cell has been removed. The passivation layer (6) has a plurality of small opening regions (8) formed only at the tips of the pyramid-shaped semiconductor structures of the semiconductor wafer material covered by the passivation layer (6). Thus, the passivation layer (6) is absent at the pyramid tips of these pyramid-shaped semiconductor structures. In some of the opening regions (8), electrical current contact regions (5) are formed where current flow occurs between the semiconductor material and the metal electrode structure. However, the density and quality of these electrical current contact regions are too low and poor, so the averaged non-contact resistance across the surface of the wafer solar cell is greater than 10 mOhm㎠, preferably greater than 20 mOhm㎠, and particularly preferably greater than 50 mOhm㎠. On the other hand, the passivation layer (6) is undamaged and intact in the side regions of the pyramid-shaped semiconductor structures, that is, in the regions that occupy most of the area on the surface of the semiconductor wafer.

[0051] FIG. 6 shows a microscopic image of a plan view of the passivation layer located beneath the metal electrode structure of a wafer solar cell. The wafer solar cell has undergone all steps (21, 22, 23, 24) of the method illustrated in FIG. 4. In the illustrated microscopic image, the metal electrode structure of the wafer solar cell has been removed again. As can be seen from a comparison with a microscopic image produced at the same scale as FIG. 5, the surface density of the opening regions (8) of the passivation layer (6) in the pyramid-shaped semiconductor structures does not substantially change despite the additional method step (24). However, additional current contact regions (5) additionally created by the additional method step (24) exist within the opening regions (8). This explains that, at a microscopic level, the average non-contact resistance of the wafer solar cell is reduced due to the increased number of current contact regions (5) within the already existing opening regions (8), while maintaining a consistently high ratio of the coverage surface through the passivation layer (6). Explanation of the symbols

[0052] 1: Semiconductor wafer 2: p-doped region 3: n-doped region 4: Metal electrode structure 5: Current contact regions 6: Passivation layer 7: Separating layer 8: Opening regions 21: First method step 22: Second method step 23: Third method step 24: Fourth method step

Claims

Claim 1 A wafer solar cell comprising a semiconductor wafer (1) made of a semiconductor material and including at least one p-doped region (2) and at least one n-doped region (3) on the surface of the semiconductor wafer, wherein the p-doped region (2) and / or the n-doped region (3) are in each case electrically contacted with a metal electrode structure (4) attached to the surface of the semiconductor wafer through opening regions (8) and current contact regions (5) located within the opening regions, and each metal electrode structure (4) covers an electrode covering surface on the surface of the semiconductor wafer, wherein the opening regions (8) occupy less than 25%, preferably less than 15%, particularly preferably less than 10% of the electrode covering surface, and the current contact regions (5) have 1,000 to 50,000, preferably 3,000 to 30,000, particularly preferably 5,000 to 15,000 current contacts per square millimeter of the electrode covering surface A wafer solar cell characterized by being formed with a surface density of regions (5). Claim 2 In claim 1, the individual current contact regions (5) are 3 μm 2 Less than, preferably 1.5 μm 2 Less than, particularly preferably 0.5 μm 2 A wafer solar cell having an area less than that, and characterized in that the current contact regions (5) are spaced apart from each other for most of the current contact regions (5). Claim 3 A wafer solar cell according to claim 1 or 2, wherein the opening regions (8) are composed of many individual regions spaced apart from each other, which are mainly arranged in polygonally adjacent pyramidal semiconductor structures, and wherein the pyramidal semiconductor structures have polygonally arranged edges having a length of more than 1 micrometer. Claim 4 A wafer solar cell according to claim 3, characterized in that only a single opening region (8) is disposed within a majority of the pyramid-shaped semiconductor structures. Claim 5 A wafer solar cell according to claim 4, wherein the opening regions (8) within the pyramid-shaped semiconductor structure occupy a smaller area, preferably less than 50%, and particularly preferably less than 25%, compared to the area covered by the pyramid-shaped semiconductor structure. Claim 6 A wafer solar cell according to claim 4 or 5, wherein the opening regions (8) are mainly positioned in the tip regions of the pyramid-shaped semiconductor structures, and the tip regions are spatially closest to the semiconductor material to which electrical contact is made when considered in terms of their three-dimensional topology. Claim 7 A wafer solar cell according to any one of claims 1 to 6, characterized in having a passivation layer (6) in regions around the opening regions (8) between the metal electrode structure (4) and the semiconductor material. Claim 8 A wafer solar cell according to claim 7, characterized by having an additional separation layer (7) between the metal electrode structure (4) and the semiconductor material in regions around the opening regions (8) on the passivation layer (6). Claim 9 A wafer solar cell according to claim 8, wherein the additional separation layer (7) is selected from the group consisting of transparent conductive oxides such as indium-tin oxide, tungsten-doped indium oxide, aluminum-doped zinc oxide, and zinc-doped indium oxide, and the group consisting of non-conductive oxides selected from the group consisting of nickel oxide, titanium oxide and magnesium fluoride. Claim 10 A wafer solar cell according to claim 8 or 9, wherein the additional separation layer (7) has a layer thickness of less than 80 nm, preferably less than 40 nm, particularly preferably less than 20 nm. Claim 11 A wafer solar cell according to any one of claims 1 to 10, wherein the current contact regions (5) located in the opening regions (8) have metal crystal grains and / or a metal-silicon alloy adjacent to or protruding into the metal electrode structure (4). Claim 12 A method for manufacturing a wafer solar cell comprises: - providing a semiconductor wafer (1) made of a semiconductor material and comprising a semiconductor wafer surface and at least one p-doped region (2) and at least one n-doped region (3), and having at least one pn junction and a passivation layer (6) deposited on the semiconductor surface; - applying a metal electrode structure (4) to the passivation layer (6) such that the metal electrode structure (4) covers an electrode covering surface on the semiconductor wafer surface; - heating the semiconductor wafer in a first temperature window of 500 to 850 degrees in a first heat treatment step so that the metal electrode structure (4) electrically contacts the semiconductor material through opening regions (8) of the passivation layer that occupy less than 25%, preferably less than 15%, particularly preferably less than 10% of the electrode covering surface, and through current contact regions (5) located in these opening regions, and also the final wafer solar cell has more than 10 mOhm㎠, preferably 20 A method for manufacturing a wafer solar cell, comprising the step of having an efficiency of less than 18% in the case of an average non-contact resistance greater than mOhm㎠, particularly preferably greater than 50 mOhm㎠, and the step of performing an additional processing step for optimizing thermal and / or electrical contact resistance such that the current contact regions (5) are formed within the opening regions (8) with a surface density of 1,000 to 50,000, preferably 3,000 to 30,000, particularly preferably 5,000 to 15,000 current contact regions (5) per square millimeter of the electrode covering surface. Claim 13 A method for manufacturing a wafer solar cell according to claim 12, wherein the passivation layer (6) is formed with a layer thickness of more than 50 nm, and / or an additional separation layer (7) having a layer thickness of less than 40 nm, preferably less than 30 nm, is provided on the passivation layer (6). Claim 14 A method for manufacturing a wafer solar cell, wherein, in either claim 12 or 13, the additional processing step is selected from the group consisting of - LECO (Laser Enhanced Contact Optimization), - tempering step, - laser heating step, and - photonic sintering, as an individual step or as a combination of steps. Claim 15 A method for manufacturing a wafer solar cell, wherein, in any one of claims 12 to 14, the additional processing step comprises a LECO step in which the wafer solar cell is irradiated at a power density of 200 to 1,500,000 W / ㎠. Claim 16 A method for manufacturing a wafer solar cell, wherein, in any one of claims 12 to 15, the additional processing step comprises a LECO step in which an applied reverse voltage is 1 to 40 V in the opposite direction of the forward direction and a local current of 0.5 to 20 A flows.