Method and apparatus for compensating for systematic errors during symbol clock synchronization between a transmitter and a receiver

Abstract

The present invention relates particularly to a method for compensating for systematic errors during symbol clock synchronization between a transmitter (10) and a receiver (20), the method comprising: receiving a first signal (S1) at the receiver (20); determining an estimated initial phase offset (POFF1) between the symbol clock of the transmitter (10) and the symbol clock of the receiver (20) while using the first signal (S1); initializing a symbol synchronizer (40) of the receiver (20) based on the estimated initial phase offset (POFF1); receiving a second signal (S2) at the receiver (20); determining and storing a plurality of phase offset values ​​[μ(n)] based on a plurality of sample values ​​representing the second signal using the initialized symbol synchronizer; determining an approximate initial phase offset of the symbol clocks based on an approximation of the plurality of stored phase offset values ​​[μ(n)]; and determining a compensation value representing the difference in phase offset based on the approximate initial phase offset (POFF2) and the estimated initial phase offset (POFF1). and subsequently, a step of calculating a compensation value (COMP) having an estimated initial phase offset determined thereafter; is included.

Description

Technology Field

[0001] The present invention relates to a method and apparatus for compensating for systematic errors, particularly systematic estimation errors, during symbol clock synchronization between a transmitter and a receiver. Background Technology

[0002] Transmission systems are known in which, according to the prior art, the transmitter and receiver are not synchronized by a separate clock line for data transmission, and for this reason, the respective clock generators within the transmitter and receiver operate independently of each other and thus can have frequency and phase shifts relative to each other, so that the synchronization of the symbol clock on the receiver side with respect to the symbol clock on the transmitter side must be performed based on the data transmission signals themselves.

[0003] To this end, a feedback symbol synchronizer known from the prior art is used, which generally consists of a timing error detector, an adjustable interpolator, an interpolation controller, and a loop filter. These feedback symbol synchronizers offer the advantage of being realized at a relatively low cost, namely, requiring relatively few hardware and / or software resources. In another aspect, these feedback symbol synchronizers generally have a long settling time until sufficiently accurate symbol clock synchronization is achieved based on an existing control loop.

[0004] Fundamentally, low internal noise in the feedback symbol synchronizer is desirable. However, the small control bandwidth required for this disadvantageously increases the settling time. Settling time and low internal noise are in a trade-off relationship, and this cannot be improved by conventional methods.

[0005] In contrast, feedforward symbol synchronizers are known that can achieve faster symbol clock synchronization in comparison due to the absence of a control loop. However, the realization of these feedforward symbol synchronizers generally entails higher resource requirements in relation to hardware and / or software.

[0006] Rice and Michael's "Digital Communications: A Discrete-Time Approach", Upper Saddle River, NJ: Prentice Hall (2008), specifically discloses a feedback symbol synchronizer.

[0007] According to a first aspect of the present invention, a method for compensating for systematic errors during symbol clock synchronization between a transmitter and a receiver is proposed.

[0008] It is noted here that the present invention aims for symbol clock synchronization between a transmitter and a receiver that are synchronized with each other based solely on transmitted data signals, rather than by a separate clock line.

[0009] It is also noted that the method steps according to the present invention described below may be executed based on one or more evaluation units of a receiver, which may be configured as, for example, an ASIC, an FPGA, a processor, a digital signal processor, a microcontroller, etc. It is also noted that the components described in the following description may be logical components and / or physical components, and that the assignment of functions to each component may be performed differently from the following description only to the extent that the effect according to the present invention is achieved.

[0010] In the first step of the method according to the present invention, a first signal generated by a transmitter and suitable for symbol clock synchronization is received at a receiver that is informationally connected to the transmitter. Particularly preferably, the first signal is a predefined synchronization signal that can also be considered, for example, as a preamble or a training signal.

[0011] The transmission system formed by the transmitter and receiver is, for example, an ultrasonic system, and / or a radar system, and / or a vehicle system, and / or a power line transmission system, and / or a baseband transmission system, and / or other transmission systems. Here, it is noted that the transmission system may also include a plurality of transmitters configured to communicate with the receiver in a non-collision manner (for example, by a time-division multiplexing method or by other multiplexing methods). Furthermore, bidirectional communication between the transmitter and the receiver may be performed by each transmitter or receiver changing their respective roles according to the actual direction of communication based on the method according to the present invention.

[0012] In the second step of the method according to the present invention, the estimated initial phase offset between the symbol clock of the transmitter on which the first signal is generated and the symbol clock of the receiver on which the first signal is evaluated at the receiver is determined as the first signal is used in the estimation component of the receiver.

[0013] In the third step of the method according to the present invention, a symbol synchronizer of a receiver, formed as a feedback symbol synchronizer, is initialized based on an estimated initial phase offset. The symbol synchronizer is a feedback symbol synchronizer known from the prior art, configured to be initialized, for example, by a value of the estimated initial phase offset. Initialization is preferably performed by initializing the aforementioned interpolation controller of a symbol synchronizer known from the prior art with a value for the estimated initial phase offset, preferably provided as a time displacement value. In particular, due to nonlinear influences caused by the transmission channel between the transmitter and the receiver (e.g., due to capacitive and / or inductive influences), the estimated initial phase offset may have an undesirable deviation from the actual initial phase offset between the transmitter and the receiver, and for this reason, the symbol clock synchronization between the transmitter and the receiver is not sufficiently accurate to prevent initial data loss caused by symbols that are interpreted as having errors during transmission, even with initialization through the estimation component. Since these estimation errors appear substantially the same when the limit conditions between different synchronization processes do not change, these estimation errors are correspondingly referred to as systematic errors.

[0014] In the fourth step of the method according to the present invention, a second signal generated by a transmitter is received at a receiver, and the second signal may be any signal, provided that it basically has a sufficient number of transitions between different transmission target symbols. For example, one can consider that the second signal is random data, for example, representing noise and / or containing predefined data. The suitable length and / or characteristics of the second signal are preferably determined empirically for each transmission system using the method according to the present invention.

[0015] It is noted here that the method according to the present invention may preferably be executed in a separate operating state of the transmission system (e.g., training mode), but not in the standard data transmission process between the transmitter and the receiver, because in this manner, the second signal can be formed arbitrarily in the separate operating state, and thus particular flexibility can be achieved in the configuration of the second signal. This does not explicitly exclude the possibility that the method according to the present invention may also be executed in the standard data transmission process in which the second signal may include valid data to be transmitted to the receiver. Here, valid data should mean such data that is not provided for synchronization between the transmitter and the receiver, and / or is not provided for control of data communication between the transmitter and the receiver. Instead, the valid data should represent data that is further processed within the receiver separately from the method described herein. In the example where the transmitter and the receiver are respective components of an ultrasonic system, the valid data may be environmental information detected by an ultrasonic sensor representing, for example, the transmitter, and such environmental information is transmitted to the receiver to identify objects in the environment of, for example, the ultrasonic sensor based on this environmental information.

[0016] In the fifth step of the method according to the present invention, using an initialized symbol synchronizer, a step is performed to determine and store a plurality of phase offset values, each representing a phase offset between the symbol clock of a transmitter and the symbol clock of a receiver, based on a plurality of sample values ​​representing a second signal. To this end, each sample value is preferably converted into complex sample values ​​by known IQ demodulation, and subsequently, a respective phase offset value for each complex sample value, or for a predetermined selection of complex sample values, is determined based on the said complex sample values. Preferably, the memory provided for the sample values ​​is displaced by an estimation component to a predetermined state during the initialization process of the symbol synchronizer, so as to ensure that only the history of the actual sample values ​​of the second signal is stored in the memory.

[0017] In the sixth step of the method according to the present invention, an approximated initial phase offset between the symbol clocks of the transmitter and receiver is determined based on an approximation of a plurality of stored phase offset values. For the approximation, approximation methods known from the prior art are used, for example, and computer-optimized approximation methods that can be executed sufficiently with a small computing capacity are used, particularly to save computational resources and / or to enable the use of preferred computational components for executing the method according to the present invention. The approximation is provided to determine an approximated phase offset that corresponds substantially or ideally to the phase offset actually existing after the initialization of the symbol synchronizer through the estimation component, based correspondingly on the history of sample values.

[0018] In the seventh step of the method according to the present invention, when determining the initial phase offset estimated through the estimation component, a compensation value suitable for compensating at least partially for systematic errors is determined, and the compensation value represents the difference between the approximated initial phase offset and the phase offset based on the estimated initial phase offset.

[0019] This is expressed by the following formula, and

[0020]

[0021] In the above equation, COMP represents the reward value, represents the approximated initial phase offset, and represents the estimated initial phase offset.

[0022] In the eighth step of the method according to the present invention, a calculation of a compensation value having an estimated initial phase offset is performed, which is subsequently determined during the subsequent initialization of a symbol synchronizer using an estimation component. In other words, the compensation value, once determined, is temporarily stored for one or more subsequent uses, preferably due to underlying systematic errors, and thus a new determination of the compensation value is not required during the process of new symbol clock synchronization between the transmitter and the receiver. Consequently, particularly computational resources and / or the time cost required for determination during subsequent symbol clock synchronization are saved. In particular, reliable transmission of valid data is performed with a particularly short delay by ensuring that the second signal provided and dedicated for determining the compensation value is not generated by the transmitter and is not evaluated by the receiver. In other words, by storing the compensation value, it is possible to transmit a third and / or other signals containing valid data for the receiver, preferably immediately after the first signal during subsequent symbol clock synchronization.

[0023] In summary, the method according to the present invention provides the particular advantage that data transmission between a transmitter and a receiver, whose symbol clocks are not initially synchronized, can be recorded particularly quickly and without loss, thereby allowing the response time of the entire system including the transmitter and the receiver to be maintained at a particularly low level.

[0024] Dependent claims represent preferred improvements of the present invention.

[0025] More preferably, the estimation component is formed as a feedforward estimation component, because this makes it possible to estimate the initial phase offset particularly in a resource-saving manner and / or quickly. In particular, when using a feedforward estimation component, the processing time for estimating the phase offset can be shorter than the settling time of the symbol synchronizer until a synchronized symbol clock between the transmitter and receiver is achieved when the symbol synchronizer is not initialized by the estimation component. This does not explicitly exclude the possibility that the settling time can also be achieved based on an estimation component formed in a feedback manner compared to a symbol synchronizer not initialized according to the present invention.

[0026] In another preferred configuration of the present invention, at approximation, only phase offset values ​​temporally corresponding to the sample values ​​selected as the final symbol values ​​by the sample value selector of the symbol synchronizer are considered. The sample value selector is provided to significantly reduce the oversampled second signal in some cases, so that the most suitable sample value (e.g., the sample value having the maximum signal-to-noise ratio with respect to the symbol amplitude) is selected from a plurality of sample values ​​representing each symbol, particularly in the case of oversampling. This selection is performed based on a so-called "strobe" signal that determines the sample value actually to be used, for example at the output of the symbol synchronizer, within a symbol synchronizer known from the prior art. Accordingly, preferably, the phase offset "based on the estimated initial phase offset" as described above is also preferably the phase offset actually used for interpolating sample values ​​within the symbol synchronizer, and this phase offset may differ from the phase offset estimated by the estimation component if, by the sample value selector of the symbol synchronizer, the first sample value processed through the symbol synchronizer is not output as a symbol value at the output of the symbol synchronizer, but rather a subsequent sample value is output in relation thereto. In this case, it is assumed that a phase offset has already been generated by the control loop of the symbol synchronizer, which is matched to the actual sample values ​​in relation to the estimated initial phase offset and serves as the basis for determining the corresponding compensation value, thereby enabling particularly high accuracy to be achieved when determining the compensation values, because optimal temporal alignment between the estimated initial phase offset and the approximated initial phase offset can be achieved in this manner.

[0027] More preferably, to each phase offset value included in the approximation, a value corresponding to the time interval between the determination of each phase offset value and the start of processing of the second signal in the receiver is added. This value to be added may, for example, be an index of each successive phase offset value or an index of each successive strobe signal, depending on the specific configuration of each method. A vector ( y ) is explained as follows to correspond to it, and

[0028]

[0029] In the above formula, is each sample value( for, or each "strobe" signal ( Each phase offset value for ) [or likewise interpolation value (because these interpolation values ​​specify the time offset to be considered when interpolating, especially in the subsample layer)] represents.

[0030] Particularly preferably, the approximation is performed by a regression method, in particular by a linear regression method, which thereby minimizes the mean squared error without limiting the available regression methods. Mean squared error to be minimized ( MSE ) is expressed as follows.

[0031]

[0032] In the above equation, i represents each sample value, or the index of each sample value selected through the "strobe" signal. N While represents the total number of phase offset values ​​included in the approximation, m It represents a linear progression due to a constant frequency offset (FOFF) between the transmitter and the receiver.

[0033] More preferably, sample values ​​representing the first signal and / or the second signal are processed by filtering that at least partially compensates for the influence of the transmission channel between the transmitter and the receiver before and / or during use within the estimation component and / or during use within the symbol synchronizer.

[0034] In another preferred configuration of the present invention, the estimation component is configured to estimate a phase offset by such that sample values ​​representing a first signal (preferably generated from the first signal by an A / D converter of the device and / or receiver) are preferably converted into complex sample values ​​by IQ demodulation known from the prior art (the reference frequency of this demodulation corresponds to the symbol clock of the receiver, particularly the carrier frequency described), a corresponding phase offset value is determined for each of the complex sample values, and time displacement values ​​corresponding to the phase offset values ​​between the symbol clock of the transmitter and the symbol clock of the receiver are determined based on each determined phase offset value. Subsequently, the time displacement values ​​are used in a symbol synchronizer to pre-set new sampling points (preferably in the subsample layer) suitable for the first signal, for example, in an interpolator. In this regard, it is noted that the sampling rate of the sample values ​​may preferably represent oversampling in relation to the symbol rate, and that the sampling rate may be converted (particularly drastically reduced) to a target sampling rate during or at the end of the processing chain of the estimation component and / or symbol synchronizer. The phase offset is determined, for example, based on an arctangent calculation applied to the complex sampled values. Furthermore, depending on each specific implementation of the estimation of the phase offset, it is possible to provide other signal processing steps to perform appropriate scaling and / or value range displacement of the results, for example, within the processing chain.

[0035] The method according to the present invention is preferably based on an event, and particularly preferably executed when a configuration change exists in a transmitter and / or receiver and / or a transmission system including a transmitter and a receiver, and / or when there is an overflow and / or underflow of a predetermined temperature change amount and / or a predetermined temperature threshold in the transmitter and / or receiver and / or transmission system, and / or when one or more predetermined aging thresholds for the transmitter and / or receiver and / or transmission system are reached. Furthermore, in this manner, other events for the execution of the method according to the present invention are defined that may affect systematic estimation errors during symbol clock synchronization between a transmitter and a receiver.

[0036] Furthermore, preferably, in addition to the estimated initial phase offset, it is also possible to estimate the frequency offset between the symbol clocks of the transmitter and receiver (i.e., the initially estimated frequency offset) through the estimation component. Consequently, it is subsequently possible to initialize the symbol synchronizer based on the determined frequency offset. This can lead to a more accurate initial estimation of the deviations of the symbol clocks between the transmitter and receiver and, consequently, reliable symbol clock synchronization. The frequency offset is preferably estimated by converting sample values ​​representing a first signal into complex sample values ​​by IQ demodulation (the reference frequency of this demodulation corresponds to the symbol clock of the receiver), determining a corresponding phase offset value for each complex sample value, preventing abrupt changes due to overflow between successive phase offset values ​​(i.e., occurring when exceeding the value range provided for phase offset values, e.g., from -π to +π), converting the phase offset values ​​into a continuously continuing sequence of phase offset values, and calculating the changes between successive converted phase offset values ​​representing each frequency offset. In relation to the sampling rate and, where applicable, oversampling, the foregoing description for determining the phase offset is referenced, and this description also applies when determining the frequency offset in relation thereto. Likewise, in relation to possible calculations of the phase offset and, where applicable, other processing steps, the foregoing description for determining the phase offset is referenced.

[0037] According to a second aspect of the present invention, an apparatus for compensating for systematic errors during symbol clock synchronization between a transmitter and a receiver is proposed, said apparatus comprising an estimation component, a feedback symbol synchronizer, and a memory for storing determined phase offset values, said apparatus configured to execute a method according to any one of the aforementioned claims. Features, combinations of features, and the resulting advantages are consistent with those described above in relation to the first aspect of the invention, in a manner where the above description is referenced to avoid repetition.

[0038] In the following, embodiments of the present invention are described in detail with reference to the attached drawings. Brief explanation of the drawing

[0039] FIG. 1 is a block circuit diagram of an embodiment of a transmission system including a device according to the present invention. Specific details for implementing the invention

[0040] FIG. 1 shows a block circuit diagram of an embodiment of a transmission system according to the present invention, including a device (5) according to the present invention configured to perform the method according to claims 1 to 9 of the present invention.

[0041] The present device (5) is represented herein by a computing unit, and this computing unit realizes the functional blocks described below of the present device (5) based on a computer program that can be executed by this computing unit.

[0042] The present device (5) is provided for synchronizing the symbol clock during data transmission between the transmitter (10) and the receiver (20), and the present device (5) is arranged within the receiver (20). The transmitter (10), which is formed as an ultrasonic sensor of an environment detection system of a vehicle in the present invention, is connected to the receiver (20) via a wired transmission channel (60), and the receiver (20) is, in the present invention, a central control unit of a vehicle for receiving and evaluating environmental information detected by the ultrasonic sensor. It is known that the receiver (20) can be connected to a plurality of transmitters (10), and each of these transmitters is configured to perform data communication according to the method according to the present invention with the receiver (20).

[0043] It is also noted that other components of the receiver (20) provided for the prior and / or additional processing of the received data, which is transmitted, for example, by data transmission between the transmitters (10) and the receiver (20), are not shown or described herein for clarity.

[0044] The present invention device (5) comprises an estimation component (30) and a symbol synchronizer (40), wherein the estimation component (30) is configured to receive a first signal (S1) generated by a transmitter (10) and, based on the first signal (S1), to estimate an estimated initial phase offset (POFF1) between the symbol clock of the transmitter (10) on which the first signal (S1) is generated and the symbol clock of the receiver (20) on which the first signal (S1) is evaluated at the receiver (20). The first signal (S1) is formed as a pre-defined preamble herein, and the symbol rate of such preamble is equal to or less than the carrier frequency provided for the transmission of the first signal (S1).

[0045] To this end, the estimation component (30) includes a first subunit (32) configured to determine an estimated initial phase offset (POFF1) and a second subunit (34) configured to determine a frequency offset (FOFF) between each symbol clock. Additionally, the estimation component (30) also includes an estimation value selector (36) configured to determine a suitable time point (TS) for initializing the symbol synchronizer (40) based on the values ​​that actually exist for the estimated initial phase offset (POFF1) and frequency offset (FOFF) within the subunits (32, 34).

[0046] Additionally, the present device (5) is configured to initialize a symbol synchronizer (40) formed as a conventional feedback symbol synchronizer (40) in the present invention based on an estimated initial phase offset (POFF1) and an estimated frequency offset (FOFF).

[0047] Here, it is noted that the A / D converter of the device (5) (and optionally other preprocessing units, which are possible regardless of the synchronization state) that converts a first signal (S1) transmitted analogously from the transmitter (10) [and signals (S2, S3), etc. described below] into digital signals (S1, S2, S3) for further processing within the device (5) is not illustrated herein for reasons of clarity. Preferably, the A / D converter is connected in such a way that it provides the converted signals (S1, S2, S3) or at least a portion of these signals (S1, S2, S3) to the estimation component (30) as well as to the symbol synchronizer (40).

[0048] The symbol synchronizer (40) comprises the following components: an adjustable interpolator (90) into which signals (S1, S2, S3) of the transmitter (10) are input; and a sample value selector (130) for each transmitted symbol, which selects the most suitable sample value for each symbol from a plurality of sample values ​​(i.e., there is oversampling of individual symbols therein). The selection is preferably performed in such a way that a sample value having the maximum signal-to-noise ratio with respect to the symbol amplitude is selected for each symbol.

[0049] Additionally, the symbol synchronizer (40) further includes a symbol clock error detector (110) configured to calculate the symbol clock deviation between the respective symbol clocks of the transmitter (10) and the receiver (20) based on an algorithm known from the prior art.

[0050] Additionally, the symbol synchronizer (40) also includes a loop filter (120) which is realized based on a PI controller and configured to be initialized by a frequency offset value (FOFF) according to the present invention.

[0051] Finally, the symbol synchronizer (40) includes an interpolation controller (100) that is initialized based on an initial phase offset (POFF1) estimated according to the present invention and configured to perform control known from the prior art of an interpolator (90) and a sample value selector (130).

[0052] Additionally, the present device (5) receives a second signal (S2) generated by the transmitter (10) and is configured to determine a plurality of phase offset values ​​[μ(n)] representing a phase offset between the symbol clock of the transmitter (10) and the symbol clock of the receiver (20), respectively, based on a plurality of sample values ​​representing the second signal (S2), using an initialized symbol synchronizer (40). The symbol synchronizer (40) is configured to store the plurality of phase offset values ​​[μ(n)] in a phase offset value memory (140).

[0053] Furthermore, the present device (5) is configured to determine an approximate initial phase offset (POFF2) between the symbol clocks of the transmitter (10) and the receiver (20) based on a linear regression method for a plurality of stored phase offset values ​​[μ(n)]. The approximate initial phase offset (POFF2) is determined herein, for example, by an interpolator (90) and provided to an interpolation controller (100).

[0054] Additionally, the present device (5) is configured to determine a compensation value (COMP) suitable for compensating at least partially for systematic errors when determining an initial phase offset (POFF1) estimated through an estimation component (30), wherein the compensation value (COMP) represents the difference in phase offset based on the approximated initial phase offset (POFF2) and the estimated initial phase offset (POFF1). The interpolation controller (100) includes a compensation value memory (150) for storing the compensation value (COMP).

[0055] Finally, the present device (5) is configured to calculate a compensation value (COMP) having an estimated initial phase offset, which is subsequently determined during the subsequent initialization of the symbol synchronizer (40) using the estimation component (30), in order to at least reduce systematic estimation errors through the estimation component (30).

[0056] A symbol synchronizer (40) is configured to receive a third signal (S3) and, in some cases, other signals generated by a transmitter (10) in order to generate respective output signals (SO) representing symbols (i.e., valid data) transmitted within the third signal (S3) or within other signals, based on the third signal (S3) and, in some cases, other signals, in a generally initialized state, synchronized with the symbol clock of the receiver (20) and, in some cases, based on the third signal (S3) and other signals.

Claims

Claim 1 A method for compensating for systematic errors during symbol clock synchronization between a transmitter (10) and a receiver (20), wherein the method comprises: - a first step of receiving, at the receiver (20), a first signal (S1) generated by the transmitter (10) and suitable for symbol clock synchronization; - a second step of determining an estimated initial phase offset (POFF1) between the symbol clock of the transmitter (10) which serves as the basis for generating the first signal (S1) and the symbol clock of the receiver (20) which serves as the basis for evaluating the first signal (S1) at the receiver (20), while using the first signal (S1) in the estimation component (30) of the receiver (20); - a third step of initializing the symbol synchronizer (40) of the receiver (20), which is formed as a feedback symbol synchronizer (40), based on the estimated initial phase offset (POFF1); - a fourth step of receiving a second signal (S2) generated by the transmitter (10) at the receiver (20); - the initialized Step 5: using a symbol synchronizer (40), determining and storing a plurality of phase offset values ​​[μ(n)] representing the phase offset between the symbol clock of the transmitter (10) and the symbol clock of the receiver (20), respectively, based on a plurality of sample values ​​representing the second signal (S2); Step 6: determining an approximate initial phase offset (POFF2) between the symbol clocks of the transmitter (10) and the receiver (20) based on an approximation of the plurality of stored phase offset values ​​[μ(n)]; Step 7: determining a compensation value (COMP) suitable for compensating at least partially for systematic errors when determining the initial phase offset (POFF1) estimated through the estimation component (30); - The compensation value (COMP) represents the difference in phase offset based on the approximate initial phase offset (POFF2) and the estimated initial phase offset (POFF1); A method comprising: a step 8 of calculating a compensation value (COMP) having an estimated initial phase offset, which is subsequently determined during the subsequent initialization of a symbol synchronizer (40) using an estimation component (30). Claim 2 A method according to claim 1, wherein the estimation component (30) is formed as a feedforward estimation component (30), and / or the processing time for estimating the initial phase offset (POFF1) is shorter than the settling time of the symbol synchronizer (40) until a synchronized symbol clock between the transmitter (10) and the receiver (20) is achieved when the symbol synchronizer (40) is not initialized by the estimation component (30). Claim 3 A method according to claim 1 or 2, wherein, at approximation, only phase offset values ​​[μ(n)] that are temporally corresponding to sample values ​​selected as final symbol values ​​by the sample value selector (42) of the symbol synchronizer are considered. Claim 4 A method in which, in any one of claims 1 to 3, a value corresponding to the time interval between the determination of each phase offset value [μ(n)] and the start of processing of the second signal (S2) in the receiver (20) is added to each phase offset value [μ(n)] included in the approximation. Claim 5 A method in which, in any one of paragraphs 1 to 4, the approximation is performed by a regression method, particularly by a linear regression method. Claim 6 A method in which, in any one of claims 1 to 5, sample values ​​representing the first signal (S1) and / or the second signal (S2) are processed by filtering that at least partially compensates for the influence of the transmission channel (60) between the transmitter (10) and the receiver (20) before and / or during use within the estimation component (30) and / or during use within the symbol synchronizer (40). Claim 7 A method wherein, in any one of claims 1 to 6, sample values ​​representing a first signal (S1) are converted into complex sample values ​​by IQ demodulation [the reference frequency of this demodulation corresponds to the symbol clock of the receiver (20)], a corresponding phase offset value [μ(n)] is determined for each of the complex sample values, and time displacement values ​​corresponding to the phase offset values ​​[μ(n)] between the symbol clock of the transmitter (10) and the symbol clock of the receiver (20) are determined based on each of the determined phase offset values ​​[μ(n)], so that the estimation component (30) and / or the symbol synchronizer (40) determine each phase offset. Claim 8 A method according to any one of claims 1 through 7, wherein the method is based on an event and is executed particularly when - a configuration change exists in the transmitter (10) and / or receiver (20), and / or in a transmission system including the transmitter (10) and receiver (20), and / or - an upper and / or lower of a predetermined temperature change amount, and / or a predetermined temperature threshold, exists in the transmitter (10) and / or receiver (20) and / or the transmission system, and / or - one or more predetermined aging thresholds for the transmitter (10) and / or receiver (20) and / or the transmission system are reached. Claim 9 A method according to any one of claims 1 to 8, further comprising: a step of estimating a frequency offset (FOFF) between the symbol clocks of the transmitter (10) and the receiver (20) through an estimation component (30); and a step of additionally initializing a symbol synchronizer (40) based on the determined frequency offset (FOFF). Claim 10 A device (5) for compensating for systematic errors during symbol clock synchronization between a transmitter (10) and a receiver (20), wherein the device comprises: - an estimation component (30); - a feedback symbol synchronizer (40); and - a memory (140) for storing determined phase offset values ​​[μ(n)], and wherein the device is configured to execute a method according to any one of claims 1 to 9.

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