Instrumentation amplifier

Abstract

The instrumentation amplifier of the present embodiment provides a differential input signal to a differential input terminal and provides a differential output signal, wherein an offset is formed between the differential input terminals, the differential input differential amplifier, a comparator that compares one output with another output among the differential outputs, a successive approximation register (SAR) logic that generates a digital code corresponding to the output of the comparator, a resistor digital-to-analog converter (DAC) that outputs a compensation current corresponding to the digital code output by the logic circuit, and the compensation current is provided to compensate for the offset.

Description

Technology Field

[0001] The present disclosure generally relates to instrumentation amplifiers. Background Technology

[0002] Instrumentation amplifiers (IAs) are a type of amplifier used in various fields, such as biosignals, temperature and humidity sensing, smart cars, and artificial intelligence computing. Instrumentation amplifiers can be specialized for specific purposes, such as measurement and test equipment, automotive semiconductors, and analog-based computing units. The problem to be solved

[0003] As the frequency of the signal to be amplified by the instrumentation amplifier decreases, the influence of the amplifier's 1 / f noise increases, and thus the signal-to-noise ratio (SNR) decreases. Therefore, to implement a system that processes low-frequency signals with high precision, an input chopper is placed on the input side of the amplifier and an output chopper is placed on the output side to reduce the contribution of 1 / f noise.

[0004] However, if there is an offset at the amplifier's input, the offset is amplified by the amplifier's open-loop gain and appears at the output, and the influence of this offset causes the chopper to form ripple at the output of the instrumentation amplifier.

[0005] The present embodiment is intended to provide an instrumentation amplifier capable of reducing the effects of such ripple. means of solving the problem

[0006] The instrumentation amplifier of the present embodiment provides a differential input signal to a differential input terminal and provides a differential output signal, wherein an offset is formed between the differential input terminals; a comparator that compares one output with another output among the differential outputs; a logic circuit that generates a digital code corresponding to the output of the comparator; and a resistor DAC (digital-analog converter) that forms an equivalent resistance corresponding to the digital code output by the logic circuit and forms a compensation voltage formed by the equivalent resistance, wherein the compensation voltage compensates for the offset.

[0007] According to one aspect of the present embodiment, the resistor DAC comprises a bias resistor connected to the differential input terminal and a plurality of compensation resistors, and a switch that conducts to connect the compensation resistor in parallel with the bias resistor, and the compensation voltage is formed by voltage division between the input resistor of the differential input differential amplifier and the compensation resistors connected in parallel with the bias resistor when the switch conducts.

[0008] According to one aspect of the present embodiment, the instrumentation amplifier further comprises an input chopper to which the differential input is provided, an output chopper that chops the output of the amplifier, and a feedback chopper connected to the negative feedback path of the amplifier. In this aspect, the instrumentation amplifier further comprises a low-pass filter connected to the output chopper.

[0009] According to one aspect of the present embodiment, the instrumentation amplifier further comprises a ripple reduction loop, wherein the ripple reduction loop comprises: a blocking capacitor that outputs an AC component of the ripple formed at the output node of the instrumentation amplifier; a chopper that chops and down-converts the AC component of the ripple; an integrator that accumulates the output of the chopper; and a transfer impedance amplifier that outputs a compensation current that converts the output of the integrator into a corresponding current to compensate for the offset.

[0010] According to one aspect of the present embodiment, the resistive DAC comprises: a plurality of resistors, each; a voltage rail electrically connected to the plurality of resistors to provide voltage; and a plurality of switches connected to each of the plurality of resistors. In this aspect, the conduction and blocking of each of the plurality of switches are controlled according to the digital code generated by the logic circuit, thereby controlling the equivalent resistance of the plurality of resistors. In this aspect, the resistive DAC outputs the compensation voltage formed by voltage dividing the reference voltage between the controlled equivalent resistance and the input resistance of the differential amplifier. Effects of the invention

[0011] According to the present embodiment, the advantage is provided that the ripple formed by the offset in the instrumentation amplifier can be reduced. Brief explanation of the drawing

[0012] FIG. 1 is a diagram illustrating an overview of the instrumentation amplifier of the present embodiment. Figure 2 is a diagram illustrating signals modulated by choppers. FIG. 3(a) is a diagram illustrating an overview of a resistive DAC (400) according to the present embodiment, and FIG. 3(b) is a diagram illustrating an overview for explaining the operation of the resistive DAC (400) of the present embodiment. FIG. 4 is a diagram for explaining the operation of the logic circuit section of the present embodiment. Specific details for implementing the invention

[0013] The present embodiment is described below with reference to the attached drawings. Fig. 1 is a diagram showing an overview of the instrumentation amplifier (10) of the present embodiment. Referring to Fig. 1, the instrumentation amplifier (10) of the present embodiment provides a differential input signal to a differential input terminal and provides a differential output signal, and includes a differential input differential amplifier (100) in which an offset (Vos) is formed between the differential input terminals, a comparator (200) that compares one output with another output among the differential outputs, a logic circuit unit (300) that generates a digital code corresponding to the output of the comparator, and a resistor DAC (digital analog converter, 400) that forms an equivalent resistance corresponding to the digital code output by the logic circuit unit (300), and a compensation voltage that compensates for the offset is formed by the equivalent resistance.

[0014] In one embodiment, the instrumentation amplifier (10) further includes an input chopper (CHin), an output chopper (CHout), and a feedback chopper (CHfb) connected to the negative feedback path of the amplifier (100). FIG. 2 is a diagram illustrating each signal in an embodiment including choppers. Referring to FIG. 1 and FIG. 2, the choppers reduce 1 / f noise. In the embodiment illustrated in FIG. 2, the choppers (CHin, CHout, CHfb) modulate the provided signal to the frequency of the signal provided to the chopper, and the frequency band of the signal and the 1 / f noise are separated as illustrated in FIG. 2. Subsequently, the signal is demodulated again through the output chopper, and the signal is restored to its original frequency, but the 1 / f noise of the amplifier is modulated to the frequency of the chopper. A low-pass filter (LPF) can be connected after the output chopper (CHout) to remove the 1 / f noise.

[0015] As illustrated, the instrumentation amplifier of the present embodiment has the advantage of effectively reducing 1 / f noise by employing a modulation method using a chopper, thereby achieving a high SNR, and is suitable for implementing a low-noise instrumentation amplifier because thermal noise folding does not occur.

[0016] Referring again to FIG. 1, the differential input signal (Vin+, Vin-) is output from the input chopper (CHin) and coupling capacitors (Cin1, Cin2) and input to the differential input terminal of the amplifier (100). Due to reasons such as deviations in the manufacturing process, an offset voltage (Vos) is formed at the differential input terminal of the amplifier (100).

[0017] In Figure 1, the offset voltage is exemplified as Vos. Even if the same input is provided as an inverting input and a non-inverting input, the output is affected by the offset, and the effect occurring at the output side is particularly significant because the offset at the input is amplified by the gain of the amplifier.

[0018] The comparator (200) compares the differential output of the amplifier (100) and outputs the comparison result. If the signals output by the amplifier (100) and provided as inputs to the comparator (200) are identical, the comparator (200) outputs a signal indicating that the input signals are identical. However, if the signals output by the amplifier (100) and provided as inputs to the comparator (200) are different, the comparator (200) detects the difference in magnitude of the input signals, forms a corresponding signal, and outputs it to the logic circuit (300).

[0019] The logic circuit section (300) forms a control signal to control the resistor DAC (400) from the input signal (Vsig) and provides it to the resistor DAC (400), and the resistor DAC (400) adjusts the equivalent resistance formed by connecting it in parallel to the resistor DAC from this. The resistor DAC (400) forms a compensation voltage by controlling the number of compensation resistors (Rc) connected in parallel with the bias resistor (Rb) so as to minimize the offset, and outputs it to one input of the amplifier (100).

[0020] FIG. 3(a) is a diagram illustrating an overview of a resistive DAC (400) according to the present embodiment. Referring to FIG. 3(a), the resistive DAC (400) includes a reference voltage node connected to a reference voltage rail to provide a reference voltage (Vref), a bias resistor (Rb) connected to a differential input node of an instrumentation amplifier, and a plurality of compensation resistors (Rc) connected in parallel with the bias resistor when a switch conducts. In one embodiment, the compensation resistors (Rc) may all have the same resistance value (R).

[0021] In one embodiment, a switch whose conduction is controlled according to a control signal provided by the logic circuit (300) conducts, thereby connecting the compensation resistor (Rc) in parallel with the bias resistor (Rb). For example, when the compensation resistors (Rc) and the bias resistor (Rb) all have the same resistance value, if one switch conducts and the bias resistor (Rb) and one compensation resistor (Rc) are connected in parallel, the equivalent resistance (Req) of the resistance DAC (400) viewed from the input of the differential amplifier (100) may be R / 2. In another example, if three switches conduct and the bias resistor (Rb) and three compensation resistors (Rc) are connected in parallel, the equivalent resistance (Req) of the resistance DAC (400) viewed from the input of the differential amplifier (100) may be R / 4.

[0022] FIG. 3(b) is a diagram illustrating an overview for explaining the operation of the resistor DAC (400) of the present embodiment. Referring to FIG. 3(b), the reference voltage (Vref) is voltage divided by the equivalent resistance (Req) formed by connecting the bias resistor Rb and the compensation resistor (Rc) and the input resistance RG of the amplifier.

[0023] The value of the equivalent resistance (Req) can be adjusted by controlling the number of compensation resistors (Rc) connected in parallel with the bias resistor (Rb), and from this, the magnitude of the compensation voltage (Vcomp) provided to compensate for the offset voltage by voltage division of the reference voltage (Vref) can be controlled, and from this, the offset (Vos) can be compensated.

[0024] The compensation voltage (Vcomp) can be expressed as shown in Equation 1 below.

[0025] [Mathematical Formula 1]

[0026] Vcomp ~=~ V_{ref} ``times `` {RG} over {RG+Req}## {{ left(V_{ref} - V_{comp} right)} over V_{ref} ``approx``R_{eq} over R_{G}

[0027] In other words, a voltage drop in the reference voltage Vref occurs due to the voltage division between the equivalent resistance Req and the amplifier's input resistance RG, and the compensation voltage Vcomp provided to the amplifier input is lower than Vref. Additionally, the voltage drop is proportional to Req / RG and can increase the voltage at one side of the amplifier's input by reducing the value of the equivalent resistance (Req).

[0028] FIG. 4 is a diagram illustrating the offset compensation process of the present embodiment. Referring to FIG. 4, the logic circuit section (300) outputs a control signal that controls a switch so that one compensation resistor (Rc) is connected in parallel with the bias resistor (Rb) in the P1 phase, which starts offset compensation. The Vsig signal output by the comparator (200) indicates that the compensation voltage (Vcomp) is lower than the offset voltage even when provided.

[0029] Continuing, the logic circuit section (300) outputs a control signal that controls the switch so that the compensation resistor (Rc) is additionally connected in parallel with the bias resistor (Rb). In the Pk-1 phase, the Vsig signal output by the comparator (200) indicates that even when the compensation voltage (Vcomp) is provided, it is lower than the voltage formed by the offset.

[0030] However, in the Pk phase, the logic circuit (300) outputs a control signal to control the switch so that the compensation resistor (Rc) is additionally connected in parallel with the bias resistor (Rb), and the Vsig signal output by the comparator (200) indicates that the voltage formed by the offset has been reversed. The logic circuit (300) outputs a control signal to control the switch to cut off the compensation resistor (Rc) connected in the Pk phase, thereby terminating the offset compensation process.

[0031] In the illustrated embodiment, the offset is eliminated by increasing the number of compensation resistors (Rc) connected in parallel with the bias resistor (Rb) and raising the compensation voltage to the offset voltage. However, in other embodiments not illustrated, the offset can be eliminated by reducing the compensation voltage to the offset voltage by connecting all the bias resistors and compensation resistors in parallel and then disconnecting the connections of the compensation resistors.

[0032] FIG. 5 is a diagram illustrating an embodiment in which the instrumentation amplifier (10) further includes a ripple reduction loop (200). Referring to FIG. 4, the illustrated instrumentation amplifier (10) further includes a ripple reduction loop (500). The ripple reduction loop (500) includes blocking capacitors (Cs1, Cs2) of the instrumentation amplifier (10), a chopper (CHrrl) that chops the AC component of the ripple, an integrator that accumulates the output of the chopper, and a transfer impedance amplifier (Gmrrl) that changes the output of the integrator into a corresponding current and outputs it.

[0033] Blocking capacitors (Cs1, Cs2) block the inflow of the DC component from the ripple formed at the output node of the instrumentation amplifier (10) and output the AC component. The ripple formed at the output of the instrumentation amplifier (10) is formed by up-modulating the offset. A chopper (CHrrl) demodulates the AC component of the ripple formed by up-modulating the offset and converts it down.

[0034] The integrator accumulates the output of the chopper (CHrrl) to output a signal of a low frequency component, and the transfer impedance amplifier (GMrrl) outputs a compensation current signal corresponding to the signal output from the integrator, which can compensate for the offset. The ripple reduction loop (500) can further reduce the ripple formed at the output of the instrumentation amplifier (10) according to the present embodiment.

[0035] In the illustrated embodiment, first, a large amplitude ripple can be reduced using a ripple reduction loop (500). Subsequently, when the ripple amplitude is reduced below a threshold value, the amplitude of the ripple can be further reduced by using a comparator (200), a logic circuit (300), and a resistor DAC (400).

[0036] Simulation results

[0037] FIG. 6(a) is a diagram comparing the simulation results of the prior art and the present embodiment. Referring to FIG. 6(a), it can be seen that in the prior art, the output of the differential amplifier forms a ripple of 2mV due to the offset. However, according to the present embodiment exemplified by FIG. 6(b), it can be confirmed that the offset is eliminated and a ripple of only 4μV is formed.

[0038] To aid in understanding the present invention, the embodiments illustrated in the drawings have been described with reference to the examples shown; however, these are merely illustrative examples for implementation, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the appended claims. Explanation of the symbols

[0039] 10: Instrumentation amplifier 100: Amplifier 200: Comparator 300: Logic circuit section 400: Resistor DAC 500: Ripple decrease loop

Claims

Claim 1 A differential input differential amplifier that provides a differential input signal and a differential output signal to a differential input terminal, wherein an offset is formed between the differential input terminals; a comparator that compares one output with another output among the differential outputs; a logic circuit that generates a digital code corresponding to the output of the comparator; and a resistor DAC (digital-analog converter) that forms an equivalent resistance corresponding to the digital code output by the logic circuit and forms a compensation voltage formed by the equivalent resistance, wherein the compensation voltage compensates for the offset. Claim 2 In claim 1, the resistance DAC comprises a bias resistor connected to the differential input terminal and a plurality of compensation resistors, and a switch that conducts to connect the compensation resistor in parallel with the bias resistor, wherein the compensation voltage is formed by voltage division between the compensation resistors connected in parallel with the bias resistor when the switch conducts and the input resistor of the differential input differential amplifier. Claim 3 In claim 1, the instrumentation amplifier further comprises an input chopper to which the differential input is provided, an output chopper that chops the output of the amplifier, and a feedback chopper connected to the negative feedback path of the amplifier. Claim 4 In paragraph 3, the instrumentation amplifier further comprises a low-pass filter connected to the output chopper. Claim 5 In claim 1, the instrumentation amplifier further comprises a ripple reduction loop, wherein the ripple reduction loop comprises: a blocking capacitor that outputs an AC component of ripple formed at the output node of the instrumentation amplifier; a chopper that chops and down-converts the AC component of the ripple; an integral that accumulates the output of the chopper; and a transfer impedance amplifier that converts the output of the integrator into a corresponding current to output a compensation current that compensates for the offset. Claim 6 In claim 1, the resistor DAC comprises: a plurality of resistors, each; a voltage rail electrically connected to the plurality of resistors to provide voltage; and a plurality of switches connected to each of the plurality of resistors, comprising an instrumentation amplifier. Claim 7 In claim 6, each of the plurality of switches is a measurement amplifier in which conduction and blocking are controlled according to the digital code generated by the logic circuit, and the equivalent resistance of the plurality of resistors is controlled. Claim 8 In claim 7, the resistance DAC is an instrumentation amplifier that outputs the compensation voltage formed by voltage dividing the reference voltage with the controlled equivalent resistance and the input resistance of the differential amplifier.

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