NF3 ultra-low flow

Abstract

A semiconductor manufacturing system may include a gas canister that may contain a gas mixture containing NF3 in the range of about 0.5% to about 5% (including boundary values). The system may include a semiconductor processing chamber. The system may include a mass flow controller configured to provide the gas mixture to the semiconductor processing chamber. The system may include a substrate support disposed within the semiconductor processing chamber.

Description

Technology Field

[0001] [Cross-reference to related applications]

[0002] This application claims the benefit and priority thereto of U.S. Provisional Application No. 63 / 622,455, filed January 18, 2024, titled “NF3 ULTRA LOW FLOW”, the contents of which are incorporated herein by reference in their entirety for all purposes.

[0003] [Technology Field]

[0004] The present technology relates to semiconductor systems, processes, and equipment. More specifically, the present technology relates to providing etchants for semiconductor manufacturing. Background Technology

[0005] The etching rates for semiconductor substrates are, at least in part, controlled by the amount of etchant supplied to the semiconductor processing chamber. Etching agents are typically delivered as components within a gas mixture, where the etchant is combined with an inert gas as a diluent. The concentrations of etchants within the gas mixture can cause undesirable effects even when errors in the delivery of the gas mixture to the semiconductor processing chamber are very small.

[0006] A semiconductor manufacturing system may include a gas canister that may contain a gas mixture containing NF3 in the range of about 0.5% to about 5% (including boundary values). The system may include a semiconductor processing chamber. The system may include a mass flow controller configured to provide the gas mixture to the semiconductor processing chamber. The system may include a substrate support disposed within the semiconductor processing chamber.

[0007] The method may include the step of providing a semiconductor substrate disposed within a processing chamber, wherein the semiconductor substrate may include a silicon germanium (SiGe) layer. The method may include the step of connecting a gas canister to the processing chamber that may contain a gas mixture of about 1% nitrogen trifluoride (NF3). The method may include the step of providing the gas mixture from the gas canister to the processing chamber through a mass flow controller. The method may include the step of adjusting the mass flow controller so that the gas component reaches a predetermined level within the semiconductor processing chamber. The method may include the step of generating plasma within the semiconductor processing chamber to form F2. The method may include the step of etching the SiGe layer of the semiconductor substrate using F2.

[0008] The system may include a semiconductor processing chamber that may include a substrate holder configured to support a semiconductor substrate. The system may include a gas canister that may include a gas mixture. The system may include a mass flow controller that is fluidically connected to the gas canister and configured to provide gas to the semiconductor chamber. The system may include one or more processors. The system may include a computer-readable medium containing instructions that cause the system to perform operations when executed by one or more processors. The operations may include providing a gas mixture from the gas canister to the processing chamber through the mass flow controller, and adjusting the mass flow controller so that the gas component reaches a predetermined level within the semiconductor processing chamber. Brief explanation of the drawing

[0009] FIG. 1a illustrates a plan view of one embodiment of a processing system of deposition, processing, etching, baking, and curing chambers according to specific embodiments. FIG. 1b illustrates a cross-sectional view of an exemplary processing chamber according to specific embodiments. FIG. 2 illustrates a gas canister containing a gas mixture according to specific embodiments. FIG. 3 illustrates a flowchart of a method for providing an etching agent to a semiconductor processing chamber according to specific embodiments. FIG. 4 illustrates an exemplary computer system in which various embodiments can be implemented. Specific details for implementing the invention

[0010] As the volume of mobile devices and other electronic devices has increased explosively worldwide, the demand for more efficient manufacturing of the various semiconductor components of these devices has also increased exponentially. Furthermore, the size of the structures of various semiconductor components can be reduced, which requires finer control over various processes during the manufacturing process.

[0011] For example, a substrate used to manufacture semiconductor devices may include a silicon layer and a silicon germanium (SiGe) layer. The SiGe layer may be etched to create various structures on the substrate. However, the etchants used to etch the SiGe layer may also etch the silicon layer. Smaller and / or more complex structures on the substrate may require finer control of the etching rates of the SiGe and silicon layers, respectively. The etching rate may be, at least in part, determined by the mass of the etchant present in the semiconductor processing chamber during the etching process. For example, a larger amount of etchant can increase the etching rate of both the SiGe and silicon layers. In some cases, this may be desirable. In other cases, a more selective etching process may be preferred, and a smaller amount of etchant may be used.

[0012] To deliver the etchant to the semiconductor processing chamber, a gas mixture is introduced and can be decomposed by plasma. Typically, the etchant may be included in the gas mixture in a percentage of about 10% to about 20%. For example, a typical gas mixture may contain 10% nitrogen trifluoride (NF3) and 90% inert gas (e.g., helium). Typical flow rates of the gas mixture into the semiconductor processing chamber may range from 1 standard cubic centimeter per minute (SCCM) to 100 SCCM or more. Even at low flow rates, an error of 0.1 SCCM can introduce more etchant (e.g., NF3 and / or F2) into the semiconductor processing chamber, which leads to unwanted effects during the manufacturing process. Although the effects of arbitrary errors may be less critical at higher flow rates (e.g., at 100 SCCM, an error of 0.1 SCCM and a gas mixture of 10% NF3 can result in a 0.01% increase in etchant), the total amount of etchant in the semiconductor chamber can result in an excessively high etching rate of the SiGe and / or silicon layers.

[0013] To provide finer control over the etching rates of SiGe and silicon layers, a gas mixture of approximately 1% NF3 (or other etchants) may be used. The gas mixture can be delivered from commonly used semiconductor processing chambers and tools. If the concentration of the etchant in the gas mixture is lower, a higher flow rate of the gas mixture into the semiconductor processing chamber may be allowed. For example, the gas mixture may be delivered to the semiconductor processing chamber at 100 SCCM. Therefore, an error of 0.1 SCCM in the flow rate may result in only a 0.1% increase in the amount of NF3 in the semiconductor processing chamber during the etching process. This error may affect the etching rates of the SiGe and silicon layers within acceptable parameters.

[0014] FIG. 1a illustrates a plan view of one embodiment of a processing system (10) of deposition, processing, etching, baking, and curing chambers according to specific embodiments. In the drawing, a pair of forward-open integrated pods (12) are received by robotic arms (14) and supply substrates of various sizes to be placed in a low-pressure holding area (16) before being placed in one of the semiconductor processing chambers (18a-f) located in tandem sections (19a-c). A second robotic arm (11) may be used to transport and return substrate wafers from the holding area (16) to the semiconductor processing chambers (18a-f). Each semiconductor processing chamber (18a-f) may be configured to perform a number of substrate processing operations, including the formation of stacks of semiconductor materials described herein, in addition to other substrate processes including plasma-enhanced chemical vapor deposition, atomic layer deposition, physical vapor deposition, etching, pre-cleaning, degassing, orientation, and plasma processing, annealing, ashing, etc.

[0015] The semiconductor processing chambers (18a-f) may include one or more system components for depositing, plasma treating, curing, and / or etching a dielectric or other film on a substrate. In one configuration, two pairs of semiconductor processing chambers (e.g., 18c-d and 18e-f) may be used to deposit dielectric material on a substrate, and a third pair of semiconductor processing chambers (e.g., 18a-b) may be used to process the deposited dielectric. In another configuration, all three pairs of chambers (e.g., 18a-f) may be configured to deposit and process stacks of alternating dielectric films on a substrate. One or more of the described processes may be performed in chambers separated from the manufacturing system illustrated in different embodiments. It will be understood that additional configurations of chambers for deposition, treatment, etching, annealing, and curing of dielectric films are taken into account by the system (10).

[0016] FIG. 1b illustrates a cross-sectional view of an exemplary processing chamber (100) according to specific embodiments. The drawing may illustrate an overview of a system that may include one or more aspects of the present technology and / or be specifically configured to perform one or more operations according to embodiments of the present technology. Further details of the chamber (100) or the methods performed may be described further below. The chamber (100) may be used to form film layers, etch material layers, form other material layers, or perform a combination thereof, but it should be understood that deposition and etching methods may similarly be performed within any chamber where deposition and etching processes may occur. The processing chamber (100) may include a chamber body (102), a substrate support (104) disposed inside the chamber body (102), and a cover assembly (106) coupled to the chamber body (102) and surrounding the substrate support (104) in a processing volume (120). The substrate (103) may be provided to the processing volume (120) through an opening (126) that can be typically sealed for processing using a slit valve or door. The substrate (103) may be placed on the surface (105) of the substrate support during processing. In some embodiments, the substrate support (104) may be rotatable along an axis (147), as indicated by the arrow (145), wherein the shaft (144) of the substrate support (104) may be positionable or fixed. Alternatively, the substrate support (104) may be lifted and rotated as needed during the deposition process.

[0017] The gas distributor (112) may define apertures (118) for distributing process precursors within a processing volume (120). The gas distributor (112) may be coupled with a first power source (142), such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source that can be coupled with a processing chamber. In some embodiments, the first power source (142) may be an RF power source.

[0018] The gas distributor (112) may be a conductive gas distributor or a non-conductive gas distributor. The gas distributor (112) may also be formed of conductive and non-conductive components. For example, the body of the gas distributor (112) may be conductive, while the front plate of the gas distributor (112) may be non-conductive. The gas distributor (112) may be powered by a first power source (142), such as illustrated in FIG. 1, or the gas distributor (112) may be coupled to ground in some embodiments.

[0019] The first electrode (122) may be coupled to the substrate support (104). The first electrode (122) may be embedded within the substrate support (104) or coupled to the surface of the substrate support (104). The first electrode (122) may be a plate, a perforated plate, a mesh, a wire screen, or any other distributed arrangement of conductive elements. The first electrode (122) may be a control electrode and may be coupled to a control circuit (136) by a conduit (146) disposed on the shaft (144) of the substrate support (104), for example, by a cable having a selected resistance, such as 50 ohms. The control circuit (136) may have an electronic sensor (138) and an electronic controller (140), which may be a variable capacitor. The electronic sensor (138) may be a voltage or current sensor and may be combined with a second electronic controller (140) to provide additional control over plasma conditions in the processing volume (120).

[0020] A second electrode (124), which may be a bias electrode and / or an electrostatic chucking electrode, may be coupled to the substrate support (104). The second electrode may be coupled to a second power source (150) through a filter (148), which may be an impedance matching circuit. The second power source (150) may be DC power, pulsed DC power, RF bias power, pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second power source (150) may be RF bias power. The substrate support (104) may also include one or more heating elements configured to heat the substrate to a processing temperature that may be about 25°C to about 800°C or higher.

[0021] The cover assembly (106) and substrate support (104) of FIG. 1 may be used with any processing chamber for plasma or thermal processing. During operation, the processing chamber (100) may provide real-time control of plasma conditions in the processing volume (120) through a system controller (101) that may be included, for example, in a processor (107). A substrate (103) may be placed on the substrate support (104), and process gases may flow through the cover assembly (106) using an inlet (114) according to any desired flow plan. The gases may exit the processing chamber (100) through an outlet (152). To establish plasma within the processing volume (120), power may be coupled with a gas distributor (112). In some embodiments, the substrate may be electrically biased using a second electrode (124).

[0022] When plasma is activated within the processing volume (120), a potential difference can be established between the plasma and the first electrode (122). Next, an electronic controller (140) can be used to control the flow characteristics of the ground paths represented by the control circuit (136). A set point can be transmitted to the first circuit (136) to provide independent control of the deposition rate and plasma density uniformity from the center to the edge. In embodiments where both electronic controllers may be variable capacitors, the electronic sensors can independently control the variable capacitors to maximize the deposition rate and minimize thickness non-uniformity.

[0023] The adjustment circuit (136) may have a variable impedance that can be adjusted using an electronic controller (140). If the electronic controller (140) is a variable capacitor, the capacitance range of each variable capacitor may be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, which may have a minimum value at the capacitance range of each variable capacitor. Therefore, when the capacitance of the electronic controller (140) is at a minimum or maximum, the impedance of the adjustment circuit (136) may be high, resulting in a plasma shape having minimum aerial or lateral coverage on the substrate support. When the capacitance of the electronic controller (140) approaches a value that minimizes the impedance of the adjustment circuit (136), the area coverage of the plasma increases to a maximum, so that the entire working area of ​​the substrate support (104) can be effectively covered. As the capacitance of the electronic controller (140) deviates from the minimum impedance setting, the plasma shape can be reduced from the chamber walls and the area coverage of the substrate support can be reduced.

[0024] An electronic sensor (138) can be used to control the circuit (136) in a closed loop. Depending on the type of sensor used, a set point for current or voltage may be installed on each sensor, and to minimize deviation from the set point, the sensor may be provided with control software that determines the control for each electronic controller (140). Consequently, the plasma shape can be selected and dynamically controlled during processing. Although the foregoing discussion is based on an electronic controller (140) which may be a variable capacitor, it should be understood that any electronic component having adjustable characteristics may be used to provide a control circuit (136) having adjustable impedance.

[0025] FIG. 2 illustrates a gas canister (200) containing a gas mixture according to specific embodiments. The gas canister (200) may be configured to provide gases to a semiconductor processing chamber, such as the processing chamber (100) of FIG. 1b. During operation, the gas canister may be fluidly connected to the semiconductor processing chamber, for example, through an inlet (114). The gas mixture may be provided to the semiconductor processing chamber through a mass flow controller. The mass flow controller may be a component of the semiconductor processing chamber or an independent controller. The mass flow controller may allow one or more parameters and may transfer the gas mixture from the gas canister (200) to the semiconductor processing chamber according to one or more parameters. The mass flow controller may include an operating range of about 0.5 SCCM to about 150 SCCM (including boundary values). In some embodiments, the mass flow controller may include an operating metric of about 0.1 SCCM to about 5 SCCM (including boundary values). In some embodiments, the mass flow controller may include an operating metric of about 3 SCCM.

[0026] In some cases, the mass flow controller may have an operating range of about 10% to about 90%. This means that if the mass flow controller has an operating metric of 3 SCCM, the mass flow controller may be inaccurate at flow rates below about 0.3 SCCM and / or above about 2.7 SCCM. Therefore, the range of gas mixtures that can be reliably provided by the mass flow controller is about 2.4 SCCM. At higher NF3 concentrations, this may not provide sufficient tunability to reliably control the etching process.

[0027] The gas mixture may include fluorine, chlorine, and / or other gases suitable for etching semiconductor components. The gas mixture may also include one or more inert gases, such as nitrogen, argon, helium, and other such gases. The gas mixture may include etchants and inert gases in a predetermined mixture so that a specific concentration of etchant is provided to the semiconductor chamber. For example, the gas mixture may include NF3 and He. During the operation of the semiconductor processing chamber, the gas mixture may be introduced into the plasma as described above. When the gas mixture is introduced into the plasma, it decomposes into different gas species. For example, the gas mixture may contain NF3 in quantities such that, when decomposed into different gas species, NF3 constitutes about 5% (by mass) of the different gas species. In some embodiments, NF3 may constitute about 4% of the different gas species. In other embodiments, NF3 may constitute about 3% of the different gas species. In other embodiments, NF3 may constitute about 2% of different gas species. In other embodiments, NF3 may constitute about 1% of different gas species. In other embodiments, NF3 may constitute about 0.5% of different gas species.

[0028] By delivering an etchant (e.g., fluorine) to a semiconductor processing chamber at concentrations of about 0.5% to about 5% by mass, more precise control can be obtained during the etching process. For example, a substrate within the semiconductor processing chamber may comprise a silicon layer and a silicon germanium (SiGe) layer. To form a desired semiconductor device, the SiGe layer may be etched using an etchant. However, while the etchant may selectively etch the SiGe layer faster than the silicon layer, partial etching of the silicon layer may occur. The etching rate of the silicon layer can affect the structures that can be formed by etching the SiGe layer. For example, a desired structure may be formed by etching the SiGe layer over a given period. However, the silicon layer may also be etched, rendering the resulting semiconductor device unusable and / or reducing its performance.

[0029] This can be particularly true at the commonly available concentrations of gas mixtures. Furthermore, the effects of errors in the delivery of the gas mixture to the semiconductor processing chamber can be amplified using the commonly available concentrations of the gas mixtures. For example, a mass flow controller may provide the gas mixture to the semiconductor processing chamber at a flow rate of about 3 standard cubic centimeters per minute (SCCM). To properly control the etching rate of the SiGe layer versus the etching rate of the silicon layer, the mass flow controller may lower the flow rate to about 1 SCCM. At such low flow rates, the effects of any error on the etching rates can be fatal. For example, a commonly available gas mixture may contain 10% NF3 by mass. At 1 SCCM, an error of 0.1 SCCM (or 10% error) can result in an additional 1% NF3 within the semiconductor chamber. This can result in the silicon layer being etched faster than desired, particularly compared to the etching rate of the SiGe layer.

[0030] In contrast, a gas mixture containing 1% NF3 can provide more precise control over etching rates. For example, if a mass flow controller provides a gas mixture of 10 SCCM with an error of 0.1 SCCM (or 1% error), the concentration of NF3 in the semiconductor processing chamber can be increased by only 0.1% NF3 on a mass basis. Thus, the impact on the etching rates of the silicon and SiGe layers can be minimized to remain within acceptable parameters. If much finer control is desired, the mass flow rate can be lowered, and the concentrations of the etchants are controlled much more effectively.

[0031] FIG. 3 illustrates a flowchart of a method (300) for providing an etchant to a semiconductor processing chamber according to specific embodiments. The method (300) may be performed by some or all of the components and systems described herein. Some or all of the steps of the method (300) may be combined with other steps and / or performed in a different order than described. Some steps may be skipped entirely.

[0032] In step (302), the method (300) may include the step of providing a semiconductor substrate to a semiconductor processing chamber. The semiconductor substrate may include a silicon layer and a silicon germanium layer. The semiconductor processing chamber may be similar to the processing chamber (100) of FIG. 1B. The silicon layer and the SiGe layer may be patterned to form one or more structures for a semiconductor device. The semiconductor substrate may include an etching mask for selectively etching portions of the silicon and / or SiGe layers.

[0033] In step (304), the method (300) may include the step of connecting a gas canister to a processing chamber. The gas canister may contain a gas mixture. The gas mixture may contain NF3 in quantities such that, when decomposed into different gas species, NF3 constitutes about 5% (by mass) of the different gas species. In some embodiments, NF3 may constitute about 4% of the different gas species. In other embodiments, NF3 may constitute about 3% of the different gas species. In other embodiments, NF3 may constitute about 2% of the different gas species. In other embodiments, NF3 may constitute about 1% of the different gas species. In other embodiments, NF3 may constitute about 0.5% of the different gas species.

[0034] In step (306), the method (300) may include the step of providing a gas mixture from a gas container to a processing chamber through a mass flow controller. The mass flow controller may provide a flow of the gas mixture into the semiconductor processing chamber according to predetermined parameters. For example, the mass flow controller may provide the gas mixture to the semiconductor processing chamber in a range of about 1 SCCM to about 150 SCCM.

[0035] A gas mixture may be supplied to the semiconductor chamber so that the amount of NF3 within the semiconductor chamber reaches a predetermined threshold. A wafer (or substrate) within the semiconductor chamber may need to be etched to form a semiconductor device. A second wafer within a second semiconductor chamber may also need to be etched to form the same semiconductor device. Because the number of semiconductor devices produced and used across various industries is so large, it may be desirable to produce uniform semiconductor devices regardless of the specific semiconductor processing chamber used. Therefore, the predetermined threshold may serve as a starting point for the etching process.

[0036] For example, the starting point may be the mass or volume of NF3 used to etch the wafers. A first mass flow controller attached to the first semiconductor processing chamber may have a slight error, meaning that instead of providing 3 SCCM required to reach the starting point, the first mass controller actually provides 3.2 SCCM. A second mass controller attached to the second semiconductor processing chamber may actually provide 2.8 SCCM. Therefore, although the wafers in the first and second semiconductor processing chambers must be identical, the wafers may experience different etching rates based on the variable levels of NF3 present in each chamber.

[0037] A computing system configured to monitor NF3 within semiconductor processing chambers (e.g., by monitoring the etching rate) may determine that the amount of NF3 in each of the semiconductor processing chambers is different. In response, the computing system may modify one or both of the mass flow controllers so that a consistent mass or volume of NF3 is provided to each of the semiconductor processing chambers. In other words, the amount of gas mixture provided to the first semiconductor processing chamber may be based at least partially on the operating metric of the second mass flow controller.

[0038] The process described above may be performed during the semiconductor manufacturing process, that is, during the production of semiconductor devices. In some embodiments, the above process may be performed as part of a verification process (e.g., before actual production begins).

[0039] In step (308), the method (300) may include the step of generating plasma within a semiconductor processing chamber to form F2. For example, the gas mixture may contain 1% NF3 and 99% helium. When the gas mixture is introduced into the plasma, it may decompose into NF3 and F2. F2 may be radical fluorine and may interact with silicon and / or SiGe layers to etch the semiconductor substrate.

[0040] In step (310), the method (300) may include the step of etching a SiGe layer of a semiconductor substrate using F2. A silicon layer may also be etched by F2. After etching the SiGe and / or silicon layer, the semiconductor substrate may be further processed to manufacture a semiconductor device.

[0041] FIG. 4 illustrates an exemplary computer system (400) in which various embodiments may be implemented. The system (400) may be used to implement any of the computer systems described above. As illustrated in the drawing, the computer system (400) includes a processing unit (404) that communicates with a number of peripheral subsystems via a bus subsystem (402). These peripheral subsystems may include a processing acceleration unit (406), an I / O subsystem (408), a storage subsystem (418), and a communication subsystem (424). The storage subsystem (418) includes a type of computer-readable storage medium (422) and a system memory (410).

[0042] The bus subsystem (402) provides a mechanism for various components and subsystems of the computer system (400) to communicate with each other as intended. Although the bus subsystem (402) is schematically illustrated as a single bus, alternative embodiments of the bus subsystem may utilize multiple buses. The bus subsystem (402) may be any of several types of bus structures, including a memory bus or memory controller, a peripheral bus, and a local bus using any of various bus architectures. For example, such architectures may include an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MCA) bus, an Enhanced ISA (EISA) bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus that can be implemented as a mezzanine bus manufactured according to the IEEE P1386.1 standard.

[0043] A processing unit (404), which may be implemented as one or more integrated circuits (e.g., conventional microprocessors or microcontrollers), controls the operation of a computer system (400). One or more processors may be included in the processing unit (404). These processors may include single-core or multi-core processors. In certain embodiments, the processing unit (404) may be implemented as one or more independent processing units (432 and / or 434), and single or multi-core processors are included in each processing unit. In other embodiments, the processing unit (404) may also be implemented as a quad-core processing unit formed by integrating two dual-core processors onto a single chip.

[0044] In various embodiments, the processing unit (404) may execute various programs in response to program code and may maintain a number of concurrently executed programs or processes. At any given time, part or all of the program code to be executed may reside in the processor(s) (404) and / or the storage subsystem (418). Through suitable programming, the processor(s) (404) may provide the various functions described above. The computer system (400) may further include a processing acceleration unit (406) which may include a digital signal processor (DSP), a special purpose processor, etc.

[0045] The I / O subsystem (408) may include user interface input devices and user interface output devices. User interface input devices may include pointing devices such as keyboards, mice, or trackballs, touchpads or touchscreens integrated into a display, scroll wheels, click wheels, dials, buttons, switches, keypads, audio input devices having voice command recognition systems, microphones, and other types of input devices. User interface input devices may include, for example, motion detection and / or gesture recognition devices that enable users to control and interact with input devices through a natural user interface using gestures and verbal commands. Additionally, user interface input devices may include voice recognition detection devices that enable users to interact with voice recognition systems through voice commands.

[0046] User interface input devices may also include, but are not limited to, three-dimensional (3D) mice, joysticks or pointing sticks, gamepads and graphic tablets, and audio / visual devices, such as speakers, digital cameras, digital camcorders, portable media players, webcams, image scanners, fingerprint scanners, barcode readers, 3D scanners, 3D printers, laser rangefinders, and eye-tracking devices. Additionally, user interface input devices may include medical imaging input devices, such as computed tomography, magnetic resonance imaging, positional emission tomography, and medical ultrasound devices. User interface input devices may also include audio input devices, such as MIDI keyboards, digital instruments, etc.

[0047] User interface output devices may include non-visual displays such as display subsystems, indicator lights, or audio output devices. Display subsystems may be flat-panel devices, projection devices, touch screens, etc., such as using cathode ray tubes (CRT), liquid crystal displays (LCD), or plasma displays. Generally, the use of the term “output device” is intended to include all possible types of devices and mechanisms for outputting information from a computer system (400) to a user or another computer. For example, user interface output devices may include, but are not limited to, various display devices that visually convey text, graphics, and audio / video information, such as monitors, printers, speakers, headphones, automotive navigation systems, plotters, voice output devices, and modems.

[0048] The computer system (400) may include a storage subsystem (418) comprising software elements described as currently located within the system memory (410). The system memory (410) may store program instructions that are loadable and executable on the processing unit (404), as well as data generated during the execution of these programs.

[0049] Depending on the configuration and type of the computer system (400), the system memory (410) may be volatile (e.g., Random Access Memory (RAM)) and / or non-volatile (e.g., Read-Only Memory (ROM), flash memory, etc.). RAM typically contains data and / or program modules that are immediately accessible by the processing unit (404) and / or are currently operating and executing. In some implementations, the system memory (410) may contain a number of different types of memory, such as static random access memory (SRAM) or dynamic random access memory (DRAM). In some implementations, for example during startup, a basic input / output system (BIOS) containing basic routines that help transfer information between elements within the computer system (400) may typically be stored in ROM. As an example not limited to, system memory (410) also exemplifies application programs (412), program data (414), and operating system (416), which may include client applications, web browsers, intermediate layer applications, relational database management systems (RDBMS), etc.

[0050] The storage subsystem (418) may also provide a computer-readable storage medium of a type for storing basic programming and data constructs that provide the functions of some embodiments. Software (programs, code modules, instructions) that provide the functions described above, when executed by a processor, may be stored in the storage subsystem (418). These software modules or instructions may be executed by the processing unit (404). The storage subsystem (418) may also provide a storage for storing data used according to some embodiments.

[0051] The storage subsystem (400) may also include a computer-readable storage medium reader (420) that may be additionally connected to the computer-readable storage medium (422). Together with the system memory (410), and optionally in combination with it, the computer-readable storage medium (422) may comprehensively represent a storage medium for temporarily and / or more permanently containing, storing, transmitting, and retrieving computer-readable information in addition to remote, local, fixed, and / or removable storage devices.

[0052] A computer-readable storage medium (422) containing code or parts of code may also include, but is not limited to, any suitable medium including storage media and communication media, such as volatile and non-volatile, removable and non-removable media implemented by any method or technique for the storage and / or transmission of information. It may include a computer-readable storage medium of the type such as RAM, ROM, electrically eraseable and programmable ROM (EEPROM), flash memory or other memory technology, CD-ROM, digital multifunction disc (DVD), or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or other types of computer-readable media. It may also include an intangible computer-readable medium such as any other medium that can be used to transmit data signals, data transmissions, or desired information and can be accessed by a computing system (400).

[0053] For example, a computer-readable storage medium (422) may include a hard disk drive that reads from or writes to a non-removable, non-volatile magnetic medium, a magnetic disk drive that reads from or writes to a removable, non-volatile magnetic disk, and an optical disk drive that reads from or writes to a removable, non-volatile optical disk, such as a CD-ROM, DVD, or other optical medium. The computer-readable storage medium (422) may include, but is not limited to, flash memory cards, Universal Serial Bus (USB) flash drives, secure digital (SD) cards, DVD disks, digital video tapes, etc. The computer-readable storage medium (422) may also include solid-state drives (SSDs) based on non-volatile memory, such as flash memory-based SSDs, enterprise flash drives, solid-state ROM, etc., SSDs based on volatile memory, such as solid-state RAM, dynamic RAM, static RAM, DRAM-based SSDs, magnetoresistive RAM (MRAM) SSDs, and hybrid SSDs using a combination of DRAM and flash memory-based SSDs. Disk drives and their associated computer-readable media can provide a non-volatile storage of computer-readable instructions, data structures, program modules, and other data for a computer system (400).

[0054] The communication subsystem (424) provides an interface to other computer systems and networks. The communication subsystem (424) serves as an interface for receiving data from the computer system (400) and transmitting data to other systems. For example, the communication subsystem (424) may enable the computer system (400) to connect to one or more devices via the Internet. In some embodiments, the communication subsystem (424) may include radio frequency (RF) transceiver components, global positioning system (GPS) receiver components, and / or other components for accessing wireless voice and / or data networks (e.g., using cellular phone technology, 3G, 4G, 5G, or advanced data network technology such as EDGE (enhanced data rate for wide-area evolution), WiFi (IEEE 802.4 family standards, or other mobile communication technologies, or any combination thereof). In some embodiments, the communication subsystem (424) may provide wired network connectivity (e.g., Ethernet) in addition to or instead of the wireless interface.

[0055] In some embodiments, the communication subsystem (424) may also receive input communications in the form of structured and / or unstructured data feeds (426), event streams (428), event updates (430), etc., on behalf of one or more users who can use the computer system (400).

[0056] For example, the communication subsystem (424) may be configured to receive real-time data feeds (426) from users of social networks and / or other communication services, receive web feeds such as Rich Site Summary (RSS) feeds, and / or receive real-time updates from one or more third-party information sources.

[0057] Additionally, the communication subsystem (424) may also be configured to receive data in the form of continuous data streams, which may include event streams (428) and / or event updates (430) of real-time events that may be virtually continuous or infinite without explicit termination. Examples of applications that generate continuous data may include, for example, sensor data applications, financial tickers, network performance measurement tools (e.g., network monitoring and traffic management applications), clickstream analysis tools, automotive traffic monitoring, etc.

[0058] The communication subsystem (424) may also be configured to output structured and / or unstructured data feeds (426), event streams (428), event updates (430), etc. to one or more databases capable of communicating with one or more streaming data source computers coupled to the computer system (400).

[0059] Due to the ever-changing nature of computers and networks, the description of the computer system (400) illustrated in the drawings is intended only as a specific example. Many other configurations are possible with more or fewer components than the system illustrated in the drawings. For example, customized hardware may also be used and / or specific elements may be implemented in hardware, firmware, software (including applets), or a combination thereof. Additionally, connections to other computing devices, such as network input / output devices, may be employed. Based on the disclosures and teachings provided herein, other ways and / or methods for implementing various embodiments should be apparent.

[0060] In the foregoing description, many specific details have been presented for illustrative purposes to provide a thorough understanding of the various embodiments. However, it will be apparent that some embodiments may be implemented without some of these specific details. In other cases, well-known structures and devices are illustrated in the form of block diagrams.

[0061] The foregoing description is merely illustrative of embodiments and is not intended to limit the scope, applicability, or configuration of the present disclosure. Rather, the foregoing description of various embodiments will provide possible disclosures for implementing at least one embodiment. It should be understood that various modifications to the function and arrangement of elements may be made without departing from the spirit and scope of some of the embodiments set forth in the appended claims.

[0062] In the foregoing description, specific details are provided to offer a thorough understanding of the embodiments. However, it will be understood that the embodiments can be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may be illustrated as components in the form of block diagrams to avoid obscuring the embodiments with unnecessary details. In other cases, well-known circuits, processes, algorithms, structures, and techniques may be illustrated without unnecessary details to avoid obscuring the embodiments.

[0063] Additionally, it should be noted that individual embodiments may be described as processes illustrated in flowcharts, flow diagrams, data flow diagrams, structure diagrams, or block diagrams. While operations may be described as sequential processes in flowcharts, many operations may be performed in parallel or simultaneously. Furthermore, the order of operations may be rearranged. A process terminates when its operations are completed, but there may be additional steps not included in the drawings. A process may correspond to a method, function, procedure, subroutine, subprogram, etc. If a process corresponds to a function, its termination may correspond to returning the function to the calling function or the main function.

[0064] The term “computer-readable medium” includes, but is not limited to, portable or fixed storage devices, optical storage devices, wireless channels, and various other media capable of storing, containing, or carrying instruction(s) and / or data. Code segments or machine-executable instructions may represent procedures, functions, subprograms, programs, routines, subroutines, modules, software packages, classes, or any combination of instructions, data structures, or program statements. Code segments may be coupled to other code segments or hardware circuits by transmitting and / or receiving information, data, arguments, parameters, or memory contents. Information, arguments, parameters, data, etc., may be transmitted, forwarded, or conveyed through any suitable means, including memory sharing, message passing, token passing, network transmission, etc.

[0065] Furthermore, the embodiments may be implemented in hardware, software, firmware, middleware, microcode, hardware description languages, or any combination thereof. Where implemented in software, firmware, middleware, or microcode, program code or code segments that perform the necessary tasks may be stored on a machine-readable medium. Processor(s) may perform the necessary tasks.

[0066] In the foregoing specification, features have been described with reference to specific embodiments, but it should be recognized that not all embodiments are limited thereto. Various features and aspects of some embodiments may be used individually or together. Furthermore, without departing from the broad spirit and scope of this specification, the embodiments may be used in any number of environments and applications beyond those described herein. Accordingly, the specification and drawings should be regarded as illustrative rather than restrictive.

[0067] Additionally, for the purposes of illustration, the methods have been described in a specific order. It should be understood that in alternative embodiments, the methods may be performed in a different order than described. It should also be understood that the methods described above may be performed by hardware components or implemented as sequences of machine-executable instructions that can be used to have a machine, such as a general-purpose or special-purpose processor or logic circuit programmed with instructions, perform the methods. These machine-executable instructions may be stored on one or more machine-readable media, such as CD-ROMs or other types of optical discs, floppy diskettes, ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, flash memory, or other types of machine-readable media suitable for storing electronic instructions. Alternatively, the methods may be performed by a combination of hardware and software.

[0068] In the foregoing description, many specific details have been presented for illustrative purposes to provide a thorough understanding of the various embodiments. However, it will be apparent that some embodiments may be implemented without some of these specific details. In other cases, well-known structures and devices are illustrated in the form of block diagrams.

[0069] The foregoing description is merely illustrative of embodiments and is not intended to limit the scope, applicability, or configuration of the present disclosure. Rather, the foregoing description of various embodiments will provide possible disclosures for implementing at least one embodiment. It should be understood that various modifications to the function and arrangement of elements may be made without departing from the spirit and scope of some of the embodiments set forth in the appended claims.

[0070] In the foregoing description, specific details are provided to offer a thorough understanding of the embodiments. However, it will be understood that the embodiments can be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may be illustrated as components in the form of block diagrams to avoid obscuring the embodiments with unnecessary details. In other cases, well-known circuits, processes, algorithms, structures, and techniques may be illustrated without unnecessary details to avoid obscuring the embodiments.

[0071] Additionally, it should be noted that individual embodiments may be described as processes illustrated in flowcharts, flow diagrams, data flow diagrams, structure diagrams, or block diagrams. While operations may be described as sequential processes in flowcharts, many operations may be performed in parallel or simultaneously. Furthermore, the order of operations may be rearranged. A process terminates when its operations are completed, but there may be additional steps not included in the drawings. A process may correspond to a method, function, procedure, subroutine, subprogram, etc. If a process corresponds to a function, its termination may correspond to returning the function to the calling function or the main function.

Claims

Claim 1 A semiconductor manufacturing system comprising: a gas canister comprising a gas mixture containing NF3 in the range of about 0.5% to about 5% (including boundary values); a semiconductor processing chamber; a mass flow controller configured to provide the gas mixture to the semiconductor processing chamber; and a substrate support disposed within the semiconductor processing chamber. Claim 2 A system according to claim 1, wherein the mass flow controller provides the gas mixture to the semiconductor processing chamber at a rate of about 1 standard cubic centimeter per minute to about 150 standard cubic centimeters per minute. Claim 3 A system according to claim 1 or 2, wherein the gas mixture is used to perform an etching process on a substrate comprising silicon germanium. Claim 4 A system according to any one of paragraphs 1 to 3, wherein the gas mixture comprises nitrogen. Claim 5 A system according to any one of claims 1 to 4, wherein the gas mixture comprises helium. Claim 6 A system according to any one of claims 1 to 5, wherein the mass flow controller operates within a range of 10% to 90% of the operating range of the mass flow controller. Claim 7 A system according to any one of claims 1 to 6, wherein the mass flow controller controls the volume of NF3 in the semiconductor processing chamber to reach a predetermined threshold value. Claim 8 A method comprising the steps of: providing a semiconductor substrate disposed within a processing chamber — said semiconductor substrate comprises a silicon germanium (SiGe) layer —; connecting a gas canister containing a gas mixture of about 1% nitrogen trifluoride (NF3) to said processing chamber; providing said gas mixture from said gas canister to said processing chamber through a mass flow controller; adjusting said mass flow controller so that a component of said gas reaches a predetermined level within said semiconductor processing chamber; generating a plasma within said semiconductor processing chamber to form F2; and etching said SiGe layer of said semiconductor substrate using F2. Claim 9 In claim 8, the method wherein the mass flow controller comprises an operation metric within the range of 1 standard cubic centimeter per minute (SCCM) to 5 SCCM (including boundary values). Claim 10 A method according to claim 8 or 9, wherein the predetermined level within the semiconductor processing chamber is at least partially based on the operating metric of the second mass flow controller of the second semiconductor processing chamber. Claim 11 A method according to any one of claims 8 to 10, wherein the step of controlling the mass flow controller is performed as part of a verification routine. Claim 12 A method according to any one of claims 8 to 11, wherein the mass flow controller is at least partially controlled by a computing system configured to match the volume of the gas component in the semiconductor processing chamber with the second volume of the gas component in the second semiconductor chamber. Claim 13 A method according to any one of claims 8 to 12, wherein the mass flow controller operates within a range of 10% to 90% of the operating range of the mass flow controller. Claim 14 As a system, a semiconductor processing chamber — the semiconductor processing chamber is: A substrate holder configured to support a semiconductor substrate; Gas canister containing a gas mixture; Comprising a mass flow controller fluidically connected to the gas canister and configured to supply gas to the semiconductor chamber; one or more processors; and a computer-readable medium comprising instructions that, when executed by the one or more processors, cause the system to perform operations, wherein the operations are: The operation of supplying the gas mixture from the gas canister to the processing chamber through the mass flow controller; and A system comprising the operation of controlling the mass flow controller so that the component of the above gas reaches a predetermined level within the semiconductor processing chamber. Claim 15 In paragraph 14, the mass flow controller comprises a system having an operating metric within the range of 1 standard cubic centimeter per minute (SCCM) to 5 SCCM (including boundary values). Claim 16 A system according to claim 14 or 15, wherein the predetermined level within the semiconductor processing chamber is at least partially based on the operating metric of the second mass flow controller of the second semiconductor processing chamber. Claim 17 A system in which, in any one of claims 14 to 16, the operation of controlling the mass flow controller is performed as part of a verification routine. Claim 18 A system according to any one of claims 14 to 17, wherein the mass flow controller is at least partially controlled by a computing system configured to match the volume of the gas component in the semiconductor processing chamber with the second volume of the gas component in the second semiconductor chamber. Claim 19 A system according to any one of claims 14 to 18, wherein the mass flow controller operates within a range of 10% to 90% of the operating range of the mass flow controller. Claim 20 A system according to any one of claims 14 to 18, wherein the gas mixture comprises NF3.

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