Circuit board, and semiconductor package comprising the same

Abstract

A circuit board capable of uniformly forming a metal layer for forming a plating layer in a through hole of a glass layer and a semiconductor package including the same are disclosed. A circuit board according to an embodiment of the present invention comprises: a glass layer having an upper surface and a lower surface and a through hole penetrating between the upper surface and the lower surface; and a metal layer disposed on the glass layer and comprising a metal layer for plating a plating layer on the glass layer. The upper surface of the metal layer has an inclined surface inclined with respect to the upper surface of the glass layer and the inner wall of the through hole, respectively, in the upper region of the upper opening of the through hole.

Description

Technology Field

[0001] The present invention relates to a circuit board and a semiconductor package including the same. Background Technology

[0002] Semiconductor packages are used to protect semiconductor devices, such as chips and dies, and to electrically connect them to electronic components, such as main boards of electronic products. Semiconductor packages improve mounting area efficiency and enable high-speed signal transmission through short signal paths; consequently, they are utilized in a wide range of applications, including not only mobile devices but also autonomous vehicles, high-performance servers, and Internet of Things (IoT) products.

[0003] Semiconductor packages need to be designed to safely protect semiconductor devices, which are small in size and sensitive to physical shock, moisture, humidity, and heat, while ensuring the smooth implementation of functions such as signal and power transmission. As the demand for improved semiconductor device performance increases, the number or size of required semiconductor devices grows, and as semiconductor devices are divided into functional units, semiconductor chiplet technology is expanding. In semiconductor chiplet technology, semiconductor devices such as CPUs, GPUs, memory controllers, and interface (I / O) chips are manufactured separately and integrated into the semiconductor package.

[0004] The circuit board of a semiconductor package is a core component of electronic devices used to physically support and electrically connect electronic components. The circuit board must be designed to perform functions that ensure stable operation, such as accurately transmitting electrical signals between electronic components, fixing components in designated positions, and dissipating heat generated by the components. Circuit boards can be classified into core boards and coreless boards depending on the presence or absence of a core layer. Core boards, due to the presence of a core layer, are structurally robust and highly durable, exhibit minimal warping or deformation, and offer excellent stability and ease of handling during manufacturing and assembly.

[0005] Core substrates can be classified into plastic core substrates, ceramic substrates, glass core substrates, etc., depending on the material of the core layer. The Young's modulus of glass core substrates is four times that of organic core substrates, and due to their excellent elastic modulus performance, they exhibit superior warping and deformation characteristics. Furthermore, glass core substrates have a low coefficient of thermal expansion (CTE), which provides excellent compatibility with silicon chips and offers the advantage of enabling the fine formation of through-glass vias (TGVs). In addition, glass core substrates have smooth surface characteristics, which are advantageous for forming microcircuits; they also exhibit low signal loss; and their excellent temperature-dependent deformation and signal characteristics make them suitable for semiconductor miniaturization and large-area applications.

[0006] Due to the demands for miniaturization and finer microfabrication of semiconductors, as the width of through holes penetrating glass core substrates decreases, there are cases where through holes with a high aspect ratio (AR) must be formed in the core substrate. As the aspect ratio of through holes penetrating the core substrate of a semiconductor package increases, it becomes difficult to uniformly form a seed layer for forming a plating layer within the through holes. For example, to form a circuit layer on the inside of the through holes and on the upper and / or lower surfaces of the core substrate by electroplating, a metal layer can be formed on the inner surface of the through holes and on the upper and / or lower surfaces of the core substrate by sputtering or electroless plating.

[0007] Chemical plating methods have the disadvantage of being susceptible to cracking and requiring long processing times due to the small grain size of the metal layer formed. Sputtering methods offer the advantages of excellent adhesion and surface quality, as well as not causing environmental problems associated with the use of chemical solutions. However, sputtering methods exhibit strong deposition directionality, which can make it difficult to uniformly form a metal layer inside through-holes with high aspect ratios. Specifically, since sputtering particles primarily move in the vertical direction to deposit into the through-hole, the metal layer thickness in the surface region of the through-hole is deposited thickly first; consequently, sputtering particles may not be uniformly deposited in the interior region of the through-hole. The background technology described above refers to the background in which the present invention was derived and does not imply that it is prior art known before the filing of the present invention. The problem to be solved

[0008] One objective of the present invention is to provide a circuit board capable of uniformly forming a metal layer that serves as a seed layer for forming a plating layer in a through hole of a glass layer, and a semiconductor package including the same.

[0009] In addition, the present invention has the objective of improving the deposition uniformity of the metal layer inside the through hole by causing the metal layer to have an inclined angle in the upper region adjacent to the through hole of the glass layer.

[0010] In addition, the present invention has the purpose of relieving stress (mechanical stress, thermal stress, internal stress, etc.) applied to a circuit board by having a metal layer with an inclined angle in an area adjacent to a through hole in a glass layer.

[0011] In addition, the present invention has the objective of improving the stress of the circuit board and the adhesion performance of the metal layer through the gradient of the inclination angle of the multiple metal layer in the upper region adjacent to the through hole of the glass layer.

[0012] The technical problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0013] A circuit board according to an embodiment of the present invention comprises: a glass layer having an upper surface and a lower surface and a through hole penetrating between the upper surface and the lower surface; and a metal layer disposed on the glass layer to place a plating layer on the glass layer. The upper surface of the metal layer has an inclined surface inclined with respect to the upper surface of the glass layer and the inner wall of the through hole, respectively, in the upper region of the upper opening of the through hole.

[0014] The metal layer may include: an upper metal layer disposed on the upper surface of the glass layer to plate an upper circuit layer on the upper surface of the glass layer; and an inner metal layer disposed on the inner wall of the through hole to plate a through electrode within the through hole. The inclined surface may be disposed on the upper surface of the upper metal layer so as to overlap in the vertical direction with the perimeter of the upper opening of the through hole.

[0015] The upper metal layer may include: a first metal layer portion having an upper surface that is a flat surface parallel to the upper surface of the glass layer and does not overlap with the through hole in the vertical direction; and a second metal layer portion having an inclined surface on its upper surface that forms a downward slope from the upper surface of the first metal layer portion toward the through hole. The second metal layer portion may be arranged in a ring shape that partially overlaps with the through hole in the vertical direction.

[0016] The above inclined surface may not overlap with the through hole in a direction parallel to the upper surface of the glass layer.

[0017] The inclined surface may be extended in the radial direction of the through hole for a length of 0.3 to 0.9 times the thickness in the vertical direction of the first metal layer.

[0018] The above inclined surface may have an inclination of 20° to 70° with respect to the upper surface of the glass layer and the inner wall of the through hole, respectively.

[0019] The metal layer may include: a first metal layer comprising a first metal material disposed on the upper surface of the glass layer and the inner wall of the through hole; and a second metal layer disposed on the first metal layer comprising a second metal material different from the first metal material.

[0020] The upper surface of the first metal layer may have a first inclined surface inclined at a first angle of inclination with respect to the upper surface of the glass layer in an area that overlaps vertically with the upper opening of the through hole. The upper surface of the second metal layer may have a second inclined surface inclined at a second angle of inclination with respect to the upper surface of the glass layer in an area that overlaps vertically with the upper opening of the through hole.

[0021] In one embodiment, the first inclination angle of the first metal layer may be greater than the second inclination angle of the second metal layer.

[0022] In another embodiment, the first inclination angle of the first metal layer may be smaller than the second inclination angle of the second metal layer.

[0023] A circuit board according to an embodiment of the present invention may further include an upper build-up layer disposed on top of the glass layer. The metal layer may serve as a seed layer for plating a plating layer for forming an upper circuit layer of the upper build-up layer and a through electrode within the through hole.

[0024] The metal layer can be positioned to have the inclined surface by etching the metal layer by the ion beam of ion beam sputtering and rearranging the surface of the deposited material.

[0025] The above inclined surface may be a flat surface or a curved surface.

[0026] The angle of inclination of the above inclined surface may vary along the radial direction of the above through hole.

[0027] The thickness of the inner metal layer deposited on the inner wall of the through hole can be reduced downward.

[0028] The glass layer may have a chamfered structure on the upper inner wall corresponding to the upper opening of the through hole.

[0029] In addition, according to an embodiment of the present invention, a semiconductor package comprising the circuit board and a semiconductor element disposed on the circuit board may be provided. Effects of the invention

[0030] According to an embodiment of the present invention, a circuit board capable of uniformly forming a metal layer that serves as a seed layer for forming a plating layer in a through hole of a glass layer, and a semiconductor package including the same are provided.

[0031] In addition, according to an embodiment of the present invention, the metal layer is inclined at an angle in the upper region adjacent to the through hole of the glass layer, thereby improving the deposition uniformity of the metal layer inside the through hole.

[0032] In addition, according to an embodiment of the present invention, the metal layer is inclined at an angle in the region adjacent to the through hole of the glass layer, thereby relieving stress (mechanical stress, thermal stress, internal stress, etc.) applied to the circuit board.

[0033] In addition, according to an embodiment of the present invention, the stress of the circuit board and the adhesion performance of the metal layer can be improved through the gradient of the inclination angle of the multiple metal layer in the upper region adjacent to the through hole of the glass layer.

[0034] In addition, according to an embodiment of the present invention, signal transmission characteristics can be improved by forming a plating layer by uniformly depositing a metal layer in a high aspect ratio through hole penetrating a glass layer.

[0035] The effects that the present invention aims to achieve are not limited to those mentioned above, and other unmentioned effects can be clearly understood by those skilled in the art from the description below. Brief explanation of the drawing

[0036] FIG. 1a is a cross-sectional view showing a circuit board according to a first embodiment of the present invention. FIG. 1b is a cross-sectional view showing a circuit board according to a second embodiment of the present invention. Figure 2a is a cross-sectional view showing an enlarged view of part 'A' of Figure 1a. FIG. 2b is a plan view schematically showing the positional relationship between a second metal layer portion having an inclined surface of a metal layer constituting a circuit board according to an embodiment of the present invention and a through hole. FIG. 2c is a conceptual diagram illustrating a method for forming an inclined surface on a metal layer by ion beam sputtering according to an embodiment of the present invention. Figure 3 is a cross-sectional view showing an enlarged view of section 'B' of Figure 1a. FIG. 4 is a drawing showing a metal layer constituting a circuit board according to a third embodiment of the present invention. FIG. 5 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the fourth embodiment of the present invention. FIG. 6 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the fifth embodiment of the present invention. FIG. 7 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the 6th embodiment of the present invention. FIG. 8 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the seventh embodiment of the present invention. FIG. 9 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the eighth embodiment of the present invention. FIG. 10 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the ninth embodiment of the present invention. FIG. 11 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the 10th embodiment of the present invention. FIG. 12 is a cross-sectional view showing a semiconductor package according to an embodiment of the present invention. Specific details for implementing the invention

[0037] The terms used in this specification will be briefly explained, and the present invention will be described in detail. The terms used in this detailed description have been selected to be as widely used as possible, taking into account their functions in the present invention; however, these terms may vary depending on the intent of those skilled in the art to which the present invention pertains, case law, the emergence of new technologies, etc. Additionally, in specific cases, terms may be arbitrarily selected by the applicant, and in such cases, their meanings will be described in detail in the relevant part of the description of the invention. Therefore, the terms used in the present invention should be defined not merely by their names, but based on the meanings they possess and the content throughout the present invention.

[0038] The following describes embodiments with reference to the attached drawings so that those skilled in the art can easily implement the present invention. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein. Furthermore, in order to clearly explain the present invention in the drawings, parts unrelated to the explanation have been omitted, and similar parts throughout the specification are denoted by similar reference numerals.

[0039] Throughout the specification, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. In this specification, terms such as "first ~" and "second ~" are used solely for the purpose of distinguishing components from other components and are not limited to meaning the order of arrangement of components. In this specification, the meaning that another component is placed, stacked, or formed "on" a component should be understood to encompass not only a state in which the component and the other component are in direct contact, but also a state in which the component is placed, stacked, or formed with another component interposed therein.

[0040] Where one component is described as being "connected," "connected (contacted)," or "placed" to another component, this should be understood to encompass the fact that the components may be directly connected or connected to each other, but are indirectly connected, connected (contacted), or placed through the existence of another component between them. Where one component is described as being "directly" connected, connected (contacted), or placed to another component, this should be understood to mean that the components are directly connected, connected (contacted), or placed without the existence of another component between them.

[0041] FIG. 1a is a cross-sectional view showing a circuit board according to a first embodiment of the present invention. FIG. 1b is a cross-sectional view showing a circuit board according to a second embodiment of the present invention. Referring to FIG. 1a and FIG. 1b, a circuit board (100) according to an embodiment of the present invention may include a glass layer (110), a metal layer (120) disposed on the glass layer (110), a build-up layer (130, 140) disposed on the upper and / or lower part of the glass layer (110), and a plating layer (150) on the metal layer (120) in which at least a portion is disposed in a through hole (113) of the glass layer (110).

[0042] The glass layer (110) can form a core substrate made of glass material. The glass layer (110) is a plate-shaped insulating layer made of glass material and functions to improve the rigidity of the circuit board (100) by acting as a core of the circuit board (100). The glass layer (110) can have a high dielectric constant and a low surface roughness compared to an organic core layer equipped with glass fibers, thereby improving the rigidity of the circuit board (100) while minimizing signal transmission loss, which can improve the electrical reliability and / or mechanical reliability of the circuit board (100) and the semiconductor package including it.

[0043] In this specification, the glass layer (110) may be referred to by other terms such as 'core layer', 'glass core', 'glass core layer', 'glass core substrate', and 'glass substrate', which serve as the core of the circuit board (100). In order to ensure appropriate rigidity of the circuit board (100), miniaturize the size of the semiconductor product, and prevent excessive signal loss, the glass layer (110) may be provided with a thickness of 200 μm to 1500 μm, or a thickness thinner or thicker than this.

[0044] The glass layer (110) may include, for example, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, alumino-silicate glass, etc., but is not limited thereto, and may include fluorine glass, phosphate glass, chalcogen glass, etc. in addition to silicon-based glass compositions. Additionally, the glass layer (110) may further include other additives to form a glass having specific physical properties. These additives may include calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), as well as magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, and carbonates and / or oxides of these elements and other elements.

[0045] The glass layer (110) may have an upper surface (111) and a lower surface (112), and may have a plurality of through holes (113) penetrating between the upper surface (111) and the lower surface (112). Hereinafter, two directions parallel to the upper surface (111) of the glass layer (110) and perpendicular to each other will be described as the first direction (X) and the second direction (Y), respectively, and the vertical direction (or thickness direction) perpendicular to both the first direction (X) and the second direction (Y) will be described as the third direction (Z). The first direction (X) and the second direction (Y) may also be referred to as the horizontal direction, the side direction, or the vertical direction.

[0046] A metal layer (120) may be placed on the upper surface (111), lower surface (112), and / or inner surface (inner wall) of a through hole (113) of a glass layer (110) to form a plating layer (150). The metal layer (120) may be formed by depositing a metal material, such as titanium (Ti), chromium (Cr), or copper (Cu), by means of sputtering. Copper has poor adhesion to glass and may cause peeling from the glass layer (110). Accordingly, it may be preferable for the metal layer (120) to be formed from a material with excellent adhesion to the glass layer (110), such as titanium (Ti) or chromium (Cr). Alternatively, the metal layer (120) may be provided as a multi-metal layer, such that titanium (Ti) and / or chromium (Cr) are deposited on the glass layer (110), and another material, such as copper (Cu), is deposited thereon. In addition to the metal material mentioned, other materials such as tungsten (W), molybdenum (Mo), nickel (Ni), nichrome (NiCr), palladium (Pd), platinum (Pt), and silver (Ag) may be used as the metal layer (120).

[0047] The metal layer (120) can be formed on the inner wall of the through hole (113) of the glass layer (110) by sputtering, ion beam assisted sputtering, or electroless plating of a different method. If an insulating layer is placed on the inner wall of the through hole (113) of the glass layer (110), a copper material may be placed as a metal layer on the insulating layer within the through hole (113). The plating layer (150) formed on the metal layer (120) by the electrolytic plating process within the through hole (113) can form a through electrode (151).

[0048] The through electrode (151) can electrically connect the upper build-up layer (130) and the lower build-up layer (140), or electrically connect the build-up layers (130, 140) to other circuit boards, interposers, semiconductor devices, main boards, etc. The through hole (113) and the through electrode (151) of the glass layer (110) may have a horizontal width of approximately 10 μm to 100 μm for stable signal transmission and semiconductor miniaturization, or may have a width smaller or larger than this.

[0049] In the illustrated example, an upper build-up layer (130) and a lower build-up layer (140) are respectively disposed on the upper and lower surfaces of the glass layer (110), but either of these build-up layers (130, 140) may be omitted. In this case, a protective layer is disposed on the upper or lower surface of the glass layer (110), and can be electrically connected to another circuit board, interposer, semiconductor device, main board, etc. by solder bumps, etc. through the opening of the protective layer (upper protective layer or lower protective layer).

[0050] In this specification, a hole that penetrates the glass layer (110) entirely in the vertical direction (thickness direction) is called a "through hole" (113), and a hole that penetrates from the upper surface of the insulating layer (134a, 134b, 134c, 144a, 144b, 144c) of the build-up layer (130, 140) to the upper surface of the circuit layer (131, 132a, 132b, 132c, 141, 142a, 142b, 142c) is called a "blind via hole," and both are described using distinct terms.

[0051] The through hole (113) of the glass layer (110) can be formed by a laser process using a CO2 laser, etc. For example, the crystallization of the region of the glass layer (110) irradiated with a CO2 laser is altered, and then the through hole (113) can be formed by removing the region of the glass layer (110) with altered crystallization through wet etching using hydrofluoric acid (HF), etc. The through hole (113) formed by the laser process can be provided in the shape of an hourglass, with the width gradually decreasing from the surface (upper and / or lower surface) of the glass layer (110) toward the center, as shown in FIG. 1a.

[0052] The through hole (113) in the glass layer (110) may be formed by a method other than a laser process. For example, the through hole (113) in the glass layer (110) may be formed using a mechanical drill. In this case, as shown in FIG. 1b, the through hole (113) may be formed such that its inner surface (inner wall) is perpendicular to the upper surface (one side) (111) and / or lower surface (other side) (112) of the glass layer (110).

[0053] If the inner surface of the through hole (113) is perpendicular to the upper surface (111) and / or lower surface (112) of the glass layer (110), it may be difficult to densely fill the interior of the through hole (113) with a metallic material during the plating process of filling the through hole (113) with a conductive material. Additionally, if the through hole (113) is formed in the glass layer (110) using a mechanical drill, damage such as the glass layer (110) breaking may occur during the process of using the mechanical drill, and the product yield may be reduced accordingly.

[0054] If a cavity is created in the through electrode (151) filled in the through hole (113), electrical problems such as increased resistance, signal delay, signal attenuation, and open circuit may occur, or mechanical problems such as reduced reliability due to damage caused by external impact and thermal change, increased thermal stress due to bending, reduced heat dissipation performance due to reduced heat conduction, and cracks due to unbalanced thermal expansion may occur.

[0055] Accordingly, when it is necessary to ensure electrical, mechanical, and / or thermal performance and reliability in the glass layer (110), as shown in FIG. 1a, it may be preferable for the through hole (113) to be formed in a slanted shape such that its width in the horizontal direction gradually decreases toward the center from the upper surface (111) and / or lower surface (112) of the glass layer (110). Alternatively, if the width of the through hole (113) is large so that there is no problem in filling the metal layer (120) and / or plating layer (150) within the through hole (113), or if it is necessary to sufficiently secure the horizontal width at the center of the through hole (113) with respect to the vertical direction to improve signal transmission performance, a cylindrical through hole (113) as shown in FIG. 1b may be formed within the glass layer (110).

[0056] The build-up layer (130, 140) may be implemented as a single layer or multiple layers. The build-up layer (130, 140) may also be referred to as a redistribution layer (RDL) (upper RDL layer or lower RDL layer). The build-up layer (130, 140) may be formed with a thickness of at least 100 μm to 400 μm, and as the number of terminals of semiconductor devices placed on the circuit board (100) increases, the wiring becomes more complex and the number of layers of multiple layers increases, so it may be formed with a thickness of 1000 μm or less, or a thickness exceeding this.

[0057] The upper build-up layer (130) may include an upper circuit layer (131), a plurality of insulating layers (134a, 134b, 134c), a plurality of circuit layers (132a, 132b, 132c), and a protective layer (135). Each layer of the upper build-up layer (130) may include a circuit layer (or upper circuit layer) (131, 132a, 132b, 132c), an insulating layer (134a, 134b, 134c) covering the circuit layer, and via electrodes (133a, 133b, 133c) disposed in blind via holes of the insulating layers (134a, 134b, 134c).

[0058] An upper circuit layer (131) may be formed on the upper surface (111) of the glass layer (110). The upper circuit layer (131) may be formed through a plating process by an upper metal layer (121) disposed on the upper surface (111) of the glass layer (110) among the metal layers (120). A plurality of insulating layers (134a, 134b, 134c) may be sequentially stacked on the upper surface (111) of the glass layer (110). A plurality of circuit layers (132a, 132b, 132c) may be sequentially arranged in a direction moving upward away from the upper surface (111) of the glass layer (110). The circuit wiring of the upper circuit layer (131) and the circuit layers (132a, 132b, 132c) can be formed from at least one metal material selected from copper (Cu), gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), and zinc (Zn).

[0059] A plurality of insulating layers (134a, 134b, 134c) may be disposed between the upper circuit layer (131) and the plurality of circuit layers (132a, 132b, 132c) to insulate between the upper circuit layer (131) and the plurality of circuit layers (132a, 132b, 132c). The upper circuit layer (131) and the plurality of circuit layers (132a, 132b, 132c) may function as electrical connections with semiconductor devices disposed on the circuit board (100).

[0060] via electrodes (133a, 133b, 133c) may be placed in blind via holes of insulating layers (134a, 134b, 134c) to connect between the upper circuit layer (131) and a plurality of circuit layers (132a, 132b, 132c). The blind via holes and via electrodes (133a, 133b, 133c) of the insulating layers (134a, 134b, 134c) may have a horizontal width of approximately 10 μm to 100 μm for stable signal transmission and semiconductor miniaturization, or may have a width smaller or larger than this. The via electrodes (133a, 133b, 133c) may have a slope that narrows in width toward the glass layer (110), that is, toward the upper surface of the insulating layer (134a, 134b, 134c) toward the upper surface of the circuit layer (131) or the circuit layer (132a, 132b, 132c), or may have a constant width in the vertical direction.

[0061] via electrodes (133a, 133b, 133c) can be placed simultaneously in the process of placing circuit layers (132a, 132b, 132c). For example, in the process of placing a first circuit layer (132a) on a first insulating layer (134a), a blind via hole is formed in the first insulating layer (134a) to expose the upper part of the first insulating layer (134a), and then the first circuit layer (132a) is placed on the upper surface of the first insulating layer (134a), and at the same time, a first via electrode (133a) that electrically connects the first circuit layer (132a) and the first upper circuit layer (131) can be placed in the blind via hole.

[0062] Likewise, the second and third via electrodes (133b, 133c) can each form the second and third circuit layers (132b, 132c) on the upper surface of the second insulating layer (134b, 134d) and can also be disposed in the blind via holes of the second insulating layer (134b, 134d). Each circuit layer (132a, 132b, 132c) can be electrically connected to another upper circuit layer (131) or circuit layer (132a, 132b) disposed in a lower layer adjacent to the circuit layer (132a, 132b, 132c) by means of the via electrode (133a, 133b, 133c) disposed in the blind via hole.

[0063] The upper circuit layer (131) may be disposed on the upper surface of the glass layer (110). The upper circuit layer (131) may be connected to a through electrode (151) disposed in a through hole (113) of the glass layer (110). The first insulating layer (134a), the second insulating layer (134b), the third insulating layer (134c), and the upper protective layer (135) may be sequentially stacked upward from the upper surface (111) of the glass layer (110). The upper protective layer (135) may be disposed on the uppermost insulating layer (134c) among the plurality of insulating layers (134a, 134b, 134c).

[0064] Insulating layers (134a, 134b, 134c) may be arranged for vertical insulation between the upper circuit layer (131) and a plurality of circuit layers (132a, 132b, 132c). For example, the insulating layers (134a, 134b, 134c) may be made of a thermosetting insulating material containing inorganic fillers in a resin, or may be made using a build-up film called ABF (Ajinomoto Build-up Film) from Ajinomoto Corporation. However, the insulating layers (134a, 134b, 134c) may be made using FR-4, BT (Bismaleimide Triazine), a photocurable insulating material (Photo Imageable Dielectric resin, PID) for forming fine patterns, etc.

[0065] The upper protective layer (135) protects the upper surface of the upper build-up layer (130), performs an insulating function between the wiring electrodes of the circuit layer (132c), and can serve to protect the uppermost circuit layer (132c) from external moisture or contaminants. When a semiconductor device is placed on a circuit board (100) using a material such as solder, the upper protective layer (135) can function to prevent short circuits between solders due to low wettability with the solder. The upper protective layer (135) may be made of a photocurable insulating material, and, for example, may be made of solder resist. The upper protective layer (135) may be provided with an opening (135a) that exposes the circuit layer (132c) placed on the insulating layer (134c) of the uppermost layer.

[0066] The upper protective layer (135) may be a solder resist layer containing an organic polymer material. The upper protective layer (135) may, for example, include an epoxy acrylate-based resin. For example, the upper protective layer (135) may include, but is not limited to, a resin, a curing agent, a photoinitiator, a pigment, a solvent, a filler, an additive, an acrylic-based monomer, etc., and may be formed of a photosolder resist layer, a cover-lay, a polymer material, or other insulating material.

[0067] A lower build-up layer (140) may be disposed on the lower part of the glass layer (110). Similar to the upper build-up layer (140), the lower build-up layer (140) may include a lower circuit layer (141), a plurality of circuit layers (142a, 142b, 142c), a plurality of via electrodes (143a, 143b, 143c), a plurality of insulating layers (144a, 144b, 144c), and a lower protective layer (145). The lower circuit layer (141), circuit layer (142a, 142b, 142c), via electrode (143a, 143b, 143c), insulating layer (144a, 144b, 144c), and lower protective layer (145) of the lower build-up layer (140) can be arranged in a symmetrical form with respect to the glass layer (110) and the upper circuit layer (131), circuit layer (132a, 132b, 132c), via electrode (133a, 133b, 133c), insulating layer (134a, 134b, 134c), and upper protective layer (135) of the upper build-up layer (130). Since the lower build-up layer (140) can be understood through the previous explanation of the upper build-up layer (130), a redundant explanation will be omitted. The structure of the circuit board (100) described above is merely an example for explaining the present invention, and the technical concept of the present invention is not limited to the stacked structure of this example.

[0068] As the width of the through electrode (151) placed in the glass layer (110) gradually becomes finer, it is necessary to form a through hole (113) with a high aspect ratio in the glass layer (110). Although the aspect ratio of the through hole (113) can be lowered by making the thickness of the glass layer (110) thin, there is a limit to reducing the thickness of the glass layer (110) in order to secure mechanical strength to support the circuit board (100). As the through hole (113) of the glass layer (110) must be formed with an aspect ratio exceeding 1:4, such as 1:10 or 1:20, or a higher aspect ratio, it may become difficult to uniformly form a metal layer (120) inside the through hole (113).

[0069] In particular, when forming a metal layer (120) by sputtering to obtain various advantages such as a short processing time, high adhesion and surface quality, increased grain size of the metal layer to reduce cracking, and not causing environmental problems due to the use of chemical solutions, it may be difficult to uniformly form the metal layer (120) inside the through hole (113) of a high aspect ratio due to the strong deposition directionality of the sputtering method.

[0070] This is because sputtering particles move mainly in the vertical direction and are deposited in the through hole (113), so the thickness of the metal layer (120) in the surface area of ​​the through hole (113) is deposited thickly first, and the thick deposited portion of the metal layer (120) in the surface entrance portion of the through hole (113) hinders the inflow of sputtering particles into the interior of the through hole (113), so sputtering particles may not be deposited uniformly along the vertical direction on the inner wall of the through hole (113).

[0071] A circuit board (100) according to an embodiment of the present invention forms an upper surface of a metal layer (120) as an inclined surface in an upper region adjacent to the upper opening (113a) of a through hole (113) of a glass layer (110), thereby allowing sputtering particles to flow smoothly into the interior of the through hole (113) through the entrance of the through hole (113). Accordingly, a uniform metal layer (120) can be formed on the inner wall of the through hole (113), and a plating layer (150) can be densely formed inside the through hole (113) by the metal layer (120) uniformly deposited on the inner wall of the through hole (113).

[0072] FIG. 2a is a cross-sectional view showing an enlarged view of section 'A' of FIG. 1a. Referring to FIG. 1a and FIG. 2a, the metal layer (120) may include an upper metal layer (121) disposed on the upper surface (111) of the glass layer (110) adjacent to the through hole (113), and an inner metal layer (123) disposed on the inner wall of the through hole (113). The upper metal layer (121) may be a metal layer that serves as a seed layer for a plating layer to form an upper circuit layer (131), and the inner metal layer (123) may be a metal layer that serves as a seed layer for a plating layer to form a through electrode (151). The plating layer (150) may be formed, for example, by electroplating copper (Cu), and other materials such as palladium (Pd), cobalt (Co), cobalt alloy (CoW, CoP, etc.), and silver (Ag) may also be used as plating materials. The upper part of the inner metal layer (123) and the side of the upper metal layer (121) can be connected to each other. The inner metal layer (123) and the upper metal layer (121) can be deposited simultaneously, for example by sputtering, and placed on the glass layer (110).

[0073] The upper metal layer (121) may be an area of ​​metal layer that does not overlap with the glass layer (110) in a first direction (X) and / or a second direction (Y) parallel to the upper surface (111) of the glass layer (110). The inner metal layer (123) may be an area of ​​metal layer that overlaps with the glass layer (110) in a first direction (X) and / or a second direction (Y). Since the upper metal layer (121) is deposited parallel to the upper surface (111) of the glass layer (110), while the inner metal layer (123) is deposited on a through hole (113) that is inclined or perpendicular to the upper surface (111) of the glass layer (110), the thickness (T2) of the inner metal layer (123) in the first direction (X) deposited on the through hole (113) may be thinner than the thickness (T1) of the upper metal layer (121).

[0074] In order to uniformly form the thickness of the metal layer (120) on the inner surface of the through hole (113) and to secure a thickness of the metal layer (120) for forming the plating layer (150) above a certain level, it is necessary to increase the thickness (T2) of the inner metal layer (123) in the first direction (X), and accordingly, the thickness (T1) of the upper metal layer (121) becomes several times (e.g., 2 to 10 times) larger than the thickness (T2) of the inner metal layer (123). For example, in order to deposit the inner metal layer (123) with a thickness (T2) of 100 nm or more, the thickness (T1) of the upper metal layer (121) can be increased to 300 nm or more.

[0075] When forming a metal layer (120) by sputtering, if the increased thickness (T1) of the upper metal layer (121) extends to the upper region of the through hole (113), the inflow of sputtering particles into the inner wall of the through hole (113) may be obstructed due to the thick side of the upper metal layer (121) placed on the upper inner wall of the through hole (113). However, in an embodiment of the present invention, since the side of the upper metal layer (121) is formed as a downwardly inclined surface (121b) facing the through hole (113), sputtering particles can be smoothly flowed into the inner wall of the through hole (113).

[0076] To explain in more detail, the metal layer (120) may include an upper metal layer (121) that serves as an upper seed layer (121a) disposed on the upper surface (111) of the glass layer (110), and an inner metal layer (123) that serves as an inner seed layer (123a) disposed on the inner wall of the through hole (113) of the glass layer (110). The metal layer (120: 121, 123) may include a metallic material such as titanium (Ti), chromium (Cr), or copper (Cu) for electroplating of the plating layer (150). The metal layer (120: 121, 123) may be disposed with a thickness (T1, T2) of, for example, 100 nm to 2000 nm.

[0077] The upper metal layer (121) may have a flat upper surface (121c) and may comprise a first metal layer portion (A1) having a constant thickness (T1) in the vertical direction along the first direction (X), a second metal layer portion (A2) in which the upper surface is formed as an inclined surface (121b) with a first inclination angle (θ1) in the direction from the end of the first metal layer portion (A1) toward the through hole (113), and a third metal layer portion (A3) in which the upper surface is formed as an inclined surface with a second inclination angle (θ2) in the direction from the end of the second region (A2) toward the through hole (113).

[0078] The first metal layer portion (A1) of the upper metal layer (121) may be an area that does not overlap in the vertical direction with the through-hole area (H1) where the through-hole (113) is placed. The third metal layer portion (A3) of the upper metal layer (121) may be an area that overlaps in the vertical direction with the through-hole area (H1). The second metal layer portion (A2) between the first metal layer portion (A1) and the third metal layer portion (A3) of the upper metal layer (121) may be an area that partially overlaps in the vertical direction with the through-hole area (H1).

[0079] It may be preferable that the perimeter of the upper opening (entrance opening) (113a) of the through hole (113) be positioned so as to overlap in the vertical direction with respect to the first direction (X) at the approximate center of the outer and inner perimeters of the second metal layer (A2) (e.g., the middle section of the three sections when the second metal layer is divided into three equal parts based on the radial direction of the through hole). This is because if the inclined surface (121b) is positioned too far toward the through hole (113), it may interfere with the inflow of sputtered metal material into the interior of the through hole (113), and conversely, if the inclined surface (121b) is positioned too far from the through hole (113), the effect of expanding the inflow of sputtered metal material into the through hole (113) may be reduced.

[0080] FIG. 2b is a plan view schematically showing the positional relationship between a second metal layer portion and a through hole, wherein the metal layer constituting a circuit board according to an embodiment of the present invention is provided with an inclined surface. Referring to FIG. 1a, FIG. 2a, and FIG. 2b, the ring-shaped inner metal layer portion (A21) of the second metal layer portion (A2), which is provided with an inclined surface (121b) of the upper metal layer (121), is positioned so as to overlap the through hole area (H1) in the vertical direction, and the outer metal layer portion (A22) that surrounds the inner metal layer portion (A21) of the second metal layer portion (A2) in a ring shape may not overlap the through hole area (H1) in the vertical direction. Accordingly, the inclined surface (121b) of the upper metal layer (121) is positioned to overlap vertically with the upper region of the inner wall of the entrance area of ​​the through hole (113) corresponding to the height of the upper surface (111) of the glass layer (110), thereby effectively increasing the sputtering particles and sputtering energy flowing into the inner wall of the through hole (113).

[0081] The inclined surface (121b) provided in the second metal layer portion (A2) of the upper metal layer (121) may overlap with the upper metal layer portion (C1) of the first metal layer portion (A1) in the first direction (X) and may not overlap with the lower metal layer portion (C2) in the first direction (X). The third metal layer portion (A3) of the upper metal layer (121) may not overlap with the upper metal layer portion (C1) of the first metal layer portion (A1) in the first direction (X), but may overlap with the lower metal layer portion (C2) of the first metal layer portion (A1) in the first direction (X). The thickness in the vertical direction of the upper metal layer portion (C1) that overlaps with the inclined surface (121b) provided in the second metal layer portion (A2) of the upper metal layer (121) in the first direction (X) may be formed to be 1 / 2 to 4 / 5 of the thickness of the upper metal layer (121).

[0082] The second region (A2) of the upper metal layer (121) has an upper surface formed by an inclined surface (121b), so that the thickness (T3) in the vertical direction relative to the upper surface (111) of the glass layer (110) gradually decreases toward the through hole (113). Accordingly, the second region (A2) of the upper metal layer (121) may be provided with a virtual upper surface (B1) parallel to the upper surface of the first region (A1), a virtual inner surface (B2) parallel to the inner surface of the inner metal layer (123) placed in the through hole (113), and an opening expansion space (120a) defined by the upper surface of the second region (A2) of the upper metal layer (121).

[0083] By means of the inclined surface (121b) provided on the upper surface of the second region (A2) of the upper metal layer (121) and the opening expansion space (120a) defined by the inclined surface (121b), the area of ​​the inlet region into which sputtering particles can be introduced into the upper region of the through hole (113) is increased, and the direction of inflow of sputtering particles can also be expanded in the radial direction of the through hole (113). Accordingly, the number of sputtering particles reaching the inner wall of the through hole (113) of the glass layer (110) and the deposition intensity are increased, so that the inner metal layer (123) can be deposited to a deeper depth in the vertical direction on the inner wall of the through hole (113), thereby ensuring the deposition uniformity of the inner metal layer (123) deposited on the inner wall of the through hole (113).

[0084] In addition to the aforementioned effects, the inclined surface (121b) of the upper metal layer (121) and the opening expansion space (120a) can also function to relieve stress applied to the glass layer (110). If the vertical thickness (T1) of the upper metal layer (121) and the horizontal thickness (T2) of the inner metal layer (123) change rapidly in the upper opening area of ​​the through hole (113), the stress applied to the glass layer (110) becomes unstable due to the difference in the coefficient of thermal expansion between the metal layer (120: 121, 123) and the glass layer (110), and problems such as cracks occurring in the glass layer (110) may occur. However, according to an embodiment of the present invention, since the change in thickness of the metal layer (120) at the connection portion between the upper metal layer (121) and the inner metal layer (123) is gradual, stress instability of the glass layer (110) caused by a sudden change in thickness can be resolved and cracks, etc. can be effectively prevented.

[0085] To achieve the above-described effects, the inclined surface (121b) provided on the upper surface of the upper metal layer (121) may be arranged to have a first inclination angle (θ1) that is inclined with respect to both the upper surface (111) of the glass layer (110) and the second inclination angle (θ2) of the inner wall of the through hole (113) of the glass layer (110). In order to ensure that a sufficient volume of opening expansion space (120a) is secured in the upper region of the upper opening (113a) of the through hole (113), the inclined surface (121b) of the upper metal layer (121) may have an inclination angle of 20°-70° with respect to the upper surface (111) of the glass layer (110) and the second inclination angle (θ2) of the inner wall of the through hole (113), respectively, and preferably may be formed with an inclination angle of 30°-60° with respect to the upper surface (111) of the glass layer (110), more preferably with an inclination angle of 35°-55°. The inclined surface (121b) of the upper metal layer (121) may be positioned in the upper region adjacent to the upper opening (113a) of the through hole (113) within a distance less than or equal to the thickness (T1) in the vertical direction of the flat portion of the upper metal layer (121) where the upper surface is a flat surface.

[0086] In the embodiment illustrated in FIG. 2a, the inclined surface (121b) of the upper metal layer (121) may be a flat surface. In this specification, the meaning of 'flat surface' of the inclined surface (121b) does not mean a perfect mathematical or scientific plane, but rather, based on a virtual plane or line where the error (deviation) with respect to the inclined surface (121b) is minimized, the inclined surface (121b) may be interpreted as being substantially flat if the angle difference between the virtual plane or line and the inclined surface (121b) over the entire area of ​​the inclined surface (121b) is within ±2°.

[0087] The inclined surface (121b) of the upper metal layer (121) may be extended to have a first length (L1) along a first direction (X) corresponding to the radial direction of the through hole (113). The first length (L1) of the inclined surface (121b) may vary depending on the type of seed material of the metal layer (120), the deposition thickness, the width of the through hole (113), the deposition process, etc., but it may be preferable to be about 0.3 to 0.9 times the thickness (T1) of the upper metal layer (121).

[0088] This is because if the first length (L1) of the inclined surface (121b) becomes smaller than 0.3 times the thickness (T1) of the upper metal layer (121), it becomes difficult to expect a sufficient opening expansion space (120a), and conversely, if the first length (L1) of the inclined surface (121b) becomes larger than 0.9 times the thickness (T1) of the upper metal layer (121), the angle of inclination (θ1) of the inclined surface (121b) is reduced to a gentle angle, thereby reducing the effect of sputtering particles flowing into the inner wall of the through hole (113).

[0089] Various methods may be considered for forming an inclined surface (121b) on an upper metal layer (121), but preferably, an inclined surface (121b) on an upper metal layer (121) can be formed cost-effectively by using ion beam assisted sputtering. FIG. 2c is a conceptual diagram illustrating a method for forming an inclined surface on a metal layer by ion beam sputtering according to an embodiment of the present invention. An ion beam sputtering apparatus (101) may include a sputtering apparatus (102) equipped with a sputter cathode for depositing a seed material (103) for forming a metal layer (120), and an ion beam apparatus (104) equipped with an ion source for controlling the orientation of the seed material by an ion beam (105). The ion beam (105) may be used, for example, argon ions, oxygen ions, nitrogen ions, hydrogen ions, krypton ions, xenon ions, etc.

[0090] An ion beam device (104) may be configured to adjust the angle of the ion beam (105). Depending on the angle of the ion beam (105), surface rearrangement of the etching and sputtering deposition material (103) may be induced in the region (120e) between the upper metal layer (121) and the inner metal layer (123), thereby allowing the upper metal layer (121) having an inclined surface (121b) to be deposited. An inclined surface (121b) may be formed along the circumferential direction of the through hole (113) by performing ion beam sputtering while rotating the glass layer (110) by a stage, by rotating the ion beam device (104), by changing the ion beam angle along the circumferential direction of the through hole (113), or by adjusting the amount and / or ion beam energy of the ion beam device (104).

[0091] When an ion beam is generated in a direction inclined with respect to the deposition direction of the metal material (e.g., up and down direction) while simultaneously depositing a metal material (e.g., titanium, copper, etc.) constituting the metal layer (120), the metal atoms deposited on the entrance (upper opening and / or lower opening) of the through hole (113) and the inner wall of the through hole (113) are surface rearranged, allowing the metal layer (120) to be deposited in a form having an inclined surface (121b). Accordingly, it is possible to prevent the metal layer from being deposited on the inner wall of the through hole (113) or being deposited unevenly by blocking the entrance of the through hole (113) with a high aspect ratio due to the thickness of the metal layer deposition on the entrance side, and to deposit the metal material of the metal layer (120) uniformly up to a deeper inner wall position of the through hole (113).

[0092] As described above, according to an embodiment of the present invention, by forming a metal layer (120) such that it has an inclined surface (121b) in the upper region of the through hole (113) of the glass layer (110), the deposition material can be smoothly introduced into the interior of the through hole (113) during the process of depositing the metal layer (120), thereby allowing the metal layer (120) to be uniformly formed on the inner wall of the through hole (113). Accordingly, the conformality of the metal layer (120) can be secured within the through hole (113) with a high aspect ratio (AR) of 1:5 to 1:20 or higher, and the step coverage of the metal layer (120) can be controlled to a deviation of about 5% or less.

[0093] In addition, according to an embodiment of the present invention, it is possible to form a dense metal layer (120) so that the peel strength of the metal layer (120) can be secured to be 0.1 kgf / cm or higher, and it is also possible to secure a peel strength of 0.4 kgf / cm or higher. Furthermore, according to an embodiment of the present invention, the stress (mechanical stress, thermal stress, internal stress, etc.) applied to the glass layer (110) by the inclined surface (121b) of the metal layer (120) can be relieved so that cracks may occur in the glass layer (110) or peeling may occur in the metal layer (120), thereby preventing or reducing the occurrence of cracks in the glass layer (110) or peeling in the metal layer (120).

[0094] FIG. 3 is a cross-sectional view showing an enlarged view of section 'B' of FIG. 1a. Referring to FIG. 1a and FIG. 3, the metal layer (120) may further include a lower metal layer (122) disposed on the lower surface (112) of the glass layer (110) adjacent to the through hole (113). The lower metal layer (122) may serve as a lower seed layer (122a) for a plating layer to form a lower circuit layer (141), and the inner metal layer (123) may serve as an inner seed layer (123b) for a plating layer to form a through electrode (151). The lower portion of the inner metal layer (123) and the side portion of the lower metal layer (122) may be connected to each other. The inner metal layer (123) and the lower metal layer (122) may be disposed on the glass layer (110) by, for example, sputtering.

[0095] The lower metal layer (122) may be a region of the metal layer that does not overlap with the glass layer (110) in a first direction (X) and / or a second direction (Y) parallel to the lower surface (112) of the glass layer (110). The lower metal layer (122) may be deposited parallel to the lower surface (112) of the glass layer (110). The thickness (T5) of the inner metal layer (123) in the first direction (X) may be thinner than the thickness (T4) of the lower metal layer (122).

[0096] Since the side of the lower metal layer (122) is formed as an upwardly inclined surface (122b) facing the through hole (113), sputtering particles can be smoothly introduced into the inner wall of the through hole (113). The metal layer (120) may further include a lower metal layer (122) disposed on the lower surface (111) of the glass layer (110). The metal layer (120: 122, 123) may include a seed material such as titanium (Ti), chromium (Cr), or copper (Cu) for electrolytic plating of the plating layer (150). The metal layer (120: 122, 123) may be disposed with a thickness (T4, T5) of, for example, 100 nm to 2000 nm, but the deposition thickness of the metal layer (120: 122, 123) may be changed depending on the type of material being deposited, the width of the through hole (113), the aspect ratio, etc.

[0097] Similar to the upper metal layer (121), the lower metal layer (122) may be provided with an inclined surface (122b) that slopes upward from the lower surface (122c) of the lower metal layer (122) toward the through hole (113) on the lower surface adjacent to the through hole (113). The inclined surface (122b) may be provided to extend a second distance (L2) in the first direction (X). The second angle of inclination (θ4) of the inclined surface (122b) may be provided at an angle of inclination of approximately 20°-70°, preferably 30°-60°, more preferably 35°-55°, based on the angle of inclination (θ5) of the lower surface (112) of the glass layer (110) and the through hole (113). The lower metal layer (122) has its thickness (T6) in the vertical direction reduced by the inclined surface (122b) in the direction toward the through hole (113), and may have an opening expansion space (120b) at the bottom of the inclined surface (122b).

[0098] The inclined surface (122b) of the lower metal layer (122) is positioned to overlap in the vertical direction with the lower region of the inner wall of the through hole (113) corresponding to the height of the lower surface (112) of the glass layer (110), thereby effectively increasing the sputtering particles and sputtering energy flowing into the inner wall of the through hole (113). In addition, similar to the upper metal layer (121), the stress applied to the lower surface (112) of the glass layer (110) can be relieved by the inclined surface (122b) and the opening expansion space (120b) of the lower metal layer (122). Any details regarding the lower metal layer (122) that are not described in detail can be understood by referring to the details described above in relation to the upper metal layer (121).

[0099] FIG. 4 is a diagram showing a metal layer constituting a circuit board according to a third embodiment of the present invention. In describing the embodiments described below, redundant descriptions of components identical or similar to those described above may be omitted. The circuit board according to the third embodiment of the present invention differs from the previously described embodiment in that the metal layer (120) is composed of a multi-metal layer comprising a first metal layer (120c) disposed on a glass layer (110) and a second metal layer (120d) disposed on the first metal layer (120c) made of a material different from that of the first metal layer (120c).

[0100] The first metal layer (120c) may include a first upper metal layer (124) disposed on the upper surface (111) of the glass layer (110) and a first inner metal layer (126) disposed on the inner wall of the through hole (113) of the glass layer (110). The thickness of the first upper metal layer (124) and the thickness of the second upper metal layer (125) in a direction perpendicular to the surface of the glass layer (110) along the surface direction following the upper surface (111) and the through hole (113) of the glass layer (110) may gradually decrease on the inclined surface (125b).

[0101] That is, the first upper metal layer (124) has a first thickness (T) in the vertical direction in the flat area of ​​the upper surface (111) of the glass layer (110). 11 ) and the thickness (T) in the vertical direction on the inclined surface (125b) 31 ) gradually decreases in the direction toward the through hole (113), and the reduced thickness (T) at the inner wall of the through hole (113) 21 ) may have. In the case of the second upper metal layer (125), in the flat area of ​​the upper surface (111) of the glass layer (110), a second thickness (T) in the vertical direction may be formed. 12 ) and the thickness (T) in the vertical direction on the inclined surface (125b) 32 ) gradually decreases in the direction toward the through hole (113), and the reduced thickness (T) at the inner wall of the through hole (113) 22 Can have ).

[0102] The first metal layer (120c) may comprise a first metal material, and the second metal layer (120d) may comprise a second metal material different from the first metal material. The first metal material of the first metal layer (120c) may be a metal material having a bonding strength with the glass material of the glass layer (110) higher than that of the second metal material. The second metal material of the second metal layer (120d) may be a metal material having plating performance and conductivity for forming the plating layer (150) higher than that of the first metal material. For example, if the second metal material is copper (Cu) which has high conductivity, titanium (Ti), which has a bonding strength (adhesion strength) with the glass layer (110) higher than that of copper (Cu), may be used as the first metal layer (120c). As another example, it is also possible to place the first metal layer (120c) with a material such as chromium (Cr) or palladium (Pd) and place the second metal layer (120d) with copper (Cu).

[0103] In an embodiment of the present invention, the first metal material of the first metal layer (120c) may include titanium (Ti) and / or chromium (Cr), and the second metal material of the second metal layer (120d) may include copper (Cu), but is not necessarily limited thereto, and various metal materials capable of performing the function of a metal layer may be applied. The first metal layer (120c) may be deposited with a thickness of 10 nm to 800 nm to ensure adhesion with the glass layer (110). The second metal layer (120d) may be deposited with a thickness of 200 to 2000 nm to ensure sufficient seeding.

[0104] In the third embodiment of the present invention, the first metal layer (120c) and the second metal layer (120d) each have inclined surfaces (124b, 125b) in a side area that overlaps with the upper opening perimeter of the through hole (113), and the inclined surfaces (124b, 125b) of the first metal layer (120c) and the second metal layer (120d) have the same angle of inclination (θ 11 It is formed as follows. According to the third embodiment of the present invention, as described above, a uniform inner metal layer (123) can be formed on the inner wall of the through hole (113), and the stress applied to the glass layer (110) can be reduced, and at the same time, the metal layer can be formed with a multilayer metal layer (120c, 120d) to increase the bonding strength with the glass layer (110) and the plating efficiency of the plating layer (150).

[0105] In addition, according to the third embodiment of the present invention, if the inclined surfaces (124a, 125a) of the multilayer metal layers (120c, 120d) are formed at the same angle of inclination, the multilayer metal layers (120c, 120d) can be formed continuously without the need to adjust the process parameters of the ion beam sputtering process, thereby shortening the process time for depositing the metal layers (120) and reducing the process cost.

[0106] The stacked structure of the glass layer (110), the first and second metal layers (120c, 120d) of the metal layer (120), and the plating layer (150), as well as the upper surface position and shape thereof, can be distinguished by various analysis methods. For example, each layer can be distinguished by comparing image conditions (e.g., the illuminance of the optical microscope image) in a vertical cross-sectional image obtained by an optical microscope, or through the through electrode, the power distribution electrode structure of the upper circuit layer, etc.

[0107] FIG. 5 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to a fourth embodiment of the present invention. In the circuit board according to the fourth embodiment of the present invention, the inclined surfaces (124b, 125b) of the multilayer metal layers (120c, 120d) constituting the metal layer (120) have different inclination angles (θ). 11 , θ 12 It differs from the third embodiment in that it has ). In the fourth embodiment of the present invention, the first inclined surface (124b) of the first upper metal layer (124) constituting the first metal layer (120c) has a first inclination angle (θ 11 Having ), the second inclined surface (125b) of the second upper metal layer (125) constituting the second metal layer (120d) has a first inclination angle (θ 11 The second angle of inclination (θ) smaller than ) 12 It has a gentle slope to have ).

[0108] According to the fourth embodiment of the present invention, a stepwise change in slope relative to the inner wall of the through hole (113) can be achieved by the inclined surfaces (124b, 125b) of the multilayer metal layers (120c, 120d). That is, the first inclined surface (124b) of the first metal layer (120c) first, from the inner wall of the through hole (113), at the angle of inclination (θ2) of the through hole (113), the first angle of inclination (θ2) of the inclined surface (124b) of the first metal layer (120c) 11 The slope angle (θ2 - θ) minus ) 11 You just need to form it so that it forms a slope of that amount.

[0109] For example, the inclination angle (θ2) of the through hole (113) is 80°, and the first inclination angle (θ) of the inclined surface (124b) of the first metal layer (120c) 11 If the intention is to form a slope of 60°, it is sufficient to form a slope of only 20° on the first metal layer (120c) relative to the inner wall of the through hole (113). At this time, the second angle of inclination (θ) of the second inclined surface (125b) of the second metal layer (120d) 12 If you want to form ) at 40°, you only need to additionally form a slope of 20° on the first inclined surface (124b) of the first metal layer (120c).

[0110] Accordingly, according to the fourth embodiment of the present invention, by depositing a multilayer metal layer (120c, 120d), the effect of simultaneously securing adhesion with the glass layer (110) and the performance of the metal layer is obtained, and at the same time, by forming a gentle slope angle in the side region of the upper metal layer (124, 125) during the deposition process of each metal layer by an ion beam sputtering process, a sloped surface with a target slope angle can be formed on the upper surface of the upper metal layer (121), and the effect of performing the process for forming a sloped surface on the upper metal layer (121) more stably can also be obtained.

[0111] FIG. 6 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to a fifth embodiment of the present invention. In the circuit board according to the fifth embodiment of the present invention, among a plurality of metal layers (120c, 120d) constituting a metal layer (120), the second inclined surface (125b) of the second upper metal layer (125) constituting the second metal layer (120d) is the first inclination angle (θ) of the first upper metal layer (124) constituting the first metal layer (120c). 11 The second angle of inclination (θ) greater than ) 12 It forms a steep slope to have ).

[0112] According to the fifth embodiment of the present invention, a stepwise change in inclination with respect to the upper surface (111) of the glass layer (110) can be achieved by the inclined surfaces (124b, 125b) of the multilayer metal layers (120c, 120d). That is, the first inclined surface (124b) of the first metal layer (120c) has a second inclination angle (θ) with respect to the upper surface (111) of the glass layer (110). 12 The first angle of inclination (θ) smaller than ) 11 It is formed as ), and the second inclined surface (125b) of the second metal layer (120d) has a second inclination angle (θ) with respect to the first inclined surface (124b). 12 The first angle of inclination (θ) greater than ) 11 An angle of inclination (θ) that is smaller than ) 12 -θ 11 It can be formed to have ).

[0113] According to the fifth embodiment of the present invention, by depositing a multilayer metal layer (120c, 120d), the effect of simultaneously securing adhesion with the glass layer (110) and the performance of the metal layer is obtained, and at the same time, because the multilayer metal layer (120c, 120d) is deposited with a gentle slope in stages based on the upper surface (111) of the glass layer (110), the stress applied to the glass layer (110) by the metal layer (120c, 120d) deposited on the glass layer (110) can be reduced.

[0114] FIG. 7 is an enlarged cross-sectional view of a metal layer constituting a circuit board according to the sixth embodiment of the present invention. In the previously described embodiment, the inclined surface of the metal layer (120) is formed as a flat surface in cross-section and is formed in a funnel shape that is wider at the top and narrower at the bottom along the circumferential direction of the through hole (113). However, the circuit board according to the sixth embodiment of the present invention differs from the previously described embodiment in that the upper metal layer (121) constituting the metal layer (120) has a curved inclined surface (121b). The shape of the inclined surface (121b) of the upper metal layer (121) can be controlled by adjusting the ion beam angle of the ion beam sputtering device, the amount of the ion beam, and / or the ion beam energy distribution. In the sixth embodiment, the inclined surface (121b) can be defined as a portion that is inclined with respect to both the upper surface (111) of the glass layer (110) and the inner wall of the through hole (113).

[0115] As in the sixth embodiment, if a curved inclined surface (121b) is formed, a gentle slope is formed along the horizontal direction from the upper part of the opening perimeter area of ​​the through hole (113) without a section of abrupt slope change, thereby allowing the plating layer (150) to be formed uniformly along the metal layer (120) and preventing the occurrence of voids in the slope change section. In addition, a uniform metal layer (120) can be deposited on the inner wall of the through hole (113) while preventing abrupt stress changes in the glass layer (110). The slope angle of the curved inclined surface (121b) can be calculated from the slope angle between the inner end and the outer end of the inclined surface (121b).

[0116] FIG. 8 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the seventh embodiment of the present invention. In the circuit board according to the seventh embodiment of the present invention, the inclined surfaces (121d, 121e) of the metal layer (121) have different inclination angles (θ). 13 , θ 14It differs from the previously described embodiments in that it includes a first inclined surface (121d) and a second inclined surface (121e) having a first inclined surface (121d) and a second inclined surface (121e). The first inclined surface (121d) may be positioned in an area adjacent to the through hole (113) than the second inclined surface (121e), and the second inclined surface (121e) may be positioned in an area further from the through hole (113) than the first inclined surface (121d).

[0117] In the seventh embodiment of the present invention, the inclined surfaces (121d, 121e) of the upper metal layer (121) have an inclination angle (θ) along the radial direction of the through hole (113). 13 , θ 14 ) changes. In the seventh embodiment of the present invention, the angle of inclination (θ) of the first inclined surface (121d) adjacent to the through hole (113) changes. 13 ) is the angle of inclination (θ) of the second inclined surface (121e) 14 The slope is smaller than the first slope (121d) and forms a gentle slope, and the second slope (121e) forms a steeper slope than the first slope (121d). According to the seventh embodiment of the present invention, the area of ​​the opening expansion space (120a) can be increased by the concave multi-stage slope structure, thereby providing the effect of enhancing the inflow of sputtering particles into the inner wall of the through hole (113).

[0118] FIG. 9 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the eighth embodiment of the present invention. The circuit board according to the eighth embodiment of the present invention has an inclination angle (θ) of a first inclined surface (121f) adjacent to a through hole (113). 15 The angle of inclination (θ) of the second inclined surface (121g) positioned further from the through hole (113) than the first inclined surface (121f). 16 It is larger than ) and forms a steep slope, and the second slope (121g) forms a gentler slope than the first slope (121f).

[0119] According to the eighth embodiment of the present invention, a gradually gentle slope (convex sloped surface structure) is formed along the radial direction away from the through hole (113), thereby allowing the plating layer (150) to be formed uniformly along the metal layer (120) and preventing abrupt changes in slope, which prevents the occurrence of voids in the plating layer (150). Additionally, a uniform metal layer (120) can be deposited on the inner wall of the through hole (113) while preventing abrupt changes in stress in the glass layer (110).

[0120] FIG. 10 is an enlarged cross-sectional view of a metal layer constituting a circuit board according to the ninth embodiment of the present invention. The circuit board according to the ninth embodiment of the present invention differs from the previously described embodiments in that the thickness (T2) in the first direction (X) of the inner metal layer (123) deposited on the inner wall of the through hole (113) gradually decreases from the top to the middle part of the through hole (113).

[0121] That is, in the ninth embodiment of the present invention, the thickness (T2) of the inner metal layer (123) may be formed to be proportional to the change in the width of the through hole (113) in the vertical direction. In the ninth embodiment of the present invention, as the thickness (T2) of the inner metal layer (123) gradually decreases from the upper opening of the through hole (113) toward the center, the angle of inclination (θ) of the inner surface of the inner metal layer (123) with respect to the first direction (X) 21 ) can be larger than the angle of inclination (θ2) of the inner wall of the through hole (113).

[0122] According to the ninth embodiment of the present invention, even if the width of the through hole (113) of the glass layer (110) decreases at the center, the thickness of the inner metal layer (123) decreases at the center of the through hole (113), so the decrease in the width or area of ​​the through electrode at the center of the through hole (113) can be mitigated / reduced. Accordingly, the problem of reduced signal transmission performance at the center of the through hole (113) of the glass layer (110) can be prevented or reduced.

[0123] FIG. 11 is an enlarged cross-sectional view showing a metal layer constituting a circuit board according to the 10th embodiment of the present invention. The circuit board according to the 10th embodiment of the present invention differs from the previously described embodiments in that it has a chamfer structure (114) on the upper inner wall of the glass layer (110) corresponding to the upper opening of the through hole (113). The chamfer structure (114) of the glass layer (110) has a predetermined chamfer angle (θ 22 It can be formed by processing. The chamfered structure (114) can be formed by an etching process during or after the process of forming the through hole (113). The chamfered angle (θ 22 ) may be an angle equal to the angle of inclination (θ1) of the inclined surface (121b) of the upper metal layer (121), or an angle within ±20° of this.

[0124] According to the 10th embodiment of the present invention, the bonding strength can be strengthened by increasing the bonding area between the glass layer (110) and the upper metal layer (121). Additionally, the angle of inclination (θ) by the chamfered structure (114) on the upper inner wall of the glass layer (110) corresponding to the upper opening of the through hole (113) 22 Since the glass layer (110) is formed, the beveled structure (114) can be used to more easily form an inclined surface (121b) on the upper metal layer (121) by ion beam sputtering, etc. Additionally, space is secured by the beveled structure (114) of the glass layer (110), so the angle of inclination (θ1) of the upper metal layer (121) can be increased, and accordingly, interference factors that hinder the inflow of deposited material into the through hole (113) can be more effectively eliminated.

[0125] FIG. 12 is a cross-sectional view showing a semiconductor package according to an embodiment of the present invention. A circuit board (100) according to an embodiment of the present invention may form a semiconductor package (10) together with one or more semiconductor elements (200). The semiconductor package (10) may be an electronic component that constitutes an electronic element. The electronic element may be, for example, an electronic terminal of a vehicle, a smartphone, a tablet, a laptop, a high-performance server, a smart watch, a personal digital assistant (PDA), an Internet of Things (IOT) terminal, a digital camera, etc., but is not limited thereto and may be provided as any other electronic device having one or more semiconductor elements and one or more circuit boards.

[0126] The semiconductor package may be implemented as, for example, a BGA (Ball Grid Array) package, a CSP (Chip-Scale Package), a SiP (System in Package), an MCM (Multi-Chip Module) package, a semiconductor chiplet package, a flip chip package, a PoP (Package on Package), etc., but is not limited to the examples listed above. The semiconductor device (200) may be provided as various semiconductor chips such as an input / output processor (IOP) chip, an application processor (AP) chip including a central processing unit (CPU) and / or a graphics processing unit (GPU), a digital signal processing unit, a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM), a flash memory, etc., but is not necessarily limited thereto.

[0127] The semiconductor device (200) may be an integrated circuit (IC) semiconductor chip (semiconductor die) in which various active and / or passive devices are integrated within a single chip. The semiconductor device (200) may be provided as a sub-semiconductor package that constitutes a higher-level semiconductor package in which a plurality of sub-semiconductor packages are combined. The semiconductor package (10) may be mounted on a circuit board (100) such that the semiconductor device (200) is mounted on a main board (300) of an electronic device or on another interposer board, etc. The main board may be electrically connected to various electronic components. The semiconductor package may further include one or more interposers, in which case the circuit board (100) may not be directly connected to the semiconductor device (200) but may be connected to the semiconductor device (200) via one or more interposers, or may be directly connected to some of the semiconductor devices and connected to others via interposers.

[0128] A circuit board (100) according to an embodiment of the present invention may be a package board constituting a semiconductor package (10). The circuit board (100) may also be an interposer board that performs the function of an interposer coupled with another circuit board. The circuit board (100) may be provided as a bridge board including a redistribution layer. The circuit board (100) may have a space in which one or more semiconductor devices (200) and / or one or more interposers (not shown) can be mounted. The circuit board (100) may be coupled with the semiconductor devices (200) and / or interposers by bumps provided on a first surface (e.g., top surface) and / or a second surface (e.g., bottom surface).

[0129] In one embodiment, the circuit board (100) may be coupled to the terminals (210) of the semiconductor device (200) by bumps (160) provided on the upper surface, and may be coupled to the terminals (310) of the main board (300) of the electronic device by bumps (170) through electrode pads provided on the lower surface. When the circuit board (100) performs the function of an interposer, the circuit board (100) may be referred to as a first circuit board, and the package board or another interposer board on which the circuit board (100) is mounted may be referred to as a second circuit board.

[0130] The bumps (160) can serve to transmit signals and / or power between the circuit board (100) and the semiconductor device (200). Additionally, the bumps (160) may be connection parts that electrically connect the circuit board (100) and the semiconductor device (200). In addition to the electrical connection function, the bumps (160) can also perform a support and coupling function by physically supporting the semiconductor device (200) against the circuit board (100) to maintain the semiconductor device (200) in a stably fixed state on the circuit board (100) and to prevent it from being easily separated in the event of an external impact.

[0131] Bumps (160) can electrically connect the electrodes of the circuit board (100) and the terminals of the semiconductor device (200) using various methods such as solder bonding, plating, and metal-to-metal bonding. Solder bonding can be performed using materials such as Cu, Sn, and Ag, for example. The plating method may be a method of forming a plating layer by electroplating and / or electroless plating. The metal-to-metal bonding method may be a method of bonding bumps by applying heat and pressure to recrystallize them. At least some of the bumps (160) may be protrusions that protrude upward from the insulating layer of the circuit board (100). Accordingly, the protrusions of the bumps (160) may be referred to as pillars or posts.

[0132] The foregoing description is for illustrative purposes only, and those skilled in the art will understand that other specific forms can be easily modified without altering the technical spirit or essential features of the invention. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. For example, each component described as a single unit may be implemented by dividing it into multiple elements, and likewise, components described as multiple elements may also be implemented as a single unit.

[0133] The components of the various embodiments may be combined and implemented as long as they do not conflict with one another. Accordingly, it should be understood that new embodiments combining the various embodiments described above are also included in this disclosure. The scope of the present invention is defined by the claims set forth below rather than by the detailed description above, and all modifications or variations derived from the meaning and scope of the claims and equivalent concepts should be interpreted as being included within the scope of the present invention. Explanation of the symbols

[0134] 10: Semiconductor package 100: Circuit board 110: Glass layer 111: Upper surface of the glass layer 112: Underside of the glass layer 113: through hole 114: Chamfer structure 120: Metal layer 120a, 120b: Opening expansion space 120c: First metal layer 120d: Second metal layer 121: Upper metal layer 121a: Upper seed layer 121b, 121d, 121e, 121f, 121g: Inclined surface 122: Lower metal layer 122a: Lower seed layer 123: Internal metal layer 123a: Internal seed layer 124: First upper metal layer 124b: First inclined plane 125: Second upper metal layer 125b: Second slope 126: First inner metal layer 127: Second inner metal layer 130: Upper build-up layer 131: Upper circuit layer 132a, 132b, 132c: Circuit layers 133a, 133b, 133c: via electrodes 134a, 134b, 134c: Insulating layer 135: Upper protective layer 140: Lower build-up layer 141: Lower circuit layer 142a, 142b, 142c: Circuit layers 143a, 143b, 143c: via electrodes 144a, 144b, 144c: Insulating layer 145: Lower protective layer 150: Plating layer 200: Semiconductor device 300: Main board A1: First metal layer A2: Second metal layer A3: Third metal layer

Claims

Claim 1 A circuit board comprising: a glass layer having an upper surface and a lower surface and a through hole penetrating between the upper surface and the lower surface; and a metal layer disposed on the glass layer to place a plating layer on the glass layer, wherein the upper surface of the metal layer has an inclined surface inclined with respect to the upper surface of the glass layer and the inner wall of the through hole, respectively, in the upper region of the upper opening of the through hole. Claim 2 A circuit board according to claim 1, wherein the metal layer comprises: an upper metal layer disposed on the upper surface of the glass layer to plate an upper circuit layer on the upper surface of the glass layer; and an inner metal layer disposed on the inner wall of the through hole to plate a through electrode within the through hole; wherein the inclined surface is disposed on the upper surface of the upper metal layer to overlap in the vertical direction with the perimeter of the upper opening of the through hole. Claim 3 A circuit board according to claim 2, wherein the upper metal layer comprises: a first metal layer portion having an upper surface that is a flat surface parallel to the upper surface of the glass layer and does not overlap with the through hole in the vertical direction; and a second metal layer portion having an inclined surface on its upper surface that forms a downward slope from the upper surface of the first metal layer portion toward the through hole; wherein the second metal layer portion is arranged in a ring shape that partially overlaps with the through hole in the vertical direction. Claim 4 A circuit board according to claim 3, wherein the inclined surface does not overlap with the through hole in a direction parallel to the upper surface of the glass layer. Claim 5 A circuit board according to claim 3, wherein the inclined surface is extended in the radial direction of the through hole for a length of at least 0.3 times and no more than 0.9 times the thickness in the vertical direction of the first metal layer. Claim 6 A circuit board according to claim 1, wherein the inclined surface has an inclination of 20° or more and 70° or less with respect to the upper surface of the glass layer and the inner wall of the through hole, respectively. Claim 7 A circuit board according to claim 1, wherein the metal layer comprises: a first metal layer disposed on the upper surface of the glass layer and the inner wall of the through hole and comprising a first metal material; and a second metal layer disposed on the first metal layer and comprising a second metal material different from the first metal material. Claim 8 A circuit board according to claim 7, wherein the upper surface of the first metal layer has a first inclined surface inclined at a first inclination angle with respect to the upper surface of the glass layer in an area that overlaps in the vertical direction with the upper opening of the through hole, and the upper surface of the second metal layer has a second inclined surface inclined at a second inclination angle with respect to the upper surface of the glass layer in an area that overlaps in the vertical direction with the upper opening of the through hole. Claim 9 A circuit board according to claim 8, wherein the first inclination angle of the first metal layer is greater than the second inclination angle of the second metal layer. Claim 10 A circuit board according to claim 8, wherein the first inclination angle of the first metal layer is smaller than the second inclination angle of the second metal layer. Claim 11 A circuit board according to claim 1, further comprising an upper build-up layer disposed on top of the glass layer, wherein the metal layer is a metal layer for plating a plating layer for forming an upper circuit layer of the upper build-up layer and a through electrode in the through hole. Claim 12 A circuit board according to claim 1, wherein the metal layer is arranged to have the inclined surface by etching the metal layer by an ion beam of ion beam sputtering and surface rearrangement of the deposited material. Claim 13 A circuit board according to claim 1, wherein the inclined surface is a flat surface or a curved surface. Claim 14 A circuit board according to claim 1, wherein the inclined surface has an angle of inclination that changes along the radial direction of the through hole. Claim 15 A circuit board according to claim 1, wherein the metal layer is a circuit board in which the thickness of the inner metal layer deposited on the inner wall of the through hole decreases downward. Claim 16 A circuit board according to claim 1, wherein the glass layer has a chamfered structure on the upper inner wall corresponding to the upper opening of the through hole. Claim 17 A semiconductor package comprising a circuit board according to any one of claims 1 to 16 and a semiconductor element disposed on said circuit board.

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