AlGaN / GaN High Electron Mobility Transistor

Abstract

Various embodiments of the present disclosure relate to a high electron mobility transistor comprising AlGaN / GaN capable of maintaining constant performance with high reliability, wherein the high electron mobility transistor comprises a silicon substrate, an undoped AlGaN buffer formed on the silicon substrate, an n-GaN channel formed on the undoped AlGaN buffer, a 2DEG region formed on the n-GaN channel, an AlN spacer formed on the n-GaN channel, an n-AlGaN barrier formed on the AlN spacer, an undoped GaN layer formed on the n-AlGaN barrier, a p-GaN gate formed near the undoped GaN layer, a gate metal formed on the p-GaN gate, and a source metal and a drain metal formed on the n-GaN channel, wherein the n-AlGaN barrier may be formed between the AlN spacer and the undoped GaN layer.

Description

Technology Field

[0001] Various embodiments of the present disclosure relate to a High Electron Mobility Transistor (HEMT) comprising AlGaN / GaN capable of maintaining constant performance with high reliability. Background Technology

[0003] AlGaN / GaN high electron mobility transistors are high-speed switching and high-power electronic semiconductor devices based on a heterojunction composed of gallium nitride (GaN) and aluminum gallium nitride (AlGaN), and enable high-speed switching at high power by utilizing a 2-dimensional electron gas (2DEG) layer. E-mode (Enhancement Mode) AlGaN / GaN high electron mobility transistors are high electron mobility transistors that do not conduct current when the gate voltage is zero, but conduct current when a positive voltage is applied to the gate. They have low power consumption and high safety, making them suitable for use in power semiconductor devices that perform switching operations in high-power, high-frequency environments.

[0004] However, the electrical characteristics of AlGaN / GaN high electron mobility transistors depend heavily on the accuracy of the etching process and thin film deposition process, as well as epitaxial parameters and structural parameters, and if traps generated by the process are formed in the passivation, they can cause reliability problems such as current collapse. The problem to be solved

[0006] Accordingly, various embodiments of the present disclosure aim to provide an E-mode AlGaN / GaN high-electron mobility transistor capable of maintaining constant performance with high reliability in order to solve the aforementioned problems.

[0007] The technical problems intended to be solved in this document are not limited to those mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art to which this disclosure belongs from the description below. means of solving the problem

[0009] According to one embodiment of the present invention, a high electron mobility transistor comprises a silicon substrate, an undoped AlGaN buffer formed on the silicon substrate, an n-GaN channel formed on the undoped AlGaN buffer, a 2DEG (2 Dimensional Electron Gas) region formed on the n-GaN channel, an AlN spacer formed on the n-GaN channel, an n-AlGaN barrier formed on the AlN spacer, an undoped GaN layer formed on the n-AlGaN barrier, a p-GaN gate formed near the undoped GaN layer, a gate metal formed on the p-GaN gate, and a source metal and a drain metal formed on the n-GaN channel, wherein the n-AlGaN barrier may be formed between the AlN spacer and the undoped GaN layer.

[0010] In addition, the thickness of the n-AlGaN barrier may be thicker than the thickness of the AlN spacer.

[0011] Additionally, the undoped GaN layer may include a first undoped GaN layer formed between the p-GaN gate and the source metal; and a second undoped GaN layer formed between the p-GaN gate and the drain metal.

[0012] Additionally, the high electron mobility transistor further comprises an oxide film passivation formed on the undoped GaN layer, a nitride film passivation formed on the oxide film passivation, and an interlayer insulating film formed on the nitride film passivation, wherein the oxide film passivation can be in direct contact with the p-GaN gate, the undoped GaN layer, and the gate metal.

[0013] Additionally, the high electron mobility transistor may further include a first field plate formed between the gate metal and the drain metal, a second field plate formed on the first field plate and extending in the direction of the drain metal while overlapping with a portion of the gate metal, and a third field plate formed to overlap with a portion of the drain metal.

[0014] Additionally, the undoped GaN layer may be formed in direct contact with the n-AlGaN barrier, the p-GaN gate, and the oxide passivation, the p-GaN gate may be in direct contact with the undoped GaN layer, the gate metal, and the oxide passivation, and the gate metal may be formed in direct contact with the p-GaN gate, the oxide passivation, the nitride passivation, and the interlayer insulating film.

[0015] According to another embodiment of the present invention, a high electron mobility transistor may comprise, in order, a silicon substrate (Si substrate), an undoped AlGaN buffer, an n-GaN channel, an AlN spacer formed on the n-GaN channel, a p-AlGaN barrier and an undoped AlGaN barrier formed on the AlN spacer, a p-GaN gate and an undoped GaN layer formed respectively on the p-AlGaN barrier and the undoped AlGaN barrier, an oxide passivation formed on the p-GaN gate and the undoped GaN layer, a gate metal formed on the p-GaN gate, and a source metal and a drain metal formed of the same material as the gate metal, spaced apart from the gate metal, and formed in direct contact with the n-GaN channel.

[0016] In addition, the high electron mobility transistor may be characterized in that the p-AlGaN barrier and the undoped-AlGaN barrier are formed side by side and share a bottom surface.

[0017] Additionally, the undoped AlGaN barrier can be formed to be in contact with the p-AlGaN barrier and p-GaN gate on the side, in contact with the AlN spacer on the bottom, and in contact with the undoped GaN layer (100) on the top.

[0018] In addition, the high electron mobility transistor further comprises an oxide film passivation formed on the undoped GaN layer, a nitride film passivation formed on the oxide film passivation, and an interlayer insulating film formed on the nitride film passivation, wherein the oxide film passivation can be in direct contact with the p-GaN gate, the undoped GaN layer, and the gate metal.

[0019] Additionally, the undoped GaN layer may be formed in direct contact with the p-GaN gate and the oxide passivation, the p-GaN gate may be in direct contact with the undoped GaN layer, the oxide passivation, the p-AlGaN barrier, and the gate metal, and the gate metal may be formed in direct contact with the p-GaN gate, the oxide passivation, the nitride passivation, and the interlayer insulating film. Effects of the invention

[0021] According to one embodiment of the present invention, by adding a uniformly doped region or a layer composed of a specific material to an AlGaN / GaN high electron mobility transistor structure, an AlGaN / GaN high electron mobility transistor can be provided that maintains constant performance with high reliability.

[0022] The effects obtainable from the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art to which the present disclosure pertains from the description below. Brief explanation of the drawing

[0024] FIG. 1 is a cross-sectional view showing the structure of a first AlGaN / GaN high electron mobility transistor according to one embodiment of the present invention. Figure 2 is an enlarged view of a portion of the first AlGaN / GaN high electron mobility transistor shown in Figure 1. Figure 3 is an enlarged view of a portion of the first AlGaN / GaN high electron mobility transistor shown in Figure 2. FIG. 4 is a cross-sectional view showing the structure of a second AlGaN / GaN high electron mobility transistor according to another embodiment of the present invention. Figure 5 is an enlarged view of a portion of the second AlGaN / GaN high electron mobility transistor shown in Figure 4. Figure 6 is an enlarged view of a portion of the second AlGaN / GaN high electron mobility transistor shown in Figure 5. Specific details for implementing the invention

[0025] The advantages and features of the present disclosure and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present disclosure is complete and to fully inform those skilled in the art of the scope of the disclosure, and the present disclosure is defined only by the scope of the claims. Throughout the specification, like reference numerals refer to like components.

[0026] When one component is referred to as being "connected to" or "coupled to" another component, it includes cases where it is directly connected or coupled to the other component, or cases where another component is interposed. Conversely, when one component is referred to as being "directly connected to" or "directly coupled to" another component, it indicates that no other component is interposed. "And / or" includes each of the mentioned items and all combinations of one or more of them.

[0027] The terms used herein are for describing the embodiments and are not intended to limit the disclosure. In this specification, the singular form includes the plural form unless specifically stated otherwise in the text. As used herein, "comprises" and / or "comprising" do not exclude the presence or addition of one or more other components, steps, operations, and / or semiconductor elements in addition to the mentioned components, steps, operations, and / or semiconductor elements.

[0028] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another.

[0029] Therefore, it is obvious that the first component mentioned below may be the second component within the technical scope of this disclosure. Unless otherwise defined, all terms used in this specification (including technical and scientific terms) may be used in a meaning that is commonly understood by those skilled in the art to which this disclosure pertains. Furthermore, terms defined in commonly used dictionaries are not to be interpreted ideally or excessively unless explicitly and specifically defined otherwise.

[0030] The terms 'part' or 'module' used in this embodiment refer to software or hardware components such as FPGAs or ASICs, and the 'part' or 'module' performs certain roles. However, the meaning of 'part' or 'module' is not limited to software or hardware. The 'part' or 'module' may be configured to reside in an addressable storage medium or configured to run one or more processors. Thus, as an example, the 'part' or 'module' may include components such as software components, object-oriented software components, class components, and task components, as well as processes, functions, attributes, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The components and functions provided within the 'part' or 'module' may be combined into a smaller number of components and 'part' or 'module', or further separated into additional components and 'part' or 'module'.

[0031] Steps of a method or algorithm described in connection with some embodiments of the present disclosure may be directly implemented in hardware, software modules, or a combination of both, executed by a processor. Software modules may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disks, removable disks, CD-ROMs, or any other form of recording medium known in the art. An exemplary recording medium is coupled to a processor, and the processor can read information from the recording medium and write information to the storage medium. Alternatively, the recording medium may be integral with the processor. The processor and the recording medium may reside within an Application-Specific Integrated Circuit (ASIC). The ASIC may reside within a user terminal.

[0032] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings so that those skilled in the art can easily implement the present invention. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein.

[0034] FIG. 1 is a cross-sectional view showing the structure of a first AlGaN / GaN high electron mobility transistor according to one embodiment of the present invention.

[0035] Referring to FIG. 1, an E-mode first AlGaN / GaN high electron mobility transistor (1100) according to one embodiment of the present invention can form a small drift region of the semiconductor device while having the same off-state drain-source breakdown voltage (BVDSS) between the drain and source compared to a general silicon-based high electron mobility transistor. Here, the drift region refers to the region between the gate metal (140) and the drain metal (160). The E-mode first AlGaN / GaN high electron mobility transistor (1100) is a semiconductor device with high electrical stability and a high critical electric field.

[0036] In addition, the 2DEG (50) region of the E-mode first AlGaN / GaN high electron mobility transistor (1100) has high electron mobility, so the on-resistance (Specific on-resistance: Rsp = Ron) W G (gate width) L pitch It has the advantage of having a low pitch size and a high drain saturation current.

[0037] E-mode AlGaN / GaN high electron mobility transistors can generate less leakage current due to their low intrinsic carrier concentration. In the case of general high electron mobility transistors, increasing the off-state drain-to-source breakdown voltage (BVDSS) requires increasing the drift region length and lowering the doping concentration. Additionally, reducing Rsp requires decreasing the drift region length and increasing the doping concentration. Thus, a trade-off relationship exists between BVDSS and Rsp, but the first E-mode AlGaN / GaN high electron mobility transistor (1100) can reduce this trade-off relationship through the aforementioned advantages.

[0038] Referring to FIG. 1, a first AlGaN / GaN high electron mobility transistor (1100) according to one embodiment of the present invention may be formed on a silicon substrate (10) with a crystal orientation {1 1 1}. According to one embodiment of the present invention, the silicon substrate (10) of the first AlGaN / GaN high electron mobility transistor (1100) may be doped with boron (B), wherein the boron is 1E18 to 5E19 / cm² 3 It can be doped at a concentration of

[0039] The first AlGaN / GaN high electron mobility transistor (1100) can be formed on a substrate formed of sapphire, SiC, etc., instead of a silicon substrate (10). Although these materials require higher production costs and have higher processing difficulty compared to silicon, they have high thermal conductivity, and in the case of SiC in particular, have the advantage of having fewer lattice defect problems with other materials compared to silicon.

[0040] A 100 to 240 nm AlN thin film layer (20) can be formed on a {1 1 1} silicon substrate (Si substrate) (10) of the first AlGaN / GaN high electron mobility transistor (1100). The substrate can be silicon, sapphire (Al2O3), or SiC, and the silicon substrate (10) is inexpensive, has acceptable thermal conductivity, and can be processed in a standard silicon fab. However, it has the characteristics of large lattice mismatch and very large coefficient of thermal expansion (CTE) mismatch.

[0041] The silicon substrate (10), the aluminum gallium nitride film (AlGaN), and the gallium nitride film (GaN) have different lattice constants. In other words, materials such as the aluminum gallium nitride film (AlGaN) and the gallium nitride film (GaN) of the AlGaN / GaN high electron mobility transistor have different lattice constants from the silicon of the silicon substrate (10). Therefore, if the aluminum gallium nitride film (AlGaN) or the gallium nitride film (GaN) is deposited directly onto the silicon substrate (10), many dislocation defects may occur. Therefore, to reduce the occurrence of defects, an AlN thin film layer (20) is formed in advance before depositing the aluminum gallium nitride film (AlGaN) or the gallium nitride film (GaN). Here, the AlN thin film layer (20) can be formed with a thickness of 100 to 240 nm.

[0042] By forming an AlN thin film layer (20), the thermo-elastic strain caused by heat that may occur between the silicon substrate (10) and other materials of the high electron mobility transistor can be reduced. This reduces surface cracking and dislocation defects in the AlGaN (or GaN) thin film, thereby improving the performance of the defective semiconductor device. Additionally, the AlN thin film layer (20) has high thermal conductivity, which relieves stress between the substrate and the AlGaN (or GaN) thin film due to the difference in thermal expansion coefficients between the silicon substrate (10) and the AlGaN (or GaN) thin film, and improves the quality of the interface between the materials of the semiconductor device, thereby increasing electron mobility and improving the current processing capability and switching speed of the semiconductor device.

[0043] In an embodiment of the present invention, an undoped AlGaN buffer (30) may be formed on an AlN thin film layer (20). Alternatively, a carbon-doped AlGaN buffer (30) may be formed. Here, "undoped" means that no dopant is applied. The undoped AlGaN buffer (30) has a super-lattice structure, and increasing the thickness of the undoped AlGaN buffer (30) can reduce substrate leakage. By forming such a thick undoped AlGaN buffer (30) or carbon-doped AlGaN buffer (30), potential defects caused by differences in lattice constants between materials of the semiconductor device can be mitigated. Additionally, it can help increase the breakdown voltage of the semiconductor device by dispersing a high electric field within the semiconductor device. Furthermore, it can help improve the stability of the semiconductor device by preventing leakage current and charge traps.

[0044] According to one embodiment, the undoped AlGaN buffer (30) can effectively mitigate lattice constant differences as the aluminum content increases. Instead of the undoped AlGaN buffer (30) of the first AlGaN / GaN high electron mobility transistor (1100), it may be composed of high-quality crystals of AlGaN, AlN, or GaN. Alternatively, instead of the undoped AlGaN buffer (30), it may be replaced with a carbon-doped AlGaN super-lattice buffer structure. Using an optimized carbon-doped AlGaN super-lattice buffer structure can improve the vertical electric field, breakdown voltage, and horizontal breakdown voltage of the AlGaN / GaN high electron mobility transistor. Additionally, the carbon-doped AlGaN super-lattice buffer structure can reduce the number of traps, thereby reducing on-resistance and increasing the semiconductor device lifespan.

[0045] According to one embodiment, an n-type doped n-GaN channel (n-GaN channel) (40) may be formed on an undoped AlGaN buffer (30). The thickness and doping of the n-GaN channel (40) may affect electrical properties. The n-GaN channel (40) is a silicon-doped n-GaN channel, and as the silicon doping concentration increases, the conductivity increases, which can increase the drain saturation current. The n-GaN channel (40) contains silicon (Si), an n-type dopant, at a concentration of 1E17 to 1E18 / cm² 3 It may include. By doping the n-type silicon (Si) dopant into the n-GaN channel (40), the conductivity of the n-GaN channel can be increased, thereby increasing the drain saturation current. The thickness of the n-GaN channel (40) may be formed to be 200 to 2000 nm.

[0046] According to one embodiment, an AlN spacer (60) may be formed on an n-GaN channel (40). The AlN spacer (60) can improve semiconductor device performance by better confining electrons in the 2DEG (50) region. The AlN spacer (60) may be formed very thinly with a thickness of 0.5 to 1.0 nm. Here, the AlN spacer (60) may be formed in direct contact with the n-GaN channel (40) and the n-AlGaN barrier (80). When a thin AlN spacer (60) is formed on the n-GaN channel (40), a very thin conductive layer, a 2DEG (50) layer, is formed at the boundary between the two layers (40, 60) due to the difference in band gap energy between the AlN spacer (60), which has a band gap of about 6.2 eV, and the n-GaN channel (40), which has a band gap of about 3.4 eV, thereby enabling charge transfer with excellent performance even under high current and high voltage conditions. The AlN spacer (60) is more effective in reinforcing the 2DEG (50) region. The AlN spacer (60) is a polar material having a very large band gap of about 6.2 eV, and by forming a thin AlN spacer (60) between the n-GaN channel (40) and the n-AlGaN barrier (80), a strong electric field and a higher potential barrier due to polarity can be formed at the interface between the n-GaN channel (40) and the AlN spacer (60). Thus, a higher electron density can be formed in the 2DEG (50) region formed in the n-GaN channel (40), thereby improving the current transfer capability of the semiconductor device. However, if a lower gate voltage is applied to the high electron mobility transistor in the off state, the electron density required to turn on the high electron mobility transistor can be easily reached in the 2DEG (50) region below the p-GaN gate (110).Therefore, by adding an AlN spacer (60) structure, the drain current of the semiconductor device can be easily increased, so the threshold voltage is lowered.

[0047] Referring to FIG. 1, a first AlGaN / GaN high electron mobility transistor (1100) according to one embodiment of the present invention may include an n-AlGaN barrier (80) doped in the n-type on the AlN spacer (60). The n-AlGaN barrier (80) may serve to lower the threshold voltage. However, the n-AlGaN barrier (80) may contribute to improving semiconductor device performance. In order to satisfy semiconductor device design specifications regarding the threshold voltage, saturation drain current, and on-resistance of the E-mode AlGaN / GaN high electron mobility transistor, it may be necessary to optimize other semiconductor device design variables as well as control the doping concentration of the n-AlGaN barrier (80).

[0048] According to one embodiment, an undoped GaN layer (100) may be formed on an n-AlGaN barrier (80). The undoped GaN layer (100) may be formed with a thickness of 80 to 100 nm. By using an undoped GaN layer (100) instead of a doped GaN or AlGaN layer, the 2DEG (50) electron density at the heterojunction of the AlGaN barrier / n-GaN channel may be increased. Additionally, by using an undoped GaN layer (100) instead of a doped-GaN or doped-AlGaN layer, local electron mobility in the drift region may be improved.

[0049] Instead of the above-mentioned undoped GaN layer (100), - It can be formed from GA2O3, diamond, ZnS, ZnO, etc. Unless otherwise specified in the present disclosure, it is assumed that it is formed from an undoped GaN layer.

[0050] Furthermore, the undoped GaN layer (100) of the first AlGaN / GaN high electron mobility transistor (1100) can prevent traps from forming in the n-AlGaN barrier (80). For example, if an oxide passivation (120) deposition process is performed directly on the n-AlGaN barrier (80) without the undoped GaN layer (100), many traps may form in the n-AlGaN barrier (80). Therefore, by inserting the undoped GaN layer (100) between the n-AlGaN barrier (80) and the oxide passivation (120), performance problems such as current collapse can be effectively prevented. The formation of traps in the first AlGaN / GaN high electron mobility transistor (1100) containing the undoped GaN layer (100) can be prevented, and problems such as current collapse can be resolved.

[0051] According to one embodiment, the undoped GaN layer (100) may include a first undoped GaN layer and a second undoped GaN layer. That is, a first undoped GaN layer (100) may be formed between the p-GaN gate (110) and the source metal (150), and a second undoped GaN layer (100) may be formed between the p-GaN gate (110) and the drain metal (160). The first undoped GaN layer (100) formed between the p-GaN gate (110) and the source metal (150) may be formed in direct contact with the n-AlGaN barrier (80), oxide passivation (120), p-GaN gate (110), and source metal (150). A second undoped GaN layer (100) formed between the p-GaN gate (110) and the drain metal (160) can be formed in direct contact with the n-AlGaN barrier (80), oxide passivation (120), p-GaN gate (110), and drain metal (160).

[0052] According to one embodiment, a p-GaN gate (110) acting as a gate may be formed on an n-GaN channel (40). In an embodiment of the present invention, a high-concentration Mg-doped p-GaN gate (110) may be used as the p-GaN gate (110). The high-concentration Mg-doped p-GaN gate (110) raises the potential in the channel region so that the 2DEG (50) region at the AlGaN barrier / n-GaN channel interface can be completely depleted at VGS = 0V. Thus, the threshold voltage (VT) can be made greater than 0V, which helps to form an E-mode high-electron mobility transistor that is normally off.

[0053] It can be electrically connected to a gate metal (140) formed on top of the p-GaN gate (110). The thickness of the p-GaN gate (110) can be formed to be 80 to 100 nm. At this time, the p-GaN gate (110) can be formed by doping GaN with p-type magnesium (Mg) at a concentration of 1E19 to 7E19 / cm3.

[0054] According to one embodiment, an oxide passivation (120) and a nitride passivation (130) may be formed on an undoped GaN layer (100) and a p-GaN gate (110). The oxide passivation (120) and the nitride passivation (130) are necessary to mitigate surface trap-related degradation and to form field plates (FP) (171, 172, 173). Field plates (171, 172, 173) can improve breakdown voltage by reducing peaks in the electric field around the gate metal and drain metal. They can also mitigate high electric field-related trapping effects.

[0055] The oxide film passivation (120) above may be formed of a material such as silicon oxide or aluminum oxide. The nitride film passivation (130) above is a silicon nitride film (Six N y ), silicon oxynitride film (SiO x N y It can be formed from materials such as aluminum nitride (AlN) or boron nitride (BN). Here, the oxide film passivation (120) can be formed in direct contact with the p-GaN gate (110), the undoped GaN layer (100), the gate metal (140), and the nitride film passivation (130).

[0056] According to one embodiment, a gate metal (140), a source metal (150), and a drain metal (160) can be formed by selective etching of an oxide film passivation (120) and a nitride film passivation (130). The gate metal (140) can be formed in direct contact with a p-GaN gate (110). The source metal (150) and the drain metal (160) can be formed in direct contact with an n-GaN channel (40) in which a 2DEG (50) is formed. Here, the gate metal (140), the source metal (150), and the drain metal (160) can be formed as any one of a stacked layer of materials among Ti / Al / Ni / Au, Ti / Al / TiN, and Ti / Al / W. The gate metal (140) can be formed in direct contact with the p-GaN gate (110), oxide passivation (120), nitride passivation (130), and interlayer insulating film (ILD) (180).

[0057] According to one embodiment, field plates (171, 172, 173) may be formed for field relaxation of the first AlGaN / GaN high electron mobility transistor (1100). The field plates (171, 172, 173) may be formed of titanium nitride (TiN) or aluminum with a thickness of about 100 to 560 nm. The field plates (171, 172, 173) may include a first field plate (171) formed near the gate metal (140) while being formed on the nitride film passivation (130), a second field plate (172) formed extending from the top of the gate metal (140) toward the drain metal (160), and a third field plate (173) overlapping with the drain metal (160). Field plates (171, 172, 173) can be formed near the gate metal (140) and drain metal (160) where the electric field is concentrated. The field plates (171, 172, 173) can increase the breakdown voltage of the semiconductor device by mitigating the electric field of the gate metal (140) and drain metal (160). In addition, the trapping effect of carriers caused by the high electric field can be reduced.

[0058] Subsequently, an interlayer insulating film (180) composed of an interlayer dielectric (ILD) can be formed on the upper surface of the semiconductor device for insulation. A contact plug and an interconnected metal connected to a source metal (150) and a drain metal (160) can be formed inside the interlayer insulating film (180) to be connected to an additional electrical circuit on the upper surface of the semiconductor device.

[0059] Figure 2 is an enlarged view of a portion of the AlGaN / GaN high electron mobility transistor shown in Figure 1.

[0060] Referring to FIG. 2, the structure of a thin AlN spacer (60), a thick n-AlGaN barrier (80), an undoped GaN layer (100), and a p-GaN gate (110) included in an AlGaN / GaN high-electron mobility transistor (1100) is shown in detail. The first AlGaN / GaN high-electron mobility transistor (1100) comprises: an undoped AlGaN buffer (30) formed on a silicon substrate (Si substrate); an n-GaN channel (40); an AlN spacer (60) formed on the n-GaN channel; an n-AlGaN barrier (80) formed on the AlN spacer (60); an undoped GaN layer (100) formed on the n-AlGaN barrier (80); a p-GaN gate (110) formed on the n-GaN channel; a gate metal (140) formed on the p-GaN gate (110); and an oxide passivation (120). It may include a nitride film passivation (130); a first field plate (171) and an interlayer insulating film (180) formed on the nitride film passivation (130).

[0061] As can be seen in FIG. 2, a silicon-doped n-AlGaN barrier (80) can be formed between the AlN spacer (60) and the undoped GaN layer (100). The entire AlGaN barrier between the source metal (150) and the drain metal (160), as well as the AlGaN barrier below the p-GaN gate (110), was a silicon-doped n-AlGaN barrier (80) during the deposition step. However, the reason why the n-AlGaN barrier (80) below the p-GaN gate (110) appears as p-type AlGaN (70) is as follows.

[0062] The p-GaN gate (110) is 1E19 / cm 3It is doped with magnesium atoms having a high concentration above. On the other hand, the n-AlGaN barrier (80) is doped with silicon atoms at a lower concentration than that. Therefore, through a subsequent thermal process, the high concentration of magnesium atoms in the p-GaN gate (110) can diffuse into the lower concentration of the n-AlGaN barrier (80). Thus, the n-AlGaN barrier (80) located below the p-GaN gate (110) can be converted into a p-AlGaN barrier (70). Thus, a p-AlGaN barrier (70) can be formed between the AlN spacer (60) and the p-GaN gate (110). The p-AlGaN barrier (70) below the p-GaN gate (110) is a magnesium-doped p-AlGaN barrier, and can increase the threshold voltage (Vt) by raising the potential in the channel region.

[0063] The thickness of the above AlN spacer (60) can be much thinner than the thickness of the above n-AlGaN barrier (80) or p-AlGaN barrier (70). Also, it can be seen that the thin AlN spacer (60) is formed very thinly compared to the undoped GaN layer (100).

[0064] Here, the undoped GaN layer (100) can be formed in direct contact with the n-AlGaN barrier (80), oxide passivation (120), and p-GaN gate (110).

[0065] Here, the oxide film passivation (120) can be formed in direct contact with the undoped GaN layer (100), the nitride film passivation (130), the gate metal (140), and the p-GaN gate (110).

[0066] The gate metal (140) can be formed in direct contact with the p-GaN gate (110), oxide passivation (120), nitride passivation (130), and interlayer insulating film (ILD) (180).

[0067] Figure 3 is an enlarged view of a portion of the area shown in Figure 2.

[0068] Referring to FIG. 3, a first AlGaN / GaN high electron mobility transistor (1100) according to one embodiment of the present invention may include an n-GaN channel (40); an AlN spacer (60) formed in the n-GaN channel (40); an n-AlGaN barrier (80) formed on the AlN spacer (60); an undoped GaN layer (100) formed on the n-AlGaN barrier (80); and a p-GaN gate (110) formed in the n-GaN channel (40). The thickness of the n-AlGaN barrier (80) may be thicker than the thickness of the AlN spacer (60). An n-AlGaN barrier (80) may be formed between the AlN spacer (60) and the undoped GaN layer (100).

[0069] Here, the n-AlGaN barrier (80) and the p-GaN gate (110) are regions where n-type and p-type dopants are ion-implanted, respectively. On the other hand, the undoped GaN layer (100) is a region where neither n-type nor p-type dopant is doped. Therefore, p-type dopants can diffuse into the n-AlGaN barrier (80) and the undoped GaN layer (100) that are in contact with the p-GaN gate (110). Thus, as explained earlier, due to the diffusion of p-type dopants, the n-AlGaN barrier (80) can be transformed into a p-AlGaN barrier (70). Thus, a p-AlGaN barrier (70) can be formed between the AlN spacer (60) and the p-GaN gate (110).

[0070] The n-AlGaN barrier (80) can be formed apart from the p-GaN gate (110) by the p-AlGaN barrier (70). That is, when the p-AlGaN barrier (70) is formed between the AlN spacer (60) and the p-GaN gate (110), the n-AlGaN barrier (80) can be formed apart from the p-GaN gate (110) at a certain distance.

[0071] And the undoped GaN layer (100) close to the p-GaN gate (110) has a high p-type dopant concentration due to diffusion. However, as it moves further away from the p-GaN gate (110), it can be seen that the p-type dopant concentration gradually decreases.

[0072] FIG. 4 is a cross-sectional view showing the structure of an AlGaN / GaN high electron mobility transistor according to another embodiment of the present invention. The difference from FIG. 1 is that an undoped AlGaN barrier (undoped AlGaN) (90) is used instead of n-AlGaN (80).

[0073] Referring to FIG. 4, a second AlGaN / GaN high electron mobility transistor (1200) can be formed on a silicon substrate (10). An AlN thin film layer (20) can be formed on the silicon substrate (10). An AlN thin film layer (20) is formed between the silicon of the silicon substrate (10) of the AlGaN / GaN high electron mobility transistor and an undoped AlGaN buffer (30). Since the silicon of the silicon substrate (10) of the AlGaN / GaN high electron mobility transistor and the undoped AlGaN buffer (30) have different lattice constants, potential defects can be reduced by depositing the AlN thin film layer (20). A gallium nitride film (GaN) can be used instead of the undoped AlGaN buffer (30), and an AlN thin film layer (20) can be formed between the silicon of the silicon substrate (10) and the gallium nitride film (GaN). The silicon and gallium nitride (GaN) film of the silicon substrate (10) of the AlGaN / GaN high electron mobility transistor have different lattice constants, so dislocation defects can be reduced by depositing an AlN thin film layer (20). When two layers with different lattice constants are formed, many dislocation defects may occur during the deposition process. To reduce this, an AlN thin film layer (20) is deposited. By forming the AlN thin film layer (20), elastic deformation caused by heat between the silicon substrate (10) and other materials of the semiconductor device is reduced, thereby reducing defects and surface cracks in the AlGaN (or GaN) thin film, and improving the performance of the semiconductor device. In addition, the AlN thin film layer (20) has high thermal conductivity, which relieves stress between the substrate and the semiconductor device due to the difference in thermal expansion coefficients between the silicon substrate (10) and the materials of the semiconductor device, and improves the quality of the interface between the materials of the semiconductor device to increase electron mobility, thereby improving the current processing capability and switching speed of the semiconductor device.

[0074] According to one embodiment, an undoped AlGaN buffer (30) may be formed on an AlN thin film layer (20). Here, "undoped" refers to a state where no dopant is doped. By forming a thick undoped AlGaN buffer (30), potential defects caused by differences in lattice constants between materials of the semiconductor device can be mitigated. Additionally, it can help increase the breakdown voltage of the semiconductor device by dispersing a high electric field within the semiconductor device. Furthermore, it can help improve the stability of the semiconductor device by preventing leakage current and charge traps. According to one embodiment, the higher the aluminum content in the undoped AlGaN buffer (30), the more effectively the difference in lattice constants can be mitigated.

[0075] According to one embodiment, an n-GaN channel (40) may be formed on an undoped AlGaN buffer (30). When an n-GaN channel (40) is formed on the undoped AlGaN buffer (30), a very thin conductive layer, a 2DEG (50), may be formed at the boundary between the two layers (30, 40) due to the difference in band gap energy between AlGaN (band gap: about 3.9 to 4.1 eV) and GaN (band gap: about 3.4 eV). Thus, the 2DEG (50) can move charges with excellent performance even under high current and high voltage conditions.

[0076] Referring to FIG. 4, an AlN spacer (60) may be formed on the n-GaN channel (40). The AlN spacer (60) has almost the same function as described in detail in FIG. 1 and FIG. 2, so some description will be omitted.

[0077] Referring to FIG. 4, when a thin AlN spacer (60) is formed on the n-GaN channel (40), a very thin conductive layer, a 2DEG (50), is formed at the boundary between the two layers (40, 60) due to the difference in band gap energy between the AlN spacer (60), which has a band gap of about 6.2 eV, and the n-GaN channel (40), which has a band gap of about 3.4 eV, thereby enabling charge transfer with excellent performance even under high current and high voltage conditions. The AlN spacer (60) is more effective in reinforcing the 2DEG (50) region. The AlN spacer (60) is a polar material having a very large band gap of about 6.2 eV. By forming a thin AlN spacer (60) between the n-GaN channel (40) and the undoped AlGaN barrier (90), a strong electric field due to polarity and a higher potential barrier can be formed at the interface between the n-GaN channel (40) and the AlN spacer (60). Thus, a higher electron density can be formed in the 2DEG (50) region formed in the n-GaN channel (40), thereby improving the current transfer capability of the semiconductor device. However, if a lower gate voltage is applied to the high electron mobility transistor in the off state, the electron density required to turn on the high electron mobility transistor can be easily reached in the 2DEG (50) region below the p-GaN gate (110). Therefore, by adding the AlN spacer (60) structure, the drain current of the semiconductor device can be easily increased, and thus the threshold voltage is lowered.

[0078] Meanwhile, according to one embodiment, a p-AlGaN barrier (70) may be formed between the AlN spacer (60) and the p-GaN gate (110). When the AlGaN barrier below the p-GaN gate (110) is used as the p-AlGaN barrier (70), the p-AlGaN barrier (70) is a magnesium-doped p-AlGaN barrier, and the threshold voltage can be increased by raising the potential in the channel region.

[0079] According to one embodiment, an undoped AlGaN barrier (90) can be formed on an AlN spacer (60). Thus, an undoped AlGaN barrier (90) is formed between the AlN spacer (60) and the undoped GaN layer (100). The undoped AlGaN barrier (90) can enhance the stability of the semiconductor device by reinforcing the 2DEG (50) region and preventing charge from escaping from the n-GaN channel (40).

[0080] According to one embodiment, a p-type doped p-GaN gate (110) may be formed on a p-AlGaN barrier (70). The p-GaN gate (110) may be a high-concentration magnesium-doped p-GaN gate (110). The high-concentration magnesium-doped p-GaN gate (110) raises the potential in the channel region so that the 2DEG (50) region at the p-AlGaN barrier (70) / n-GaN channel (40) interface can be completely depleted at VGS = 0V. This allows the threshold voltage (VT) to be greater than 0V, thereby helping to form an E-mode high-electron mobility transistor that is normally off. The thick p-AlGaN barrier (70) may be formed with a thickness of 15 to 25 nm.

[0081] According to one embodiment, an oxide film passivation (120) and a nitride film passivation (130) may be formed on an undoped GaN layer (100). According to one embodiment, the materials for the oxide film passivation (120) and the nitride film passivation (130) are omitted as they have been previously described.

[0082] According to one embodiment, a gate metal (140), a source metal (150), and a drain metal (160) can be simultaneously formed by selective etching of an oxide film passivation (120) and a nitride film passivation (130). The gate metal (140), the source metal (150), and the drain metal (160) can be formed from the same material. For example, the gate metal (140), the source metal (150), and the drain metal (160) can be formed as a stacked layer of a material among Ti / Al / Ni / Au, Ti / Al / TiN, and Ti / Al / W.

[0083] According to one embodiment, field plates (171, 172, 173) may be formed near the gate metal (140) and drain metal (160) where the electric field is concentrated. The field plates can increase the breakdown voltage of the semiconductor device by mitigating the electric field of the gate metal (140) and drain metal (160). Additionally, the carrier trapping effect caused by the high electric field can be reduced. Subsequently, an interlayer insulating film (180) composed of an interlayer insulating material may be formed on the upper part of the semiconductor device for insulation. A metal region connected to the source metal (150) and drain metal (160) may be formed inside the interlayer insulating film (180) to be connected to an additional electrical circuit on the upper part of the semiconductor device.

[0084] Figure 5 is an enlarged view of a portion of the second AlGaN / GaN high electron mobility transistor shown in Figure 4.

[0085] Referring to FIG. 5, the second AlGaN / GaN high electron mobility transistor (1200) may include a structure of a thin AlN spacer (60), a p-AlGaN barrier (70), an undoped AlGaN barrier (90), and an undoped GaN layer (100). It is a structure in which an undoped AlGaN barrier (90) is formed on the AlN spacer (60). Additionally, the AlGaN barrier below the p-GaN gate (110) may be maintained as a p-AlGaN barrier (70). The p-AlGaN barrier (70) is a magnesium-doped p-AlGaN barrier, which can raise the potential in the channel region and, in turn, increase the threshold voltage (Vt). Therefore, the performance of the semiconductor device (high electron mobility transistor) can be further improved by taking the threshold voltage of the second AlGaN / GaN high electron mobility transistor (1200) to be similar to the threshold voltage of the first AlGaN / GaN high electron mobility transistor (1100) and by the undoped AlGaN barrier (90) formed in the drift region of the second AlGaN / GaN high electron mobility transistor (1200).

[0086] According to one embodiment, the p-AlGaN barrier (70) holds p-type magnesium (Mg) at 5E16 to 1E18 / cm 3 It may include. Increasing the magnesium (Mg) concentration of the p-AlGaN barrier (70) can increase the threshold voltage but lower the drain saturation current. A thin AlN spacer (60) and a thick p-AlGaN barrier (70) (band gap: about 3.9 to 4.1 eV) can increase the stability of the semiconductor device by reinforcing the 2DEG (50) region and preventing charge from escaping from the n-GaN channel (40). Here, the p-AlGaN barrier (70) can be formed in direct contact with the AlN spacer (60), the undoped GaN layer (100), and the p-GaN gate (110).

[0087] Figure 6 is an enlarged view of a portion of the second AlGaN / GaN high electron mobility transistor shown in Figure 5.

[0088] Referring to FIG. 6, the structure of a thin AlN spacer (60), a p-AlGaN barrier (70), an undoped AlGaN barrier (90), an undoped GaN layer (100), and a p-GaN gate (110) in a portion of the second AlGaN / GaN high-electron mobility transistor (1200) is shown in more detail. The second AlGaN / GaN high-electron mobility transistor (1200) may include an n-GaN channel (40); an AlN spacer (60) formed in the n-GaN channel (40); a p-AlGaN barrier (70) and an undoped AlGaN barrier (90) formed on the AlN spacer (60); an undoped GaN layer (100) formed on the undoped AlGaN barrier (90); and a p-GaN gate (110) formed on the p-AlGaN barrier (70).

[0089] The p-AlGaN barrier (70) and the undoped AlGaN barrier (90) are formed side by side and share a bottom surface. The p-AlGaN barrier (70) and the undoped AlGaN barrier (90) are in direct contact with the AlN spacer (60), and their respective thicknesses may be greater than the thickness of the AlN spacer (60). The p-AlGaN barrier (70) and the undoped AlGaN barrier (90) are in contact with the p-GaN gate (110) and the undoped AlGaN barrier (90), respectively.

[0090] The above-mentioned undoped AlGaN barrier (90) is in contact with the p-AlGaN barrier (70) and the p-GaN gate (110) on its side surface, with the AlN spacer (60) on its bottom surface, and with the undoped GaN layer (100) on its upper surface.

[0091] Here, the p-AlGaN barrier (70) and the p-GaN gate (110) are regions where p-type dopants are ion-implanted. On the other hand, the undoped AlGaN barrier (90) is a region where n-type or p-type dopants are not doped. Therefore, p-type dopants can diffuse into the undoped AlGaN barrier (90) that is in contact with the p-AlGaN barrier (70) and the p-GaN gate (110). Thus, as shown in FIG. 6, the undoped AlGaN barrier (90) that is close to the p-AlGaN barrier (70) and the p-GaN gate (110) has a high p-type dopant concentration due to diffusion. However, as it moves further away from the p-GaN gate (110), the p-type dopant concentration in the undoped AlGaN barrier (90) can be seen to gradually decrease.

[0092] Likewise, the undoped GaN layer (100) is a region that is not doped with n-type or p-type dopants. Therefore, p-type dopants can diffuse into the undoped GaN layer (100) in contact with the p-GaN gate (110). Thus, as shown in FIG. 6, the undoped GaN layer (100) close to the p-GaN gate (110) has a high concentration of p-type dopants due to diffusion. However, as it moves further away from the p-GaN gate (110), the concentration of p-type dopants can be seen to gradually decrease.

[0093] Although the present disclosure has been described with reference to embodiments illustrated in the drawings, this is merely illustrative, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present disclosure should be determined by the technical spirit of the appended claims.

Claims

Claim 1 A high electron mobility transistor comprising: a silicon substrate; an undoped AlGaN buffer formed on the silicon substrate; an n-GaN channel formed on the undoped AlGaN buffer; a 2DEG (2 Dimensional Electron Gas) region formed on the n-GaN channel; an AlN spacer formed on the n-GaN channel; an n-AlGaN barrier formed on the AlN spacer; an undoped GaN layer formed on the n-AlGaN barrier; a p-GaN gate formed near the undoped GaN layer; a gate metal formed on the p-GaN gate; and a source metal and a drain metal formed on the n-GaN channel, wherein the n-AlGaN barrier is formed between the AlN spacer and the undoped GaN layer. Claim 2 A high electron mobility transistor according to claim 1, wherein the thickness of the n-AlGaN barrier is thicker than the thickness of the AlN spacer. Claim 3 A high electron mobility transistor according to claim 1, wherein the undoped GaN layer comprises: a first undoped GaN layer formed between the p-GaN gate and the source metal; and a second undoped GaN layer formed between the p-GaN gate and the drain metal. Claim 4 The high electron mobility transistor according to claim 1, further comprising: an oxide film passivation formed on the undoped GaN layer; a nitride film passivation formed on the oxide film passivation; and an interlayer insulating film formed on the nitride film passivation, wherein the oxide film passivation is in direct contact with the p-GaN gate, the undoped GaN layer, and the gate metal. Claim 5 A high electron mobility transistor according to claim 1, further comprising: a first field plate formed between the gate metal and the drain metal; a second field plate formed on the first field plate, overlapping a portion of the gate metal and extending in the direction of the drain metal; and a third field plate formed to overlap a portion of the drain metal. Claim 6 A high electron mobility transistor formed in claim 4, wherein the undoped GaN layer is in direct contact with the n-AlGaN barrier, the p-GaN gate, and the oxide passivation, the p-GaN gate is in direct contact with the undoped GaN layer, the gate metal, and the oxide passivation, and the gate metal is in direct contact with the p-GaN gate, the oxide passivation, the nitride passivation, and the interlayer insulating film. Claim 7 A high electron mobility transistor comprising: a silicon substrate (Si substrate), an undoped AlGaN buffer, and an n-GaN channel formed in sequence; an AlN spacer formed on the n-GaN channel; a p-AlGaN barrier and an undoped AlGaN barrier formed on the AlN spacer; a p-GaN gate and an undoped GaN layer formed respectively on the p-AlGaN barrier and the undoped AlGaN barrier; an oxide passivation formed on the p-GaN gate and the undoped GaN layer; a gate metal formed on the p-GaN gate; and a source metal and a drain metal formed of the same material as the gate metal, spaced apart from the gate metal, and formed in direct contact with the n-GaN channel. Claim 8 A high electron mobility transistor according to claim 7, characterized in that the p-AlGaN barrier and the non-doped-AlGaN barrier are formed side by side and share a bottom surface with each other. Claim 9 In claim 7, the undoped AlGaN barrier is formed to be in contact with the p-AlGaN barrier and p-GaN gate on the side, in contact with the AlN spacer on the bottom, and in contact with the undoped GaN layer (100) on the top, forming a high electron mobility transistor. Claim 10 In claim 7, the high electron mobility transistor further comprises: an oxide film passivation formed on the undoped GaN layer; a nitride film passivation formed on the oxide film passivation; and an interlayer insulating film formed on the nitride film passivation, wherein the oxide film passivation is in direct contact with the p-GaN gate, the undoped GaN layer, and the gate metal. Claim 11 A high electron mobility transistor formed in claim 10, wherein the undoped GaN layer is in direct contact with the p-GaN gate and the oxide passivation, the p-GaN gate is in direct contact with the undoped GaN layer, the oxide passivation, the p-AlGaN barrier, and the gate metal, and the gate metal is in direct contact with the p-GaN gate, the oxide passivation, the nitride passivation, and the interlayer insulating film.

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