Touch display devcie
Patent Information
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- LG DISPLAY CO LTD
- Filing Date
- 2021-12-13
- Publication Date
- 2026-07-29
Smart Images

Figure 112021143885747-PAT00007_ABST
Abstract
Description
Technology Field
[0001] The embodiments of this specification relate to touch display devices. Background Technology
[0002] As the information society develops, the demand for display devices that display images is increasing, and various types of display devices, such as liquid crystal displays and organic light-emitting diode displays, are being utilized.
[0003] The display device may place a polarizer on the front surface of the substrate where the subpixel is located to prevent the display quality from being degraded by reflected light from externally incident light reaching the user's eyes.
[0004] If a portion of the polarizer is not sufficiently supported from below near the boundary between the display area where the subpixel is located and the non-display area where the subpixel is not located, the polarizer may bend, and the user may be able to identify a screen with poor display quality. The problem to be solved
[0005] The embodiments of the present specification can provide a touch display device with improved display quality at the boundary between a display area and a non-display area. means of solving the problem
[0006] The embodiments of the present specification may provide a touch display device comprising a substrate, a subpixel including a transistor located on the substrate and a light-emitting element electrically connected to the transistor, an encapsulation layer located covering the light-emitting element, a touch sensor located on the encapsulation layer, a planarization layer located on the touch sensor, and at least one dam structure configured to prevent overflow of the planarization layer. Effects of the invention
[0007] According to the embodiments of the present specification, a touch display device with improved display quality at the boundary between a display area and a non-display area can be provided. Brief explanation of the drawing
[0008] FIG. 1 is a system configuration diagram of a touch display device according to embodiments of the present specification. FIG. 2 is an equivalent circuit of a subpixel in a display panel according to embodiments of the present specification. FIG. 3 is a cross-sectional view of the display area of a display panel according to embodiments of the present specification. FIG. 4 is a drawing showing a display area, a bending area, and a pad area in a display panel according to embodiments of the present specification. FIG. 5 is a cross-sectional view taken along I-I' of FIG. 4 of a touch display device according to embodiments of the present specification. FIG. 6 is a drawing showing the appearance of waviness occurring in a touch display device according to the embodiments of the present specification. FIG. 7 is another cross-sectional view taken along I-I' of FIG. 4 of a touch display device according to embodiments of the present specification. FIG. 8 is a cross-sectional view taken along II-II' of FIG. 4 of a touch display device according to embodiments of the present specification. FIG. 9 is a simplified drawing of a touch display device further including an optical electronic device. Specific details for implementing the invention
[0009] Hereinafter, some embodiments of the present disclosure will be described in detail with reference to the exemplary drawings. In assigning reference numerals to the components of each drawing, the same components may have the same reference numeral as much as possible, even if they are shown in different drawings. Furthermore, in describing the present disclosure, if it is determined that a detailed description of related known components or functions may obscure the essence of the present disclosure, such detailed description may be omitted. Where terms such as "comprising," "having," or "consisting of" are used in this specification, other parts may be added unless "only" is used. Where a component is expressed in the singular, it may include a plural unless there is a special explicit description otherwise.
[0010] Additionally, terms such as first, second, A, B, (a), (b), etc., may be used to describe the components of the present disclosure. These terms are used merely to distinguish the components from other components, and the nature, order, sequence, or number of the components are not limited by such terms.
[0011] In describing the positional relationship of components, where it is stated that two or more components are "connected," "combined," or "joined," it should be understood that while the two or more components may be directly "connected," "combined," or "joined," they may also be "connected," "combined," or "joined" with other components "intervened." Here, the other components may be included in one or more of the two or more components that are "connected," "combined," or "joined" with one another.
[0012] In describing the temporal flow relationship regarding components, methods of operation, or methods of production, for example, when the temporal or sequential relationship is described using "after," "following," "next," or "before," it may include cases where the relationship is not continuous unless "immediately" or "directly" is used.
[0013] Meanwhile, where numerical values or corresponding information regarding a component (e.g., levels, etc.) are mentioned, even without separate explicit notation, the numerical values or corresponding information may be interpreted as including a range of error that may occur due to various factors (e.g., process factors, internal or external shocks, noise, etc.).
[0014] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the attached drawings.
[0015] FIG. 1 is a system configuration diagram of a touch display device (100) according to embodiments of the present specification.
[0016] Referring to FIG. 1, the touch display device (100) may include a display panel (110) and a display driving circuit as components for displaying images.
[0017] The display driving circuit is a circuit for driving a display panel (110) and may include a data driving circuit (120), a gate driving circuit (130), and a display controller (140), etc.
[0018] The display panel (110) may include a display area (AA) where an image is displayed and a non-display area (NA) where an image is not displayed. The non-display area (NA) may be an outer area of the display area (AA) and is also referred to as a bezel area. All or part of the non-display area (NA) may be an area visible from the front of the touch display device (100), or it may be a bent area that is not visible from the front of the touch display device (100).
[0019] The display panel (110) may include a substrate (SUB) and a plurality of subpixels (SP) disposed on the substrate (SUB). Additionally, the display panel (110) may further include various types of signal lines to drive the plurality of subpixels (SP).
[0020] The touch display device (100) according to the embodiments of the present specification may be a liquid crystal display device, etc., or the display panel (110) may be a self-emitting display device. If the touch display device (100) according to the embodiments of the present specification is a self-emitting display device, each of the plurality of subpixels (SP) may include a light-emitting element.
[0021] For example, the touch display device (100) according to the embodiments of the present specification may be an organic light-emitting display device in which the light-emitting element is implemented as an organic light-emitting diode (OLED). As another example, the touch display device (100) according to the embodiments of the present specification may be an inorganic light-emitting display device in which the light-emitting element is implemented as an inorganic-based light-emitting diode. As yet another example, the touch display device (100) according to the embodiments of the present specification may be a quantum dot display device in which the light-emitting element is implemented as a quantum dot, which is a semiconductor crystal that emits light on its own.
[0022] Depending on the type of touch display device (100), the structure of each of the multiple subpixels (SP) may vary. For example, if the touch display device (100) is a self-emissive display device in which the subpixels (SP) emit light themselves, each subpixel (SP) may include a light-emitting element that emits light itself, one or more transistors, and one or more capacitors.
[0023] For example, various types of signal lines may include a number of data lines (DL) that transmit data signals (also called data voltages or image signals) and a number of gate lines (GL) that transmit gate signals (also called scan signals).
[0024] A plurality of data lines (DL) and a plurality of gate lines (GL) may intersect each other. Each of the plurality of data lines (DL) may be arranged while extending in a first direction. Each of the plurality of gate lines (GL) may be arranged while extending in a second direction.
[0025] Here, the first direction may be the column direction and the second direction may be the row direction. The first direction may be the row direction and the second direction may be the column direction.
[0026] The data driving circuit (120) is a circuit configured to drive a plurality of data lines (DL) and can output data signals to a plurality of data lines (DL). The gate driving circuit (130) is a circuit configured to drive a plurality of gate lines (GL) and can output gate signals to a plurality of gate lines (GL).
[0027] The display controller (140) may be a device configured to control the data driving circuit (120) and the gate driving circuit (130). The display controller (140) can control the driving timing for a plurality of data lines (DL) and the driving timing for a plurality of gate lines (GL).
[0028] The display controller (140) can supply a data driving control signal (DCS) to the data driving circuit (120) to control the data driving circuit (120). The display controller (140) can supply a gate driving circuit control signal (GCS) to the gate driving circuit (130) to control the gate driving circuit (130).
[0029] The display controller (140) receives input image data from the host system (150) and can supply image data (Data) to the data driving circuit (120) based on the input image data.
[0030] The data driving circuit (120) can supply data signals to a plurality of data lines (DL) according to the driving timing control of the display controller (140).
[0031] The data driving circuit (120) receives digital image data (Data) from the display controller (140) and converts the received image data (Data) into analog data signals and outputs them to multiple data lines (DL).
[0032] The gate driving circuit (130) can supply gate signals to a plurality of gate lines (GL) according to the timing control of the display controller (140). The gate driving circuit (130) receives a first gate voltage corresponding to a turn-on level voltage and a second gate voltage corresponding to a turn-off level voltage along with various gate driving circuit control signals (GCS), generates gate signals, and can supply the generated gate signals to a plurality of gate lines (GL).
[0033] For example, the data driving circuit (120) may be connected to the display panel (110) by a Tape Automated Bonding (TAB) method, connected to the bonding pad of the display panel (110) by a Chip On Glass (COG) or Chip On Panel (COP) method, or implemented and connected to the display panel (110) by a Chip On Film (COF) method.
[0034] The gate driving circuit (130) may be connected to the display panel (110) by a tape automatic bonding (TAB) method, connected to the bonding pads of the display panel (110) by a chip-on-glass (COG) or chip-on-panel (COP) method, or connected to the display panel (110) according to a chip-on-film (COF) method. Alternatively, the gate driving circuit (130) may be formed in a non-display area (NA) of the display panel (110) in a gate-in-panel (GIP) type. The gate driving circuit (130) may be placed on a substrate (SUB) or connected to the substrate (SUB). That is, if the gate driving circuit (130) is of the gate-in-panel (GIP) type, it may be placed in the non-display area (NA) of the substrate (SUB). If the gate driving circuit (130) is of the chip-on-glass (COG) type, chip-on-film (COF) type, etc., it may be connected to the substrate.
[0035] Meanwhile, at least one of the data driving circuit (120) and the gate driving circuit (130) may be placed in the display area (AA) of the display panel (110). For example, at least one of the data driving circuit (120) and the gate driving circuit (130) may be placed so as not to overlap with the subpixels (SP), or may be placed so as to partially or entirely overlap with the subpixels (SP).
[0036] The data driving circuit (120) may be connected to one side (e.g., the upper side or the lower side) of the display panel (110). Depending on the driving method, panel design method, etc., the data driving circuit (120) may be connected to both sides (e.g., the upper side and the lower side) of the display panel (110), or to two or more sides of the four sides of the display panel (110).
[0037] The gate driving circuit (130) may be connected to one side (e.g., left or right) of the display panel (110). Depending on the driving method, panel design method, etc., the gate driving circuit (130) may be connected to both sides (e.g., left and right) of the display panel (110), or to two or more sides of the four sides of the display panel (110).
[0038] The display controller (140) may be implemented as a separate component from the data driving circuit (120), or it may be implemented as an integrated circuit integrated with the data driving circuit (120).
[0039] The display controller (140) may be a timing controller used in conventional display technology, or a control device capable of performing other control functions including a timing controller, or a control device different from a timing controller, or a circuit within a control device. The display controller (140) may be implemented as various circuits or electronic components such as an IC (Integrated Circuit), FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or processor.
[0040] The display controller (140) can be electrically connected to the data driving circuit (120) and the gate driving circuit (130) through a printed circuit board (PCB), a flexible printed circuit board (FPCB), etc.
[0041] The display controller (140) can transmit and receive signals to and from the data driving circuit (120) according to one or more predetermined interfaces. Here, for example, the interfaces may include an LVDS (Low Voltage Differential Signaling) interface, an EPI interface, an SPI (Serial Peripheral Interface), etc.
[0042] A touch display device (100) according to the embodiments of the present specification may include a touch sensor and a touch sensing circuit that senses the touch sensor to detect whether a touch has occurred by a touch object such as a finger or a pen, or detects a touch location, in order to provide not only an image display function but also a touch sensing function.
[0043] The touch sensing circuit may include a touch driving circuit (160) that drives and senses a touch sensor to generate and output touch sensing data, and a touch controller (170) that can detect the occurrence of a touch or detect a touch location using the touch sensing data.
[0044] The touch sensor may include a plurality of touch electrodes. The touch sensor may further include a plurality of touch lines for electrically connecting the plurality of touch electrodes and the touch driving circuit (160).
[0045] The touch sensor may exist in the form of a touch panel outside the display panel (110) or may exist inside the display panel (110).
[0046] When a touch sensor exists outside the display panel (110) in the form of a panel, the touch sensor is referred to as an external type. When the touch sensor is external, the touch panel and the display panel (110) may be manufactured separately and combined during the assembly process. The external touch panel may include a substrate for the touch panel and a plurality of touch electrodes on the substrate for the touch panel.
[0047] When a touch sensor is present inside a display panel (110), the touch sensor may be formed on a substrate (SUB) along with signal lines and electrodes related to display driving during the manufacturing process of the display panel (110).
[0048] The touch driving circuit (160) can supply a touch driving signal to at least one of a plurality of touch electrodes and sense at least one of the plurality of touch electrodes to generate touch sensing data.
[0049] The touch sensing circuit can perform touch sensing using a self-capacitance sensing method or a mutual-capacitance sensing method.
[0050] When a touch sensing circuit performs touch sensing using a self-capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between each touch electrode and a touch object (e.g., finger, pen, etc.).
[0051] According to the self-capacitance sensing method, each of the plurality of touch electrodes can act as both a driving touch electrode and a sensing touch electrode. The touch driving circuit (160) can drive all or part of the plurality of touch electrodes and sense all or part of the plurality of touch electrodes.
[0052] When a touch sensing circuit performs touch sensing using a mutual-capacitance sensing method, the touch sensing circuit can perform touch sensing based on the capacitance between touch electrodes.
[0053] According to the mutual-capacitance sensing method, multiple touch electrodes are divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit (160) can drive the driving touch electrodes and sense the sensing touch electrodes.
[0054] The touch driving circuit (160) and touch controller (170) included in the touch sensing circuit may be implemented as separate devices or as a single device. Additionally, the touch driving circuit (160) and the data driving circuit (120) may be implemented as separate devices or as a single device.
[0055] The touch display device (100) may further include a power supply circuit that supplies various power to a display driving circuit and / or a touch sensing circuit.
[0056] The touch display device (100) according to the embodiments of the present specification may be a mobile terminal such as a smartphone or tablet, or a monitor or television (TV) of various sizes, but is not limited thereto, and may be a display device of various types and sizes capable of displaying information or images.
[0057] FIG. 2 is an equivalent circuit of a subpixel (SP) in a display panel (110) according to embodiments of the present specification.
[0058] Referring to FIG. 2, each of the subpixels (SP) placed in the display area (AA) of the display panel (110) may include a light-emitting element (ED), a driving transistor (DRT) for driving the light-emitting element (ED), a scan transistor (SCT) for transmitting a data voltage (Vdata) to a first node (N1) of the driving transistor (DRT), and a storage capacitor (Cst) for maintaining a constant voltage for one frame.
[0059] The driving transistor (DRT) may include a first node (N1) to which a data voltage (Vdata) is applied, a second node (N2) electrically connected to a light-emitting element (ED), and a third node (N3) to which a high potential common voltage (ELVDD) is applied from a driving voltage line (DVL). In the driving transistor (DRT), the first node (N1) is a gate node, the second node (N2) may be either a source node or a drain node, and the third node (N3) may be the other of the source node or drain node.
[0060] The light-emitting element (ED) may include an anode electrode (AE), a light-emitting layer (EL), and a cathode electrode (CE). The anode electrode (AE) may be a pixel electrode placed in each subpixel (SP) and may be electrically connected to a second node (N2) of a driving transistor (DRT) of each subpixel (SP). The cathode electrode (CE) may be a common electrode placed in common across a plurality of subpixels (SP) and may have a low potential common voltage (ELVSS) applied to it.
[0061] For example, the anode electrode (AE) may be a pixel electrode and the cathode electrode (CE) may be a common electrode. Conversely, the anode electrode (AE) may be a common electrode and the cathode electrode (CE) may be a pixel electrode. For convenience of explanation, it is assumed below that the anode electrode (AE) is a pixel electrode and the cathode electrode (CE) is a common electrode.
[0062] For example, the light-emitting element (ED) may be an organic light-emitting diode (OLED), an inorganic light-emitting diode, or a quantum dot light-emitting element. In this case, if the light-emitting element (ED) is an organic light-emitting diode, the light-emitting layer (EL) in the light-emitting element (ED) may include an organic light-emitting layer containing organic material.
[0063] The scan transistor (SCT) is turned on and off by a scan signal (SCAN), which is a gate signal applied through the gate line (GL). The scan transistor (SCT) can switch the electrical connection between the first node (N1) of the driving transistor (DRT) and the data line (DL).
[0064] The storage capacitor (Cst) can be electrically connected between the first node (N1) and the second node (N2) of the driving transistor (DRT).
[0065] Each subpixel (SP) may have a 2T (Transistor) 1C (Capacitor) structure including two transistors (DRT, SCT) and one capacitor (Cst), as shown in FIG. 2, and may additionally include one or more transistors or one or more capacitors.
[0066] The storage capacitor (Cst) may be an external capacitor intentionally designed outside the driving transistor (DRT), rather than a parasitic capacitor (e.g., Cgs, Cgd) which is an internal capacitor that may exist between the first node (N1) and the second node (N2) of the driving transistor (DRT).
[0067] The driving transistor (DRT) and the scan transistor (SCT) can each be an n-type transistor or a p-type transistor.
[0068] Since circuit elements (especially light-emitting elements (ED)) within each subpixel (SP) are vulnerable to external moisture or oxygen, an encapsulation layer (ENCAP) can be placed on the display panel (110) to prevent external moisture or oxygen from penetrating into the circuit elements (especially light-emitting elements (ED)). The encapsulation layer (ENCAP) can be placed in a manner that covers the light-emitting elements (ED).
[0069] FIG. 3 is a cross-sectional view of a display area (AA) of a display panel (110) according to embodiments of the present specification.
[0070] Referring to FIG. 3, the substrate (SUB) may include a first substrate (SUB1), an interlayer insulating film (IPD), and a second substrate (SUB2). The interlayer insulating film (IPD) may be located between the first substrate (SUB1) and the second substrate (SUB2). By configuring the substrate (SUB) with the first substrate (SUB1), the interlayer insulating film (IPD), and the second substrate (SUB2), moisture penetration can be prevented. For example, the first substrate (SUB1) and the second substrate (SUB2) may be polyimide (PI) substrates. The first substrate (SUB1) may be referred to as a primary PI substrate, and the second substrate (SUB2) may be referred to as a secondary PI substrate.
[0071] Referring to FIG. 3, on the substrate (SUB), various patterns for forming transistors such as a driving transistor (DRT), various patterns (ACT, SD1, GATE), various insulating films (MBUF, ABUF1, ABUF2, GI, ILD1, ILD2, PAS0), and various metal patterns (TM, GM, ML1, ML2) may be positioned.
[0072] Referring to FIG. 3, a multi-buffer layer (MBUF) may be disposed on a second substrate (SUB2), and a first active buffer layer (ABUF1) may be disposed on the multi-buffer layer (MBUF).
[0073] A first metal layer (ML1) and a second metal layer (ML2) may be disposed on a first active buffer layer (ABUF1). Here, the first metal layer (ML1) and the second metal layer (ML2) may be light shield layers (LS) that shield light.
[0074] A second active buffer layer (ABUF2) may be disposed on the first metal layer (ML1) and the second metal layer (ML2).
[0075] A gate insulating film (GI) can be placed over the active layer (ACT).
[0076] The gate electrode (GATE) of the driving transistor (DRT) can be placed on the gate insulating film (GI).
[0077] A first interlayer insulating film (ILD1) may be disposed covering a gate electrode (GATE) and a gate material layer (GM). A metal pattern (TM) may be disposed on the first interlayer insulating film (ILD1). The metal pattern (TM) may be located at a different location from the formation site of the driving transistor (DRT). A second interlayer insulating film (ILD2) may be disposed covering the metal pattern (TM) on the first interlayer insulating film (ILD1).
[0078] Two first source-drain electrode material patterns (SD1) may be disposed on the second interlayer insulating film (ILD2). One of the two first source-drain electrode material patterns (SD1) is the source node of the driving transistor (DRT), and the other is the drain node of the driving transistor (DRT).
[0079] Two first source-drain electrode material patterns (SD1) can be electrically connected to one side and the other side of the active layer (ACT) through contact holes of the second interlayer insulating film (ILD2), the first interlayer insulating film (ILD1), and the gate insulating film (GI).
[0080] The portion overlapping with the gate electrode (GATE) in the active layer (ACT) is the channel region. One of the two first source-drain electrode material patterns (SD1) can be connected to one side of the channel region in the active layer (ACT), and the other of the two first source-drain electrode material patterns (SD1) can be connected to the other side of the channel region in the active layer (ACT).
[0081] A passivation layer (PAS0) is disposed over two first source-drain electrode material patterns (SD1). A planarization layer (PLN) may be disposed on the passivation layer (PAS0). The planarization layer (PLN) may include a first planarization layer (PLN1) and a second planarization layer (PLN2). This planarization layer (PLN) may be an organic insulating film layer capable of performing a planarization function.
[0082] A first flattening layer (PLN1) can be disposed on a passivation layer (PAS0).
[0083] A second source-drain electrode material pattern (SD2) may be disposed on the first planarization layer (PLN1). The second source-drain electrode material pattern (SD2) may be connected to one of the two first source-drain electrode material patterns (SD1) (corresponding to the second node (N2) of the driving transistor (DRT) in the subpixel (SP) of FIG. 2) through a contact hole of the first planarization layer (PLN1).
[0084] The second planarization layer (PLN2) can be disposed over the second source-drain electrode material pattern (SD2). A light-emitting element (ED) can be disposed on the second planarization layer (PLN2).
[0085] Looking at the stacked structure of the light-emitting device (ED), an anode electrode (AE) can be disposed on the second planarization layer (PLN2). The anode electrode (AE) can be electrically connected to the second source-drain electrode material pattern (SD2) through the contact hole of the second planarization layer (PLN2).
[0086] A bank can be positioned to cover a portion of the anode electrode (AE). A portion of the bank corresponding to the light-emitting region (EA) of the subpixel (SP) can be left open.
[0087] A portion of the anode electrode (AE) may be exposed to an opening (open portion) of the bank. The light-emitting layer (EL) may be located on the side of the bank and at an opening (open portion) of the bank. All or part of the light-emitting layer (EL) may be located between adjacent banks.
[0088] At the opening of the bank, the light-emitting layer (EL) can come into contact with the anode electrode (AE). A cathode electrode (CE) can be placed on the light-emitting layer (EL).
[0089] A light-emitting device (ED) can be formed by an anode electrode (AE), a light-emitting layer (EL), and a cathode electrode (CE). The light-emitting layer (EL) may include an organic film.
[0090] An encapsulation layer (ENCAP) can be disposed on the aforementioned light-emitting element (ED).
[0091] The encapsulation layer (ENCAP) may have a single-layer structure or a multi-layer structure. For example, as shown in FIG. 3, the encapsulation layer (ENCAP) may include a first encapsulation layer (PAS1), a second encapsulation layer (PCL1), and a third encapsulation layer (PAS2).
[0092] For example, the first encapsulation layer (PAS1) and the third encapsulation layer (PAS2) may be inorganic membranes, and the second encapsulation layer (PCL1) may be an organic membrane. Among the first encapsulation layer (PAS1), the second encapsulation layer (PCL1), and the third encapsulation layer (PAS2), the second encapsulation layer (PCL1), which is an organic membrane, is the thickest and can serve as a leveling layer.
[0093] The first encapsulation layer (PAS1) is placed on the cathode electrode (CE) and can be positioned closest to the light-emitting element (ED). The first encapsulation layer (PAS1) can be formed from an inorganic insulating material capable of low-temperature deposition. For example, the first encapsulation layer (PAS1) may be silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3). Since the first encapsulation layer (PAS1) is deposited in a low-temperature atmosphere, during the deposition process, the first encapsulation layer (PAS1) can prevent damage to the light-emitting layer (EL), which contains organic materials susceptible to high-temperature atmospheres.
[0094] The second encapsulation layer (PCL1) may be formed with a smaller area than the first encapsulation layer (PAS1). In this case, the second encapsulation layer (PCL1) may be formed to expose both ends of the first encapsulation layer (PAS1). The second encapsulation layer (PCL1) acts as a buffer to relieve stress between each layer due to bending of the display device (100) and may also serve to enhance flattening performance. For example, the second encapsulation layer (PCL1) may be acrylic resin, epoxy resin, polyimide, polyethylene, or silicon oxycarbon (SiOC), and may be formed from an organic insulating material. For example, the second encapsulation layer (PCL1) may be formed using an inkjet method. The second encapsulation layer (PCL1) is also called a particle cover layer (PCL) and has excellent flattening capabilities. Therefore, the second encapsulation layer (PCL1) is suitable for compensating for the step difference of the lower layer and providing a flattening function.
[0095] A third inorganic encapsulation layer (PAS2) may be formed on a substrate (SUB) on which a second encapsulation layer (PCL1) is formed, so as to cover the upper surface and side surface of the second encapsulation layer (PCL1) and the first encapsulation layer (PAS1), respectively. The third encapsulation layer (PAS2) can minimize or block external moisture or oxygen from penetrating into the first inorganic encapsulation layer (PAS1) and the second encapsulation layer (PCL1). For example, the third encapsulation layer (PAS2) may be formed from an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon nitride oxide (SiON), or aluminum oxide (Al2O3).
[0096] Referring to FIG. 3, a touch sensor (TS) can be disposed on an encapsulation layer (ENCAP). The structure of the touch sensor (TS) is described in detail as follows.
[0097] A touch buffer film (T-BUF) can be disposed on the encapsulation layer (ENCAP). A touch sensor (TS) can be disposed on the touch buffer film (T-BUF).
[0098] The touch sensor (TS) may include a touch sensor metal (TSM) and a bridge metal (BRG) located on different layers.
[0099] A touch interlayer insulating film (T-ILD) may be placed between the touch sensor metal (TSM) and the bridge metal (BRG).
[0100] For example, touch sensor metals (TSMs) may include a first touch sensor metal (TSM), a second touch sensor metal (TSM), and a third touch sensor metal (TSM) that are arranged adjacent to each other. When a third touch sensor metal (TSM) is located between the first touch sensor metal (TSM) and the second touch sensor metal (TSM), and the first touch sensor metal (TSM) and the second touch sensor metal (TSM) need to be electrically connected to each other, the first touch sensor metal (TSM) and the second touch sensor metal (TSM) may be electrically connected to each other through a bridge metal (BRG) located in another layer. The bridge metal (BRG) may be insulated from the third touch sensor metal (TSM) by a touch interlayer insulating film (T-ILD).
[0101] When a touch sensor (TS) is formed on a display panel (110), a chemical solution (such as a developer or etching solution) used in the process may flow into the interior, or moisture may flow in from the outside. By placing the touch sensor (TS) on a touch buffer film (T-BUF), it is possible to prevent the chemical solution or moisture from penetrating into the light-emitting layer (EL) containing organic material during the manufacturing process of the touch sensor (TS). Accordingly, the touch buffer film (T-BUF) can prevent damage to the light-emitting layer (EL), which is vulnerable to the chemical solution or moisture.
[0102] To prevent damage to the light-emitting layer (EL) containing organic material that is susceptible to high temperatures, the touch buffer film (T-BUF) can be formed at a low temperature (e.g., 100°C) or lower and can be formed from an organic insulating material having a low dielectric constant of 1 to 3. For example, the touch buffer film (T-BUF) can be formed from an acrylic-based or siloxane-based material. As the touch display device (100) bends, the encapsulation layer (ENCAP) may be damaged and the touch sensor metal located on the touch buffer film (T-BUF) may break. Even if the touch display device (100) bends, the touch buffer film (T-BUF), which has flattening performance as an organic insulating material, can prevent damage to the encapsulation layer (ENCAP) and / or breakage of the metal (TSM, BRG) constituting the touch sensor (TS).
[0103] Meanwhile, referring to FIG. 3, a protective layer (PAC) may be disposed to cover the touch sensor (TS). The protective layer (PAC) may be an organic insulating film. Such an organic insulating film may be, for example, a material such as the planarization layer (PLN) described above. Such an organic insulating film may be formed of a material different from the second encapsulation layer (PCL2). For example, such a protective layer (PAC) may include a thermosetting resin.
[0104] FIG. 4 is a drawing showing a display area (AA), a bending area (BA; Bending Area), and a pad area (PA; Pad Area) in a display panel (110) according to embodiments of the present specification.
[0105] Referring to FIG. 4, a display panel (110) according to embodiments of the present specification includes a display area (AA) and a non-display area around the display area (AA).
[0106] The non-display area may include a bezel area, a bending area (BA), and a pad area (PA).
[0107] First, a plurality of subpixels for displaying an image are located in the display area (AA). Additionally, one or more signal lines (SL) are placed in the display area (AA).
[0108] These signal lines (SL) may include a data line that supplies a data signal to a subpixel and a gate signal that supplies a gate signal to a subpixel.
[0109] Meanwhile, the signal line (SL) illustrated in FIG. 4 may include a touch sensor embedded in the display panel (110). For example, a touch driving signal output from a touch driving circuit may be input to the signal line (SL).
[0110] In the following description, the signal line (SL) is assumed to be a data line that supplies data signals to a subpixel, but is not limited thereto.
[0111] Referring to FIG. 4, a bezel area is located around the display area (AA). For example, a top bezel may be located on the upper side of the display area (AA), a left bezel may be located on the left side of the display area (AA), a right bezel may be located on the right side of the display area (AA), and a bottom bezel may be located on the lower side of the display area (AA).
[0112] In the bezel area, the gate driving circuit may be arranged in a gate-in-panel (GIP) type, or the gate driving circuit may be arranged in a chip-on-glass (COG) type, chip-on-film (COF) type, etc.
[0113] In the bezel area, a data driving circuit may be connected to the display panel (110) via tape automatic bonding (TAB). Alternatively, in the pad portion (PAD) of the non-display area, the data driving circuit may be connected to the display panel (110) via chip-on-glass (COG) or chip-on-panel (COP) methods. Alternatively, the data driving circuit may be implemented via chip-on-film (COF) and connected to the display panel (110) in the bezel area.
[0114] In FIG. 4, the bending area (BA) and the pad area (PA) are shown separately from the bottom bezel to distinguish them. However, the bending area (BA) and the pad area (PA) may be included within the bottom bezel. In this specification, for convenience of explanation, the bottom bezel and the bending area (BA) are described separately, but the touch display device according to the embodiments of this specification is not limited thereto.
[0115] Referring to FIG. 4, a bending area (BA) and a pad area (PA) may be located below the bottom bezel.
[0116] The substrate constituting the display panel (110) is bent at the bending area (BA), so that the pad area (PA) is located on the back side of the display area (AA).
[0117] In the bending area (BA), a plurality of link lines (LL) are arranged to electrically connect the pad portion (PAD) and the signal line (SL).
[0118] A plurality of link lines (LL) are arranged in a direction perpendicular to the bending axis with respect to the bending axis in the bending area (BA). A plurality of link lines (LL) may be arranged in a diagonal direction inclined from the vertical direction at least on one side of the upper and lower sides of the bending area (BA).
[0119] The pad portion (PAD) may include at least one pin for transmitting a signal input from the outside to the signal line (SL) or transmitting a signal input from the signal line (SL) to the outside.
[0120] For example, if the signal line (SL) is a data line, the pad section (PAD) is connected to the data driving circuit, and the pad section is electrically connected to the data lines of the display area (AA) through a plurality of link lines (LL).
[0121] When the data driving circuit is located in a chip-on-panel (COP) manner, the data driving circuit can be located on the pad (PAD).
[0122] FIG. 5 is a cross-sectional view taken along I-I' of FIG. 4 of a touch display device (100) according to embodiments of the present specification.
[0123] Referring to FIG. 5, on the substrate (SUB), inorganic insulating film layers such as a multi-buffer layer (MBUF) and an interlayer insulating film (ILD) are simply represented as a single layer. The aforementioned active buffer layer (ABUF) may be further included in this layer.
[0124] This inorganic insulating layer is located on at least a portion of the bottom bezel. The inorganic insulating layer may not overlap with the bending region (BA). Due to the characteristics of the inorganic insulating layer, if it is located overlapping with the bending region (BA), the inorganic insulating layer may be subjected to stress, and there is a risk that microcracks may occur in the inorganic insulating layer. Consequently, moisture may enter the inorganic insulating layer, and the entered moisture may permeate to the display region (AA). Since this may result in poor display quality in the display region (AA), it may be desirable for the inorganic insulating layer to be positioned so as not to overlap with the bending region (BA).
[0125] Meanwhile, an inner dam (DMI) may be located in the bottom bezel area. This inner dam (DMI) may include one or more dam structures.
[0126] The dam structure constituting the inner dam (DMI) may be composed of a triple-layer structure including, for example, a leveling layer (PLN), a bank, and a spacer (SPC).
[0127] The inner dam (DMI) can be configured to prevent the second encapsulation layer (PCL1) located in the marked area (AA) from overflowing to the bending area (BA).
[0128] Referring to FIG. 5, the first sealing layer (PAS1) and the third sealing layer (PAS2) may extend from the marked area (AA) and be located on the dam structure of the inner dam (DMI).
[0129] On the second encapsulation layer (PAS2), a touch sensor (TS) extends from the display area (AA) to the area beyond the inner dam (DMI). The touch sensor (TS) can be connected to a link line (LL) through a contact hole. The contact hole located in the area where the touch sensor (TS) and the link line (LL) are connected may be a contact hole formed in the second flattening layer (PLN2).
[0130] A protective layer (PAC) is located on the touch sensor (TS), and this protective layer (PAC) may be located in at least a portion of the display area (AA) and the bezel area.
[0131] Referring to FIG. 5, the protective layer (PAC) located on the second encapsulation layer (PCL1) has a step as it extends from the display area (AA) to the bottom bezel. This step may be a problem that occurs because the thick second encapsulation layer (PCL2) located below the protective layer (PAC) is not positioned beyond the inner dam (DMI).
[0132] According to this, the protective layer (PAC) may have an inclined surface (560) in the display area (AA) adjacent to the bezel area (e.g., bottom bezel).
[0133] Meanwhile, referring to FIG. 5, a cover glass (510) may be positioned on the front of the touch display device. On the back of the cover glass (510), a light-blocking layer (520) surrounding the periphery of the display area (AA) is positioned.
[0134] This light-blocking layer (520) may be configured to prevent light generated at the edge of the display area (AA) from leaking out toward the bezel. Accordingly, the light-blocking layer (520) may be placed on the back surface of the cover glass (510) along the edge of the display area (AA). This light-blocking layer (520) is also referred to as the “cover glass black matrix.” One end of the light-blocking layer (520) may coincide with the end of the cover glass (510), but one end of the light-blocking layer may be located inward from the end of the cover glass (510).
[0135] A polarizing plate (540) may be further disposed on the back surface of the cover glass (510). The polarizing plate (540) may be attached to the cover glass (510) by a transparent adhesive member (530). The polarizing plate (540) may be provided for the purpose of increasing the visibility of the touch display device.
[0136] For example, various patterns and various metal patterns arranged to form a transistor on a substrate (SUB) can reflect light incident from the outside. Accordingly, light incident from the outside of the touch display device is reflected, and the reflected light can be seen by the user using the touch display device. Consequently, the visibility of the touch display device may be reduced.
[0137] A touch display device according to the embodiments of the present specification may further include a polarizing plate (540) for blocking reflected light caused by light incident from the outside.
[0138] Meanwhile, the polarizing plate (540) may be placed not only on the display area (AA) but also on at least a portion of the non-display area, including the bezel area. Accordingly, at least a portion of the polarizing plate (540) may be placed overlapping with the light-blocking layer (520).
[0139] Accordingly, the polarizing plate (540) may include an inclined surface (542) located in an area corresponding to the inclined surface (522) of the light-blocking layer (520).
[0140] In some cases, the inclined surface (542) of the polarizer (540) may be located in an area that overlaps with the inclined surface (560) of the protective layer (PAC). In this case, the inclined surface (542) of the polarizer (540) may be positioned so as to be placed on the inclined surface (560) of the protective layer (PAC), and thus the inclined surface (542) of the polarizer (540) may have a larger angle of inclination.
[0141] Accordingly, there is a problem where the display quality may deteriorate near the border of the display area (AA).
[0142] This problem is the same even if a transparent adhesive member (e.g., 530) is further placed on the back surface of the polarizer (540).
[0143] FIG. 6 is a drawing showing the appearance of waviness occurring in a touch display device according to the embodiments of the present specification.
[0144] Referring to FIG. 6, when the inclined surface (542) of the polarizing plate and the inclined surface (560) of the protective layer are located in an overlapping area, a defect may be visible to the user along the inclined surface (542) of the polarizing plate.
[0145] For example, as shown in FIG. 6, when the display panel has a notch, a wavy band shape may be visible to the user of the touch display device due to bending of the polarizer or sinking of the polarizer to the back at the boundary between the display area (AA) and the non-display area (e.g., the top bezel area). This appearance defect is also called a waviness defect.
[0146] Therefore, there is a need for measures to improve waveness defects caused by the bending of polarizers.
[0147] FIG. 7 is another cross-sectional view taken along I-I' of FIG. 4 of a touch display device according to embodiments of the present specification.
[0148] Referring to FIG. 7, a touch display device according to embodiments of the present specification further includes a flattening layer (PCL2) located on a touch sensor (TS).
[0149] This flattening layer (PCL2) may be located on the protective layer (PAC) in at least a portion of the display area (AA) and the bottom bezel (Bottom Bezel).
[0150] A touch display device according to the embodiments of the present specification may include an outer dam (DMO) configured to prevent overflow of the flattening layer (PCL2).
[0151] These outer dams (DMOs) include one or more dam structures.
[0152] The outer dam (DMO) may be located in an area overlapping with the shading layer (520). One or more dam structures may be located outside the slope (522) of the shading layer (520).
[0153] The outer dam (DMO) may be located in an area overlapping with the polarizer (540). One or more dam structures may be located outside the inclined surface (542) of the polarizer (540).
[0154] One or more dam structures constituting the outer dam (DMO) may each be a single-layer structure or a double-layer or higher structure.
[0155] For example, referring to FIG. 6, the dam structure may be a single-layer structure consisting of a protective layer (PAC). Alternatively, the dam structure may consist only of a spacer (SPC). Alternatively, the dam structure may consist of a single layer of an organic insulating film.
[0156] In addition, the dam structure may have a double-layer structure. For example, as with the structure of the inner dam (DMI), it may have a double-layer structure of a bank and a spacer (SPC), or a double-layer structure of a spacer (SPC) and a protective layer (PAC). Alternatively, it may have a triple-layer structure of a bank, a spacer (SPC), and a protective layer (PAC).
[0157] If the outer dam (DMO) includes two or more dam structures, one of the two or more dam structures may be a single-layer dam structure and the other may be a double-layer or higher dam structure.
[0158] Meanwhile, the outer dam (DMO) may include a dam structure formed by laminating at least one insulating film in at least a portion of the non-displayed area. For example, as shown in FIG. 7, the outer dam (DMO) may include a dam structure formed by laminating a protective layer (PAC).
[0159] As another example, the outer dam (DMO) may include a dam structure formed by etching and removing an insulating film stacked in at least a portion of the non-displayed area. According to this, by trapping at least a portion of the planarization layer (PCL2) in the area where the insulating film has been removed, the insulating film that was not removed can function as a dam structure.
[0160] According to the above, the flattening layer (PCL2) can be prevented from overflowing by a peak formed by stacking insulating layers, or by a valley formed by removing insulating layers.
[0161] Referring to FIG. 6, the outer dam (DMO) can be located on the inner side of the bending region (BA). Accordingly, it is possible to prevent the flattening layer (PCL2) from being located up to the aforementioned pad portion (PAD).
[0162] The flattening layer (PCL2) can be positioned to cover the entire display area (AA). The flattening layer (PCL2) can be located on at least a portion of the bezel area.
[0163] The planarization layer (PCL2) may be acrylic resin, epoxy resin, polyimide, polyethylene, or silicon oxycarbon (SiOC), and may be formed from an organic insulating material. For example, the planarization layer (PCL2) may be formed using an inkjet method.
[0164] The flattening layer (PCL2) may be formed using a UV curing method. In this case, the flattening layer (PCL2) may include a photoinitiator that initiates a polymerization reaction upon receiving ultraviolet light.
[0165] The thickness of the flattening layer (PCL2) is greater than the thickness of the protective layer (PAC) located on the touch sensor (TS). For example, the flattening layer (PCL2) may be required to have a thickness sufficient to mitigate the bending phenomenon of the inclined surface (542) of the polarizer (540) in the bezel area. This thickness may be about 14 μm or more. Accordingly, in the area overlapping with the inclined surface (542) of the polarizer (540), the flattening layer (PCL2) can compensate for the step difference of the protective film (PAC) and flatten the area on the protective film (PAC). Accordingly, the polarizer (540) is placed on the area (710) flattened by the flattening layer (PCL2).
[0166] Accordingly, the bending problem of the polarizing plate (540) is alleviated, and the aforementioned waviness defect is greatly alleviated.
[0167] FIG. 8 is a cross-sectional view taken along II-II' of FIG. 4 of a touch display device according to embodiments of the present specification.
[0168] Referring to FIG. 8, a touch display device according to embodiments of the present specification includes an outer dam (DMO) located in the left bezel and / or right bezel area.
[0169] Referring to FIG. 8, an inner dam (DMI) configured to prevent overflow of the second encapsulation layer (PCL2) is located in the left bezel and / or right bezel regions. For the same reasons as described above, sinking may occur in the left bezel and right bezel regions due to the inclined surface (542) of the polarizer (540), and consequently, a waviness defect may occur.
[0170] A touch display device according to the embodiments of the present specification may further include an outer dam (DMO) located in a left bezel area and / or a right bezel area. The outer dam (DMO) may include one or more dam structures.
[0171] The outer dam (DMO) can prevent the flattening layer (PCL2) from crossing the outer dam (DMO) and touching the left end and / or right end of the substrate (SUB2).
[0172] Referring to FIG. 8, a touch line (TL) electrically connected to a touch sensor (TS) may be placed between the inner dam (DMI) and the outer dam (DMO). That is, the outer dam (DMO) may be placed outside the touch line (TL).
[0173] The outer dam (DMO) may include two or more dam structures. Each of the two or more dam structures may be formed as a single layer or as a double layer or more.
[0174] For example, referring to FIG. 8, any one of the two or more dam structures may have a triple-layer structure consisting of a leveling layer (PLN), a bank, and a protective layer (PAC). Another of the two or more dam structures may have a single-layer structure consisting of a protective layer (PAC).
[0175] Any one of the dam structures included in the outer dam (DMO) may come into contact with the substrate (SUB) in an area where the multi-buffer layer (MBUF), interlayer insulating film (ILD), etc. on the substrate (SUB) have been removed. In the area where the multi-buffer layer (MBUF), etc. on the substrate (SUB) has been removed, the planarization layer (PCL2) may come into contact with the substrate (SUB).
[0176] Accordingly, the touch display device according to the embodiments of the present specification can provide a touch display device with improved waviness defects that may occur in the edge region of the display area (AA).
[0177] FIG. 9 is a simplified drawing of a touch display device further including an optical electronic device (910).
[0178] Referring to FIG. 9, the touch display device according to the embodiments of the present specification may further include an optical electronic device (910). The optical electronic device (910) is a device that requires light reception. The optical electronic device (910) may be, for example, a camera, and the optical electronic device (910) may be a sensing sensor such as a proximity sensor or an illuminance sensor.
[0179] The optical electronic device (910) may be located in an area below the substrate (SUB) of the display panel. The optical electronic device (910) may receive light, for example, through a through-hole (TH) formed by removing at least a portion of the substrate (SUB). Since a subpixel cannot be located in the area where at least a portion of the substrate (SUB) has been removed, the area inside the through-hole (TH) may be a non-display area.
[0180] A structure in which a through-hole (TH) is located inside a display area (AA) and an optical electronic device (910) is superimposed below the through-hole (TH) is also called a HiAA (Hole in Active Area) structure.
[0181] According to this, a light-blocking layer (520) is located around the through-hole (TH). Therefore, the aforementioned waviness defect may also occur around the light-blocking layer.
[0182] To prevent such defects, a planarization layer (PCL2) is placed on the substrate (SUB).
[0183] After the flattening layer (PCL2) is placed on the substrate (SUB), a portion of the substrate (SUB) is removed along the trimming line to form a through-hole (TH). Accordingly, the flattening layer (PCL2) is removed from the through-hole (TH). According to this, an outer dam (DMO) may be located around the through-hole (TH), but even if the outer dam (DMO) is not located, the problem of the flattening layer (PCL2) encroaching into the through-hole (TH) may not occur.
[0184] However, a flattening layer (PCL2) is located in the area surrounding the through-hole (TH). Specifically, the flattening layer (PCL2) may be located in the area between the trimming line and the marking area (AA).
[0185] In that area, the thickness of the planarization layer (PCL2) may be thicker.
[0186] For example, if the thickness (ΔH2) of the planarization layer (PCL2) on the display area (AA) is about 14 μm, the thickness (ΔH1) of the planarization layer (PCL2) in the area surrounding the through-hole (TH) may be about 10 μm or more thick. That is, the thickness (ΔH1) of the planarization layer (PCL2) in that area may reach about 24 μm.
[0187] Accordingly, according to the touch display device of the embodiments of the present specification, appearance display defects such as waviness defects at the boundary between a display area (AA) and a non-display area (e.g., bezel area, through-hole internal area, etc.) can be effectively mitigated.
[0188] The embodiments of the present specification described above are briefly explained as follows.
[0189] Embodiments of the present specification may provide a touch display device (100) comprising a substrate (SUB), a subpixel (SP) including a transistor located on the substrate (SUB) and a light-emitting element electrically connected to the transistor, an encapsulation layer (ENCAP) located covering the light-emitting element (ED), a touch sensor (TS) located on the encapsulation layer (ENCAP), a flattening layer (PCL2) located on the touch sensor, and at least one dam structure configured to prevent overflow of the flattening layer (PCL2).
[0190] Embodiments of the present specification may provide a touch display device (100) having a display area (AA) on which a subpixel (SP) is located, and a non-display area (NA) on which a pad portion (PAD) is located around the display area (AA), wherein at least one dam structure is located in the non-display area (NA) and is located in the area between the display area (AA) and the pad portion (PAD).
[0191] The embodiments of the present specification further include a cover glass (510) located on the front surface of the substrate (SUB), a light-blocking layer (520) located on the back surface of the cover glass (510) and including an inclined surface (522), and a polarizing plate (540) including an inclined surface (542) located in an area overlapping with the inclined surface of the light-blocking layer, and the at least one dam structure may provide a touch display device (100) located outside the inclined surface (542) of the polarizing plate (540).
[0192] Embodiments of the present specification may provide a touch display device (100) in which the non-display area (NA) includes a pad area (PA) where the pad portion (PAD) is located, and a bending area (BA) between the display area (AA) and the pad area (PA), and the at least one dam structure is located in the area between the display area (AA) and the bending area (BA) (e.g., bottom bezel area).
[0193] The embodiments of the present specification may provide a touch display device (100) comprising two or more dam structures configured to prevent overflow of the leveling layer (PCL2), wherein one of the two or more dam structures is a single-layer dam structure (e.g., a protective layer (PAC), etc.) and the other is a double-layer or higher dam structure (e.g., a bank and a protective layer (PAC), etc.).
[0194] The embodiments of the present specification may provide a touch display device (100) in which the planarization layer (PCL2) comprises a photoinitiator, and the photoinitiator is a material that initiates a polymerization reaction upon receiving ultraviolet light.
[0195] The embodiments of the present specification may provide a touch display device (100) further comprising a protective layer (PAC) located between the touch sensor (TS) and the flattening layer (PCL2).
[0196] The embodiments of the present specification may provide a touch display device (100) in which at least one dam structure includes the protective layer (PAC).
[0197] Embodiments of the present specification may provide a touch display device (100) in which the transistor comprises an active layer (ACT) and a source-drain electrode material (SD1) electrically connected to the active layer (ACT), the light-emitting element (ED) comprises a light-emitting layer (EL), at least one organic insulating film layer (e.g., PLN) is located between the source-drain electrode material (SD1) of the transistor and the light-emitting layer (EL) of the light-emitting element (ED), and the at least one dam structure comprises the organic insulating film layer.
[0198] The embodiments of the present specification further include at least one inorganic insulating film layer (e.g., MBUF, ABUF, GI, ILD, etc.) located on the substrate (SUB), wherein the inorganic insulating film layer is removed in at least a portion of the area on the substrate (SUB), and the at least one dam structure is located overlapping the area where the inorganic insulating film layer is removed, and may provide a touch display device (100) in contact with the substrate (SUB).
[0199] The embodiments of the present specification may provide a touch display device (100) in which the thickness of the flattening layer (PCL2) is 14 μm or more.
[0200] Embodiments of the present specification may further include a through-hole (TH) in which at least a portion of the substrate (SUB) is removed, and an optical electronic device (910) located in overlap with at least a portion of the through-hole (TH), and may provide a touch display device (100) in which the thickness (ΔH1) of the flattening layer (PCL2) around the through-hole (TH) is thicker than the thickness (ΔH2) of the flattening layer (PCL2) on the subpixel (SP).
[0201] The embodiments of the present specification may provide a touch display device (100) in which the flattening layer (PCL2) is formed by printing in an inkjet manner on an area of the touch sensor (TS).
[0202] The foregoing description is merely an illustrative explanation of the technical concept of the present disclosure, and those skilled in the art to which the present disclosure pertains may make various modifications and variations within the scope of the essential characteristics of the present disclosure. Furthermore, the embodiments disclosed in the present disclosure are intended to explain, not limit, the technical concept of the present disclosure, and thus the scope of the technical concept of the present disclosure is not limited by these embodiments. The scope of protection of the present disclosure shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present disclosure. Explanation of the symbols
[0204] 100: Touch display device 110: Display panel 120: Data driving circuit 130: Gate driving circuit 140: Display controller 150: Host system 160: Touch driving circuit 170: Touch controller 510: Cover glass 520: Shading layer 530: Transparent adhesive member 540: Polarizing plate 522, 542, 560: Inclined surface 910: Optoelectronic device
Claims
Claim 1 A touch display device comprising: a substrate; a subpixel including a transistor located on the substrate and a light-emitting element electrically connected to the transistor; an encapsulation layer located covering the light-emitting element; a touch sensor located on the encapsulation layer; a flattening layer located on the touch sensor; and at least one dam structure configured to prevent overflow of the flattening layer, wherein the flattening layer is in direct contact with the at least one dam structure. Claim 2 A touch display device according to claim 1, wherein on the substrate there exists a display area where the subpixel is located; and a non-display area where a pad portion is disposed around the display area, and the at least one dam structure is located in the non-display area and is located in the area between the display area and the pad portion. Claim 3 A touch display device according to claim 2, further comprising: a cover glass located on the front surface of the substrate; a light-blocking layer located on the back surface of the cover glass and including an inclined surface; and a polarizing plate including an inclined surface located in an area overlapping with the inclined surface of the light-blocking layer, wherein the at least one dam structure is located outside the inclined surface of the polarizing plate. Claim 4 A touch display device according to paragraph 2, wherein the non-display area includes a pad area where the pad portion is located; and a bending area between the display area and the pad area, and the at least one dam structure is located in the area between the display area and the bending area. Claim 5 A touch display device according to claim 1, comprising two or more dam structures configured to prevent overflow of the leveling layer, wherein one of the two or more dam structures is a single-layer dam structure and the other is a double-layer or higher dam structure. Claim 6 A touch display device according to claim 1, wherein the planarization layer comprises a photoinitiator, and the photoinitiator is a substance that initiates a polymerization reaction upon receiving ultraviolet rays. Claim 7 A touch display device according to claim 1, further comprising a protective layer located between the touch sensor and the flattening layer. Claim 8 In claim 7, the at least one dam structure is a touch display device including the protective layer. Claim 9 A touch display device according to claim 1, wherein the transistor comprises an active layer and a source-drain electrode material electrically connected to the active layer, the light-emitting element comprises a light-emitting layer, at least one organic insulating film layer is located between the source-drain electrode material of the transistor and the light-emitting layer of the light-emitting element, and the at least one dam structure comprises the organic insulating film layer. Claim 10 A touch display device according to claim 1, further comprising at least one inorganic insulating film layer located on the substrate, wherein the inorganic insulating film layer is removed in at least a portion of the area on the substrate, and wherein the at least one dam structure is located overlapping the area where the inorganic insulating film layer is removed and contacts the substrate. Claim 11 A touch display device according to claim 1, wherein the thickness of the flattening layer is 14 μm or more. Claim 12 A touch display device according to claim 1, further comprising: a through-hole in which at least a portion of the substrate is removed; and an optical electronic device positioned so as to overlap at least a portion with the through-hole, wherein the thickness of the planarization layer around the through-hole is thicker than the thickness of the planarization layer on the subpixel. Claim 13 A touch display device according to claim 1, wherein the planarization layer is formed by printing in an inkjet manner on an area of the touch sensor. Claim 14 A touch display device comprising: a substrate including a display area and a non-display area including a bezel area, a bending area, and a pad area outside the display area; a subpixel disposed on the substrate; a flattening layer disposed on the subpixel; a touch sensor disposed on the flattening layer; an encapsulation layer disposed on the touch sensor; and a first dam structure disposed on the non-display area adjacent to the display area, wherein the first dam structure does not overlap vertically with the flattening layer, and the encapsulation layer is in direct contact with the first dam structure. Claim 15 In paragraph 14, the first dam structure is a touch display device disposed in the bezel area. Claim 16 A touch display device according to claim 14, further comprising a second dam structure spaced apart from the first dam structure and disposed inside the bending area. Claim 17 A display device according to claim 14, further comprising: a cover glass disposed on the front surface of the substrate; a light-blocking layer disposed on the back surface of the cover glass and including an inclined surface; and a polarizing plate including an inclined surface located in an area overlapping with the inclined surface of the light-blocking layer, wherein the first dam structure is located outside the inclined surface of the polarizing plate. Claim 18 A touch display device according to claim 14, further comprising: a through-hole located in an area where at least a portion of the substrate has been removed; and an optical electronic device located in overlap with at least a portion of the through-hole, wherein the thickness of the encapsulation layer around the through-hole is thicker than the thickness of the encapsulation layer on the subpixel. Claim 19 In claim 14, the above-mentioned encapsulation layer is formed by printing on the touch sensor using an inkjet method, thereby forming a touch display device. Claim 20 A touch display device according to claim 14, further comprising a protective layer disposed between the touch sensor and the encapsulation layer.