Electronic device

Abstract

The electronic device may include a display layer for displaying an image, a sensor layer disposed on the display layer and comprising M multiple channels (M is an integer greater than or equal to 5), and a sensor driver for driving the sensor layer. In the uplink section, the sensor driver may be configured to provide an uplink signal to X first channels (X is an integer greater than or equal to 2) arranged consecutively among the multiple channels, provide an inverse signal having the inverse phase of the uplink signal to Y second channels (Y is an integer greater than or equal to 2) arranged consecutively among the multiple channels, and to turn off Z off channels (Z is an integer greater than or equal to 1) between the first channels and the second channels among the multiple channels.

Description

Technology Field

[0001] The present invention relates to an electronic device with improved image quality and improved sensing sensitivity. Background Technology

[0002] Multimedia electronic devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles are equipped with a display device for displaying images. In addition to conventional input methods such as buttons, keyboards, and mice, electronic devices may be equipped with a sensor layer (or input sensor) capable of providing a touch-based input method that allows the user to easily and intuitively input information or commands. The problem to be solved

[0003] One objective of the present invention is to provide an electronic device with improved image quality and improved sensing sensitivity. means of solving the problem

[0004] An electronic device according to one embodiment of the present invention may include a display layer for displaying an image, a sensor layer disposed on the display layer and comprising M multiple channels (M is an integer greater than or equal to 5), and a sensor driving unit for driving the sensor layer. In an uplink section, the sensor driving unit may be configured to provide an uplink signal to X first channels (X is an integer greater than or equal to 2) arranged consecutively among the multiple channels, provide an inverse signal having an inverse phase of the uplink signal to Y second channels (Y is an integer greater than or equal to 2) arranged consecutively among the multiple channels, and to turn off Z off channels (Z is an integer greater than or equal to 1) between the first channels and the second channels among the multiple channels. M may be the sum of X, Y, and Z.

[0005] In the first uplink section, the plurality of channels are sequentially defined as the X first channels, the Z off channels, and the Y second channels, and in the second uplink section following the first uplink section, the plurality of channels can be sequentially defined as the Y second channels, the Z off channels, and the X first channels.

[0006] The number of the X first channels may be greater than the number of the Y second channels.

[0007] If the number of the M plurality of channels is 2n (n is a positive integer), the number of the X first channels may be n.

[0008] If the number of the M plurality of channels is 2n+1 (n is a positive integer), the number of the X first channels may be n+1.

[0009] In the sensor layer, a detection area and a surrounding area are defined, and the X first channels can overlap with more than half of the detection area.

[0010] In the sensor layer, a detection area and a surrounding area are defined, and the Z off-channels and the Y second channels may overlap with less than half of the detection area.

[0011] In the above uplink section, the Z off-channels may not be provided with both the uplink signal and the inverse signal.

[0012] The first off channel operating as the off channel among the plurality of channels in the first uplink section and the second off channel operating as the off channel among the plurality of channels in the second uplink section following the first uplink section may be different from each other.

[0013] The above X may be more than half of the above M, and the above Y may be less than half of the above M.

[0014] The above Z can be 1 or 2.

[0015] The sensor layer comprises a plurality of electrodes each extending along a first direction and arranged along a second direction intersecting the first direction, and a plurality of intersecting electrodes each extending along the second direction and arranged along the first direction, and each of the plurality of channels extends along the first direction and can be arranged along the second direction.

[0016] The sensor driving unit may be configured to selectively operate in a first mode that detects a passive input through a change in mutual capacitance formed between the plurality of electrodes and the plurality of cross electrodes, or in a second mode that detects an active input through a change in capacitance of at least one of the plurality of electrodes and the plurality of cross electrodes.

[0017] Each of the above first mode and the above second mode may include the above uplink section.

[0018] An electronic device according to one embodiment of the present invention comprises a display layer for displaying an image, a sensor layer disposed on the display layer and comprising a plurality of channels, and a sensor driving unit for driving the sensor layer. In each of the uplink sections, the sensor driving unit provides an uplink signal to a plurality of first channels arranged consecutively among the plurality of channels, and provides an inverse signal having an inverse of the uplink signal to a plurality of second channels arranged consecutively among the plurality of channels. The uplink signal and the inverse signal are not provided to an off channel defined between the plurality of first channels and the plurality of second channels among the plurality of channels. The uplink sections include a first uplink section and a second uplink section following the first uplink section. In the first uplink section, the plurality of channels are sequentially defined as the plurality of first channels, the off channel, and the plurality of second channels. In the second uplink section, the plurality of channels may be sequentially defined as the plurality of second channels, the off channel, and the plurality of first channels.

[0019] The number of the plurality of channels is equal to the sum of the number of the plurality of first channels, the number of off channels, and the number of the plurality of second channels, and the number of the plurality of first channels may be greater than the number of the plurality of second channels.

[0020] If the number of the plurality of channels is 2n (n is a positive integer), the number of the plurality of first channels is n, and if the number of the plurality of channels is 2n+1 (n is a positive integer), the number of the plurality of first channels may be n+1.

[0021] The number of the above off channels may be one or two.

[0022] The sensor layer comprises a plurality of electrodes each extending along a first direction and arranged along a second direction intersecting the first direction, and a plurality of intersecting electrodes each extending along the second direction and arranged along the first direction, and each of the plurality of channels extends along the first direction and can be arranged along the second direction.

[0023] The sensor driving unit is selectively driven in a first mode that detects a passive input through a change in mutual capacitance formed between the plurality of electrodes and the plurality of cross electrodes, or in a second mode that detects an active input through a change in capacitance of at least one of the plurality of electrodes and the plurality of cross electrodes, and the first mode and the second mode may include the uplink sections. Effects of the invention

[0024] According to the above description, an uplink signal may be provided to a first part of a detection area in a single uplink section, and an inverse signal having the inverse phase of the uplink signal may be provided to a second part spaced apart from the first part of the detection area. In this case, the flicker phenomenon caused by the uplink signal may be reduced or eliminated by the inverse signal, thereby improving the image quality of the image displayed on the display layer. That is, the image quality of the electronic device may be improved.

[0025] Additionally, second channels providing an inverse signal, which is the inverse phase of the uplink signal, may be separated from first channels providing the uplink signal by an off-channel. Accordingly, the possibility that the inverse signal will affect the operation of the uplink signal provided through the first channels may be eliminated or reduced, and the effective area where the uplink signal is provided may not be reduced. Therefore, when at least two cycles are repeated, the uplink signal can be provided across the entire detection area, and a dead zone where the uplink signal is not provided may not occur. As a result, the sensing sensitivity of the sensor layer may be improved. Brief explanation of the drawing

[0026] FIGS. 1a and FIGS. 1b are perspective views of an electronic device according to one embodiment of the present invention. FIG. 2 is an exploded perspective view of an electronic device according to one embodiment of the present invention. FIG. 3a is a cross-sectional view of a display module according to one embodiment of the present invention. FIG. 3b is a cross-sectional view of a display panel according to one embodiment of the present invention. FIG. 4 is a plan view of a display layer according to one embodiment of the present invention. FIG. 5a is a plan view of a sensor layer according to one embodiment of the present invention. FIG. 5b is an enlarged plan view of the AA' region shown in FIG. 5a. FIG. 5c is an enlarged plan view of the AA' region shown in FIG. 5a. FIG. 6 is a drawing illustrating an interface device according to an embodiment of the present invention. FIG. 7 is a diagram illustrating the operation between an electronic device and an input device according to an embodiment of the present invention. FIG. 8a is a diagram illustrating the operation of a first mode according to an embodiment of the present invention. FIG. 8b is a diagram illustrating the operation of a second mode according to an embodiment of the present invention. FIG. 9a is a drawing illustrating a plurality of channels according to one embodiment of the present invention. FIG. 9b is a drawing illustrating a plurality of channels according to one embodiment of the present invention. FIG. 10 is a diagram illustrating signals provided in an uplink section according to an embodiment of the present invention. FIG. 11a is a drawing illustrating a plurality of channels according to one embodiment of the present invention. FIG. 11b is a drawing illustrating a plurality of channels according to one embodiment of the present invention. FIG. 12a is a drawing illustrating a plurality of channels according to one embodiment of the present invention. FIG. 12b is a drawing illustrating a plurality of channels according to one embodiment of the present invention. Specific details for implementing the invention

[0027] In this specification, where a component (or region, layer, part, etc.) is described as being “on,” “connected,” or “joined” another component, it means that it may be directly placed / connected / joined on the other component, or that a third component may be placed between them.

[0028] Identical reference numerals denote identical components. Additionally, in the drawings, the thicknesses, proportions, and dimensions of components are exaggerated for the effective illustration of the technical content. “And / or” includes all one or more combinations that the associated components may define.

[0029] Terms such as "first," "second," etc., may be used to describe various components, but said components should not be limited by said terms. These terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. A singular expression includes a plural expression unless the context clearly indicates otherwise.

[0030] Additionally, terms such as “below,” “lower,” “above,” and “upper” are used to describe the relationships between the components depicted in the drawings. These terms are relative concepts and are described based on the directions indicated in the drawings.

[0031] Terms such as "include" or "have" are intended to specify the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0032] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Furthermore, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an overly ideal or overly formal sense unless explicitly defined herein.

[0033] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0034] FIGS. 1a and FIGS. 1b are perspective views of an electronic device (ED) according to an embodiment of the present invention. FIG. 1a shows the unfolded state (or unfolded state) of the electronic device (ED), and FIG. 1b shows the folded state of the electronic device (ED).

[0035] Referring to FIGS. 1a and 1b, the electronic device (ED) may be a device that is activated by an electrical signal. For example, the electronic device (ED) may be a mobile phone, a foldable mobile phone, a tablet, a car navigation system, a game console, or a wearable device, but is not limited thereto. FIGS. 1a and 1b illustrate the electronic device (ED) as a foldable mobile phone as an example, but is not specifically limited thereto.

[0036] An electronic device (ED) according to an embodiment of the present invention may include a display surface (DS) defined by a first direction (DR1) and a second direction (DR2) intersecting the first direction (DR1). The electronic device (ED) may provide an image (IM) to a user through the display surface (DS).

[0037] The display surface (DS) may include a display area (DA) and a non-display area (NDA) surrounding the display area (DA). The display area (DA) may display an image (IM), and the non-display area (NDA) may not display an image (IM). The non-display area (NDA) may surround the display area (DA). However, not limited thereto, the shape of the display area (DA) and the shape of the non-display area (NDA) may be modified.

[0038] Hereinafter, the direction that intersects substantially perpendicularly with the plane defined by the first direction (DR1) and the second direction (DR2) is defined as the third direction (DR3). Additionally, in this specification, "on the plane" may be defined as a state viewed from the third direction (DR3).

[0039] The electronic device (ED) may include a folding region (FA, or foldable region) and a plurality of non-folding regions (NFA1, NFA2). The non-folding regions (NFA1, NFA2) may include a first non-folding region (NFA1) and a second non-folding region (NFA2). The folding region (FA) may be positioned between the first non-folding region (NFA1) and the second non-folding region (NFA2). The first non-folding region (NFA1), the folding region (FA), and the second non-folding region (NFA2) may be defined sequentially in the electronic device (ED) along a second direction (DR2).

[0040] As illustrated in FIG. 1b, the folding region (FA) can be folded with respect to a folding axis (FX) parallel to the first direction (DR1). The folding region (FA) can be extended along the first direction (DR1). The folding region (FA) can be folded to have a predetermined curvature and radius of curvature. The first non-folding region (NFA1) and the second non-folding region (NFA2) face each other, and the electronic device (ED) can be inner-folded so that the display surface (DS) is not exposed to the outside.

[0041] In one embodiment of the present invention, the electronic device (ED) may be out-folded so that the display surface (DS) is exposed to the outside. In one embodiment of the present invention, the electronic device (ED) may be configured to enable both in-folding and out-folding operations from the unfolding operation, but is not limited thereto. In one embodiment of the present invention, the electronic device (ED) may be configured to select any one of the unfolding operation, the in-folding operation, and the out-folding operation.

[0042] Although a foldable electronic device (ED) is described as an example in FIGS. 1a and 1b, the present invention is not limited thereto. For example, the electronic device (ED) can be changed to various electronic devices, such as a rigid electronic device, an electronic device in which the folding area (FA) is not defined, a rollable electronic device, or a sliderable electronic device.

[0043] FIG. 2 is an exploded perspective view of an electronic device (ED) according to one embodiment of the present invention.

[0044] Referring to FIG. 2, the electronic device (ED) may include a display device (DD), an electronic module (EM), a power module (PSM), and a case (EDC1, EDC2). Although not separately illustrated, the electronic device (ED) may further include a mechanical structure for controlling the folding operation of the display device (DD).

[0045] The display device (DD) generates an image and detects external input. The display device (DD) includes a window module (WM) and a display module (DM). The window module (WM) provides the front of the electronic device (ED).

[0046] The display module (DM) may include at least a display panel (DP). Although the display module (DM) is depicted as identical to the display panel (DP) in FIG. 2, the display module (DM) may substantially be a stacked structure in which a plurality of components are stacked. A detailed description of the stacked structure of the display module (DM) will be provided later.

[0047] The display panel (DP) includes a display area (DP-DA) and a non-display area (DP-NDA) corresponding to the display area (DA, see FIG. 1a) and non-display area (NDA, see FIG. 1a) of the electronic device (ED). In this specification, “areas / parts correspond to areas / parts” means overlapping and is not limited to the same area. The display module (DM) may include a driver chip (DIC) disposed on the non-display area (DP-NDA). The display module (DM) may further include a flexible circuit film (FCB) coupled to the non-display area (DP-NDA).

[0048] The driving chip (DIC) may include driving elements for driving pixels of a display panel (DP), such as a data driving circuit. Although FIG. 2 illustrates a structure in which the driving chip (DIC) is mounted on a display panel (DP), the present invention is not limited thereto. For example, the driving chip (DIC) may be mounted on a flexible circuit film (FCB).

[0049] The electronic module (EM) includes at least a main drive unit. The electronic module (EM) may include a wireless communication module, a camera module, a proximity sensor module, an image input module, an audio input module, an audio output module, a memory, and an external interface module, etc. The electronic module (EM) is electrically connected to a power module (PSM).

[0050] The main driver (or main controller) controls the overall operation of the electronic device (ED). For example, the main driver enables or disables the display device (DD) in response to user input. The main driver can control the operation of the display device (DD) and other modules. The main driver may include at least one microprocessor.

[0051] Cases (EDC1, EDC2) accommodate a display module (DM), an electronic module (EM), and a power module (PSM). Two separate cases (EDC1, EDC2) are illustrated as examples but are not limited thereto. Although not illustrated, the electronic device (ED) may further include a hinge structure for connecting the two cases (EDC1, EDC2). Cases (EDC1, EDC2) may be coupled with a window module (WM). Cases (EDC1, EDC2) protect the components housed in cases (EDC1, EDC2), such as the display module (DM), the electronic module (EM), and the power module (PSM).

[0052] FIG. 3a is a cross-sectional view of a display module (DM) according to one embodiment of the present invention.

[0053] Referring to FIG. 3a, the display module (DM) may include a display panel (DP), an optical film (LF) placed on the display panel (DP), and a lower member (LM) placed below the display panel (DP). The display panel (DP) may include a display layer (DPL) and a sensor layer (ISL) placed on the display layer (DPL). An adhesive layer may be disposed between the members as needed.

[0054] The display layer (DPL) may be a component that substantially generates an image. The display layer (DPL) may be a light-emitting display layer, for example, the display layer (DPL) may be an organic light-emitting display layer, an inorganic light-emitting display layer, an organic-inorganic light-emitting display layer, a quantum dot display layer, a micro LED display layer, or a nano LED display layer.

[0055] The sensor layer (ISL) may be placed on the display layer (DPL). The sensor layer (ISL) may detect external inputs applied from the outside. The sensor layer (ISL) may be an external sensor attached to the display layer (DPL), or the sensor layer (ISL) may be an integrated sensor formed continuously during the manufacturing process of the display layer (DPL).

[0056] The optical film (LF) can reduce the reflectance of light incident from the outside. The optical film (LF) may include a phase retarder and / or a polarizer. The optical film (LF) may include at least a polarizing film. Alternatively, the optical film (LF) may include color filters. The color filters may have a predetermined arrangement. The arrangement of the color filters may be determined by considering the light emission colors of the pixels included in the display layer (DPL). Additionally, the optical film (LF) may further include a black matrix adjacent to the color filters. Alternatively, the optical film (LF) may include a destructive interference structure. For example, the destructive interference structure may include a first reflective layer and a second reflective layer disposed on different layers. The first reflected light and the second reflected light reflected from the first reflective layer and the second reflective layer, respectively, may undergo destructive interference, and accordingly, the reflectance of external light may be reduced. The optical film (LF) may be omitted.

[0057] The lower member (LM) may include various functional members. It may include a light-blocking layer that blocks light incident on the display layer (DPL), a shock-absorbing layer that absorbs external shock, a support layer that supports the display layer (DPL), and a heat dissipation layer that releases heat generated from the display layer (DPL).

[0058] FIG. 3b is a cross-sectional view of a display panel (DP) according to one embodiment of the present invention.

[0059] Referring to FIG. 3b, the display layer (DPL) may include a base layer (110), a circuit layer (120), a light-emitting element layer (130), and an encapsulation layer (140).

[0060] The base layer (110) may be a member that provides a base surface on which the circuit layer (120) is placed. The base layer (110) may be a glass substrate, a metal substrate, or a polymer substrate, etc. However, the embodiment is not limited thereto, and the base layer (110) may be an inorganic layer, an organic layer, or a composite material layer.

[0061] At least one inorganic layer is formed on the upper surface of the base layer (110). The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. The inorganic layer may be formed in multiple layers. The multiple inorganic layers may constitute a barrier layer and / or a buffer layer. In this embodiment, the display layer (DPL) is shown to include a buffer layer (BFL).

[0062] The buffer layer (BFL) can improve the bonding strength between the base layer (110) and the semiconductor pattern. The buffer layer (BFL) may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the buffer layer (BFL) may include a structure in which a silicon oxide layer and a silicon nitride layer are alternately stacked.

[0063] A semiconductor pattern may be placed on a buffer layer (BFL). The semiconductor pattern may include polysilicon. However, it is not limited thereto, and the semiconductor pattern may include amorphous silicon, low-molecular-weight silicon, or oxide semiconductor.

[0064] FIG. 3b illustrates only a portion of the semiconductor pattern, and additional semiconductor patterns may be placed in other areas. The semiconductor pattern may be arranged according to a specific rule across the pixels. The electrical properties of the semiconductor pattern may differ depending on whether it is doped. The semiconductor pattern may include a first region with high conductivity and a second region with low conductivity. The first region may be doped with an N-type dopant or a P-type dopant. A P-type transistor may include a doped region doped with a P-type dopant, and an N-type transistor may include a doped region doped with an N-type dopant. The second region may be a non-doped region or a region doped at a lower concentration compared to the first region.

[0065] The conductivity of the first region is greater than that of the second region and can substantially function as an electrode or signal line. The second region can substantially correspond to the active (or channel) of the transistor. In other words, a part of the semiconductor pattern may be the active of the transistor, another part may be the source or drain of the transistor, and yet another part may be a connecting electrode or a connecting signal line.

[0066] Each pixel may have an equivalent circuit including seven transistors, one capacitor, and a light-emitting element, and the equivalent circuit diagram of the pixel may be modified in various forms. In FIG. 3b, one transistor (100PC) and a light-emitting element (100PE) included in the pixel are illustrated as examples.

[0067] The source (SC), active (AL, or active region, active region), and drain (DR) of the transistor (100PC) can be formed from a semiconductor pattern. The source (SC) and drain (DR) can extend in opposite directions from the active (AL) in a cross-section. FIG. 3b shows a portion of the connection signal wiring (SCL) formed from the semiconductor pattern. Although not separately illustrated, the connection signal wiring (SCL) can be connected to the drain (DR) of the transistor (100PC) in a planar plane.

[0068] The first insulating layer (10) may be placed on the buffer layer (BFL). The first insulating layer (10) may overlap in common with a plurality of pixels and cover a semiconductor pattern. The first insulating layer (10) may be an inorganic layer and / or an organic layer and may have a single-layer or multi-layer structure. The first insulating layer (10) may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. In this embodiment, the first insulating layer (10) may be a single-layer silicon oxide layer. The insulating layer of the circuit layer (120) described below, as well as the first insulating layer (10), may be an inorganic layer and / or an organic layer and may have a single-layer or multi-layer structure. The inorganic layer may include at least one of the materials described above, but is not limited thereto.

[0069] The gate (GT) of the transistor (100PC) is placed on the first insulating layer (10). The gate (GT) may be part of a metal pattern. The gate (GT) overlaps the active (AL). In the process of doping the semiconductor pattern, the gate (GT) can function as a mask.

[0070] The second insulating layer (20) is disposed on the first insulating layer (10) and can cover the gate (GT). The second insulating layer (20) can overlap the pixels in common. The second insulating layer (20) may be an inorganic layer and / or an organic layer and may have a single layer or a multilayer structure. The second insulating layer (20) may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. In this embodiment, the second insulating layer (20) may have a multilayer structure including a silicon oxide layer and a silicon nitride layer.

[0071] A third insulating layer (30) may be placed on top of a second insulating layer (20). The third insulating layer (30) may have a single layer or a multilayer structure. For example, the third insulating layer (30) may have a multilayer structure including a silicon oxide layer and a silicon nitride layer.

[0072] The first connecting electrode (CNE1) can be placed on the third insulating layer (30). The first connecting electrode (CNE1) can be connected to the connecting signal wiring (SCL) through a contact hole (CNT-1) penetrating the first, second, and third insulating layers (10, 20, 30).

[0073] The fourth insulating layer (40) may be placed on the third insulating layer (30). The fourth insulating layer (40) may be a single layer of silicon oxide. The fifth insulating layer (50) may be placed on the fourth insulating layer (40). The fifth insulating layer (50) may be an organic layer.

[0074] The second connecting electrode (CNE2) can be placed on the fifth insulating layer (50). The second connecting electrode (CNE2) can be connected to the first connecting electrode (CNE1) through a contact hole (CNT-2) that penetrates the fourth insulating layer (40) and the fifth insulating layer (50).

[0075] The sixth insulating layer (60) is placed on the fifth insulating layer (50) and can cover the second connecting electrode (CNE2). The sixth insulating layer (60) may be an organic layer.

[0076] A light-emitting element layer (130) may be disposed on a circuit layer (120). The light-emitting element layer (130) may include a light-emitting element (100PE). For example, the light-emitting element layer (130) may include an organic light-emitting material, an inorganic light-emitting material, an organic-inorganic light-emitting material, a quantum dot, a quantum rod, a micro LED, or a nano LED. In the following description, the light-emitting element (100PE) is described as an example of being an organic light-emitting element, but is not particularly limited thereto.

[0077] The light-emitting element (100PE) may include a first electrode (AE), a light-emitting layer (EL), and a second electrode (CE).

[0078] The first electrode (AE) can be placed on the sixth insulating layer (60). The first electrode (AE) can be connected to the second connecting electrode (CNE2) through a contact hole (CNT-3) penetrating the sixth insulating layer (60).

[0079] The pixel defining film (70) is placed on the sixth insulating layer (60) and can cover a portion of the first electrode (AE). An opening (70-OP) is defined in the pixel defining film (70). The opening (70-OP) of the pixel defining film (70) exposes at least a portion of the first electrode (AE).

[0080] The display area (DA, see FIG. 1a) may include a light-emitting area (PXA) and a non-light-emitting area (NPXA) adjacent to the light-emitting area (PXA). The non-light-emitting area (NPXA) may surround the light-emitting area (PXA). In this embodiment, the light-emitting area (PXA) is defined to correspond to a portion of the first electrode (AE) exposed by the opening (70-OP).

[0081] The light-emitting layer (EL) can be placed on the first electrode (AE). The light-emitting layer (EL) can be placed in an area corresponding to the opening (70-OP). That is, the light-emitting layer (EL) can be formed separately for each pixel. When the light-emitting layer (EL) is formed separately for each pixel, each of the light-emitting layers (EL) can emit light of at least one color among blue, red, and green. However, it is not limited thereto, and the light-emitting layer (EL) may be connected to the pixels and provided in common. In this case, the light-emitting layer (EL) may provide blue light or white light.

[0082] The second electrode (CE) can be placed on the light-emitting layer (EL). The second electrode (CE) has a single shape and can be placed commonly on a plurality of pixels.

[0083] Although not shown, a hole control layer may be disposed between the first electrode (AE) and the light-emitting layer (EL). The hole control layer may be disposed in common in the light-emitting region (PXA) and the non-light-emitting region (NPXA). The hole control layer includes a hole transport layer and may further include a hole injection layer. An electronic control layer may be disposed between the light-emitting layer (EL) and the second electrode (CE). The electronic control layer includes an electron transport layer and may further include an electron injection layer. The hole control layer and the electronic control layer may be formed in common across a plurality of pixels using an open mask.

[0084] The encapsulation layer (140) may be disposed on the light-emitting element layer (130). The encapsulation layer (140) may include sequentially stacked inorganic layers, organic layers, and inorganic layers, but the layers constituting the encapsulation layer (140) are not limited thereto.

[0085] Inorganic layers can protect the light-emitting element layer (130) from moisture and oxygen, and organic layers can protect the light-emitting element layer (130) from foreign substances such as dust particles. Inorganic layers may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. Organic layers may include an acrylic-based organic layer, but are not limited thereto.

[0086] The sensor layer (ISL) may include a base layer (201), a first conductive layer (202), a sensing insulating layer (203), a second conductive layer (204), and a cover insulating layer (205).

[0087] The base layer (201) may be an inorganic layer comprising at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base layer (201) may be an organic layer comprising epoxy resin, acrylic resin, or imide-based resin. The base layer (201) may have a single-layer structure or a multi-layer structure stacked along the third direction (DR3).

[0088] Each of the first conductive layer (202) and the second conductive layer (204) may have a single-layer structure or a multi-layer structure stacked along the third direction (DR3).

[0089] The single-layer conductive layer may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium zinc tin oxide (IZTO). Additionally, the transparent conductive layer may include a conductive polymer such as PEDOT, metal nanowires, graphene, etc.

[0090] The conductive layer of the multilayer structure may include metal layers. The metal layers may have a three-layer structure, for example, titanium / aluminum / titanium. The conductive layer of the multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0091] At least one of the sensing insulating layer (203) and the cover insulating layer (205) may include an inorganic film. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0092] At least one of the sensing insulating layer (203) and the cover insulating layer (205) may include an organic film. The organic film may include at least one of an acrylic resin, a methacrylic resin, a polyisoprene, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a siloxane resin, a polyimide resin, a polyamide resin, and a perylene resin.

[0093] FIG. 4 is a plan view of a display layer according to one embodiment of the present invention.

[0094] Referring to FIG. 4, a display layer (DPL) may define a display area (DP-DA) and a non-display area (DP-NDA) surrounding the display area (DP-DA). The display area (DP-DA) and the non-display area (DP-NDA) may be distinguished by the presence or absence of a pixel (PX). The pixel (PX) is placed in the display area (DP-DA). A scanning driver (SDV), a data driver, and an emitting driver (EDV) may be placed in the non-display area (DP-NDA). The data driver may be a part of the circuit configured in the driver chip (DIC).

[0095] The display layer (DPL) may include a first panel area (AA1), a bending area (BA), and a second panel area (AA2) defined along a second direction (DR2). The second panel area (AA2) and the bending area (BA) may be part of the non-display area (DP-NDA). The bending area (BA) is positioned between the first panel area (AA1) and the second panel area (AA2).

[0096] The first panel area (AA1) is an area corresponding to the display surface (DS) of FIG. 1a. The first panel area (AA1) may include a first non-folding area (NFA10), a second non-folding area (NFA20), and a folding area (FA0). The first non-folding area (NFA10), the second non-folding area (NFA20), and the folding area (FA0) correspond to the first non-folding area (NFA1), the second non-folding area (NFA2), and the folding area (FA) of FIG. 1a and FIG. 1b, respectively.

[0097] The width of the bending area (BA) parallel to the first direction (DR1) and the width (or length) of the second panel area (AA2) may be smaller than the width (or length) of the first panel area (AA1) parallel to the first direction (DR1). An area with a shorter length in the direction of the bending axis can be bent more easily.

[0098] The display layer (DPL) may include a plurality of pixels (PX), a plurality of scan lines (SL1-SLm), a plurality of data lines (DL1-DLn), a plurality of light-emitting lines (EL1-ELm), first and second control lines (CSL1, CSL2), a power line (PL), and a plurality of pads (PD). Here, m and n are natural numbers. The pixels (PX) may be connected to the scan lines (SL1-SLm), data lines (DL1-DLn), and light-emitting lines (EL1-ELm).

[0099] Scan lines (SL1-SLm) can be extended in a first direction (DR1) and electrically connected to a scan driver (SDV). Data lines (DL1-DLn) can be extended in a second direction (DR2) and electrically connected to a driver chip (DIC) via a bending region (BA). Light emission lines (EL1-ELm) can be extended in a first direction (DR1) and electrically connected to a light emission driver (EDV).

[0100] The power line (PL) may include a portion extending in a second direction (DR2) and a portion extending in a first direction (DR1). The portion extending in the first direction (DR1) and the portion extending in the second direction (DR2) may be placed on different layers. The portion of the power line (PL) extending in the second direction (DR2) may extend to a second panel area (AA2) via a bending area (BA). The power line (PL) may provide a first voltage to the pixels (PX).

[0101] The first control line (CSL1) is connected to the scanning drive unit (SDV) and can be extended toward the bottom of the second panel area (AA2) via the bending area (BA). The second control line (CSL2) is connected to the light-emitting drive unit (EDV) and can be extended toward the bottom of the second panel area (AA2) via the bending area (BA).

[0102] When viewed in a planar view, the pads (PD) can be positioned adjacent to the bottom of the second panel area (AA2). The driving chip (DIC), power line (PL), first control line (CSL1), and second control line (CSL2) can be electrically connected to the pads (PD). The flexible circuit film (FCB) can be electrically connected to the pads (PD) through an anisotropic conductive adhesive layer.

[0103] FIG. 5a is a plan view of a sensor layer according to an embodiment of the present invention. FIG. 5b is an enlarged plan view of the AA' region shown in FIG. 5a.

[0104] Referring to FIGS. 5a and 5b, a sensing area (IS-A) and an surrounding area (IS-NA) may be defined in the sensor layer (ISL). The sensing area (IS-A) may be an area that is activated according to an electrical signal. For example, the sensing area (IS-A) may be an area that detects an external input. The surrounding area (IS-NA) is adjacent to the sensing area (IS-A) and may surround the sensing area (IS-A).

[0105] The sensor layer (ISL) may include electrodes (210), cross electrodes (220), and sensing lines (230). The electrodes (210) and cross electrodes (220) may be placed in a sensing area (IS-A), and the sensing lines (230) may be placed in a peripheral area (IS-NA). The sensor layer (ISL) may obtain information about an external input through a change in mutual capacitance between the electrodes (210) and the cross electrodes (220).

[0106] The sensor layer (ISL) may include a plurality of sensing units (SU). Each of the plurality of sensing units (SU) may be defined as an area where one of the electrodes (210) and one of the cross electrodes (220) intersect.

[0107] Each of the electrodes (210) extends along a first direction (DR1), and the electrodes (210) may be arranged along a second direction (DR2). The electrodes (210) may include first parts (211) and a second part (212). The second part (212) may be adjacent to two first parts (211) that are adjacent to each other.

[0108] The cross electrodes (220) are arranged along a first direction (DR1), and each of the cross electrodes (220) may extend along a second direction (DR2). The cross electrodes (220) may include patterns (221) and connection patterns (222, or bridge patterns). The connection patterns (222) may electrically connect two adjacent patterns (221). Two adjacent patterns (221) may be connected to each other by two connection patterns (222), but are not limited thereto. The second part (212) may be insulated and cross with the two connection patterns (222).

[0109] Patterns (221), first parts (211), and second parts (212) may be disposed on the same layer as each other, and connecting patterns (222) may be disposed on a different layer from patterns (221), first parts (211), and second parts (212). For example, patterns (221), first parts (211), and second parts (212) may be included in a second conductive layer (204, see FIG. 3b), and connecting patterns (222) may be included in a first conductive layer (202, see FIG. 3b), and this structure may be referred to as a bottom bridge structure. However, the present invention is not particularly limited thereto. For example, patterns (221), first parts (211), and second parts (212) may be included in the first conductive layer (202, see FIG. 3b), and connecting patterns (222) may be included in the second conductive layer (204, see FIG. 3b), and this structure may be referred to as a top bridge structure.

[0110] The shape and arrangement relationship of the electrodes (210) and cross electrodes (220) shown in FIG. 5b is illustrated as an example only, and the shape and arrangement relationship of the electrodes (210) and cross electrodes (220) constituting the sensor layer (ISL) is not limited to that shown in FIG. 5b.

[0111] The sensing lines (230) can be electrically connected to corresponding pads among the pads (PDs). The sensing lines (230) may include lines (231) and cross lines (232).

[0112] Lines (231) may be electrically connected to each electrode (210). Some of the lines (231) may be connected to the left side of some of the electrodes (210), and other parts of the lines (231) may be connected to the right side of other parts of the electrodes (210). Cross lines (232) may be electrically connected to each of the cross electrodes (220). However, the connection relationship between the lines (231) and the electrodes (210) and the connection relationship between the cross lines (232) and the cross electrodes (220) are not limited to the example shown in FIG. 5a.

[0113] The sensor driver (T-IC) is electrically connected to the sensor layer (ISL) to provide a driving signal to the sensor layer (ISL) and can calculate coordinates from an external input. The sensor driver (T-IC) is implemented in the form of a chip and can be mounted on a flexible circuit board (FCB, see FIG. 2). The sensor driver (T-IC) can be electrically connected to lines (231) and cross lines (232).

[0114] FIG. 5c is an enlarged plan view of the AA' region shown in FIG. 5a.

[0115] FIG. 5c exemplarily illustrates electrodes (210-1) and cross electrodes (220-1) having a shape different from that of FIG. 5b. The electrodes (210-1) and cross electrodes (220-1) may have a bar shape.

[0116] Each of the electrodes (210-1) extends along a first direction (DR1), and the electrodes (210-1) may be arranged along a second direction (DR2). The cross electrodes (220-1) are arranged along a first direction (DR1), and each of the cross electrodes (220-1) may extend along a second direction (DR2). The cross electrodes (220-1) may include patterns (221-1) and connection patterns (222-1, or bridge patterns). The connection patterns (222-1) may electrically connect two adjacent patterns (221-1). Two adjacent patterns (221-1) may be connected to each other by four connection patterns (222-1), but are not limited thereto. One electrode (210-1) may be insulated cross with four connection patterns (222). Although an example has been shown having a shape that interlocks with electrodes (210-1) and patterns (221-1), it is not particularly limited thereto.

[0117] Each of the electrodes (210 or 210-1) and the cross electrodes (220 or 220-1) described with reference to FIGS. 5b and 5c may have a mesh structure. In this case, an opening may be defined in each of the electrodes (210 or 210-1) and the cross electrodes (220 or 220-1). However, this is not limited thereto, and each of the electrodes (210 or 210-1) and the cross electrodes (220 or 220-1) may be a transparent electrode without an defined opening.

[0118] FIG. 6 is a drawing illustrating an interface device according to an embodiment of the present invention. FIG. 7 is a drawing for explaining the operation between a display panel and an input device according to an embodiment of the present invention.

[0119] Referring to FIGS. 6 and 7, the interface device (INF) may include an electronic device (ED) and an input device (PN). The interface device (INF) may be referred to as an electronic system, a touch system, an input / output system, a pen tablet, or a pen terminal.

[0120] The electronic device (ED) can detect inputs applied from the outside. For example, the electronic device (ED) can detect both an active input by an input device (PN) and a second passive input by touch (OI). The input device (PN) is an active type input means that provides a driving signal, for example, an active pen. The touch (OI) can include all input means capable of providing a change in capacitance, such as the user's body or a passive pen.

[0121] The electronic device (ED) and the input device (PN) can communicate bidirectionally with each other. The electronic device (ED) can provide an uplink signal (ULS) to the input device (PN), and the input device (PN) can provide a downlink signal (DLS) to the electronic device (ED). For example, the uplink signal (ULS) may include information such as panel information and protocol version, but is not specifically limited thereto. The downlink signal (DLS) may include a synchronization signal or status information of the input device (PN). For example, the downlink signal (DLS) may include coordinate information of the input device (PN), battery information of the input device (PN), tilt information of the input device (PN), and / or various information stored in the input device (PN), but is not specifically limited thereto.

[0122] The electronic device (ED) may include a display panel (DP), a display driver (DPL-C), a sensor driver (T-IC), and a main driver (1000C).

[0123] The main driver (1000C) can control the overall operation of the electronic device (ED). For example, the main driver (1000C) can control the operation of the display driver (DPL-C) and the sensor driver (T-IC). The main driver (1000C) may include at least one microprocessor, and the main driver (1000C) may be referred to as a host. The main driver (1000C) may further include a graphics controller.

[0124] The display driver (DPL-C) can drive the display layer (DPL). The display driver (DPL-C) may be configured to include a driver chip (DIC), a scanning driver (SDV), and an emitting driver (EDV) as shown in FIG. 4. The display driver (DPL-C) can receive image data (RGB) and a control signal (D-CS) from the main driver (1000C). The control signal (D-CS) may include various signals. For example, the control signal (D-CS) may include an input vertical synchronization signal, an input horizontal synchronization signal, a main clock, and a data enable signal. Based on the control signal (D-CS), the display driver (DPL-C) can generate a vertical synchronization signal and a horizontal synchronization signal to control the timing of providing signals to the display layer (DPL).

[0125] The sensor driver (T-IC) can drive the sensor layer (ISL). The sensor driver (T-IC) can receive a control signal (I-CS) from the main driver (1000C). The control signal (I-CS) may include a mode determination signal and a clock signal that determine the driving mode of the sensor driver (T-IC). Based on the control signal (I-CS), the sensor driver (T-IC) can operate in a first mode that detects input by touch (OI) or a second mode that detects input by an input device (PN).

[0126] The sensor driver (T-IC) can calculate coordinate information of a first input or a second input based on a signal received from the sensor layer (ISL) and provide a coordinate signal (I-SS) containing the coordinate information to the main driver (1000C). The main driver (1000C) executes an operation corresponding to a user input based on the coordinate signal (I-SS). For example, the main driver (1000C) can operate the display driver (DPL-C) so that a new application image is displayed on the display layer (DPL).

[0127] FIG. 8a is a diagram illustrating the operation of a first mode according to an embodiment of the present invention. FIG. 8b is a diagram illustrating the operation of a second mode according to an embodiment of the present invention. For example, FIG. 8a and FIG. 8b are diagrams illustrating the operation at a report rate of one cycle.

[0128] Referring to FIGS. 5a, 5b, 7, and 8a, in the first mode, the sensor driver (T-IC) can detect a passive input through a change in mutual capacitance formed between a plurality of electrodes (210) and a plurality of cross electrodes (220). However, it is not limited thereto. For example, in the first mode, the sensor driver (T-IC) may detect a passive input through a change in the magnetic capacitance of each of the plurality of electrodes (210) and the plurality of cross electrodes (220). The first mode may be referred to as a finger touch detection mode.

[0129] The sensor driver (T-IC) needs to continuously monitor whether the input device (PN, see FIG. 7) is approaching even in the first mode. Accordingly, the sensor driver (T-IC) can periodically transmit an uplink signal (ULS), for example, a beacon signal, through the sensor layer (ISL). For example, the sensor layer (ISL) can transmit the uplink signal (ULS) during the uplink interval (UT). Afterward, if no response signal is received from the input device (PN), the sensor layer (ISL) can detect a passive input during the detection interval (ST). If a response signal (ACK, see FIG. 8b) is received, the sensor layer (ISL) can switch to and operate in the second mode.

[0130] Referring to FIGS. 5a, 5b, 7, and 8b, in the second mode, the sensor driver (T-IC) can detect an active input through a change in the capacitance of at least one of the plurality of electrodes (210) and the plurality of cross electrodes (220). When an uplink signal (ULS) is provided in the uplink section (UT) and a response signal (ACK) is received from the input device (PN), it can enter the downlink section (DT). In the downlink section (DT), the sensor layer (ISL) can receive position information, data containing information about the button state, tilt information, etc. from the input device (PN).

[0131] As described in FIGS. 8a and 8b, as an uplink signal (ULS) is provided in the uplink section (UT), the signal provided to the data lines (DL1-DLn, see FIG. 4) and the uplink signal (ULS) may collide, causing flicker. According to an embodiment of the present invention, an uplink signal (ULS) is provided to a first part of the detection area (IS-A) in the uplink section (UT), and an inverse signal (ULSR, see FIG. 10) having the inverse phase of the uplink signal (ULS) may be provided to a second part spaced apart from the first part of the detection area (IS-A). In this case, the influence on the signal provided to the data lines (DL1-DLn, see FIG. 4) may be reduced or eliminated. Accordingly, the flicker phenomenon caused by the uplink signal (ULS) is reduced or eliminated by the inverse signal (ULSR), and the image quality of the image displayed on the display layer (DPL) may be improved. In other words, the image quality of the electronic device (ED) can be improved.

[0132] FIG. 9a is a diagram illustrating a plurality of channels according to an embodiment of the present invention. FIG. 9b is a diagram illustrating a plurality of channels according to an embodiment of the present invention. FIG. 10 is a diagram illustrating signals provided in an uplink section according to an embodiment of the present invention.

[0133] Referring to FIGS. 9a and 9b, a plurality of channels (CH1, CH2 to CHM) disposed in a sensing area (IS-A) are illustrated. Each of the plurality of channels (CH1, CH2 to CHM) may extend along a first direction (DR1) and be arranged along a second direction (DR2). Each of the plurality of channels (CH1, CH2 to CHM) may correspond one-to-one with the plurality of electrodes (210) illustrated in FIG. 5a. However, this is not particularly limited, and the plurality of channels (CH1, CH2 to CHM) may correspond one-to-one with the plurality of cross electrodes (220) illustrated in FIG. 5a. M may be an integer greater than or equal to 5. FIGS. 9a and 9b illustrate an example where there are 16 of the plurality of channels (CH1, CH2 to CHM), but this is not limited thereto. For example, there may be 40 or 70 channels (CH1, CH2 to CHM).

[0134] Referring to FIG. 9a and FIG. 10, an uplink signal (ULS) may be provided to X first channels (CH11, CH12 to CH1X) arranged consecutively among a plurality of channels (CH1, CH2 to CHHM) in a first uplink section. X may be an integer of 2 or more. An inverse signal (ULSR) having an inverse phase of the uplink signal (ULS) may be provided to Y second channels (CH21, CH22 to CH2Y) arranged consecutively among a plurality of channels (CH1, CH2 to CHMa). Y may be an integer of 2 or more. Z off channels (CHoff) between the first channels (CH11, CH12 to CH1X) and the second channels (CH21, CH22 to CH2Y) among the plurality of channels (CH1, CH2 to CHHM) may be turned off. Z may be an integer of 1 or more. In the off channel (CHoff), neither the uplink signal (ULS) nor the inverse signal (ULSR) may be provided. The above M may be the sum of the above X, the above Y, and the above Z.

[0135] The number of first channels (CH11, CH12 to CH1X) may be greater than the number of second channels (CH21, CH22 to CH2Y). For example, X may be more than half of M, and Y may be less than half of M. If the number of M multiple channels is 2n (n is a positive integer), the number of X first channels (CH11, CH12 to CH1X) may be n.

[0136] X first channels (CH11, CH12 to CH1X) may overlap more than half of the area of ​​the detection area (IS-A). The Z off channels (CHoff) and Y second channels (CH21, CH22 to CH2Y) may overlap less than half of the area of ​​the detection area (IS-A). Referring to FIG. 9a, a center line (CNTL) passing through the center of the detection area (IS-A) is shown. In the first uplink section, the first channels (CH11, CH12 to CH1X) may be positioned to the left of the center line (CNTL), and the off channels (CHoff) and second channels (CH21, CH22 to CH2Y) may be positioned to the right of the center line (CNTL).

[0137] Figure 9b illustrates the operation in the second uplink section following the first uplink section. For example, if Figure 9a is a diagram showing the signal provided in the first uplink section at the report rate of the first cycle, Figure 9b is a diagram showing the signal provided in the second uplink section at the report rate of the second cycle following the first cycle.

[0138] Referring to FIG. 9b, in the second uplink section compared to the first uplink section, the positions of the first channels (CH11, CH12 to CH1X) to which the uplink signal (ULS) is provided may be changed. For example, in the first uplink section, a plurality of channels (CH1, CH2 to CHHM) may be sequentially defined along the second direction (DR2) into the first channels (CH11, CH12 to CH1X), an off channel (CHoff), and second channels (CH21, CH22 to CH2Y). In the second uplink section, a plurality of channels (CH1, CH2 to CHHM) may be sequentially defined along the second direction (DR2) into the second channels (CH21, CH22 to CH2Y), an off channel (CHoff), and first channels (CH11, CH12 to CH1X).

[0139] The positions of the first off channel (CHoff) operating as an off channel among the plurality of channels (CH1, CH2 to CHM) in the first uplink section and the second off channel (CHoff) operating as an off channel among the plurality of channels (CH1, CH2 to CHM) in the second uplink section may differ from each other. For example, in the first uplink section, the off channel (CHoff) may be positioned to the left of the center line (CNTL), and in the second uplink section, the off channel (CHoff) may be positioned to the right of the center line (CNTL).

[0140] In the first uplink section, the input device (PN, see FIG. 7) can transmit a response signal in response to an uplink signal (ULS) provided from the first channels (CH11, CH12 to CH1X) defined on the left side of the center line (CNTL). In the second uplink section, the input device (PN, see FIG. 7) can transmit a response signal in response to an uplink signal (ULS) provided from the first channels (CH11, CH12 to CH1X) defined on the right side of the center line (CNTL).

[0141] According to an embodiment of the present invention, an uplink signal (ULS) is provided to a first part of a detection area (IS-A) in one uplink section, and an inverse signal (ULSR) having the inverse phase of the uplink signal (ULS) may be provided to a second part spaced apart from the first part of the detection area (IS-A). In this case, the flicker phenomenon caused by the uplink signal (ULS) is reduced or eliminated by the inverse signal (ULSR), and the image quality of the image displayed on the display layer (DPL) may be improved. That is, the image quality of the electronic device (ED) may be improved.

[0142] Additionally, according to an embodiment of the present invention, second channels (CH21, CH22 to CH2Y) to which an inverse signal (ULSR), which is the inverse of the uplink signal (ULS), is provided may be separated from first channels (CH11, CH12 to CH1X) by an off channel (CHoff). Accordingly, the possibility that the inverse signal (ULSR) may affect the driving of the uplink signal (ULS) provided through the first channels (CH11, CH12 to CH1X) may be eliminated or reduced, and the effective area where the uplink signal (ULS) is provided may not be reduced. Accordingly, when at least two cycles are repeated, the uplink signal (ULS) may be provided across the entire sensing area (IS-A), and a dead zone where the uplink signal (ULS) is not provided may not occur. As a result, the sensing sensitivity of the sensor layer (ISL), for example, the sensing sensitivity of the input device (PN, see FIG. 7), may be improved.

[0143] FIG. 11a is a drawing illustrating a plurality of channels according to an embodiment of the present invention. FIG. 11b is a drawing illustrating a plurality of channels according to an embodiment of the present invention.

[0144] Referring to FIG. 11a, an uplink signal (ULS) may be provided to X first channels (CH11, CH12 to CH1X) arranged consecutively among a plurality of channels (CH1, CH2 to CHM) in the first uplink section. X may be an integer greater than or equal to 2. An inverse phase signal having an inverse phase of the uplink signal may be provided to Y second channels (CH21, CH22 to CH2Ya) arranged consecutively among a plurality of channels (CH1 to CHM). Ya may be an integer greater than or equal to 2.

[0145] Z off channels (CHoff1, CHoff2) between the first channels (CH11, CH12 to CH1X) and the second channels (CH21, CH22 to CH2Ya) among the plurality of channels (CH1, CH2 to CHM) may be turned off. Z may be 2. Neither the uplink signal (ULS) nor the inverse signal (ULSR) may be provided to the off channels (CHoff1, CHoff2). M may be the sum of X, Ya, and Z.

[0146] Referring to FIG. 11b, in the second uplink section compared to the first uplink section, the positions of the first channels (CH11, CH12 to CH1X) to which the uplink signal (ULS) is provided may be changed. For example, in the first uplink section, a plurality of channels (CH1, CH2 to CHHM) may be sequentially defined along the second direction (DR2) into first channels (CH11, CH12 to CH1X), off channels (CHoff1, CHoff2), and second channels (CH21, CH22 to CH2Ya). In the second uplink section, a plurality of channels (CH1, CH2 to CHHM) may be sequentially defined along the second direction (DR2) into second channels (CH21, CH22 to CH2Ya), off channels (CHoff1, CHoff2), and first channels (CH11, CH12 to CH1X).

[0147] When the size of the detection area (IS-A) increases, the strength of the uplink signal (ULS) and the inverse signal (ULSR), respectively, may become stronger. In this case, the number of off channels (CHoff1, CHoff2) may be adjusted to eliminate or reduce the possibility that the inverse signal (ULSR) may affect the driving of the uplink signal (ULS) provided through the first channels (CH11, CH12 to CH1X). For example, the number of off channels (CHoff1, CHoff2) may be increased in response to the inverse signal (ULSR) with increased strength.

[0148] FIG. 12a is a drawing illustrating a plurality of channels according to an embodiment of the present invention. FIG. 12b is a drawing illustrating a plurality of channels according to an embodiment of the present invention.

[0149] Referring to FIGS. 12a and 12b, a plurality of channels (CH1, CH2 to CHMa) placed in a sensing area (IS-A) are shown. Ma may be an integer greater than or equal to 5.

[0150] Referring to FIG. 10 and FIG. 12a, an uplink signal (ULS) may be provided to Xa first channels (CH11, CH12 to CH1Xa) arranged consecutively among a plurality of channels (CH1, CH2 to CHMa) in a first uplink section. Xa may be an integer of 2 or more. An inverse signal (ULSR) having an inverse phase of the uplink signal may be provided to Yb second channels (CH21, CH22 to CH2Yb) arranged consecutively among a plurality of channels (CH1, CH2 to CHMa). Yb may be an integer of 2 or more. Z off channels (CHoffa) between the first channels (CH11, CH12 to CH1Xa) and the second channels (CH21, CH22 to CH2Yb) among a plurality of channels (CH1, CH2 to CHMa) may be turned off. Z may be an integer of 1 or more. In the off-channel (CHoffa), neither the uplink signal (ULS) nor the inverse signal (ULSR) may be provided. The above Ma may be the sum of the above Xa, the above Yb, and the above Z.

[0151] If the number of multiple channels (CH1, CH2 to CHMa) is 2n+1 (where n is a positive integer), the number of Xa first channels (CH11, CH12 to CH1Xa) may be n+1. The Xa first channels (CH11, CH12 to CH1Xa) may overlap with more than half of the area of ​​the detection region (IS-A). The Z off channels (CHoffa) and the Yb second channels (CH21, CH22 to CH2Yb) may overlap with less than half of the area of ​​the detection region (IS-A).

[0152] Referring to FIG. 12a, a center line (CNTLa) passing through the center of the detection area (IS-A) is shown. The center line (CNTLa) can overlap with the center channel positioned at the center among the plurality of channels (CH1, CH2 to CHMa).

[0153] Referring to FIGS. 10 and FIGS. 12b, the operation in a second uplink section following the first uplink section is illustrated. In the second uplink section compared to the first uplink section, the positions of the first channels (CH11, CH12 to CH1Xa) to which the uplink signal (ULS) is provided may be changed. For example, in the first uplink section, a plurality of channels (CH1, CH2 to CHMa) may be sequentially defined as the first channels (CH11, CH12 to CH1Xa), an off channel (CHoffa), and second channels (CH21, CH22 to CH2Yb). In the second uplink section, a plurality of channels (CH1, CH2 to CHMa) may be sequentially defined as the second channels (CH21, CH22 to CH2Yb), an off channel (CHoffa), and first channels (CH11, CH12 to CH1Xa).

[0154] According to an embodiment of the present invention, in each of the first uplink section and the second uplink section, the center channel may be included in Xa first channels (CH11, CH12 to CH1Xa). That is, when the number of channels (CH1, CH2 to CHMa) is odd, an uplink signal (ULS) may be continuously provided to the center channel positioned at the center among the channels (CH1, CH2 to CHMa). Therefore, when at least two cycles are repeated, an uplink signal (ULS) may be provided throughout the entire detection area (IS-A), and a dead zone where an uplink signal (ULS) is not provided may not occur.

[0155] Although the present invention has been described above with reference to preferred embodiments, those skilled in the art or those with ordinary knowledge in the relevant technical field will understand that various modifications and changes can be made to the invention without departing from the spirit and technical scope of the invention as set forth in the claims below. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims. Explanation of the symbols

[0156] ED: Electronic Device DSL: Display Layer ISL: Sensor layer T-IC: Sensor driver ULS: Uplink signal ULSR: Inverse phase signal CH1, CH2 to CHM: channels CH11, CH12 to CH1X: First channels CH21, CH22 to CH2Y: Second channels CHoff: Off Channel

Claims

Claim 1 An electronic device comprising: a display layer for displaying an image; a sensor layer disposed on the display layer and including M multiple channels (M is an integer greater than or equal to 5); and a sensor driving unit for driving the sensor layer, wherein in an uplink section before a response signal is received from an input device, the sensor driving unit provides an uplink signal to X first channels (X is an integer greater than or equal to 2) arranged consecutively among the multiple channels, and provides an inverse signal having an inverse phase of the uplink signal to Y second channels (Y is an integer greater than or equal to 2) arranged consecutively among the multiple channels, and Z off channels (Z is an integer greater than or equal to 1) between the first channels and the second channels among the multiple channels are configured to be off, wherein M is the sum of X, Y, and Z, and wherein in the uplink section, the Z off channels are configured to be disposed between all of the X first channels and all of the Y second channels. Claim 2 An electronic device according to claim 1, wherein in a first uplink section, the plurality of channels are sequentially defined as the X first channels, the Z off channels, and the Y second channels, and in a second uplink section following the first uplink section, the plurality of channels are sequentially defined as the Y second channels, the Z off channels, and the X first channels. Claim 3 An electronic device according to claim 1, wherein the number of X first channels is greater than the number of Y second channels. Claim 4 An electronic device according to claim 1, wherein if the number of the M plurality of channels is 2n (n is a positive integer), the number of the X first channels is n. Claim 5 An electronic device according to claim 1, wherein if the number of M plurality channels is 2n+1 (n is a positive integer), the number of X first channels is n+1. Claim 6 An electronic device according to claim 1, wherein the sensor layer has a sensing area and a surrounding area defined, and the X first channels overlap more than half of the sensing area. Claim 7 An electronic device according to claim 1, wherein the sensor layer has a sensing area and a surrounding area defined, and the Z off-channels and the Y second channels overlap with less than half of the sensing area. Claim 8 An electronic device according to claim 1, wherein in the uplink section, the Z off-channels are not provided with both the uplink signal and the inverse signal. Claim 9 In claim 1, the first off channel operating as the off channel among the plurality of channels in the first uplink section and the second off channel operating as the off channel among the plurality of channels in the second uplink section following the first uplink section are different electronic devices. Claim 10 An electronic device according to claim 1, wherein X is at least half of M and Y is less than half of M. Claim 11 In claim 1, the electronic device in which Z is 1 or 2. Claim 12 In claim 1, the sensor layer comprises a plurality of electrodes each extending along a first direction and arranged along a second direction intersecting the first direction, and a plurality of intersecting electrodes each extending along the second direction and arranged along the first direction, and each of the plurality of channels extending along the first direction and arranged along the second direction, an electronic device. Claim 13 An electronic device according to claim 12, wherein the sensor driving unit is configured to selectively drive in a first mode that detects a passive input through a change in mutual capacitance formed between the plurality of electrodes and the plurality of cross electrodes, or in a second mode that detects an active input through a change in capacitance of at least one of the plurality of electrodes and the plurality of cross electrodes. Claim 14 In claim 13, each of the first mode and the second mode is an electronic device including the uplink section. Claim 15 A display layer for displaying an image; a sensor layer disposed on the display layer and comprising a plurality of channels; The sensor driving unit for driving the sensor layer is included, and in each of the uplink intervals prior to receiving a response signal from an input device, the sensor driving unit provides an uplink signal to a plurality of first channels arranged consecutively among the plurality of channels and provides an inverse signal having the inverse of the uplink signal to a plurality of second channels arranged consecutively among the plurality of channels, and is configured not to provide the uplink signal and the inverse signal to an off channel defined between the plurality of first channels and the plurality of second channels among the plurality of channels, the uplink intervals include a first uplink interval and a second uplink interval that temporally follows the first uplink interval, and in each of the uplink intervals, the off channel is configured to be arranged between all of the plurality of first channels and all of the plurality of second channels, and in the first uplink interval, the plurality of channels are sequentially defined as the plurality of first channels, the off channel, and the plurality of second channels, and in the second uplink interval, the plurality of channels are sequentially defined as the plurality of second channels, the off channel, and the plurality of first channels Defined electronic device. Claim 16 An electronic device according to claim 15, wherein the number of the plurality of channels is equal to the sum of the number of the plurality of first channels, the number of off channels, and the number of the plurality of second channels, and the number of the plurality of first channels is greater than the number of the plurality of second channels. Claim 17 An electronic device according to claim 15, wherein if the number of the plurality of channels is 2n (n is a positive integer), the number of the plurality of first channels is n, and if the number of the plurality of channels is 2n+1 (n is a positive integer), the number of the plurality of first channels is n+1. Claim 18 In claim 15, the electronic device wherein the number of off-channels is one or two. Claim 19 In claim 15, the sensor layer comprises a plurality of electrodes each extending along a first direction and arranged along a second direction intersecting the first direction, and a plurality of intersecting electrodes each extending along the second direction and arranged along the first direction, and each of the plurality of channels extending along the first direction and arranged along the second direction, an electronic device. Claim 20 In claim 19, the sensor driving unit is selectively driven in a first mode that detects a passive input through a change in mutual capacitance formed between the plurality of electrodes and the plurality of cross electrodes, or in a second mode that detects an active input through a change in capacitance of at least one of the plurality of electrodes and the plurality of cross electrodes, and the first mode and the second mode include the uplink sections.

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