Sn-Bi-In based low-melting-point bonding member and method of manufacturing the same, and semiconductor electronic circuit and method of mounting the same

Abstract

The present invention provides a Sn-Bi-In based low-melting point bonding member and a method for manufacturing the same, which are used in a Pb-free conductive bonding method for mounting semiconductor components and can be used for low-temperature bonding. The Sn-Bi-In based low-melting point bonding member comprises a Sn-Bi-In alloy having a composition within the range of a first rectangle with four vertices, points 1 (1, 69, 30), 2 (26, 52, 22), 3 (40, 10, 50), and 4 (1, 25, 74), and having a temperature of 60 to 110°C, wherein the point where Sn is x mass%, Bi is y mass%, and In is z mass% is denoted as (x, y, z) in the Sn-Bi-In ternary phase diagram. A method for manufacturing a Sn-Bi-In low-melting-point bonded member having a plating process that forms a plating laminate on a workpiece, the laminate comprising Sn plating, Bi plating, and In plating, respectively, so as to have a composition within the range of the first square.

Description

Technology Field

[0001] The present invention relates to lead-free solder materials for semiconductor mounting, and in particular to Sn-Bi-In based low-melting-point bonding members usable in low-temperature regions and a method for manufacturing the same. It also relates to semiconductor electronic circuits using these materials and a method for mounting the same. Background Technology

[0002] Recently, as regulations on hazardous substances to the environment have become increasingly strict due to RoHS regulations and other factors, solder alloys used to bond electronic components, including semiconductor chips, to printed circuit boards (PWBs) are also subject to regulation. Since lead (Pb) has traditionally been used as a main component in these solders, the development of lead-free solder alloys (hereinafter also referred to as Pb-free solder alloys) is actively underway.

[0003] Conductive bonding materials, such as solder alloys used to bond electronic components to printed circuit boards, are broadly classified into high-temperature (approx. 260°C to 400°C) and medium-low-temperature (approx. 140°C to 230°C) types depending on their operating temperature limit. Among these, low-temperature solder alloys generally refer to solder alloys with a melting point lower than 183°C, which is the melting point of the Pb-63Sn eutectic alloy.

[0004] However, recently, some electronic components, such as flexible resin substrates or piezoelectric ceramic PZT (lead zirconate titanate) substrates, have very low heat resistance, and their functionality deteriorates or is destroyed when exposed to high temperatures. Since the bonding temperature during mounting of such electronic components needs to be low, such as 135°C or lower, preferably 120°C or lower, and more preferably 110°C or lower, solder alloys for low temperatures with lower melting points are required.

[0005] In addition, as cost per function is reduced due to the miniaturization of CMOS technology, high integration is currently being achieved in the packaging process as well, with miniaturized chips being integrated at the package level, resulting in a large number of chips per unit area, multilayering, and complex structures. Bonding methods in packaging are also advancing from lead wires to solder balls and solder bump bonding, and there is a demand for simpler and lower-cost solder bonding during packaging.

[0006] Conventionally, Sn-3.5Ag (melting point = 221°C), Sn-0.7Cu (melting point = 227°C), and Sn-Ag-Cu (melting point = 217°C) have been used as Pb-free solders. However, these solder alloys have melting points of 200°C or higher, making it difficult to use them at soldering temperatures of 135°C or lower during semiconductor mounting.

[0007] As a Pb-free solder alloy for low temperature applications, Patent Document 1 describes a solder alloy for low temperature joining comprising 37 to 47 mass% Sn, 0.1 mass% or more of Ag or less than 1.0 mass%, and the remainder being Bi.

[0008] Patent Document 2 describes a solder alloy composed of 40 mass% Sn, 55 mass% Bi, and 5 mass% In, or a solder alloy composed of 34 mass% Sn, 46 mass% Bi, and 20 mass% In. It also describes a solder powder formed by spherically shaping the above solder alloy, a solder paste, and a soldering method using these.

[0009] Patent document 3 describes a method for forming a Sn-In-Bi solder alloy plating layer, wherein a first layer of tin / indium is first plated, a second layer of bright tin / bismuth is then plated on the tin / indium layer, and the first and second plating layers are subsequently reflowed. Prior art literature

[0010] Japanese Patent Publication No. 3347512 Japanese Patent Publication No. 3224185 Japanese Patent Publication No. 2001-219267 The problem to be solved

[0011] The Sn-Bi-Ag solder alloy described in Patent Document 1 has a melting point of 137 to 139°C. Since the bonding temperature during mounting is often required to be about the melting point plus 20°C, the bonding temperature during mounting must be 157°C or higher, and bonding cannot be performed at 135°C or lower.

[0012] Regarding the Sn-Bi-In solder alloy described in Patent Document 2, since its melting point is 117 to 139°C, a bonding temperature of 137°C or higher is required during mounting, and bonding cannot be performed at 135°C or lower. Furthermore, the solder alloy in question is manufactured by mixing three types of metals—Sn, Bi, and In—and heating and melting them in an electric furnace (400°C). Since it requires the process of "mixing metals → heating and melting" and the subsequent process of "grinding → forming solder paste" to produce the solder material, productivity is insufficient. Additionally, only the plating process of the solder alloy on the surface of the workpiece is described, but the details of the plating process are not shown.

[0013] The Sn-In-Bi plating method described in Patent Document 3 uses two types of two-component plating baths, so it is necessary to replenish the two components consumed during plating, which makes the operation and management of the plating bath cumbersome and makes it difficult to stabilize the composition of the plated material. In addition, since the composition of the components in the plating bath is limited, it is expected that the range of the composition of the plated laminate will be limited. Furthermore, in the composition range of the solder alloy described in the document, the melting point is 180 to 220°C, so the described reflow temperature is very high at around 260°C, and bonding cannot be performed at a bonding temperature of 135°C or lower during mounting.

[0014] As described above, recently, regulations on hazardous substances such as RoHS regulations have become strict, and since Pb-containing solder alloys, which have been used as conductive bonding materials in the manufacturing process of semiconductor products, are also subject to regulation, there is a need to switch to Pb-free solder alloys.

[0015] Furthermore, as integrated circuits advance in miniaturization, there is a demand for cost reduction, such as improvements in the precision of miniaturization of bonding methods during mounting and enhanced process simplicity.

[0016] In addition, due to the demand for high functionality in smartphones and sensors, there is an expected increase in demand for low-heat-resistant wiring substrates and electronic devices, such as resin substrates used in flexible or stretchable substrates, piezoelectric devices, CdTe semiconductor devices, CCD devices, and holographic devices. Consequently, there is a need for the development of conductive bonding materials and bonding methods that enable low-temperature bonding (135°C or lower) in the mounting process.

[0017] The present invention has been made in consideration of such problems, and the objective of the present invention is to provide a low-melting point bonding member that can be used in a low-temperature bonding method capable of bonding at 135°C or lower, or a method for manufacturing the same. means of solving the problem

[0018] The melting points of conventional Pb-free conductive bonding materials, such as Sn-Ag, Sn-Cu, and Sn-Ag-Cu systems, are 200°C or higher, and the melting points of Sn-Bi and Sn-Bi-In systems are approximately 120°C or higher. Since the reflow temperature (bonding temperature) during mounting needs to be about 20°C higher than this, the reflow temperature is at least 140°C or higher, so it was not necessarily suitable for low-temperature bonding methods.

[0019] However, as a result of repeated careful examination, the inventors discovered that by depositing Sn-Bi-In onto the surface of a workpiece individually within a specific compositional range to form a low-melting-point plating laminate, and by using the plating laminate as is or by using a solder alloy bump formed by heating and reflowing the plating laminate to form a bump, the simplicity of the electronic component mounting process can be improved. They also discovered that low-temperature mounting of 135°C or lower is possible. Based on these findings, the present invention was completed.

[0020] That is, the gist of the present invention is as follows.

[0021] <1> A Sn-Bi-In low-melting-point bonding member comprising a Sn-Bi-In alloy having a melting point of 60 to 110°C, wherein the composition is within the range of a rectangle formed by four vertices of points 1 (1, 69, 30), 2 (26, 52, 22), 3 (40, 10, 50), and 4 (1, 25, 74), where Sn is x mass%, Bi is y mass%, and In is z mass% in a Sn-Bi-In ternary phase diagram.

[0022] <2> In the Sn-Bi-In ternary phase diagram, when the point where Sn is x mass%, Bi is y mass%, and In is z mass% is denoted as (x, y, z), the above Sn-Bi-In alloy is composed within the range of a rectangle with four vertices: point 1 (1, 69, 30), point 2 (26, 52, 22), point 3 (40, 10, 50), and point 4a (1, 57, 42). <1> Sn-Bi-In based low-melting point bonding member as described in

[0023] <3> In the Sn-Bi-In ternary phase diagram, when the point where Sn is x mass%, Bi is y mass%, and In is z mass% is denoted as (x, y, z), the Sn-Bi-In alloy has a composition within the range of a rectangle with four vertices: point 1 (1, 69, 30), point 2 (26, 52, 22), point 3a (35, 25, 40), and point 4b (1, 59, 40), and has a melting point of 69 to 110°C. <1> or <2> Sn-Bi-In based low-melting point bonding member as described in

[0024] <4> The above Sn-Bi-In alloy comprises one or more mixed components selected from the group consisting of Ag, Cu, Ni, Zn, and Sb, and the total mass of said mixed components in said Sn-Bi-In alloy is 0.001 to 3.0 mass%. <1> inside <3> Sn-Bi-In based low-melting point bonding member described in any one of the following.

[0025] <5> The Sn-Bi-In alloy disposed thereon on a film formed by depositing one or more undermetals selected from the group consisting of Ti, Ni, Cu, Au, Sn, Ag, Cr, Pd, Pt, W, Co, TiW, NiP, NiB, NiCo, and NiV as undermetals. <1> inside <4> Sn-Bi-In based low-melting point bonding member described in any one of the following.

[0026] <6> When the sum of Sn, Bi, and In is set to 100 mass%, the above Sn-Bi-In alloy is a composition containing 22-30 mass% Sn, 20-28 mass% Bi, and 42-58 mass% In, or a composition containing 15-19 mass% Sn, 43-51 mass% Bi, and 30-42 mass% In. <1> inside <5> Sn-Bi-In based low-melting point bonding member described in any one of the following.

[0027] <7> The above Sn-Bi-In alloy having a plating laminate having a plurality of layers with different concentrations of Sn, Bi, and In <1> inside <6> Sn-Bi-In based low-melting point bonding member described in any one of the following.

[0028] <8> The above-mentioned plating laminate has at least a SnIn layer comprising Sn and In and a BiIn layer comprising Bi and In. <7> Sn-Bi-In based low-melting point bonding member as described in

[0029] <9> The above Sn-Bi-In alloy is a solder alloy bump formed by heating and reflowing a plating laminate having multiple layers with different concentrations of Sn, Bi, and In. <1> inside <6> Sn-Bi-In based low-melting point bonding member described in any one of the following.

[0030] <10> The micro-member having the Sn-Bi-In alloy on the surface of any one micro-core material selected from the group consisting of micro-metal balls having a size of 1 mm or less, micro-resin balls having a coating layer of a conductive metal, micro-resin balls having a coating layer of a solder alloy, and micro-pin members. <1> inside <9> Sn-Bi-In based low-melting point bonding member described in any one of the following.

[0031] <11> The above micro-member mounted on the conductive joint <10> Sn-Bi-In based low-melting point bonding member as described in

[0032] <12> A method for manufacturing a Sn-Bi-In based low-melting-point bonded member having a plating process for forming a plated laminate on a workpiece, wherein Sn plating, Bi plating, and In plating are respectively performed to obtain a composition within the range of a rectangle with four vertices, such that Sn is x mass%, Bi is y mass%, and In is z mass% in a Sn-Bi-In ternary phase diagram, and (x, y, z) is the point where Sn is x mass%, Bi is y mass%, and In is z mass%.

[0033] <13> The above-mentioned plated object has a film formed of one or more undermetals selected from the group consisting of Ti, Ni, Cu, Au, Sn, Ag, Cr, Pd, Pt, W, Co, TiW, NiP, NiB, NiCo, and NiV, and the above-mentioned plating laminate is formed thereon. <12> Method for manufacturing a Sn-Bi-In based low-melting point bonded member as described in

[0034] <14> The plating initially performed on the above-mentioned workpiece is Sn plating or Bi plating, and the above-mentioned In plating is performed after the Sn plating and Bi plating are performed. <12> or <13> Method for manufacturing a Sn-Bi-In based low-melting point bonded member as described in

[0035] <15> The above-mentioned plating laminate comprises one or more mixed components selected from the group consisting of Ag, Cu, Ni, Zn, and Sb, wherein the total mass of said mixed components in said plating laminate is 0.001 to 3.0 mass%. <12> inside <14> A method for manufacturing a Sn-Bi-In based low-melting point bonded member as described in any one of the following.

[0036] <16> When the total of Sn, Bi, and In is set to 100 mass%, the above-described stacked plating layer is formed such that the composition comprises 22-30 mass% of Sn, 20-28 mass% of Bi, and 42-58 mass% of In, or 15-19 mass% of Sn, 43-51 mass% of Bi, and 30-42 mass% of In. <12> inside <15> A method for manufacturing a Sn-Bi-In based low-melting point bonded member as described in any one of the following.

[0037] <17> The above-mentioned workpiece is any one of the microcore materials selected from the group consisting of a micro metal ball having a size of 1 mm or less, a micro resin ball having a coating layer of a conductive metal, a micro resin ball having a coating layer of a solder alloy, and a micro pin member, and in the plating process, the microcore material is used to manufacture a micro member coated with the plating laminate. <12> inside <16> A method for manufacturing a Sn-Bi-In based low-melting point bonded member as described in any one of the following.

[0038] <18> The above disposed on the conductive junction <12> inside <17> A method for manufacturing a Sn-Bi-In low-melting point bonded member by heating and reflowing a Sn-Bi-In low-melting point bonded member manufactured by the method for manufacturing a Sn-Bi-In low-melting point bonded member described in any one of the above to form bumps.

[0039] <19> The above <1> inside <11> A semiconductor electronic circuit characterized by having a Sn-Bi-In low-melting point junction member as described in any one of the following.

[0040] <20> The above placed between the wiring board and the surface of the semiconductor chip <1> inside <11> A method for mounting a semiconductor electronic circuit by heating and reflowing a Sn-Bi-In based low-melting point bonding member described in any one of the above within a range of 80 to 135°C to bond the wiring substrate and the semiconductor chip using the Sn-Bi-In based low-melting point bonding member. Effects of the invention

[0041] The Sn-Bi-In based low-melting point bonding member of the present invention enables bonding at low temperatures, thereby providing excellent low-temperature mounting performance. Furthermore, the method for manufacturing the Sn-Bi-In based low-melting point bonding member of the present invention provides a method for manufacturing such a bonding member and allows for easy adjustment of the Pb-free composition. Brief explanation of the drawing

[0042] Figure 1 is a Sn-Bi-In ternary phase diagram according to the present invention. Figure 2 is a Sn-Bi-In ternary phase diagram according to the present invention. FIG. 3 is a conceptual diagram of the manufacturing process up to the formation of a solder alloy bump using the plating laminate of the present invention. Figure 4 is a conceptual diagram of a mounting process using a solder alloy bump with a plating laminate of the present invention. Figure 5 is the DSC measurement profile of Experimental Example 2. Figure 6 is the DSC measurement profile of Experimental Example 4. Figure 7 is the DSC measurement profile of Experimental Example 5. Figure 8 is the DSC measurement profile of Experimental Example 7. Figure 9 is the DSC measurement profile of Experimental Example 8. Figure 10 is the DSC measurement profile of Experimental Example 10. Figure 11 is the DSC measurement profile of Experimental Example 12. Figure 12 is the DSC measurement profile of Experimental Example 14. Figure 13 is the DSC measurement profile of Experimental Example 15. Figure 14 is the DSC measurement profile of Experimental Example 17. Figure 15 is the DSC measurement profile of Experimental Example 18. Figure 16 is the DSC measurement profile of Experimental Example 19. Figure 17 is the DSC measurement profile of Experimental Example 22. Figure 18 is the DSC measurement profile of Experimental Example 30. Figure 19 is the DSC measurement profile of Experimental Example 32. Figure 20 is the DSC measurement profile of Experimental Example 33. Figure 21 is the DSC measurement profile of Experimental Example 37. Figure 22 is the DSC measurement profile of Experimental Example 39. Figure 23 is the DSC measurement profile of Experimental Example 41. Figure 24 is an SEM image of the appearance of the plated laminate of Experimental Example 47. Figure 25 is a cross-sectional SEM-EDX of the plated laminate of Experimental Example 47. Figure 26 is an SEM image of the bump appearance of Experimental Example 47. Figure 27 is an SEM image of the bump appearance of Experimental Example 47. Figure 28 is a SEM-EDX of the bump cross-section of Experimental Example 47. Figure 29 is an SEM image of the appearance of the plated laminate of Experimental Example 48. Figure 30 is an SEM image of the bump appearance of Experimental Example 48. Figure 31 is an SEM image of the bump appearance of Experimental Example 48. Figure 32 is an SEM image of the appearance of the plated laminate of Experimental Example 50. Figure 33 is an SEM image of the bump appearance of Experimental Example 50. Figure 34 is an SEM image of the bump appearance of Experimental Example 50. Figure 35 is a conceptual diagram of a shear strength tester. Figure 36 is a diagram showing the relationship between In concentration and bump shear intensity. Figure 37 is a photograph of the appearance of the plating laminate of micro metal balls of Experimental Example 58. Figure 38 is a photograph of the appearance of the plating laminate of the micro-resin ball of Experimental Example 59. Figure 39 is a photograph of the appearance of the plating laminate on the Cu pin of Experimental Example 60. Specific details for implementing the invention

[0043] The present invention is described in detail below. However, the present invention is not limited to the embodiments described below and may be implemented with various modifications within the scope of its gist. Furthermore, when the expression “~” is used in this specification, it is used to mean an expression that includes the numerical values ​​or physical properties before and after it.

[0044] <Sn-Bi-In계 저융점 접합 부재>

[0045] The Sn-Bi-In low-melting-point bonding member of the present invention comprises a Sn-Bi-In alloy having a melting point of 60 to 110°C, and a composition within the range of a rectangle formed by four vertices: point 1 (1, 69, 30), point 2 (26, 52, 22), point 3 (40, 10, 50), and point 4 (1, 25, 74), where Sn is x mass%, Bi is y mass%, and In is z mass% in the Sn-Bi-In ternary phase diagram, as denoted as (x, y, z). Hereinafter, "the Sn-Bi-In low-melting-point bonding member of the present invention" may be simply referred to as "the bonding member of the present invention."

[0046] The bonding member of the present invention can be bonded at a low temperature, so it has excellent low-temperature mounting performance.

[0047] [Sn-Bi-In alloy]

[0048] FIGS. 1 and 2 are drawings for explaining the Sn-Bi-In ternary phase diagram regarding the bonding member of the present invention and the manufacturing method of the present invention. The Sn-Bi-In alloy used in the bonding member according to the present invention controls the concentrations of Sn (tin), Bi (bismuth), and In (indium) within the range of a rectangle with four vertices, where Sn is x mass%, Bi is y mass%, and In is z mass% in the Sn-Bi-In ternary phase diagram, and the point (x, y, z) is where Sn is x mass%, Bi is y mass%, and In is z mass%.

[0049] Below, a quadrilateral with four vertices, points 1, 2, 3, and 4, is sometimes referred to as the first quadrilateral.

[0050] By using a Sn-Bi-In alloy with a composition within the range of the first square (hereinafter simply referred to as "Sn-Bi-In alloy") as a bonding member, it is possible to significantly contribute to the realization of low-temperature mounting of integrated circuits. By using a composition within the range of the first square, the melting point of the Sn-Bi-In alloy can be stably set to 60 to 110°C. This enables bonding by heated reflow in a low-temperature region of 135°C or lower, making it suitable for low-temperature mounting. Furthermore, since processing can be performed at low temperatures, the energy consumed during mounting can also be reduced. Additionally, if plating is used, the energy consumed for heat treatment during manufacturing can also be reduced.

[0051] The first square is defined by the four sides of the line connecting point 1 (1, 69, 30) and point 4 (1, 25, 74), the line connecting point 1 (1, 69, 30) and point 2 (26, 52, 22), the line connecting point 2 (26, 52, 22) and point 3 (40, 10, 50), and the line connecting point 3 (40, 10, 50) and point 4 (1, 25, 74). Within this range, it becomes a Sn-Bi-In alloy with a highest melting point of 60 to 110°C.

[0052] In the case of the outer side (lower side in FIG. 1 and 2) of the line connecting point 1 (1, 69, 30) and point 4 (1, 25, 74), Sn is not included, and wettability with the plated or joined workpiece is reduced, resulting in reduced bonding strength or bonding durability. In addition, the inclusion of a small amount of Sn makes it easier to obtain a melting point of 110°C or lower, making it easier to prepare Sn-Bi-In alloys with a melting point of 60 to 110°C.

[0053] In the case of the area outside the line connecting point 1 (1, 69, 30) and point 2 (26, 52, 22) (the right side in FIG. 1 and 2), the melting point is raised by residual Bi, as shown in the examples described later. For example, in Experimental Examples 36 and 37, an endothermic peak occurred at 271°C near the Bi melting point.

[0054] In the case of the area outside the line connecting point 2 (26, 52, 22) and point 3 (40, 10, 50) (the upper side in FIG. 1 and 2), as shown in the examples described later, the melting point is increased by the residual Sn-Bi alloy and residual Bi. Also, the melting point is increased by the residual Sn. For example, in Experimental Example 38, an endothermic peak occurred at 136°C near the melting point of Sn-58Bi and at 271°C near the melting point of Bi. Also, in Experimental Example 39, an endothermic peak occurred at 232°C near the melting point of Sn, and in Experimental Example 40, an endothermic peak occurred at 220°C near the melting point of Sn.

[0055] In the case of the area outside the line connecting point 3 (40, 10, 50) and point 4 (1, 25, 74) (left side in FIG. 1 and 2), the melting point increases, as shown in the examples described later. For example, in Experimental Example 41, an endothermic peak of 128°C was observed, which is thought to be due to the residue of an In-Sn composite with a high proportion of In. In addition, the proportion of relatively expensive In increases, raising costs and reducing versatility.

[0056] In addition, the mass concentration of the ternary phase diagram described above is the concentration of each component of Sn, Bi, and In when the sum of Sn, Bi, and In is converted to 100 mass% in the Sn-Bi-In alloy portion, such as the plating layer, solder alloy bump, or the coating layer of the microcore material described later.

[0057] In the Sn-Bi-In ternary phase diagram, when the point where Sn is x mass%, Bi is y mass%, and In is z mass% is denoted as (x, y, z), it is preferable that the Sn-Bi-In alloy has a composition within the range of a rectangle with four vertices: point 1 (1, 69, 30), point 2 (26, 52, 22), point 3 (40, 10, 50), and point 4a (1, 57, 42).

[0058] Below, a quadrilateral with four vertices, points 1, 2, 3 and 4a, is sometimes referred to as the second quadrilateral.

[0059] By using a bonding member comprising a Sn-Bi-In alloy with a composition within the range of the second rectangle, as described below in the examples, the adhesive strength of the bonding member comprising a conventional Pb-free solder alloy (Sn2.5Ag, Sn3.2Ag, Sn58Bi alloy, etc.) is 3.3 mg / μm 2 A bonded member having superior adhesive strength can be obtained. By using a bonded member comprising a Sn-Bi-In alloy with a composition within the range of the second square, the bonding reliability becomes even superior.

[0060] The melting point of the Sn-Bi-In alloy used in the bonding member of the present invention is 60°C to 110°C. The melting point of the Sn-Bi-In alloy is preferably 65°C to 110°C, and more preferably 69°C to 110°C. Electronic products using solder alloys as conductive bonding materials for mounting semiconductor electronic components are used under normal usage environments where seasonal fluctuations, indoor and outdoor environments, and self-heating due to the operation of electronic products occur. For this reason, when the melting point is around 60°C to 62°C, there is a concern that the bonding strength may decrease and the durability may be insufficient.

[0061] In addition, in this invention, "melting point" refers to the top temperature of the endothermic peak when measured by DSC, as described in the examples below. Also, if there are multiple endothermic peaks, the lowest temperature among the top temperatures of the endothermic peaks is treated as the lowest melting point (solidus temperature), and the highest temperature is treated as the highest melting point (liquidus temperature).

[0062] In DSC measurements, the melting point of the Sn-Bi-In alloy from the lowest melting point (solidus temperature) to the highest melting point (liquidus temperature) is observed in a temperature range of 60°C to 110°C, preferably in a temperature range of 65°C to 110°C, and more preferably in a temperature range of 69°C to 110°C.

[0063] In terms of adhesive strength or melting point, the Sn-Bi-In alloy is preferably composed within the range of a rectangle with vertices of four points: point 1 (1, 69, 30), point 2 (26, 52, 22), point 3a (35, 25, 40), and point 4b (1, 59, 40), where Sn is x mass%, Bi is y mass%, and In is z mass% in the Sn-Bi-In ternary phase diagram (x, y, z), and has a melting point of 69 to 110°C.

[0064] Below, a quadrilateral with four vertices, points 1, 2, 3a, and 4b, is sometimes referred to as the third quadrilateral.

[0065] Sn-Bi-In alloys with a composition within the range of the third square can have a stable melting point of 69 to 110°C and can be joined by heated reflow in the low-temperature range of 90 to 135°C, making them suitable for low-temperature mounting. In addition, the joining reliability is excellent.

[0066] In DSC measurement of Sn-Bi-In alloys, exhibiting DSC measurement profiles such as (a) to (c) below allows for a narrow temperature range of the melting point (solidus temperature to liquidus temperature) that appears as an endothermic peak, thereby enabling a shorter heating reflow time during mounting and also allowing for the expectation of improved bonding reliability.

[0067] (a) Showing a solitary endothermic peak

[0068] (b) Even if multiple endothermic peaks are present, the height of the other endothermic peaks is 1 / 10 or less of the height of the largest endothermic peak.

[0069] (c) Even if multiple endothermic peaks with large endothermic peak heights are present, the difference in top temperatures of the endothermic peaks with large endothermic peak heights is within 5℃.

[0070] From the perspective of shortening the heating reflow time during mounting or bonding reliability, a Sn-Bi-In alloy with a composition containing 22-30 mass% Sn, 20-28 mass% Bi, and 42-58 mass% In (composition within the range of A in FIG. 2) when the total of Sn, Bi, and In is 100 mass%, or a Sn-Bi-In alloy with a composition containing 15-19 mass% Sn, 43-51 mass% Bi, and 30-42 mass% In (composition within the range of B in FIG. 2) may be used.

[0071] When the total of Sn, Bi, and In is 100 mass%, a Sn-Bi-In alloy containing 22-30 mass% of Sn, 20-28 mass% of Bi, and 42-58 mass% of In exhibits a large endothermic peak height in the range of 60-65°C in DSC measurements.

[0072] For example, as shown in Experimental Example 32 or Experimental Example 33, even when multiple endothermic peaks are observed, there is only one endothermic peak with a large endothermic peak height. Furthermore, compared to this endothermic peak with a large endothermic peak height, the peak height of other endothermic peaks is less than one-tenth. In the Sn-Bi-In alloy of 23 mass% Sn, 28 mass% Bi, and 49 mass% In shown in Experimental Example 32, a shoulder peak with a small endothermic peak height is observed at 70°C, and the only endothermic peak with a large endothermic peak height is the one observed at 61°C. Also, in the Sn-Bi-In alloy of 29 mass% Sn, 21 mass% Bi, and 50 mass% In shown in Experimental Example 33, a shoulder peak on the tailing phase is observed at 72°C, and the only endothermic peak with a large endothermic peak height is the one observed at 60°C.

[0073] In addition, even if multiple endothermic peaks with large endothermic peak heights are present, the difference in the top temperatures of the endothermic peaks is within 5°C. In the Sn-Bi-In alloy of 29 mass% Sn, 25 mass% Bi, and 46 mass% In shown in Experimental Example 17, endothermic peaks with large endothermic peak heights are observed at 60°C and 61°C, and the difference in top temperatures of these peaks is within 5°C. In the Sn-Bi-In alloy of 27 mass% Sn, 26 mass% Bi, and 47 mass% In shown in Experimental Example 19, endothermic peaks with large endothermic peak heights are observed at 60°C and 63°C, and the difference in top temperatures of these peaks is within 5°C.

[0074] When the total of Sn, Bi, and In is 100 mass%, a Sn-Bi-In alloy containing 15-19 mass% of Sn, 43-51 mass% of Bi, and 30-42 mass% of In exhibits a large endothermic peak height in the range of 80-85°C in DSC measurements.

[0075] For example, as shown in Experimental Example 7 or Experimental Example 8, even when multiple endothermic peaks are observed, the peak height of other endothermic peaks is less than one-tenth of that of the endothermic peak having a large endothermic peak height. In the Sn-Bi-In alloy of 17 mass% Sn, 51 mass% Bi, and 32 mass% In shown in Experimental Example 7, an endothermic peak with a small endothermic peak height is observed at 70°C, and the only endothermic peak with a large endothermic peak height is the one observed at 83°C. In the Sn-Bi-In alloy of 19 mass% Sn, 48 mass% Bi, and 33 mass% In shown in Experimental Example 8, endothermic peaks with small endothermic peak heights are observed at 70°C and 108°C, and the only endothermic peak with a large endothermic peak height is the one observed at 82°C. Also, in the Sn-Bi-In alloy of 17 mass% Sn, 45 mass% Bi, and 38 mass% In shown in Experimental Example 10, a single endothermic peak is observed at 83°C.

[0076] (Mixed ingredients)

[0077] The Sn-Bi-In alloy may include a mixed component appropriately added for the purpose of improving physical properties such as smoothness or adhesion of the film of the laminated plating layer, within a range where the melting point does not exceed 110°C.

[0078] For example, the Sn-Bi-In alloy may be an alloy comprising one or more mixed components selected from the group consisting of Ag, Cu, Ni, Zn, and Sb, wherein the ratio of the total mass of the mixed components in the Sn-Bi-In alloy (total mass of mixed components / mass of Sn-Bi-In alloy) is in the range of 0.001 to 3.0 mass%. The ratio of the total mass of the mixed components in the Sn-Bi-In alloy may be 0.005 mass% or more, 0.01 mass% or more, 0.05 mass% or more, or 0.1 mass% or more. In addition, the ratio of the total mass of the mixed components in the Sn-Bi-In alloy may be 2.5 mass% or less, 2.0 mass% or less, 1.5 mass% or less, or 1.0 mass% or less.

[0079] In addition, to use it as Pb-free, it is desirable to reduce the amount of Pb mixed in, and the concentration of Pb in the Sn-Bi-In alloy is preferably 0.1 mass% or less, 0.05 mass% or less, and more preferably 0.01 mass% or less. It is even more desirable that the Pb is below the lower detection limit.

[0080] In addition, Sn-Bi-In alloys may contain impurities that are inevitably included due to the raw materials or manufacturing process. Examples of such impurities include Fe (iron) and C (carbon).

[0081] In addition, the ratio of the total amount of Sn, Bi, and In to the Sn-Bi-In alloy (total mass of Sn, Bi, and In / total mass of Sn-Bi-In alloy) is preferably 70 mass% or more, more preferably 80 mass% or more, even more preferably 90 mass% or more, and particularly preferably 95 mass% or more. It may also be 97 mass% or more, 98 mass% or more, or 99 mass% or more.

[0082] (Plating laminate)

[0083] The Sn-Bi-In alloy can form a plating laminate having multiple layers with different concentrations of Sn, Bi, and In. That is, the bonding member of the present invention may have a composition within the range of the first rectangle and may have a stacked plating layer having multiple layers with different concentrations of Sn, Bi, and In. As described in the manufacturing method of the present invention, the bonding member of the present invention can be obtained by forming the plating laminate on the surface of a substrate or a microcore material.

[0084] The Sn-Bi-In alloy can form a plated laminate having a SnIn layer in which In is diffused into a layer formed by Sn plating and / or a BiIn layer in which In is diffused into a layer formed by Bi plating. For example, it can be a plated laminate having a SnIn layer containing at least Sn and In, and a BiIn layer containing Bi and In. By having an alloy layer of SnIn and / or BiIn layers, it can be made to have a low melting point of 60 to 110°C, which is significantly lower than the melting points of Sn, Bi, and In individually. Furthermore, the plated laminate will be described in detail in the manufacturing method of the present invention.

[0085] (Solder alloy bump)

[0086] Sn-Bi-In alloys can form solder alloy bumps. For example, solder alloy bumps can be formed by heat-reflowing a plating laminate having multiple layers with different concentrations of Sn, Bi, and In. By heat-reflowing a plating laminate formed on a substrate, a bonded member having a substrate and a solder alloy bump formed on the substrate made of a Sn-Bi-In alloy can be obtained.

[0087] (Coating layer of microcore material)

[0088] The Sn-Bi-In alloy can form a coating layer covering the surface of any one of the microcore materials selected from the group consisting of micro metal balls having a size of 1 mm or less, micro resin balls having a coating layer of a conductive metal, micro resin balls having a coating layer of a solder alloy, and micro pin members. The coating of the microcore material may be applied by plating or by coating with the Sn-Bi-In alloy.

[0089] [Joining Member]

[0090] Since Sn-Bi-In alloys have a melting point in the range of 60 to 110°C, they melt when heated above that melting point and remain solid below that melting point and at room temperature of about 20 to 30°C. In this invention, a plating laminate or solder alloy bump made of Sn-Bi-In alloy functions as a joining member, and thus, a plating laminate or solder alloy bump formed as a joining member is used to join to a workpiece, and is referred to as a joining member.

[0091] In addition, the joining member of the present invention may be provided with a microcore material coated with Sn-Bi-In alloy as a joining part to join with a workpiece.

[0092] The bonding member of the present invention may be the plating laminate itself made of Sn-Bi-In alloy, or the solder alloy bump itself made of Sn-Bi-In alloy.

[0093] The bonding member of the present invention may comprise a substrate and a Sn-Bi-In alloy (plated laminate or solder alloy bump) formed on the substrate. For example, the bonding member of the present invention may comprise a substrate having an under-metal layer comprising one or more under-metals selected from the group consisting of Ti, Ni, Cu, Au, Sn, Ag, Cr, Pd, Pt, W, Co, TiW, NiP, NiB, NiCo, and NiV, and a Sn-Bi-In alloy disposed on the under-metal layer. Examples of substrates having an under-metal layer include semiconductor chips.

[0094] The bonding member of the present invention may have a micro-member having a Sn-Bi-In alloy (a coating layer made of a plating laminate or a solder alloy) on the surface of a micro-core material. Alternatively, the bonding member may be a micro-member having a Sn-Bi-In alloy on the surface of a micro-core material disposed on a substrate, etc. For example, by mounting a micro-member, in which the micro-core material is coated with a plating laminate, onto a conductive junction of a substrate provided with a conductive junction and performing heat reflow, a bonding member having a substrate provided with a conductive junction and a micro-member (micro-member mounted bump) mounted on the conductive junction can be obtained.

[0095] As a member for forming a plated laminate or a solder alloy bump, or a member for arranging a microcore material or a micro-member whose surface of the microcore material is coated with Sn-Bi-In alloy, a plated material described in the manufacturing method of the present invention may be used.

[0096] <Sn-Bi-In계 저융점 접합 부재의 제조 방법>

[0097] The bonding member of the present invention can be obtained, for example, by a method of producing a Sn-Bi-In low-melting point solder alloy by mixing and melting each raw metal of a Sn-Bi-In alloy, or by a method of forming a low-melting point plating laminate by plating three components separately on the surface of a workpiece such that the Sn-Bi-In concentration is within a predetermined compositional range (plating lamination method), or by a method of producing a Sn-Bi-In low-melting point solder alloy bump by heating and reflowing the plating laminate.

[0098] Among these, the method using low-melting-point plating laminates is industrially useful because it is easy to adjust the composition and can perform Sn-Bi-In alloying and bumping at once, thus offering excellent simplicity and bonding reliability.

[0099] <Manufacturing method of the present invention>

[0100] The Sn-Bi-In low-melting-point bonding member of the present invention is preferably manufactured by a method for manufacturing a Sn-Bi-In low-melting-point bonding member having a plating process that forms a plating laminate on a workpiece, the laminate comprising a stacked plating layer obtained by performing Sn plating, Bi plating, and In plating respectively so as to have a composition within the range of a first rectangle (hereinafter, this manufacturing method may be described as the "manufacturing method of the present invention").

[0101] The manufacturing method of the present invention allows for easy adjustment of the Pb-free composition. Furthermore, by depositing each element by plating, reproducibility of the composition of the plated laminate is obtained, and it is easy to arbitrarily control the composition to be within the compositional range of the Sn-Bi-In system according to the present invention.

[0102] In the present invention, the configurations corresponding to each of the respective inventions of the bonding member and the manufacturing method of the present invention can be used with each other.

[0103] Below, the materials and each process used in the manufacturing method of the present invention will be described.

[0104] [Plating]

[0105] The workpiece is a component on which a plating layer is formed. In addition, since solder alloying is possible by heating and reflowing the plating layer formed on the substrate, the workpiece may also be a component on which solder bumps are formed.

[0106] (Circuit board)

[0107] Examples of materials to be plated include semiconductor electronic components such as LSIs or semiconductor chips, or substrates such as wiring boards, such as printed circuit boards, used to form circuits or modules by mounting multiple semiconductor electronic components. Depending on the requirements, these materials may be used with their surfaces patterned with the necessary conductive junctions (pads) by photolithography or the like.

[0108] (Formation of Under Metal)

[0109] In addition, the workpiece may be a substrate having one or more undermetals selected from the group consisting of Ti (titanium), Ni (nickel), Cu (copper), Au (gold), Sn (tin), Ag (silver), Cr (chromium), Pd (palladium), Pt (platinum), W (tungsten), Co (cobalt), TiW (titanium-tungsten), NiP (nickel-phosphorus), NiB (nickel-boron), NiCo (nickel-cobalt), and NiV (nickel-vanadium), deposited as needed on the surface of a substrate having a patterned conductive junction (e.g., a substrate having an undermetal layer). These undermetals may be used individually or in a stacked manner. The undermetal deposition method may be appropriately selected and used from deposition, PVD, plating, etc. The film thickness of the deposition may be set as needed within the range of 0.01 to 10 μm.

[0110] (Formation of a challenging post)

[0111] In addition, as integrated circuits become more miniaturized, it is also possible to use a workpiece formed on an under-metal layer as a plated object, wherein cylindrical conductive posts are formed to prevent short circuits during mounting (heated reflow) by arranging solder alloys of conductive bonding materials at narrow intervals (narrow pitch). As the material for the cylindrical posts, conductive metals such as Cu, Ag, and Ni can be selected at the appropriate time. For the formation of the cylindrical posts, an applicable method such as PVD or plating can be selected and used at the appropriate time. The height of the cylindrical posts is typically in the range of 1 to 200 μm, and can be set at the appropriate time as needed.

[0112] (Miso Core Material)

[0113] As described below, any one of the microcore materials selected from the group consisting of a micro metal ball with a size of 1 mm or less, a micro resin ball having a coating layer of a conductive metal, a micro resin ball having a coating layer of a solder alloy, and a micro pin member may be used as the workpiece. By making these the workpieces, a bonded member of a micro member can be obtained.

[0114] It is possible to use micro balls, which are used as core balls for conductive bonding materials such as ball grid arrays (BGA), as the workpiece. The micro balls have a diameter of 1 mm or less, and micro metal balls or micro resin balls can be used. In particular, micro resin balls are used as core ball materials effective for reducing the weight of electronic circuit components and relieving thermal stress (allowing for elastic deformation).

[0115] As for the micro metal ball, any conductive metal sphere such as a Cu, Ni-Co-Fe alloy or Ni-Fe alloy with a diameter of 0.05 to 1.0 mm can be used. Additionally, if necessary, a micro metal ball with a conductive coating of Ni, Cu, solder, etc., with a thickness of 0.1 to 30 μm applied to its surface can also be used.

[0116] As micro-resin balls, any general resin capable of being formed into micro-balls, such as acrylic resin, polypropylene resin, vinyl chloride resin, polyphenylene sulfide, or divinylbenzene cross-linked polymer with a diameter of 0.05 to 1.0 mm, can be used. In addition, since these micro-resin balls are non-conductive, a version is used in which the surface is coated with a conductive metal or alloy, such as Ni, Cu, or solder, with a thickness of about 0.5 to 5.0 μm by electroless plating or the like.

[0117] Furthermore, the core material is not limited to a ball shape, and micro-pins such as cylindrical, prismatic, conical shapes, or shapes with their angles chamfered can be used. Micro-pins may be micro-metal pins or micro-resin pins having materials or sizes equivalent to the micro-metal balls or micro-resin balls described above. Additionally, in the case of micro-pins, the smallest side is defined as equivalent to the diameter of the micro-metal ball or micro-resin ball.

[0118] [Surface cleaning and drying of plated objects]

[0119] The purpose of surface cleaning of a plated workpiece is to clean the surface by removing contaminants, and a solvent capable of removing such contaminants is selected and used. Examples of organic solvents include lower alcohols such as methanol, ethanol, and isopropyl alcohol, and ketones such as acetone, methyl ethyl ketone (MEK), and isobutyl ketone (MIBK). Examples of aqueous solvents include the combined use of hydrogen peroxide with ammonia and organic amine compounds, as well as aqueous solutions to which anionic, cationic, or nonionic surfactants are added. Among these solvents, one is selected and used at the appropriate time, taking into consideration that it does not interfere with the material of the plated workpiece.

[0120] The surface of the plated workpiece is cleaned within the range of room temperature to 100°C by methods such as immersion in the solvent or shower cleaning in the solvent. After solvent cleaning, the solvent components attached to the surface are rinsed with water to clean the surface.

[0121] Next is the drying of the workpiece, which can be done by heating or air drying in the range of room temperature to 100°C. Alternatively, the drying process can be omitted and the process can proceed to the next plating process.

[0122] [Plating Process]

[0123] The plating process is a process of forming a plated laminate on a workpiece, comprising a stacked plating layer obtained by performing Sn plating, Bi plating, and In plating respectively so that the composition is within the range of a first rectangle.

[0124] In carrying out the manufacturing method of the present invention, the plating method for forming each layer may be either electrolytic plating or electroless plating, but electrolytic plating is preferred when considering the plating time and productivity.

[0125] To describe the plating apparatus that can be used, using the case of electroplating as an example, a plating apparatus can be used in which a plating tank made of a material having corrosion resistance for each plating solution used is equipped with stirring functions such as stirring blades, shaking, and squeegee stirring, and a rectifier capable of controlling the current value within a predetermined range, and a soluble anode or an insoluble anode is used as the anode and a workpiece to be plated is set as the cathode.

[0126] In the plating process, at least Sn plating, Bi plating, and In plating are performed. Additionally, Sn plating, Bi plating, and In plating are performed by appropriately adjusting the concentration of each plating solution or the immersion time of the plating solution so that the composition of Sn, Bi, and In in the formed plating laminate is within the range of the first rectangle.

[0127] In the plating process, it is preferable to perform Sn plating, Bi plating, and In plating so that the composition of Sn, Bi, and In in the plating laminate is within the range of the second square. It is also more preferable to perform Sn plating, Bi plating, and In plating so that a plating laminate is formed having a composition within the range of the third square and a melting point of 69 to 110°C.

[0128] In addition, Sn plating, Bi plating, and In plating may be performed so that the composition is 100 mass% when the total of Sn, Bi, and In in the formed plating layer is 22 to 30 mass% of Sn, 20 to 28 mass% of Bi, and 42 to 58 mass% of In. In addition, Sn plating, Bi plating, and In plating may be performed so that the composition is 15 to 19 mass% of Sn, 43 to 51 mass% of Bi, and 30 to 42 mass% of In.

[0129] The plating methods for Sn, Bi, and In, respectively, are exemplified below.

[0130] (Sn plating)

[0131] Sn plating is a plating process performed using a plating solution containing Sn as the primary component for plating the workpiece. Commercially available Sn plating solutions may be used; examples include Sn plating solutions from Ishihara Chemical. As for plating conditions, for instance, under stirring using stirring blades, agitation, or squeegee stirring, the temperature is 5–50°C, the Sn ion concentration in the solution is 1–70 g / L, and the current density is 0.1–20.0 A / dm². 2 It can be arbitrarily set within the range. The amount of Sn plating can be controlled by the plating treatment time (immersion time in plating solution) under the set conditions.

[0132] (Bi plating)

[0133] Bi plating is a plating process performed using a plating solution containing Bi as the primary component for plating the workpiece. Commercially available Bi plating solutions may be used; examples include the Bi plating solution from Ishihara Chemical. As for plating conditions, for instance, under stirring using stirring blades, agitation, or squeegee stirring, the temperature is 5–50°C, the Bi ion concentration in the solution is 1–70 g / L, and the current density is 0.1–20.0 A / dm². 2It can be arbitrarily set within the range. The amount of Bi plating can be controlled by the plating treatment time (immersion time in plating solution) under the set conditions.

[0134] (In plating)

[0135] In plating is a plating process performed using a plating solution containing In as the primary component for plating the workpiece. Commercially available In plating solutions may be used; examples include solutions from Ishihara Chemical or EEJA. As for plating conditions, for instance, under stirring using stirring blades, agitation, or squeegee stirring, the temperature is 5–50°C, the In ion concentration in the solution is 1–70 g / L, and the current density is 0.1–20.0 A / dm². 2 It can be set arbitrarily within the range. The amount of plating can be controlled by the plating treatment time (immersion time in plating solution) under the set conditions.

[0136] In addition, for these Sn plating, Bi plating, and In plating, a composite plating solution containing other plating components, such as optionally used mixed components, may be used. In a plating composition such as a plating solution, the total amount of other plating components relative to the main component ("total amount of other plating components (g / L)" / "main component (g / L)") is preferably 50 mass% or less, preferably 30 mass% or less, and preferably 20 mass% or less. For example, a Sn·Cu composite plating solution in which Cu, an optional mixed component, is mixed into a Sn plating solution, or a Sn·Ag composite plating solution in which Ag is mixed, may be used as a Sn plating solution in that it contains Sn as a main component. The same applies to Bi plating solutions and In plating solutions.

[0137] (Addition of trace metals)

[0138] For the purpose of improving physical properties such as smoothness and adhesion of the film of the laminated plating layer, one or more mixed components selected from the group consisting of Ag, Cu, Ni, Zn, and Sb may be added as needed, provided that the melting point of the obtained plating laminate does not exceed 110°C. The mixed components may be added such that the ratio of the total mass of the mixed components to the total mass of the plating laminate (total mass of mixed components / total mass of plating laminate) is 0.001 to 3.0 mass%. When adjusting the alloy components, these specific components can be mixed by alloying while containing a predetermined amount of the metal to be mixed. For example, the mixed components may be introduced into the film by adding them to a plating solution of Sn, Bi, or In so that the content of the mixed components in the Sn-Bi-In low-melting-point plating laminate of the target product is a predetermined amount. Alternatively, it is also possible to introduce them into the plating laminate by using a plating solution containing the mixed components themselves as a main component and plating them alone.

[0139] In addition, from the perspective of obtaining an alloy plating with a mixed component (additive metal) by adjusting the precipitation potential by means of a complexing agent, it is preferable to add the additive metal to the Sn plating solution or the Bi plating solution. The amount of these additive metals added into the Sn or Bi plating solution can be selected and used in a timely manner to reach a predetermined concentration in the obtained plating layer, within a concentration range of 1 / 1000 to 1 / 10 relative to the weight concentration of Sn or Bi.

[0140] (Plating layering order)

[0141] If Sn, Bi, and In plating are all performed, the order of plating layers may be arbitrary. Specifically, any order is possible starting from the surface of the workpiece, such as Sn→Bi→In, Sn→In→Bi, Bi→Sn→In, Bi→In→Sn, In→Sn→Bi, or In→Bi→Sn.

[0142] To stably deposit Sn-Bi-In with a predetermined composition by electroplating, it is preferable to plate starting with the electrode having a high standard electrode potential and a low ionization tendency. For this reason, it is desirable to perform Sn plating or Bi plating as the initial plating on the workpiece, and to perform In plating after Sn and Bi plating. In other words, it is preferable to plate in the order of "Bi→Sn→In" or "Sn→Bi→In". Also, 25°C, 10 5 When the standard hydrogen electrode is referenced in Pascals (Pa), the standard electrode potentials are Bi=0.317V, Sn=-0.138V, and In=-0.338V. If In plating, which has the lowest potential among the three components, is performed as the first or second plating, In ionizes and leaches out in the electroplating bath during the plating operation of the next component, and the concentration in the plating layer of the final product is likely to drop below the set conditions. Therefore, it is desirable to perform In plating as the final plating, after Sn plating and Bi plating.

[0143] (Plating laminate)

[0144] The plating laminate is formed by sequentially plating each component, Sn, Bi, and In, individually. In cases where the mixed component is not included, or where the mixed component is added to any one of the Sn plating solution, Bi plating solution, and In plating solution, the plating laminate is a stacked plating layer obtained by performing Sn plating, Bi plating, and In plating, respectively. Furthermore, when performing single plating using a plating solution that contains the mixed component itself as a main component, or when introducing the mixed component, the plating laminate consists of a stacked plating layer obtained by performing Sn plating, Bi plating, and In plating, respectively, and a plating layer obtained by plating the mixed component alone.

[0145] As described above, the formed plating laminate has multiple layers with different concentrations of Sn, Bi, and In. For example, the formed plating laminate has a SnIn layer in which In is diffused into a layer formed by Sn plating, or a BiIn layer in which In is diffused into a layer formed by Bi plating.

[0146] The concentration of each element in the plated laminate can be determined by peeling the plated laminate from the plated object, dissolving it in acid, and then quantitatively analyzing it using a high-frequency inductively coupled plasma-luminescence analyzer. Each layer contains Sn, Bi, and In, which are the main metals of the layer; the SnIn layer contains Sn and In, and the BiIn layer contains Bi and In.

[0147] It is preferable that each layer be substantially composed of the metal element constituting the layer, but in addition to the metal element of the layer, it may also contain impurities that are inevitably included in the raw materials or manufacturing process. Examples of such impurities include Fe (iron) and C (carbon).

[0148] In addition, as described above, any additive element may be included as a mixed component, but it is desirable to reduce the amount of Pb mixed in order to use it as Pb-free. The concentration of Pb in the plated laminate is preferably 0.1 mass% or less, and more preferably 0.05 mass% or less, and 0.01 mass% or less. It is even more desirable that the Pb is below the lower detection limit.

[0149] (Sn layer)

[0150] The layer of Sn obtained by Sn plating is a layer containing Sn. The layer of Sn contains Sn as a main component, excluding In, and the concentration of Sn among the elements excluding In in this layer is preferably 70 mass% or more, more preferably 80 mass% or more, and even more preferably 90 mass% or more. This layer of Sn can be obtained by Sn plating.

[0151] In addition, the Sn layer may be a SnIn layer that also includes In. This SnIn layer may include Sn and In as the main components of the layer, and the total of Sn and In may be 70 mass% or more, 80 mass% or more, 90 mass% or more, or 95 mass% or more in the layer. The SnIn layer may include both, and the mass ratio of Sn to In may be 1:99 to 99:1, 5:95 to 95:5, 10:90 to 90:10, 20:80 to 80:20, etc.

[0152] (Bi's layer)

[0153] The layer of Bi obtained by Bi plating is a layer containing Bi. The layer of Bi contains Bi as a main component, excluding In, and the concentration of Bi in the elements excluding In in this layer is preferably 70 mass% or more, more preferably 80 mass% or more, and even more preferably 90 mass% or more. This layer of Bi can be obtained by Bi plating.

[0154] In addition, the Bi layer may be a BiIn layer that also includes In. This BiIn layer may include Bi and In as the main components of the layer, and the total amount of Bi and In may be 70 mass% or more, 80 mass% or more, 90 mass% or more, or 95 mass% or more in the layer. The BiIn layer may include both, and the mass ratio of Bi to In may be 1:99 to 99:1, 5:95 to 95:5, 10:90 to 90:10, 20:80 to 80:20, etc.

[0155] (In layer)

[0156] In, which is included in the stacked plating layer by In plating, tends to diffuse into the Sn layer or Bi layer during the plating process, so it is difficult to form a single layer with In as the main component, and it may be formed in the form of a SnIn alloy or a BiIn alloy.

[0157] (Number of plating layers)

[0158] The number of plating layers is not particularly limited, and at least two layers with different concentrations of Sn, Bi, and In are sufficient. Additionally, depending on the purpose of preventing alloying or diffusion of both components due to the interaction between the workpiece and the plating components, layers with different concentrations of the three components mentioned above can be formed, and stacking of three, four, or five layers is also possible.

[0159] (Washing and drying after each plating process)

[0160] The purpose of rinsing after each plating process is to remove the plating solution adhering to the surface of the workpiece when it is lifted from the plating bath, and to clean it by immersion in water or by rinsing with a water shower.

[0161] Afterward, drying can be performed at a temperature below the melting point of the plating laminate. After considering the melting point of the plating laminate, if the purpose is to remove moisture, heating drying or ventilation drying can be performed by setting the temperature appropriately within the range of room temperature to 100°C.

[0162] In addition, if residual moisture does not pose a problem in the next process, it is also possible to skip the drying process and proceed to the next step.

[0163] The plating laminate formed on the workpiece may be used as a bonding member in its plating laminate state. Alternatively, bumps may be formed using the plating laminate. Furthermore, the plating laminate may be spaced appropriately from the workpiece and used as a bonding member.

[0164] [Bumping Process]

[0165] As described above, the bonding member of the present invention may have solder alloy bumps or micro-member mounted bumps, and the manufacturing method of the present invention may include a bump formation process after the plating process. The bump formation process is a process of forming solder alloy bumps by heating and reflowing a plating laminate placed on a conductive bond, or a process of forming micro-member mounted bumps by heating and reflowing a micro-member (micro-core material coated with a plating laminate) placed on a conductive bond. Heating and reflowing is performed under a reducing atmosphere. Since the plating laminate with a composition within the range of the first square has a low melting point, it may be formed into bumps by heating and reflowing in a low temperature range of 80 to 135°C. From the perspective of bonding strength or durability, it may be a plating laminate with a composition within the range of the third square and a melting point of 69 to 110°C, and may be formed into bumps by heating and reflowing in a low temperature range of 90 to 135°C.

[0166] Generally, in the formation of bumps such as solder alloy bumps by heated reflow, uniform alloy composition, absence of surface irregularities, and uniform spherical or hemispherical shape properties are required. In addition, regarding mounting properties, the bonding strength with the plated object is 3 mg / μm 2 In addition, heat cycle durability, etc., are required. Preferably, the bonding strength with the plated workpiece is 3.3 mg / μm 2 That is all. Factors that adversely affect these required properties include the basic properties of the solder alloy itself, the natural oxide film of the alloy components before heating and reflow, and the attachment or incorporation of impurities.

[0167] It is desirable to use the "formic acid gas reduction method" for the purpose of removing the native oxide film at low temperatures during heated reflow. Generally, the methods for removing the native oxide film include the "formic acid gas reduction method" and the "hydrogen gas reduction method" described below. Since the reduction reaction occurs at 230°C or higher for the latter and around 150°C for the former, it is desirable to use the "formic acid gas reduction method," which is applicable to the low-temperature range and is superior in terms of safety, reliability, and cost. That is, it is desirable to perform the bump formation process under a formic acid gas atmosphere.

[0168] · Formic acid gas reduction method MeO + HCOOH → Me + CO2 + H2O

[0169] · Hydrogen gas reduction method MeO + H2 → Me + H2O

[0170] The conditions for heated reflow can be appropriately selected according to the melting point of the plating layer. For example, the "formic acid gas reduction method" can be used, and the conditions can be selected in a timely manner by considering the balance of the composition of the plating layer, within the range of reducing agent: formic acid, pressure: 20~400 mbar, heating rate: 10~150℃ / min, tower temperature: 70~110℃, and tower temperature holding time: 20~300 seconds. In addition, if the temperature range from the solidus temperature to the liquidus temperature of the plating layer is a high temperature range such as 69~110℃ or 80~85℃, the temperature of the heated reflow may be higher, and it may be performed within the range of reducing agent: formic acid, pressure: 20~400 mbar, heating rate: 10~150℃ / min, tower temperature: 80~135℃, and tower temperature holding time: 20~300 seconds. The bumps obtained in this way, such as solder alloy bumps, are suitable for low-temperature mounting because they allow for bonding in a low-temperature range of 80 to 135°C during heating and reflow temperature during mounting.

[0171] In addition, depending on the workpiece, other processes may be performed between the plating process and the bumping process. If the workpiece is a substrate having a resist film, a process for removing the resist film may be performed between the plating process and the bumping process. If the workpiece is a microcore material, since a micro-member in which the microcore material is coated with a plating laminate is obtained by performing the plating process, a bumping process may be performed after performing a process of placing this micro-member on the substrate.

[0172] Next, a more specific example of the manufacturing method of the present invention will be described.

[0173] [Formation of plating layers and solder alloy bumps on conductive joints]

[0174] A method for manufacturing a bonding member is described, wherein a plating laminate or solder alloy bump made of Sn-Bi-In alloy with a composition within the range of a first square is formed on a conductive bonding portion of a substrate on which a conductive bonding portion is patterned.

[0175] When forming a plating layer on a conductive joint, the manufacturing method of the present invention comprises a plating process and a resist film removal process. Also, when forming a solder alloy bump on a conductive joint, the manufacturing method of the present invention comprises a plating process, a resist film removal process, and a bump formation process.

[0176] (Plating process)

[0177] In the plating process, a plating layer is formed on a conductive junction. As the workpiece, a substrate having a patterned conductive junction and a resist film having an opening through which the conductive junction is exposed (hereinafter referred to as "resist" or "resist pattern") is used. The method of the plating process is as described above.

[0178] (Resist film removal process)

[0179] By performing a resist film removal process after the plating process, a bonded member is obtained in which a plating laminate with a composition within the range of a first rectangle is formed as a bond on a conductive bond.

[0180] The resist film removal process is a process performed after the plating process, and it is a process of removing the resist film formed on the substrate.

[0181] Resist pattern removal is possible using known wet methods such as immersion in a chemical solution or shower cleaning, or known dry methods such as ashing treatment by oxygen plasma, which can remove the resist without encroaching on Sn-Bi-In low-melting-point plating layers.

[0182] For the wet method, the chemical solution used may include, for example, an organic solvent such as dimethyl sulfoxide as the main component, or an aqueous solvent such as potassium hydroxide, and can be selected in a timely manner considering the removability of the resist material or the resistance of the plating deposit.

[0183] After removing the resist with a chemical solution, the plated object is cleaned by immersion in water or washing with a water shower, and then heated and dried or air-dried at a temperature ranging from room temperature to 100°C.

[0184] (Bumping process)

[0185] After the resist film removal process, the plating laminate formed on the conductive joint is heated and reflowed, thereby forming a solder alloy bump with a composition within the range of a first rectangle on the conductive joint as a joint. The bump formation process is as described above.

[0186] In the plating process, if we explain the case where plating treatment is performed in the order of Sn plating, Bi plating, and In plating, by performing each process in the order of “surface cleaning and drying of the workpiece → Sn plating → rinsing and drying → Bi plating → rinsing and drying → In plating → rinsing and drying → resist removal → rinsing and drying → solder alloy bump formation (heat reflow),” a bonded member is obtained in which solder alloy bumps made of Sn-Bi-In alloy with a composition within the range of the first square are formed on the conductive joint of a substrate in which a conductive joint is patterned.

[0187] The above is a method for manufacturing a bonded member in which a plating laminate or a solder alloy bump is formed on a conductive bond using the manufacturing method of the present invention.

[0188] In a similar manner, a substrate having a layer of under metal and / or conductive posts formed thereon on a conductive junction may be used to form a plating laminate or solder alloy bump on the layer of under metal or the conductive posts.

[0189] By using such a manufacturing method, for example, a semiconductor chip or wiring substrate in which Sn-Bi-In stacked plating layers or Sn-Bi-In solder alloy bumps are patterned can be manufactured.

[0190] A conventional method for manufacturing solder alloys used as conductive joining materials involves crushing or crushing each alloy component, cleaning and drying the surface to form a mixture with a predetermined composition, heating and melting the mixture to a level above the melting point of the component with the highest melting point among the mixture components to form an alloy, extracting the alloy in the form of a lump, crushing the alloy into fine particles, combining them with flux components, etc. to form a solder alloy paste, applying the paste to a plated object, and mounting it by heated reflow. The joining member of the present invention may also be manufactured using this method. However, this method involves many steps, which reduces productivity, and there are cases where it is difficult to adapt to dimensional reliability due to the narrow pitch of wiring joints resulting from the miniaturization of integrated circuits.

[0191] By using the manufacturing method of the present invention, the process of the conventional method is significantly reduced, and since a plating laminate (conductive bonding material) can be formed on the surface of a substrate with a fine pattern using a direct plating method, dimensional reliability is high. Since the plating laminate and the solder alloy bump have a low melting point of 60 to 110°C, bonding by heated reflow in a low-temperature range of 80 to 135°C is possible, making it suitable for low-temperature mounting.

[0192] In this regard, even when manufacturing a bonded member having solder alloy bumps, it is preferable to manufacture it using the manufacturing method of the present invention. That is, it is preferable to use a plating laminate comprising a stacked plating layer obtained by performing Sn plating, Bi plating, and In plating on the surface of the workpiece.

[0193] [Formation of a micro-member in which a micro-core material is coated with a plating laminate]

[0194] A method for manufacturing a bonded member is described, wherein the microcore material is coated with a plating laminate of a composition within the range of a first square.

[0195] When manufacturing a micro-member in which a micro-core material is coated with a plating laminate, the manufacturing method of the present invention has a plating process. Specifically, the workpiece to be plated is any one of the micro-core materials selected from the group consisting of a micro metal ball having a size of 1 mm or less, a micro resin ball having a coating layer of a conductive metal, a micro resin ball having a coating layer of a solder alloy, and a micro pin member, and in the plating process, the manufacturing method may be one in which the micro-core material is coated with the plating laminate to manufacture a micro-member.

[0196] As a plating method for micro-core materials, for example, a plating process can be performed at a rotational speed of about 5 to 200 rpm using a device in which an anode is arranged in the center of the plating tank and a cathode is arranged in the circumferential part of the tank, and the rotation axis can rotate vertically along a horizontal axis or rotate in an inclined axis. Specifically, a rotary plating device (barrel plating method) can be used in which a plating solution and balls of the workpiece to be plated are placed in the tank, a current density and a current application time are set to achieve a predetermined plating thickness, and when the process is finished, the plated balls and plating solution are discharged from the rotating circumferential part. In addition, a rotary plating device described in Japanese Patent Publication No. Hei 10-18096 or Japanese Patent Publication No. Hei 10-270836, which has been improved for plating micro-metal balls, or a rotary plating device described in Japanese Patent Publication No. Hei 11-92994 can be used.

[0197] When forming a Sn-Bi-In based low-melting-point plating layer on the surface of a microcore material, etc., known devices such as the barrel plating method (rotary plating device) described above may be used. The plating of Sn, Bi, and In, respectively, may be performed under the same conditions as the plating process described above. Although the order of plating layers is not particularly limited, it is preferable to perform Sn plating or Bi plating first (bottom layer) and In plating last (top layer). In addition, the trace metals described above may be added for the purpose of improving physical properties, such as enhancing the smoothness and adhesion of the plating film, or preventing aggregation of balls during the plating process.

[0198] The above is a method for forming a plating laminate according to the present invention on the surface of a micro metal ball, a micro resin ball, a micro pin member, etc. The micro member obtained by this method has a surface layer plating laminate with a melting point in the low temperature range of 60 to 110°C. Therefore, the micro member may be used as is in the mounting process. In addition, it may be used in the mounting process as a low-melting-point solder alloy bump mounted on the micro member.

[0199] [Formation of micro-absence mounting bumps]

[0200] When forming a micro-member mounted bump, the manufacturing method of the present invention comprises a plating process, a process of placing a micro-member on a substrate, and a bump formation process. The workpiece to be plated is a micro-core material. For example, a micro-member mounted bump, such as a BGA, can be formed by heating and reflowing a micro-member placed on a conductive junction of a substrate.

[0201] An example of bump formation using the above-described micro-member is provided. For instance, flux is applied to a conductive joint, such as a printed circuit board for BGA, and the micro-member is mounted thereon. Subsequently, by performing a heat reflow in the same manner as the bump formation process described above, it is possible to form a bump mounted with the micro-member on the conductive joint.

[0202] <Packaging of Semiconductor Electronic Circuits>

[0203] The present invention may relate to a method for mounting a semiconductor electronic circuit by heating and reflowing the bonding member of the present invention, which is disposed between a wiring substrate and a semiconductor chip surface, within a range of 80 to 135°C, thereby bonding the wiring substrate and the semiconductor chip by the bonding member of the present invention. By the method for mounting a semiconductor electronic circuit of the present invention, a semiconductor electronic circuit having the bonding member of the present invention can be manufactured.

[0204] Heated reflow during the mounting of semiconductor electronic circuits can be performed in a reducing atmosphere, such as formic acid, just like the heated reflow of the bumping process described above. Conditions such as pressure, heating rate, tower temperature, and tower temperature holding time can also be the same as those of the heated reflow of the bumping process described above.

[0205] As described above, the melting point of Sn-Bi-In alloy is 60 to 110°C. Therefore, by interposing any one selected from the group consisting of a plating laminate made of Sn-Bi-In alloy, a solder alloy bump made of Sn-Bi-In alloy, and a microcore material (micro component) coated with Sn-Bi-In alloy, and overlapping the semiconductor chip and the wiring board so that the wiring board and the semiconductor chip surface come into contact, the semiconductor electronic circuit can be mounted by heating and reflowing in a low temperature region of 80 to 135°C.

[0206] In addition, when the melting point of the Sn-Bi-In alloy is around 60°C to 62°C, there may be concerns about a decrease in bonding strength or insufficient durability depending on the usage environment. From the perspective of bonding strength or durability, a bonding member containing a Sn-Bi-In alloy with a composition within the range of the third square and a melting point of 69°C to 110°C may be used, and a semiconductor electronic circuit may be mounted by heating and reflowing at 90°C to 135°C (tower temperature 90°C to 135°C).

[0207] For example, the assembly of a semiconductor electronic circuit involves preparing a semiconductor chip that has formed solder alloy bumps or a plating layer, overlapping it with an electrode portion for connection on a wiring board, and joining the two by heating and reflowing in a reducing atmosphere such as formic acid.

[0208] It is preferable to manufacture a semiconductor chip having a pattern formed thereon, such as a plated laminate or a solder alloy bump, by the manufacturing method of the present invention with the semiconductor chip as the workpiece. The semiconductor chip and the wiring board can be bonded by heating and reflowing in a reducing atmosphere while the plated laminate or solder alloy bump pattern formed on the semiconductor chip and the electrode portion for connecting the wiring board are overlapped.

[0209] Solder alloy bumps or plating laminates may be formed on the wiring board side. In that case, they are bonded to the electrode portion for connection on the semiconductor chip side.

[0210] It is preferable to manufacture a wiring substrate having a pattern formed of a plating laminate or a solder alloy bump by the manufacturing method of the present invention using the wiring substrate as the workpiece. In this case, the semiconductor chip and the wiring substrate can be bonded by heating and reflowing in a reducing atmosphere while the plating laminate or solder alloy bump pattern formed on the wiring substrate and the electrode portion for connecting the semiconductor chip are overlapped.

[0211] Solder alloy bumps or plating laminates may be formed on both the semiconductor chip side and the wiring substrate side. In this case, the two can be joined by heating and reflowing in a reducing atmosphere while the plating laminate or solder alloy bump patterned on the wiring substrate and the plating laminate or solder alloy bump patterned on the semiconductor chip are overlapped.

[0212] In addition, a semiconductor chip with a pattern formed on a micro-component or a wiring board with a pattern formed on a micro-component may be used.

[0213] In addition, bonding using a plating layer made of Sn-Bi-In alloy, a solder alloy bump made of Sn-Bi-In alloy, and a microcore material (micro component) coated with Sn-Bi-In alloy can be applied to soldering other than electronic circuit boards such as semiconductor chips or wiring boards.

[0214] A conceptual diagram of the manufacturing process of a plating laminate and its solder alloy bump according to the Sn-Bi-In-based low-melting-point bonding member of the present invention is shown in FIG. 3, and a conceptual diagram of the implementation is shown in FIG. 4 for reference.

[0215] FIG. 3 is an example of a conceptual diagram of the manufacturing process up to the formation of the solder alloy bump of the present invention.

[0216] 1) As shown in the wafer before processing, first, a pad (3) (Au, Al-Cu, etc.) is placed on a substrate (1) (silicon, compound semiconductor, piezoelectric element, resin substrate, etc.) and has a protective film (2) (SiN, polyimide, etc.).

[0217] Next, as shown in 2) Formation of the feed film, a feed film (4) (Ti / Cu, etc.) is formed on the protective film (2) or pad (3).

[0218] Next, as shown in 3) the application of the resist film, a resist film (5) is applied on the feed film (4).

[0219] Next, as shown in 4) Exposure and development, exposure and development are performed on the resist film (5) in a predetermined pattern, and a portion of the resist film (5) is removed. At this time, exposure is typically performed at a position corresponding to the pad (3).

[0220] Next, as shown in 5) under metal formation, the resist film (5) is exposed and developed to form an under metal (6) (Ni, Cu, etc.) in the part where the hole is formed.

[0221] Next, steps 6) to 9) are performed according to the manufacturing method of the present invention.

[0222] 6) As shown in the plating layer, a layered plating layer (7) (Sn, Bi, In) is formed.

[0223] Next, as shown in 7) resist peeling, the remaining resist film (5) is also removed. By doing this, a laminated plating layer (7) is formed on the pad (3).

[0224] Next, as shown in 8) feed film etching, the feed film (4) is removed by etching.

[0225] And, as shown in the bump formation, by heating and reflowing, a solder alloy bump (8) (Sn / Bi / In) is formed from the laminated plating layer (7) and can be used as a bonding member.

[0226] In addition, 8) the stacked plating layer (7) after the feed film etching can be used as a bonding member.

[0227] FIG. 4 is a conceptual diagram showing an example of a mounting. A solder alloy bump (9) is positioned to contact a metal film (10) (Au) for bonding at a corresponding position (see upper part of FIG. 4), and the wiring substrate and the semiconductor chip can be bonded by heating and reflowing within the range of 80 to 135°C (see lower part of FIG. 4).

[0228] (Example)

[0229] The present invention will be explained in more detail below by way of examples, but the present invention is not limited to the following examples unless the gist thereof is altered.

[0230] (Measurement of composition of plating layers and solder alloy bumps)

[0231] The plating laminates obtained in Experimental Examples 1 to 46 were peeled off from a SUS substrate, dissolved in acid, and then quantitatively analyzed using ICP-OES (Inductively Coupled Plasma-Emission Spectrometer). In addition, for Experimental Examples 47 to 57, the solder alloy bumps obtained by heating and reflowing the plating laminates were measured in the same manner as above. The equipment used and measurement conditions are as follows.

[0232] · Measuring Instrument: Thermo Fisher Scientific ICP Emission Spectrometer Model: ICAP6300Duo

[0233] Quantitative analysis using the calibration curve method for measurement conditions

[0234] Measurement wavelengths: Sn 188.9nm, Bi 306.7nm, In 325.6nm

[0235] (Measurement of melting point of plated laminate)

[0236] The plating laminates obtained in Experimental Examples 1 to 46 were peeled from a SUS substrate and ground to form a sample, which was used as the measurement sample. The endothermic profile during the heating process was measured using a Differential Scanning Calorimeter (DSC). In the DSC measurement during the heating process, the heat of fusion of each component appears as an endothermic peak, and depending on the composition of the measurement sample, there may be a single or multiple endothermic peaks. For convenience in the present invention, the top temperature of each endothermic peak is treated as the melting point of that component. In the case of multiple peaks, the endothermic peak at the lowest temperature is designated as the lowest melting point (solidus temperature), and the endothermic peak at the highest temperature is designated as the highest melting point (liquisus temperature). The equipment used and the measurement conditions are as follows.

[0237] · Measuring instrument: Seiko Instruments Co., Ltd. DSC Device model: DSC6220

[0238] · Measurement conditions Sample volume: 10~36 mg

[0239] Measuring fan: Aluminum

[0240] Atmosphere: Nitrogen gas

[0241] Measurement temperature range: Room temperature ~ 300℃, Heating rate: 10℃ / min

[0242] (Measurement of bump diameter)

[0243] The bump diameters of the solder alloy bumps obtained in Experimental Examples 47 to 57 were measured using image measurement. The equipment used and the measurement conditions are as follows.

[0244] · Measuring Instrument: Giens Laser Microscope Model: VK-X150

[0245] · Measurement Condition Image Measurement: Length measurement from a 200x image

[0246] (Measurement of bump shear strength)

[0247] The shear strength of the solder alloy bumps obtained in Experimental Examples 47 to 57 was measured at room temperature (approx. 20°C) using a shear strength tester. The equipment used and the measurement conditions are as follows.

[0248] · Measuring Instrument: DAGE Bond Tester Model: 4000

[0249] · Measurement conditions Shear speed: 150μm / S, Shear position: Solder part

[0250] [Experimental Example 1]

[0251] Teflon (registered trademark) tape was applied to the entire back surface of a degreased and cleaned SUS304 plate (100mm × 40mm × thickness 0.3mm), and Teflon (registered trademark) tape was applied to one side surface to create an opening of 40mm × 40mm on the SUS plate, which was then prepared as the workpiece. A 1L glass beaker was used as the plating bath, and approximately 500ml of each plating solution was added; platinum was used as the anode. The following Sn-Bi-In plating solutions were used for each.

[0252] · Sn plating solution manufactured by Ishihara Chemical Co., Ltd. (Sn concentration 5g / L)

[0253] · Bi plating solution manufactured by Ishihara Chemical Co., Ltd. (Bi concentration 40g / L)

[0254] · In plating solution manufactured by EEJA (In concentration 25g / L)

[0255] For the first layer, Bi plating was performed. The conditions were as follows: the aforementioned workpiece was immersed in the Bi plating solution and agitated, at a temperature of 20°C and a current density of 2 A / dm². 2 After plating for a consistent 8 minutes, the sample was pulled up, immediately immersed in a water bath, and then pulled up and rinsed with a water shower. This was dried using a ventilation dryer at 50°C for 5 minutes to obtain a Bi-plated product.

[0256] Next, the second layer of In plating was performed. The Bi-plated workpiece was immersed in the In plating solution and agitated at a temperature of 20°C and a current density of 3 A / dm². 2 After plating for a consistent 5 minutes, the sample was pulled up, immediately immersed in a water bath, pulled up again, and rinsed with a water shower. This was dried using a ventilation dryer at 50°C for 5 minutes to obtain a Bi-In plated product.

[0257] Next, the third layer of Sn plating was performed. The Bi-In plated workpiece was immersed in the Sn plating solution and agitated at a temperature of 20°C and a current density of 1 A / dm². 2 After plating for 30 seconds, the material was pulled up, immediately immersed in a water bath, pulled up, and washed with a water shower. This was dried using a ventilation dryer at 50°C for 5 minutes to obtain a plated laminate (Bi-In-Sn plated laminate).

[0258] The composition of the sample obtained by peeling off the Bi-In-Sn plating laminate from the SUS plate and grinding it was measured using a Thermo Fisher Scientific ICP emission spectrometer, and the melting point was measured using a Seiko Instruments Co., Ltd. DSC instrument.

[0259] [Experimental Examples 2–41]

[0260] In the same manner as in Experimental Example 1, plated laminate samples prepared with various Sn-Bi-In compositions were produced by changing the order of plating layers and the plating time of each plating component.

[0261] Experimental Examples 1 to 12 are compositions within the range of the first, second, and third rectangles. Experimental Examples 13 to 22 are compositions within the range of the first and second rectangles (outside the range of the composition of the third rectangle). Experimental Examples 23 to 35 are compositions within the range of the first rectangle (outside the range of the composition of the second and third rectangles). Experimental Examples 36 to 41 are compositions outside the range of the first, second, and third rectangles.

[0262] Table 1 (Composition analysis and melting point measurement results of plated laminates) shows the composition analysis and melting point measurement results of the plated laminates obtained in Experimental Examples 1 to 41. In addition, Experimental Examples 2, 4, 5, 7, 8, 10, 12, 14, 15, 17, 18, 19, 22, 30, 32, 33, 37, 39, and 41 are shown in FIGS. 5 to 23 as representative examples of DSC measurement profiles during melting point measurement.

[0263] The manufacturing method of the present invention can omit the cumbersome alloy manufacturing process and, in addition, the Sn-Bi-In composition can be arbitrarily controlled by simply changing the plating time (immersion time in the plating solution), so the manufacturing process of conventional solder alloys can be carried out significantly more simply.

[0264] In addition, from the results of Experimental Examples 1 to 35, it can be seen that by controlling the composition of the plating laminate within a specific range, the melting point of the plating laminate can be set to a low melting point region in the range of 60 to 110°C.

[0265] Meanwhile, in Experimental Examples 36 to 41, which have compositions outside the range of the first square, it can be seen that the melting point of the plated laminate exceeds 110°C.

[0266] For reference, the ternary phase diagrams of the Sn-Bi-In compositions of Experimental Examples 1 to 41 and Experimental Examples 47 to 53 described later are shown in FIG. 1.

[0267] From these results, it is determined that a plating stack with a composition within the range of a rectangle (first rectangle) with vertices of four points—point 1 (1, 69, 30), point 2 (26, 52, 22), point 3 (40, 10, 50), and point 4 (1, 25, 74)—in the Sn-Bi-In ternary phase diagram, where Sn is x mass%, Bi is y mass%, and In is z mass%, can significantly contribute to the realization of low-temperature packaging of integrated circuits.

[0268] In addition, as shown in Experimental Examples 1 to 12, when the composition of the plating laminate is defined as (x, y, z) where Sn is x mass%, Bi is y mass%, and In is z mass%, by controlling the composition within the range of a rectangle (third rectangle) with four vertices: point 1 (1, 69, 30), point 2 (26, 52, 22), point 3a (35, 25, 40), and point 4b (1, 59, 40), a plating laminate with a melting point of 69 to 110°C is obtained, and it was found that solder alloying is possible in the low melting point region. Since the melting point is 69°C or higher, it has durability even when exposed to an operating environment of about 60°C.

[0269] In addition, each composition according to Table 1 (composition analysis and melting point measurement results of the plated laminate) may be used as a point to define a specific range in the ternary phase diagram, or any one of the points may be used as a vertex instead of points 1 to 4. Alternatively, the range may be defined by using the points according to Table 1 as vertices of other triangles or polygons such as pentagons, hexagons, heptagons, and octagons.

[0270]

[0271] [Regarding the Addition of Mixed Components (Experimental Examples 42–46)]

[0272] [Experimental Examples 42~43]

[0273] A plating laminate with trace amounts of Cu was obtained by performing the same operation as in Experimental Example 1, except that Cu was added to the Sn plating solution to use a composite plating solution of Sn=60g / L and Cu=1g / L, and the plating was stacked in the order of SnCu→Bi→In. The composition of the sample obtained by peeling off the plating laminate from a SUS plate and grinding it was measured using an ICP emission spectrometer from Thermo Fisher Scientific, and the melting point was measured using a DSC instrument from Seiko Instruments Co., Ltd. The results are shown in Table 2 (Composition analysis and melting point measurement results of Cu and Ag trace amount plating laminate).

[0274] [Experimental Examples 44~46]

[0275] A plating laminate with trace amounts of Ag was obtained by performing the same procedure as in Experimental Example 1, except that Ag was added to the Sn plating solution to use a composite plating solution with Sn=40g / L and Ag=2.5g / L, and the plating was layered in the order of SnAg→Bi→In. The composition of the sample obtained by peeling off the plating laminate from a SUS plate and grinding it was measured using a Thermo Fisher Scientific ICP emission spectrometer, and the melting point was measured using a Seiko Instruments Co., Ltd. DSC instrument. The results are shown in Table 2.

[0276] Experimental Examples 42, 45, and 46 are compositions within the range of the first, second, and third rectangles. Experimental Examples 43 and 44 are compositions within the range of the first rectangle (outside the range of the compositions of the second and third rectangles).

[0277] From Experimental Examples 42 to 46, it can be seen that the melting point of the plating laminate with trace amounts of Cu or Ag added is 60 to 107°C, which is a low melting point region of 110°C or lower. From these results, it was confirmed that the Sn-Bi-In plating laminate with trace amounts of Cu or Ag added can be used as a conductive bonding material for low-temperature mounting.

[0278]

[0279] [Measurement of Bump Shear Strength (Experimental Examples 47–57)]

[0280] [Experimental Examples 47~53]

[0281] On the surface of a silicon wafer with a native oxide film attached, a Ti film with a thickness of 0.1 μm and a Cu film with a thickness of 0.3 μm were deposited by sputtering, and a silicon wafer was fabricated with a resist pattern formed by photolithography, having openings for wiring connections (60 μmφ × height 40 μm: 1000000, pitch spacing: 150 μm). Subsequently, a Cu film with a thickness of 10 μm was deposited by electroplating as a post. In addition, a Ni film with a thickness of 3 μm was deposited on top of it by electroplating to fabricate a pattern-forming plated object.

[0282] In Experimental Example 47, the pattern-forming workpiece described above was used, and a plating layer was produced by performing the same operation as in Experimental Example 1, except that the plating time (immersion time) in each plating solution was changed so that the plating layer had a predetermined composition in the order of "Bi→Sn→In". This was immersed in a resist stripping solution to remove the resist.

[0283] Next, the plated laminate after the resist removal was reflowed under the following conditions using a VSU-200 reflow device manufactured by Shin Apex to produce solder alloy bumps.

[0284] · Reducing agent: Formic acid

[0285] · Pressure: 200 mbar

[0286] · Heating rate: 20℃ / min

[0287] · Tower temperature: 110℃ (Keep time 180 sec)

[0288] Experimental Examples 48 to 53 produced solder alloy bumps by performing the same operations as Experimental Example 47, except that the plating time (immersion time) in each plating solution during plating lamination was changed so that the bump composition became a predetermined composition.

[0289] Experimental Example 47 is a composition within the range of the first, second, and third rectangles. Experimental Example 48 is a composition within the range of the first and second rectangles (outside the range of the composition of the third rectangle). Experimental Examples 49 and 50 are compositions within the range of the first rectangle (outside the range of the composition of the second and third rectangles). Experimental Examples 51 to 53 are compositions outside the range of the first, second, and third rectangles.

[0290] Regarding the shape of the plating laminate, the external appearance SEM photograph of the plating laminate after the resist film peeling of Experimental Example 47 is shown in FIG. 24. In addition, the results of SEM-EDX observation of the cross-section are shown in FIG. 25. Also, FIG. 39 shows the external appearance SEM photograph of Experimental Example 48, and FIG. 32 shows the external appearance SEM photograph of Experimental Example 50.

[0291] From these drawings, it can be seen that a cylindrical plating laminate corresponding to the resist pattern is formed. In addition, from the cross-sectional SEM-EDX of the plating laminate of Experimental Example 47 shown in FIG. 25, it was observed that a stacking plating process was performed on a Cu / Ni undermetal in the order of Bi layer → Sn layer, and that In was diffused approximately uniformly into these Bi layer and Sn layer. It is believed that during the plating stacking stage, In diffuses into the lower Sn layer and Bi layer to form SnIn and BiIn alloys, thereby making the melting point of the final plating laminate significantly lower than the melting points of Sn, Bi, and In individually. Furthermore, it is believed that the entire plating laminate becomes low-melting point even during the heating reflow stage.

[0292] Regarding the formation of solder alloy bumps, SEM images of the bump appearance of Experimental Example 47 are shown in FIGS. 26 and 27, Experimental Example 48 in FIGS. 30 and 31, and Experimental Example 50 in FIGS. 33 and 34. From these figures, it can be seen that hemispherical solder alloy bumps are formed on the Cu / Ni undermetal. Also, FIG. 28 shows an SEM-EDX image of the cross-section of the bump of Experimental Example 47. From this, it was confirmed that solder alloy bumps with Sn-Bi-In approximately uniformly dispersed were formed by heating and reflowing the plating layers of each component.

[0293] [Experimental Examples 54~57]

[0294] Experimental Examples 54 to 57 are known Pb-free solder alloy bumps prepared for the purpose of comparing bump shear strength with known Pb-free solder alloys. A silicon wafer with a resist pattern formed in the same manner as in Experimental Example 47 was used, and the undermetal shown in Table 3 was deposited using the same operation (however, in Experimental Examples 55 and 57, the formation of 10 μm Cu posts was omitted). Then, in Experimental Examples 54 and 55, SnAg plating was performed using a known SnAg plating solution. In Experimental Example 56, Sn and Bi were deposited using a known Sn plating solution and a known Bi plating solution. In Experimental Example 57, In plating was performed using a known In plating solution. After drying each of these, a resist removal operation was performed in the same manner as in Experimental Example 47, and then solder alloy bumps were produced under the same operating conditions, except that the same reflow apparatus was used and the reflow temperature was set as listed in Table 3.

[0295] Table 3 (Bump Composition and Shear Strength) shows the results of measuring the bump composition and shear strength of Experimental Examples 47 to 57. In addition, the plating layer thickness in the table is a target value for achieving a predetermined composition. For reference, a conceptual diagram of a shear strength tester is shown in FIG. 35. FIG. 36 shows the "Relationship between In Concentration and Bump Shear Strength," which plots the bump shear strength against the In concentration of the bumps in Experimental Examples 47, 50 to 53.

[0296] Among the known Pb-free solder alloy bumps, the indium-only system of Experimental Example 57 has a bump shear strength of 0.3 mg / μm 2 Since it is significantly low, it cannot be practically applied, whereas the bump shear strength of the SnAg and Sn58Bi systems of Experimental Examples 54–56, which are commonly used as Pb-free solder alloys, is 3.3 mg / μm 2 In this respect, the shear strength as a joining member is at least 3.0 mg / μm 2 The above shows what is needed.

[0297]

[0298] As shown in Table 3, the solder alloy bumps of Experimental Examples 47 to 50, which have a composition within the range of the first square, have sufficient bonding strength equivalent to the shear strength of known Pb-free solder alloy bumps (Experimental Examples 54 to 56), and it was found that they can be practically used as bonding materials.

[0299] As in Experimental Examples 47 and 48, by setting the In concentration to 50 mass% or less (composition within the range of the second square), the shear strength of the solder alloy bump is 5.0 mg / μm 2 It was confirmed that it has improved beyond the above.

[0300] Meanwhile, as in Experimental Examples 48 to 50, if the In concentration exceeds approximately 40 mass%, the melting point is less than 69°C, similar to the DSC measurement results of Experimental Examples 17, 27, and 30 which have compositions close to these, so there is concern about the deterioration of physical properties as a conductive bonding material under the normal operating temperature environment of electronic products (max 60 to 65°C).

[0301] In addition, as with Experimental Examples 37 to 41 described above, for compositions outside the range of the first rectangle, the melting point exceeds 110°C, making it unsuitable as a low-temperature bonding material. Similarly, Experimental Example 51 is thought to show a melting point below 69°C or above 110°C. Experimental Example 52 (near Experimental Example 37) and Experimental Example 53 (near Experimental Example 39) are thought to have high melting points because an endothermic peak appears near the melting point of Sn or Bi.

[0302] [Smile Ball (Experimental Examples 58~59)]

[0303] [Experimental Example 58]

[0304] A plating layer was formed on the surface of a micro metal ball. First, electrolytic Ni plating was performed on the surface of the micro metal ball to form a barrier layer. Electrolytic Ni plating was performed on the surface of a degreasing and cleaned φ450μm Cu ball using a rotary plating device to form a Ni film with a thickness of approximately 2μm. The fabricated Ni-coated Cu ball was used as a micro metal ball (the object to be plated).

[0305] Next, Bi, SnAg, and In plating were performed on micro metal balls using a rotary plating device. The following plating solutions were used.

[0306] · SnAg plating solution manufactured by Ishihara Chemical Co., Ltd. (Sn concentration 5g / L, Ag concentration 0.5g / L)

[0307] · Bi plating solution manufactured by Ishihara Chemical Co., Ltd. (Bi concentration 40g / L)

[0308] · In plating solution manufactured by EEJA (In concentration 25g / L)

[0309] For the first layer, Bi plating was performed. The conditions were as follows: the aforementioned workpiece was placed in a device containing a Bi plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.2 A / dm². 2 After plating for 2 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a Bi plating on the surface of a micro metal ball.

[0310] Next, the second layer of SnAg plating was performed. The Bi-plated workpiece was placed in a device containing SnAg plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.1 A / dm². 2 After plating for 2 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a Bi-SnAg plating on the surface of a micro metal ball.

[0311] Next, the third layer of In plating was performed. The Bi-SnAg plated workpiece was placed in a device containing the In plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.1 A / dm² 2 After plating for 6 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a plating layer (Bi-SnAg-In plating layer) on the surface of a micro metal ball.

[0312] The composition of the sample obtained by dissolving the plating layer on the surface of the obtained micro metal ball was measured using a Thermo Fisher Scientific ICP emission spectrometer and found to be Sn 16.9 mass%, Bi 49.2 mass%, In 33.4 mass%, and Ag 0.5 mass%.

[0313] A photograph of the appearance of a micro metal ball coated with the obtained plating laminate is shown in Fig. 37.

[0314] [Experimental Example 59]

[0315] A plating layer was formed on the surface of a micro-resin ball coated with a conductive metal. First, a conductive metal film was deposited on the surface of the micro-resin ball. Electroless Ni plating was first performed under stirring on a degreasing and cleaning φ210μm resin ball to deposit a Ni film with a thickness of approximately 1μm as a conductive layer. Subsequently, electrolytic Cu plating was performed using a rotary plating bath to deposit a Cu film with a thickness of approximately 10μm, and electrolytic Ni plating was also performed to deposit a Ni film with a thickness of approximately 1μm as a barrier layer. A resin ball coated with a conductive metal was used as the workpiece.

[0316] Next, using a rotary plating device, Bi plating, SnAg plating, and In plating were performed on micro-resin balls (workpieces) coated with a conductive metal. The plating solution used was the same as that used in Experimental Example 58.

[0317] For the first layer, Bi plating was performed. The conditions were as follows: the aforementioned workpiece was placed in a device containing a Bi plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.2 A / dm². 2 After plating for 2 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a Bi plating on the surface of a resin ball coated with a conductive metal.

[0318] Next, the second layer of SnAg plating was performed. The Bi-plated workpiece was placed in a device containing SnAg plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.1 A / dm². 2 After plating for 6 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a Bi-SnAg plating on the surface of a resin ball coated with a conductive metal.

[0319] Next, the third layer of In plating was performed. The Bi-SnAg plated workpiece was placed in a device containing the In plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.1 A / dm² 2 After plating for 12 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a plating laminate (Bi-SnAg-In plating laminate) on the surface of a resin ball coated with a conductive metal.

[0320] The composition of the sample obtained by dissolving the plating layer on the surface of the obtained conductive metal-coated resin ball was measured using a Thermo Fisher Scientific ICP emission spectrometer, and it was Sn 30.0 mass%, Bi 32.4 mass%, In 37.4 mass%, and Ag 0.2 mass%. Figure 38 shows a photograph of the appearance of the micro-resin ball coated with the obtained plating layer.

[0321] [Micro metal pin (Experimental Example 60)]

[0322] [Experimental Example 60]

[0323] A plating layer was formed on the surface of a micro metal cylinder. First, electrolytic Ni plating was performed on the surface of a Cu cylinder with dimensions of φ300μm and L500μm, which had been degreasing and cleaned, using a rotary plating device to deposit a Ni film approximately 2μm thick as a barrier layer. The fabricated Ni-coated Cu cylinder was used as a micro metal pin (the object to be plated). Subsequently, Bi plating, SnAg plating, and In plating were performed on the micro metal pin using a rotary plating device. The following plating solutions were used.

[0324] · SnAg plating solution manufactured by Ishihara Chemical Co., Ltd. (Sn concentration 5g / L, Ag concentration 0.5g / L)

[0325] · Bi plating solution manufactured by Ishihara Chemical Co., Ltd. (Bi concentration 40g / L)

[0326] · In plating solution manufactured by EEJA (In concentration 25g / L)

[0327] For the first layer, Bi plating was performed. The conditions were as follows: the aforementioned workpiece was placed in a device containing a Bi plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.2 A / dm². 2 After plating for 2 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a Bi plating on the surface of a micro metal fin (Cu fin).

[0328] Next, the second layer of SnAg plating was performed. The Bi-plated workpiece was placed in a device containing SnAg plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.1 A / dm². 2 After plating for 2 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a Bi-SnAg plating on the surface of a micro metal pin.

[0329] Next, the third layer of In plating was performed. The Bi-SnAg plated workpiece was placed in a device containing the In plating solution at a temperature of 20°C, a rotation speed of 178 rpm, and a current density of 0.1 A / dm² 2 After plating for 6 hours, it was lifted up and immediately filtered and washed. This was dried at 50°C for 1 hour using a ventilation dryer to form a plating layer (Bi-SnAg-In plating layer) on the surface of a micro metal pin.

[0330] The composition of the sample obtained by dissolving the plating layer on the surface of the obtained micro-metal fin was measured using a Thermo Fisher Scientific ICP emission spectrometer and found to be Sn 9.7 mass%, Bi 51.8 mass%, In 37.9 mass%, and Ag 0.6 mass%. Figure 39 shows a photograph of the appearance of the micro-metal fin coated with the obtained plating layer.

[0331] (Industrial Applicability)

[0332] The bonding member and the manufacturing method of the present invention can be suitably used for Pb-free soldering mounting applications of semiconductor electronic components and wiring boards. In particular, since low-temperature bonding is possible, it can be suitably used for low-temperature mounting methods of electronic components with low heat resistance, such as flexible substrates (resin substrates), piezoelectric elements, CDTe semiconductor devices, CCD devices, and holographic devices. Explanation of the symbols

[0333] 1… board 2… Shield 3… pad 4… Sudden turn of events 5… resist membrane 6… Under Metal 7… Laminated plating layer 8… Solder alloy bump 9… Solder alloy bump 10… Metal film (Au) for bonding

Claims

Claim 1 In a Sn-Bi-In based low-melting-point bonded member comprising a plating laminate having multiple layers with different concentrations of Sn, Bi, and In, the plating laminate comprises at least a SnIn layer containing Sn and In and a BiIn layer containing Bi and In, wherein the ratio of the total amount of Sn, Bi, and In in the plating laminate is 95 mass% or more, and wherein the composition of the plating laminate is within a rectangular range with vertices of four points: point 1 (1, 69, 30), point 2 (26, 52, 22), point 3 (40, 10, 50), and point 4 (1, 25, 74), where the point where Sn is x mass%, Bi is y mass%, and In is z mass% is denoted as (x, y, z) in the Sn-Bi-In ternary phase diagram, and the plating laminate is heated from room temperature to 300°C at a heating rate of 10°C / min under a nitrogen atmosphere using a differential scanning calorimeter (DSC). Sn-Bi-In low-melting point bonding member having a peak top temperature of all observed endothermic peaks at 60 to 110°C when heated. Claim 2 A Sn-Bi-In based low-melting point bonding member according to claim 1, wherein the plating laminate is composed within the range of a rectangle with vertices of four points: point 1 (1, 69, 30), point 2 (26, 52, 22), point 3a (35, 25, 40), and point 4b (1, 59, 40), where the point where Sn is x mass%, Bi is y mass%, and In is z mass% is denoted as (x, y, z) in the Sn-Bi-In ternary phase diagram, and wherein the temperature of the peak top of all observed endothermic peaks is 69 to 110°C when the plating laminate is heated from room temperature to 300°C at a heating rate of 10°C / min under a nitrogen atmosphere using a differential scanning calorimeter (DSC). Claim 3 A Sn-Bi-In based low-melting point bonded member according to claim 1 or 2, characterized in that, when the total of Sn, Bi, and In is 100 mass%, the plating laminate comprises a composition containing 22-30 mass% of Sn, 20-28 mass% of Bi, and 42-58 mass% of In, or a composition containing 15-19 mass% of Sn, 43-51 mass% of Bi, and 30-42 mass% of In. Claim 4 A Sn-Bi-In based low-melting point bonded member having a composition in which the ratio of the total amount of Sn, Bi, and In is 95 mass% or more, and when the total of Sn, Bi, and In is 100 mass%, Sn is 17~19 mass%, Bi is 43~51 mass%, and In is 32~38 mass%, and the temperature of the peak top of all observed endothermic peaks is 60~110℃ when heated from room temperature to 300℃ at a heating rate of 10℃ / min under a nitrogen atmosphere using a differential scanning calorimeter (DSC). Claim 5 A Sn-Bi-In low-melting point bonding member according to claim 1 or 4, wherein the Sn-Bi-In low-melting point bonding member comprises one or more mixed components selected from the group consisting of Ag, Cu, Ni, Zn, and Sb, and the total mass of said mixed components in said Sn-Bi-In low-melting point bonding member is 0.001 to 3.0 mass%. Claim 6 A Sn-Bi-In based low-melting-point bonding member according to claim 1 or 4, characterized in that it is disposed on a film formed of one or more under metals selected from the group consisting of Ti, Ni, Cu, Au, Sn, Ag, Cr, Pd, Pt, W, Co, TiW, NiP, NiB, NiCo, and NiV. Claim 7 A solder alloy bump formed by heating and reflowing a Sn-Bi-In-based low-melting-point joining member described in claim 1 or 4. Claim 8 A bonding member having a micro-member, characterized by having a Sn-Bi-In based low-melting point bonding member described in claim 1 or 4 on the surface of a micro-core member selected from the group consisting of a micro metal ball having a size of 1 mm or less, a micro resin ball having a coating layer of a conductive metal, a micro resin ball having a coating layer of a solder alloy, and a micro pin member. Claim 9 A bonding member according to claim 8, characterized in that the micro-member is mounted on the conductive bonding portion. Claim 10 A method for manufacturing a Sn-Bi-In based low-melting-point bonded member comprising a process of forming a plated laminate on a workpiece, the laminate comprising stacked plating layers obtained by performing Sn plating, Bi plating, and In plating, respectively, wherein the temperature of the peak top of all endothermic peaks observed when the plated laminate is heated from room temperature to 300°C at a heating rate of 10°C / min using a differential scanning calorimeter (DSC) under a nitrogen atmosphere is 60 to 110°C, the plated laminate comprises at least a SnIn layer containing Sn and In and a BiIn layer containing Bi and In, the ratio of the total amount of Sn, Bi, and In in the plated laminate is 95 mass% or more, and when the sum of Sn, Bi, and In in the total amount of the plated laminate is converted to 100 mass%, the respective concentrations are such that, in the Sn-Bi-In ternary phase diagram, the point (x, y, z) is where Sn is x mass%, Bi is y mass%, and In is z mass%, the point A method for manufacturing a Sn-Bi-In low-melting-point bonded member, wherein a plating layer is formed on a workpiece such that the composition is within the range of a rectangle with four vertices: 1 (1, 69, 30), 2 (26, 52, 22), 3 (40, 10, 50), and 4 (1, 25, 74); the first plating performed on the workpiece is the Sn plating or the Bi plating, and the last plating is the In plating. Claim 11 A method for manufacturing a Sn-Bi-In based low-melting-point bonded member according to claim 10, wherein the above-mentioned plated material has one or more undermetals selected from the group consisting of Ti, Ni, Cu, Au, Sn, Ag, Cr, Pd, Pt, W, Co, TiW, NiP, NiB, NiCo, and NiV deposited thereon, and the above-mentioned plating laminate is formed thereon. Claim 12 A method for manufacturing a Sn-Bi-In based low-melting point bonded member according to claim 10 or 11, wherein the plating laminate comprises one or more mixed components selected from the group consisting of Ag, Cu, Ni, Zn, and Sb, and the total mass of said mixed components in said plating laminate is 0.001 to 3.0 mass%. Claim 13 A method for manufacturing a Sn-Bi-In based low-melting point bonded member according to claim 10 or 11, characterized by forming the plating laminate such that, when the total of Sn, Bi, and In is 100 mass%, the composition comprises 22-30 mass% of Sn, 20-28 mass% of Bi, and 42-58 mass% of In, or the composition comprises 15-19 mass% of Sn, 43-51 mass% of Bi, and 30-42 mass% of In. Claim 14 A method for manufacturing a Sn-Bi-In based low-melting point bonded member according to claim 10 or 11, wherein the workpiece to be plated is a microcore material selected from the group consisting of a micro metal ball having a size of 1 mm or less, a micro resin ball having a coating layer of a conductive metal, a micro resin ball having a coating layer of a solder alloy, and a micro pin member, and wherein, in the plating process, a micro member is manufactured in which the microcore material is coated with the plating laminate. Claim 15 A method for manufacturing a Sn-Bi-In low-melting-point bonded member according to claim 10 or 11, characterized by forming bumps by heating and reflowing the plating laminate disposed on the conductive bond. Claim 16 A method for mounting a semiconductor electronic circuit, wherein a Sn-Bi-In based low-melting point bonding member described in claim 1 or 4, disposed on a pad of a conductive junction of a semiconductor chip, is heated and reflowed within a range of 80 to 135°C to form a bump, and then the bump and the electrode portion of a wiring board are overlapped, and the wiring board and the semiconductor chip are bonded by heating and reflowing within a range of 80 to 135°C. Claim 17 A method for mounting a semiconductor electronic circuit, wherein a Sn-Bi-In based low-melting point bonding member described in claim 1 or 4, disposed on a pad of a conductive bonding portion of a wiring board, is heated and reflowed within a range of 80 to 135°C to form a bump, and then the bump and the electrode portion of a semiconductor chip are overlapped, and the wiring board and the semiconductor chip are bonded by heating and reflowing within a range of 80 to 135°C. Claim 18 A method for mounting a semiconductor electronic circuit by heating and reflowing a Sn-Bi-In based low-melting point bonding member described in claim 1 or 4, disposed between a wiring substrate and a semiconductor chip surface, within a range of 80 to 135°C, to bond the wiring substrate and the semiconductor chip. Claim 19 delete Claim 20 delete

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