Directions for wide-angle intra prediction

Abstract

Methods and devices using wide-angle intra prediction for rectangular blocks enable larger prediction angles. Wide-angle intra prediction enables intra prediction direction angles exceeding the conventional 45 degrees and -135 degrees. In one embodiment, when the video block to be coded or decoded is non-square, additional intra prediction directions become available along the longer block edges, and more reference samples are available along those edges. An index is used to indicate the prediction direction and can be adapted according to additional intra predictions in the longer direction, corresponding to fewer prediction directions along the shorter block edges. This preserves the number of prediction modes that need to be indexed, but allows their angles to correspond to the shape of the block.

Description

Technology Field

[0001] At least one of the embodiments generally relates to a method or apparatus for video encoding or decoding, compression or decompression. Background Technology

[0002] To achieve high compression efficiency, image and video coding schemes typically employ prediction that includes motion vector prediction and transformations to leverage spatial and temporal redundancy in video content. Generally, intra- or inter-prediction is used to utilize intra- or inter-frame correlation, and the differences between the original image and the predicted image, often represented as prediction errors or prediction residuals, are transformed, quantized, and entropy-coded. To reconstruct the video, the compressed data is decoded by inverse processes corresponding to entropy coding, quantization, transformation, and prediction.

[0003] In the development of the VVC (Versatile Video Coding) standard, an increased number of intra-coding modes are adopted.

[0004] At least one of the embodiments generally relates to a method or apparatus for video encoding or decoding, and more specifically to a method or apparatus for interaction between a maximum conversion size and conversion coding tools in a video encoder or video decoder.

[0005] According to a first embodiment, a method is provided. The method comprises the steps of: predicting samples of a rectangular video block using at least one of N reference samples from a row above the rectangular video block or at least one of M reference samples from a left column of the rectangular video block—the reference samples being based on a number of wide angles that increases in proportion to the aspect ratio of the rectangular block—; and encoding the rectangular video block in an intra-coding mode using the prediction.

[0006] According to a second embodiment, a method is provided. The method comprises the steps of: predicting a sample of a rectangular video block using at least one of N reference samples from a row above the rectangular video block or at least one of M reference samples from a left column of the rectangular video block—the reference samples being based on a number of wide angles that increases in proportion to the aspect ratio of the rectangular block—; and decoding the rectangular video block in an intra-coding mode using the prediction.

[0007] According to another aspect, a device is provided. The device includes a processor. The processor may be configured to encode blocks of video or decode bitstreams by executing any one of the methods described above.

[0008] According to another general aspect of at least one embodiment, a device is provided, the device comprising: a device according to any of the decoding embodiments; and at least one of (i) an antenna configured to receive a signal—the signal comprises a video block—, (ii) a band limiter configured to limit the received signal to a band of frequencies comprising the video block, and (iii) a display configured to display an output representing the video block.

[0009] According to another general aspect of at least one embodiment, a non-transient computer-readable medium is provided that includes data content generated according to any of the described encoding embodiments or variations.

[0010] According to another general aspect of at least one embodiment, a signal comprising video data generated according to any of the described encoding embodiments or variations is provided.

[0011] According to another general aspect of at least one embodiment, the bitstream is formatted to include data content generated according to any of the described encoding embodiments or variations.

[0012] According to another general aspect of at least one embodiment, a computer program product is provided that includes instructions that cause the computer to perform any of the described decoding embodiments or variations when the program is executed by a computer.

[0013] These and other aspects, features, and advantages of general embodiments will become apparent from the detailed description of the following exemplary embodiments, which will be read in conjunction with the accompanying drawings. Brief explanation of the drawing

[0014] FIG. 1 illustrates wide-angle prediction directions in which (a) modes 35 and 36 each replace mode 2 and mode 3, and (b) there are 65 directions, with angles labeled from 02 to 66. FIG. 2 illustrates an example of (a) a block having W=2H where the starting angle is slightly below the second diagonal and the ending angle is slightly above it, and (b) an upper left reference array requiring a small expansion. FIG. 3 illustrates an example of a block where H=2W, (a) the starting angle is slightly above the second diagonal and the ending angle is slightly below it, and (b) a reference array on top that requires a small expansion. Figure 4 illustrates a standard general video compression method. Figure 5 illustrates a standard general video decompression method. FIG. 6 illustrates an exemplary processor-based subsystem for implementing the generally described embodiments. FIG. 7 illustrates one embodiment of the method under the described embodiments. FIG. 8 illustrates another embodiment of the method under the described embodiments. FIG. 9 illustrates an exemplary apparatus under the described embodiments. Specific details for implementing the invention

[0015] The embodiments described herein relate to the field of video compression and generally relate to video compression and video encoding and decoding. At least one of the embodiments relates more specifically to video encoding and decoding related to transform coding of intra-prediction residuals, wherein enhanced multiple transforms and / or quadratic transforms are used in combination with wide-angle intra-prediction.

[0016] To achieve high compression efficiency, image and video coding schemes typically employ prediction that includes motion vector prediction and transformations to leverage spatial and temporal redundancy in video content. Generally, intra- or inter-prediction is used to utilize intra- or inter-frame correlation, and the differences between the original image and the predicted image, often represented as prediction errors or prediction residuals, are transformed, quantized, and entropy-coded. To reconstruct the video, the compressed data is decoded by inverse processes corresponding to entropy coding, quantization, transformation, and prediction.

[0017] In the HEVC (High Efficiency Video Coding, ISO / IEC 23008-2, ITU-T H.265) video compression standard, motion-compensated temporal prediction is adopted to utilize the redundancy existing between consecutive pictures of a video.

[0018] To this end, motion vectors are associated with each prediction unit (PU). Each Coding Tree Unit (CTU) is represented by a coding tree in the compression domain. This is a quad-tree division of the CTU, where each leaf is referred to as a Coding Unit (CU).

[0019] Subsequently, some intra or inter prediction parameters (prediction information) are assigned to each CU. To this end, this is spatially partitioned into one or more prediction units (PUs), and each PU is assigned some prediction information. Intra or inter coding modes are assigned to the CU level.

[0020] In the Joint Video Exploration Team (JVET) proposal for a new video compression standard known as the Joint Exploration Model (JEM), it was proposed to adopt a quadtree-binary tree (QTBT) block partitioning structure due to its high compression performance. A block in a binary tree (BT) can be divided into two sub-blocks of equal size by splitting it horizontally or vertically from the center. Consequently, BT blocks can have a rectangular shape with unequal widths and heights, unlike blocks in QT, which always have a square shape with equal height and width. In HEVC, angular intra-prediction directions were defined as 45 to -135 degrees over a 180-degree range, which were maintained in JEM, forming a definition of angular directions independent of the target block shape.

[0021] To encode these blocks, intra-prediction is used to provide an estimated version of the block using previously reconstructed neighbor samples. Then, the difference between the source block and the prediction is encoded. In the aforementioned classical codecs, a single line of reference samples is used to the left and top of the current block.

[0022] In HEVC (High Efficiency Video Coding, H.265), the encoding of frames in a video sequence is based on a quadtree (QT) block partitioning structure. Frames are divided into square coding tree units (CTUs) that have all undergone quadtree-based partitioning into multiple coding units (CUs) based on the rate-distortion (RD) criterion. Each CU is intra-predicted, meaning it is spatially predicted from causal neighboring CUs, or inter-predicted, meaning it is temporally predicted from already decoded reference frames. In I-slices, all CUs are intra-predicted, whereas in P and B slices, CUs can be either intra-predicted or inter-predicted. For intra-prediction, HEVC defines 35 prediction modes, including one planar mode (indexed as mode 0), one DC mode (indexed as mode 1), and 33 angular modes (indexed as modes 2-34). Angle modes are associated with prediction directions ranging from 45 degrees to -135 degrees clockwise. Since HEVC supports a quadtree (QT) block partitioning structure, all prediction units (PUs) have square shapes. Therefore, the definition of prediction angles from 45 degrees to -135 degrees is justified in terms of the shape of the prediction unit (PU). For a target prediction unit of size NxN pixels, the top reference array and the left reference array each have a size of 2N+1 samples, which is required to cover the aforementioned angle range for all target pixels. Considering that the height and width of the PU have the same length, the equality of the lengths of the two reference arrays also makes sense.

[0023] Regarding next-generation video coding standards, JVET’s attempt as a Joint Exploration Model (JEM) proposes the use of 65 angular intra-prediction modes in addition to planar and DC modes. However, the prediction directions are defined over the same angular range, namely from 45 degrees clockwise to -135 degrees. For a target block of size W x H pixels, the top reference array and the left reference array each have a size of (W + H + 1) pixels, which are required to cover the aforementioned angular range for all target pixels. This definition of angles in the JEM was done more for simplicity than for any other specific reason. However, doing so introduced some inefficiencies. In recent work, wide-angle intra-prediction has been proposed to enable intra-prediction direction angles higher than the conventional 45 degrees.

[0024] Figure 1 illustrates wide-angle prediction directions. Here, modes 35 and 36 replace modes 2 and 3, respectively (a). Note that in Figure 1, the arrows point in the opposite direction associated with any mode. Note that in this figure, the angles are labeled from 02 to 34, which correspond to the angle names prior to the adoption of the 65 prediction directions in the VVC software. Now, in the 65 directions (b), the angles are labeled from 02 to 66.

[0025] Wide Angle Intra Prediction (WAIP) has been adopted for use in the upcoming Versatile Video Compression (VVC) standard, also known as H.266. WAIP refers to the use of extra prediction directions beyond the standard 45-degree and -135-degree range used in intra prediction. When the target block is rectangular, depending on the block shape, some standard prediction directions are replaced by an equal number of wide angle directions in the opposite direction. In VVC / H.266, up to 10 wide angle directions can be used, resulting in 20 wide angle directions for prediction directions that are beyond the standard 45-degree to -135-degree range. To support these wide angle directions, reference array lengths are appropriately defined.

[0026] One problem with the adopted WAIP is that the defined wide angles are derived from the existing normal angles. The normal angles are optimized for square block shapes rather than rectangular blocks. As a result, the defined angles for rectangular blocks are not aligned along the diagonal directions. Depending on the rectangular block shape, the diagonals may be offset from these directions by some small amount. The problem caused by this is that the required lengths of the reference arrays are not exactly twice the lengths of the corresponding sides of the block. On the smaller side of the block, the reference array is longer than twice the length of the side. The length of the small extension is a function of the block shape. Also, as adopted in VVC / H.266 [1], when the number of wide angle directions is limited to 10, the length of the extension can be large for rectangular blocks with aspect ratios of 8, 16, and 32. The present disclosure provides several methods so that when the number of wide angles is not limited to 10, extension on the smaller side is not required.

[0027] The described general modalities propose several methods to unify the design of intra-prediction directions for square and rectangular blocks. This aims to use angles appropriate to the shape of rectangular blocks instead of simply angles derived from the case of square blocks. Thus, the range of prediction directions is accurately spread across the second diagonal of the target blocks. This design requires that the lengths of the reference arrays on the top and left be exactly twice the length of the corresponding side of the target block. Therefore, the small expansion required on the smaller side is not required if the number of wide angles expands from 20 to 28 (14 on each side). This aligns with intra-prediction without WAIP, where the total number of reference samples on the top and left is equal to twice the sum of the height and width of the target block. If the number of wide angles is limited to 10 as adopted in VVC / H.266, rectangular blocks with aspect ratios of 8:1, 16:1, and 32:1 will still require expansion on the smaller side of the reference to support the defined prediction directions.

[0028] Wide Angle Intra Prediction (WAIP) has been adopted for use in the upcoming Versatile Video Compression (VVC) standard, also known as H.266. WAIP refers to the use of extra prediction directions beyond the usual 45-degree and -135-degree ranges used in intra prediction. When the target block is rectangular, depending on the block shape, some regular prediction directions are replaced by an equal number of wide angle directions in the opposite direction. Thus, when the target block is flat, that is, when its width is greater than its height, some horizontal directions close to 45 degrees are replaced by an equal number of vertical directions beyond -135 degrees. Similarly, when the target block is tall, that is, when its height is greater than its width, some vertical directions close to -135 degrees are replaced by some horizontal directions beyond 45 degrees. This is exemplified in Fig. 1, where 35 angle modes are used, as in the early versions of VVC (and also in HEVC). In the current version of VVC, the number of angle modes between 45 degrees and -135 degrees has been increased to 65. Note that in Figure 1, the arrows point in the opposite direction associated with any mode.

[0029] In VVC / H.266, up to 10 wide-angle directions can be used, resulting in 20 wide-angle directions for prediction directions that exceed the usual 45 to -135 degree range. Therefore, the total number of angle modes used is 85 (= 65 + 20), of which only 65 are used for any given target block. If the target block is square-shaped, 65 standard modes between 45 and -135 degrees are used for prediction.

[0030] There are two problems with the current WAIP specification. The first problem arises from the fact that the defined wide angles are derived from existing angles optimized for square block shapes. As a result, the predicted angles for any rectangular block are not optimized for the lengths of the reference arrays in the same sense that the original angles were for the square block. This is illustrated in FIGS. 2 and FIGS. 3.

[0031] In the example of Fig. 2, W=2H. In (a) for the flat block, the starting angle (normal) is slightly below the second diagonal and the ending angle (wide angle) is slightly above it. In (b), the reference array on the upper left requires a small extension (shown as Ext).

[0032] In the example of Fig. 3, H=2W. In (a) for the tall block, the starting angle (wide angle) is slightly above the second diagonal and the ending angle (normal) is slightly below it. In (b), the reference array on top requires a small extension (shown as Ext).

[0033] The start and end angles for a rectangular block are offset by a small amount from the second diagonal. For a flat rectangular block, the start angle has an intraPredAngle (also called angle parameter A) equal to (32*H / W) + 1, and the end angle corresponds to an inverse angle with an intraPredAngle equal to round(1024 / ((32*H / W) + 1)). Similarly, for a tall rectangular block, the end angle has an intraPredAngle equal to (32*H / W) + 1, and the start angle corresponds to an inverse angle with an intraPredAngle equal to round(1024 / ((32*H / W) + 1)). Due to this small offset from the second diagonal, the length of the reference array on the shorter side of the target block (without the top-left corner reference sample) is slightly greater than twice the length of the side. At the same time, the reference array on the longer side, which is twice the length of the side of the block (without the top-left corner reference sample), contains some redundant samples toward the end of the array because these samples are never used in any prediction mode. This makes the design of the defined prediction angles suboptimal.

[0034] The second problem with the current WAIP specification arises from limiting the number of wide angles to 10 on each side (i.e., 10 more angles than the standard angle). This number is optimized for target rectangular blocks with an aspect ratio (ratio of the longer side to the shorter side) equal to 4:1. For these blocks, the start and end angles are close to the second diagonal, as previously mentioned. However, the current VVC standard also supports rectangular blocks with aspect ratios of 8:1, 16:1, and 32:1. In these cases, the start and end angles are significantly offset from the second diagonal, which ultimately requires a much larger extension of the shorter reference array (exceeding twice the side length) and also makes the longer reference array redundant due to a larger number of samples at the ends, which are not used in any prediction mode. Therefore, it is proposed to extend the number of wide angles on each side to 14, which will support all rectangular blocks up to an aspect ratio of 32:1. This will be explained in detail later in the text.

[0035] The basic idea behind wide-angle prediction is to adapt the prediction directions according to the block shape while maintaining the total number of prediction modes constant. This is achieved by adding some prediction directions on the larger side of the block and reducing them on the shorter side. The overall goal is to improve prediction accuracy to achieve higher compression efficiency. Since the newly introduced directions extend beyond the usual 180-degree range from 45 degrees to -135 degrees, they are referred to as wide-angle directions.

[0036] In this disclosure, it will be assumed that there are 65 intra-predicted modes for a target block as adopted by the current VVC standard. When the target block is square, the wide angles play no particular role as the defined modes for the block remain unchanged. When the target block is flat, that is, when its width W is greater than its height H, some modes close to 45 degrees are removed, and an equal number of wide angle modes exceeding -135 degrees are added. The added directions are indexed as prediction modes 67, 68, ... etc. Similarly, when the target block is tall, some modes close to -135 degrees are removed, and an equal number of wide angle modes exceeding 45 degrees are added. The added directions are indexed as prediction modes -1, -2, ... etc., because prediction modes 0 and 1 are reserved for PLANAR and DC predictions. Table 1 shows the number of normal modes replaced by wide angle modes for different block shapes. This parameter is called modeShift.

[0037]

[0038] For any target block, mapping from the substituted normal mode to the wide-angle mode is performed as follows:

[0039]

[0040] Looking at the predicted directions clockwise (see Table 1), it is clear that for the flat rectangular block, the directions start in a normal mode and end in a wide mode. Meanwhile, for the tall rectangular block, the directions start in a wide mode but end in a normal mode.

[0041] The angle parameters of the wide angles (intraPredAngle) are derived from the angle parameters of the substituted regular modes as follows:

[0042] W > H and, If you display the value of intraPredAngle for this replaced mode #n, the replacing wide-angle mode is It has the same intraPredAngle as, where represents the intraPredAngle for mode #(n+1). Similarly, H > W, and If you display the value of intraPredAngle for this replaced mode #n, the replacing wide-angle mode is It has the same intraPredAngle as, where indicates the intraPredAngle for mode #(n+1). As an example, Table 2 shows the intraPredAngle values ​​for W / H=4.

[0043]

[0044] As another example, Table 3 shows the intraPredAngle values ​​for W / H=1 / 4.

[0045]

[0046] In both cases, the inverse angle parameter invAngle of the new mode is given as round(8192 / intraPredAngle).

[0047] To support wide-angle prediction modes, the lengths of the top and left reference arrays are obtained as follows:

[0048]

[0049] Here, whRatio = Min( Abs(Log2(W / H)), 2).

[0050] The above algorithm can be expressed equivalently as follows.

[0051]

[0052] From the above decisions, it is evident that the shorter reference array length is longer than twice the side length. If W > H, for example, the upper left reference array is longer than 2*H. Similarly, if H > W, the upper top reference array is longer than 2*W. The difference is the sum of two terms resulting from two different causes. The first term results from the limitation of the wide angle number up to 10 (whRatio has a maximum value equal to 2, which corresponds to W / H >= 4 or W / H <= 1 / 4). For W / H <= 4 or W / H >= 1 / 4, the first term is equal to zero; however, for W / H > 4 or W / H < 1 / 4, the first term has a positive value that is not zero. The second term (expressed by the ceiling function) results from the fact that the starting angle (for W > H) or the ending angle (for H > W) is not aligned along the second diagonal of the block. The embodiments described below provide some exemplary methods to eliminate these terms.

[0053] The first term can be 0, provided that there is no limitation of the number of wide angles to 10, as this is in the current VVC standard. The number of wide angles can be increased proportionally to the aspect ratio of the rectangular blocks. The alternative modes for different block shapes and the corresponding number of wide angles are given in Table 4 below. It should be noted that a maximum of 14 wide angles on both sides (a total of 28 wide angles) is sufficient to cover all block sizes allowed in the current VVC standard.

[0054]

[0055] The following embodiments present some exemplary methods aimed at aligning the start and end prediction directions for a block along its second diagonal. The application of these methods will make the second term (in the expression given in the previous section) zero. Any of these methods may be considered as exemplary embodiments.

[0056] Method 1: Truncation

[0057] In this method, the specified prediction directions remain unchanged. For any target rectangular block, only the two extreme directions are aligned with its diagonal.

[0058] For a flattened block, i.e., for W > H, the starting normal mode has an angle parameter intraPredAngle equal to (32 * H / W) + 1, and the ending wide-angle mode has an intraPredAngle equal to round(1024 / ((32 * H / W) + 1)). Similarly, for a tall block, i.e., for H > W, the ending normal mode has an intraPredAngle equal to (32 * W / H) + 1, and the starting wide-angle mode has an intraPredAngle equal to round(1024 / ((32 * W / H) + 1)). The simplest way to align these directions with the block's diagonals is to truncate them as follows:

[0059]

[0060] These two statements will make the second term zero. Optionally, to align the last (first) wide angle with the second diagonal of the flattened (tall) block, the following changes are suggested:

[0061]

[0062] In all cases, the inverse angle parameter invAngle is derived as follows:

[0063]

[0064] For example, Table 5(a) and Table 5(b) show the intraPredAngle values ​​for the start and end directions for W / H=2 and W / H=4, respectively. The red figures represent the changes made due to cutting.

[0065] [Table 5a]

[0066]

[0067] [Table 5b]

[0068]

[0069] Similarly, Table 6(a) and Table 6(b) show the intraPredAngle values ​​for the start and end directions for W / H=1 / 2 and W / H=1 / 4, respectively.

[0070] [Table 6a]

[0071]

[0072] [Table 6b]

[0073]

[0074] Method 2: Dyadic Alignment

[0075] In this method, the prediction directions are changed so that the set of angle parameters, i.e., intraPredAngle, includes all factors of 32. Correspondingly, the corresponding wide angles also become multiples of 32. In this process, some existing intraPredAngle values ​​are replaced. The new set of angle parameters is used for all block shapes, including square blocks. As a variation, the new set may be used only for rectangular blocks. Here, the angle values ​​are derived assuming there is no limit on the number of wide angles to 10.

[0076]

[0077] Note that since the intraPredAngle value of 2 already exists, the modeShift values ​​also change slightly. Also, for aspect ratios up to 16:1, which is the case for VVC / H.266 in the All_INTRA configuration, only 14 wide angles need to be added to both sides.

[0078]

[0079] Method 3: New orientations for all block shapes

[0080] Since the dyadic insertions of angles make the distribution of angle values ​​somewhat irregular due to the uneven spacing of the angle values, it is proposed to modify other angle values ​​to make the spacing somewhat more uniform. Note that there is no unique method for dispersing angles, as a slight change in any single value will result in nearly the same outcome. As a variation, the new set can be used only for rectangular blocks, while the original values ​​can be used for square target blocks, as in the standard. As examples, the following angle values ​​are proposed.

[0081] [Table 9a]

[0082]

[0083] [Table 9b]

[0084]

[0085] For the above examples, the modeShift values ​​also need to be changed slightly as in Table 8.

[0086] Finally, it should also be noted that if the number of wide angles is still limited to 10 because it is in VVC / H.266 code, the above methods will still render the second term as 0. The first term will be 0 for flat blocks where W / H <= 4, or for tall blocks where W / H >= 1 / 4. Therefore, for flat blocks where W / H > 4, or for tall blocks where W / H < ¼, the shorter reference array will still require an extension of more than twice the side length.

[0087] One advantage of the proposed invention is that it eliminates suboptimal solutions in current WAIP designs by aligning prediction directions suitable for block shapes. With this optimization, reference array lengths (excluding the top-left reference sample) need to be only twice the length of the corresponding side of the block.

[0088] An embodiment of the method (700) under the general modes described herein is illustrated in FIG. 7. The method starts at a start block (701), and control proceeds to a block (710) for predicting samples of a rectangular video block using at least one of N reference samples from a row above the rectangular video block or at least one of M reference samples from a left column of the rectangular video block—the reference samples are based on a number of wide angles that increases in proportion to the aspect ratio of the rectangular block. Control proceeds from the block (710) to a block (720) for encoding the rectangular video block using prediction in intra-coding mode.

[0089] Another embodiment of the method (800) under the general modes described herein is illustrated in FIG. 8. The method starts at a start block (801), and control proceeds to a block (810) for predicting samples of a rectangular video block using at least one of N reference samples from a row above the rectangular video block or at least one of M reference samples from the left column of the rectangular video block—the reference samples are based on a number of wide angles that increases in proportion to the aspect ratio of the rectangular block. Control proceeds from the block (810) to a block (820) for decoding the rectangular video block using prediction in intra-coding mode.

[0090] FIG. 9 illustrates an embodiment of a device (900) for encoding, decoding, compressing, or decompressing video data using wide-angle intra prediction. The device includes a processor (910) and may be interconnected to a memory (920) through at least one port. Both the processor (910) and the memory (920) may also have one or more additional interconnections to external connections.

[0091] The processor (910) is also configured to insert or receive information into a bitstream and to compress, encode, or decode using any of the described modes.

[0092] This document describes various aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described by specificity and, at least to demonstrate individual characteristics, are described in a manner that often sounds limiting. However, this is for clarity in the description and does not limit the application or scope of such aspects. In practice, all different aspects may be combined and exchanged to provide additional aspects. Furthermore, aspects may also be combined and exchanged with aspects described in earlier applications.

[0093] The embodiments described and considered in this document may be implemented in many different forms. FIGS. 4, 5 and 6 provide some embodiments below, but other embodiments are considered, and the discussion of FIGS. 4, 5 and 6 does not limit the scope of the implementations. At least one of the embodiments generally relates to video encoding and decoding, and at least one other embodiment generally relates to transmitting a generated or encoded bitstream. These and other embodiments may be implemented as a method, an apparatus, a computer-readable storage medium storing instructions for encoding or decoding video data according to any of the described methods, and / or a computer-readable storage medium storing a bitstream generated according to any of the described methods.

[0094] In this application, the terms "reconstructed" and "decoded" may be used interchangeably, the terms "pixel" and "sample" may be used interchangeably, and the terms "image," "picture," and "frame" may be used interchangeably. Although not mandatory, the term "reconstructed" is typically used on the encoder side, while "decoded" is used on the decoder side.

[0095] Various methods have been described herein, and each of the methods comprises one or more steps or actions to achieve the described method. If a specific order of steps or actions is not required for proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined.

[0096] The various methods and other embodiments described in this document may be used to modify the modules of the video encoder (100) and decoder (200), e.g., intra-prediction, entropy coding, and / or decoding modules (160, 360, 145, 330), as illustrated in FIGS. 4 and 5. Furthermore, the embodiments are not limited to VVC or HEVC and may be applied to other standards and recommendations, e.g., existing or future-developed, and any extensions of such standards and recommendations (including VVC and HEVC). Unless otherwise indicated or technically excluded, the embodiments described in this document may be used individually or in combination.

[0097] Various numerical values, for example, {{1, 0}, {3, 1}, {1, 1}} are used in this document. Specific values ​​are for illustrative purposes only, and the described modes are not limited to these specific values.

[0098] FIG. 4 illustrates an encoder (100). Variations of this encoder (100) are considered, but the encoder (100) is described below for the sake of clarity without describing all expected variations.

[0099] Before encoding, the video sequence undergoes pre-encoding processing (101), for example, applying a color conversion to the input color picture (e.g., converting from RGB 4:4:4 to YCbCr 4:2:0), or remapping the input picture components to obtain a signal distribution that is more resilient to compression (e.g., by using histogram equalization of one of the color components). Metadata is associated with the preprocessing and can be attached to the bitstream.

[0100] In the encoder (100), the picture is encoded by encoder elements as described below. The picture to be encoded is partitioned (102) and processed, for example, into units of CUs. Each unit is encoded using, for example, an intra or inter mode. When a unit is encoded in intra mode, it performs intra prediction (160). In inter mode, motion estimation (175) and compensation (170) are performed. The encoder determines whether to use intra mode or inter mode to encode the unit (105), and indicates the intra / inter decision, for example, by a prediction mode flag. Prediction residuals are calculated, for example, by subtracting the predicted block from the original image block (110).

[0101] The predicted residuals are subsequently transformed (125) and quantized (130). The quantized transformation coefficients, as well as motion vectors and other syntax elements, are entropy-coded to output a bitstream (145). The encoder can skip the transformation and apply quantization directly to the untransformed residual signal. The encoder can bypass both transformation and quantization, that is, the residuals are coded directly without the application of transformation or quantization processes.

[0102] The encoder decodes the encoded block to provide a reference for additional predictions. To decode the prediction residuals, the quantized transform coefficients are dequantized (140) and inversely transformed (150). By combining the decoded prediction residuals and the predicted block (155), an image block is reconstructed. In-loop filters (165) are applied to the reconstructed picture to perform deblocking / SAO (Sample Adaptive Offset) filtering, for example, to reduce encoding artifacts. The filtered image is stored in a reference picture buffer (180).

[0103] FIG. 5 illustrates a block diagram of a video decoder (200). In the decoder (200), the bitstream is decoded by decoder elements as described below. The video decoder (200) generally performs a decoding pass that is inversely to the encoding pass as described in FIG. 4. Additionally, the encoder (100) generally performs video decoding as part of encoding video data.

[0104] In particular, the input to the decoder includes a video bitstream that can be generated by the video encoder (100). The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, and other coded information. Picture partition information indicates how the picture is partitioned. Thus, the decoder can partition the picture according to the decoded picture partitioning information (235). To decode the prediction residuals, the transform coefficients are dequantized (240) and inversely transformed (250). By combining the decoded prediction residuals and the predicted blocks (255), an image block is reconstructed. The predicted blocks can be obtained from intra prediction (260) or motion-compensated prediction (i.e., inter prediction) (275) (270). In-loop filters (265) are applied to the reconstructed image. The filtered image is stored in a reference picture buffer (280).

[0105] The decoded picture may further undergo post-decoding processing (285), for example, inverse color conversion (e.g., conversion from YCbCr 4:2:0 to RGB 4:4:4) or inverse remapping, which performs the reverse of the remapping process performed in pre-encoding processing (101). The post-decoding processing may use metadata derived from pre-encoding processing and signaled in the bitstream.

[0106] FIG. 6 illustrates a block diagram of an example of a system in which various embodiments are implemented. The system (1000) may be implemented as a device comprising various components described below and configured to perform one or more of the embodiments described herein. Examples of such devices include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected consumer electronics, and servers. The elements of the system (1000) may be implemented, either alone or in combination, as a single integrated circuit, multiple ICs, and / or discrete components. For example, in at least one embodiment, the processing and encoder / decoder elements of the system (1000) are distributed across multiple ICs and / or discrete components. In various embodiments, the system (1000) is coupled to other similar systems or other electronic devices, for example, via a communication bus or through dedicated input and / or output ports. In various embodiments, the system (1000) is configured to implement one or more of the embodiments described in this document.

[0107] The system (1000) includes at least one processor (1010) configured to execute instructions loaded therein, for example, to implement the various embodiments described herein. The processor (1010) may include embedded memory, an input / output interface, and various other circuits known in the art. The system (1000) includes at least one memory (1020) (e.g., a volatile memory device and / or a non-volatile memory device). The system (1000) includes a storage device (1040) that may include non-volatile memory and / or volatile memory, including but not limited to EEPROM, ROM, PROM, RAM, DRAM, SRAM, flash, magnetic disk drive, and / or optical disk drive. The storage device (1040) may include, as non-limiting examples, an internal storage device, an attached storage device, and / or a network-accessible storage device.

[0108] The system (1000) includes, for example, an encoder / decoder module (1030) configured to process data to provide an encoded video or a decoded video, and the encoder / decoder module (1030) may include its own processor and memory. The encoder / decoder module (1030) represents a module(s) that may be included in a device to perform encoding and / or decoding functions. As is known, the device may include one or both of the encoding and decoding modules. Additionally, the encoder / decoder module (1030) may be implemented as a separate element of the system (1000) or may be integrated within the processor (1010) as a combination of hardware and software, as is known to those skilled in the art.

[0109] Program code to be loaded onto a processor (1010) or an encoder / decoder (1030) to perform the various embodiments described in this document may be stored in a storage device (1040) and subsequently loaded onto memory (1020) for execution by the processor (1010). According to various embodiments, one or more of the processor (1010), memory (1020), storage device (1040), and encoder / decoder module (1030) may store one or more of various items during the execution of the processes described in this document. These stored items may include, but are not limited to, input video, decoded video or parts of decoded video, bitstreams, matrices, variables, and intermediate or final results from the processing of mathematical expressions, formulas, operations, and operation logic.

[0110] In some embodiments, memory located inside the processor (1010) and / or the encoder / decoder module (1030) is used to store instructions and to provide working memory for processing required during encoding or decoding. However, in other embodiments, memory outside the processing device (e.g., the processing device may be either the processor (1010) or the encoder / decoder module (1030)) is used for one or more of these functions. The external memory may be memory (1020) and / or storage device (1040), e.g., dynamic volatile memory and / or non-volatile flash memory. In some embodiments, the external non-volatile flash memory is used to store the operating system of the television. In at least one embodiment, high-speed external dynamic volatile memory, such as RAM, is used as working memory for video coding and decoding operations, such as MPEG-2, HEVC, or VVC (Versatile Video Coding).

[0111] Inputs to the elements of the system (1000) may be provided through various input devices as shown in block (1130). These input devices include, but are not limited to, (i) an RF part that receives an RF signal transmitted over the air (OTA) by, for example, a broadcaster, (ii) a composite input terminal, (iii) a USB input terminal, and / or (iv) an HDMI input terminal.

[0112] In various embodiments, the input devices of block (1130) have their respective associated input processing elements as known in the art. For example, the RF portion may be associated with elements for (i) selecting a desired frequency (also referred to as selecting a signal or band-limiting a signal to a band of frequencies), (ii) down-converting the selected signal, (iii) band-limiting to a narrower band of frequencies to select a single frequency band (e.g., which may be referred to as a channel in certain embodiments), (iv) demodulating the down-converted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select a stream of desired data packets. The RF portion of various embodiments includes one or more elements for performing these functions, e.g., frequency selectors, signal selectors, band-limiters, channel selectors, filters, down-converters, demodulators, error correctors, and demultiplexers. The RF section may include a tuner that performs various such functions, for example, including down-converting the received signal to a lower frequency (e.g., intermediate frequency or near-baseband frequency) or to the baseband. In one set-top box embodiment, the RF section and its associated input processing element receive an RF signal transmitted over a wired (e.g., cable) medium and perform frequency selection by filtering, down-converting, and re-filtering to a desired frequency band. Various embodiments rearrange the order of the aforementioned (and other) elements, remove some of these elements, and / or add other elements that perform similar or different functions. Adding elements may include inserting elements between existing elements, for example, inserting amplifiers and analog-to-digital converters. In various embodiments, the RF section includes an antenna.

[0113] Additionally, the USB and / or HDMI terminals may each include interface processors for connecting the system (1000) to other electronic devices via the USB and / or HDMI connections. It should be understood that various aspects of input processing, e.g., Reed-Solomon error correction, may be implemented, e.g., within a separate input processing IC or within the processor (1010). Similarly, aspects of USB or HDMI interface processing may be implemented within separate interface ICs or within the processor (1010). The demodulated, error-corrected, and demultiplexed streams are provided to various processing elements, including, e.g., a processor (1010) and an encoder / decoder (1030) operating in combination with memory and storage elements, to process the data streams for presentation on an output device.

[0114] Various elements of the system (1000) may be provided within an integrated housing. Within the integrated housing, various elements may be interconnected and data may be transmitted between them using a suitable connection arrangement (1140) known in the relevant art, such as, for example, an I2C bus, wiring, and a printed circuit board.

[0115] The system (1000) includes a communication interface (1050) that enables communication with other devices through a communication channel (1060). The communication interface (1050) may include a transceiver configured to transmit and receive data through the communication channel (1060), but is not limited thereto. The communication interface (1050) may include a modem or a network card, but is not limited thereto, and the communication channel (1060) may be implemented, for example, within a wired and / or wireless medium.

[0116] In various embodiments, data is streamed to the system (1000) using a wireless network such as IEEE 802.11. The wireless signals in these embodiments are received, for example, through a communication channel (1060) and a communication interface (1050) adapted for Wi-Fi communication. The communication channel (1060) in these embodiments is typically connected to an access point or router that provides access to external networks, including the Internet, to allow streaming applications and other over-the-top (OTT) communications. Other embodiments provide the streamed data to the system (1000) using a set-top box that transmits data via the HDMI connection of the input block (1130). Yet another embodiment provides the streamed data to the system (1000) using the RF connection of the input block (1130).

[0117] The system (1000) may provide output signals to various output devices, including a display (1100), speakers (1110), and other peripheral devices (1120). The other peripheral devices (1120) include, in various examples of the embodiments, one or more of a standalone DVR, a disc player, a stereo system, a lighting system, and other devices that provide functions based on the output of the system (1000). In various embodiments, control signals are communicated between the system (1000) and the display (1100), speakers (1110), or other peripheral devices (1120) using signaling such as AV.Link, CEC, or other communication protocols that enable device-to-device control with or without user intervention. The output devices may be communicably coupled to the system (1000) through dedicated connections via their respective interfaces (1070, 1080, and 1090). Alternatively, output devices may be connected to the system (1000) using a communication channel (1060) through a communication interface (1050). The display (1100) and speakers (1110) may be integrated as a single unit with other components of the system (1000), such as an electronic device, e.g., a television. In various embodiments, the display interface (1070) includes a display driver, e.g., a timing controller (T Con) chip.

[0118] Alternatively, the display (1100) and speaker (1110) may be separated from one or more of the other components, for example, if the RF portion of the input (1130) is part of a separate set-top box. In various embodiments where the display (1100) and speakers (1110) are external components, the output signal may be provided through dedicated output connections, for example, HDMI ports, USB ports, or COMP outputs.

[0119] The embodiments may be performed by computer software implemented by the processor (1010), by hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments may be implemented by one or more integrated circuits. The memory (1020) may be of any type suitable for the technical environment and may be implemented using any suitable data storage technology, e.g., as non-limiting examples, optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory. The processor (1010) may be of any type suitable for the technical environment and may include one or more of microprocessors, general-purpose computers, special-purpose computers, and processors based on a multi-core architecture as non-limiting examples.

[0120] Various implementations involve decoding. As used in this application, “decoding” may include all or part of the processes performed on a received encoded sequence, for example, to generate a final output suitable for display. In various embodiments, such processes include one or more of the processes typically performed by a decoder, for example, entropy decoding, inverse quantization, inverse transform, and differential decoding. In various embodiments, these processes also, or alternatively, include the processes performed by the decoder of the various implementations described in this application, for example, extracting indices of weights to be used for various intra-predicted reference arrays.

[0121] As additional examples, in one embodiment, "decoding" refers only to entropy decoding, in another embodiment, "decoding" refers only to differential decoding, and in yet another embodiment, "decoding" refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process" is intended to specifically refer to a subset of operations or to generally refer to a broader decoding process will be apparent based on the context of the specific descriptions and will be well understood by a person skilled in the art.

[0122] Various implementations involve encoding. In a manner similar to the above discussion regarding "decoding," "encoding" as used in this application may include all or part of the processes performed on, for example, an input video sequence to generate an encoded bitstream. In various embodiments, such processes include one or more of the processes typically performed by an encoder, for example, partitioning, differential encoding, transformation, quantization, and entropy encoding. In various embodiments, these processes also, or alternatively, include the weighting of intra-predicted reference arrays, the processes performed by the encoder of the various implementations described in this application.

[0123] As an additional example, in one embodiment, "encoding" refers only to entropy encoding, in another embodiment, "encoding" refers only to differential encoding, and in yet another embodiment, "encoding" refers to a combination of differential encoding and entropy encoding. Whether the phrase "encoding process" is intended to specifically refer to a subset of operations or to generally refer to a broader decoding process will be evident based on the context of the specific descriptions and will be well understood by a person skilled in the art.

[0124] It should be noted that the syntax elements used in this specification are descriptive terms. Accordingly, they do not exclude the use of other syntax element names.

[0125] It must be understood that when a drawing is presented as a flowchart, it also provides a block diagram of the corresponding device. Similarly, it must be understood that when a drawing is presented as a block diagram, it also provides a flowchart of the corresponding method / process.

[0126] Various embodiments refer to rate distortion calculation or rate distortion optimization. In particular, during the encoding process, when constraints on computational complexity are often given, a balance or trade-off between rate and distortion is usually considered. Rate distortion optimization is typically formulated as minimizing a rate distortion function, which is a weighted sum of rate and distortion. There are different approaches to solving the rate distortion optimization problem. For example, these approaches may be based on extensive testing of all encoding options, including all considered modes or coding parameter values, along with a complete evaluation of the coding cost and associated distortion of the reconstructed signal after coding and decoding. To reduce encoding complexity, a faster approach may also be used, specifically by calculating approximated distortion based on predicted or predicted residual signals rather than the reconstructed ones. A combination of these two approaches may also be used, for example, by using approximated distortion for only some of the possible encoding options and full distortion for others. Other approaches evaluate only a subset of the possible encoding options. More generally, many approaches use any of the various techniques to perform optimization, but optimization does not necessarily have to be a complete evaluation of both coding costs and associated distortions.

[0127] The implementations and aspects described herein may be implemented, for example, as methods or processes, devices, software programs, data streams, or signals. Although discussed only in the context of a single form of implementation (e.g., discussed only as a method), implementations of the discussed features may also be implemented in other forms (e.g., devices or programs). Devices may be implemented, for example, as appropriate hardware, software, and firmware. Methods may be implemented as processors, for example, generally referring to processing devices, including, for example, computers, microprocessors, integrated circuits, or programmable logic devices. Processors also include, for example, communication devices such as computers, cell phones, PDAs (portable / personal digital assistants), and other devices that facilitate the communication of information between end users.

[0128] References to "one embodiment," "an embodiment," "one implementation," or "an implementation," as well as other variations thereof, imply that specific features, structures, characteristics, etc. described in relation to the embodiment are included in at least one embodiment. Accordingly, the appearance of phrases such as "in one embodiment," "in an embodiment," "in one implementation," or "in an implementation," as well as any other variations, at various locations throughout this document, do not necessarily all refer to the same embodiment.

[0129] Additionally, this document may refer to "determining" various pieces of information. Determining information may include, for example, estimating information, calculating information, predicting information, or retrieving information from memory.

[0130] Additionally, this document may refer to "accessing" various pieces of information. Accessing information may include, for example, receiving information, retrieving information (for example, from memory), storing information, moving information, copying information, calculating information, determining information, predicting information, or estimating information.

[0131] Additionally, this document may refer to "receiving" various pieces of information. Receiving is intended as a broad term, as in "accessing." Receiving information may include, for example, accessing information or retrieving information (for example, from memory). Furthermore, "receiving" is typically involved in one or another manner during operations such as, for example, storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information.

[0132] For example, in the cases of "A / B", "A and / or B", and "at least one of A and B", it should be noted that the use of any of " / ", "and / or", and "at least one of ~" is intended to include the selection of only the first listed option (A), the selection of only the second listed option (B), or the selection of both options (A and B). As a further example, in the cases of "A, B, and / or C" and "at least one of A, B, and C", these phrases are intended to include the selection of only the first listed option (A), the selection of only the second listed option (B), the selection of only the third listed option (C), the selection of only the first and second listed options (A and B), the selection of only the first and third listed options (A and C), the selection of only the second and third listed options (B and C), or the selection of all three options (A, B, and C). This can be extended as many items are listed, as is obvious to a person skilled in the art in this field and related fields.

[0133] Additionally, as used herein, the word "signal" refers, among other things, to indicating something to a corresponding decoder. For example, in certain embodiments, the encoder signals a specific one of a plurality of weights to be used for intra-predicted reference arrays. In this way, in one embodiment, the same parameter is used on both the encoder side and the decoder side. Thus, for example, the encoder may transmit a specific parameter to the decoder (explicit signaling) so that the decoder can use the same specific parameter. Conversely, if the decoder already has other things in addition to the specific parameter, signaling without transmission may be used simply to allow the decoder to know and select the specific parameter (implicit signaling). By avoiding the transmission of any actual functions, bit saving is realized in various embodiments. It will be understood that signaling can be achieved in various ways. For example, in various embodiments, one or more syntax elements, flags, etc. are used to signal information to the corresponding decoder. The foregoing relates to the verb form of the word "signal," but the word "signal" may also be used as a noun in this specification.

[0134] As is apparent to those skilled in the art, implementations may generate various signals formatted to carry information that may be stored or transmitted, for example. The information may include, for example, instructions for performing a method, or data generated by one of the described implementations. For example, a signal may be formatted to carry a bitstream of the described embodiment. Such a signal may be formatted as an electromagnetic wave or as a baseband signal, for example (e.g., using the radio frequency portion of the spectrum). Formatting may include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information carried by the signal may be, for example, analog or digital information. The signal may be transmitted via various different wired or wireless links as known. The signal may be stored on a processor-readable medium.

[0135] The foregoing description has described numerous embodiments. These and additional embodiments, across various and different claim categories and types, include the following optional features alone or in any combination:

[0136] - Using prediction directions during intra-prediction in encoding and decoding beyond -135 and 45 degrees

[0137] - Extension of interactions between wide-angle modes and PDPC (prediction-dependent prediction combination)

[0138] - Extending prediction directions horizontally or vertically while removing some directions from the opposite direction to maintain the same total number of directions.

[0139] - Extending the number of directions to both -135 degrees and 45 degrees.

[0140] - Combination of PDPC and wide-angle intra-prediction for samples within a block

[0141] - Signaling from the encoder to the decoder where prediction directions are being used

[0142] - Using a subset of prediction directions

[0143] - The block is a CU that has a rectangular shape

[0144] - Reference samples are taken from neighboring blocks

[0145] - A bitstream or signal containing one or more of the described syntax elements or variations thereof.

[0146] - Inserting into signaling syntax elements that enable the decoder to process the bitstream in the reverse manner of what is done by the encoder.

[0147] - Generating and / or transmitting and / or receiving and / or decoding a bitstream or signal containing one or more of the described syntax elements or variations thereof.

[0148] - A TV, set-top box, cell phone, tablet, or other electronic device performing any of the described embodiments.

[0149] - A TV, set-top box, cell phone, tablet, or other electronic device that performs any of the described embodiments and displays the resulting image (e.g., using a monitor, screen, or other type of display).

[0150] - A TV, set-top box, cell phone, tablet, or other electronic device that tunes a channel (e.g., using a tuner) to receive a signal containing an encoded image, and performs any of the described embodiments.

[0151] - A TV, set-top box, cell phone, tablet, or other electronic device that receives a signal containing an encoded image (e.g., using an antenna) and performs any of the described embodiments.

[0152] - Various other generalized as well as specialized features are supported and considered throughout the entire disclosure.

Claims

Claim 1 As a method: predicting a sample of a rectangular video block using at least one sample of a reference array associated with the rectangular video block based on a prediction mode, wherein the rectangular video block has a number of wide angles determined based on the aspect ratio of the rectangular video block, and at least a start prediction direction or end prediction direction associated with the prediction mode is aligned along the second diagonal of the rectangular video block, and the length of the reference array is twice the length of the corresponding side of the rectangular video block, and the angle parameter values ​​used for prediction are 0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 37, 42, 47, 52, 57, 64, 73, 85, 102, 128, 171, 256, 341, and 512 -; A method comprising the step of encoding the rectangular video block in an intra-coding mode using the predicted sample. Claim 2 As a device: comprising a processor, said processor: predicting a sample of a rectangular video block using at least one sample of a reference array associated with the rectangular video block based on a prediction mode, wherein the rectangular video block has a number of wide angles determined based on the aspect ratio of the rectangular video block, and at least a start prediction direction or end prediction direction associated with the prediction mode is aligned along the second diagonal of the rectangular video block, and the length of the reference array is twice the length of the corresponding side of the rectangular video block, and the angle parameter values ​​used for prediction are 0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 37, 42, 47, 52, 57, 64, 73, 85, 102, 128, 171, 256, 341, and 512 -; and a device configured to encode the rectangular video block in intra-coding mode using the predicted sample. Claim 3 As a method: predicting a sample of a rectangular video block using at least one sample of a reference array associated with the rectangular video block based on a prediction mode, wherein the rectangular video block has a number of wide angles determined based on the aspect ratio of the rectangular video block, and at least a start prediction direction or end prediction direction associated with the prediction mode is aligned along the second diagonal of the rectangular video block, and the length of the reference array is twice the length of the corresponding side of the rectangular video block, and the angle parameter values ​​used for prediction are 0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 37, 42, 47, 52, 57, 64, 73, 85, 102, 128, 171, 256, 341, and 512 -; A method comprising the step of decoding the rectangular video block in an intra-coding mode using the predicted sample. Claim 4 As a device: comprising a processor, said processor: predicting a sample of a rectangular video block using at least one sample of a reference array associated with the rectangular video block based on a prediction mode, wherein the rectangular video block has a number of wide angles determined based on the aspect ratio of the rectangular video block, and at least a start prediction direction or end prediction direction associated with the prediction mode is aligned along the second diagonal of the rectangular video block, and the length of the reference array is twice the length of the corresponding side of the rectangular video block, and the angle parameter values ​​used for prediction are 0, 1, 2, 3, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 37, 42, 47, 52, 57, 64, 73, 85, 102, 128, 171, 256, 341, and 512 -; and a device configured to decode the rectangular video block in intra-coding mode using the predicted sample. Claim 5 In paragraph 1 or 3, the prediction directions during intra are extended beyond -135 degrees and 45 degrees. Claim 6 In paragraph 2 or 4, the predicted directions during intra are devices that extend beyond -135 degrees and 45 degrees. Claim 7 A method according to claim 1 or 3, wherein increasing the predicted directions comprises extending the predicted directions in a horizontal or vertical direction while removing some directions from the opposite direction to maintain the same number of total directions. Claim 8 A device according to claim 2 or 4, wherein increasing the predicted directions comprises extending the predicted directions in a horizontal or vertical direction while removing some directions from the opposite direction to maintain the same number of total directions. Claim 9 A method according to claim 1 or 3, wherein the prediction directions are limited to a subset of extended wide-angle prediction directions. Claim 10 A device in which, in paragraph 2 or 4, the prediction directions are limited to a subset of extended wide-angle prediction directions. Claim 11 A method in which samples of the reference array are selected from neighboring blocks in claim 1 or 3. Claim 12 In paragraph 2 or 4, the samples of the reference array are devices selected from neighboring blocks. Claim 13 A method in which, in claim 1 or 3, the set of angle parameters is modified to include 32 factors. Claim 14 A device according to claim 2 or 4, wherein the set of angle parameters is modified to include 32 factors. Claim 15 In paragraph 13, a method in which angle parameters not within the set are modified to enable uniform spacing of angles. Claim 16 A method according to claim 1 or 3, further comprising the step of modifying one or more values ​​of the number of wide angles to associate the distribution of angle values ​​with the intervals of angle values ​​for the rectangular video block. Claim 17 In claim 2 or 4, the device is further configured such that the processor modifies one or more values ​​of the number of angles to associate the distribution of angle values ​​with the intervals of angle values ​​for the rectangular video block. Claim 18 In claim 1 or 3, the reference array comprises N reference samples from a row above the rectangular video block or M reference samples from a left column of the rectangular video block, wherein the value of M is different from the value of N. Claim 19 A device according to claim 2 or 4, wherein the reference array comprises N reference samples from a row above the rectangular video block or M reference samples from a left column of the rectangular video block, and the value of M is different from the value of N. Claim 20 As a device: a device according to claim 4; and a device comprising at least one of (i) an antenna configured to receive a signal - said signal includes said video block -, (ii) a band limiter configured to limit said received signal to a band of frequencies including said video block, and (iii) a display configured to display an output representing said video block. Claim 21 A non-transient computer-readable recording medium comprising data content generated according to the method of claim 1 or by the device of claim 2 for playback using a processor. Claim 22 A processor-readable medium storing a signal comprising video data generated according to the method of claim 1 or by the device of claim 2 for playback using a processor. Claim 23 A computer program stored on a recording medium, comprising instructions that cause the computer to perform the method of claim 1 or 3 when the program is executed by the computer.

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