Firmware storage density control based on temperature detection
Patent Information
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-01-27
- Publication Date
- 2026-08-12
Smart Images

Figure 112022089202661-PCT00005_ABST
Abstract
Description
Technology Field
[0001] Related applications
[0002] This application claims priority to U.S. patent application serial number 16 / 783,016 filed on February 5, 2020, under the title “CONTROLLING FIRMWARE STORAGE DENSITY BASED ON TEMPERATURE DETECTION”, which relates to U.S. regular application serial number 16 / 281,740 filed on February 21, 2019, under the title “REFLOW ENDURANCE IMPROVEMENTS IN TRIPLE-LEVEL CELL NAND FLASH” by Junichi Sato, the entire contents of which are incorporated by reference as fully disclosed herein.
[0003] Technology field
[0004] At least some of the embodiments disclosed in this specification relate generally to semiconductor memories and methods, more specifically to improvements for temperature-based memory data storage processing, but are not limited thereto. Background Technology
[0005] Various types of non-volatile storage devices can be used to store data. Non-volatile storage devices may include NAND flash memory devices. NAND flash is a type of flash memory constructed using NAND logic gates. Alternatively, NOR flash is a type of flash memory constructed using NOR logic gates. Currently, the flash market is dominated by the use of NAND flash.
[0006] Typical computer storage devices have controllers that receive data access requests from host computers and perform computing tasks programmed to implement the requests in a manner specific to the media and structures configured in the storage devices. In one example, a flash memory controller manages data stored in flash memory and communicates with computer devices. In some cases, flash memory controllers are used in solid-state drives for use in mobile devices, or in SD cards or similar media for use in digital cameras.
[0007] Firmware can be used to operate a flash memory controller for a specific storage device. In one example, when a computer system or device reads data from or writes data to a flash memory device, it communicates with the flash memory controller.
[0008] Typically, a flash memory controller includes a Flash Translation Layer (FTL) that maps a logic block address (LBA) received from a host device to a physical address in the flash memory. Through this, the FTL provides a logical-to-physical mapping.
[0009] In typical flash memories, NAND or NOR transistors are used to store information and are arranged in arrays or grids of gates accessible through bit and word lines, the intersections of which are referred to as cells. The simplest flash memory stores 1 bit of information per cell and is called Single Level Cell (SLC) flash memory. In Multi-Level Cell (MLC) flash, a cell stores more than one bit of information. In particular, traditionally, MLC flash stored 2 bits of information per cell. In contrast, Triple-Level Cell (TLC) flash stores 3 bits of information per cell, and Quad-Level Cell (QLC) flash stores 4 bits of information per cell.
[0010] The main trade-off between SLC, MLC, TLC, and QLC flash is cost and speed. SLC flash, which stores 1 bit per cell, has the fastest access times but also costs significantly more than MLC, TLC, or QLC flash. Conversely, QLC flash has the slowest access but costs the least. MLC and TLC flash fall between SLC and QLC flash; MLC flash is faster and more expensive than TLC flash, and TLC flash is faster and more expensive than QLC flash. However, both are slower and cheaper than SLC flash. Additionally, MLC, TLC, and QLC flash have lower durability than SLC flash and suffer from higher error rates and thermal sensitivity.
[0011] Hybrid flash is called pseudo pSLC. In pSLC flash devices, a physical MLC or TLC flash array operates in SLC mode. That is, although it has multiple transistors per cell, the MLC / TLC flash array effectively operates as an SLC device by utilizing only one of these cells. pSLC flash is also referred to as eMLC (Enhanced MLC), iSLC, Super MLC, MLC+, Turbo MLC, or by other names. Brief explanation of the drawing
[0012] Examples are illustrated as examples, not limitations, in the drawings of the attached drawings where similar drawing numbers represent similar elements. FIG. 1 illustrates a storage device comprising a sensor for monitoring the temperature of a non-volatile storage medium that stores data in a TLC region and an SLC region according to some embodiments. FIG. 2 illustrates a vehicle including a storage device mounted in the engine compartment of the vehicle and a storage device mounted in the interior compartment of the vehicle according to some embodiments. FIG. 3 illustrates a method for adjusting a data storage method based on monitoring one or more temperatures according to some embodiments. FIG. 4 illustrates a storage device including a sensor for monitoring a temperature associated with a non-volatile memory according to some embodiments. FIG. 5 illustrates a method for controlling the storage density of data stored in a storage device based on monitoring the temperature according to some embodiments. Specific details for implementing the invention
[0013] The present invention describes various embodiments for improving the operation of a flash memory. At least some embodiments of this specification relate to managing data storage in a flash memory storage device based on monitoring one or more temperatures associated with the operation of the storage device (e.g., monitoring the internal storage medium temperature). The storage device may store data used by, for example, a host device (e.g., a computing device of an autonomous vehicle, or another computing device accessing data stored in the storage device). In one example, the storage device is a solid-state drive mounted in an electric vehicle.
[0014] Other embodiments relate to changing the storage density of data stored in a storage device (e.g., a NAND flash drive). In one embodiment, the data is software loaded into the non-volatile memory of the storage device (e.g., boot code software loaded during the manufacture of a solid-state drive). The software is stored in a first mode (e.g., SLC mode) having a lower storage density. While stored in the first mode, the storage device is exposed to one or more manufacturing operations affected by elevated temperatures. The lower storage density helps maintain data integrity during the elevated temperature exposure. After it is determined that the temperature has dropped below a predetermined threshold, the software is stored in the non-volatile memory in a second mode. The second mode has a higher storage density (e.g., TLC mode). These embodiments are described in the section below titled “Temperature-based Data Storage Density Control”.
[0015] In conventional flash memories, heat generated during the operation of the storage device and / or elevated operating temperatures in the environment in which the storage device operates cause technical problems. In particular, the data storage medium of the storage device may be exposed to excessive temperatures, potentially leading to data loss. Such data loss reduces the reliability of the stored data, thereby significantly degrading the performance of the storage device.
[0016] In one example, data may be lost from some of the memory cells of the storage medium due to failures caused by elevated temperature. In one example, the demands on the storage device controller for error correction or other failure handling (e.g., running diagnostics) are significantly increased. In one example, the responsiveness of the storage device to the host device is degraded because the storage device needs to handle an increased number and / or rate of data storage failure events.
[0017] Various embodiments of the present disclosure provide technical solutions to one or more of the technical problems. In one embodiment, to avoid data loss, a data storage device monitors the temperature of a storage medium and adjusts the data storage operations of the storage device based on the monitored and / or predicted future temperature of the storage medium.
[0018] In one example, when the storage medium temperature increases (e.g., when the temperature is detected to exceed a predetermined threshold), data stored in TLC mode may be restored in compressed SLC mode to trade performance for reliability. When the medium temperature returns to a suitable range (e.g., when it is determined that the medium temperature has dropped below a predetermined threshold or a different threshold), the data may be decompressed and stored in, for example, TLC or QLC mode for improved storage capacity (data may be stored in TLC or QLC mode at a higher density than when stored in SLC mode).
[0019] In one embodiment, a vehicle's cooling or ventilation system (e.g., an HVAC system) may be automatically activated to prevent the memory medium from reaching extreme temperatures. In one example, the cooling system is activated based on a signal from a controller of the storage device. The signal is generated when the controller determines that the temperature of the storage medium has a fixed temperature limit or will exceed it in the future.
[0020] In one example, a temperature sensor is coupled and sends sensor data to a controller. The controller evaluates the sensor data to determine the temperature and / or predict future temperatures.
[0021] In one embodiment, the controller uses a machine learning model to predict the temperature. In one example, the model is an artificial neural network. In one example, the machine learning model uses input data including sensor data from a sensor within a storage device and / or sensor data from a sensor outside the storage device.
[0022] In one embodiment, a method for a storage device comprises: storing first data in a nonvolatile storage medium in a first mode (e.g., TLC mode) by means of a controller of the storage device; monitoring at least one temperature associated with the nonvolatile storage medium; and adjusting the storage method of the first data based on monitoring at least one temperature. The step of adjusting the storage method comprises: compressing the first data to provide compressed data; and storing the compressed data in a nonvolatile storage medium in a second mode (e.g., SLC mode). The first mode has a storage density greater than that of the second mode.
[0023] In one example, the nonvolatile storage medium includes both TLC and SLC flash arrays. In one example, the nonvolatile storage medium uses only triple-level cell flash but includes at least one region of a flash array that is pseudo-SLC (e.g., a portion of the TLC flash array operates in SLC mode).
[0024] FIG. 1 illustrates a storage device (103) comprising a sensor (115) for monitoring the temperature of a non-volatile storage medium (109) that stores data in a TLC region (111) and an SLC region (113) according to some embodiments. In FIG. 1, a host (101) communicates with the storage device (103) through a communication channel having a predetermined protocol. The host (101) may be a computer (e.g., a mobile phone or other computing device) having one or more central processing units (CPUs) to which computer peripheral devices such as the storage device (103) can be attached via an interconnect such as a computer bus.
[0025] A computer storage device (103) may be used to store data for a host (101). Examples of computer storage devices generally include solid-state drives, flash memory, etc. The storage device (103) has a host interface (105) that implements communication with the host (101) using a communication channel. For example, the communication channel between the host (101) and the storage device (103) may be a bus in one embodiment, and the host (101) and the storage device (103) may communicate with each other using an eMMC or UFS protocol.
[0026] In some embodiments, the communication channel between the host (101) and the storage device (103) includes a computer network such as a local area network, a wireless local area network, a wireless personal area network, a cellular communication network, a broadband high-speed always-on wireless communication connection (e.g., a current or future generation of a mobile network link); and the host (101) and the storage device (103) may be configured to communicate with each other using various data storage management and usage commands.
[0027] The storage device (103) has a controller (107) that executes firmware (104) to perform operations in response to communications from a host (101). Generally, firmware is a type of computer program that provides control, monitoring, and data manipulation of an engineering computing device. In FIG. 1, the firmware (104) controls the operations of the controller (107) when operating the storage device (103), such as converting a logic address to a physical address to store and access data in the storage device (103). In one example, the controller is an internal controller of a managed NAND device that stores data in a TLC NAND flash memory.
[0028] Examples of non-volatile storage media (109) are memory cells within an integrated circuit (e.g., SLC, TLC, QLC). The storage media (109) is non-volatile in that no power is required to maintain the data / information stored in the non-volatile storage media (109), and this data / information can be retrieved after the non-volatile storage media (109) is powered off and then powered on again. The memory cells can be implemented using various memory types such as NAND gate-based flash memory, phase change memory (PCM), magnetic memory (MRAM), resistive random access memory, and 3D XPoint, so that the storage media (109) is non-volatile and can retain the data stored therein without power for days, months, and / or years.
[0029] In one embodiment, the storage device (103) is configured to store data for the host (101) in a non-volatile storage medium (109) using a first mode or a second mode. The first mode has a greater storage density than the second mode. In one example, the first mode is a TLC mode in which data is stored in a TLC flash array of a TLC area (111). The second mode is an SLC mode in which data is stored in an SLC flash array of an SLC area (113). The operating mode used is controlled by a controller (107). In one example, the operating mode is selected based on sensor data from a sensor (115).
[0030] In one embodiment, the sensor (115) is used to monitor the temperature of the non-volatile storage media (109). In one example, the sensor (115) is a temperature sensor integrated as part of an integrated circuit comprising a TLC region (111) and / or an SLC region (113).
[0031] In one embodiment, during normal operation of the storage device (103), the controller (107) stores data for the host (101) using the TLC area (111). The controller (107) monitors one or more temperatures associated with the non-volatile storage medium (109). In one example, such monitoring includes analyzing sensor data received from the sensor (115).
[0032] Based on data collected from one or more sensors (e.g., sensor (115)), the controller (107) adjusts the method of storing data in non-volatile storage media (109). In one example, the controller (107) determines that the temperature of the storage media (109) will have or exceed a predetermined temperature threshold. In response to this determination, data stored in the TLC area (111) is copied to the SLC area (113). The copied data is compressed before storing data in the SLC area (113).
[0033] In one embodiment, the sensor (117) is mounted outside the storage device (103). In one example, the sensor (117) is mounted outside the packaging of the storage device (103) but in contact with it. In another example, the sensor (117) is mounted separately from the storage device (103) (for example, the sensor (117) and the storage device (103) are each mounted in the engine compartment of the vehicle).
[0034] In one embodiment, the host (101) collects sensor data from the sensor (117). The host (101) uses the collected sensor data to determine the temperature associated with the storage device (103). In one example, the temperature is the ambient temperature of the storage device (103). In one example, the ambient temperature is the temperature of the atmosphere where the storage device (103) is located.
[0035] In one embodiment, the host (101) makes a determination regarding the current temperature and / or expected future temperature of the storage device (103) and / or storage medium (109) using sensor data collected from the sensor (117) and the sensor (115). In one example, in response to making a determination regarding the current or future temperature, the host (101) activates a cooling or ventilation system (119) configured to lower the temperature associated with the storage device (103). In one example, the cooling system (119) lowers the ambient temperature of the storage device (103). In one example, the cooling system (119) lowers the temperature of the storage medium (109) (e.g., by flowing a coolant near and / or through at least a part of the storage device (103)).
[0036] The storage device (103) includes volatile random access memory (RAM) (106). In one embodiment, a portion of the RAM is used to store runtime data and instructions used by the controller (107) to improve the computational performance of the controller (107) and / or to provide buffers for data transferred between the host (101) and non-volatile storage media (109). The RAM (106) is volatile in that it requires power to maintain the data / information stored within it, and if the power is cut off, the data / information is lost immediately or quickly.
[0037] Volatile memory (106) typically has less latency than non-volatile storage media (109), but loses data quickly when power is removed. Therefore, in some cases, it is advantageous to use volatile memory (106) to temporarily store commands and / or data used by the controller (107) in the current computing task to improve performance. In some cases, volatile memory (106) is implemented using volatile static random access memory (SRAM), which uses less power than DRAM in some applications.
[0038] During operation, the controller (107) receives various commands from the host (101). These commands may include read commands or write commands. In one example, a read command includes a logic address and is received from the host (101) to access data stored in a non-volatile storage medium (109).
[0039] In one example, the controller (107) receives a logic address and determines a physical address. The determined physical address is used to read the corresponding portion of the stored data corresponding to the received logic address. The controller (107) then sends the read data to the host (101).
[0040] In some cases, the controller (107) has multiple processors, each having its own in-processor cache memory. Optionally, the controller (107) performs data-intensive in-memory processing using data and / or commands organized in the storage device (103). For example, in response to a request from the host (101), the controller (107) performs real-time analysis of a data set stored in the storage device (103) and communicates a reduced data set to the host (101) as a response. For example, in some applications, the storage device (103) is connected to a sensor in real time to store sensor inputs (e.g., sensors of an autonomous vehicle or a digital camera); and the processor of the controller (107) is configured to perform machine learning and / or pattern recognition based on the sensor inputs to support an artificial intelligence (AI) system implemented at least partially through the storage device (103) and / or the host (101).
[0041] The storage device (103) can be used in various computing systems such as cloud computing systems, edge computing systems, fog computing systems, and / or standalone computers. In a cloud computing system, remote computer servers are connected via a network to store, manage, and process data. An edge computing system optimizes cloud computing by performing data processing at the edge of a computer network close to the data source, thereby reducing data communication with a centralized server and / or data storage. A fog computing system uses one or more end-user devices or near-user edge devices to store data, thereby reducing or eliminating the need to store data in a centralized data warehouse.
[0042] At least some embodiments of the disclosures in this specification may be implemented using computer instructions executed by a controller (107), such as firmware (104). In some cases, hardware circuits may be used to implement at least some of the functions of the firmware (104). The firmware (104) may be initially stored in a non-volatile storage medium (109) or other non-volatile device and loaded into a volatile memory (106) and / or an in-processor cache memory for execution by the controller (107).
[0043] The firmware (104) may be configured to use the techniques discussed herein for adjusting the method of data storage based on the monitored temperature. However, the techniques discussed herein are not limited to those used in the computer system of FIG. 1 and / or the examples discussed above.
[0044] A non-transient computer storage medium may be used to store instructions of the firmware (104). When the instructions are executed by the controller (107) of the computer storage device (103), the instructions cause the controller (107) or other processing device(s) to perform the method described herein.
[0045] In one example, the non-volatile storage medium (109) of the storage device (103) has memory units that can be identified by a range of LBA addresses, wherein the range corresponds to the memory capacity of the non-volatile storage medium (109).
[0046] In one embodiment, a local manager (not shown) of a storage device (103) receives a data access command. A data access request (e.g., read, write) from a host (101) identifies an LBA address for reading, writing, or erasing data from a memory unit identified by an LBA address. The local manager converts the logic address to a physical address.
[0047] In one embodiment, the controller is implemented by one or more processing devices. In one embodiment, the computer system includes a first memory device (e.g., SRAM) and a second memory device (e.g., NAND flash storage device), and one or more processing devices (e.g., a CPU or a system-on-chip (SoC)). In one embodiment, the computer system may include a processing device and a controller.
[0048] The processing device may be, for example, a microprocessor, a central processing unit (CPU), a processing core of a processor, an execution unit, etc. In some cases, the controller may be referred to as a memory controller, a memory management unit, and / or an initiator. In one example, the controller controls communications over a coupled bus between a computer system and one or more memory subsystems.
[0049] The controller of a computer system may communicate with the controller of a memory subsystem to perform operations such as reading, writing, or erasing data from memory components, and other such operations. In some cases, the controller is integrated within the same package as the processing device. In other cases, the controller is separate from the package of the processing device. The controller and / or the processing device may include one or more integrated circuits and / or discrete components, such as buffer memory, cache memory, or a combination thereof. The controller and / or the processing device may be a microcontroller, a special-purpose logic circuit (e.g., a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), etc.), or other suitable processor.
[0050] In one embodiment, the computing system includes a memory system (e.g., a storage device (103)) and a host processor (e.g., a host (101)). In one embodiment, the memory system includes a managed NAND flash device. In one embodiment, the memory system includes a Solid State Drive (SSD).
[0051] A host interface (e.g., host interface (105)) may be used to transfer data between a memory system and a host processor. The host interface may be in the form of a standardized interface. For example, when a memory system is used for data storage in a computing system, the host interface may be SATA (Serial Advanced Technology Attachment), SAS (Serial Attached SCSI), PCIe (Peripheral Component Interconnect Express), or USB (Universal Serial Bus), among other connectors and interfaces. However, generally, the host interface may provide an interface for transferring control, address, data, and other signals between a memory system and a host processor having compatible receptors for the interface. The host processor may be a host system such as a personal laptop computer, a desktop computer, a digital camera, a mobile phone, or a memory card reader, among various other types of hosts. The host processor may include a system motherboard and / or backplane and may include a number of memory access devices (e.g., a number of processors). In some cases, the host processor may include a device configured to pre-program data within the memory system. However, the host processor may additionally include a device configured to read data after manufacturing and write data to a memory system.
[0052] The memory system receives commands and data from the host processor through a host interface that relays commands and data to the controller. The data from the host includes uncompressed data to be written to the TLC area. This data can be streamed or transmitted in bulk.
[0053] The controller may communicate with a non-volatile storage medium to control data reading, writing, and erasing operations, among other operations described herein. The controller may include a number of components in the form of hardware and / or firmware (e.g., one or more integrated circuits) and / or software to control access to memory and / or enable data transfer between a host processor and a memory system, for example.
[0054] In some embodiments, the controller includes a host I / O management component, a flash translation layer (FTL), and a memory unit management component.
[0055] In embodiments where the memory (e.g., non-volatile storage medium (109)) comprises a plurality of arrays of memory cells, the arrays may be flash arrays having a NAND architecture, for example. However, the embodiments are not limited to a specific type of memory array or array architecture. Memory cells may be grouped into a plurality of blocks, for example, which are erased together as a group and may store a plurality of pages of data per block. A plurality of blocks may be contained in a plane of memory cells, and the array may contain a plurality of planes. As used herein, "page of data" refers to an amount of data configured for a controller to write / read to / from a non-volatile storage medium as part of a single write / read operation and may be referred to as a "flash page." As an example, the memory device may have a page size of 8 KB (kilobytes) and may be configured to store 128 data pages per block, 2048 blocks per plane, and 16 planes per device.
[0056] In some embodiments, as described above, the nonvolatile storage medium (109) comprises two regions: a TLC region (111) and an SLC region (113). In some embodiments, the SLC region is a pseudo-SLC region (pSLC) configured so that the TLC memory functions and performs as an SLC memory. In particular, the entire nonvolatile storage medium may be manufactured as a TLC flash memory. That is, both regions (111 and 113) may comprise TLC NAND flash memory arrays. In some embodiments, these regions are fixed during manufacturing and are addressed via firmware code configured to process read / write / erase commands based on corresponding addresses within the nonvolatile memory. In an alternative embodiment, the pSLC region may be dynamically sized and resized. Since the pSLC region is physically identical to the TLC region, resizing (or removal) the pSLC region can be achieved through firmware updates that allow the use of all TLC data states in the pSLC region.
[0057] Unlike conventional hard disk drives, data stored in a flash array cannot be directly overwritten. That is, blocks of flash cells must be erased (e.g., one page at a time) before data is rewritten to them. In some embodiments, the controller can manage data transferred between the host processor and the flash arrays through a logic-to-physical mapping scheme. For example, the flash translation layer can utilize a logic addressing scheme (e.g., Logic Block Addressing (LBA)). As an example, when new data received from the host processor is intended to replace old data already written to the flash array, the controller can write the new data to a new location on the non-volatile storage medium, and the logic-to-physical mapping of the FTL can be updated so that the corresponding logic address(s) associated with the new data being written indicate (e.g., point to) the new physical location. The previous location, which no longer stores valid data, will be erased before being rewritten.
[0058] Flash memory cells can be cycled (e.g., programmed / erase) a limited number of times before they become unreliable. The controller may implement wear leveling to control the wear rate of the non-volatile storage medium, which can reduce the number of program / erase cycles performed on a specific group (e.g., blocks) by spreading the cycles more evenly across the entire array. Wear leveling may include a technique called garbage collection, which may involve reclaiming (e.g., making available for erasure and writing) blocks containing the largest number of invalid pages. Invalid pages may refer to pages containing invalid data (e.g., pages that no longer have the latest associated mapping). Alternatively, garbage collection may involve reclaiming blocks exceeding a threshold of invalid pages. If there are enough free blocks available for write operations, garbage collection operations may not occur.
[0059] Write amplification can occur when writing data to a non-volatile storage medium. When writing data randomly to a memory array, the controller scans the available space within the array. Available space in the memory array may consist of individual cells, pages, and / or blocks of memory cells that do not store data or have been erased. If there is sufficient available space to write data to a selected location, the data is written to that selected location in the memory array. If there is insufficient available space at the selected location, the data in the memory array is rearranged by reading, copying, moving, or otherwise rewriting and erasing the data already present at the selected location to a new location, thereby leaving available space for new data to be written to the selected location. Because the amount of data written to memory is greater than the amount of data that would occur if there were sufficient available space at the selected location (e.g., the physical amount of data is greater than the amount of logic intended to be written), the rearrangement of valid data in the memory array is referred to as write amplification. Write amplification is undesirable because it can consume bandwidth, which reduces performance and shortens the effective lifespan of the SSD. The amount of write amplification can be influenced by various factors, among other factors, such as garbage collection efficiency, wear leveling efficiency, the amount of random writes (e.g., writes to non-sequential logic addresses), and / or over-provisioning (e.g., the difference between the physical capacity of the flash memory and the logic capacity presented to the user as available through the operating system).
[0060] The flash translation layer can perform address mapping in cooperation with a host I / O management component (not shown) and a mapping unit management component (not shown). In some embodiments, the host I / O management component manages data received in relation to write commands from the host processor (e.g., prior to mapping via the FTL). The I / O workload of the host processor may be irregular and / or variable. For example, large file writes (e.g., writes corresponding to a large amount of data) may often be mixed with small writes (e.g., writes corresponding to a small amount of data). In this context, "large" and "small" refer only to relative differences in size. As an example, a small write may refer to a write of 4 KB of metadata. A large file write may include, for example, a write of 128 KB of data. A large file write may include a number of consecutive large file writes. For example, recording a 2GB video file may include multiple consecutive 128KB write commands from the host processor.
[0061] In one embodiment, a controller (e.g., controller (107)) includes firmware that controls the operation of the memory system as described above. Additionally, the firmware implements a codec that performs the compression and decompression routines described above. In one example, this compressed data is stored in an SLC area (113) in SLC mode. The controller is further modified to monitor one or more temperatures. In response to the detection of a high temperature from this monitoring, the controller compresses data from a TLC area (e.g., TLC area (111)). The compressed data is then written to an SLC area (e.g., SLC area (113)).
[0062] FIG. 2 illustrates a vehicle (202) including a storage device (211) mounted in the engine compartment (204) of the vehicle (202) according to some embodiments, and a storage device (215) mounted in the interior compartment (206) of the vehicle (202). The storage device (211) and the storage device (215) are examples of the storage device (103) of FIG. 1.
[0063] In one example, the vehicle (202) is powered by a gasoline-fueled engine (208). In an alternative embodiment, the vehicle (202) may be an electric-powered vehicle powered by a storage battery (not shown) of the vehicle (202).
[0064] A controller (210) is mounted in the engine compartment (204). The controller (210) controls the operation of the engine (208) mounted in the engine compartment (204). The controller (210) receives sensor data collected by a sensor (212) mounted in the engine compartment (204). The sensor (212) is an example of the sensor (117) of FIG. 1. In one example, the engine (208), the controller (210), and the sensor (212) are mounted under the front or rear hood of the vehicle (202).
[0065] In one embodiment, the sensor (212) detects the ambient temperature within the engine compartment (204). In one example, the sensor (212) detects the temperature of the surface of the storage device (211). In one example, the surface is the outer surface of the packaging or another physical enclosure of the storage device (211). In one example, the sensor (212) is included in an integrated circuit or chip mounted on a circuit board together with the storage device (211).
[0066] In one embodiment, during operation, the controller (210) controls the storage method of data within the storage device (211) based on sensor data received from the sensor (212). In one embodiment, the controller (210) further controls the operation of the engine (208) based on sensor data received from the sensor (212).
[0067] The sensor (213) of the storage device (211) collects sensor data regarding the temperature associated with the storage device (211). The sensor (213) is an example of the sensor (115) of FIG. 1.
[0068] In one embodiment, the controller (210) controls the storage method in the storage device (211) based on sensor data received from the sensor (212) and / or sensor (213). In one embodiment, the controller of the storage device (211) (not shown) controls the storage method of data in the storage device (211) based on temperature data collected by the sensor (213).
[0069] In one embodiment, the storage device (211) controls the storage method independently of the controller (210). In one example, the storage device (211) sends a signal to the controller (210) indicating that the storage method of data in the storage device (211) has been and / or will be changed. In one embodiment, in response to receiving the signal, the controller (210) changes the configuration of the sensor (212) regarding the type or method of data to be collected by the sensor (212). In one embodiment, in response to the determination that a change has been made in the storage method of data in the storage device (211), the controller (210) changes the operating mode of the engine (208) from normal mode to conservative mode (e.g., a mode requiring less intensive data processing bandwidth, lower power, and / or data processing resources).
[0070] A controller (214) and a sensor (218) are each mounted in an internal compartment (206). The controller (214) receives sensor data collected by the sensor (218). In one example, the sensor data is temperature data. In one example, the temperature data is for the ambient temperature of the internal compartment (206).
[0071] The storage device (215) is controlled at least partially based on signals received from the controller (214). In one embodiment, the controller (214) causes a change in the method of storing data within the storage device (215) based on temperature data collected from the sensor (218). In one embodiment, the controller (214) changes the operation of the cooling or ventilation system (216) to lower the operating temperature of the storage device (215). In one example, the cooling or ventilation system (216) provides cooled air and / or airflow to the interior compartment (206). In one example, the storage device (215) and the sensor (218) are mounted under the dash of the vehicle.
[0072] In one embodiment, the storage device (215) includes a sensor (217). The sensor (217) collects temperature data associated with the storage device (215). In one example, the sensor (217) collects data indicating the temperature of a non-volatile storage medium of the storage device (215).
[0073] In one embodiment, controllers (210 and 214) share collected sensor data. In one example, the controller (214) adjusts the method of storing data in the storage device (215) based at least partially on the sensor data collected by the sensor (212) and / or sensor (213).
[0074] FIG. 3 illustrates a method for adjusting the storage method of data based on monitoring one or more temperatures according to some embodiments. For example, the method of FIG. 3 may be implemented in the system of FIG. 1. In one example, the storage method of data in the storage device (103) of FIG. 1 is adjusted.
[0075] The method of FIG. 3 may be performed by processing logic that may include hardware (e.g., processing device, circuit, dedicated logic, programmable logic, microcode, hardware of the device, integrated circuit, etc.), software (e.g., instructions performed or executed on the processing device), or a combination thereof. In some embodiments, the method of FIG. 3 is performed at least partially by one or more processing devices (e.g., the controller (107) of FIG. 1).
[0076] Although illustrated in a specific sequence or order, the order of the processes may be modified unless otherwise specified. Accordingly, the illustrated embodiments should be understood merely as examples, and the illustrated processes may be performed in a different order, and some processes may be performed in parallel. Additionally, one or more processes may be omitted in various embodiments. Therefore, not all processes are required in all embodiments. Other process flows are possible.
[0077] In block (301), data is stored in a non-volatile storage medium in a first mode. In one example, the data is stored in a non-volatile storage medium (109) by a controller (107).
[0078] In block (303), one or more temperatures associated with the non-volatile storage medium are monitored. In one example, the temperature of the non-volatile storage medium (109) is determined using a sensor (115). In one example, the ambient temperature of the storage device (103) is determined using a sensor (117).
[0079] In block (305), the storage method of the data is adjusted based on monitoring one or more temperatures. The adjustment includes storing the data in a non-volatile storage medium in a second mode. In one example, the data stored in the TLC area (111) is compressed and copied to the SLC area (113).
[0080] In one embodiment, a method for a storage device (e.g., storage device (103)) comprises: storing a first data in a nonvolatile storage medium (e.g., nonvolatile storage medium (109)) in a first mode (e.g., TLC mode) by the storage device; monitoring at least one temperature associated with the nonvolatile storage medium; and adjusting the storage method of the first data based on monitoring at least one temperature. The adjusting step comprises: compressing the first data to provide compressed data; and storing the compressed data in a nonvolatile storage medium in a second mode (e.g., SLC mode), wherein the first mode has a greater storage density than the second mode.
[0081] In one embodiment, the monitoring step includes collecting sensor data from at least one sensor (e.g., sensor (115) and / or sensor (117)).
[0082] In one embodiment, at least one sensor comprises a first sensor (e.g., sensor (115)) located within a storage device to detect a first temperature of a non-volatile storage medium, and a second sensor (e.g., sensor (117), sensor (212), and / or sensor (218)) mounted outside the storage device, wherein the second sensor is configured to detect a second temperature of the atmosphere outside the storage device (e.g., ambient air surrounding the storage device).
[0083] In one embodiment, the storage device and the second sensor are each mounted inside the engine compartment of a vehicle (e.g., vehicle (202)), and the compartment includes an engine that provides power to the vehicle.
[0084] In one embodiment, the method further comprises the steps of: determining that a first temperature of the nonvolatile storage medium is below a predetermined threshold (e.g., a predetermined temperature corresponding to an increased risk of data loss due to high temperature); decompressing the stored compressed data to provide decompressed data in response to the determination that the first temperature is below the predetermined threshold; and storing the decompressed data in the nonvolatile storage medium in the first mode.
[0085] In one embodiment, the step of monitoring at least one temperature includes determining that a first temperature of a nonvolatile storage medium is greater than a predetermined threshold. The method further includes the step of adjusting the operation of a vehicle's cooling or ventilation system (e.g., cooling or ventilation system (119)) to lower the ambient temperature of the storage device in response to the determination that the first temperature is greater than a predetermined threshold.
[0086] In one embodiment, the step of monitoring at least one temperature includes determining, based on collected sensor data, that a first temperature of a nonvolatile storage medium is greater than a predetermined threshold; the step of compressing the first data includes copying the first data from a first region of the nonvolatile storage medium, wherein the first region operates in a first mode; and the compressed data is stored in a second region of the nonvolatile storage medium, wherein the second region operates in a second mode.
[0087] In one embodiment, the step of monitoring at least one temperature includes: a step of predicting a future temperature; and a step of determining that a future temperature will exceed a predetermined threshold.
[0088] In one embodiment, the future temperature is the temperature of the storage device or the ambient temperature of the storage device.
[0089] In one embodiment, the method further comprises: storing, for each of a plurality of data portions stored in the nonvolatile storage medium, a respective data type corresponding to the stored data portion; and determining a first data type corresponding to the first data based on the stored data types. The step of adjusting the storage method is further based on the determined first data type. In one example, the first data type corresponds to data used to navigate the vehicle (202). In one example, other data types include data less critical to real-time operation, such as data not used to navigate the vehicle.
[0090] In one embodiment, the storage device stores data used to operate the vehicle, and monitoring at least one temperature is performed by at least one of the storage device or the controller of the vehicle's computing system (e.g., controller (210) or controller (214)).
[0091] In one embodiment, the first mode is a multi-level cell (MLC) mode, a triple-level cell (TLC) mode, or a quad-level cell (QLC) mode, and the second mode is a single-level cell (SLC) mode.
[0092] In one embodiment, a non-transient computer storage medium stores instructions, and when the instructions are executed on a computing device, the computing device enables at least: to store a first data in a first mode on a non-volatile storage medium; to monitor at least one temperature associated with the non-volatile storage medium; and to adjust the storage method of the first data based on monitoring at least one temperature, the adjustment includes storing the first data in a second mode on the non-volatile storage medium.
[0093] In one embodiment, the first mode has a larger storage density than the second mode.
[0094] In one embodiment, the commands also cause the computing device to compress the first data to provide the compressed data. The step of storing the first data in the second mode includes the step of storing the compressed data.
[0095] In one embodiment, the system comprises: a storage device configured to store data in a nonvolatile storage medium using either a first mode or a second mode, wherein the first mode has a greater storage density than the second mode; at least one sensor; at least one processing device; and a memory comprising instructions that instruct the at least one processing device to: store first data in a nonvolatile storage medium in the first mode; monitor at least one temperature associated with the nonvolatile storage medium using at least one sensor to collect sensor data; and, based on the collected sensor data, adjust the storage method of the first data. The adjustment includes compressing the first data to provide compressed data, and storing the compressed data in the nonvolatile storage medium in the second mode.
[0096] In one embodiment, the nonvolatile storage medium comprises a first region (e.g., TLC region (111)) and a second region (e.g., SLC region (113)), the first region operates in a first mode (e.g., TLC mode), and the second region operates in a second mode (e.g., SLC mode).
[0097] In one embodiment, at least one sensor includes a first sensor located in a storage device to detect the temperature of a non-volatile storage medium.
[0098] In one embodiment, at least one sensor includes a first sensor mounted outside the storage device, and the first sensor is configured to detect the temperature of the atmosphere outside the storage device.
[0099] In one embodiment, the system further includes a cooling or ventilation system of the vehicle. Monitoring at least one temperature includes determining that a first temperature of a non-volatile storage medium is greater than a predetermined threshold. Commands are also configured to instruct at least one processing device to adjust the operation of the cooling or ventilation system to lower the ambient temperature of the storage device in response to the determination that the first temperature is greater than the predetermined threshold.
[0100] In one example, the method stores data in a TLC region of a NAND flash array. The method monitors at least one temperature associated with a nonvolatile storage medium comprising a TLC region and a pSLC region. Based on monitoring at least one temperature, the method writes TLC data to the pSLC region of the NAND flash array.
[0101] In one embodiment, the method may designate a portion of the TLC region to operate as a pSLC NAND flash memory. Since the pSLC utilizes an underlying TLC architecture, the method may modify the firmware to enable pSLC access to the pSLC region. This effectively converts a portion of the TLC region into a pSLC region. In some embodiments, the method may copy some or all of the TLC data to a cache memory before designating a portion of the TLC region to operate as a pSLC NAND flash memory.
[0102] In one embodiment, a set of addresses of a NAND flash array may be designated as a pSLC region. For example, a first N addresses of the array may be designated as a pSLC region. Designating a pSLC region involves configuring the firmware to write only one bit per cell to the pSLC region. In one embodiment, the method accesses the pSLC region simply by writing to the addresses. In other embodiments, the NAND array controller provides commands for accessing the pSLC region. In one embodiment, the method writes compressed data sequentially to the pSLC region (e.g., starting at address 0).
[0103] In some embodiments, data within the TLC region is compressed before being written to the pSLC region. In one embodiment, this algorithm is executed by a codec represented in the firmware / controller of the memory device. Alternatively, the codec may be located outside the device.
[0104] In one embodiment, the stored data is compressed using a lossless compression algorithm. In one example, data from the TLC area (111) is compressed before being written to the pSLC area (113). In one embodiment, this compression may be performed by a controller of the memory device itself (received via a host interface, JTAG, etc.). Various lossless compression algorithms such as run-length encodings (RLE), bzip2, Lempel-Ziv compression (and variations thereof) may be used. Alternatively, or in conjunction with the foregoing, application-specific compression algorithms may be used based on the data to be written. For example, FLAC (Free Lossless Audio Codec) may be used for audio data, or H.264 lossless compression may be used for video data. The specific type of lossless compression algorithm used is not limited.
[0105] In some embodiments, before writing, the method checks whether the size of the compressed data will fit within the pSLC area. If so, the method continues to write the complete compressed data to the pSLC area. Otherwise, the method may selectively compress a portion of the data in the TLC area and write the compressed data to the pSLC area of the NAND flash array. In some embodiments, the method may segment the uncompressed data into bits and pad each bit with two zeros to simulate pSLC operations in TLC operations. In some embodiments, the method may distribute the data to the pSLC area so that the data is not written to consecutive cells.
[0106] In one embodiment, the method may copy the contents of a TLC region to a cache memory, such as onboard dynamic random access memory (DRAM) or static random access memory (SRAM), which is installed as part of a memory device (e.g., an SSD or similar device). In some embodiments, the method copies the entire contents of the TLC region to the cache memory for processing. In other embodiments, the method may reduce SRAM / DRAM usage by streaming data from the TLC region for processing. In some embodiments, the SRAM / DRAM will be sized to accommodate the TLC region, and thus the entire contents of the TLC can be copied to the cache.
[0107] In some embodiments, the method may write the compressed data starting from a first pSLC address. The method may write the data sequentially when encoded starting from the beginning of the pSLC area. In other embodiments, the compressed data may include indications of addresses where the data is to be written to the pSLC area.
[0108] In an alternative embodiment, the method may compress TLC data and store the data in a cache until all TLC data is compressed. Then, the method may perform a bulk write to the pSLC region of the compressed data.
[0109] In some embodiments, the method checks to determine whether all data in the TLC region has been compressed and copied to the pSLC region. If not, the method continues to compress any remaining data in the TLC region and writes the data to the pSLC region.
[0110] In some embodiments, the method performs error code correction (ECC) on the compressed data. In some embodiments, the method may also perform ECC before compression. The embodiments are not limited to the specific type of ECC used, and in some embodiments, the method may use ECC installed within the memory device and used during normal operations.
[0111] In one embodiment, the method updates the controller firmware to enable pSLC operation in the pSLC region.
[0112] In some embodiments, the pSLC region is retained for the entire lifespan of the device. In this case, the compressed data will be retained in the pSLC region.
[0113] In some embodiments, the method enables access to TLC and pSLC regions for a host processor. In some embodiments, the method may deny access to the flash array while data is compressed and written to the pSLC region. After the process is completed, the method may enable read / write / erase and other operations on the NAND flash array according to standard interfaces.
[0114] Various embodiments related to controlling storage density for stored data based on temperature are now described. The generality of the following description is not limited to the various embodiments described above.
[0115] In some conventional approaches, memories are pre-programmed with data prior to installation, for example, on chipsets and circuit boards. This pre-programmed data may include bootstrap code, bootloader code, operating system (OS) code, file system data, and other operational data used by the memory system. To reduce cost and complexity during manufacturing, this data is often pre-programmed into the memory devices during bulk manufacturing. Thus, batches of memory devices are simultaneously pre-programmed before downstream use of the devices.
[0116] In existing systems, data is copied uncompressed because it is used in downstream applications. During manufacturing, memories undergo various operations that cause exposure to elevated temperatures (e.g., reflow soldering to attach memories to printed circuit boards (PCBs) or other backplanes). For example, as part of the reflow soldering process, memories are exposed to high temperatures. In the case of TLC (and MLC or QLC) memories, the threshold voltages of multi-level cells shift, which causes technical issues regarding data corruption after heating is complete. Consequently, pre-programmed data is corrupted when the memories are attached, for example, to final PCBs (e.g., for shipment to end users).
[0117] During manufacturing, memory systems may also experience higher temperatures during other processing stages. For example, memory systems may undergo a burn-in process. Performing these other stages can lead to data corruption.
[0118] Various embodiments described below provide technical solutions to one or more of the above technical problems. In one embodiment, the method comprises: loading software into a nonvolatile memory of a storage device while the temperature of the nonvolatile memory is lower than a predetermined threshold (e.g., a temperature of less than 60 degrees Celsius); storing the software in a compressed format in a first mode (e.g., SLC mode) in the nonvolatile memory; exposing the nonvolatile memory to a temperature higher than a predetermined threshold during a manufacturing operation associated with the storage device (e.g., reflow soldering or burn-in manufacturing step) and while the software is stored in the first mode (e.g., exposing it to a burn-in step); and determining that the temperature of the nonvolatile memory has dropped below a predetermined threshold (e.g., after the burn-in is completed). In response to the determination that the temperature of the nonvolatile memory has dropped below a predetermined threshold, the stored software is decompressed. The decompressed software is stored in the nonvolatile memory in a second mode (e.g., TLC mode). The second mode has a higher storage density than the first mode.
[0119] In one embodiment, a compressed version of software (e.g., firmware) is initially stored in a NAND flash memory system in SLC mode in a compressed and / or encrypted format. In one example, a software tool is used to collect software, such as firmware or an application, and then to compress and / or encrypt the software for initial storage / installation in SLC mode.
[0120] Subsequently, during testing, break-in, storage, and / or transport of a product containing flash memory, the memory system is turned on to extend the firmware / software, for example, in TLC mode, to an uncompressed version and / or decryption format (e.g., enabled for initial or setup operations).
[0121] In one example, when data is stored in SLC mode in NAND flash memory, elevated heat exposure generally does not damage the data pre-programmed into the memory gates. Therefore, if the NAND flash memory is exposed to high temperatures during the manufacturing process, the stored data remains at high temperatures because it is stored in SLC mode.
[0122] Furthermore, while SLC mode has lower storage density, storing data in a compressed format allows for the storage of larger amounts of data. Additionally, when loading data into flash memory, writing compressed data takes less time than writing uncompressed data. For example, this can increase throughput in the memory production process, where programmed data is stored in memory before assembly into vehicles or other devices.
[0123] After the manufacturing process at the elevated temperature is completed and the temperature of the non-volatile memory drops below a predetermined threshold, the compressed data stored in SLC mode can be decompressed and stored, for example, in TLC mode.
[0124] In one example, decompression and storage in the TLC mode are performed during and / or in response to the detection of various events. In one example, the events are testing, demonstration, storage, and / or transportation of a vehicle or device. In this way, decompression and / or storage in the TLC mode may be performed during idle time in the overall manufacturing process so as not to reduce or eliminate adverse effects on throughput or productivity. In one embodiment, the events are detected based on one or more sensors in the non-volatile memory and / or other sensors (e.g., sensors monitoring the manufacturing or storage environment and / or sensors of the device being manufactured or stored).
[0125] In one embodiment, firmware for a solid-state drive (SSD) is loaded and stored in a compressed format in SLC mode (e.g., prior to the burn-in phase). The SSD is not yet fully functional in "production" mode (e.g., an end user cannot use the SSD in their end-user mode; the SSD is not ready for use). The installation process is completed when the SSD firmware is installed in uncompressed TLC mode. Then, the SSD is configured for normal operation by the end user.
[0126] In one example, software is loaded and stored in flash memory in SLC mode at room temperature (e.g., below 23–27 degrees Celsius). The flash memory is part of a solid-state drive to be mounted in a vehicle. The solid-state drive is then mounted in the vehicle at room temperature (e.g., at a time when the flash memory in the vehicle is below a first predetermined threshold). Next, as part of the manufacturing process, the vehicle is exposed to an elevated temperature (e.g., a temperature exceeding a first predetermined threshold or a second predetermined threshold). Then, the vehicle is returned to an environment where the temperature is below the first or second predetermined threshold. At this point, the software is decompressed and stored in TLC mode (or MLC or QLC mode). Finally, a test is performed to verify the proper operation of the solid-state drive in a normal mode suitable for end-user operation.
[0127] In one embodiment, during the manufacturing process: in the first stage, a program running on a computing device (e.g., a server) in the factory installs the compressed software in memory in a "bootable" manner in SLC mode so that it can decompress itself (e.g., in TLC mode) in a later second stage. In the second stage, the self-installing, bootable, compressed software reinstalls itself in memory to make the final product suitable for end-user operation (e.g., in a manner similar to a firmware upgrade where old firmware installs new firmware to replace itself).
[0128] In one embodiment, compressed data is generated by compressing raw data to store it in a memory device (e.g., a flash memory storage device), pre-programming a first region of the memory device (e.g., an SLC region) with the compressed data, decompressing the compressed data based on monitoring the temperature associated with the memory device (e.g., in response to detecting a temperature that falls below a predetermined threshold), acquiring the raw data, and transferring the raw data to a second region of the memory device (e.g., a TLC region).
[0129] In one embodiment, the SLC region is formed using SLC devices. The TLC region is formed using TLC devices. In one example, the SLC region is on a chip different from the TLC region.
[0130] FIG. 4 illustrates a storage device (402) comprising one or more sensors (e.g., sensor (422) and / or sensor (424)) for monitoring the temperature associated with a non-volatile memory (404) according to some embodiments. In one example, a storage device (103) may be used to implement the storage device (402). In one example, a host (101) may be used as a host device (408).
[0131] The storage device (402) stores data in non-volatile memory (404). The non-volatile memory (404) stores data using a first mode (e.g., SLC) and a second mode (e.g., TLC or QLC). Data is stored in the SLC area (418) in the first mode and in the TLC area (420) in the second mode. The second mode has a higher memory density (e.g., storing two or more bits per cell) than the first mode (e.g., storing one bit per cell). Information regarding how the non-volatile memory (404) is configured is stored in configuration data (428) within the non-volatile memory (404).
[0132] In one embodiment, the non-volatile memory (404) is configured such that the SLC region (418) is provided by a portion of the TLC region (420) which functions as pSLC flash memory. The remainder of the TLC region (420) functions as TLC flash memory. In some embodiments, the TLC region (420) and the SLC region (418) (e.g., pSLC) are fixed during manufacturing and are addressed via firmware code that configures read / write / erase commands based on corresponding addresses within the array. In an alternative embodiment, the SLC region (418) can be dynamically sized and resized. Since the SLC region (418) is physically identical to the TLC region (420) when configured as pSLC memory, resizing (or removing) the SLC region (418) can be achieved through firmware updates that allow storing the same number of bits per cell as the TLC region (420).
[0133] As mentioned above, the storage device (402) includes at least one sensor (e.g., sensor (422)). In one example, the sensor (422) measures the temperature of the non-volatile memory (404). In one example, the sensor (424) measures the temperature outside the storage device (402).
[0134] The storage device (402) includes at least one processing device (e.g., a controller (406)). In one example, the controller (406) is a microcontroller. The controller (406) receives commands (e.g., read / write / erase) from the host interface (410). The controller (406) is connected to a non-volatile memory (404) and a volatile memory (414). In one embodiment, the controller (406) includes firmware (412) that controls the operation of the storage device (402).
[0135] The controller (406) executes commands stored in memory (e.g., firmware (412)). In one example, the commands are stored in a memory device (e.g., a flash memory device) outside the controller (406). In one example, the memory is internally contained within the controller (406).
[0136] The controller (406) loads data into non-volatile memory (404). In one example, the data is software. In one example, the controller (406) receives software written by the host device (408) via the host interface (410). In one example, the host device (408) takes software from the software loading device (426) and routes the software to the host interface (410). In one example, the firmware (412) processes all commands received via the host interface (410). In one example, the software or other data received from the host device (408) includes uncompressed data to be written to the SLC area (418). Data from the host device (408) may be streamed or transmitted in bulk. The controller (406) writes the software to the non-volatile memory (404) (e.g., to the SLC area (418)). In one example, the controller (406) writes software to the SLC area (418) when the temperature of the non-volatile memory (404) (e.g., based on the temperature measured by the sensor (422)) is below a predetermined threshold (e.g., 60 degrees Celsius).
[0137] The controller (406) loads the software in a compressed form into the non-volatile memory (404) in the first mode. In one embodiment, this compression may be performed offline or by an external device. In other embodiments, it may be performed by a controller of the memory device itself (e.g., a controller (406) using data received via a host interface (410), JTAG, etc.). In one embodiment, the firmware (412) implements a codec that performs compression and decompression routines. Various lossless compression algorithms such as run-length encodings (RLE), bzip2, Lempel-Ziv compression (and variations thereof) may be used. Alternatively, or in conjunction with the foregoing, an application-specific compression algorithm may be used based on the data to be recorded. For example, FLAC (Free Lossless Audio Codec) may be used for audio data, or H.264 lossless compression may be used for video data.
[0138] In one embodiment, the controller is modified to include a codec that can be used to compress data prior to manufacturing. In one embodiment, this compressed data is pre-programmed into an SLC area (418) of a non-volatile memory (404).
[0139] After the software is stored in the first mode, the non-volatile memory (404) is exposed to a temperature exceeding a predetermined threshold (e.g., 60 degrees Celsius). For example, manufacturing operations such as soldering or system burn-in can cause the temperature of the non-volatile memory (404) to exceed the predetermined threshold (e.g., based on the temperature measured by the sensor (422)). In one example, the software is stored in the first mode when the non-volatile memory (404) is at room temperature. As a next step, the storage device (402) is exposed to the burn-in temperature for a predetermined time period (e.g., more than 5 minutes).
[0140] Subsequently, the controller (406) determines that the temperature of the non-volatile memory (404) has dropped below a predetermined threshold (e.g., a temperature in the range of 40 to 80 degrees Celsius) (e.g., based on the temperature measured by the sensor (422)). For example, the temperature of the non-volatile memory (404) may drop below the predetermined threshold after the completion of soldering or system burn-in operations.
[0141] In response to a determination that the temperature of the non-volatile memory (404) has dropped below a predetermined threshold (e.g., 60 degrees Celsius), the software is decompressed and stored in the non-volatile memory (404) in a second mode (e.g., TLC or QLC mode). In one example, the software is decompressed using a lossless decompression algorithm. In one embodiment, this decompression may be performed offline or by an external device. In other embodiments, it may be performed by a controller of the memory device itself (e.g., controller (406)). In one embodiment, the software is copied to a cache memory (416) (e.g., within the volatile memory (414)) for the controller (406) to perform software decompression.
[0142] In one embodiment, after the temperature of the non-volatile memory (404) exceeds a predetermined threshold (e.g., 60 degrees Celsius, or another temperature selected from the range of 30–85 degrees Celsius) (e.g., based on the temperature measured by the sensor (422)), a flag is set (e.g., in the configuration data (428)). After the temperature of the non-volatile memory (404) falls below the predetermined threshold (e.g., 60 degrees Celsius, or another temperature selected from the range of 30–85 degrees Celsius), another flag is set. In one embodiment, the firmware (e.g., the firmware (412)) monitors the status of these flags. After both flags are set, the firmware triggers a transfer operation to be executed (e.g., by the controller (406)). During transmission, access to the non-volatile memory (404) is blocked (e.g., by the controller (406)), compressed data is read from the SLC area (418), decompressed, and transmitted to the TLC area (420) as uncompressed data. This operation ensures that the capacity of the TLC area (420) is utilized during use, while ensuring that the data pre-programmed in the SLC area (418) is not damaged during manufacturing (e.g., reflow soldering).
[0143] FIG. 5 illustrates a method for controlling the storage density of data stored in a storage device based on monitoring the temperature according to some embodiments. For example, the method of FIG. 5 may be implemented in the system of FIG. 4. In one example, the storage device is the storage device (402) of FIG. 4.
[0144] The method of FIG. 5 may be performed by processing logic that may include hardware (e.g., a processing device, circuitry, dedicated logic, programmable logic, microcode, hardware of the device, integrated circuit, etc.), software (e.g., instructions performed or executed on the processing device), or a combination thereof. In some embodiments, the method of FIG. 5 is performed at least partially by one or more processing devices (e.g., the controller (406) of FIG. 4).
[0145] Although illustrated in a specific sequence or order, the order of the processes may be modified unless otherwise specified. Accordingly, the illustrated embodiments should be understood merely as examples, and the illustrated processes may be performed in a different order, and some processes may be performed in parallel. Additionally, one or more processes may be omitted in various embodiments. Therefore, not all processes are required in all embodiments. Other process flows are possible.
[0146] In block (501), software is loaded into the nonvolatile memory of the storage device while the temperature of the nonvolatile memory is below a predetermined threshold. In one example, the nonvolatile memory is the nonvolatile memory (404).
[0147] In block (503), the software is stored in non-volatile memory in a compressed format using a first mode. In one example, the first mode is an SLC mode.
[0148] In block (505), the non-volatile memory is exposed to a temperature higher than a predetermined threshold. This exposure occurs during a manufacturing operation associated with the storage device. This exposure occurs while the software is stored in a first mode. In one example, the predetermined threshold is a temperature corresponding to the manufacturing operation. In one example, the predetermined threshold is a temperature corresponding to the start or completion of the manufacturing operation. In one example, the predetermined threshold is a temperature corresponding to an increased risk of data loss for the data stored in the non-volatile memory.
[0149] In block (507), it is determined that the temperature of the non-volatile memory has dropped below a predetermined threshold.
[0150] In block (509), the stored software is decompressed in response to a determination that the temperature of the non-volatile memory has dropped below a predetermined threshold. In one example, the software is decompressed by the controller (406).
[0151] In block (511), the decompressed software is stored in non-volatile memory in a second mode. The second mode has a higher storage density than the first mode. In one example, the second mode is a TLC or QLC mode.
[0152] In one embodiment, the method comprises: loading software into the nonvolatile memory of a storage device (e.g., storage device (402)) while the temperature of the nonvolatile memory is lower than a predetermined threshold; storing the software in the nonvolatile memory in a compressed format in a first mode; exposing the nonvolatile memory to a temperature higher than a predetermined threshold during a manufacturing operation associated with the storage device and while the software is stored in the first mode; and determining that the temperature of the nonvolatile memory has fallen below a predetermined threshold. In response to the determination that the temperature of the nonvolatile memory has fallen below a predetermined threshold, the following steps are performed: decompressing the stored software; and storing the decompressed software in the nonvolatile memory in a second mode, the second mode (e.g., TLC mode) having a higher storage density than the first mode (e.g., SLC mode).
[0153] In one embodiment, the method further comprises: a step of collecting the software by a software tool before loading the software; and a step of compressing the collected software into the compressed format. In one example, the software tool is a software program used to load pre-programmed software into flash memory. In one example, the software tool is executed on a software loading device (426).
[0154] In one embodiment, the collected software is compressed using lossless compression.
[0155] In one embodiment, the non-volatile memory is a NAND flash memory.
[0156] In one embodiment, the non-volatile memory includes a first region (e.g., an SLC region (418)) and a second region (e.g., a TLC region (420)), and software is stored in the first region in the first mode and software is stored in the second region in the second mode.
[0157] In one embodiment, the method further includes the step of resizing or removing the first region after storing the decompressed software in the non-volatile memory in the second mode.
[0158] In one embodiment, the method further includes the step of converting the first region to operate in the second mode after storing the decompressed software in the non-volatile memory in the second mode.
[0159] In one embodiment, the first region is configured to operate as a pseudo-single-level cell (pSLC) NAND flash region.
[0160] In one embodiment, the non-volatile memory is a flash memory, and the first area is operated in a first mode by a controller (e.g., controller (406)) that controls the storage of data in the flash memory, and the second area is operated in a second mode by the controller.
[0161] In one embodiment, the software is firmware for a storage device (e.g., firmware (412)), and the firmware controls read and write operations for data stored in non-volatile memory.
[0162] In one embodiment, the software is firmware or an application.
[0163] In one embodiment, the software stored in the first mode is encrypted.
[0164] In one embodiment, the method further comprises the steps of: reading the software stored in the first mode from the non-volatile memory; and decoding the software read from the non-volatile memory to provide the decoded software; and the software stored in the second mode is the decoded software.
[0165] In one embodiment, the non-volatile memory stores data about the autonomous vehicle in response to commands received from the controller of the autonomous vehicle, and determining that the temperature of the non-volatile memory has fallen below a predetermined threshold includes: collecting sensor data using at least one sensor of the autonomous vehicle (e.g., sensors (422 and / or 424)) by the controller; and determining that the temperature of the non-volatile memory has fallen below a predetermined threshold is based on the collected sensor data.
[0166] In one embodiment, determining that the temperature of the non-volatile memory has fallen below a predetermined threshold includes: reading stored configuration data (e.g., configuration data (428)) representing the context of operation for the non-volatile memory; and determining that the temperature of the non-volatile memory has fallen below a predetermined threshold is performed by a controller and is based on the configuration data.
[0167] In one embodiment, the method further includes the step of copying software stored in a first mode to a cache memory (e.g., cache memory (416)); and the step of decompressing the stored software includes the step of decompressing the software copied from the cache memory.
[0168] In one embodiment, decompressing the stored software and storing the decompressed software is further performed in response to the detection of an event, the event being: an ambient temperature exceeding a predetermined threshold; an ambient temperature falling below a predetermined threshold; acceleration exceeding a predetermined threshold; power consumption of a storage device containing non-volatile memory exceeding a predetermined threshold; results of testing the non-volatile memory; results of testing a computing system containing non-volatile memory; results of testing a diagnostic of a vehicle containing non-volatile memory; results of operating the non-volatile memory; results of performance testing; results of failure analysis testing; a break-in of the non-volatile memory; physical storage of the storage device containing non-volatile memory; transportation of the storage device containing non-volatile memory; or at least one of an environmental condition exceeding a predetermined threshold, wherein the environmental condition is associated with the physical storage of the storage device containing non-volatile memory.
[0169] In one example, one or more flags are set in the configuration data (428) in response to one or more of the above events. The controller (406) monitors the state of the storage device (402) based on these set flags. The method of storing data in the non-volatile memory (404) can be adjusted based on the configuration data (428). In one example, one or more of the above events are detected by the controller (406) and / or the host device (408).
[0170] In one embodiment, the first mode is a single-level cell (SLC) mode, and the second mode is a multi-level cell (MLC) mode, a triple-level cell (TLC) mode, or a quad-level cell (QLC) mode.
[0171] In one embodiment, the system comprises: a storage device configured to store data in nonvolatile memory in a first mode or in a second mode having a storage density higher than that of the first mode; at least one sensor; at least one processing device; and a memory including instructions, wherein the instructions are configured such that the at least one processing device loads software into nonvolatile memory when the temperature of nonvolatile memory is below a predetermined threshold; stores the loaded software in nonvolatile memory in a compressed format in the first mode; exposes nonvolatile memory to a temperature higher than the predetermined threshold when the loaded software is stored in the first mode; and uses at least one sensor to determine that the temperature of nonvolatile memory has fallen below the predetermined threshold. In response to the determination that the temperature of nonvolatile memory has fallen below the predetermined threshold, the following steps are performed: decompressing the stored software; and storing the decompressed software in nonvolatile memory in the second mode.
[0172] In one embodiment, the method comprises: storing software in a first mode in at least one of a compressed or encrypted format in non-volatile memory; exposing the non-volatile memory to a temperature higher than a predetermined threshold while the software is stored in the first mode; determining that the temperature of the non-volatile memory has fallen below a predetermined threshold; and in response to determining that the temperature of the non-volatile memory has fallen below a predetermined threshold, performing at least one of decompression or decryption of the stored software and storing the decompression or decrypted software in a second mode in non-volatile memory, wherein the second mode has a higher storage density than the first mode.
[0173] In one embodiment, the compressed data is programmed into the pSLC area of the NAND flash array.
[0174] In one embodiment, a set of addresses of a NAND flash array may be designated as a pSLC area. For example, a first N addresses of the array may be designated as a pSLC area. Designating a pSLC area involves configuring the firmware to store only one data bit per cell in the pSLC area. In one embodiment, the pSLC area is accessed by writing to the addresses. In other embodiments, the controller of the NAND array provides commands for accessing the pSLC area. In one embodiment, compressed data is written sequentially to the pSLC area (e.g., starting from address 0).
[0175] In some embodiments, before writing, the method checks whether the size of the compressed data will fit within the pSLC area. If so, the method continues to write the fully compressed data to the pSLC area. Otherwise, the method may selectively compress a portion of the data to be written and write it to the pSLC area. In other embodiments, the size of the pSLC area may be expanded before the compressed data is written to the pSLC area.
[0176] In some embodiments, the non-volatile memory (404) is reflow soldered. Reflow soldering may be performed by a reflow soldering oven or other heat source. In some embodiments, soldering is performed automatically as part of the manufacturing process.
[0177] In some embodiments, data within the SLC area (418) is decompressed into the TLC area (420).
[0178] In one embodiment, data from the SLC area (418) is read from the non-volatile memory (404). In one embodiment, the reading of data from the SLC area (418) is performed by a controller (e.g., controller (406)) of the non-volatile memory (404) and is performed in response to the detection that the temperature is below the predetermined threshold after detecting that the temperature exceeds the predetermined threshold. For example, after soldering at an elevated temperature, the temperature may be detected to be below the predetermined threshold when the memory device is cooled.
[0179] In one embodiment, the method may copy the contents of the SLC area (418) to a cache memory (416) (e.g., onboard dynamic random access memory (DRAM)) which is part of the volatile memory (414). In some embodiments, the method copies the entire contents of the SLC area (418) to the cache memory (416) for processing. In other embodiments, the method may reduce DRAM usage by streaming data from the SLC area (418) for processing. In some embodiments, the DRAM is sized to accommodate the SLC area (418), and thus the entire contents of the SLC area (418) may be copied to the cache memory (416).
[0180] In one embodiment, the method decompresses SLC data.
[0181] In some embodiments, SLC data is compressed using a lossless compression algorithm. In one embodiment, this algorithm is executed by a codec of the storage device (402) (e.g., a codec implemented by running firmware (412) on the controller (406). Alternatively, the codec may be implemented outside the storage device (402). In either case, decompression may involve the use of a suitable decompression algorithm based on the lossless compression algorithm used to compress the data stored in the SLC area (418).
[0182] In some embodiments, the method performs error code correction (ECC) on the decompressed data. In some embodiments, the method may perform ECC before decompression. The specific type of ECC used may vary. In some embodiments, the method may use an ECC installed within the storage device (402) and used during normal operation.
[0183] In some embodiments, the method writes the decompressed SLC data to the TLC region (420) of the non-volatile memory (404).
[0184] In some embodiments, the method writes the decompressed data starting from the first TLC address. The method may write the data sequentially when decoded from the beginning of the SLC area (418). In other embodiments, the decompressed data may include an indication of the address where the data is to be written to the TLC area (420).
[0185] In an alternative embodiment, the method may decompress SLC data until all SLC data is decompressed and store the data in the cache memory (416). Then, the method may perform a bulk write of the decompressed data to the TLC area (420).
[0186] In an embodiment where the SLC region (418) is implemented as a pseudo-SLC memory (pSLC), the pSLC region may be removed and returned to TLC mode. In this embodiment, the method may copy the decompressed data to the beginning of the entire non-volatile memory (404).
[0187] In some embodiments, the method checks to determine whether all compressed data within the SLC area (418) has been decompressed and copied to the TLC area (420) or cache memory (416). If not, the method continues to copy any remaining data within the SLC area (418) to the TLC area (420) or cache memory (416).
[0188] In some embodiments, the method updates the controller firmware (412) to disable the SLC operation of the SLC region (418).
[0189] In an optional embodiment, the method may reclaim the area designated as a pSLC area and operate the pSLC area as a TLC NAND flash memory. Since the pSLC utilizes a basic TLC architecture, the method may modify the firmware to disable pSLC access to the pSLC area. This effectively converts the pSLC area into a TLC area (420). In some embodiments, the method may copy the decompressed data stored in the cache memory (416) to the newly expanded TLC area (420).
[0190] In some embodiments, the pSLC region is maintained throughout the entire lifespan of the device. In this case, the compressed data will be retained in the pSLC region. In this way, the TLC region (420) can be reset by recopying and decompressing the data from the SLC region (418) to the TLC region (420). For example, the TLC region (420) may be damaged at some point through subsequent resoldering or other high heat.
[0191] In some embodiments, the method enables access to the TLC region (420) for the host device (408).
[0192] In one embodiment, software may be stored in the SLC area (418) while it is determined and / or expected that the temperature of the non-volatile memory (404) exceeds a predetermined threshold (e.g., when undergoing reflow soldering, system burn-in, or other high-temperature events).
[0193] In one embodiment, access to the non-volatile memory (404) may be denied while the stored software is being decompressed. After the decompression process is completed, read / write / erase and other operations on the non-volatile memory (404) may be enabled.
[0194] The present disclosure includes various devices for implementing the aforementioned methods and systems, comprising data processing systems for performing these methods, and a computer-readable medium comprising instructions that cause the systems to perform these methods when executed on the data processing systems.
[0195] The descriptions and drawings are exemplary and are not to be construed as limiting. Numerous specific details are described to aid in a detailed understanding. However, in certain cases, well-known or conventional details are not described to avoid obscuring the description. Reference to one or an embodiment of the invention does not necessarily mean reference to the same embodiment; such reference means at least one.
[0196] In this specification, references to “one embodiment” or “one embodiment” mean that a specific feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of this disclosure. Appearances of the phrase “in one embodiment” at various locations in this specification do not necessarily refer to the same embodiment, nor are they separate or alternative embodiments mutually exclusive from other embodiments. Furthermore, various features that may appear in some embodiments rather than in others are described. Similarly, various requirements that may be requirements for some embodiments rather than other embodiments are described.
[0197] In this specification, various functions and operations may be described as being performed or caused by software code for the sake of simplicity of description. However, those skilled in the art will recognize that these expressions imply that the functions are derived from the execution of code by one or more processors, such as a microprocessor, an application-specific integrated circuit (ASIC), a graphics processor, and / or a field programmable gate array (FPGA). Alternatively, or in combination, functions and operations may be implemented using special-purpose circuits (e.g., logic circuits) with or without software instructions. Embodiments may be implemented using hardwired circuits without software instructions, or in combination with software instructions. Accordingly, the descriptions are not limited to any particular combination of hardware circuits and software, or any particular source of instructions executed by a computing device.
[0198] While some embodiments may be implemented in fully functional computers and computer systems, various embodiments may be distributed as computing products of various forms and may be applied regardless of the specific type of machine or computer-readable medium used to affect the actual distribution.
[0199] At least some of the disclosed embodiments may be implemented at least partially in software. That is, these techniques may be performed in a computing device or other system in response to a processor, such as a microprocessor, that executes sequences of instructions contained in memory, such as ROM, volatile RAM, non-volatile memory, cache, or remote storage device.
[0200] Routines executed to implement the embodiments may be implemented as part of an operating system, middleware, service delivery platform, SDK (Software Development Kit) component, web services, or other specific application, component, program, object, module, or sequence of instructions referred to as "computer programs." An interface for calling these routines may be exposed to the software development community as an Application Programming Interface (API). Computer programs typically include one or more instructions set at various times in various memory and storage devices within a computer, and when read and executed by one or more processors within a computer, they cause the computer to perform operations necessary to execute elements involving various modes.
[0201] Machine-readable media can be used to store software and data that enable the device to perform various methods when executed by a computing device. Executable software and data can be stored in various locations, such as ROM, volatile RAM, non-volatile memory, and / or cache. Parts of this software and / or data may be stored in any of these storage devices. Additionally, data and commands may be obtained from centralized servers or peer-to-peer networks. Different parts of data and commands may be obtained from different centralized servers and / or peer-to-peer networks at different times and in different communication sessions, or within the same communication session. Data and commands may be obtained in their entirety prior to the execution of applications. Alternatively, parts of data and commands may be dynamically obtained in a timely manner as needed for execution. Therefore, data and commands do not need to be present in their entirety on the machine-readable medium at a specific instance of time.
[0202] Examples of computer-readable media include, but are not limited to, writable and non-writable types of media such as volatile and non-volatile memory devices, read-only memory (ROM), random access memory (RAM), flash memory devices, solid-state drive storage media, removable disks, magnetic disk storage media, and optical storage media (e.g., compact disc read-only memory (CD-ROMs), digital multifunction discs (DVDs), etc.). Computer-readable media can store instructions.
[0203] Generally, a type or non-transient machine-readable medium includes any mechanism that provides (e.g., stores) information in a form accessible by a machine (e.g., a computer, mobile device, network device, personal information terminal, manufacturing tool, any device having a set of one or more processors, etc.).
[0204] In various embodiments, the hardwired circuit may be used in combination with software and firmware instructions to implement the techniques. Accordingly, the techniques are not limited to any specific combination of hardware circuits and software or any specific source of instructions executed by a computing device.
[0205] The various embodiments described herein may be implemented using a wide variety of different types of computing devices. Examples of "computing devices" as used herein include, but are not limited to, servers, centralized computing platforms, systems of multiple computing processors and / or components, mobile devices, user terminals, vehicles, personal communication devices, wearable digital devices, electronic kiosks, general-purpose computers, electronic document readers, tablets, laptop computers, smartphones, digital cameras, home appliances, televisions, or digital music players. Additional examples of computing devices include devices that are part of the so-called "Internet of Things (IoT)." These "things" may occasionally interact with an owner or manager who can monitor the things or modify their settings. Such an owner or manager may also act as a user for the "thing" device. In some examples, the user's primary mobile device (e.g., Apple iPhone) may be a manager server for a paired "thing" device (e.g., Apple Watch) worn by the user.
[0206] In some embodiments, the computing device may be a computer or host system implemented as, for example, a desktop computer, a laptop computer, a network server, a mobile device, or other computing device including a memory and processing device. The host system may include or be coupled to a memory subsystem so that the host system can read data from or write data to the memory subsystem. The host system may be coupled to the memory subsystem through a physical host interface. Generally, the host system may access multiple memory subsystems through the same communication connection, a number of separate communication connections, and / or a combination of communication connections.
[0207] In some embodiments, the computing device is a system comprising one or more processing devices. Examples of processing devices may include a microcontroller, a central processing unit (CPU), a special-purpose logic circuit (e.g., a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), etc.), a system-on-chip (SoC), or other suitable processors.
[0208] Some of the drawings illustrate multiple operations in a specific order, but non-order-dependent operations may be reordered, and other operations may be combined or decomposed. Some rearrangements or other groupings are specifically mentioned, but others will be obvious to those skilled in the art and therefore a comprehensive list of alternatives is not provided. Additionally, it should be recognized that the stages may be implemented in hardware, firmware, software, or any combination thereof.
[0209] In the foregoing specification, the present disclosure has been described with reference to specific exemplary embodiments. It will be apparent that various modifications may be made without departing from the broader spirit and scope set forth in the following claims. Accordingly, the specification and drawings should be regarded as illustrative rather than restrictive.
Claims
Claim 1 A method performed by a processing device comprising: writing data representing a software application to the nonvolatile memory while the temperature of the nonvolatile memory of the storage device is below a predetermined threshold; storing the data in the nonvolatile memory in a compressed format in a first mode while the data is stored in the first mode, exposing the nonvolatile memory to a temperature higher than the predetermined threshold; determining that the temperature of the nonvolatile memory has fallen below the predetermined threshold; detecting the transfer of the storage device; and in response to determining that the temperature of the nonvolatile memory has fallen below the predetermined threshold and detecting the transfer of the storage device: decompressing the data; and storing the decompressed data in the nonvolatile memory in a second mode, wherein the second mode has a higher storage density than the first mode. Claim 2 A method according to claim 1, further comprising: a step of collecting the software application by a software tool before recording data representing the software application; and a step of compressing the collected software application into a compressed format. Claim 3 In paragraph 2, the method wherein the collected software application is compressed using a lossless compression algorithm. Claim 4 A method according to claim 1, wherein the non-volatile memory is a NAND flash memory. Claim 5 A method according to claim 1, wherein the non-volatile memory includes a first region and a second region, and the data is stored in the first region in the first mode and the data is stored in the second region in the second mode. Claim 6 A method according to claim 5, further comprising the step of storing the decompressed data in the non-volatile memory in the second mode, and then resizing or removing the first region. Claim 7 A method according to claim 5, further comprising the step of storing the decompressed data in the non-volatile memory in the second mode, and then converting the first region to the second mode. Claim 8 A method according to claim 5, wherein the first region is configured to operate as a pSLC (pseudo single-level cell) NAND flash region. Claim 9 A method according to claim 5, wherein the non-volatile memory is a flash memory, the first region operates in the first mode by a controller that controls data storage in the flash memory, and the second region operates in the second mode by the controller. Claim 10 A method according to claim 1, wherein the software application is firmware for the storage device, and the firmware controls read and write operations for data stored in the non-volatile memory. Claim 11 In claim 1, the software application is firmware, method. Claim 12 In claim 1, the data stored in the first mode is encrypted, method. Claim 13 A method according to claim 12, further comprising: a step of reading data stored in the first mode from the non-volatile memory; and a step of decoding the data read from the non-volatile memory to provide decoded data; wherein the data stored in the second mode is the decoded data. Claim 14 The method of claim 1, wherein the non-volatile memory stores data for the autonomous vehicle in response to commands received from a controller of the autonomous vehicle, and the step of determining that the temperature of the non-volatile memory has fallen below a predetermined threshold comprises: the step of collecting sensor data using at least one sensor of the autonomous vehicle by the controller; and the determination that the temperature of the non-volatile memory has fallen below the predetermined threshold is based on the collected sensor data. Claim 15 A method according to claim 1, wherein the step of determining that the temperature of the non-volatile memory has fallen below the predetermined threshold comprises: reading stored configuration data indicating the context of operation for the non-volatile memory; wherein the determination that the temperature of the non-volatile memory has fallen below the predetermined threshold is performed by a controller and is based on the configuration data. Claim 16 A method according to claim 1, further comprising the step of copying data stored in the first mode to a cache memory; wherein the step of decompressing the stored data includes the step of decompressing the data copied from the cache memory. Claim 17 The method of claim 1, wherein the step of decompressing the stored data and storing the decompressed data is further performed in response to the detection of an event, wherein the event is at least one of: an ambient temperature exceeding a predetermined threshold; an ambient temperature falling below a predetermined threshold; acceleration exceeding a predetermined threshold; power consumption of a storage device including the non-volatile memory exceeding a predetermined threshold; a result of testing the non-volatile memory; a result of testing a computing system including the non-volatile memory; a result of a diagnostic test for a vehicle including the non-volatile memory; a result of operation of the non-volatile memory; a result of a performance test; a result of a failure analysis test; a break-in of the non-volatile memory; physical storage of the storage device including the non-volatile memory; transportation of the storage device including the non-volatile memory; or an environmental condition exceeding a predetermined threshold, wherein the environmental condition is associated with the physical storage of the storage device including the non-volatile memory. Claim 18 A method according to claim 1, wherein the first mode is a single-level cell (SLC) mode and the second mode is a multi-level cell (MLC) mode, a triple-level cell (TLC) mode, or a quad-level cell (QLC) mode. Claim 19 A system comprising: a storage device configured to store data in a nonvolatile memory in a first mode or in a second mode having a higher storage density than the first mode; at least one sensor; at least one processing device; and a memory including a command, wherein the command is configured such that at least one processing device writes data representing a software application to the nonvolatile memory when the temperature of the nonvolatile memory is below a predetermined threshold; stores the data representing the software application in the first mode in a compressed format in the nonvolatile memory; exposes the nonvolatile memory to a temperature higher than the predetermined threshold when the data representing the software application is stored in the first mode; uses the at least one sensor to determine that the temperature of the nonvolatile memory has fallen below the predetermined threshold; detects the transport of the storage device; and in response to the determination that the temperature of the nonvolatile memory has fallen below the predetermined threshold and the detection of the transport of the storage device, instructs the storage device to decompress the stored data and store the decompressed data in the nonvolatile memory in the second mode. Claim 20 A method performed by a processing device comprising: storing data in a nonvolatile memory in a first mode in at least one of a compressed or encrypted format; exposing the nonvolatile memory to a temperature higher than a predetermined threshold while the data is stored in the first mode; determining that the temperature of the nonvolatile memory has fallen below the predetermined threshold; detecting the transport of the storage device; and in response to determining that the temperature of the nonvolatile memory has fallen below the predetermined threshold and detecting the transport of the storage device, performing at least one of decompression or decryption of the stored data; and storing the decompressed or decrypted data in the nonvolatile memory in a second mode, wherein the second mode has a higher storage density than the first mode. Claim 21 A system comprising: a nonvolatile memory; at least one sensor; and at least one processing device, wherein the processing device is configured to: store data in the nonvolatile memory in a compressed format; monitor the temperature of the nonvolatile memory using the at least one sensor; and decompress the data based at least partially on the monitoring. Claim 22 In claim 21, the processing device is further configured to adjust the storage density of the stored data based on the monitoring, in a system. Claim 23 In paragraph 21, the system stores the decompressed data at an increased storage density based on the monitoring. Claim 24 A system according to claim 21, wherein the non-volatile memory includes a memory region, and the processing device is further configured to determine whether the size of the first data will fit within the memory region. Claim 25 In claim 21, the memory area of the non-volatile memory where data stored in the compressed format is written operates as a single-level cell (SLC) area, in a system.
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