Gate all around field effect transistor including vertical pillar and fabrication method therefor

Abstract

A semiconductor memory device using a GAA-FET according to an embodiment of the present invention may include: a plurality of bit lines extending in a first direction; a plurality of word lines extending in a second direction that intersects the first direction and is positioned higher in a vertical direction than the plurality of bit lines; a plurality of storage node capacitors stacked on an intersection region where the plurality of bit lines and the plurality of word lines intersect, and which is positioned higher in a vertical direction than the plurality of word lines; and a plurality of oxide semiconductor channel pillars arranged to penetrate the interior of the plurality of word lines on the intersection region and to connect the plurality of bit lines and the plurality of storage node capacitors. On the intersection region, the plurality of word lines may surround the plurality of oxide semiconductor channel pillars as gate terminals.

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