Laser chips with a lead frame attachment to a photonics chip

Abstract

Structures comprising a photonics chip and a cavity-mounted laser chip, and methods for forming and using such structures. A structure comprises a photonics chip comprising a substrate and a cavity in the substrate. A structure further comprises a laser chip inside the cavity, and a lead frame comprising a first section attached to a portion of the laser chip and a second section attached to a portion of the photonics chip.

Description

Technology Field

[0001] The present disclosure relates to photonics chips, and more specifically, to structures comprising a photonics chip and a cavity-mounted laser chip, and methods for forming and using such structures. Background Technology

[0002] Photonic chips are used in many applications and systems, including but not limited to data communication systems and data computing systems. A photonic chip comprises a photonic integrated circuit composed of optical components, such as modulators, polarizers, and optical couplers, used to manipulate light received from a light source. A laser chip can be integrated with the photonic chip and can function as a light source. For example, the laser chip can be attached inside a cavity formed in the substrate of the photonic chip. The laser chip includes a semiconductor laser configured to emit light, such as coherent light of infrared wavelengths. The light emitted by the semiconductor laser can be supplied to an edge coupler coupled to the photonic integrated circuit.

[0003] Aligning a semiconductor laser to an edge coupler during the attachment process can present technical challenges. A laser chip can be attached to a photonics chip via bump connections. The bump connections may include redistribution layers on the photonics chip and solder on the redistribution layers, the solder being reflowed by a reflow process to provide attachments between the laser chip and the photonics chip. The redistribution layers must be patterned prior to the attachment process, which requires precise control over the patterning. Furthermore, the flow of the solder during the reflow process is another variable that requires precise control to form high-quality bump connections.

[0004] The precision of alignment between the semiconductor laser and the edge coupler can also be limited by variations in the thickness of the laser chip, which introduces other variables into the alignment process. The semiconductor laser is not powered during the alignment process, which also imposes limitations due to the lack of the ability to rely on any type of active feedback.

[0005] Controlling the operating temperature of a semiconductor laser can also present technical challenges. Bump connections provide the primary conduction paths for sinking the heat generated during the operation of the laser chip, which imposes inherent limitations on the ability to sink heat and control the operating temperature of the semiconductor laser.

[0006] Improved structures including photonics chips and cavity-mounted laser chips, and improved methods for forming and using such structures are needed.

[0007] In an embodiment of the present invention, the structure comprises a photonics chip including a substrate and a cavity in the substrate. The structure further comprises a laser chip inside the cavity and a lead frame including a first section attached to a portion of the laser chip and a second section attached to a portion of the photonics chip.

[0008] In an embodiment of the present invention, the method comprises the steps of attaching a lead frame to a laser chip, grasping a first upright section of the lead frame with a pick and place tool, grasping a second upright section of the lead frame with a pick and place tool, and placing the laser chip within a cavity in a substrate of a photonic chip with a pick and place tool.

[0009] In an embodiment of the present invention, the method comprises the steps of forming a cavity in a substrate of a photonics chip, attaching a first section of a lead frame and a portion of a laser chip, and attaching a second section of a lead frame to the portion of the photonics chip. The laser chip is disposed inside the cavity when the second section of the lead frame is attached to the portion of the photonics chip. Brief explanation of the drawing

[0010] The attached drawings, which are included in and constitute part of this specification, illustrate various embodiments of the present invention and serve to explain the embodiments of the present invention together with the general description of the present invention given above and the detailed description of the embodiments given below. In the drawings, the same reference numerals refer to the same features in various drawings. FIG. 1 is a plan view of a structure according to embodiments of the present invention. Figure 2 is a cross-sectional view generally taken along line (2-2) of Figure 1. FIG. 3 is a cross-sectional view according to alternative embodiments of the present invention. FIG. 4 is a plan view of a structure according to alternative embodiments of the present invention. Figure 5 is a cross-sectional view generally taken along line (5-5) of Figure 4. FIG. 5a is a cross-sectional view generally taken along the line (5A-5A) of FIG. 4. FIG. 6 is a cross-sectional view of a structure according to alternative embodiments of the present invention. FIG. 7 is a cross-sectional view of a structure according to alternative embodiments of the present invention. FIG. 8 is a plan view of a structure according to alternative embodiments of the present invention. FIG. 9 is a plan view of a structure according to alternative embodiments of the present invention. FIG. 10 is a schematic diagram of a picking and placement tool according to embodiments of the present invention. Specific details for implementing the invention

[0011] Referring to FIGS. 1 and 2, according to embodiments of the present invention, the structure (10) comprises a photonics chip (12), a laser chip (14), and a lead frame (16) that are combined to form an assembly. The photonics chip (12) comprises an edge coupler (18) positioned on and above a dielectric layer (20) and a semiconductor substrate (22). In an embodiment, the dielectric layer (20) may be composed of a dielectric material, such as silicon dioxide, and the semiconductor substrate (22) may be composed of a semiconductor material, such as single-crystal silicon. In an embodiment, the dielectric layer (20) may be a buried oxide layer of a silicon-on-insulator substrate, and the dielectric layer (20) may be positioned between the edge coupler (18) and the semiconductor substrate (22).

[0012] The edge coupler (18) may be composed of a material having a refractive index greater than that of silicon dioxide. In an embodiment, the edge coupler (18) may be composed of a semiconductor material, such as single-crystal silicon. In an alternative embodiment, the edge coupler (18) may be composed of a dielectric material, such as silicon nitride, silicon oxynitride, or aluminum nitride. The edge coupler (18) may be formed by patterning a layer of its constituent material using lithography and etching processes. In an embodiment, the edge coupler (18) may be formed by patterning a semiconductor material (e.g., single-crystal silicon) of a device layer on a silicon substrate on an insulator. In an embodiment, the edge coupler (18) may be formed by depositing a layer composed of its constituent dielectric material (e.g., silicon nitride) and patterning the deposited layer using lithography and etching processes.

[0013] The edge coupler (18) may be configured to receive light of a given mode from the laser chip (14) and route the light to the photonics integrated circuit (17) of the photonics chip (12). In an embodiment, the edge coupler (18) may include a tapered section having a narrow end that defines a facet arranged in close proximity to the light output from which light is emitted by the laser chip (14), which is schematically indicated by a single-direction arrow (15).

[0014] The photonics chip (12) includes an interconnect structure (24) that can be formed by middle-of-line processing and back-end-of-line processing on a dielectric layer (20) and a semiconductor substrate (22). The interconnect structure (24) may include a plurality of dielectric layers arranged in a layer stack on and above the dielectric layer (20) and the semiconductor substrate (22), which are composed of dielectric materials, such as silicon dioxide, silicon nitride, silicon dioxide tetraethyl orthosilicate, or fluorinated silicon dioxide tetraethyl orthosilicate. An edge coupler (18) may be embedded in one or more of the dielectric layers of the interconnect structure (24). The interconnect structure (24) includes pads (25, 26) that may be composed of a metal, such as aluminum, which can be coated by electroless nickel immersion gold or other types of under bump metallurgy.

[0015] The photonics chip (12) may include a cavity (28) that penetrates an interconnect structure (24) and a dielectric layer (20) into a semiconductor substrate (22). The cavity (28) includes side walls (30) and a bottom (32) surrounded by the side walls (30). The cavity (28) may be formed by one or more lithography and etching processes. An edge coupler (18) is located adjacent to one of the side walls (30) of the cavity (28). In an embodiment, the cavity (28) may partially penetrate the semiconductor substrate (22). In an alternative embodiment, the cavity (28) may completely penetrate the semiconductor substrate (22).

[0016] A laser chip (14) may be configured to emit light (e.g., laser light) of a given wavelength, intensity, mode shape, and mode size from an optical output (15) coupled to an edge coupler (18). In an embodiment, the laser chip (14) may include a semiconductor laser composed of one or more III-V compound semiconductor materials. In an embodiment, the laser chip (14) may include an indium phosphide / indium-gallium-arsenic phosphide laser configured to emit continuous laser light of infrared wavelengths. In an embodiment, the semiconductor laser of the laser chip (14) may include an active layer composed of a semiconductor layer that emits light when biased, and cladding layers composed of semiconductor materials having band gaps greater than the band gap of the semiconductor material of the active layer.

[0017] A laser chip (14) is placed inside a cavity (28). The shape and dimensions of the cavity (28) may correspond to the shape and dimensions of the laser chip (14) so ​​that the laser chip (14) can be inserted into the cavity (28). In this regard, the dimensions of the cavity (28) may be slightly larger than the dimensions of the laser chip (14) to provide a gap for insertion of the laser chip (14) into the cavity (28). The laser chip (14) includes a top surface (11) and a bottom surface (13) opposite the top surface (11). The depth of the cavity (28) is selected so that after the laser chip (14) is placed inside the cavity (28), the light output (15) of the laser chip (14) is aligned with the edge coupler (18) to provide an aligned state that promotes efficient light transmission. In an embodiment, the lowest surface (13) of the laser chip (14) may be positioned adjacent to the lowest part (32) of the cavity (28) in an aligned state. In an embodiment, the lowest surface (13) of the laser chip (14) may be in contact with the lowest part (32) of the cavity (28) in an aligned state. In an embodiment, an optical adhesive may be applied to the space between the optical output (15) of the laser chip (14) and the facet of the edge coupler (18), and then cured, for example, by exposure to ultraviolet light.

[0018] The laser chip (14) may include laser landing pads (34, 36) that provide interconnection portions coupled to the semiconductor laser of the laser chip (14). The laser landing pads (34, 36) may be composed of a metal that is patterned by lithography and etching processes after deposition, such as a nickel-gold alloy deposited by an electroless plating process or a copper-nickel-gold alloy deposited by an electroplating process. In an embodiment, the laser landing pads (34, 36) may be connected to n-type and p-type portions that provide cladding layers for the semiconductor laser of the laser chip (14).

[0019] The interconnects (38) are arranged in an array (e.g., one or more rows) on the laser landing pad (34), and the interconnects (40) are also arranged in an array (e.g., one or more rows) on the laser landing pad (36). In an embodiment, the interconnects (38, 40) may be copper pillars that are deposited by a plating process and have solder placed on top. In an embodiment, the interconnects (38, 40) may be solder bumps. The interconnects (38, 40) may be used to attach the laser chip (14) to the lead frame (16).

[0020] The lead frame (16) may include die attachment sections (42, 44), leads (46) defining cantilevered sections protruding laterally from the die attachment section (42), and leads (48) defining cantilevered sections protruding laterally from the die attachment section (44). The lead frame (16) may be formed by a stamping process or an etching process performed on a thin sheet of metal. In an embodiment, the metal of the lead frame (16) may be copper or a copper alloy. In an alternative embodiment, the metal may be a nickel-iron alloy characterized by being magnetic and having a low coefficient of thermal expansion. In an embodiment, the lead frame (16) may be used to power a semiconductor laser inside a laser chip (14) by connecting the die attachment section (42) and leads (46) to a power supply and connecting the die attachment section (44) and leads (48) to ground.

[0021] Each lead (46) of the lead frame (16) may be attached to a pad (25) of the photonics chip (12) by a solder joint (50) to provide a mechanical and electrical connection between the photonics chip (12) and the lead frame (16). The solder joints (50) may be formed by forming or placing solder balls on the pad (25) and reflowing the solder balls. Each lead (48) of the lead frame (16) may be attached to a pad (26) of the photonics chip (12) by a solder joint (52) to provide a mechanical and electrical connection between the photonics chip (12) and the lead frame (16). The solder joints (52) may be formed by forming or placing solder balls on the pad (26) and reflowing the solder balls.

[0022] A lead frame (16) is attached to the top surface (11) of a laser chip (14). In particular, to provide mechanical and electrical connections between the laser chip (14) and the lead frame (16), a die attachment section (42) of the lead frame (16) may be attached to the top surface (11) of the laser chip (14) by reflow soldering associated with interconnects (38), and a die attachment section (44) of the lead frame (16) may be attached to the top surface (11) of the laser chip (14) by reflow soldering associated with interconnects (40). The laser chip (14) is not connected to redistribution layers inside the cavity (28), which are unnecessary due to the mechanical and electrical connections to the lead frame (16) on the top surface (11) of the laser chip (14). In an embodiment, the die attachment sections (42, 44) of the lead frame (16) may additionally be attached to the laser chip (14) by a layer (54) of no-flow underfill that wraps the interconnects (38, 40) and provides mechanical reinforcement.

[0023] The lead frame (16) can function as a heat sink to remove heat generated by the laser chip (14) when power is supplied, which may allow the operating temperature of the semiconductor laser to be lowered and / or allow the output power to be increased. The lead frame (16) also provides a low thermal resistance path for heat transfer from the laser chip (14) to the photonics chip (12) when power is supplied.

[0024] The die attachment sections (42, 44) and leads (46, 48) of the lead frame (16) may be substantially flat or planar. In an embodiment, the lead frame (16) may include upright sections (60) defining tabs that protrude upward in a direction away from the photonics chip (12) and the laser chip (14), and each lead (48) of the lead frame (16) may include upright sections (62) defining tabs that protrude upward in a direction away from the photonics chip (12) and the laser chip (14). The leads (46) are positioned between the upright sections (60) and the die attachment section (42), and a bend (56) connects each upright section (60) to one end of the leads (46). The upright sections (60) extend obliquely with respect to a plane comprising the die attachment section (42) and the leads (46). In an embodiment, each lead (46) may be connected to an upright section (60) by a right-angle bend (56). The leads (48) are positioned between the upright sections (62) and the die attachment section (44), and the bend (58) connects each upright section (62) to one end of the leads (48). The upright sections (62) extend obliquely with respect to a plane comprising the die attachment section (44) and the leads (48). In an embodiment, each lead (48) may be connected to an upright section (62) by a right-angle bend (58).

[0025] The upright sections (60, 62) of the lead frame (16) can be utilized to insert the laser chip (14) into a cavity (28) in the semiconductor substrate (22) of the photonics chip (12) while the laser chip (14) is mechanically supported by the lead frame (16). For example, the upright sections (60, 62) can be grasped and manipulated so that the laser chip (14) is inserted into the cavity (28). The laser chip (14) is inverted when inserted into the cavity (28), which is in contrast to conventional assembly approaches in which the laser chip (14) is non-inverted. Consequently, the depth of the cavity (28) is greater than the conventional cavity depths for assembling laser and photonics chips. For example, the depth of the cavity (28) may be about 100 microns.

[0026] Referring to FIG. 3 and according to alternative embodiments of the present invention, one or more wires (64) may be attached to leads (46) by wire bonds (65), and one or more wires (66) may be attached to leads (48) by wire bonds (67). The wire bonds (65, 67) may be formed by a wire bonding process that relies on a combination of downward pressure, ultrasonic energy, and optionally heat to attach the wires (64, 66) to the leads (46, 48). The wires (64, 66) may be made of metal, such as gold or copper. The solder joints (50, 52) may be removed and replaced with an adhesive (68) configured to attach the leads (46, 48) of the lead frame (16) to the photonics chip (12).

[0027] Referring to FIGS. 4, 5, and 5a, and according to embodiments of the present invention, the lead frame (16) may be modified so that the die attachment section (42) and leads (46) extend completely across parts of the cavity (28) and the laser chip (14), and the die attachment section (44) and leads (48) extend completely across different parts of the cavity (28) and the laser chip (14). In an embodiment, upright sections (60, 62) may be omitted from the lead frame (16). The leads (46) are attached to the pad (25) by a solder joint (50) and to the pad (26) by an adhesive (68). The leads (48) are attached to the pad (25) by an adhesive (68) and to the pad (26) by a solder joint (52).

[0028] Referring to FIG. 6 and according to embodiments of the present invention, the cavity (28) may be extended as a through hole to completely penetrate the semiconductor substrate (22) of the photonics chip (12), and the lead frame (16) may suspend the laser chip (14) inside the cavity (28). Forming the cavity (28) as a through hole provides access to an alignment pin (69), which can be inserted from below the photonics chip (12) and contact the bottom surface (13) of the laser chip (14), and subsequently can be used to assist in the process of aligning the light output (15) from the laser chip (14) with the edge coupler (18). Forming the cavity (28) as a through hole may also provide a thermal chimney for enhanced cooling of the laser chip (14) and / or allow attachment of a heat sink to the bottom surface (13) of the laser chip (14).

[0029] Referring to FIG. 7 and according to embodiments of the present invention, the depth of the cavity (28) in the semiconductor substrate (22) can be increased so that the lowest surface (13) of the laser chip (14) is spaced apart from the lowest part (32) of the cavity (28). Effectively, the cavity (28), which still partially extends through the semiconductor substrate (22), is deeper than the height of the laser chip (14) suspended from the lead frame (16) inside the cavity (28). The space between the lowest surface (13) of the laser chip (14) and the lowest part (32) of the cavity (28) can improve thermal isolation, or alternatively, can be filled with adhesive.

[0030] Referring to FIG. 8 and according to embodiments of the present invention, the lead frame (16) may be modified to include an extension section (78) protruding laterally from the die attachment section (42) and an extension section (80) protruding laterally from the die attachment section (44). The upright sections (60, 62) may be repositioned from the leads (46, 48) of the lead frame (16) to the ends of the extension sections (78, 80).

[0031] Referring to FIG. 9 and according to embodiments of the present invention, the lead frame (16) may be modified to add a plurality of extension sections (78, 80) protruding laterally from the die attachment section (42) and a plurality of extension sections (78, 80) protruding laterally from the die attachment section (44). The upright sections (60, 62) may be repositioned from the leads (46, 48) to the ends of the extension sections (78, 80).

[0032] Referring to FIG. 10 and according to embodiments of the present invention, the picking and placement tool (70) may include a picking block (72) and clamping arms (74, 76) positioned adjacent to the picking block (72). In an embodiment, the picking block (72) may be made of an electrical insulator, and the clamping arms (74, 76) may be made of metal. The picking and placement tool (70) may be configured to grip upright sections (60, 62) of the lead frame (16) between the picking block (72) and the clamping arms (74, 76) and to manipulate the laser chip (14) and the lead frame (16) to place the laser chip (14) within the cavity (28). In an embodiment, the clamping arms (74, 76) may be configured to power and energize the semiconductor laser inside the laser chip (14).

[0033] When in use, the interconnects (38, 40) can be formed as individual arrays on the laser landing pads (34, 36) of the laser chip (14) at the wafer level, and subsequently, the laser chip (14) can be singulated by dicing. The interconnects (38, 40) can be driven into and through a layer (54) of non-flowing underfill to establish contact with the laser landing pads (34, 36). The portions of the laser landing pads (34, 36) of the laser chip (14) that contact the interconnects (38, 40) can be attached to the lead frame (16) by reflowing the solder associated with the interconnects (38, 40) to form bump-type connections. The lead frame (16) mechanically supports the laser chip (14) by bump-type connections, and the bump-type connections electrically connect the lead frame (16) to the semiconductor laser of the laser chip (14). After the lead frame (16) is attached to the laser chip (14), the lead frame (16) can be trimmed and upright sections (60, 62) can be formed.

[0034] A picking and placement tool (70) can be used to pick a laser chip (14) by gripping an upright section (60) of a lead frame (16) between a picking block (72) and a clamping arm (74), and by gripping an upright section (62) of a lead frame (16) between a picking block (72) and a clamping arm (76). These releaseable connections provide an interface that enables the picking and placement tool (70) to move and manipulate the gripped lead frame (16) and the laser chip (14) relative to the photonics chip (12). In particular, the laser chip (14) can be placed within the cavity (28) of the photonics chip (12) by the picking and placement tool (70) while being supported by the gripped upright sections (60, 62) of the lead frame (16). The lead frame (16) can be placed entirely outside the cavity (28), and the bump-shaped side of the laser chip (14) including interconnects (38, 40) can be placed adjacent to the lead frame (16).

[0035] Solder joints (50, 52) can be formed by reflowing solder to provide electrical and mechanical connections between the pads (25, 26) of the photonics chip (12) and the lead frame (16). In an alternative embodiment, mechanical connections between the photonics chip (12) and the lead frame (16) are established using an adhesive (68), and subsequently, wires (64, 66) attached to the lead frame (16) by wire bonds (65, 67) may be formed. In an embodiment, the leads (46, 48) may be bent before the laser chip is inserted into the cavity (28) and the solder joints (50, 52) are formed by reflowing solder. An optical adhesive may be applied to the space between the optical output (15) of the laser chip (14) and the facet of the edge coupler (18), and then cured, for example, by exposure to ultraviolet light.

[0036] In an embodiment, the laser chip (14) may be powered while placed inside the cavity (28), which enables active alignment of the optical output (15) and the facets of the edge coupler (18). In an embodiment, the clamping arms (74, 76) may be configured to power and supply energy to the semiconductor laser of the laser chip (14) through bump-type connections between the lead frame (16) and the laser chip (14) before the solder joints (50, 52) are formed, which enables active alignment of the optical output (15) with respect to the facets of the edge coupler (18). The optical output (15) may be aligned with the edge coupler (18) by bending the leads (46, 48) of the lead frame (16). In an embodiment, the leads (46, 48) may be bent after the laser chip (14) is inserted into the cavity (28) and before the solder joints (50, 52) are formed by solder reflow. In an embodiment, the leads (46, 48) may be bent after the laser chip (14) is inserted into the cavity (28) and while the solder joints (50, 52) are formed by solder reflow. In an embodiment, the leads (46, 48) may be bent after the laser chip (14) is inserted into the cavity (28) and after the solder joints (50, 52) are formed by solder reflow.

[0037] The methods described above are used for manufacturing integrated circuit chips. The resulting integrated circuit chips may be distributed by the manufacturer in the form of raw wafers (e.g., as a single wafer containing a number of unpackaged chips), as bare dies, or in a packaged form. The chips may be integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of an intermediate or final product. The final product may be any product containing the integrated circuit chips, such as computer products with a central processor or smartphones.

[0038] References in this document to terms modified by approximation language, such as “about,” “approximately,” and “substantially,” shall not be limited to specific exact values. Approximation language may correspond to the precision of the instrument used to measure the value and, unless otherwise dependent on the precision of the instrument, may represent a range of + / -10% of the mentioned value(s).

[0039] References to terms such as “vertical,” “horizontal,” etc., in this document are made as examples rather than limitations to establish a reference frame. The term “horizontal,” as used herein, is defined as a plane parallel to the ordinary plane of the semiconductor substrate, regardless of its actual three-dimensional spatial orientation. The terms “vertical” and “perpendicular” refer to directions in a reference frame perpendicular to the horizontal, as just defined. The term “lateral” refers to directions in a reference frame within the horizontal plane.

[0040] A feature that is "connected" or "combined" to or to another feature may be directly connected or combined to or to that other feature, or instead, one or more intervening features may exist. A feature may be "directly connected" or "directly combined" to or to another feature in the absence of intervening features. If at least one intervening feature exists, the feature may be "indirectly connected" or "indirectly combined" to or to the other feature. A feature "on" or "in contact" another feature may be directly on or in direct contact with the other feature, or instead, one or more intervening features may exist. In the absence of intervening features, the feature may be "directly on" or in "direct contact" with the other feature. If at least one intervening feature exists, the feature may be "indirectly on" or in "indirect contact" with the other feature. Different features can be "overlapped" when a feature extends over another feature through direct or indirect contact and covers a portion of that other feature.

[0041] Although the descriptions of various embodiments of the present invention are provided for illustrative purposes, they are not intended to be comprehensive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terms used herein are chosen to best describe the principles of the embodiments, practical applications of technologies found in the market, or technical improvements, or to enable those skilled in the art to understand the embodiments disclosed herein.

Claims

Claim 1 A structure comprising: a photonics chip including a substrate and a cavity in the substrate; a laser chip inside the cavity; and a lead frame including a first section attached to a first portion of the laser chip and a second section attached to a first portion of the photonics chip, wherein the lead frame further comprises an upright section protruding upward in a direction away from the photonics chip and the laser chip. Claim 2 A structure according to claim 1, wherein the laser chip comprises a first surface and a second surface opposite to the first surface, the first section of the lead frame is attached to a first portion of the laser chip at the first surface, the cavity comprises a bottom portion and a plurality of side walls extending to the bottom portion, and the second surface of the laser chip is adjacent to the bottom portion of the cavity. Claim 3 In paragraph 2, the second surface of the laser chip is structured to be in contact with the lowest part of the cavity or spaced apart from the lowest part of the cavity. Claim 4 In claim 1, the structure is such that the cavity is a through hole penetrating the photonics chip. Claim 5 A structure according to any one of claims 1 to 4, wherein the first portion of the laser chip is a landing pad, and further comprises a plurality of interconnected portions extending from the landing pad to a first section of the lead frame. Claim 6 A structure according to any one of claims 1 to 4, wherein the laser chip comprises a semiconductor laser having an optical output, the photonics chip comprises an edge coupler, and the cavity has a depth that allows the optical output to be aligned with the edge coupler. Claim 7 A structure according to any one of claims 1 to 4, wherein the first portion of the photonics chip is a pad, and further comprises a solder joint configured to attach the second section of the lead frame to the pad of the photonics chip. Claim 8 A structure comprising, in any one of claims 1 to 4, an adhesive configured to attach a second section of the lead frame to a first part of the photonics chip; and a wire attached to the second section of the lead frame by a wire bond. Claim 9 A structure according to any one of claims 1 to 4, wherein the first section and the second section of the lead frame are disposed outside the cavity. Claim 10 A structure according to any one of claims 1 to 4, wherein the upright section is connected to the first section of the lead frame by a bend or is connected to the second section of the lead frame by a bend, and the second section of the lead frame is positioned between the first section of the lead frame and the upright section of the lead frame. Claim 11 A structure according to any one of claims 1 to 4, wherein the lead frame comprises a third section attached to a second part of the laser chip and a fourth section attached to a second part of the photonics chip. Claim 12 A method comprising the steps of: attaching a lead frame to a laser chip; grasping a first upright section of the lead frame with a pick and place tool; grasping a second upright section of the lead frame with the pick and place tool; and placing the laser chip inside a cavity in a substrate of a photonics chip with the pick and place tool. Claim 13 A method according to claim 12, further comprising: a step of supplying energy to a semiconductor laser of the laser chip using the picking and placement tool to emit light while the laser chip is inside the cavity; and a step of aligning the light emitted from the semiconductor laser of the laser chip with an edge coupler of the photonics chip using the picking and placement tool while the semiconductor laser is receiving energy. Claim 14 A method according to claim 12 or 13, further comprising the step of attaching the lead frame to the photonics chip after the laser chip is inside the cavity. Claim 15 A method comprising the steps of: forming a cavity in a substrate of a photonics chip; attaching a first section of a lead frame and a portion of a laser chip; and attaching a second section of the lead frame to a portion of the photonics chip, wherein the laser chip is disposed inside the cavity when the second section of the lead frame is attached to the portion of the photonics chip, and the lead frame further comprises an upright section protruding upward in a direction away from the photonics chip and the laser chip. Claim 16 In paragraph 5, the laser chip comprises a semiconductor laser, and the landing pad is coupled to the semiconductor laser, forming a structure. Claim 17 A structure according to claim 11, wherein the laser chip comprises a semiconductor laser, the first portion of the laser chip is a first landing pad coupled to the semiconductor laser, and the second portion of the laser chip is a second landing pad coupled to the semiconductor laser. Claim 18 delete Claim 19 delete Claim 20 delete

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