Display panel and metal mask manufacturing the same

Abstract

A pixel circuit comprising at least one thin-film transistor and a unit pixel group connected to the pixel circuit, wherein the unit pixel group comprises four first color light-emitting patterns, two second color light-emitting patterns having different shapes from each other, and two third color light-emitting patterns having different shapes from each other, wherein the first to third color light-emitting patterns each display different colors from each other, and the first color light-emitting patterns include two first color first light-emitting patterns having the same shape from each other, and first color second light-emitting patterns having the same shape from each other and having a shape different from the first color first light-emitting patterns.

Description

Technology Field

[0001] The present invention relates to a display panel and a metal mask for manufacturing the same, and more specifically, to a display panel including an organic pattern and a metal mask for manufacturing the same. Background Technology

[0002] Generally, in a light-emitting display device, a light-emitting element is placed in each pixel. The light-emitting element includes a light-emitting layer placed between two electrodes. The light-emitting layers placed in the pixels can be divided into multiple groups.

[0003] A mask assembly is used to deposit multiple groups of light-emitting layers on a working substrate. The mask assembly includes a frame, a support stick, and a mask. Patterned light-emitting layers can be formed by placing the working substrate on the mask and then depositing a light-emitting material onto the working substrate. The problem to be solved

[0004] The purpose of the present invention is to provide a metal mask with minimized deformation due to stress and a display panel formed using the same. means of solving the problem

[0005] A display panel according to one embodiment of the present invention includes a pixel circuit comprising at least one thin-film transistor and a unit pixel group connected to the pixel circuit, wherein the unit pixel group includes four first color light-emitting patterns, two second color light-emitting patterns having different shapes from each other, and two third color light-emitting patterns having different shapes from each other, wherein the first to third color light-emitting patterns each display different colors from each other, and the first color light-emitting patterns include two first color first light-emitting patterns having the same shape from each other, and first color second light-emitting patterns having the same shape from each other and having a shape different from the first color first light-emitting patterns.

[0006] Each of the first to third color light emission patterns above may have a triangular shape.

[0007] The first color first light emission patterns are arranged along a first direction, and the first color first light emission patterns and the first color second light emission patterns are spaced apart from each other in a second direction that intersects the first direction, and the first color first light emission patterns and the first color second light emission patterns may have a line-symmetric shape with respect to a symmetry axis parallel to the second direction.

[0008] The second color light emission patterns may have a shape that is line-symmetric with respect to a symmetry axis parallel to the second direction.

[0009] The above third color light emission patterns may have a shape that is line-symmetric with respect to a symmetry axis parallel to the above second direction.

[0010] The above triangle may be a right triangle having a base extended along a first direction and a height extended along a second direction intersecting the first direction.

[0011] The second color light emission patterns may include a second color first light emission pattern disposed between the first color first light emission patterns, and a second color second light emission pattern disposed between the first color second light emission patterns.

[0012] The above second color first light emission pattern and the above second color second light emission pattern may have a line-symmetric shape with respect to a symmetry axis extended along a direction parallel to the above second direction.

[0013] The above third color light emission patterns include a third color first light emission pattern spaced apart from the second color first light emission pattern in the first direction, and a third color second light emission pattern spaced apart from the second color first light emission pattern in the second direction, wherein the second color first light emission pattern has the same shape as the third color first light emission pattern and may have a different shape from the third color second light emission pattern.

[0014] The above second color first light-emitting pattern may have a shape corresponding to the shape of the above third color second light-emitting pattern rotated 90 degrees counterclockwise.

[0015] The above second color first light-emitting pattern may have a shape corresponding to the shape of the above third color second light-emitting pattern rotated 90 degrees clockwise.

[0016] The first color first light emission pattern and the second-1 color light emission pattern may have a shape that is symmetric with respect to a symmetry axis extended along a direction parallel to the quadrilateral.

[0017] The first color first light emission pattern and the first color second light emission pattern may have a line-symmetric shape with respect to a symmetry axis extended along a direction parallel to the first direction.

[0018] The minimum spacing between the first color light emission patterns may be 15㎛ or more.

[0019] A metal mask according to one embodiment of the present invention includes a first opening and a second opening spaced apart from the first opening in a first direction and having a shape different from the first opening, wherein each of the first opening and the second opening has a left-right asymmetrical shape, and the second opening may have the same shape as the first opening rotated 90 degrees symmetrically.

[0020] The first openings are provided in plurality and arranged along a second direction intersecting the first direction, and the second openings are provided in plurality and arranged along the second direction, and can be spaced apart from the first openings in the first direction.

[0021] The first openings are provided in plurality and arranged along a second direction intersecting the first direction, and the second openings are provided in plurality and arranged along the second direction, each spaced apart from the first openings in the first direction, and the angle formed by the first direction and the second direction may be an acute angle.

[0022] The separation distance in the second direction between the first openings may be greater than the separation distance between the first opening and the second opening adjacent to each other in the first direction.

[0023] The shape of each of the second openings above may correspond to the shape obtained by rotating each of the first openings 90 degrees counterclockwise.

[0024] The shape of each of the second openings above may correspond to the shape obtained by rotating each of the first openings 90 degrees clockwise.

[0025] Each of the first opening and the second opening may correspond to a right-angled triangle shape with rounded vertices.

[0026] The radius of curvature of the above vertex may be 8㎛ or more.

[0027] The minimum gap between the first opening and the second opening may be 15㎛ or more.

[0028] Each of the first opening and the second opening has a quadrilateral, and the quadrilateral of the first opening and the quadrilateral of the second opening may extend along different directions. Effects of the invention

[0029] According to the present invention, a metal mask with improved reliability can be provided.

[0030] In addition, according to the present invention, the process reliability of the display panel can be improved. Brief explanation of the drawing

[0031] FIGS. 1a and FIGS. 1b are perspective views of an electronic device according to one embodiment of the present invention. FIG. 2a is an exploded perspective view of an electronic device according to one embodiment of the present invention. FIG. 2b is a block diagram of an electronic device according to one embodiment of the present invention. FIG. 3a is a plan view of a display module according to one embodiment of the present invention. FIG. 3b is a cross-sectional view showing a part of the display panel shown in FIG. 3a. Figure 4 is a cross-sectional view of the deposition equipment. Figure 5 is a perspective view of a mask assembly. FIG. 6a is a plan view illustrating a portion of a first working substrate according to one embodiment of the present invention. FIG. 6b is a cross-sectional view showing a portion of the area where a mask is bonded to a working substrate. FIG. 6c is a plan view illustrating a portion of a second working substrate according to one embodiment of the present invention. Figure 6d is a plan view showing an enlarged view of a unit pixel group. FIG. 7a is a plan view illustrating a part of a mask according to one embodiment of the present invention. FIG. 7b is a plan view showing a portion of the working substrate. FIG. 8a is a plan view illustrating a part of a mask according to one embodiment of the present invention. FIG. 8b is a plan view showing a portion of the working substrate. FIG. 9a is a plan view illustrating a part of a mask according to one embodiment of the present invention. FIG. 9b is a plan view showing a portion of the working substrate. FIG. 10a is a plan view illustrating one area of ​​a display panel according to a comparative example. FIGS. 10b and FIGS. 10c are plan views illustrating masks according to comparative examples. FIG. 11a is a plan view illustrating a region of a display panel according to one embodiment of the present invention. FIGS. 11b and FIGS. 11c are plan views illustrating masks according to an embodiment of the present invention. FIGS. 12a and FIGS. 12b are plan views showing some areas of a display panel according to one embodiment of the present invention. Specific details for implementing the invention

[0032] In this specification, where a component (or region, layer, part, etc.) is described as being "on," "connected," or "combined" with another component, it means that it may be directly placed / connected / combined with the other component, or that a third component may be placed between them.

[0033] Identical reference numerals denote identical components. Additionally, in the drawings, the thicknesses, proportions, and dimensions of the components are exaggerated for the effective illustration of the technical content.

[0034] "And / or" includes all one or more combinations that the associated configurations can define.

[0035] Terms such as "first," "second," etc., may be used to describe various components, but said components should not be limited by said terms. These terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. A singular expression includes a plural expression unless the context clearly indicates otherwise.

[0036] Additionally, terms such as "below," "lower side," "above," and "upper side" are used to describe the relationships between the components depicted in the drawings. These terms are relative concepts and are described based on the directions indicated in the drawings.

[0037] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Additionally, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and may be explicitly defined herein unless interpreted in an ideal or overly formal sense.

[0038] Terms such as "include" or "have" are intended to indicate the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0039] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0040] FIGS. 1a and FIGS. 1b are perspective views of an electronic device according to an embodiment of the present invention. FIG. 1a shows the unfolded state (or unfolded state) of the electronic device (ED), and FIG. 1b shows the folded state of the electronic device (ED).

[0041] The display surface (DS) may include a display area (DA) and a non-display area (NDA) surrounding the display area (DA). The display area (DA) may display an image (IM), and the non-display area (NDA) may not display an image (IM). The non-display area (NDA) may surround the display area (DA). However, not limited thereto, the shape of the display area (DA) and the shape of the non-display area (NDA) may be modified.

[0042] Hereinafter, the direction that intersects substantially perpendicularly with the plane defined by the first direction axis (DR1) and the second direction axis (DR2) is defined as the third direction axis (DR3). Additionally, in this specification, "on the plane" may be defined as a state viewed from the third direction axis (DR3).

[0043] A sensing area (ED-SA) may be defined within the display area (DA) of an electronic device (ED). Although one sensing area (ED-SA) is illustrated as an example in FIG. 1a, the number of sensing areas (ED-SA) is not limited thereto. A sensing area (ED-SA) may be a part of the display area (DA). Thus, the electronic device (ED) can display an image through the sensing area (ED-SA).

[0044] An electronic module may be placed in the area overlapping with the sensing area (ED-SA). The electronic module may receive external inputs transmitted through the sensing area (ED-SA) or provide outputs through the sensing area (ED-SA). For example, the electronic module may be a camera module, a distance-measuring sensor such as a proximity sensor, a sensor that recognizes a part of the user's body (e.g., fingerprint, iris, or face), or a small lamp that emits light, but is not specifically limited thereto. Below, the explanation will be based on the example where the electronic module overlapping with the sensing area (ED-SA) is a camera module.

[0045] The electronic device (ED) may include a folding region (FA) and a plurality of non-folding regions (NFA1, NFA2). The non-folding regions (NFA1, NFA2) may include a first non-folding region (NFA1) and a second non-folding region (NFA2). Within a second directional axis (DR2), the folding region (FA) may be positioned between the first non-folding region (NFA1) and the second non-folding region (NFA2). The folding region (FA) may be referred to as a foldable region, and the first and second non-folding regions (NFA1, NFA2) may be referred to as the first and second non-foldable regions.

[0046] As illustrated in FIG. 1b, the folding region (FA) can be folded with respect to a folding axis (FX) parallel to the first directional axis (DR1). When the electronic device (ED) is folded, the folding region (FA) has a predetermined curvature and radius of curvature. The first non-folding region (NFA1) and the second non-folding region (NFA2) face each other, and the electronic device (ED) can be inner-folded so that the display surface (DS) is not exposed to the outside.

[0047] In one embodiment of the present invention, the electronic device (ED) may be out-folded so that the display surface (DS) is exposed to the outside. In one embodiment of the present invention, the electronic device (ED) may be configured such that in-folding or out-folding operations are alternately repeated from an unfolding operation, but is not limited thereto. In one embodiment of the present invention, the electronic device (ED) may be configured to select any one of an unfolding operation, an in-folding operation, and an out-folding operation.

[0048] Although a foldable electronic device (ED) is described as an example in FIGS. 1a and 1b, the application of the present invention is not limited to a foldable electronic device (ED). For example, the present invention may be applied to a rigid electronic device, for example, an electronic device that does not include a folding region (FA).

[0050] FIG. 2a is an exploded perspective view of an electronic device according to one embodiment of the present invention. FIG. 2b is a block diagram of an electronic device according to one embodiment of the present invention.

[0051] Referring to FIGS. 2a and 2b, the electronic device (ED) may include a display module (DM), a window (WM), a first electronic module (EM1), a second electronic module (EM2), a power supply module (PM), and a housing (EDC1, EDC2). Although not separately illustrated, the electronic device (ED) may further include a mechanical structure for controlling the folding operation of the display module (DM).

[0052] The display module (DM) generates an image and detects external input. The display module (DM) includes a display area (DP-DA) and a non-display area (DP-NDA) corresponding to the display area (DA, FIG. 1a) and non-display area (NDA, FIG. 1a), respectively, of the electronic device (ED). In this specification, “areas / parts correspond to areas / parts” means that they overlap and are not limited to the same area.

[0053] The display area (DP-DA) may include a first area (A1) and a second area (A2). The first area (A1) may overlap with or correspond to the sensing area (ED-SA, FIG. 1a) of the electronic device (ED). In this embodiment, the first area (A1) is depicted as a circular shape, but it may have various shapes such as a polygon, an ellipse, a shape with at least one curved side, or an irregular shape, and is not limited to any one embodiment. The first area (A1) may be referred to as a component area, and the second area (A2) may be referred to as a main display area or a general display area.

[0054] The first region (A1) may have a higher transmittance than the second region (A2). Additionally, the resolution of the first region (A1) may be lower than the resolution of the second region (A2). The first region (A1) may overlap with the camera module (CMM) described later.

[0055] The display module (DM) may include a display panel (DP), a driving circuit (DIC), and a circuit board (FCB). The display panel (DP), the driving circuit (DIC), and the circuit board (FCB) are electrically connected. Referring to FIG. 2b, the display panel (DP) may include a display layer (100) and a sensor layer (200).

[0056] The display layer (100) may be a configuration that substantially generates an image. The display layer (100) may be a light-emitting display layer, for example, the display layer (100) may be an organic light-emitting display layer, an inorganic light-emitting display layer, an organic-inorganic light-emitting display layer, a quantum dot display layer, a micro LED display layer, or a nano LED display layer.

[0057] The sensor layer (200) can detect external input applied from the outside. The external input may be user input. The user input may include various forms of external input such as a part of the user's body, light, heat, a pen, or pressure.

[0058] The driving circuit (DIC) may be mounted on the display panel (DP) in the form of a chip. However, this is illustrated as an example, and the driving circuit (DIC) may be formed through the same process as the pixels of the display area (DP-DA) and provided as a component of the display panel (DP).

[0059] In this embodiment, the driving circuit (DIC) may be placed on the non-display area (DP-NDA). However, this is illustrated as an example, and the driving circuit (DIC) may be placed on the display area (DP-DA) and overlap with the pixels described later on a plane, and is not limited to any one embodiment.

[0060] The driving circuit (DIC) may include driving elements for driving pixels of the display panel (DP), such as a data driving circuit. Meanwhile, although FIG. 2a illustrates a structure in which the driving circuit (DIC) is mounted on the display panel (DP), the present invention is not limited thereto. For example, the driving circuit (DIC) may be mounted on a circuit board (FCB).

[0061] The circuit board (FCB) can be connected to a display panel (DP). The circuit board (FCB) can be attached to the display panel (DP) via a conductive adhesive film (ACF) or electrically connected to the display panel (DP) via ultrasonic connection. The circuit board (FCB) can be provided in a flexible form (FPCB) or a rigid form (PCB) and is not limited to either embodiment.

[0062] The power supply module (PM) supplies the power required for the overall operation of the electronic device (ED). The power supply module (PM) may include a conventional battery module.

[0063] The first electronic module (EM1) and the second electronic module (EM2) include various functional modules for operating the electronic device (ED). Each of the first electronic module (EM1) and the second electronic module (EM2) may be directly mounted on a motherboard electrically connected to a display panel (DP) or mounted on a separate board and electrically connected to the motherboard through a connector (not shown), etc.

[0064] The first electronic module (EM1) may include a control module (CTM), a wireless communication module (TM), an image input module (IIM), an audio input module (AIM), a memory (MM), and an external interface (IF).

[0065] The control module (CTM) controls the overall operation of the electronic device (ED). The control module (CTM) may be a microprocessor. For example, the control module (CTM) enables or disables the display panel (DP). The control module (CTM) may control other modules, such as the image input module (IIM) or the audio input module (AIM), based on touch signals received from the display panel (DP).

[0066] The wireless communication module (TM) can communicate with an external electronic device through a first network (e.g., a short-range communication network such as Bluetooth, WiFi Direct, or IrDA (infrared data association)) or a second network (e.g., a long-range communication network such as a cellular network, the Internet, or a computer network (e.g., LAN or WAN)). The communication modules included in the wireless communication module (TM) may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (TM) can transmit and receive voice signals using a standard communication line. The wireless communication module (TM) may include a transmitter (TM1) that modulates and transmits a signal to be transmitted, and a receiver (TM2) that demodulates a received signal.

[0067] The video input module (IIM) processes video signals and converts them into video data that can be displayed on the display panel (DP). The audio input module (AIM) receives external audio signals via a microphone in recording mode, voice recognition mode, etc., and converts them into electrical audio data.

[0068] The external interface (IF) may include a connector capable of physically connecting the electronic device (ED) and an external electronic device. For example, the external interface (IF) serves as an interface connected to an external charger, wired / wireless data port, card socket (e.g., memory card, SIM / UIM card), etc.

[0069] The second electronic module (EM2) may include an acoustic output module (AOM), a light-emitting module (LTM), a light-receiving module (LRM), and a camera module (CMM), etc. The acoustic output module (AOM) converts acoustic data received from the wireless communication module (TM) or acoustic data stored in the memory (MM) and outputs it externally.

[0070] The light-emitting module (LTM) generates and outputs light. The light-emitting module (LTM) can output infrared light. The light-emitting module (LTM) may include an LED element. The light-receiving module (LRM) can detect infrared light. The light-receiving module (LRM) may be activated when infrared light above a predetermined level is detected. The light-receiving module (LRM) may include a CMOS sensor. After the infrared light generated by the light-emitting module (LTM) is output, it is reflected by an external object (e.g., a user's finger or face), and the reflected infrared light may be incident on the light-receiving module (LRM).

[0071] The camera module (CMM) can capture still images and video. Multiple camera modules (CMMs) may be provided. Some of the camera modules (CMMs) may overlap with the first area (A1). An external input (e.g., light) may be provided to the camera module (CMM) through the first area (A1). For example, the camera module (CMM) may receive natural light through the first area (A1) to capture an external image.

[0072] The housing (EDC1, EDC2) accommodates a display module (DM), first and second electronic modules (EM1, EM2), and a power supply module (PM). The housing (EDC1, EDC2) protects the components accommodated in the housing (EDC1, EDC2), such as the display module (DM), the first and second electronic modules (EM1, EM2), and the power supply module (PM). FIG. 2a illustrates two separate housings (EDC1, EDC2) as an example but is not limited thereto. Although not illustrated, the electronic device (ED) may further include a hinge structure for connecting the two housings (EDC1, EDC2). The housing (EDC1, EDC2) may be coupled with a window (WM).

[0074] FIG. 3a is a plan view of a display module according to an embodiment of the present invention. FIG. 3b is a cross-sectional view showing a part of the display panel shown in FIG. 3a. Hereinafter, the present invention will be described with reference to FIG. 3a and FIG. 3b.

[0075] Referring to FIG. 3a, a display panel (DP) may include a plurality of pixels (PX). The pixels (PX) are placed in a display area (DA-DA). A scanning driver (SDV), a data driver, and an emitting driver (EDV) may be placed in a non-display area (DP-NDA). The data driver may be a part of the circuit configured in the driving circuit (DIC).

[0076] The display area (DP-DA) may include a first area (A1) and a second area (A2). The first area (A1) and the second area (A2) may be distinguished by the spacing of the pixels (PX), the size of the pixels (PX), or the presence or absence of a transparent area (TP). A detailed description of the first area (A1) and the second area (A2) will be provided later.

[0077] The display panel (DP) may include a first panel area (AA1), a bending area (BA), and a second panel area (AA2) defined along a second directional axis (DR2). The second panel area (AA2) and the bending area (BA) may be part of the non-display area (DP-NDA). The bending area (BA) is positioned between the first panel area (AA1) and the second panel area (AA2).

[0078] The first panel area (AA1) is an area corresponding to the display surface (DS) of FIG. 1a. The first panel area (AA1) may include a first non-folding area (NFA10), a second non-folding area (NFA20), and a folding area (FA0). The first non-folding area (NFA10), the second non-folding area (NFA20), and the folding area (FA0) correspond to the first non-folding area (NFA1), the second non-folding area (NFA2), and the folding area (FA) of FIG. 1a and FIG. 1b, respectively.

[0079] The bending area (BA) may correspond to the area that is bent when the electronic device (ED) is assembled. By having the display panel (DP) with the bending area (BA), an electronic device with a narrow bezel can be easily implemented.

[0080] The width of the bending area (BA) parallel to the first directional axis (DR1) and the width (or length) of the second panel area (AA2) may be smaller than the width (or length) of the first panel area (AA1) parallel to the first directional axis (DR1). An area with a shorter length in the direction of the bending axis can be bent more easily.

[0081] A display panel (DP) may include a plurality of pixels (PX), a plurality of scan lines (SL1-SLm), a plurality of data lines (DL1-DLn), a plurality of light emission control lines (ECL1-ECLm), first and second control lines (CSL1, CSL2), a driving voltage line (PL), and a plurality of pads (PD). Here, m and n are natural numbers. Pixels (PX) may be connected to scan lines (SL1-SLm), data lines (DL1-DLn), and light emission control lines (ECL1-ECLm).

[0082] Scan lines (SL1-SLm) can be extended along the first directional axis (DR1) and electrically connected to the scanning driver (SDV). Data lines (DL1-DLn) can be extended along the second directional axis (DR2) and electrically connected to the driver chip (DIC) via the bending region (BA). Light emission control lines (ECL1-ECLm) can be extended along the first directional axis (DR1) and electrically connected to the light emission driver (EDV).

[0083] The driving voltage line (PL) may include a portion extended along the first directional axis (DR1) and a portion extended along the second directional axis (DR2). The portion extended along the first directional axis (DR1) and the portion extended along the second directional axis (DR2) may be placed on different layers. The portion of the driving voltage line (PL) extended along the second directional axis (DR2) may extend to the second panel area (AA2) via a bending area (BA). The driving voltage line (PL) may provide a first voltage to the pixels (PX).

[0084] The first control line (CSL1) is connected to the scanning drive unit (SDV) and can be extended toward the bottom of the second panel area (AA2) via the bending area (BA). The second control line (CSL2) is connected to the light-emitting drive unit (EDV) and can be extended toward the bottom of the second panel area (AA2) via the bending area (BA).

[0085] When viewed in a planar view, the pads (PD) can be positioned adjacent to the bottom of the second panel area (AA2). The driving chip (DIC), the driving voltage line (PL), the first control line (CSL1), and the second control line (CSL2) can be electrically connected to the pads (PD). The circuit board (FCB) can be electrically connected to the pads (PD) through an anisotropic conductive adhesive layer.

[0086] Referring to FIG. 3b, the display panel (DP) may include a display layer (100), a sensor layer (200), and an anti-reflection layer (300). The display layer (100) may include a substrate (110), a circuit layer (120), a light-emitting element layer (130), and an encapsulation layer (140).

[0087] The substrate (110) may include a plurality of layers (111, 112, 113, 114). For example, the substrate (110) may include a first sub-base layer (111), a first intermediate barrier layer (112), a second intermediate barrier layer (113), and a second sub-base layer (114). The first sub-base layer (111), the first intermediate barrier layer (112), the second intermediate barrier layer (113), and the second sub-base layer (114) may be stacked sequentially along a third direction axis (DR3).

[0088] Each of the first sub-base layer (111) and the second sub-base layer (114) may comprise at least one of a polyimide resin, an acrylate resin, a methacrylate resin, a polyisoprene resin, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a siloxane resin, a polyamide resin, and a perylene resin. Meanwhile, in this specification, ""-based resin means that it includes a functional group of "". The barrier layer (BR) may be disposed on the substrate (110).

[0089] Each of the first and second intermediate barrier layers (112, 113) may include an inorganic material. Each of the first and second intermediate barrier layers (112, 113) may include at least one of silicon oxide, silicon nitride, silicon oxynitride, and amorphous silicon. For example, each of the first and second sub-base layers (111, 114) may include polyimide, the first intermediate barrier layer (112) may include silicon oxynitride (SiON), and the second intermediate barrier layer (113) may include silicon oxide (SiOX).

[0090] That is, the refractive index of the first intermediate barrier layer (112) may have a value between the refractive index of the first sub-base layer (111) and the refractive index of the second intermediate barrier layer (113). As the difference in refractive index between the layers in contact with each other decreases, reflection at the interface between the layers in contact with each other may be reduced. However, this is described by way of example, and each of the layers may be composed of various materials and is not limited to any one embodiment.

[0091] The thickness of the first sub-base layer (111) may be thicker than the thickness of the second sub-base layer (114), but is not limited thereto. The thickness of the first intermediate barrier layer (112) may be thinner than the thickness of the second intermediate barrier layer (113). However, the thickness of each of the first and second intermediate barrier layers (112, 113) is not limited thereto.

[0092] The circuit layer (120) may include a pixel circuit (PC) and a plurality of insulating layers (BR, BF, 10 to 80). The insulating layers (BR, BF, 10 to 80) may include a barrier layer (BR), a buffer layer (BF), and first to eighth insulating layers (10 to 80) arranged along a third direction (D3).

[0093] The pixel circuit (PC) may include a light-blocking layer (BML), a plurality of thin-film transistors (S-TFT, O-TFT), and a capacitor (Cst). The pixel circuit (PC) forms the pixel (PX) described above together with a light-emitting element (LD). The pixel (PX) may include a plurality of thin-film transistors (S-TFT, O-TFT) and a light-emitting element (LD). In FIG. 3b, for ease of explanation, two thin-film transistors (S-TFT, hereinafter the first thin-film transistor, O-TFT, hereinafter the second thin-film transistor) among the thin-film transistors (S-TFT, O-TFT) are illustrated as examples, but the pixel (PX) may include various numbers of thin-film transistors and is not limited to any one embodiment.

[0094] A barrier layer (BR) may be disposed on a substrate (110). The barrier layer (BR) may include a first sub-barrier layer (BR1) disposed on the substrate (110) and a second sub-barrier layer (BR2) disposed on the first sub-barrier layer (BR1).

[0095] Each of the first and second sub-barrier layers (BR1, BR2) may include an inorganic material. Each of the first and second sub-barrier layers (BR1, BR2) may include at least one of silicon oxide, silicon nitride, silicon oxynitride, and amorphous silicon. For example, the first sub-barrier layer (BR1) may include silicon oxynitride (SiON), and the second sub-barrier layer (BR2) may include silicon oxide (SiOX).

[0096] The refractive index of the first sub-barrier layer (BR1) may have a value between the refractive index of the second sub-base layer (114) and the refractive index of the second sub-barrier layer (BR2). As the difference in refractive index between the layers in contact with each other decreases, reflection at the interface between the layers in contact with each other may be reduced. As a result, the transmittance of light passing through the transmission region (TP) may be improved. However, this is described as an example, and each of the first and second sub-barrier layers (BR1, BR2) may include various materials and is not limited to any one embodiment.

[0097] A light-shielding layer (BML) may be placed on a barrier layer (BR). The light-shielding layer (BML) may include, but is not particularly limited to, molybdenum (Mo), an alloy containing molybdenum, silver (Ag), an alloy containing silver, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), titanium (Ti), p+-doped amorphous silicon, and MoTaOx. The light-shielding layer (BML) may be referred to as a back metal layer or a back layer.

[0098] The light-blocking layer (BML) may include a first light-blocking layer (BMLa) and a second light-blocking layer (BMLb) disposed on different layers. Each of the first light-blocking layer (BMLa) and the second light-blocking layer (BMLb) blocks light incident on the first and second thin-film transistors (S-TFT, O-TFT) from the back surface of the substrate (110), respectively. Accordingly, defects such as deformation of the characteristics of the first and second thin-film transistors (S-TFT, O-TFT) or the generation of noise signals caused by light can be prevented.

[0099] The first light-blocking layer (BMLa) may be disposed on the first sub-barrier layer (BR1) and within the second sub-barrier layer (BR2). That is, the first light-blocking layer (BMLa) is formed after forming a portion of the thickness direction of the second sub-barrier layer (BR2), and the remaining portion of the thickness direction of the second sub-barrier layer (BR2) may cover the first light-blocking layer (BMLa). However, this is illustrated as an example, and if the first light-blocking layer (BMLa) is disposed below the thin-film transistor (S-TFT), it may be disposed below or above the second sub-barrier layer (BR2), and is not limited to any one embodiment.

[0100] A buffer layer (BF) is disposed on a barrier layer (BR). The buffer layer (BF) can prevent metal atoms or impurities from the substrate (110) from diffusing into the semiconductor pattern of the thin-film transistor (S-TFT). Additionally, the buffer layer (BF) can control the rate of heat supply during the crystallization process for forming the first semiconductor pattern, thereby ensuring that the semiconductor pattern of the thin-film transistor (S-TFT) is formed uniformly.

[0101] The buffer layer (BF) may include a first sub-buffer layer (BF1) and a second sub-buffer layer (BF2) disposed on the first sub-buffer layer (BF1). Each of the first sub-buffer layer (BF1) and the second sub-buffer layer (BF2) may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the first sub-buffer layer (BF1) may include silicon nitride, and the second sub-buffer layer (BF2) may include silicon oxide.

[0102] Although not illustrated, a portion of the second sub-buffer layer (BF2) may be removed from the first region (A1). Accordingly, the thickness of the portion of the second sub-buffer layer (BF2) placed in the device region (EP) may be greater than the thickness of the portion of the second sub-buffer layer (BF2) placed in the first region (A1). However, this is described by way of example, and the second sub-buffer layer (BF2) may be provided with a uniform thickness over the entire area of ​​the first region (A1) and the second region (A2), and is not limited to any one embodiment.

[0103] The insulating layers (10 to 80) may include a plurality of inorganic insulating layers. In one embodiment, at least some of the first insulating layer (10) to the fifth insulating layer (50) sequentially stacked on the buffer layer (BF) may be inorganic insulating layers. For example, the first insulating layer (10) to the fifth insulating layer (50) may all be inorganic insulating layers.

[0104] A first thin-film transistor (S-TFT) is disposed on a buffer layer (BF). The first thin-film transistor (S-TFT) may include a first gate (GT1), a first source (SE1), a first drain (DE1), and a first channel (AC1). The first source (SE1), the first drain (DE1), and the first channel (AC1) may form a single semiconductor pattern (hereinafter referred to as the first semiconductor pattern).

[0105] The first semiconductor pattern may be placed on a buffer layer (BF). The first semiconductor pattern may include a silicon semiconductor. For example, the silicon semiconductor may include amorphous silicon, polycrystalline silicon, etc. For example, the first semiconductor pattern may include low-temperature polysilicon.

[0106] Meanwhile, FIG. 3b illustrates only a portion of the first semiconductor pattern disposed on the buffer layer (BF), and the first semiconductor pattern may be further disposed in other areas. The first semiconductor pattern may be arranged according to a specific rule across the pixels. The electrical properties of the first semiconductor pattern may differ depending on whether it is doped. The first semiconductor pattern may include a first region with high conductivity and a second region with low conductivity. The first region may be doped with an N-type dopant or a P-type dopant. A P-type transistor may include a doped region doped with a P-type dopant, and an N-type transistor may include a doped region doped with an N-type dopant. The second region may be a non-doped region or a region doped at a lower concentration compared to the first region.

[0107] The conductivity of the first region is greater than the conductivity of the second region, and the first region may be the source or drain region of the first thin-film transistor (S-TFT), or may substantially function as an electrode or signal line. The second region may correspond to the active region (or channel) of the first thin-film transistor (S-TFT).

[0108] In this embodiment, the first source (SE1) and the first drain (DE1) may each be a first region, and the first channel (AC1) may be a second region. However, this is illustrated as an example, and the first source (SE1) and the first drain (DE1) may be provided as separate electrodes separated from the first channel (AC1) and connected to the first semiconductor pattern, and is not limited to any one embodiment.

[0109] A first gate (GT1) is placed on a first insulating layer (10). The first gate (GT1) may be part of a metal pattern. The first gate (GT1) overlaps with a first channel (AC1). In a process of doping a first semiconductor pattern, the first gate (GT1) may function as a mask. The first gate (GT1) may include titanium (Ti), silver (Ag), a silver-containing alloy, molybdenum (Mo), a molybdenum-containing alloy, aluminum (Al), an aluminum-containing alloy, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), indium tin oxide (ITO), indium zinc oxide (IZO), etc., but is not particularly limited thereto.

[0110] The second insulating layer (20) is disposed on the first insulating layer (10) and can cover the first gate (GT1). The second insulating layer (20) may be an inorganic layer and may have a single layer or a multilayer structure. The second insulating layer (20) may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. In this embodiment, the second insulating layer (20) may have a multilayer structure including a silicon oxide layer and a silicon nitride layer.

[0111] A third insulating layer (30) may be placed on top of a second insulating layer (20). The third insulating layer (30) may be an inorganic layer and may have a single-layer or multi-layer structure. For example, the third insulating layer (30) may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer. A second electrode (CE2) of a storage capacitor (Cst) may be placed between the second insulating layer (20) and the third insulating layer (30). Additionally, a first electrode (CE1) of a storage capacitor (Cst) may be placed between the first insulating layer (10) and the second insulating layer (20).

[0112] The second light-blocking layer (BMLb) may be placed on the second insulating layer (20) and covered by the third insulating layer (30). The second light-blocking layer (BMLb) may be placed on the same layer as the second electrode (CE2) and may be formed simultaneously through the same process as the second electrode (CE2). Accordingly, process costs may be reduced and the process simplified. However, this is illustrated as an example, and the second light-blocking layer (BMLb) may be placed on a different layer from the second electrode (CE2) or formed of a different material, and is not limited to any one embodiment.

[0113] The second thin-film transistor (O-TFT) is disposed on the third insulating layer (30). The second thin-film transistor (O-TFT) may include a second gate (GT2), a second source (SE2), a second drain (DE2), and a second channel (AC2). The second source (SE2), the second drain (DE2), and the second channel (AC2) may form a single semiconductor pattern (hereinafter referred to as the second semiconductor pattern).

[0114] The second semiconductor pattern may be placed on the third insulating layer (30). The second semiconductor pattern may include an oxide semiconductor. The oxide semiconductor may include a plurality of regions distinguished according to whether the metal oxide is reduced. The region where the metal oxide is reduced (hereinafter, reduced region) has greater conductivity than the region where it is not reduced (hereinafter, non-reduced region).

[0115] The reducing region is the source or drain region of the second thin-film transistor (O-TFT), or can substantially function as an electrode or signal line. The non-reducing region corresponds to the active region (or channel) of the second thin-film transistor (O-TFT).

[0116] In this embodiment, the second source (SE2) and the second drain (DE2) may each be a reducing region, and the second channel (AC2) may be a non-reducing region. However, this is illustrated as an example, and the second source (SE2) and the second drain (DE2) may be provided as separate electrodes separated from the second channel (AC2) and connected to the second semiconductor pattern, and is not limited to any one embodiment.

[0117] The fourth insulating layer (40) may be placed on the third insulating layer (30). The fourth insulating layer (40) overlaps in common with a plurality of pixels and may cover the second semiconductor pattern. The fourth insulating layer (40) may be an inorganic layer and may have a single layer or a multilayer structure. The fourth insulating layer (40) may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0118] The second gate (GT2) is placed on the fourth insulating layer (40). The gate (GT2) may be part of a metal pattern. The gate (GT2) overlaps the second channel (AC2) in a plane. In the process of doping the second semiconductor pattern, the gate (GT2) may function as a mask.

[0119] The fifth insulating layer (50) is placed on the fourth insulating layer (40) and can cover the gate (GT2). The fifth insulating layer (50) may be an inorganic layer and / or an organic layer and may have a single layer or a multilayer structure.

[0120] The first connecting electrode (CNE1) may be placed on the fifth insulating layer (50). The first connecting electrode (CNE1) may be connected to the first drain (DE1) through a contact hole penetrating the first to fifth insulating layers (10, 20, 30, 40, 50). Meanwhile, although not shown in FIG. 5b, the display panel (DP) may further include a connecting electrode defined at a position corresponding to the first connecting electrode (CNE1) and connected to the second drain (DE2) or the second source (SE2), and is not limited to any one embodiment.

[0121] Meanwhile, in this embodiment, the first thin-film transistor (S-TFT) is described as a silicon thin-film transistor and the second thin-film transistor (O-TFT) is described as an oxide thin-film transistor, but is not limited thereto; the first thin-film transistor (S-TFT) may be an oxide thin-film transistor and the second thin-film transistor (O-TFT) may be a silicon thin-film transistor. Alternatively, the first and second thin-film transistors (S-TFT, O-TFT) may be formed of the same semiconductor material. A pixel circuit (PC) according to one embodiment of the present invention can be designed with various thin-film transistors and is not limited to any one embodiment.

[0122] The circuit layer (120) may include a plurality of organic insulating layers disposed on a plurality of inorganic insulating layers. For example, at least one of the 6th to 8th insulating layers (60, 70, 80) may be an organic insulating layer.

[0123] A sixth insulating layer (60) may be placed on top of a fifth insulating layer (50). The sixth insulating layer (60) may include an organic material, for example, the sixth insulating layer (60) may include a polyimide-based resin. A second connecting electrode (CNE2) may be placed on top of the sixth insulating layer (60). The second connecting electrode (CNE2) may be connected to a first connecting electrode (CNE1) through a contact hole penetrating the sixth insulating layer (60).

[0124] The seventh insulating layer (70) is placed on the sixth insulating layer (60) and can cover the second connecting electrode (CNE2). The eighth insulating layer (80) can be placed on the seventh insulating layer (70).

[0125] Each of the sixth insulating layer (60), the seventh insulating layer (70), and the eighth insulating layer (80) may be an organic layer. In this specification, the sixth insulating layer (60) may be referred to as the first organic insulating layer, the seventh insulating layer (70) as the second organic insulating layer, and the eighth insulating layer (80) as the third organic insulating layer. For example, each of the sixth insulating layer (60), the seventh insulating layer (70), and the eighth insulating layer (80) may include general-purpose polymers such as BCB (Benzocyclobutene), polyimide, HMDSO (Hexamethyldisiloxane), polymethylmethacrylate (PMMA), or polystyrene (PS), polymer derivatives having a phenolic group, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorine polymers, p-xylene polymers, vinyl alcohol polymers, and blends thereof.

[0126] Meanwhile, at least some of the insulating layers (10, 20, 30, 40, 50, 60, 70, 80) included in the circuit layer (120) may have a predetermined opening that overlaps with the first region (A1). According to the present invention, the transmittance of the first region (A1) can be improved by removing the insulating layers that overlap with the first region (A1). However, this is described by way of example, and the buffer layer (BF), barrier layer (BR), and insulating layers (10, 20, 30, 40, 50, 60, 70, 80) may all overlap with the first region (A1) and are not limited to any one embodiment.

[0127] A light-emitting element layer (130) including a light-emitting element (LD) may be disposed on a circuit layer (120). The light-emitting element (LD) may include a pixel electrode (AE), a first functional layer (HFL), a light-emitting layer (EL), a second functional layer (EFL), and a common electrode (CE). The first functional layer (HFL), the second functional layer (EFL), and the common electrode (CE) may be provided in a single shape over the entire display area (DP-DA). However, this is illustrated as an example, and the first functional layer (HFL), the second functional layer (EFL), and the common electrode (CE) may be patterned for each pixel (PX) and are not limited to any one embodiment.

[0128] A pixel electrode (AE) may be disposed on the eighth insulating layer (80). The pixel electrode (AE) may be a (semi)transparent electrode or a reflective electrode. In one embodiment, the pixel electrode (AE) may have a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or a compound thereof, and a transparent or semitransparent electrode layer formed on the reflective layer. The transparent or semitransparent electrode layer may have at least one selected from the group comprising indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO) or indium oxide (In2O3), and aluminum-doped zinc oxide (AZO). For example, the pixel electrode (AE) may be provided as ITO / Ag / ITO.

[0129] Meanwhile, in this embodiment, the pixel electrode (AE) is shown as being connected to the first thin-film transistor (S-TFT) through the first connecting electrode (CNE1) and the second connecting electrode (CNE2). However, this is illustrated as an example, and the pixel electrode (AE) may also be connected to the second thin-film transistor (O-TFT), and is not limited to any one embodiment.

[0130] A pixel defining film (PDL) may be placed on the eighth insulating layer (80). The pixel defining film (PDL) may have the property of absorbing light, and for example, the pixel defining film (PDL) may have a black color. The pixel defining film (PDL) may include a black coloring agent. The black coloring agent may include a black dye or a black pigment. The black coloring agent may include carbon black, a metal such as chromium, or oxides thereof.

[0131] An opening (PDL-OP, hereinafter referred to as a light-emitting opening) that exposes a portion of the pixel electrode (AE) may be defined in the pixel defining film (PDL). That is, the pixel defining film (PDL) may cover the edge of the pixel electrode (AE). Additionally, the pixel defining film (PDL) may cover the side of the eighth insulating layer (80) adjacent to the transparent region (TP).

[0132] The first functional layer (HFL) may be disposed on the pixel electrode (AE) and the pixel defining layer (PDL). The first functional layer (HFL) may include a hole transport layer (HTL), a hole injection layer (HIL), or both a hole transport layer and a hole injection layer. The first functional layer (HFL) may be disposed over the entire first region (A1) and the second region (A2), and the first functional layer (HFL) may also be disposed in the transmission region (TP).

[0133] The light-emitting layer (EL) is disposed on the first functional layer (HFL) and may be disposed in an area corresponding to the light-emitting opening (PDL-OP) of the pixel defining film (PDL). The light-emitting layer (EL) may include an organic, inorganic, or organic-inorganic material that emits light of a predetermined color. The light-emitting layer (EL) may be disposed in a first area (A1) and a second area (A2). The light-emitting layer (EL) disposed in the first area (A1) may be disposed in an area spaced apart from the transmission area (TP), i.e., an element area (EP).

[0134] The second functional layer (EFL) is placed on the first functional layer (HFL) and can cover the light-emitting layer (EL). The second functional layer (EFL) may include an electron transport layer (ETL), an electron injection layer (EIL), or both an electron transport layer and an electron injection layer. The second functional layer (EFL) may be placed over the entire first region (A1) and the second region (A2), and the second functional layer (EFL) may also be placed in the transmission region (TP).

[0135] A common electrode (CE) may be disposed on a second functional layer (EFL). The common electrode (CE) may be formed as a transparent electrode layer or a translucent electrode layer. For example, the common electrode (CE) may include a thin film Ag layer that is light-transmitting.

[0136] Although not illustrated, the light-emitting element layer (130) may further include a capping layer disposed on the common electrode (CE). The capping layer may include LiF, an inorganic material, or / and an organic material. The capping layer protects the common electrode (CE) during the process of forming the encapsulation layer (140) and can improve the light extraction efficiency of the light-emitting element (LD) through index matching with the common electrode (CE).

[0137] The encapsulation layer (140) may be disposed on the light-emitting element layer (130). The encapsulation layer (140) may include sequentially stacked inorganic layers (141), organic layers (142), and inorganic layers (143), but the layers constituting the encapsulation layer (140) are not limited thereto.

[0138] Inorganic layers (141, 143) can protect the light-emitting element layer (130) from moisture and oxygen, and organic layer (142) can protect the light-emitting element layer (130) from foreign substances such as dust particles. The inorganic layers (141, 143) may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, etc. The organic layer (142) may include an acrylic-based organic layer, but is not limited thereto.

[0139] The sensor layer (200) may be placed on the display layer (100). The sensor layer (200) may be referred to as a sensor, an input detection layer, or an input detection panel. The sensor layer (200) may include a sensor base layer (210), a first sensor conductive layer (220), a sensor insulating layer (230), a second sensor conductive layer (240), and a sensor cover layer (250).

[0140] The sensor base layer (210) may be placed directly on the display layer (100). The sensor base layer (210) may be an inorganic layer comprising at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the sensor base layer (210) may be an organic layer comprising epoxy resin, acrylic resin, or imide-based resin. The sensor base layer (210) may have a single-layer structure or a multi-layer structure stacked along a third directional axis (DR3).

[0141] Each of the first sensor conductive layer (220) and the second sensor conductive layer (240) may have a single-layer structure or a multi-layer structure stacked along the third directional axis (DR3).

[0142] The single-layer conductive layer may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium zinc tin oxide (IZTO). Additionally, the transparent conductive layer may include a conductive polymer such as PEDOT, metal nanowires, graphene, etc.

[0143] The conductive layer of the multilayer structure may include metal layers. The metal layers may have a three-layer structure, for example, titanium / aluminum / titanium. The conductive layer of the multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0144] The sensor insulating layer (230) may be disposed between the first sensor conductive layer (220) and the second sensor conductive layer (240). The sensor insulating layer (230) may include an inorganic film. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0145] Alternatively, the sensor insulating layer (230) may include an organic film. The organic film may include at least one of an acrylic resin, a methacrylic resin, a polyisoprene, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a siloxane resin, a polyimide resin, a polyamide resin, and a perylene resin.

[0146] The sensor cover layer (250) is placed on the sensor insulation layer (230) and can cover the second sensor conductive layer (240). The second sensor conductive layer (240) may include a conductive pattern (240P). The sensor cover layer (250) covers the conductive pattern (240P) and can reduce or eliminate the probability of damage occurring to the conductive pattern (240P) in a subsequent process.

[0147] The sensor cover layer (250) may include an inorganic material. For example, the sensor cover layer (250) may include silicon nitride, but is not particularly limited thereto.

[0148] The anti-reflection layer (300) may be placed on the sensor layer (200). The anti-reflection layer (300) may include a segmentation layer (310), a plurality of color filters (320), and a flattening layer (330).

[0149] The dividing layer (310) may be placed overlapping the second sensor conductive layer (240). In this embodiment, the conductive pattern (240P) may correspond to the second sensor conductive layer (240). The sensor cover layer (250) may be placed between the dividing layer (310) and the second sensor conductive layer (240). The dividing layer (310) can prevent external light reflection by the second sensor conductive layer (240). The material constituting the dividing layer (310) is not particularly limited as long as it is a light-absorbing material.

[0150] The dividing layer (310) is a layer having a black color, and in one embodiment, the dividing layer (310) may include a black coloring agent. The black coloring agent may include a black dye or a black pigment. The black coloring agent may include carbon black, a metal such as chromium, or oxides thereof.

[0151] A plurality of divided openings (310-OP) may be defined in the divided layer (310). The plurality of divided openings (310-OP) may each overlap with a plurality of light-emitting layers (EL). Color filters (320) may be arranged corresponding to each of the plurality of divided openings (310-OP). The color filters (320) may transmit light provided by the light-emitting layer (EL) that overlaps with the color filters (320).

[0152] In this embodiment, at least one of the dividing layer (310) and the color filters (320) may not be placed in the first region (A1). Accordingly, the light transmittance of the first region (A1) may be improved. However, this is described by way of example, and the dividing layer (310) and the color filters (320) may be partially placed in the first region (A1) as long as they do not affect the performance of the camera module (CMM), and are not limited to any one embodiment.

[0153] The flattening layer (330) can cover the dividing layer (310) and the color filters (320). The flattening layer (330) may include an organic material and may provide a flat surface on the upper surface of the flattening layer (330). In one embodiment, the flattening layer (330) may be omitted.

[0154] Meanwhile, in a display panel (DP) according to one embodiment of the present invention, at least one of the sensor layer (200) and the anti-reflection layer (300) may be omitted, and the invention is not limited to any one embodiment.

[0156] FIG. 4 is a cross-sectional view of a deposition apparatus. FIG. 5 is a perspective view of a mask assembly. The deposition apparatus (DPA) can be used for the deposition process of the display panel (DP) of FIG. 3b, particularly the light-emitting layer (EL). The deposition apparatus (DPA) includes a deposition chamber (CB), a fixing member (CM), a deposition source (DS), and a mask assembly (MSA). Although not separately illustrated, the deposition apparatus (DPA) may further include additional machinery to implement an inline system.

[0157] The deposition chamber (CB) can set the deposition conditions to vacuum. The deposition chamber (CB) may include a bottom surface, a ceiling surface, and side walls. The bottom surface of the deposition chamber (CB) is parallel to the plane defined by the first direction axis (DR1) and the second direction axis (DR2). The normal direction of the bottom surface of the deposition chamber (CB) is indicated by the third direction axis (DR3). Hereinafter, the first to third directions are defined as the directions indicated by each of the first to third direction axes (DR1, DR2, DR3) and refer to the same reference numerals. "On a plane" as expressed below is set with respect to a plane parallel to the plane defined by the first direction axis (DR1) and the second direction axis (DR2).

[0158] A fixing member (CM) is positioned inside the deposition chamber (CB), placed on the deposition source (DS), and fixes the mask assembly (MSA). The fixing member (CM) may be installed on the ceiling surface of the deposition chamber (CB). The fixing member (CM) may include a jig or a robotic arm that holds the mask assembly (MSA).

[0159] The fixing member (CM) includes a body portion (BD) and magnetic bodies (MM) coupled to the body portion (BD). The body portion (BD) may include, but is not limited to, a plate as a basic structure for fixing the mask assembly (MSA). The magnetic bodies (MM) may be disposed on the inside or outside of the body portion (BD). The magnetic bodies (MM) can fix the mask assembly (MSA) by magnetic force.

[0160] The deposition source (DS) can evaporate a deposition material, such as a luminescent material, and emit it as deposition vapor. The deposition vapor passes through a mask assembly (MSA) and is deposited on a working substrate (WS) in a predetermined pattern.

[0161] A mask assembly (MSA) is positioned inside a deposition chamber (CB), placed on a deposition source (DS), and supports a working substrate (WS). The working substrate (WS) may include a glass substrate or a plastic substrate. The working substrate (WS) may include a polymer layer placed on a base substrate. In the latter part of the manufacturing process of the display panel, the base substrate may be removed, and the polymer layer may correspond to the base layer (BL) of FIG. 1.

[0162] The mask assembly (MSA) includes a frame (FM), a plurality of sticks (ST), and a plurality of masks (MSK). In this embodiment, a mask assembly (MSA) including one type of stick (ST) extended in the same direction is illustrated, but in one embodiment of the present invention, the mask assembly (MSA) may further include other types of sticks extended in different directions.

[0163] An opening (OP-F) is defined on the inner side of the frame (FM). The frame (FM) may have a rectangular shape in a planar view. The frame (FM) may be composed of a metallic material as its material. The frame (FM) may include, for example, nickel (Ni), nickel-cobalt alloy, nickel-iron alloy, etc. The frame (FM) may include four parts. The frame (FM) may include a first extension part (FM-1) and a second extension part (FM-2) facing each other along a first directional axis (DR1). The frame (FM) may include a third extension part (FM-3) and a fourth extension part (FM-4) facing each other along a second directional axis (DR2), each connecting the first extension part (FM-1) and the second extension part (FM-2). The first extension part (FM-1) to the fourth extension part (FM-4) may be joined by welding or the like, or may have a single integral shape.

[0164] The sticks (ST) include first to third sticks (ST1, ST2, ST3). The first to third sticks (ST1, ST2, ST3) are coupled to the frame (FM) so as to overlap the first opening (OP-F). The first to third sticks (ST1, ST2, ST3) may be coupled to coupling grooves defined in the first extension portion (FM-1) and the second extension portion (FM-2), respectively. Meanwhile, the number of sticks (ST) is not limited and may have an integral shape with the frame (FM).

[0165] The masks (MSK) are placed on the frame (FM) and the sticks (ST), extend along the second directional axis (DR2), and can be arranged along the first directional axis (DR1). As a material, the masks (MSK) may include Invar, which has a lower coefficient of thermal expansion than the frame (FM). The masks (MSK) may include, for example, nickel (Ni), nickel-cobalt alloy, nickel-iron alloy, etc.

[0166] Each of the masks (MSK) has a plurality of openings (OP-M, hereinafter mask openings) defined. Each of the masks (MSK) may include an opening region (A-OP) where the mask openings (OP-M) are defined and a non-opening region (A-NOP) adjacent to the opening region (A-OP). In this embodiment, each of the masks (MSK) may include a single opening region (A-OP) defined continuously along the second directional axis (DR2). The mask openings (OP-M) are arranged within the opening region (A-OP) in a predetermined order (or uniformly). The planar shape of the light-emitting layer (EML) may correspond to the planar shape of the mask openings (OP-M).

[0167] The masks (MSK) can be joined to the frame (FM) by welding. In the process of manufacturing the mask assembly (MSA), the masks (MSK) are welded to the frame (FM) while each mask (MSK) is tensioned along the second directional axis (DR2). The mask assembly (MSA) includes a plurality of divided masks (MSK). The masks (MSK) may experience less sagging compared to a single large mask corresponding to the frame (FM).

[0168] At this time, a tensile force is applied to each of the masks (MSK) along the second directional axis (DR2). The masks (MSK) may be subjected to deformation due to stress caused by the tensile force. According to the present invention, by designing the shape and arrangement of the mask openings (OP-M) defined in each of the masks (MSK) in a balanced manner, it is possible to prevent the tensile force from occurring locally or asymmetrically in parts of the masks (MSK). Accordingly, deformation or damage to the masks (MSK) due to stress can be prevented, and the reliability of the mask assembly (MSA) can be improved. Further details will be provided below.

[0170] FIG. 6a is a plan view illustrating a portion of a first working substrate according to an embodiment of the present invention. FIG. 6b is a cross-sectional view illustrating a portion of a working substrate to which a mask is coupled. FIG. 6c is a plan view illustrating a portion of a second working substrate according to an embodiment of the present invention. FIG. 6d is a plan view illustrating an enlarged view of a unit pixel group. The first working substrate (WS1) refers to a substrate in which a pixel defining film (PDL) and a first functional layer (HFL) are formed among the display panel (DP) shown in FIG. 3b, and for ease of explanation, the first functional layer (HFL) is omitted from the working substrate (WS1).

[0171] The second working substrate (WS2) refers to a substrate in which light-emitting patterns (EP_R, EP_G, EP_B) are formed on the first working substrate (WS1). The second working substrate (WS2) may correspond to a substrate in which the light-emitting layer (EL) is formed among the display panels (DP) shown in FIG. 3b, and the light-emitting patterns (EP_R, EP_G, EP_B) may correspond to the light-emitting layer (EL).

[0172] Meanwhile, the first working substrate (WS1) and the second working substrate (WS2) illustrated in FIGS. 6a to 6c are merely examples and are not limited thereto. Hereinafter, the present invention will be described with reference to FIGS. 6a to 6d.

[0173] FIG. 6a shows light-emitting openings (PDL-OP), and FIG. 6c shows light-emitting layers (EL) formed in each of the light-emitting openings (PDL-OP). The light-emitting openings (PDL-OP) may include a plurality of first openings (OP_G), a plurality of second openings (OP_R), and a plurality of third openings (OP_B). Each of the first openings (OP_G), second openings (OP_R), and third openings (OP_B) may have a left-right asymmetrical shape.

[0174] The light-emitting layer (EL) may include a plurality of first color light-emitting patterns (EP_G), a plurality of second color light-emitting patterns (EP_R), and a plurality of third color light-emitting patterns (EP_B). The first color light-emitting patterns (EP_G) are each positioned corresponding to the first openings (OP_G) and may correspond to a light-emitting part that emits a first color. Similarly, the second color light-emitting patterns (EP_R) are each positioned corresponding to the second openings (OP_R) and may correspond to a light-emitting part that emits a second color. The third color light-emitting patterns (EP_B) are each positioned corresponding to the third openings (OP_B) and may correspond to a light-emitting part that emits a third color.

[0175] The first to third colors may be different colors from one another. For example, in this embodiment, the first to third colors may correspond to green, red, and blue, respectively. However, this is illustrated as an example, and the first to third colors may be selected as various colors if they are different from one another, and are not limited to any one embodiment.

[0176] In FIG. 6b, for ease of explanation, three first electrodes (AE-G, AE-R, AE-B) corresponding to the first light-emitting opening (OP-G), the second light-emitting opening (OP-R), and the third light-emitting opening (OP-B) are additionally illustrated. Additionally, FIG. 6b further illustrates the previously described fixing member (CM) and the first mask (MSK1). The first mask (MSK1) may be a mask for forming first color light-emitting patterns (EP_G). Accordingly, the mask openings (OP_MG) defined in the first mask (MSK1) correspond to the first light-emitting openings (OP-G), respectively.

[0177] The first mask opening (OP-MG) of the first mask (MSK1) may have a larger area than the first light-emitting opening (OP-G). When the mask assembly (MSA) is placed inside the chamber (CB) and the first mask (MSK1) and the working substrate (WS1) are aligned, it is preferable that the first light-emitting opening (OP-G) be placed inside the first mask opening (OP-MG) of the first mask (MSK1). Likewise, when the second mask (MSK2, see FIG. 8a), which is not shown but will be described later, is fastened to the chamber (CB), it is preferable that the second light-emitting opening (OP-R) be placed inside the second mask opening (OP-MR, see FIG. 8a) of the second mask (MSK2). Likewise, when the third mask (MSK3, see FIG. 9a) described below is attached to the chamber (CB), it is preferable that the third light-emitting opening (OP-B) be positioned inside the third mask opening (OP-MB, see FIG. 9a) of the third mask (MSK3).

[0178] Referring to FIGS. 6a to 6c, first color light emission patterns (EP_G) can be formed in first light emission openings (OP-G) through a first mask (MSK1). Subsequently, second color light emission patterns (EP_R) and third color light emission patterns (EP_B) can be formed in second light emission openings (OP-R) and third light emission openings (OP-B), respectively, through corresponding masks. A detailed description thereof will be provided later.

[0179] Meanwhile, the mask (MSK1) can be supported by a spacer (SPC). Since the spacer (SPC) protrudes from the upper surface of the pixel definition film (PDL), the spacer (SPC) can prevent collision between the mask (MSK1) and the working substrate (WS1) and prevent damage to the working substrate (WS1) caused by the mask (MSK1).

[0180] Referring to FIG. 6d, a unit pixel group (UT) can be defined as comprising eight color-emitting parts. A display panel (DP) may be formed by having a plurality of unit pixel groups (UT) arranged regularly along a first direction (D1) and a second direction (D2). Meanwhile, the unit pixel group (UT) according to one embodiment of the present invention is arbitrarily set, and the number of color-emitting parts constituting the unit pixel group (UT) can be varied and is not limited to any one embodiment.

[0181] A unit pixel group (UT) may include four first color emission patterns (EP_G1, EP_G2, EP_G3, EP_G4), each having a first color; two second color emission patterns (EP_R1, EP_R2), each having a second color; and two third color emission patterns (EP_B1, EP_B2), each having a third color. The first to third colors may be different colors from each other. In this embodiment, two first color light emission patterns (EP_G1, EP_G2), one second color light emission pattern (EP_R1), and one third color light emission pattern (EP_B1) may form the first row of a unit pixel group (UT), and two first color light emission patterns (EP_G3, EP_G4), one second color light emission pattern (EP_R2), and one third color light emission pattern (EP_B2) may form the second row of a unit pixel group (UT).

[0182] The first color light emission patterns (EP_G1, EP_G2, EP_G3, EP_G4) may include first color first light emission patterns (EP_G1, EP_G2) and first color second light emission patterns (EP_G3, EP_G4). The first color first light emission patterns (EP_G1, EP_G2) have the same shape and are arranged along the first direction (D1). Meanwhile, in this embodiment, the same shape means only "identical in form" and does not include "identical in position." That is, even if they are at different positions on the plane defined by the first direction (D1) and the second direction (D2), they may have substantially the same shape if they have the same shape that overlaps each other through positional movement.

[0183] Each of the first color first light emission patterns (EP_G1, EP_G2) has a triangular shape with a base extended along the first direction (D1) and a height extended along the second direction (D2), and the vertices may have a rounded shape. In this embodiment, each of the first color first light emission patterns (EP_G1, EP_G2) generally corresponds to a right triangle and may have a shape having a predetermined curvature in the parts corresponding to each vertex.

[0184] The first color second light emission patterns (EP_G3, EP_G4) are arranged in a different row from the first color first light emission patterns (EP_G1, EP_G2). The first color second light emission patterns (EP_G3, EP_G4) are arranged spaced apart from the first color first light emission patterns (EP_G1, EP_G2) in the second direction (D2), respectively. The first color second light emission patterns (EP_G3, EP_G4) have the same shape and are arranged spaced apart from each other in the first direction (D1).

[0185] Each of the first color second light emission patterns (EP_G3, EP_G4) has a triangular shape with a base extended along the first direction (D1) and a height extended along the second direction (D2), and the vertices may have a rounded shape. In this embodiment, each of the first color second light emission patterns (EP_G3, EP_G4) generally corresponds to a right triangle and may have a shape having a predetermined curvature in the parts corresponding to each vertex.

[0186] Each of the first color light emission patterns (EP_G1, EP_G2, EP_G3, EP_G4) generally has a right-angled triangle shape having a base extended along the first direction (D1), a height extended along the second direction (D2), and a quadrilateral connecting the base and the height, and may have a shape in which the vertices have rounded surfaces. Meanwhile, in the present embodiment, the first color second light emission patterns (EP_G3, EP_G4) have a shape different from the first color first light emission patterns (EP_G1, EP_G2). In the present embodiment, a different shape means that the form is different, and does not include cases where the form is the same but only the position on the plane is different.

[0187] For example, the first color first light emission patterns (EP_G1, EP_G2) and the first color second light emission patterns (EP_G3, EP_G4) may have sides extended along different directions. Each of the sides of the first color first light emission patterns (EP_G1, EP_G2) may be extended along the second diagonal direction (S2), and each of the sides of the first color second light emission patterns (EP_G3, EP_G4) may be extended along the first diagonal direction (S1).

[0188] Specifically, each of the first color second light emission patterns (EP_G3, EP_G4) may have the same shape as the shape of each of the first color first light emission patterns (EP_G1, EP_G2) that is line-symmetric with respect to a symmetry axis parallel to the second direction (D2). That is, the shapes obtained by symmetrically shifting each of the first color first light emission patterns (EP_G1, EP_G2) about a symmetry axis parallel to the second direction (D2) may be identical to each of the first color second light emission patterns (EP_G3, EP_G4). Specifically, the first color second light emission patterns (EP_G3, EP_G4) may be identical to the first color first light emission patterns (EP_G1, EP_G2) after being line-symmetric with respect to a symmetry axis parallel to the second direction (D2).

[0189] Additionally, as each of the first color light emission patterns (EP_G1, EP_G2, EP_G3, EP_G4) generally has a right-angled triangle, each of the shapes of the first color second light emission patterns (EP_G3, EP_G4) may have the same shape as each of the first color first light emission patterns (EP_G1, EP_G2) rotated 90 degrees counterclockwise. Specifically, the first color second light emission patterns (EP_G3, EP_G4) may be the same as the first color first light emission patterns (EP_G1, EP_G2) rotated 90 degrees counterclockwise and then moved in position on a plane defined by the first direction (D1) and the second direction (D2).

[0190] The second color light emission patterns (EP_R1, EP_R2) may include a second color first light emission pattern (EP_R1) and a second color second light emission pattern (EP_R2) placed in different rows. The second color first light emission pattern (EP_R1) is placed in a first row and positioned between the first color first light emission patterns (EP_G1, EP_G2), and the second color second light emission pattern (EP_R2) is placed in a second row and positioned between the first color second light emission patterns (EP_G3, EP_G4).

[0191] Each of the second color first light emission pattern (EP_R1) and the second color second light emission pattern (EP_R2) generally has a triangular shape, but may have a rounded vertex. Each of the second color first light emission pattern (EP_R1) and the second color second light emission pattern (EP_R2) may generally have a right triangle shape having a base extended along the first direction (D1), a height extended along the second direction (D2), and a quadrilateral connecting the base and the height.

[0192] Meanwhile, the second color first light emission pattern (EP_R1) and the second color second light emission pattern (EP_R2) have different shapes from each other. For example, the second color first light emission pattern (EP_R1) and the second color second light emission pattern (EP_R2) may have sides extended along different directions. The sides of the second color first light emission pattern (EP_R1) may be extended along the second diagonal direction (S2), and the sides of the second color second light emission pattern (EP_R2) may be extended along the first diagonal direction (S1).

[0193] The second color first light emission pattern (EP_R1) includes sides facing the first color first light emission patterns (EP_G1, EP_G2), respectively. The sides of the second color first light emission pattern (EP_R1) facing the first color first light emission patterns (EP_G1, EP_G2), respectively, may form acute angles. In this embodiment, one side of the second color first light emission pattern (EP_R1) faces the left color light emission pattern (EP_G1) among the first color first light emission patterns (EP_G1, EP_G2), and the other side of the second color first light emission pattern (EP_R1) faces the right color light emission pattern (EP_G2) among the first color first light emission patterns (EP_G1, EP_G2).

[0194] The second color second light emission pattern (EP_R1) includes sides facing the first color second light emission patterns (EP_G3, EP_G4), respectively. The sides of the second color second light emission pattern (EP_R2) facing the first color second light emission patterns (EP_G3, EP_G4) may form acute angles. In this embodiment, one side of the second color second light emission pattern (EP_R2) faces the right color light emission pattern (EP_G4) among the first color second light emission patterns (EP_G3, EP_G4), and the other side of the second color second light emission pattern (EP_R2) faces the left color light emission pattern (EP_G3) among the first color second light emission patterns (EP_G3, EP_G4).

[0195] The second color first light emission pattern (EP_R1) may have the same shape as the second color second light emission pattern (EP_R2) when it is line-symmetric with respect to a symmetry axis parallel to the second direction (D2). Specifically, the second color second light emission pattern (EP_R2) may be the same as the second color first light emission pattern (EP_R1) after being line-symmetric and then moved to the first direction (D1). Additionally, the second color first light emission pattern (EP_R1) may have the same shape as the second color second light emission pattern (EP_R2) when it is rotated 90 degrees symmetrically. Specifically, the second color second light emission pattern (EP_R2) may be the same as the second color first light emission pattern (EP_R1) after being rotated 90 degrees counterclockwise and then moved to the position on a plane defined by the first direction (D1) and the second direction (D2).

[0196] The third color light emission patterns (EP_B1, EP_B2) may include a third color first light emission pattern (EP_B1) and a third color second light emission pattern (EP_B2) placed in different rows. The third color first light emission pattern (EP_B1) is placed in the first row and positioned to the right of the first color first light emission patterns (EP_G1, EP_G2), and the third color second light emission pattern (EP_B2) is placed in the second row and positioned to the left of the first color second light emission patterns (EP_G3, EP_G4). The third color first light emission pattern (EP_B1) and the third color second light emission pattern (EP_B2) may be arranged staggered from each other in the second direction (D2). Accordingly, the third color first light emission pattern (EP_B1) and the third color second light emission pattern (EP_B2) may not overlap each other when viewed from the second direction (D2).

[0197] Each of the third color first light emission pattern (EP_B1) and the third color second light emission pattern (EP_B2) generally has a triangular shape, but may have a rounded vertex. Each of the third color first light emission pattern (EP_B1) and the third color second light emission pattern (EP_B2) may generally have a right triangle shape having a base extended along the first direction (D1), a height extended along the second direction (D2), and a quadrilateral connecting the base and the height.

[0198] Meanwhile, the third color first light emission pattern (EP_B1) and the third color second light emission pattern (EP_B2) may have different shapes from each other. For example, the third color first light emission pattern (EP_B1) and the third color second light emission pattern (EP_B2) may have sides extended along different directions. The sides of the third color first light emission pattern (EP_B1) may be extended along the second diagonal direction (S2), and the sides of the third color second light emission pattern (EP_B2) may be extended along the first diagonal direction (S1).

[0199] The third color first light-emitting pattern (EP_B1) may have the same shape as the third color second light-emitting pattern (EP_B2) when symmetrical with respect to a symmetry axis parallel to the second direction (D2). Specifically, the third color second light-emitting pattern (EP_B2) may be the same as the third color first light-emitting pattern (EP_B1) after being symmetrical and then moved in position on a plane defined by the first direction (D1) and the second direction (D2) (hereinafter, on the plane). Additionally, the third color first light-emitting pattern (EP_B1) may have the same shape as the third color second light-emitting pattern (EP_B2) when rotated 90 degrees symmetrically. Specifically, the third color second light-emitting pattern (EP_B2) may be the same as the third color first light-emitting pattern (EP_B1) after being rotated 90 degrees counterclockwise and then moved in position on the plane.

[0200] The second color emission patterns (EP_R1, EP_R2) and the third color emission patterns (EP_B1, EP_B2) each have sides facing the first color emission patterns (EP_G1, EP_G2, EP_G3, EP_G4) and may have a line-symmetric relationship. In other words, through the sides of the second color emission patterns (EP_R1, EP_R2) and the third color emission patterns (EP_B1, EP_B2), the second color emission patterns (EP_R1, EP_R2) and the third color emission patterns (EP_B1, EP_B2) can face the first color emission patterns (EP_G1, EP_G2, EP_G3, EP_G4).

[0201] As described above, when each of the color emission patterns has the shape of a right triangle, each of the interior angles of the color emission patterns defined by the sides can be an acute angle. When two color emission patterns facing each other through the sides exist in a single square region, the two color emission patterns can each exist in two triangular regions divided by the diagonal crossing the square region. Two color emission patterns facing each other in a single square region can have a symmetrical relationship with equal areas.

[0202] For example, the second color first light emission pattern (EP_R1) has a side facing one of the first color first light emission patterns (EP_G1, EP_G2) (EP_G1), and has a line-symmetric shape with respect to the first color first light emission pattern (EP_G1) with respect to the axis of symmetry parallel to the direction in which the side is extended, that is, the second diagonal direction (S2). The second color second light emission pattern (EP_R2) has a side facing one of the first color second light emission patterns (EP_G3, EP_G4) (EP_G4), and has a line-symmetric relationship with the first color second light emission pattern (EP_G4) with respect to the axis of symmetry parallel to the direction in which the side is extended, that is, the first diagonal direction (S1). The second color first light emission pattern (EP_R1) and the first color first light emission pattern (EP_G1) may each exist in two triangular regions divided by the side.

[0203] The third color first light emission pattern (EP_B1) has a side facing the other one (EP_G2) among the first color first light emission patterns (EP_G1, EP_G2), and has a line-symmetric shape with respect to the first color first light emission pattern (EP_G2) with respect to the symmetry axis parallel to the direction in which the side is extended, that is, the second diagonal direction (S2). The third color second light emission pattern (EP_B2) has a side facing the other one (EP_G3) among the first color second light emission patterns (EP_G3, EP_G4), and has a line-symmetric relationship with the first color second light emission pattern (EP_G3) with respect to the symmetry axis parallel to the direction in which the side is extended, that is, the first diagonal direction (S1). The second color first light emission pattern (EP_R1) and the first color first light emission pattern (EP_G1) may each exist in two triangular regions divided by the side.

[0204] A working substrate (WS1) according to the present invention may include openings (PDL-OP) each having a right-angled triangular shape. Additionally, a working substrate (WS2) may include light-emitting patterns (EP) having a generally triangular shape corresponding to each of the openings (PDL-OP). The first color light-emitting patterns (EP_G1, EP_G2, EP_G3, EP_G4) have different shapes from each other and are arranged in two rows having rotational symmetry or line symmetry. The second color light-emitting patterns (EP_R1, EP_R2) also have different shapes from each other and are arranged in two rows having rotational symmetry or line symmetry. The third color light-emitting patterns (EP_B1, EP_B2) also have different shapes from each other and are arranged in two rows having rotational symmetry or line symmetry.

[0205] According to the present invention, light-emitting patterns constituting a single unit pixel group (UT) are provided in shapes that are symmetrical to one another, thereby allowing the openings of the mask (MSK) to be uniformly arranged across the entire area of ​​the mask (MSK). Accordingly, when the mask (MSK) is stretched, the problem of localized stress can be prevented, thereby preventing damage or deformation of the mask (MSK). A detailed explanation thereof will be provided later.

[0207] FIG. 7a is a plan view illustrating a portion of a mask according to an embodiment of the present invention. FIG. 7b is a plan view illustrating a portion of a working substrate. FIG. 8a is a plan view illustrating a portion of a mask according to an embodiment of the present invention. FIG. 8b is a plan view illustrating a portion of a working substrate. FIG. 9a is a plan view illustrating a portion of a mask according to an embodiment of the present invention. FIG. 9b is a plan view illustrating a portion of a working substrate.

[0208] FIGS. 7a, 8a, and 9a respectively illustrate masks (MSK1, MSK2, MSK3) for forming different color emission patterns, and FIGS. 7b, 8b, and 9b respectively illustrate substrates (WS1-G, WS1-R, DP-C) containing emission patterns formed sequentially by the masks (MSK1, MSK2, MSK3). Additionally, FIGS. 7a to 9b illustrate regions corresponding to FIG. 6a. Hereinafter, the present invention will be described with reference to FIGS. 7a to 9b. Meanwhile, the same reference numerals are assigned to configurations identical to those described in FIGS. 1 to 6d, and redundant descriptions are omitted.

[0209] As illustrated in FIGS. 7a and 7b, first color light emission patterns (EP_G) are formed using a first mask (MSK1). A first working substrate (WS1: see FIG. 6a) can become a primary display panel (WS1-G) through the first mask (MSK1). The primary display panel (WS1-G) may be in a state where the first color light emission patterns (EP_G) are formed on the first working substrate (WS1).

[0210] A plurality of first mask openings (OP_MG) are defined in the first mask (MSK1). Since the first color emission patterns (EP_G) have a shape substantially corresponding to the first mask openings (OP_MG), the arrangement and shape of the first mask openings (OP_MG) can correspond to the arrangement and shape of the first color emission patterns (EP_G).

[0211] Specifically, each of the first mask openings (OP_MG) may have a rounded shape at each vertex in a right-angled triangle shape having a base extended along the first direction (D1), a height extended along the second direction (D2), and a quadrilateral connecting the base and the height. The radius of curvature of each of the edges (RE1a, RE1b, RE1c) corresponding to each vertex of the first mask openings (OP_MG) may be 8 μm or more. Accordingly, the light-emitting pattern can be stably deposited in the areas corresponding to the edges (RE1a, RE1b, RE1c) without defects such as incomplete deposition.

[0212] Additionally, the minimum width between the first mask openings (OP_MG) may be 15 μm or more. For example, in this embodiment, the minimum width (W1) between adjacent first mask openings (OP_MG) in the first direction (D1) with respect to one edge may be 15 μm or more. Additionally, the minimum width (W2) between adjacent first mask openings (OP_MG) in the second direction (D2) with respect to one edge may be 15 μm or more. The minimum width is sufficient if it is a minimum spacing and is not limited to the first direction (D1) or the second direction (D2). According to the present invention, by securing the minimum width between the first mask openings (OP_MG), the processability and reliability of the first mask (MSK1) can be improved, and stable production of the first mask (MSK1) can be made possible.

[0213] The four first mask apertures (OP_MG1, OP_MG2, OP_MG3, OP_MG4) constituting a unit pixel group among the first mask apertures (OP_MG) can each correspond to the four first color light emission patterns (EP_G1, EP_G2, EP_G3, EP_G4) constituting a corresponding unit pixel group among the first color light emission patterns (EP_G).

[0214] Specifically, the first mask openings (OP_MG1, OP_MG2, OP_MG3, OP_MG4) may include first-1 mask openings (OP_MG1, OP_MG2) that are spaced apart from each other in the first direction (D1) and have the same shape as each other, and first-2 mask openings (OP_MG3, OP_MG4) that are spaced apart from each other in the first direction (D1) and have the same shape as each other. The first-1 mask openings (OP_MG1, OP_MG2) and the first-2 mask openings (OP_MG3, OP_MG4) may be spaced apart in the second direction (D2) to form different rows.

[0215] The first-1 mask openings (OP_MG1, OP_MG2) and the first-2 mask openings (OP_MG3, OP_MG4) may have different shapes. Specifically, each of the first-2 mask openings (OP_MG3, OP_MG4) may have the same shape as the shape of each of the first-1 mask openings (OP_MG1, OP_MG2) that is line-symmetric with respect to a symmetry axis parallel to the second direction (D2). That is, the shapes obtained by symmetrically shifting each of the first-1 mask openings (OP_MG1, OP_MG2) about a symmetry axis parallel to the second direction (D2) may be identical to each of the first-2 mask openings (OP_MG3, OP_MG4).

[0216] Additionally, each of the shapes of the first-2 mask openings (OP_MG3, OP_MG4) may correspond to the shape of each of the first-1 mask openings (OP_MG1, OP_MG2) rotated 90 degrees counterclockwise. That is, the first-2 mask openings (OP_MG3, OP_MG4) may be identical to the first-1 mask openings (OP_MG1, OP_MG2) after being rotated 90 degrees counterclockwise and then shifted in position on a plane.

[0217] As illustrated in FIGS. 8a and 8b, second color light emission patterns (EP_R) are subsequently formed using a second mask (MSK2). The first display panel (WS1-G) can become a second display panel (WS1-R) through the second mask (MSK2). The second display panel (WS1-R) may be in a state where the first color light emission patterns (EP_G) and the second color light emission patterns (EP_R) are formed on the first working substrate (WS1).

[0218] A plurality of second mask openings (OP_MR) are defined in the second mask (MSK2). Since the second color emission patterns (EP_R) have a shape substantially corresponding to the second mask openings (OP_MR), the arrangement and shape of the second mask openings (OP_MR) can correspond to the arrangement and shape of the second color emission patterns (EP_R).

[0219] Specifically, each of the second mask openings (OP_MR) may have a rounded shape at each vertex in a right-angled triangle shape having a base extended along the first direction (D1), a height extended along the second direction (D2), and a quadrilateral connecting the base and the height. The radius of curvature of each of the edges (RE2a, RE2b, RE2c) corresponding to each vertex of the second mask openings (OP_MR) may be 8 μm or more. Accordingly, the light-emitting pattern can be stably deposited in the areas corresponding to the edges (RE2a, RE2b, RE2c) without defects such as incomplete deposition.

[0220] The minimum width between the second mask openings (OP_MR) may be 15 μm or more. For example, in this embodiment, the minimum width between the two closest second mask openings (OP_MR) may be 15 μm or more. The minimum width is sufficient if it is a minimum spacing and is not limited to the first direction (D1) or the second direction (D2). According to the present invention, by securing the minimum width between the second mask openings (OP_MR), the processability and reliability of the second mask (MSK2) can be improved, and stable production of the second mask (MSK2) can be made possible.

[0221] Among the second mask apertures (OP_MR), two second mask apertures (OP_MR1, OP_MR2) constituting a unit pixel group can each correspond to two second color light emission patterns (EP_R1, EP_R2) constituting a corresponding unit pixel group among the second color light emission patterns (EP_R).

[0222] Specifically, the second mask openings (OP_MR1, OP_MR2) may include a second-1 mask opening (OP_MR1) and a second-2 mask opening (OP_MR2) that form different rows and have different shapes. The second-1 mask opening (OP_MR1) and the second-2 mask opening (OP_MR2) have sides that extend in different directions. The side of the second-1 mask opening (OP_MR1) extends along the second diagonal direction (S2), and the side of the second-2 mask opening (OP_MR2) extends along the first diagonal direction (S1).

[0223] The 2-1 mask opening (OP_MR1) and the 2-2 mask opening (OP_MR2) may have the same shape as a shape that is line-symmetric with respect to a symmetry axis parallel to the 2-direction (D2). Additionally, the 2-2 mask opening (OP_MR2) may have a relationship that is 90 degrees rotationally symmetric with respect to the 2-1 mask opening (OP_MR1) in a counterclockwise direction.

[0224] As shown in FIGS. 9a and 9b, third color light emission patterns (EP_B) are subsequently formed using a third mask (MSK3). The secondary display panel (WS1-R) can become a second working substrate (WS2) through the third mask (MSK3).

[0225] A plurality of third mask openings (OP_MB) are defined in the third mask (MSK3). Since the third color emission patterns (EP_B) have a shape substantially corresponding to the third mask openings (OP_MB), the arrangement and shape of the third mask openings (OP_MB) can correspond to the arrangement and shape of the third color emission patterns (EP_B).

[0226] Specifically, each of the third mask openings (OP_MB) may have a rounded shape at each vertex in a right-angled triangle shape having a base extended along the first direction (D1), a height extended along the second direction (D2), and a quadrilateral connecting the base and the height. The radius of curvature of each of the edges (RE3a, RE3b, RE3c) corresponding to each vertex of the third mask openings (OP_MB) may be 8 μm or more. Accordingly, the light-emitting pattern can be stably deposited in the areas corresponding to the edges (RE3a, RE3b, RE3c) without defects such as incomplete deposition.

[0227] The minimum width between the third mask openings (OP_MB) may be 15 μm or more. For example, the minimum width between the two closest third mask openings (OP_MB) may be 15 μm or more. The minimum width is sufficient if it is a minimum spacing and is not limited to the first direction (D1) or the second direction (D2). According to the present invention, by securing the minimum width between the third mask openings (OP_MB), the processability and reliability of the third mask (MSK3) can be improved, and stable production of the third mask (MSK3) can be made possible.

[0228] Two third mask apertures (OP_MB1, OP_MB2) constituting a unit pixel group among the third mask apertures (OP_MB) can each correspond to two third color light emission patterns (EP_B1, EP_B2) constituting a corresponding unit pixel group among the third color light emission patterns (EP_B).

[0229] Specifically, the third mask openings (OP_MB1, OP_MB2) may include a third-1 mask opening (OP_MB1) and a third-2 mask opening (OP_MB2) that form different rows and have different shapes. The second-1 mask opening (OP_MB1) and the third-2 mask opening (OP_MB2) have sides that extend in different directions. The side of the third-1 mask opening (OP_MB1) extends along the second diagonal direction (S2), and the side of the third-2 mask opening (OP_MB2) extends along the first diagonal direction (S1).

[0230] The 3-1 mask opening (OP_MB1) and the 3-2 mask opening (OP_MB2) may have the same shape as a shape that is line-symmetric with respect to a symmetry axis parallel to the second direction (D2). Specifically, the 3-2 mask opening (OP_MB2) may be the same as the 3-1 mask opening (OP_MB1) after being line-symmetric and then moved in the opposite direction of the second direction (D2). Additionally, the 3-2 mask opening (OP_MB2) may have the same shape as the 3-1 mask opening (OP_MB1) rotated 90 degrees counterclockwise.

[0231] Meanwhile, in this embodiment, a second working substrate (WS2) formed in the order of a first color light emission pattern (EP_G), a second color light emission pattern (EP_R), and a third color light emission pattern (EP_B) is illustrated, but is not limited thereto. The order of formation of the first color light emission pattern (EP_G), the second color light emission pattern (EP_R), and the third color light emission pattern (EP_B) can be varied and is not limited to any one embodiment. Additionally, in this embodiment, the first color light emission pattern (EP_G), the second color light emission pattern (EP_R), and the third color light emission pattern (EP_B) are illustrated as not overlapping each other, but they may partially overlap depending on the margins of the mask openings (OP_MG, OP_MR, OP_MB). If the light-emitting openings (PDL-OP) are designed to be spaced apart from each other, the first color light-emitting pattern (EP_G), the second color light-emitting pattern (EP_R), and the third color light-emitting pattern (EP_B) in the area between the light-emitting openings (PDL-OP) may not overlap or may partially overlap each other, and are not limited to any one embodiment.

[0232] According to the present invention, even if the mask openings have an asymmetrical shape in the direction in which tensile force is applied, the arrangement of the mask openings is designed to be symmetrical to each other, thereby allowing the tensile force applied to the mask to be uniformly distributed across the entire front surface of the mask. Accordingly, by ensuring that the tensile force generated in the mask is evenly distributed across the entire area of ​​the mask, local stress caused by the tensile force can be reduced, and deformation and breakage of the mask can be minimized. As a result, the reliability of the mask itself and the manufacturing process of the display panel using it can be improved.

[0234] FIG. 10a is a plan view illustrating one area of ​​a display panel according to a comparative example. FIG. 10b and FIG. 10c are plan views illustrating masks according to a comparative example. FIG. 11a is a plan view illustrating one area of ​​a display panel according to an embodiment of the present invention. FIG. 11b and FIG. 11c are plan views illustrating masks according to an embodiment of the present invention.

[0235] In the comparative example (DP-C) shown in FIG. 10a and the example (DP-E) shown in FIG. 11a, a region corresponding to FIG. 6c is illustrated. FIG. 10b, FIG. 10c, FIG. 11b, and FIG. 11c, respectively, illustrate a state in which tensile force is applied to a work mask. Hereinafter, the present invention will be described with reference to FIG. 10a to FIG. 11c. Meanwhile, for configurations identical to those described in FIG. 1a to FIG. 9b, the same reference numerals are assigned, and redundant descriptions are omitted.

[0236] Referring to FIGS. 10a to 10c, the arrangement of eight light-emitting patterns constituting a unit pixel group (UT-C) of the comparative example (DP-C) allows light-emitting patterns of the same color to have the same shape. Four first-color light-emitting patterns (EP_GC) have the same shape, and two second-color light-emitting patterns (EP_RC) also have the same shape. Similarly, two third-color light-emitting patterns (EP_BC) have the same shape.

[0237] Correspondingly, as illustrated in FIG. 10b, the first mask openings (OP_MGC) defined in the first mask (MSK1-C) for forming the first color light emission patterns (EP_GC) may all have the same shape. Each of the first mask openings (OP_MGC) may have a triangular shape having a base extended along the first direction (D1), a height extended along the second direction (D2), and a quadrilateral extended along the second diagonal direction (S2), and may have a shape with curved vertices.

[0238] Since the shape of the first mask openings (OP_MGC) is not symmetrical with respect to the center of each first mask opening (OP_MGC), when a tensile force is applied to the first mask (MSK1-C) in a direction parallel to the first direction (D1), unbalanced stress may be applied to each of the first mask openings (OP_MGC). Accordingly, local stress imbalance occurs within the first mask (MSK1-C), and a predetermined amount of deformation (ds1) may occur in the first mask (MSK1-C). In this embodiment, the amount of deformation (ds1) may correspond to the degree of twisting of the first mask (MSK1-C) in the first direction (D1).

[0239] Likewise, referring to FIG. 10c, the second mask openings (OP_MRC) defined in the second mask (MSK2-C) for forming the second color light emission patterns (EP_RC) may all have the same shape. Each of the second mask openings (OP_MRC) may have a triangular shape having a base extended along the first direction (D1), a height extended along the second direction (D2), and a quadrilateral extended along the second diagonal direction (S2), and may have a shape with curved vertices.

[0240] Since the shape of the second mask openings (OP_MRC) is not symmetrical with respect to the center of each second mask opening (OP_MRC), when a tensile force is applied to the second mask (MSK2-C) in a direction parallel to the first direction (D1), unbalanced stress may be applied to each of the second mask openings (OP_MRC). Accordingly, local stress imbalance occurs within the second mask (MSK2-C), and a predetermined amount of deformation (ds2) may occur in the second mask (MSK2-C). In this embodiment, the amount of deformation (ds2) may correspond to the degree of twisting of the second mask (MSK2-C) in the first direction (D1).

[0241] The amount of deformation (ds2) in the second mask (MSK2-C) may be relatively smaller than the amount of deformation (ds1) in the first mask (MSK1-C). This may be because the number of mask openings (OP_MRC) defined in the second mask (MSK2-C) relative to the same area is smaller than the number of mask openings (OP_MGC) defined in the first mask (MSK1-C). That is, due to the asymmetric shape and arrangement of the mask openings (OP_MGC, OP_MRC), the tensile force applied to the masks (MSK1-C, MSK2-C) may be applied unevenly, and consequently, deformation of the masks (MSK1-C, MSK2-C) may occur.

[0242] In contrast, as illustrated in FIGS. 11a to 11c, a display panel (DP-E) according to one embodiment of the present invention can minimize deformation caused by tensile force applied to masks (MSK1, MSK2) by arranging light-emitting patterns (EP_R, EP_G, EP_B) constituting a unit pixel group (UT-E) symmetrically with respect to each other. Referring to FIG. 11b, the four first mask openings (OP-MG) constituting a unit pixel group (UT1) may have different shapes.

[0243] Specifically, the mask openings constituting different rows can be arranged in a shape that is symmetrical to one another. Accordingly, even if tensile force is generated unevenly in one row, the tensile force in the next row is generated unevenly in the opposite direction to the upper row, thereby canceling out the tensile force between the two rows. Accordingly, the tensile force applied to the entire first mask (MSK1) can be evenly distributed, so that deformation of the first mask (MSK1) due to stress can be minimized.

[0244] Likewise, referring to FIG. 11c, the two second mask openings (OP-MR) constituting the unit pixel group (UT2) may have different shapes. The two mask openings (OP-MR) constitute different rows. Accordingly, even if tensile force is skewed to one side in one row, the tensile force in the next row is skewed in the opposite direction to the upper row, so that the tensile force between the two rows can be offset. Accordingly, the tensile force applied to the entire second mask (MSK2) can be evenly distributed, so that deformation of the second mask (MSK2) due to stress can be minimized.

[0245] According to the present invention, even if the mask openings have an asymmetrical shape in the up / down or left / right directions, the mask openings are arranged symmetrically with respect to each other, thereby allowing the tensile force applied to the mask to be uniformly distributed across the entire front surface of the mask. Accordingly, local stress caused by the tensile force can be reduced, and deformation and breakage of the mask can be minimized. As a result, the reliability of the mask itself and the manufacturing process of the display panel using it can be improved.

[0247] FIGS. 12a and 12b are plan views showing some regions of a display panel according to an embodiment of the present invention. FIGS. 12a and 12b each illustrate a region corresponding to FIG. 6c and illustrate different embodiments. Hereinafter, the present invention will be described with reference to FIGS. 12a and 12b. Meanwhile, the same reference numerals are assigned to configurations identical to those described in FIGS. 1a to 11c, and redundant descriptions are omitted.

[0248] As illustrated in FIG. 12a, the display panel (DP-1) may include a plurality of unit pixel groups (UT-1), and one unit pixel group (UT-1) may be composed of four first color light-emitting patterns (EP1_G1, EP1_G2, EP1_G3, EP1_G), two second color light-emitting patterns (EP1_R1, EP1_R2), and two third color light-emitting patterns (EP1_B1, EP1_B2).

[0249] The unit pixel group (UT-1) illustrated in FIG. 12a may correspond to a structure in which the unit pixel group (UT) illustrated in FIG. 6c is symmetrically aligned with respect to a symmetry axis passing through the center of the unit pixel group (UT) and parallel to the second direction (D2). Specifically, the first color light emission patterns (EP1_G1, EP1_G2, EP1_G3, EP1_G4) may include first color first light emission patterns (EP_G1, EP_G2) and first color second light emission patterns (EP_G3, EP_G4). The first color first light emission patterns (EP1_G1, EP1_G2) and the first color second light emission patterns (EP1_G3, EP1_G4) may have sides extended along different directions. Each of the quadrants of the first color first light emission patterns (EP1_G1, EP1_G2) can be extended along the first diagonal direction (S1), and each of the quadrants of the first color second light emission patterns (EP1_G3, EP1_G4) can be extended along the second diagonal direction (S2).

[0250] Each of the first color second light emission patterns (EP1_G3, EP1_G4) may have the same shape as the shape of each of the first color first light emission patterns (EP1_G1, EP1_G2) that is line-symmetric with respect to a symmetry axis parallel to the second direction (D2). That is, the shapes obtained by symmetrically shifting each of the first color first light emission patterns (EP1_G1, EP1_G2) about a symmetry axis parallel to the second direction (D2) may be identical to each of the first color second light emission patterns (EP1_G3, EP1_G4).

[0251] Additionally, each of the shapes of the first color second light emission patterns (EP1_G3, EP1_G4) may correspond to the shape of each of the first color first light emission patterns (EP1_G1, EP1_G2) rotated 90 degrees clockwise. That is, the first color second light emission patterns (EP1_G3, EP1_G4) may be identical to each of the first color first light emission patterns (EP1_G1, EP1_G2) rotated 90 degrees clockwise and then moved along the opposite direction (D2) of the second direction (D2).

[0252] The second color light emission patterns (EP1_R1, EP1_R2) may include a second color first light emission pattern (EP1_R1) and a second color second light emission pattern (EP1_R2) placed in different rows. The second color first light emission pattern (EP1_R1) is placed in a first row and positioned between the first color first light emission patterns (EP1_G1, EP1_G2), and the second color second light emission pattern (EP1_R2) is placed in a second row and positioned to the right of the first color second light emission patterns (EP1_G3, EP1_G4). The second color first light emission pattern (EP1_R1) and the second color second light emission pattern (EP1_R2) may be positioned staggered from each other in a second direction (D2). Accordingly, the second color first light emission pattern (EP1_R1) and the second color second light emission pattern (EP1_R2) can be non-overlapping when viewed from the second direction (D2).

[0253] The second color first light emission pattern (EP1_R1) and the second color second light emission pattern (EP1_R2) have different shapes from each other. The second color first light emission pattern (EP1_R1) and the second color second light emission pattern (EP1_R2) may have sides extended along different directions. The sides of the second color first light emission pattern (EP1_R1) may be extended along the first diagonal direction (S1), and the sides of the second color second light emission pattern (EP1_R2) may be extended along the second diagonal direction (S2).

[0254] The second color first light emission pattern (EP1_R1) and the second color second light emission pattern (EP1_R2) may have shapes identical to the shape with respect to a symmetry axis parallel to the second direction (D2). The second color first light emission pattern (EP1_R1) may correspond to the shape of the second color second light emission pattern (EP1_R2) rotated symmetrically. For example, the second color first light emission pattern (EP1_R1) may be identical to the second color second light emission pattern (EP1_R2) rotated 90 degrees counterclockwise and then moved on a plane.

[0255] The third color light emission patterns (EP1_B1, EP1_B2) may include a third color first light emission pattern (EP1_B1) and a third color second light emission pattern (EP1_B2) placed in different rows. The third color first light emission pattern (EP1_B1) is placed in the first row and positioned to the right of the first color first light emission patterns (EP1_G1, EP1_G2), and the third color second light emission pattern (EP1_B2) is placed in the second row and positioned between the first color second light emission patterns (EP1_G3, EP1_G4).

[0256] The third color first light emission pattern (EP1_B1) and the third color second light emission pattern (EP1_B2) may have different shapes. The quadrilateral of the third color first light emission pattern (EP1_B1) may be extended along the first diagonal direction (S1), and the quadrilateral of the third color second light emission pattern (EP1_B2) may be extended along the second diagonal direction (S2).

[0257] The third color first light emission pattern (EP1_B1) and the third color second light emission pattern (EP1_B2) may have shapes corresponding to shapes that are line-symmetric with respect to a symmetry axis parallel to the second direction (D2). Specifically, the third color second light emission pattern (EP1_B2) may be identical to the third color first light emission pattern (EP1_B1) after being line-symmetric and then moved in position on a plane. Additionally, the third color first light emission pattern (EP1_B1) may correspond to a shape that is rotationally symmetrical by 90 degrees clockwise with respect to the third color second light emission pattern (EP1_B2). Specifically, the third color second light emission pattern (EP1_B2) may be identical to the third color first light emission pattern (EP1_B1) after being rotated 90 degrees clockwise and then moved in position on a plane.

[0258] The second color emission patterns (EP1_R1, EP_R2) and the third color emission patterns (EP1_B1, EP1_B2) each have sides facing the first color emission patterns (EP1_G1, EP1_G2, EP1_G3, EP1_G4) and may have a line-symmetric relationship. For example, the second color first emission pattern (EP1_R1) has a side facing one of the first color first emission patterns (EP1_G1, EP1_G2) (EP1_G2), and has a line-symmetric shape with respect to the first color first emission pattern (EP1_G2) with respect to a symmetry axis parallel to the direction in which the side is extended, that is, the first diagonal direction (S1). The second color second light emission pattern (EP1_R2) has a side facing one of the first color second light emission patterns (EP1_G3, EP1_G4) (EP1_G3), and has a shape that is line-symmetric with respect to the first color second light emission pattern (EP1_G3) with respect to a symmetry axis parallel to the direction in which the side is extended, that is, the second diagonal direction (S2).

[0259] The third color first light emission pattern (EP1_B1) has a side facing the other one (EP1_G1) among the first color first light emission patterns (EP1_G1, EP1_G2), and has a line-symmetric shape with respect to the first color first light emission pattern (EP1_G1) with respect to the symmetry axis parallel to the direction in which the side is extended, that is, the first diagonal direction (S1). The third color second light emission pattern (EP1_B2) has a side facing the other one (EP1_G4) among the first color second light emission patterns (EP1_G3, EP1_G4), and has a line-symmetric shape with respect to the first color second light emission pattern (EP1_G4) with respect to the symmetry axis parallel to the direction in which the side is extended, that is, the second diagonal direction (S2).

[0260] Referring to FIG. 12b, the four first color light-emitting patterns (EP2_G1, EP2_G2, EP2_G3, EP2_G4), two second color light-emitting patterns (EP2_R1, EP2_R2), and two third color light-emitting patterns (EP2_B1, EP2_B2) constituting the unit pixel group (UT-2) of the display panel (EP-2) may have a different arrangement from the unit pixel groups (UT, UT-1) described above. For example, the unit pixel group (UT-2) may include first color light-emitting patterns (EP2_G1, EP2_G2, EP2_G3, EP2_G4) that have different shapes while constituting the same row.

[0261] Specifically, the first color light emission patterns (EP2_G1, EP2_G2, EP2_G3, EP2_G4) may include two first color first light emission patterns (EP2_G1, EP2_G2) constituting the same row and two first color second light emission patterns (EP2_G3, EP2_G4) constituting a different row. In this case, the two first color first light emission patterns (EP2_G1, EP2_G2) may have the same shape as each other, and the two first color second light emission patterns (EP2_G3, EP2_G4) may also have the same shape as each other. That is, in this embodiment, the first color first light emission patterns (EP2_G1, EP2_G2) and the first color second light emission patterns (EP2_G3, EP2_G4) are spaced apart from each other in the first direction (D1), the first color first light emission patterns (EP2_G1, EP2_G2) are arranged along the second direction (D2), and the two first color second light emission patterns (EP2_G3, EP2_G4) are also arranged along the second direction (D2).

[0262] Each of the two first color first light emission patterns (EP2_G1, EP2_G2) has a quadrilateral extended along the first diagonal direction (S1) and may have the shape of a right triangle with rounded vertices. Each of the two first color second light emission patterns (EP2_G3, EP2_G4) has a quadrilateral extended along the second diagonal direction (S2).

[0263] If the first color first light emission patterns (EP2_G1, EP_G2) placed on the left are rotated 90 degrees counterclockwise and moved on a plane, they can correspond to the first color second light emission patterns (EP2_G3, EP_G4) placed on the right.

[0264] The second color light emission patterns (EP2_R1, EP2_R2) have different shapes. Among the second color light emission patterns (EP2_R1, EP2_R2), the second color second light emission pattern (EP2_R2) may correspond to a shape in which the second color first light emission pattern (EP2_R1) is rotated 90 degrees counterclockwise. Additionally, the second color second light emission pattern (EP2_R2) may correspond to a shape in which the second color first light emission pattern (EP2_R1) is line-symmetric with respect to a symmetry axis parallel to the first direction (D1). That is, the second color second light emission pattern (EP2_R2) may be identical to the second color first light emission pattern (EP2_R1) after being line-symmetric and then moved on a plane.

[0265] Among the second color light emission patterns (EP2_R1, EP2_R2), the second color first light emission pattern (EP2_R1) is positioned between the first color first light emission pattern (EP2_G1) and the first color second light emission pattern (EP_G3) positioned on the upper side. The second color first light emission pattern (EP2_R1) includes a side facing the side of the upper first color first light emission pattern (EP2_G1), a side facing the lower first color first light emission pattern (EP2_G2), and a side facing the upper first color second light emission pattern (EP2_G3). That is, the second color first light emission pattern (EP2_R1) may have a line-symmetric relationship with the upper first color first light emission pattern (EP_G1) with respect to a symmetry axis parallel to the first diagonal direction (S1). Additionally, the second color first light emission pattern (EP2_R1) may have a line symmetry relationship with the upper first color second light emission pattern (EP2_G3) with respect to a symmetry axis parallel to the second direction (D2).

[0267] Among the second color light emission patterns (EP2_R1, EP2_R2), the second color second light emission pattern (EP2_R2) is positioned between the first color second light emission patterns (EP2_G3, EP_G4). The second color second light emission pattern (EP2_R2) includes a side facing the side of the lower first color second light emission pattern (EP2_G4) and a side facing the upper first color second light emission pattern (EP2_G3). That is, the second color second light emission pattern (EP2_R2) may have a line-symmetric relationship with the lower first color second light emission pattern (EP_G4) with respect to a symmetry axis parallel to the second diagonal direction (S2).

[0268] The third color light emission patterns (EP2_B1, EP2_B2) may have different shapes. However, the third color light emission patterns (EP2_B1, EP2_B2) may have shapes corresponding to shapes that are symmetrically shifted from each other. Specifically, among the third color light emission patterns (EP2_B1, EP2_B2), the third color second light emission pattern (EP2_B2) may be identical to the third color first light emission pattern (EP2_B1) after it has been rotated 90 degrees clockwise and then shifted on a plane. Additionally, the third color second light emission pattern (EP2_B2) may be identical to the third color first light emission pattern (EP2_B1) after it has been linearly symmetrical with respect to a symmetry axis parallel to the first direction (D1) and then shifted on a plane.

[0269] The third color first light emission pattern (EP2_B1) has a side facing the upper first color second light emission pattern (EP2_G3) and may be in a line-symmetric relationship with the upper first color second light emission pattern (EP2_G3) with respect to the second diagonal direction (S2).

[0270] The third color second light emission pattern (EP2_B2) includes a quadrant facing the lower first color second light emission pattern (EP2_G2) and a unilateral facing the lower first color second light emission pattern (EP2_G4). The third color second light emission pattern (EP2_B2) may be in a line-symmetric relationship with the lower first color second light emission pattern (EP2_G2) with respect to a symmetry axis parallel to the first diagonal direction (S1). Additionally, the third color second light emission pattern (EP2_B2) may be in a line-symmetric relationship with the lower first color second light emission pattern (EP_G4) with respect to a symmetry axis parallel to the second direction (D2).

[0271] According to the present invention, light-emitting patterns constituting a single unit pixel group (UT-1, UT-2) are provided in shapes that are symmetric to each other, so that the openings of the mask corresponding to the light-emitting patterns can be arranged symmetrically across the entire mask area. Accordingly, when the mask is stretched, the problem of localized stress can be prevented, thereby preventing damage or deformation of the mask. Therefore, the process reliability of the display panel (DP-1, DP-2) can be improved.

[0272] Although the present invention has been described above with reference to preferred embodiments, those skilled in the art or those with ordinary knowledge in the relevant technical field will understand that various modifications and changes can be made to the invention without departing from the spirit and technical scope of the invention as set forth in the claims below. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims. Explanation of the symbols

[0273] UT: Unit pixel group

Claims

Claim 1 A display panel comprising: a pixel circuit including at least one thin-film transistor; and a unit pixel group connected to the pixel circuit, wherein the unit pixel group includes four first color light-emitting patterns; two second color light-emitting patterns having different shapes from each other; and two third color light-emitting patterns having different shapes from each other, wherein the first to third color light-emitting patterns each display different colors from each other, and the first color light-emitting patterns include two first color first light-emitting patterns having the same shape from each other; and first color second light-emitting patterns having the same shape from each other and having a shape different from the first color first light-emitting patterns, and wherein each of the first color first light-emitting patterns and each of the first color second light-emitting patterns have a pair of sides perpendicular to each other. Claim 2 In claim 1, each of the first to third color light-emitting patterns is a display panel having a triangular shape. Claim 3 In claim 2, the first color second light-emitting patterns are a display panel having shapes identical to the shapes obtained by rotating and symmetrically shifting the first color first light-emitting patterns by 90 degrees. Claim 4 In claim 2, the second color light emission patterns include a second color first light emission pattern disposed between the first color first light emission patterns; and a second color second light emission pattern disposed between the first color second light emission patterns, comprising a display panel. Claim 5 A display panel according to claim 4, wherein the directions in which the sides facing the first color first light-emitting patterns among the second color first light-emitting patterns are extended form acute angles, and the directions in which the sides facing the first color second light-emitting patterns among the second color second light-emitting patterns are extended form acute angles. Claim 6 In claim 4, the second color second light-emitting pattern is a display panel having the same shape as the second color first light-emitting pattern rotated 90 degrees symmetrically. Claim 7 In claim 4, the third color light-emitting patterns include a third color first light-emitting pattern comprising a side facing any one of the first color first light-emitting patterns or any one of the first color second light-emitting patterns; and a third color second light-emitting pattern disposed between another of the first color first light-emitting patterns and another of the first color second light-emitting patterns, wherein the directions in which the sides of the third color second light-emitting pattern facing the first color first light-emitting pattern and the first color second light-emitting pattern are extended form an acute angle. Claim 8 In claim 7, the third color second light-emitting pattern is a display panel having the same shape as the third color first light-emitting pattern rotated 90 degrees symmetrically. Claim 9 In claim 7, the first color light emission patterns are arranged along a first direction, and the first color light emission patterns and the second color light emission patterns are spaced apart from each other in a second direction intersecting the first direction. Claim 10 In claim 9, the second color first light emission pattern and the third color first light emission pattern are arranged along a first direction and have the same shape as each other, forming a display panel. Claim 11 In claim 9, the second color light emission patterns and the third color light emission patterns are a display panel having a line-symmetric relationship with respect to the first color light emission patterns, respectively, with respect to a symmetry axis parallel to a diagonal direction intersecting the first direction and the second direction. Claim 12 A display panel according to claim 1, wherein the minimum spacing between the first color light-emitting patterns is 15㎛ or more. Claim 13 A metal mask comprising: a first opening; and a second opening spaced apart from the first opening in a first direction and having a shape different from that of the first opening, wherein each of the first opening and the second opening has a left-right asymmetrical shape, and the second opening has the same shape as the first opening rotated 90 degrees symmetrically. Claim 14 A metal mask according to claim 13, wherein the first opening and the second opening are provided in plurality and arranged along the first direction and the second direction intersecting the first direction, and the plurality of first openings and the plurality of second openings are arranged alternately along the second direction. Claim 15 In claim 14, a metal mask in which the angle formed by the first direction and the second direction is an acute angle. Claim 16 A metal mask according to claim 14, wherein the separation distance in the second direction between the first openings is greater than the separation distance between the first opening and the second opening adjacent to each other in the first direction. Claim 17 In claim 13, the metal mask is rotated in a clockwise or counterclockwise direction. Claim 18 In claim 13, the first opening and the second opening each correspond to a metal mask with a rounded apex right-angled triangle shape. Claim 19 A metal mask according to claim 18, wherein the radius of curvature of the vertex is 8 μm or more. Claim 20 A metal mask according to claim 18, wherein the minimum gap between the first opening and the second opening is 15 μm or more.

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