Garbage collection of memory components using adjusted parameters

Abstract

Systems, devices, and methods related to media management are described, including "garbage collection" of memory or storage systems or subsystems, such as solid-state drives. For example, a criticality value may be determined and used as a criterion for managing garbage collection actions for data blocks. A controller, system, or subsystem may determine that a criticality value related to performing a garbage collection action satisfies a condition. Based on the determination that the condition is satisfied, parameters related to performing the garbage collection action may be adjusted. Using the adjusted parameters, a garbage collection action is performed for data blocks stored in a memory component.

Description

Technology Field

[0001] The embodiments of the present disclosure generally relate to memory subsystems, and more specifically, to garbage collection in memory components using adjusted parameters. Background Technology

[0002] The memory subsystem may be a storage device, a memory module, or a hybrid of a storage device and a memory module. The memory subsystem may include one or more memory components that store data. The memory components may be, for example, non-volatile memory components and volatile memory components. Generally, a host system can use the memory subsystem to store data in memory components and retrieve data from memory components. Brief explanation of the drawing

[0003] The present disclosure will be more fully understood from the following detailed description and the accompanying drawings of various embodiments of the present disclosure. However, the drawings should not be construed as limiting the present disclosure to specific embodiments, but are for illustrative and illustrative purposes only. FIG. 1 illustrates an exemplary computing environment including a memory subsystem according to some embodiments of the present disclosure. FIG. 2 illustrates an example of garbage collection in a memory component using adjusted parameters according to some embodiments of the present disclosure. FIG. 3 is a flowchart of an exemplary method for performing a garbage collection operation using adjusted parameters according to some embodiments of the present disclosure. FIG. 4 is a flowchart of an exemplary method for performing a garbage collection operation using modified parameter values ​​according to some embodiments of the present disclosure. FIG. 5 is a block diagram of an exemplary computer system in which embodiments of the present disclosure can be operated. Specific details for implementing the invention

[0004] Aspects of the present disclosure relate to garbage collection in memory components using adjusted parameters. The memory subsystem may be a storage device, a memory module, or a hybrid of a storage device and a memory module. Examples of storage devices and memory modules are described below together with FIG. 1. Generally, a host system may utilize a memory subsystem comprising one or more memory components (hereinafter also referred to as "memory devices"). The host system may provide data to be stored in the memory subsystem and may request data to be retrieved from the memory subsystem.

[0005] When the host system requests data storage, the data is stored at a physical address within the memory component. The host system provides a logical address that identifies the data to be stored. A logical-to-physical (L2P) mapping table is maintained to identify the physical location where the data corresponding to each logical address is located. A memory component of the memory subsystem may include one or more memory pages (also referred to herein as "pages") for storing one or more bits of binary data corresponding to the data received from the host system. One or more memory pages of a memory component may be grouped together to form a data block. When data is written to a memory component, it is generally performed at the page level so that an entire page or multiple pages are written as a single operation. When the host system requests an update to the data at a specific logical address, the updated data is stored at a new physical location (e.g., a new physical address), and the L2P mapping is updated so that the specific logical address of the data is mapped to the new physical address. The original data (e.g., the data prior to the update) remains stored at the original physical address. However, from the perspective of the host, this data is no longer valid and can no longer be used by the host. Due to various changes in data, memory components accumulate physical addresses across various data blocks containing invalid data, in addition to having physical addresses containing valid data. Invalid data stored in memory components is considered "garbage" and can be deleted at some point.

[0006] If a memory component is full and lacks sufficient capacity to accommodate data during additional write operations, specific data may be erased to free up space. However, when data is erased from a memory component, this is typically performed at the block level so that the entire block (containing multiple pages) is erased in a single operation. Therefore, when a specific data segment of a memory component is updated, specific pages within the block will be rewritten to other locations and / or contain data that is no longer needed. Since each block may contain several pages of valid data, the entire block cannot simply be erased. Garbage collection ("GC"), which involves migrating (e.g., rewriting) these pages from the block containing valid data to another block, can be performed to erase the current block containing both valid and invalid data. Garbage collection is a form of automatic memory management that attempts to reclaim memory occupied by garbage or stale data objects that are no longer in use (e.g., because they have been updated with new values). The basic principle of garbage collection is to find data objects that cannot be accessed or do not need to be accessed in the future, and to reclaim the resources (i.e., storage space) used by these objects.

[0007] A conventional memory subsystem may include a controller that determines the appropriate time to initiate a garbage collection operation. The controller may perform calculations to determine the optimal time to perform the GC operation by optimizing for various factors. In some examples, the GC is initiated periodically as part of regular memory management operations for the memory subsystem. In other examples, the GC is initiated in response to specific events, such as receiving a write request (e.g., from a host system) and determining that the memory components do not have sufficient capacity to accept the write request. In some examples, the controller may determine that a memory component is full or insufficient to accept additional write operations that may be received from the host, and that garbage collection needs to be performed to free up space in the memory component. In some examples, the controller may determine that the memory subsystem or specific components within the memory subsystem are idle or experiencing downtime, and that the GC can be performed during this time. Based on the determination of the appropriate time, the controller may initiate a garbage collection operation to erase invalid data from specific blocks.

[0008] The controller may decide to perform GC in various situations. In some examples, performing GC may be important due to specific circumstances. In other examples, performing GC may not be urgent. In some examples, performing GC may take a significant amount of time. For instance, data blocks can be highly fragmented due to both valid and invalid data located at various positions within each block, thus requiring significant time for the GC operation. In some examples, it may be necessary to perform the GC operation within a short period. For instance, a memory component may become full and there may not be sufficient capacity to accept additional host write requests, so a call for the GC operation must be executed immediately. The criticality level of GC execution may vary based on the length of time required to perform GC and how quickly it needs to be performed. However, in conventional systems, regardless of whether GC execution is critical or not, GC operations are optimized to achieve high performance. GC can be a power-intensive operation. GC may require complex algorithms to optimize various factors that can consume significant battery power. If GC is not critical to performance, using valuable battery power can be wasteful.

[0009] Aspects of the present disclosure address the above and other drawbacks by having a memory subsystem capable of performing garbage collection using different parameters depending on the importance of performing the GC operation. In one implementation, a controller of the memory subsystem may determine an appropriate time to perform the GC operation by determining whether a criterion (e.g., system idle state) is satisfied for performing the GC operation on a memory component of the memory subsystem. If the criterion is satisfied, the controller may determine an importance level associated with performing the GC operation. For example, the controller may calculate an importance value associated with performing the GC. In some examples, the importance value may be compared to an importance condition defined for the memory component. For example, if the importance value is below a defined threshold, the importance condition may be satisfied. If the controller determines that the importance value satisfies the importance condition, the controller may adjust the optimization elements used with the GC by default. The controller may change parameters associated with the GC operation so that reduced battery power is used for the GC operation.

[0010] The present disclosure reduces the impact of garbage collection on battery consumption based on the importance of performing garbage collection operations by changing the parameters of the GC operation. The advantages of the present invention include, but are not limited to, preserving battery life to perform important and urgent operations, improving the performance of the memory subsystem as battery power is preserved, not wasting valuable computing resources on optimizing garbage collection operations that do not require optimization, and improving the overall performance of the memory subsystem so that other read and write operations can be performed by the memory subsystem using the saved battery power instead of consuming battery power when performing garbage collection operations, etc.

[0011] FIG. 1 illustrates an exemplary computing environment (100) comprising a memory subsystem (110) according to some embodiments of the present disclosure. The memory subsystem (110) may include a medium such as one or more volatile memory devices (e.g., memory device (140)), one or more non-volatile memory devices (e.g., memory device (130)), or a combination thereof.

[0012] The memory subsystem (110) may be a storage device, a memory module, or a hybrid of a storage device and a memory module. Examples of storage devices include solid-state drives (SSDs), flash drives, universal serial bus (USB) flash drives, embedded multimedia controller (eMMC) drives, universal flash storage (UFS) drives, and hard disk drives (HDDs). Examples of memory modules include dual in-line memory modules (DIMMs), small outline DIMMs (SO-DIMMs), and non-volatile dual in-line memory modules (NVDIMMs).

[0013] A computing environment (100) may include a host system (120) coupled to one or more memory subsystems (110). In some embodiments, the host system (120) is coupled to a different type of memory subsystem (110). FIG. 1 illustrates an example of a host system (120) coupled to one memory subsystem (110). The host system (120) uses the memory subsystem (110) to, for example, write data to the memory subsystem (110) and read data from the memory subsystem (110). As used herein, “coupled to” generally refers to a connection between components, which may be an indirect communication connection or a direct communication connection (e.g., without intermediate components), whether wired or wireless, including connections such as electrical, optical, magnetic, etc.

[0014] The host device (120) may be a computing device such as a desktop computer, a laptop computer, a network server, a mobile device, or a computing device including memory and processing units. The host system (120) may be coupled to the memory subsystem (110) via a physical host interface. Examples of physical host interfaces include, but are not limited to, a Serial Advanced Technology Coupling (SATA) interface, a Peripheral Component Interconnect Express (PCIe) interface, a Universal Serial Bus (USB) interface, a Fiber Channel, a Serial Coupling SCSI (SAS), etc. The physical host interface may be used to transfer data between the host system (120) and the memory subsystem (110). The host system (120) may additionally use an NVM Express (NVMe) interface to access memory components (e.g., memory devices (130)) when the memory subsystem (110) is coupled to the host system (120) via a PCIe interface. The physical host interface can provide an interface for transmitting control, address, data, and other signals between the memory subsystem (110) and the host system (120).

[0015] Memory devices may include any combination of different types of non-volatile memory devices and / or volatile memory devices. Volatile memory devices (e.g., memory device (140)) may be random access memory (RAM), such as dynamic random access memory (DRAM) and synchronous dynamic random access memory (SDRAM), but not limited thereto.

[0016] One example of non-volatile memory devices (e.g., memory device (130)) includes a negative-and-nAND type flash memory. Each of the memory devices (130) may include one or more memory cell arrays, such as single-level cells (SLC) or multi-level cells (MLC) (e.g., triple-level cells (TLC) or quad-level cells (QLC)). In some embodiments, a specific memory component may include an SLC portion and an MLC portion, a TLC portion, or a QLC portion of memory cells. Each memory cell may store one bit or more of data used by the host system (120). Furthermore, the memory cells of the memory devices may be grouped into memory pages or data blocks, which may refer to units of memory components used to store data.

[0017] Although non-volatile memory components such as NAND flash memory are described, the memory device (130) may be based on any other type of non-volatile memory, such as read-only memory (ROM), phase change memory (PCM), magneto random access memory (MRAM), negative-or (NOR) flash memory, electrically erasable programmable read-only memory (EEPROM), and a crosspoint array of non-volatile memory cells. A crosspoint array of non-volatile memory can perform bit storage based on changes in bulk resistance in conjunction with a stackable cross-grid data access array. Additionally, unlike many flash-based memories, crosspoint non-volatile memory can perform write-in-place operations, whereby the non-volatile memory cells can be programmed without the non-volatile memory cells being erased beforehand.

[0018] A memory subsystem controller (115) can communicate with memory devices (130) to perform operations such as reading data, writing data, or erasing data, and other such operations on memory devices (130). The memory subsystem controller (115) may include hardware such as one or more integrated circuits and / or individual components, buffer memory, or a combination thereof. The memory subsystem controller (115) may be a microcontroller, a special-purpose logic circuit (e.g., a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), etc.), or other suitable processor.

[0019] The memory subsystem controller (115) may include a processor (processing unit) (117) configured to execute instructions stored in local memory (119). In the illustrated example, the local memory (119) of the memory subsystem controller (115) includes an embedded memory configured to store instructions for performing various processes, operations, logic flows, and routines that control the operation of the memory subsystem (110), including handling communications between the memory subsystem (110) and the host system (120).

[0020] In some embodiments, the local memory (119) may include memory registers that store memory pointers, fetched data, etc. The local memory (119) may also include read-only memory (ROM) for storing microcode. Although the exemplary memory subsystem (110) of FIG. 1 is illustrated as including a memory subsystem controller (115), in other embodiments of the present disclosure, the memory subsystem (110) may not include a memory subsystem controller (115) and may instead rely on external control (provided, for example, by an external host or by a processor or controller separated from the memory subsystem).

[0021] Generally, the memory subsystem controller (115) may receive commands or operations from the host system (120) and may convert the commands or operations into instructions or appropriate commands to achieve desired access to the memory devices (130). The memory subsystem controller (115) may be responsible for other operations such as wear leveling operations, garbage collection operations, error detection and error-correcting code (ECC) operations, encryption operations, caching operations, and address translation between logical block addresses and physical block addresses associated with the memory devices (130). The memory subsystem controller (115) may further include a host interface circuit for communicating with the host system (120) through a physical host interface. The host interface circuit can convert responses associated with memory devices (130) into information about the host system (120), as well as convert commands received from the host system into command instructions for accessing the memory devices (130).

[0022] The memory subsystem (110) may also include additional circuitry or components not illustrated. In some embodiments, the memory subsystem (110) may include an address circuitry (e.g., a row decoder or a column decoder) capable of receiving an address from a cache or buffer (e.g., a DRAM) and a memory subsystem controller (115) and decoding an address for accessing memory devices (130).

[0023] In some embodiments, memory devices (130) include local media controllers (135) that operate with a memory subsystem controller (115) to perform operations on one or more memory cells of memory devices (130).

[0024] The memory subsystem (110) includes a parameter adjustment component (113) capable of adjusting parameters associated with garbage collection operations based on the importance of performing garbage collection operations. In some embodiments, the memory subsystem controller (115) includes at least a portion of the parameter adjustment component (113). For example, the memory subsystem controller (115) may include a processor (117) (processing unit) configured to execute instructions stored in local memory (119) to perform the operations described herein. In some embodiments, the parameter adjustment component (113) is part of the host system (110), application, or operating system.

[0025] The parameter adjustment component (113) can determine a criticality level associated with performing garbage collection operations on data blocks of memory components. For example, the parameter adjustment controller (113) can calculate a criticality value associated with performing GC. When the parameter adjustment component (113) determines that the criticality value associated with performing GC satisfies a criticality condition (e.g., when the criticality value is below a defined threshold), the parameter adjustment component (113) can adjust the parameters used by default to optimize the GC operation. The parameter adjustment component (113) can change the parameters associated with the GC operation so that battery power consumption for the GC operation is reduced. Additional details regarding the operations of the parameter adjustment component (113) are described below.

[0026] FIG. 2 illustrates an example of garbage collection in a memory component of a memory subsystem (200) using adjusted parameters according to some embodiments of the present disclosure. Generally, the memory subsystem (200) may correspond to the memory subsystem (110) of FIG. 1. For example, the memory subsystem (200) may include the parameter adjustment component (113) of FIG. 1. In some embodiments, the parameter adjustment component (113) may be configured to monitor a importance value associated with performing a garbage collection operation within the memory subsystem (200) and to determine whether to perform a garbage collection operation using default parameters or adjusted parameters.

[0027] The controller (115) can perform calculations to determine the optimal time to perform a GC operation based on a policy set in the controller (115) and optimize for various factors (e.g., sequential write, dirty conditions, etc.). Based on the calculations, the controller (115) can determine whether criteria for performing a GC operation are met. An exemplary criterion may be that the memory subsystem (200) is idle (e.g., no active host read / write requests being performed). In some examples, the controller (115) may determine that the memory subsystem (200) or specific components within the memory subsystem are idle or experiencing downtime. If the criterion is met (e.g., idle), GC may be performed during this time. Some of the other criteria may include a time periodically scheduled for GC, the occurrence of a specific event requiring a GC operation, a memory component being full, or a memory component having insufficient capacity to accept additional write requests.

[0028] The controller (115) can calculate an importance value related to performing a garbage collection operation. The importance value may indicate a level of importance (e.g., necessity, urgency, etc.) for performing a GC operation. In one example, the level of importance may be determined using factors such as the amount of invalid data in a data block, the availability of additional data blocks to accept a write request from a host machine, etc.

[0029] As illustrated in the example of FIG. 2, the memory component (112) may include a plurality of memory cells (e.g., C1 to Cn). Each of the memory cells may store one or more bits of binary data corresponding to data received from the host system. Individual data blocks of the memory component (112) (e.g., B1, B2, Bn, etc.) may be formed by grouping the memory cells together. In one example, the controller (115) may determine that the memory component (112) is in a clean state (e.g., not containing too much invalid data) or a dirty state (e.g., containing too much invalid data).

[0030] In some implementations, a mapping table can be used to track the importance of performing GC. For example, a mapping table can identify whether each cell of a data block contains valid data, invalid data, or no data at all. In one implementation, the mapping table may be based on an L2P table that maps logical locations to physical locations. In one example, the mapping table may be the L2P table itself. In another example, the mapping table may be a different layer of mapping derived from the L2P table. For example, a mapping table derived from an L2P map can track regions of memory components containing valid data and regions containing invalid data, where the regions may be at the same level of granularity tracked in the L2P table or aggregated for a higher level. In one example, the mapping table may indicate that all data blocks contain valid data, and in this scenario, the need to perform GC may be low or non-existent. In this situation, performing a GC operation may be considered unimportant, and the requirement to set the importance value to 0 or close to 0 may be satisfied. In another example, a mapping table may indicate that many cells in various data blocks contain invalid data and / or that memory components contain highly fragmented data (e.g., partially valid, partially invalid, etc.). In the example illustrated in FIG. 2, memory cells (C1, C3, C4, C7, and C8) of data block (B1) contain invalid data, and memory cells (C2, C5, and C6) of data block (B1) contain valid data. The controller (115) may determine that data block (B1) is too dirty.In this situation, performing GC operations may take a significant amount of time, and more complexity may be expected in the GC operation. In this scenario, the garbage collection operation can remove invalid data from data blocks by moving valid data to other blocks and wiping data blocks. In this situation, performing GC operations may be considered unimportant, and the requirement to set the importance value to a high value (e.g., close to 100 on a scale of 100) may be satisfied.

[0031] In some examples, the mapping table may indicate that there is sufficient capacity to accept future additional host writes, so GC operations do not need to be performed. In this situation, performing GC operations may be considered unimportant, and the requirement to set the importance value to 0 or close to 0 may be satisfied. In other examples, the mapping table may indicate that there is insufficient capacity to accept additional host write operations. The mapping table may be used to predict that GC operations should be performed to clear data blocks in a short time so that additional host write operations can be accepted. In this situation, performing GC operations may be considered unimportant, and the requirement to set the importance value to a high value (e.g., close to 100 on a scale of 100) may be satisfied. In some examples, performing GC operations may be considered unimportant when the number of available free blocks for writing data exceeds a threshold. The amount of data to be subjected to GC operations can be determined based on factors such as logical and physical saturation percentage values. In such scenarios, GC can be scheduled periodically. In other examples, GC may be required immediately because it is considered important. For example, system resources (e.g., the amount of free blocks) may be very low (e.g., below a threshold) so that immediate GC operation is performed to ensure that the memory component can perform satisfactorily.

[0032] In some implementations, the total importance value (e.g., C1 (224), C2 (226), etc.) may be calculated based on factors related to the importance values. In some examples, the total importance value may be calculated using a mapping table. In some examples, the importance value may be calculated by taking into account additional or alternative factors, such as how much work is required to perform the GC operation (e.g., required time length, number of steps to perform, etc.) and / or how quickly the GC should be performed. Other examples of data used to evaluate traces and / or importance values ​​may include, for example, block usage and status maintained in other data structures beyond the L2P table, block type, page count validity information, relative time of data creation, wear leveling and read interference information, various system counters, number of available free blocks, number of blocks erased, percentage of valid data in memory components, logical saturation, physical saturation, available idle time, etc.

[0033] In one implementation, the memory subsystem (200) has one or more critical importance values ​​(C Th )(222) can be specified. The controller (115) can specify a critical importance value (C) associated with performing a GC operation. Th It can be compared with )(222). The comparison can be performed using a comparator (220). The comparator (220) compares the importance value with the critical importance value (C Th It can be determined whether the importance value associated with performing a garbage collection operation satisfies the first importance condition by comparing it with )(222). In one example, the first importance condition may be defined as an importance value less than a threshold importance value. FIG. 2 illustrates an importance value (C1)(224) (e.g., a value of 10) at a time point t1. The comparator (220) [determines] the threshold importance value (C Th)(222) and the importance value (C1)(224) can be compared. The comparator (220) compares the importance value (C1)(224) with the critical importance value (C Th )(222) It can be determined that it is less than. In another example, the first importance condition can be defined as an importance value identified as low importance.

[0034] If it is determined that the importance value (C1) (224) satisfies the first importance condition, the parameter adjustment component (113) can adjust the parameters associated with performing the GC operation. In the example of FIG. 2, the importance value (C1) (224) is a critical importance value (C Th If it is determined that the first importance condition is satisfied and the (222) is less than , the adjusted parameter (232) is used to perform a GC operation (250) on the data blocks (B1 to Bn) of the memory device (130). More specifically, the default value of the parameter associated with performing the GC operation (250) is updated to the modified value of the parameter.

[0035] In some implementations, parameters can be adjusted by increasing the time period allocated for performing the GC operation. For example, the GC operation may be slower than when performed with default parameters due to the adjusted parameters. In some examples, the timing waveform associated with the GC operation may be modified. The longer the time taken to perform the GC operation (e.g., the slower the GC operation), the lower the power consumption during the GC operation. In some examples, parameters can be adjusted by decreasing the power level associated with the GC operation. In some examples, parameters can be adjusted by decreasing the bitline precharge current associated with the garbage collection operation. For example, if additional time is allocated for the GC operation beyond the default time for performing GC, the percentage of the bitline precharge current from the amount of current required for the default GC operation may be reduced. In some examples, parameters can be adjusted by performing a target-only-verify operation during program verification. In some examples, the parameter can be adjusted by adjusting the fast / slow system command prefix associated with the GC ("the prefix"). For example, if the GC operation is considered unimportant, the prefix can be set to indicate a slow mode, and the slow mode can be invoked to perform the GC operation to save power. On the other hand, if the GC is determined to be important, the fast mode can be set for the prefix so that the GC operation can be performed at the default power level or at an increased power level as needed.

[0036] In some implementations, the controller (115) may perform a GC operation (250) using adjusted parameters until the importance value is changed to satisfy a second importance condition. In some examples, the second importance condition may be defined as an importance value greater than or equal to a threshold importance value. FIG. 2 illustrates an importance value (C2) (226) (e.g., a value of 80) at a time point t2. If it is determined that the importance value (C2) (226) does not satisfy the first importance condition, or alternatively satisfies the second importance condition, the parameter adjustment component (113) does not adjust the parameters related to performing the GC operation. In the example of FIG. 2, the importance value (C2) (226) is a threshold importance value (C Th If it is determined that )(222) or higher satisfies the second importance condition (or alternatively does not satisfy the first importance condition), the default parameter (230) is used to perform a GC operation (250) on the data blocks (B1 to Bn) of the memory device (130). More specifically, the default value of the parameter associated with performing the GC operation (250) is used to perform the operation.

[0037] FIG. 3 is a flowchart of an exemplary method (300) for performing a garbage collection operation using adjusted parameters according to some embodiments of the present disclosure. The method (300) may be performed by processing logic that may include hardware (e.g., a processing unit, circuitry, dedicated logic, programmable logic, microcode, hardware of the device, integrated circuit, etc.), software (e.g., instructions executed or performed by the processing unit), or a combination thereof. In some embodiments, the method (300) is performed by the parameter adjustment component (113) of FIG. 1. Although illustrated in a specific sequence or order, the order of the processes may be modified unless otherwise specified. Accordingly, the illustrated embodiments should be understood as examples only, and the illustrated processes may be performed in a different order, and some processes may be performed in parallel. Additionally, one or more processes may be omitted in various embodiments. Accordingly, not all processes are required in all embodiments. Other process flows are possible.

[0038] In operation (310), the processing unit determines that a criterion for performing a garbage collection operation is met and that the garbage collection operation will be performed on the data blocks stored in the memory component. In one example, the criterion may be specified as the system being in idle mode. For example, the memory subsystem may be in idle mode when the memory subsystem is not performing a host read or write request.

[0039] In operation (320), the processing unit determines that the importance value associated with performing the garbage collection operation satisfies the importance condition. In some examples, the importance value is determined by considering the amount of invalid data in the data block and the availability of additional data blocks to accept the write request of the host machine. In one example, the importance value satisfies the importance condition if the importance value is less than the threshold importance value.

[0040] In operation (330), the processing unit adjusts parameters related to performing a garbage collection operation. In one example, the parameters are adjusted by adjusting default parameter values ​​to modified parameter values. In some implementations, the parameters may be adjusted by increasing the time period allocated to perform the GC operation. For example, the GC operation may be slower than when performed with default parameters due to the adjusted parameters. In some examples, the timing waveform related to the GC operation may be modified. In some examples, the parameters may be adjusted by decreasing the power level associated with the GC operation. In some examples, the parameters may be adjusted by decreasing the bitline precharge current associated with the garbage collection operation. In some examples, the parameters may be adjusted by performing a target-only verification operation during program verification.

[0041] In operation (340), the processing unit performs a garbage collection operation on the data blocks stored in the memory component using adjusted parameters. In some examples, tuned parameters may result in slower GC operation than when performed with default parameters. In some examples, tuned parameters may result in GC operation that consumes less power than when GC is performed with default parameters.

[0042] FIG. 4 is a flowchart of an exemplary method (400) for performing a garbage collection operation using a modified parameter value according to some embodiments of the present disclosure. The method (400) may be performed by processing logic that may include hardware (e.g., a processing unit, circuitry, dedicated logic, programmable logic, microcode, hardware of the device, integrated circuit, etc.), software (e.g., instructions executed or performed by the processing unit), or a combination thereof. In some embodiments, the method (400) is performed by the parameter adjustment component (113) of FIG. 1. Although illustrated in a specific sequence or order, the order of the processes may be modified unless otherwise specified. Accordingly, the illustrated embodiments should be understood as examples only, and the illustrated processes may be performed in a different order, and some processes may be performed in parallel. Additionally, one or more processes may be omitted in various embodiments. Accordingly, not all processes are required in all embodiments. Other process flows are possible.

[0043] In operation (410), the processing unit determines that a criterion for performing a garbage collection operation is met and that the garbage collection operation will be performed on the data blocks stored in the memory component. In one example, the criterion may be specified as the system experiencing a downtime. For example, the memory subsystem may experience a downtime when the memory subsystem performs a negligible number of host read or write requests, or when it performs no host read or write requests at all.

[0044] In operation (420), the processing unit determines that the importance value associated with performing a garbage collection operation satisfies the first importance condition. In some examples, the importance value is determined by considering the amount of invalid data in the data block and / or the availability of additional data blocks to accept write requests from the host machine. In one example, the importance value satisfies the importance condition if the importance value is less than the threshold importance value.

[0045] In operation (430), the process modifies the default value of a parameter associated with performing a garbage collection operation to a modified value. In some implementations, the default value of the parameter may be changed to a modified value by increasing the time period allocated for performing the GC operation. For example, the GC operation may be slower than when performed with the default parameter due to the adjusted parameter. In some examples, the timing waveform associated with performing the GC may be modified. In some examples, the default value of the parameter may be changed to a modified value by decreasing the power level associated with performing the GC operation. In some examples, the default value of the parameter may be changed to a modified value by decreasing the bitline precharge current associated with the garbage collection operation. In some examples, the default value of the parameter may be changed to a modified value by performing a target-only verification operation during program verification.

[0046] In operation (440), the processing unit performs a garbage collection operation on data blocks stored in memory components using modified parameters until the importance value is changed to satisfy a second importance condition. In some examples, the importance value satisfies the second importance condition when the importance value is greater than or equal to a threshold importance value. In some examples, the GC operation may be slower than when performed with default parameters due to the adjusted parameters. In some examples, the adjusted parameters may result in a GC operation that consumes less power than when GC is performed with default parameters.

[0047] FIG. 5 illustrates an exemplary machine of a computer system (500) on which a set of instructions can be executed to cause the machine to perform any one or more of the methodologies discussed herein. In some embodiments, the computer system (500) may correspond to a host system (e.g., the host system (120) of FIG. 1) that includes, is coupled to, or utilizes a memory subsystem (e.g., the memory subsystem (110) of FIG. 1), or may be used to perform the operations of a controller (e.g., to run an operating system to perform operations corresponding to the parameter adjustment component (113) of FIG. 1). In alternative embodiments, the machine may be connected (e.g., networked) to other machines in a LAN, intranet, extranet, and / or the Internet. The machine may operate as a server or client machine in a client-server network environment, as a peer machine in a peer-to-peer (or distributed) network environment, or as a server or client machine in a cloud computing infrastructure or environment.

[0048] A machine may be a personal computer (PC), tablet PC, set-top box (STB), personal digital assistant device (PDA), cellular telephone, web device, server, network router, switch or bridge, or any machine capable of executing a set of instructions (sequentially or otherwise) specifying actions to be performed by said machine. Additionally, although a single machine is exemplified, the term “machine” should also be considered to include any collection of machines that execute a set of instructions (or multiple sets) individually or in common to perform any one or more of the methodologies discussed herein.

[0049] An exemplary computer system (500) includes a processing unit (502), a main memory (504) (e.g., dynamic random access memory (DRAM), such as read-only memory (ROM), flash memory, synchronous DRAM (SDRAM) or RDRAM), static memory (506) (e.g., flash memory, static random access memory (SRAM), etc.) and a data storage system (518) that communicate with each other via a bus (530).

[0050] The processing unit (502) represents one or more general-purpose processing units, such as a microprocessor, a central processing unit, etc. More specifically, the processing unit may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, or a processor that implements instruction sets, or a processor that implements a combination of instruction sets. The processing unit (502) may also be one or more special-purpose processing units, such as an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, etc. The processing unit (502) is configured to execute instructions (526) for performing the operations and steps described herein. The computer system (500) may further include a network interface device (508) for communicating through a network (520).

[0051] The data storage system (518) may include a machine-readable storage medium (524) (known as a computer-readable medium) in which one or more sets of instructions (526) or software implementing any one or more of the methods or functions described herein are stored. The instructions (526) may also reside in the main memory (504) and / or in the processing unit (502) wholly or at least partially during execution by the computer system (500), main memory (504), and processing unit (502) constituting the machine-readable storage medium. The machine-readable storage medium (524), the data storage system (518), and / or the main memory (504) may correspond to the memory subsystem (110) of FIG. 1.

[0052] In one embodiment, the instructions (526) include instructions for implementing a function corresponding to a parameter adjustment component (e.g., the parameter adjustment component (113) of FIG. 1). Although the machine-readable storage medium (524) is depicted as a single medium in an exemplary embodiment, the term “machine-readable storage medium” should be considered to include a single medium or multiple media that store one or more sets of instructions. The term “machine-readable storage medium” should also be considered to include any medium capable of storing or encoding a set of instructions to be executed by a machine and enabling the machine to perform any one or more of the methods of the present disclosure. Accordingly, the term “machine-readable storage medium” should be considered to include, but is not limited to, solid-state memory, optical media, and magnetic media.

[0053] Parts of the detailed description above have been presented in relation to algorithms and symbolic representations of operations on data bits within computer memory. These algorithmic descriptions and representations are methods used by those skilled in the art of data processing to most effectively convey the substance of their work to others skilled in the art. Here, an algorithm is generally considered to be a self-consistent sequence of operations that yields a desired result. Operations require the physical manipulation of such physical quantities. Generally, but not necessarily, these quantities take the form of electrical or magnetic signals that can be stored, combined, compared, or manipulated. It has sometimes proven convenient, primarily for reasons of general usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, etc.

[0054] However, it should be kept in mind that all such and similar terms relate to appropriate physical quantities and are merely convenient labels applied to such quantities. The present disclosure may refer to operations and processes of a computer system or a similar electronic computing device that manipulates and converts data represented as physical (electronic) quantities within the registers and memories of a computer system into other data represented as physical quantities within the computer system memories or registers or other such information storage systems.

[0055] The present disclosure also relates to an apparatus for performing the operations described herein. The apparatus may be specifically configured for intended purposes, or may include a general-purpose computer that is optionally activated or reconfigured by a computer program stored in the computer. Such computer program may be stored on a computer-readable storage medium, such as a floppy disk, an optical disk, a CD-ROM, and a magneto-optical disk, read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, a magnetic or optical card, or any type of disk suitable for storing electronic instructions connected to a computer system bus, respectively.

[0056] The algorithms and displays presented herein are not inherently related to any specific computer or other device. Various general-purpose systems may be used with programs according to the teachings of this invention, or it may be convenient to configure devices specialized for carrying out the methods. The structures of various such systems will be shown as presented in the description below. Furthermore, this disclosure is not described by reference to any specific programming language. It will be understood that various programming languages ​​may be used to implement the teachings of this disclosure as described herein.

[0057] The present disclosure may be provided as a computer program product or software that may include a machine-readable medium storing instructions that can be used to program a computer system (or other electronic device) to perform a process according to the present disclosure. The machine-readable medium includes any mechanism for storing information in a form readable by a machine (e.g., a computer). In some embodiments, the machine-readable (e.g., computer-readable) medium includes a machine-readable (e.g., computer-readable) storage medium such as read-only memory (“ROM”), random access memory (“RAM”), magnetic disk storage medium, optical storage medium, flash memory components, etc.

[0058] In the foregoing specification, embodiments of the present disclosure have been described with reference to specific exemplary embodiments. It will be apparent that various modifications may be made without departing from the broad spirit and scope of the embodiments of the present disclosure as set forth in the following claims. Accordingly, the specification and drawings should be regarded as illustrative rather than restrictive.

Claims

Claim 1 A system comprising: a memory component; and a processing unit operably coupled to the memory component, wherein a criterion for performing a garbage collection operation on a data block stored in the memory component is determined to be satisfied, wherein the garbage collection operation includes migrating one or more pages of the data block containing valid data for the management of the data block to another block; determining that a value associated with the importance of performing the garbage collection operation satisfies the condition; adjusting a parameter associated with performing the garbage collection operation in response to determining that the value associated with the importance satisfies the condition; and performing the garbage collection operation on the data block stored in the memory component using the adjusted parameter. Claim 2 In claim 1, in order to determine that the value associated with importance satisfies the condition, the processing device determines that the value associated with importance is less than a threshold value, a system. Claim 3 A system according to claim 1, wherein the value associated with importance is calculated by taking into account the amount of invalid data in the data block and the availability of additional data blocks to accept write requests from the host machine. Claim 4 In claim 1, to adjust the parameter, the processing device is a system that adjusts the parameter from a default parameter value to a modified parameter value. Claim 5 A system according to claim 1, wherein, in order to adjust the parameter, the processing device increases the time period allocated to perform the garbage collection operation. Claim 6 A system according to claim 1, wherein, in order to adjust the parameter, the processing device adjusts the timing waveform associated with the performance of the garbage collection operation. Claim 7 A system according to claim 1, wherein, in order to adjust the parameter, the processing device reduces the bitline precharge current associated with the garbage collection operation. Claim 8 A system according to claim 1, wherein, in order to adjust the above parameters, the processing device performs a target-only verification operation during program verification. Claim 9 A method performed by a processing device, comprising: a step of determining that a criterion for performing a garbage collection operation on a data block stored in a memory component of a memory subsystem is satisfied, wherein the garbage collection operation includes migrating one or more pages of the data block containing valid data for the management of the data block to another block; a step of determining that a value associated with importance for performing the garbage collection operation satisfies a first condition; a step of modifying a default value of a parameter associated with performing the garbage collection operation to a modified value when it is determined that the value associated with importance satisfies the first condition; and a step of performing the garbage collection operation on the data block stored in the memory component using the modified value of the parameter until the value associated with importance is changed to satisfy a second condition. Claim 10 A method according to claim 9, wherein the step of determining that the value associated with importance satisfies the first condition comprises the step of determining that the value associated with importance is less than a threshold value, wherein the value satisfies the second condition when the value is greater than or equal to the threshold value. Claim 11 In claim 9, the value associated with importance is calculated by taking into account the amount of invalid data in the data block and the availability of additional data blocks to accept write requests from the host machine. Claim 12 In claim 9, the step of modifying the default value of the parameter to a modified value includes the step of increasing the default time period allocated to perform the garbage collection operation to the modified time period. Claim 13 In claim 9, the step of modifying the default value of the parameter to a modified value includes the step of reducing the bitline precharge current associated with the garbage collection operation. Claim 14 In claim 9, the step of modifying the default value of the above parameter to a modified value includes the step of performing a target-only verification operation during program verification. Claim 15 A non-transient computer-readable storage medium, wherein, when executed by a processing unit, the processing unit determines that a criterion for performing a garbage collection operation on a data block stored in a memory component of a memory subsystem is satisfied, wherein the garbage collection operation includes migrating one or more pages of the data block containing valid data for the management of the data block to another block; determining that a value associated with the importance of performing the garbage collection operation satisfies a condition; adjusting a parameter associated with performing the garbage collection operation in response to the determination that the value associated with the importance satisfies the condition; and instructions for performing the garbage collection operation on the data block stored in the memory component using the adjusted parameter. Claim 16 In paragraph 15, a non-transient computer-readable storage medium in which, in order to determine that the value associated with importance satisfies the above condition, the processing device determines that the value associated with importance is less than a threshold value. Claim 17 In paragraph 15, a non-transient computer-readable storage medium, wherein the value associated with importance is calculated by taking into account the amount of invalid data in the data block and the availability of additional data blocks to accept write requests from the host machine. Claim 18 In paragraph 15, a non-transient computer-readable storage medium that, for adjusting the above parameter, allows the processing device to adjust the above parameter from a default parameter value to a modified parameter value. Claim 19 In paragraph 15, a non-transient computer-readable storage medium that increases the time period allocated for the processing device to perform the garbage collection operation in order to adjust the above parameters. Claim 20 In paragraph 15, a non-transient computer-readable storage medium that, in order to adjust the above parameters, the processing device reduces the bitline precharge current associated with the garbage collection operation.

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