Method for manufacturing substrate formed through via

Abstract

The present disclosure relates to a method for manufacturing a substrate having through-vias formed therein, comprising the steps of: forming through-holes penetrating the upper and lower surfaces of the substrate; forming an electrically insulating insulating layer covering the surface of the substrate and the inner surface of the through-holes; forming a seed layer made of an electrically conductive material on the insulating layer; filling metal into the through-holes of the substrate and forming metal layers on the upper and lower surfaces of the substrate; and electrolytically polishing the substrate to remove the metal layers and seed layers formed on the upper and lower surfaces of the substrate while leaving the metal filled into the through-holes intact. By preventing the etching of the metal filled into the through-holes, the electrical characteristics and structural stability of the electrical connection medium formed in the through-vias can be maintained.

Description

Technology Field

[0001] The present disclosure relates to a manufacturing method for producing a substrate having through-vias formed therein, which can be used in semiconductor packaging, display devices, high-performance electronic devices, etc. Background Technology

[0002] Generally, a through-via is a technology that forms a through-hole in a substrate and fills the inside of the through-hole with metal to perform electrical connections such as electrodes. Glass substrates or silicon substrates are typically used as substrates for such through-vias, and depending on the type of substrate, they are collectively referred to as Through Glass Via (TGV) or Through Silicon Via (TSV).

[0003] However, conventional through-glass electrode (TGV) or through-silicon electrode (TSV) formation technologies have various limitations and problems in the process. We will explain these conventional technical limitations and problems using the through-glass electrode (TGV) as an example.

[0004] First, there is a problem in that it is difficult to selectively remove the metal layer on the surface and the metal filled inside the through-hole of the glass-through electrode (TGV) during the post-processing step of removing the metal layer (e.g., Cu) formed on the surface after performing the through-hole electrode (TGV) process. When a post-processing step such as Chemical Mechanical Polishing (CMP) is applied, metal particles detached during the process of removing the metal layer formed on the surface can cause microscopic damage to the glass surface, and microcracks may occur due to physical pressure.

[0005] In addition, glass is formed with a structure that has a certain stress on the surface as it cools at a high temperature during the manufacturing process, or by strengthening the surface through chemical strengthening, and this strengthening layer can be removed by physically grinding it through chemical mechanical polishing (CMP).

[0006] Furthermore, in such processes, there is a high possibility that removed metal residues may remain on the surface of the glass substrate or inside the through-glass electrode (TGV), causing contamination problems. Such contamination can cause defects in subsequent processes and reduce the reliability of the overall manufacturing process. In addition, due to differences in physical and chemical properties between the glass substrate and the metal layer, there are difficulties in optimizing the process and problems such as increased costs. Prior art literature

[0007] (Patent Document 0001) KR 10-2019-0003050 A (2019.01.09) The problem to be solved

[0008] According to one aspect of the present disclosure, a method for manufacturing a substrate having through-vias is provided, which enables the maintenance of electrical characteristics along with structural stability of an electrical connection medium formed in the through-vias by preventing the etching of a metal filled inside the through-holes.

[0009] According to one aspect of the present disclosure, a method for manufacturing a substrate having through-vias formed therein is provided, which can control and perform selective removal between a metal filled inside a through-hole and a metal formed on the surface of a substrate by utilizing an electro-polishing (EP) process.

[0010] According to one aspect of the present disclosure, a method for manufacturing a substrate having through-vias formed therein is provided, wherein an insulating layer is formed on the surface of the substrate to efficiently remove a metal layer located on the surface of the substrate during an electrolytic polishing process. means of solving the problem

[0011] A method for manufacturing a substrate having through vias formed therein according to one aspect of the present disclosure may include the steps of: forming through holes penetrating the upper and lower surfaces of a substrate; forming an electrically insulating insulating layer covering the surface of the substrate and the inner surface of the through holes; forming a seed layer made of an electrically conductive material on the insulating layer; filling metal into the through holes of the substrate and forming metal layers on the upper and lower surfaces of the substrate; and electrolytically polishing the substrate to remove the metal layers and seed layers formed on the upper and lower surfaces of the substrate while leaving the metal filled into the through holes.

[0012] According to one embodiment, the step of forming the electrically insulating insulating layer may form the insulating layer as an inorganic insulating film.

[0013] According to one embodiment, the step of removing a metal layer and a seed layer formed on the upper and lower surfaces of the substrate by electrolytic polishing the substrate may include the steps of connecting the metal layer on the surface of the substrate to the positive electrode of a power supply and connecting the negative electrode of the power supply to an electrode in an electrolytic polishing tank in which an electrolytic polishing solution is stored, immersing the substrate connected to the power supply in the electrolytic polishing tank in which the electrolytic polishing solution is stored, and operating the power supply to induce ionization of the metal layer and the seed layer from the surface of the substrate and thereby remove them.

[0014] According to one embodiment, the step of removing the metal layer and seed layer formed on the upper and lower surfaces of the substrate by electrolytic polishing the substrate may be performed until the insulating layer formed on the surface of the substrate is exposed.

[0015] According to one embodiment, the step of immersing a substrate connected to the power supply unit into an electrolytic polishing bath in which an electrolytic polishing solution is stored is performed such that the substrate is immersed in the electrolytic polishing bath starting from the other end located opposite to the end connected to the anode, thereby preventing uneven polishing or short circuits that may occur during electrolytic polishing.

[0016] According to one embodiment, the step of immersing a substrate connected to the power supply into an electrolytic polishing bath in which an electrolytic polishing solution is stored may be performed after selective masking treatment is performed on the surface of the substrate.

[0017] According to one embodiment, the step of electrolytically polishing the substrate to leave the metal filled inside the through hole and removing the metal layer and seed layer formed on the upper and lower surfaces of the substrate may include: connecting the metal layer on the surface of the substrate to the positive electrode of a power supply and connecting the negative electrode of the power supply to an electrode in an electrolytic polishing tank in which an electrolytic polishing solution is stored; immersing the substrate connected to the power supply in an electrolytic polishing tank in which an electrolytic polishing solution is stored, such that the substrate and the electrode face each other; placing a shield between the substrate and the electrode arranged to face each other; and operating the power supply to control the distribution of the electric field within the electrolytic polishing solution through the shield, thereby inducing ionization of the metal layer and seed layer from the surface of the substrate and removing them.

[0018] According to one embodiment, the shield may include a rectangular basic frame and an opening formed within the basic frame.

[0019] According to one embodiment, the step of removing the metal layer and seed layer formed on the upper and lower surfaces of the substrate by electrolytic polishing the substrate involves arranging the substrate, which includes a metal layer connected to the positive electrode of the power supply, and the electrode connected to the negative electrode of the power supply in a different size ratio within the electrolytic polishing bath, and controlling the etching speed by controlling the electric field distribution within the electrolytic polishing solution during electrolytic polishing by the operation of the power supply.

[0020] According to one embodiment, the step of removing the metal layer and seed layer formed on the upper and lower surfaces of the substrate by electrolytic polishing the substrate can control the etching speed by varying the shape of the electrode connected to the negative electrode of the power supply and controlling the electric field distribution within the electrolytic polishing solution during electrolytic polishing by the operation of the power supply.

[0021] The features and advantages of the present disclosure will become more apparent from the following detailed description based on the accompanying drawings.

[0022] Terms and words used in this specification and claims shall not be interpreted in their ordinary and dictionary meanings, but shall be interpreted in a meaning and concept consistent with the technical spirit of this disclosure, based on the principle that the inventor may appropriately define the concept of the terms to best describe his invention. Effects of the invention

[0023] According to one embodiment of the present disclosure, etching of the metal filled inside the through hole can be prevented. Through this, the electrical characteristics, along with the structural stability of the electrical connection medium formed in the through via, can be maintained.

[0024] According to one embodiment of the present disclosure, selective removal between the metal filled inside the through hole and the metal formed on the surface of the substrate can be performed and controlled by utilizing an electro-polishing (EP) process.

[0025] According to one embodiment of the present disclosure, an insulating layer and a seed layer are formed on the surface of a substrate so that the metal layer located on the surface of the substrate can be effectively removed while leaving the metal filled in the through hole of the substrate during the electrolytic polishing process.

[0026] According to one embodiment of the present disclosure, a metal layer formed on the surface of a substrate is removed in an electrochemical manner using electrolytic polishing, so that the substrate is not damaged and flatness can be secured over the entire surface area of ​​the substrate in which through-vias are formed.

[0027] According to one embodiment of the present disclosure, the etching rate can be controlled by controlling the electric field distribution within the electrolytic polishing solution during electrolytic polishing, and the overall etching uniformity on the substrate can be improved.

[0028] According to one embodiment of the present disclosure, by utilizing electrolytic polishing, there are no limitations on the substrate size and a batch process is possible, thereby reducing mass production costs associated with the manufacture of the substrate. Brief explanation of the drawing

[0029] FIG. 1 is a drawing illustrating a method for manufacturing a substrate having through-vias formed therein according to one embodiment. FIG. 2 is a drawing showing a process of forming a through hole in a substrate in a method for manufacturing a substrate having through vias formed therein according to one embodiment. FIG. 3 is a diagram showing a process of forming an insulating layer on a substrate in a method for manufacturing a substrate having through-vias formed according to one embodiment. FIG. 4 is a diagram showing a process for forming a seed layer in a method for manufacturing a substrate having through-vias formed according to one embodiment. FIG. 5 is a diagram showing the process of filling metal into the through hole and forming a metal layer on the surface of the substrate in a method for manufacturing a substrate having through-vias formed according to one embodiment. FIG. 6 is a diagram showing a process of removing a metal layer and a seed layer formed on the surface of a substrate in a method for manufacturing a substrate having through-vias formed according to one embodiment. FIG. 7 is a diagram illustrating the step of removing a metal layer and a seed layer in a method for manufacturing a substrate having through-vias formed according to one embodiment. FIG. 8 is a drawing illustrating an electrolytic polishing facility and a process of electrolytic polishing using the same in a method for manufacturing a substrate having through-vias formed according to one embodiment. FIG. 9 is a diagram illustrating the immersion method of a substrate in a method for manufacturing a substrate having through-vias formed according to one embodiment. FIG. 10 is a diagram illustrating a method of controlling etching through masking treatment during electrolytic polishing in a method for manufacturing a substrate having through-vias formed according to one embodiment. FIG. 11 is a diagram illustrating a method of improving etching uniformity by using a shielding film during electrolytic polishing in a method for manufacturing a substrate having through-vias formed according to one embodiment. Figure 12 is a drawing explaining the structure of the shield used in Figure 11. FIG. 13 is a diagram illustrating the principle of preventing the etching of metal filled in a through hole in a method for manufacturing a substrate having through vias formed according to one embodiment. Specific details for implementing the invention

[0030] Hereinafter, the present disclosure will be described in detail (with reference to the attached drawings). However, this is merely illustrative and the present disclosure is not limited to the specific embodiments described illustratively.

[0031] Drawings may be schematic or exaggerated for the purpose of illustrating embodiments.

[0032] In this document, expressions such as "may include" and "may have" refer to the existence of the relevant feature (e.g., numerical values, functions, actions, or components, etc.) and do not exclude the existence of additional features.

[0033] Hereinafter, an embodiment of the present disclosure will be described in detail with reference to the attached drawings.

[0034] FIG. 1 is a drawing illustrating a method for manufacturing a substrate having through-vias formed according to one embodiment; FIG. 2 is a drawing showing a process of forming through-holes in a substrate according to one embodiment of a method for manufacturing a substrate having through-vias formed according to one embodiment; FIG. 3 is a drawing showing a process of forming an insulating layer in a substrate according to one embodiment of a method for manufacturing a substrate having through-vias formed according to one embodiment; FIG. 4 is a drawing showing a process of forming a seed layer according to one embodiment of a method for manufacturing a substrate having through-vias formed according to one embodiment; FIG. 5 is a drawing showing a process of filling metal into through-holes and forming a metal layer on the surface of a substrate according to one embodiment of a method for manufacturing a substrate having through-vias formed according to one embodiment; and FIG. 6 is a drawing showing a process of removing a metal layer and a seed layer formed on the surface of a substrate according to one embodiment of a method for manufacturing a substrate having through-vias formed according to one embodiment.

[0035] Referring to FIGS. 1 to 6, a method for manufacturing a substrate having through-vias formed according to the present disclosure may include the steps of: forming a through-hole (11) that penetrates the upper and lower surfaces of a substrate (10) (S10); forming an electrically insulating insulating layer (20) that covers the surface of the substrate (10) and the inner surface of the through-hole (11) (S20); forming a seed layer (30) made of an electrically conductive material on the insulating layer (20) (S30); filling a metal (40) inside the through-hole (11) of the substrate (10) and forming a metal layer (42) on the upper and lower surfaces of the substrate (10) (S40); and electrolytically polishing the substrate (10) to remove the metal layer (42) and the seed layer (30) formed on the upper and lower surfaces of the substrate (10), leaving the metal (40) filled inside the through-hole (11) (S50).

[0036] The step (S10) of forming a through hole (11) that penetrates the upper and lower surfaces of the substrate (10) is a step of forming a through hole (11) for use in electrical connection, such as an electrode, in the substrate (10), as shown in FIG. 2.

[0037] The substrate (10) may be formed from various materials. The substrate (10) may be a glass substrate or a silicon substrate.

[0038] In the step (S10) of forming a through hole (11) penetrating the upper and lower surfaces of the substrate (10), a through hole (11) can be formed in the substrate (10) using any one of the following methods: a laser method, a hydrogen fluoride (HF) etching method, or a PNL processing method. The laser method can form a through hole (11) in the substrate (10) by emitting a high-energy laser with short pulses (e.g., a femto laser). The hydrogen fluoride etching method can form a through hole (11) by drilling a small hole in the substrate (10) with a laser and then widening the hole by adding a chemical etching process using hydrogen fluoride. The PNL processing method can physically form a through hole (11) by spraying a fine powder-type abrasive onto the surface of the substrate (10) at high speed.

[0039] The step (S20) of forming an electrically insulating insulating layer (20) that covers the surface of the substrate (10) and the inner surface of the through hole (11) is a step of forming the insulating layer (20) using at least one method selected from physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD), as shown in FIG. 3.

[0040] In the step (S20) of forming an electrically insulating insulating layer (20) covering the surface of the substrate (10) and the inner surface of the through hole (11), the insulating layer (20) may be formed using an inorganic insulating film made of an electrically insulating material. In the step (S20) of forming an electrically insulating insulating layer (20) covering the surface of the substrate (10) and the inner surface of the through hole (11), titanium oxide (TiO2), aluminum oxide (Al2O3), zirconia (ZrO2), zinc oxide (ZnO), silica (SiO2), mullite (3Al2O3·2SiO2), silicon carbide (SiC), boron nitride (BN), aluminum nitride (AlN), silicon nitride (Si x N y An insulating layer (20) can be formed using at least one selected from among ). In addition, a wider variety of electrical insulating materials may be used.

[0041] In the step (S20) of forming an electrically insulating insulating layer (20) that covers the surface of the substrate (10) and the inner surface of the through hole (11), the insulating layer (20) can be formed with a thickness of 300 to 2000 Å. If the thickness of the insulating layer (20) is less than 300 Å, sufficient bonding strength cannot be obtained, and a non-uniform insulating layer may be formed. If the thickness of the insulating layer (20) exceeds 2000 Å, internal stress increases, which may cause cracking or peeling, and it is uneconomical, such as requiring a lot of cost and time.

[0042] The insulating layer (20) formed through the step (S20) of forming an electrically insulating insulating layer (20) that covers the surface of the substrate (10) and the inner surface of the through hole (11) can perform the function of severing the electrical connection with the metal (40) filled inside the through hole (11) of the substrate (10) during electrolytic polishing. Additionally, the insulating layer (20) can function as an adhesive layer to stably form the seed layer (30) formed in a subsequent step.

[0043] The step (S30) of forming a seed layer (30) with an electrically conductive material on an insulating layer (20) is a step of forming a seed layer (30) on an insulating layer (20) using at least one method selected from physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), and electroless plating, as illustrated in FIG. 4. The seed layer (30) can cover the surface of the substrate (10) and the inner surface of the through hole (11).

[0044] In the step (S30) of forming a seed layer (30) with an electrically conductive material on an insulating layer (20), the seed layer (30) can be formed using at least one selected from copper (Cu), gold (Au), silver (Ag), aluminum (Al), ruthenium (Ru), rubidium (Rb), palladium (Pd), and alloys containing these metals, which have excellent electrical conductivity. In addition, a wider variety of electrically conductive materials may be used.

[0045] In the step (S30) of forming a seed layer (30) with an electrically conductive material on an insulating layer (20), as an example, copper (Cu) can be used to form the seed layer (30).

[0046] In the step (S30) of forming a seed layer (30) with an electrically conductive material on an insulating layer (20), the seed layer (30) can be formed with a thickness of 500 to 10,000 Å. If the thickness of the seed layer (30) is less than 500 Å, sufficient bonding strength cannot be obtained, a non-uniform seed layer may be formed, and the quality of the seed layer may be degraded. If the thickness of the seed layer (30) exceeds 10,000 Å, internal stress may increase, causing cracking or delamination, and problems such as excessive etching may occur during the etching process to remove the seed layer may occur, and it is uneconomical, such as requiring a lot of cost and time.

[0047] The step (S40) of filling the metal (40) inside the through hole (11) of the substrate (10) and forming a metal layer (42) on the upper and lower surfaces of the substrate (10) is a step of filling the metal (40) inside the through hole (11) of the substrate (10) using a method such as electroplating or electroless plating, as shown in FIG. 5.

[0048] In the step (S40) of filling the metal (40) inside the through hole (11) of the substrate (10) and forming a metal layer (42) on the upper and lower surfaces of the substrate (10), a metal layer (42) can be naturally formed on the upper and lower surfaces of the substrate (1) respectively while filling the metal (40) inside the through hole (11) of the substrate (10) using a method such as electroplating or electroless plating.

[0049] In the step (S40) of filling a metal (40) inside a through hole (11) of a substrate (10) and forming a metal layer (42) on the upper and lower surfaces of the substrate (10), the metal (40) may be filled and the metal layer (42) formed using at least one selected from copper (Cu), gold (Au), silver (Ag), aluminum (Al), ruthenium (Ru), rubidium (Rb), palladium (Pd), and alloys containing these metals, which have excellent electrical conductivity. In addition, various other electrically conductive materials may be used.

[0050] In the step (S40) of filling the through hole (11) of the substrate (10) with metal (40) and forming a metal layer (42) on the upper and lower surfaces of the substrate (10), as an example, a seed layer (30) can be formed using copper (Cu).

[0051] Through the step (S40) of filling the metal (40) inside the through hole (11) of the substrate (10) and forming a metal layer (42) on the upper and lower surfaces of the substrate (10), the metal (40) filled inside the through hole (11) of the substrate (10) can be used for electrical connection purposes as an electrical connection medium, such as an electrode. The metal (40) filled inside the through hole (11) of the substrate (10) can function as a through electrode.

[0052] The step (S50) of removing the metal layer (42) and seed layer (30) formed on the upper and lower surfaces of the substrate (10) by electrolytic polishing the substrate (10) is a step of completing the manufacture of a substrate (1) in which a through-via is formed by leaving an insulating layer (20) on the upper and lower surfaces of the substrate (10) and leaving the metal (40) filled in the through-hole (11) as shown in FIG. 6. The insulating layer (20) and seed layer (30) may be left inside the through-hole (11) of the substrate (10) along with the filled metal (40).

[0053] FIG. 7 is a drawing illustrating the step of removing a metal layer and a seed layer in a method for manufacturing a substrate having through-vias formed according to one embodiment, FIG. 8 is a drawing illustrating an electrolytic polishing facility and a process of electrolytic polishing using the same in a method for manufacturing a substrate having through-vias formed according to one embodiment, and FIG. 9 is a drawing illustrating the method of immersing the substrate in a method for manufacturing a substrate having through-vias formed according to one embodiment.

[0054] Referring to FIGS. 7 and 8, in a method for manufacturing a substrate having through vias according to the present disclosure, the step (S50) of removing a metal layer (42) and a seed layer (30) formed on the upper and lower surfaces of a substrate (10) by electrolytic polishing the substrate (10) may include: a step (S52) of connecting the metal layer (42) on the surface of the substrate (10) to the positive (+) of a power supply (110) and connecting the negative (-) of the power supply (110) to an electrode (140) in an electrolytic polishing tank (120) in which an electrolytic polishing liquid (130) is stored; a step (S54) of immersing the substrate (10) connected to the power supply (110) in the electrolytic polishing tank (120) in which the electrolytic polishing liquid (130) is stored; and a step (S56) of operating the power supply (110) to induce ionization of the metal layer (42) and the seed layer (30) from the surface of the substrate (10) and removing them.

[0055] In step (S52) of connecting the metal layer (42) on the surface of the substrate (1) to the positive (+) of the power supply (110) and connecting the negative (-) of the power supply (110) to the electrode (140) in the electrolytic polishing tank (120) where the electrolytic polishing solution (130) is stored, the electrolytic polishing solution may include sulfuric acid, phosphoric acid, or a mixed solution thereof.

[0056] In the step (S54) of immersing the substrate (10) connected to the power supply (110) into the electrolytic polishing tank (120) in which the electrolytic polishing liquid (130) is stored, as shown in FIG. 8, the substrate (10) can be immersed in the electrolytic polishing liquid (130) by standing it vertically in the longitudinal direction. The entire substrate (10) can be immersed in the electrolytic polishing liquid (130) in a manner that completely accommodates it.

[0057] Additionally, in the step (S54) of immersing the substrate (10) connected to the power supply (110) into the electrolytic polishing tank (120) where the electrolytic polishing liquid (130) is stored, as shown in FIG. 9, the substrate (10) connected to the positive terminal (+) of the power supply (110) can be introduced into the electrolytic polishing tank (120) where the electrolytic polishing liquid (130) is stored, starting from the other end located opposite to it. With the substrate (10) standing vertically in the longitudinal direction, the immersion area within the electrolytic polishing tank (120) can be gradually widened from the bottom to the top. That is, the immersion depth of the substrate (10) can be gradually increased while immersing. In the present disclosure, the immersion depth of the substrate (10) can be increased in a constant manner through initial settings, and etching operations can be performed sequentially through repeated electrolytic polishing.

[0058] In this disclosure, by using a method of gradually increasing the immersion depth of the substrate (10) while immersing it, the following problems that may occur during electrolytic polishing while the substrate (10) is completely immersed in the electrolytic polishing solution (130) can be solved.

[0059] When electrolytic polishing is performed while the substrate (10) is completely immersed in the electrolytic polishing solution (130), the metal layer (42) formed on the upper and lower surfaces of the substrate (10) may be etched unevenly. As a result, a short circuit may occur on the substrate (10), and the electrical connection of the substrate (10) may be broken during the electrolytic polishing process. If a short circuit occurs due to uneven etching during the electrolytic polishing process, the electrical connection of the substrate (10) is broken, and thus a defect may occur in which the metal layer (42) and the seed layer (30) remain on the surface of the substrate (10) without being removed.

[0060] That is, in the present disclosure, by using a method of immersing the substrate (10) while gradually increasing the immersion depth, the phenomenon of the metal layer (42) being etched unevenly during electrolytic polishing can be prevented. The phenomenon of a short circuit occurring in the metal layer (42) during electrolytic polishing can be prevented. The occurrence of defects in which the metal layer (42) and the seed layer (30) remain on the surface of the substrate (10) without being removed can be prevented.

[0061] The step (S56) of operating the power supply (110) to induce ionization of the metal layer (42) and the seed layer (30) from the surface of the substrate (10) and removing them is a step of etching treatment by inducing dissolution by ionization of the metal material by applying voltage through the power supply (110) and concentrating the current density on the surface of the substrate (10).

[0062] The step (S56) of operating the power supply (110) to induce ionization of the metal layer (42) and seed layer (30) from the surface of the substrate (10) and removing them may substantially be a process of performing electrolytic polishing. By inducing dissolution through ionization of the metal material, an etching operation can be performed on the surface of the substrate (10). This etching operation may proceed to the metal layer (42) and seed layer (30) of the metal material formed on the surface of the substrate (10).

[0063] In the step (S56) of operating the power supply (110) to induce ionization of the metal layer (42) and seed layer (30) from the surface of the substrate (10) and removing them, etching can proceed from the surface of the substrate (10) to the metal layer (42) and seed layer (30) through electrolytic polishing. That is, as shown in FIG. 6, the surface of the substrate (10) can be etched and removed up to the seed layer (30) corresponding to the metal material. The insulating layer (20) and seed layer (30) may be left inside the through hole (11) of the substrate (10) along with the filled metal (40).

[0064] In the step (S56) of operating the power supply (110) to induce ionization of the metal layer (42) and seed layer (30) from the surface of the substrate (10) and removing them, when the metal layer (42) and seed layer (30) corresponding to the metal material are removed from the surface of the substrate (10), the electrical connection during electrolytic polishing is cut off by the electrically insulating layer (20), and the etching operation on the substrate (10) slows down and stops. That is, in the present disclosure, by utilizing the electrically insulating layer (20), the metal layer (42) and seed layer (30) corresponding to the metal material can be effectively removed from the surface of the substrate (10) during electrolytic polishing, and since the insulating layer (20) cuts off the electrical connection with the metal (40) filled inside the through hole (11), the metal (40) inside the through hole (11) can be prevented from being etched and damaged. In addition, in the present disclosure, selective etching and removal from the substrate (10) during electrolytic polishing is possible, and planarization of the surface of the substrate (10) can be performed.

[0065] In addition, in the step (S56) of operating the power supply (110) to induce ionization of the metal layer (42) and the seed layer (30) from the surface of the substrate (10) and removing them, if a method of gradually increasing the immersion depth of the substrate (10) is introduced, repetitive electrolytic polishing can be performed. That is, local etching operations can be repeatedly performed on the substrate (10). At this time, process conditions such as the voltage and current applied to the electrolytic polishing solution (130), the composition of the electrolytic polishing solution (130), and the processing temperature can be adjusted according to the setting of the immersion depth of the substrate (10). Through this, the degree of etching and the uniformity of etching on the surface of the substrate (10) can be improved.

[0066] As described above, in the present disclosure, the step (S50) of removing the metal layer (42) and seed layer (30) formed on the upper and lower surfaces of the substrate (10) by electrolytic polishing of the substrate (10) can be performed until the insulating layer (20) formed on the surface of the substrate (10) is exposed.

[0067] In the step (S50) of removing the metal layer (42) and seed layer (30) formed on the upper and lower surfaces of the substrate (10) by electrolytic polishing the substrate (10), when the metal layer (42) and seed layer (30) are all removed from the surface of the substrate (10), the amount of current is greatly reduced, so it can be confirmed that the etching operation by electrolytic polishing is completed.

[0068] Accordingly, in the present disclosure, a substrate (1) having excellent quality through-vias formed thereon can be manufactured by cleanly removing all metal material formed on the surface of the substrate (10). The substrate (1) having through-vias formed thereon can be used in various fields such as semiconductor packaging, display devices, and high-performance electronic devices.

[0069] In addition, in the present disclosure, only the metal material formed on the surface of the substrate (10) can be effectively removed, and the etching of the metal (40) filled inside the through hole (11) of the substrate (10) can be prevented. Through this, structural stability can be secured and electrical characteristics can be maintained when the metal (40) filled inside the through hole (11) of the substrate (10) is used as an electrical connection medium or through electrode formed in the through via.

[0070] In addition, the present disclosure allows for selective removal and control between the metal (40) filled inside the through hole (11) of the substrate (10) and the metal (metal layer and seed layer) formed on the surface of the substrate (10) by utilizing an electro-polishing (EP) process.

[0071] In addition, in the present disclosure, by utilizing electrolytic polishing for etching, the metal layer (42) and seed layer (30) formed on the surface of the substrate (10) are removed in an electrochemical manner, so that no damage is caused to the substrate (10), and flatness can be secured over the entire surface area of ​​the substrate (1) in which the through-via is formed.

[0072] In addition, in the present disclosure, by utilizing electrolytic polishing for etching, there is no limitation on the size of the substrate (10) and the batch process can be carried out, thereby reducing the mass production cost associated with manufacturing the substrate (1) in which through-vias are formed.

[0073] Meanwhile, the present disclosure allows for the improvement of overall etching uniformity by controlling the etching rate of a specific region during electrolytic polishing, and this is explained in detail as follows.

[0074] FIG. 10 is a diagram illustrating a process for controlling etching through masking treatment during electrolytic polishing in a method for manufacturing a substrate having through-vias formed according to one embodiment.

[0075] Referring to FIG. 10, in the step (S54) of immersing a substrate (10) connected to a power supply (110) in an electrolytic polishing tank (120) in which an electrolytic polishing liquid (130) is stored, the substrate (10) may be immersed in the electrolytic polishing tank (120) after performing a selective masking (150) treatment on the surface of the substrate (10).

[0076] A masking film or the like may be used for the masking (150) treatment. In such a selective masking (150) treatment area, the metal layer (42) and the seed layer (30) may be left unetched during electrolytic polishing. Through this masking (150) treatment, the etching speed and degree of etching for a specific area of ​​the substrate (10) can be controlled.

[0077] In addition, in the present disclosure, the etching speed and etching degree of a specific area of ​​the substrate (10) can be controlled by changing the electrode shape or current supply method during electrolytic polishing and by applying pulsed current / voltage.

[0078] Through this, the present disclosure can improve the etching uniformity of the metal region (metal layer and seed layer) formed on the surface of the substrate (10) during electrolytic polishing.

[0079] FIG. 11 is a drawing illustrating a method for improving etching uniformity by using a shielding film during electrolytic polishing in a method for manufacturing a substrate having through-vias formed according to one embodiment, and FIG. 12 is a drawing illustrating the structure of the shielding film used in FIG. 11. Refer to FIG. 5 together.

[0080] Referring to FIGS. 11 and 12, the step (S50) of removing the metal layer (42) and seed layer (30) formed on the upper and lower surfaces of the substrate (10) by electrolytic polishing of the substrate (10) in the present disclosure comprises: connecting the metal layer (42) on the surface of the substrate (10) to the positive (+) of the power supply (110) and connecting the negative (-) of the power supply (110) to the electrode (140) in the electrolytic polishing tank (120) in which the electrolytic polishing liquid (130) is stored; immersing the substrate (10) connected to the power supply (110) in the electrolytic polishing tank (120) in which the electrolytic polishing liquid (130) is stored, such that the substrate (10) and the electrode (140) face each other; placing a shield (160) between the substrate (10) and the electrode (140) arranged to face each other; and operating the power supply (10). The method may include a step of inducing and removing the ionization of the metal layer (42) and the seed layer (30) from the surface of the substrate (10) while controlling the distribution of the electric field within the electrolytic polishing solution (130) through the shielding layer (160).

[0081] As illustrated in FIG. 12, the shield (160) may include a rectangular base frame (161) and an opening (162) formed within the base frame (161). The base frame (161) may be formed in any one of the following shapes: a rectangular border [see FIG. 12 (a)], an inverted cross border [see FIG. 12 (b)], a mesh border [see FIG. 12 (c)], or a cross border [see FIG. 12 (d)]. An opening (162) may be formed within the base frame (161) corresponding to the base frame (161) of these examples. The base frame (161) having the shapes listed above and the opening (162) formed corresponding thereto are not particularly limited to these examples and may be formed in a more diverse manner.

[0082] The shield (160) can control the electric field distribution within the electrolytic polishing liquid (130) during electrolytic polishing by the operation of the power supply (110) according to the shape of the opening (162) formed within the basic frame (161). By controlling the electric field distribution using the shield (160) in this way, the etching speed for a specific area of ​​the substrate (10) can be controlled. Through this, the etching uniformity over the entire substrate (10) can be improved.

[0083] In addition, in the present disclosure, the electric field distribution within the electrolytic polishing liquid (130) during electrolytic polishing by the operation of the power supply (110) can be controlled by adjusting the size ratio between the substrate (10), which includes a metal layer (42) connected to the positive (+) terminal of the power supply (110), and the electrode (140), which is connected to the negative (-) terminal of the power supply (110). As an example, the size ratio between the substrate (10) and the electrode (140) can be formed differently in the form of 1:1, 2:1, 1:2, etc. By adjusting the size ratio between the substrate (10) and the electrode (140) in this way to induce a different electric field distribution, the etching speed of the end portion and the central portion of the substrate (10) can be controlled.

[0084] In addition, in the present disclosure, the electric field distribution within the electrolytic polishing liquid (130) during electrolytic polishing by the operation of the power supply (110) may be controlled by varying the shape of the electrode (140) connected to the negative electrode (-) of the power supply (110).

[0085] Accordingly, in the present disclosure, the etching rate for a specific area of ​​the substrate (10) can be controlled through a method selected from the use of a shield (160), the adjustment of the size ratio between the substrate (10) and the electrode (140), and the adjustment of the shape of the electrode (140). Through this, the etching uniformity over the entire substrate (10) can be easily improved.

[0086] FIG. 13 is a diagram illustrating the principle of preventing the etching of metal filled in a through hole in a method for manufacturing a substrate having through vias formed according to one embodiment. In FIG. 11, (a) is an embodiment according to the present disclosure, and (b) is a diagram showing a comparative example.

[0087] In FIG. 13 (a), as an embodiment according to the present disclosure, an insulating layer (20) and a seed layer (30) are formed on a substrate (10) having a through hole formed therein, and a metal (40) is filled inside the through hole of the substrate (10) and a metal layer (42) is formed on the upper and lower surfaces of the substrate (10), and then electrolytic polishing is performed to remove the metal layer (42) and the seed layer (30) from the surface of the substrate (10).

[0088] When looking at the substrate (right drawing of the embodiment) in which the through-via is formed after the electrolytic polishing process according to the embodiment of the present disclosure, it is shown that the metal material of the metal layer (42) and the seed layer (30) on the surface of the substrate (10) has been completely removed, and the metal (40) filled inside the through-hole is not etched and is completely preserved. This indicates that in the embodiment of the present disclosure, when the metal material of the metal layer (42) and the seed layer (30) is completely removed during electrolytic polishing, the electrical connection for the etching operation is cut off by the insulating layer (20), and the etching operation on the substrate (10) is slowed down and stopped. Accordingly, when the insulating layer (20) is exposed on the substrate (10), the electrical connection for electrolytic polishing is cut off, so the etching operation is stopped, and the etching of the metal (40) filled inside the through-hole can be prevented and damage can be prevented. Structural stability can be greatly ensured when manufacturing a substrate in which a through-via is formed. In addition, since there is no damage to the metal (40) filled inside the through-hole of the substrate (10), it is shown that electrical characteristics can be well maintained when used as a through-via.

[0089] In FIG. 13 (b), as a comparative example to explain the difference from the embodiment, an electrically conductive layer (20A) and a seed layer (30A) are formed on a substrate (10) having a through hole formed therein, and a metal (40A) is filled inside the through hole of the substrate (10) and a metal layer (42A) is formed on the upper and lower surfaces of the substrate (10). Then, electrolytic polishing is performed to remove the metal layer (42A) and the seed layer (30A) from the surface of the substrate (10). At this time, the conductive layer (20A) may be formed from a metal material such as titanium (Ti) or chromium (Cr).

[0090] Looking at the substrate with through-vias formed up to the electrolytic polishing process in the comparative example (right drawing of the comparative example), it is shown that the metal layer (42A) and the seed layer (30A) formed on the surface of the substrate (10) have both been removed by electrolytic polishing. However, since the electrical connection is maintained through the conductive layer (20A), the etching operation for electrolytic polishing continues. In addition, since the conductive layer (20A) maintains an electrical connection with the metal (40A) filled inside the through-hole, etching inevitably continues to proceed along with the conductive layer (20A) and the metal (40A) filled inside the through-hole. Consequently, damage caused by etching occurs to the metal (40A) filled inside the through-hole of the substrate (10), making it difficult to ensure structural stability when manufacturing the substrate with through-vias. In addition, it shows that there is difficulty in exhibiting electrical characteristics when used as a through-via because excessive etching and resulting damage occur in the metal (40A) filled inside the through-hole of the substrate (10). It shows that defects occur in the manufactured product.

[0091] Accordingly, in the present disclosure, a substrate (1) with high-quality through-vias formed therein can be manufactured by utilizing structural improvements and electrolytic polishing technology. In particular, it is possible to achieve the effect of maintaining electrical characteristics well, along with structural stability of the electrical connection medium formed in the through-vias.

[0092] The present disclosure has been described in detail through specific embodiments. The description above is merely an example of applying the principles of the present disclosure, and other components may be further included or substituted without departing from the scope of the present invention. Explanation of the symbols

[0093] 1: Substrate with through-vias formed 10: Substrate 20: Insulating layer 30: Seed layer 40: Metal 42: Metal layer 110: Power supply 120: Electrolytic polishing tank 130: Electrolytic polishing solution 140: Electrode 150: Masking 160: Barrier

Claims

Claim 1 The method comprises the steps of: forming a through hole penetrating the upper and lower surfaces of a substrate; forming an electrically insulating layer covering the surface of the substrate and the inner surface of the through hole; forming a seed layer made of an electrically conductive material on the insulating layer; filling a metal into the through hole of the substrate and forming a metal layer on the upper and lower surfaces of the substrate; and electrolytically polishing the substrate to leave the metal filled into the through hole and removing the metal layer and seed layer formed on the upper and lower surfaces of the substrate, wherein the step of removing the metal layer and seed layer formed on the upper and lower surfaces of the substrate comprises the steps of: connecting the positive electrode of a power supply to the metal layer at one end of the substrate and connecting the negative electrode of the power supply to an electrode in an electrolytic polishing tank in which an electrolytic polishing solution is stored; and immersing the substrate connected to the power supply into the electrolytic polishing tank in which the electrolytic polishing solution is stored, wherein the substrate is immersed in the electrolytic polishing tank starting from the other end located opposite to the one end of the substrate. A method for manufacturing a substrate having through-vias, comprising the step of operating the power supply and sequentially removing a metal layer and a seed layer formed on the upper and lower surfaces of the substrate while gradually increasing the immersion depth of the substrate until an insulating layer formed on the surface of the substrate is exposed. Claim 2 A method for manufacturing a substrate having through vias formed therein, wherein the step of forming the electrically insulating insulating layer is to form the insulating layer as an inorganic insulating film. Claim 3 delete Claim 4 delete Claim 5 delete Claim 6 A method for manufacturing a substrate having through vias formed therein, wherein the step of immersing in the electrolytic polishing bath is to immerse the substrate in the electrolytic polishing bath after performing a selective masking treatment on the surface of the substrate. Claim 7 A method for manufacturing a substrate having through-vias, wherein, in claim 1, the step of removing a metal layer and a seed layer formed on the upper and lower surfaces of the substrate is performed in a state in which the substrate and the electrode are arranged to face each other, and a shield is arranged between the substrate and the electrode to control the distribution of an electric field in an electrolytic polishing solution. Claim 8 A method for manufacturing a substrate having through vias formed therein, wherein the shielding comprises a rectangular basic frame; and an opening formed within the basic frame. Claim 9 A method for manufacturing a substrate having through-vias according to claim 1, wherein the step of removing a metal layer and a seed layer formed on the upper and lower surfaces of the substrate comprises arranging the substrate, which includes a metal layer connected to the positive electrode of the power supply, and the electrode connected to the negative electrode of the power supply in an electrolytic polishing bath with a different size ratio, and controlling the etching speed by controlling the electric field distribution in the electrolytic polishing solution during electrolytic polishing by the operation of the power supply. Claim 10 A method for manufacturing a substrate having through-vias formed therein, wherein the step of removing a metal layer and a seed layer formed on the upper and lower surfaces of the substrate involves varying the shape of an electrode connected to the negative electrode of the power supply and controlling the etching speed by controlling the electric field distribution in the electrolytic polishing solution during electrolytic polishing by the operation of the power supply.

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