Charger integrated circuit for charging battery device and electronic device including the same

KR103004130B1Active Publication Date: 2026-08-12SAMSUNG ELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2020-10-30
Publication Date
2026-08-12

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Abstract

A charging integrated circuit according to an exemplary embodiment of the present disclosure comprises a battery device configured to include a first and a second battery, a connection circuit configured to connect the first battery and the second battery in series or in parallel, a first charger configured to charge the first and second batteries connected in parallel in a first charging mode, and a second charger configured to charge the first and second batteries connected in series in a second charging mode, wherein the connection circuit comprises a first adjustment circuit connected in series to the first battery and configured to adjust a first balancing current flowing to the first battery, and a second adjustment circuit connected in series to the second battery and configured to adjust a second balancing current flowing to the second battery.
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Description

Technology Field

[0001] The technical concept of the present disclosure relates to a charger, and more specifically, to a charging integrated circuit for charging a battery device comprising a plurality of batteries and an electronic device comprising the same. Background Technology

[0002] Portable electronic devices, such as mobile phones, include batteries. As next-generation communication technologies continue to evolve, the power required for data processing in mobile phones is steadily increasing. Since current battery capacities inevitably limit usage time, there is a demand for increased battery capacity; consequently, the importance of fast charging for batteries is also growing. The problem to be solved

[0003] The problem that the technical concept of the present disclosure aims to solve is to provide a charging integrated circuit capable of supporting various charging modes for a battery device and stably supplying system power using a battery device by preventing the flow of high current that may damage a plurality of batteries, and an electronic device including the same. means of solving the problem

[0004] A charging integrated circuit according to an exemplary embodiment of the present disclosure comprises a battery device configured to include a first and a second battery, a connection circuit configured to connect the first battery and the second battery in series or in parallel, a first charger configured to charge the first and second batteries connected in parallel in a first charging mode, and a second charger configured to charge the first and second batteries connected in series in a second charging mode, wherein the connection circuit comprises a first adjustment circuit connected in series to the first battery and configured to adjust a first balancing current flowing to the first battery, and a second adjustment circuit connected in series to the second battery and configured to adjust a second balancing current flowing to the second battery.

[0005] A charging integrated circuit according to an exemplary embodiment of the present disclosure comprises: a first and a second battery; a switching charger configured to charge the first and second batteries using a first charging input received from a first input terminal in a normal charging mode; a direct charger configured to charge the first and second batteries using a second charging input received from a second input terminal in a fast charging mode; and a connection circuit configured to connect the first battery and the second battery in series or in parallel with each other, wherein the connection circuit comprises first and second switching elements for connecting the first and second batteries in series or in parallel with each other, a first adjustment circuit configured to adjust a first balancing current flowing to the first battery, and a second adjustment circuit configured to adjust a second balancing current flowing to the second battery.

[0006] An electronic device according to an exemplary embodiment of the present disclosure comprises a charging integrated circuit for charging a battery device including first and second batteries and a system load configured to receive power from the charging integrated circuit, wherein the charging integrated circuit comprises a connection circuit configured such that the first battery and the second battery are connected in series or in parallel to each other, a first charger connected to the system load and configured to charge the first and second batteries connected in parallel to each other through a first charging path in a first charging mode, and a second charger configured to charge the first and second batteries connected in series to each other through a second charging path in a second charging mode, and wherein the connection circuit comprises a first adjustment circuit configured to adjust a first balancing current flowing to the first battery and a second adjustment circuit configured to adjust a second balancing current flowing to the second battery. Effects of the invention

[0007] The charging integrated circuit according to the exemplary embodiment of the present disclosure can efficiently charge a plurality of batteries by changing the connection relationship of the batteries based on various charging modes, and has the effect of enabling stable power supply through the batteries by adjusting the balancing current generated by the voltage difference between the batteries to a degree that prevents the batteries from degrading.

[0008] The effects obtainable from the exemplary embodiments of the present disclosure are not limited to those mentioned above, and other unmentioned effects can be clearly derived and understood by those skilled in the art to which the exemplary embodiments of the present disclosure belong from the description below. That is, unintended effects resulting from the implementation of the exemplary embodiments of the present disclosure can also be derived by those skilled in the art from the exemplary embodiments of the present disclosure. Brief explanation of the drawing

[0009] FIG. 1 is a block diagram schematically illustrating an electronic device according to an exemplary embodiment of the present disclosure. FIGS. 2a and 2b are drawings illustrating an electronic device according to an exemplary embodiment of the present disclosure. FIG. 3a is a circuit diagram exemplarily showing the first switch element shown in FIG. 2a, and FIG. 3b is a circuit diagram exemplarily showing the direct charger shown in FIG. 2a. FIG. 4 is a drawing showing a first charging mode of a charging integrated circuit according to an exemplary embodiment of the present disclosure. FIG. 5 is a diagram showing a second charging mode of a charging integrated circuit according to an exemplary embodiment of the present disclosure. FIG. 6 is a diagram showing a battery-only mode of a charging integrated circuit according to an exemplary embodiment of the present disclosure. FIG. 7 is a block diagram showing a charging integrated circuit according to an exemplary embodiment of the present disclosure. FIG. 8 is a flowchart illustrating a method for adjusting a balancing current according to an exemplary embodiment of the present disclosure. FIG. 9 is a flowchart illustrating a method for adjusting a balancing current according to an exemplary embodiment of the present disclosure. FIGS. 10a and FIGS. 10b are drawings for illustrating a method of adjusting a balancing current in battery-only mode according to an exemplary embodiment of the present disclosure. FIG. 11 is a flowchart illustrating an exemplary embodiment of step S220 of FIG. 9. FIGS. 12a and FIGS. 12b are flowcharts illustrating exemplary embodiments of step S220. FIG. 13 is a timing diagram for explaining a method for adjusting a first balancing current according to an embodiment disclosed in FIG. 12a and FIG. 12b. FIGS. 14a to 14d are drawings showing a first adjustment circuit according to an exemplary embodiment of the present disclosure. FIG. 15 is a flowchart for explaining the balancing operation in a high-speed charging mode according to an exemplary embodiment of the present disclosure. FIGS. 16a to 17b are drawings for explaining balancing operations in a high-speed charging mode according to an exemplary embodiment of the present disclosure. FIGS. 18a and FIGS. 19b are drawings for illustrating a method for improving the balancing speed in a balancing operation according to an exemplary embodiment of the present disclosure. FIG. 20 is a flowchart illustrating a method for determining whether a battery device including first and second batteries is fully charged according to an exemplary embodiment of the present disclosure. FIG. 21 is a flowchart for explaining a method for controlling a charging input during a charging operation according to an exemplary embodiment of the present disclosure. FIG. 22 is a block diagram showing an electronic device according to an exemplary embodiment of the present disclosure. Specific details for implementing the invention

[0010] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the attached drawings.

[0011] FIG. 1 is a block diagram schematically illustrating an electronic device (10) according to an exemplary embodiment of the present disclosure. Referring to FIG. 1, the electronic device (10) may include a charging integrated circuit (IC) (100), and the charging integrated circuit (100) may be referred to as a "battery charger." For example, the charging integrated circuit (100) may be implemented as an integrated circuit chip and may be mounted on a printed circuit board. For example, the electronic device (10) may be a mobile device such as a smartphone, a tablet PC (Personal Computer), a mobile phone, a PDA (Personal Digital Assistant), a laptop, a wearable device, a GPS (Global Positional System) device, an e-book reader, a digital broadcasting terminal, an MP3 player, a digital camera, etc. Furthermore, the electronic device (10) may be a device that performs the Internet of Things or a device included in an electric vehicle.

[0012] Additionally, the electronic device (10) may include a battery device (200). In one embodiment, the battery device (200) may be embedded in the electronic device (10). In one embodiment, the battery device (200) may be detachable from the electronic device (10). The battery device (200) may include a first battery (BAT1) and a second battery (BAT2). The battery device (200) may include first and second terminals (T1, T2) to which a current for charging is supplied. In some embodiments, the battery device (200) may include three or more batteries. The first terminal (T1) may be configured to receive a first charging current (ICH_1) for charging the first and second batteries (211, 212) connected in parallel in a first charging mode to be described later. The second terminal (T2) may be configured to receive a second charging current (ICH_2) for charging the first and second batteries (211, 212) connected in series in the second charging mode to be described later. Since a higher voltage may be applied to the second terminal (T2) in the second charging mode than to the first terminal (T1) in the first charging mode, it may also be referred to as a high-voltage terminal.

[0013] In an exemplary embodiment, the first battery (211) may be a first battery cell and the second battery (212) may be a second battery cell. Additionally, the first battery (211) may be a first battery pack and the second battery (212) may be a second battery pack. In some embodiments, at least one of the first and second battery packs may be a multi-cell battery comprising a plurality of battery cells. Furthermore, at least one of the first and second battery packs may be a single-cell battery comprising a single battery cell.

[0014] The charging integrated circuit (100) may include a first charger (110), a second charger (120), and a connection circuit (130). The charging integrated circuit (100) may operate in either a first or second charging mode to charge the battery device (200), and in a battery-only mode (or, discharge mode), may provide power (or, system voltage, or system current) to a system load (not shown) through the battery device (200). In an exemplary embodiment, the first charger (110), the second charger (120), and the connection circuit (130) may be implemented as a single integrated circuit. However, the present disclosure is not limited thereto, and in some embodiments, at least one of the first charger (110), the second charger (120), and the connection circuit (130) may be implemented as separate integrated circuits. For example, the first and second chargers (110, 120) may be implemented as a first integrated circuit, and the connection circuit (130) may be implemented as a second integrated circuit. Furthermore, the connection circuit (130) may be implemented as a single chip together with the battery device (200), or the connection circuit (130) may be implemented independently as a single chip.

[0015] The charging integrated circuit (100) may be configured to receive a charging input (CHGIN). For example, the charging input (CHGIN) may correspond to a charging current having a constant value during the CC (Constant Current) section and a charging voltage having a constant value during the CV (Constant Voltage) section while charging the battery device (200).

[0016] In an exemplary embodiment, the charging integrated circuit (100) is connected to a TA (Travel Adapter, not shown) and can receive a charging input (CHGIN) from the TA (not shown). The TA (not shown) can convert power supplied from household power, such as AC 110 to 220V or other power supply means (e.g., a computer), into DC power required for battery charging and provide it to the electronic device (10). In an exemplary embodiment, the charging integrated circuit (100) is connected to an auxiliary battery (not shown) and can charge the battery device (200) using the DC power received from the auxiliary battery (not shown). Additionally, the charging integrated circuit (100) is connected to a wireless charging circuit (not shown) or configured to include a wireless charging circuit (not shown) and can receive a charging input (CHGIN) from the wireless charging circuit (not shown).

[0017] The first charger (110) may be connected to the first terminal (T1) of the battery device (200), and the second charger (120) may be connected to the second terminal (T2) of the battery device (200). In an exemplary embodiment, when a charging input (CHGIN) is received, either of the first and second chargers (110, 120) may be selected to perform a charging operation for the battery device (200). However, the present disclosure is not limited thereto, and in some embodiments, the first and second chargers (110, 120) upon receiving the charging voltage (CHGIN) may simultaneously perform a charging operation for the battery device (220).

[0018] In an exemplary embodiment, the first charger (110) may receive a charging input (CHGIN) and generate a first charging current (ICH_1). The first charger (110) may provide the first charging current (ICH_1) to the first terminal (T1) of the battery device (200). For example, the first charger (110) may be a switching charger or a linear charger. In an exemplary embodiment, the first charger (110) may be activated in a first charging mode, and the first charging mode may correspond to a normal charging mode.

[0019] In an exemplary embodiment, the second charger (120) may receive a charging input (CHGIN) and generate a second charging current (ICH_2). The second charger (120) may provide the second charging current (ICH_2) to the second terminal (T2) of the battery device (200). For example, the second charger (120) may be activated in a second charging mode, and the second charging mode may be a fast charging mode. Thus, the battery device (200) may be charged faster in the second charging mode than in the first charging mode.

[0020] In an exemplary embodiment, the connection circuit (130) may be configured such that the first and second batteries (211, 212) are connected in parallel to each other in a first charging mode, and the first and second batteries (211, 212) are connected in series to each other in a second charging mode. Additionally, the connection circuit (130) may be configured such that the first and second batteries (211, 212) are connected in parallel to each other in a battery-only mode. Hereinafter, the operating mode may collectively refer to the battery-only mode, the first and second charging modes.

[0021] The connection circuit (130) may include a plurality of switch elements (not shown) for controlling the connection relationship of the first and second batteries (211, 212). Meanwhile, the connection circuit (130) may be configured to balance the voltage of the first battery (211) and the voltage of the second battery (212). Specifically, the connection circuit (13) may control the connection of the first and second batteries (211, 212) according to an operating mode, and the connection-controlled first and second batteries (211, 212) may overcharge among the first and second batteries (211, 212), undercharge using the energy of the battery having a relatively high voltage, or charge the battery having a relatively low voltage. Thus, the voltages of the first and second batteries (211, 212) can be mutually balanced.

[0022] Meanwhile, a balancing current flows through the first battery (211) or the second battery (212) to balance the voltages of the first and second batteries (211, 212). If the difference between the voltage of the first battery (211) and the voltage of the second battery (212) exceeds a certain value, the balancing current may become larger than the allowable value to the extent that it causes deterioration of the first battery (211) or the second battery (212).

[0023] To prevent the above problem, the connection circuit (130) according to the exemplary embodiment may include first and second adjustment circuits (131, 132). The first adjustment circuit (131) may first receive and adjust a first balancing current flowing to the first battery (211) and provide the adjusted first balancing current to the first battery (211). The second adjustment circuit (132) may first receive and adjust a second balancing current flowing to the second battery (212) and provide the adjusted second balancing current to the second battery (212). Hereinafter, the operation of adjusting the balancing current to be lower than the reference current may be referred to as the operation of adjusting the balancing speed to be lower. In other words, the charging integrated circuit (100) may adjust the speed in the balancing operation between the voltages of the first and second batteries (211, 212).

[0024] In an exemplary embodiment, the first and second adjustment circuits (131, 132) can each adjust the first and second balancing currents to be below a predetermined reference current, taking into account the loss that may occur according to the flow of the first and second balancing currents. The first and second adjustment circuits (131, 132) can continuously check whether the first and second balancing currents exceed the reference current by monitoring the first and second balancing currents, and when either of the first and second balancing currents exceeds the reference current, either of the first and second adjustment circuits (131, 132) can perform an adjustment operation.

[0025] In an exemplary embodiment, the first and second adjustment circuits (131, 132) can each adjust the first and second balancing currents based on the temperature of the electronic device (10). The electronic device (10) may further include a temperature sensor (not shown) that senses an internal temperature, and the first and second adjustment circuits (131, 132) can each adjust the first and second balancing currents by receiving a signal from the outside that corresponds to the temperature sensed by the temperature sensor (not shown).

[0026] In some embodiments, the charging integrated circuit (100) may further include a circuit or block that supports at least one of various functions, such as an under-voltage lockout (UVLO) function, an over-current protection (OCP) function, an over-voltage protection (OVP) function, a soft-start function to reduce inrush current, a foldback current limit function, a Hiccup Mode function for short-circuit protection, and an over-temperature protection (OTP) function, so as to operate properly even under power saving conditions.

[0027] The charging integrated circuit (100) according to an exemplary embodiment of the present disclosure can efficiently charge a plurality of batteries by changing the connection relationship of the batteries based on various charging modes, and has the effect of enabling stable power supply through the batteries by adjusting the balancing current generated by the voltage difference between the batteries to a degree such that the batteries do not deteriorate.

[0028] FIGS. 2a and 2b are drawings showing an electronic device (10a, 10b) according to an exemplary embodiment of the present disclosure.

[0029] Referring to FIG. 2a, the electronic device (10a) may include a switching charger (110a), a direct charger (120a), a connection circuit (130a), a first battery (211a), a second battery (212a), and a system load (SL). The switching charger (110a) may be an example of the first charger (110) of FIG. 1, the direct charger (120a) may be an example of the second charger (120) of FIG. 1, and the connection circuit (130a) may be an example of the connection circuit (130) of FIG. 1. Meanwhile, a circuit comprising the switching charger (110a), the direct charger (120a), and the connection circuit (130a) is referred to as a charging integrated circuit and may be an example of the charging integrated circuit (100) of FIG. 1. A device including first and second batteries (211a, 212a) is referred to as a battery device and may be an example of the battery device (200) of FIG. 1. A system load (SL) may be chips or modules included in the electronic device (10a), for example, a modem, an application processor, memory, a display, etc. For example, a system load (SL) may be an operation block, a function block, or an IP block included in the electronic device (10a), for example, a multimedia block within an application processor, a memory controller, etc. A system load (SL) may also be referred to as a consumption block or load.

[0030] In an exemplary embodiment, the switching charger (110a) may include first to third switching elements (SW_1 to SW_3) and an inductor element (L). For example, the first to third switching elements (SW_1 to SW_3) may be implemented as power switching elements. However, the structure of the switching charger (110a) is not limited thereto, and in some embodiments, the number of switching elements or inductor elements included in the switching charger (110a) may vary. Additionally, the switching charger (110a) may include a first node (ND_1) connected to a system load (SL) and a battery device, and accordingly, the switching charger (110a) may be referred to as a "dual output charger." Meanwhile, the third node (ND_3) and the first node (ND_1) described below are defined differently, but this is for the convenience of description, and in reality, the third node (ND_3) may be the same node as the first node (ND_1).

[0031] The first and second switch elements (SW_1, SW_2) can be connected in series between a terminal receiving a charge input (CHGIN) and a second node (ND_2), and can provide the charge input (CHGIN) to the second node (ND_2). For example, the first switch element (SW1) can be turned on in a first charge mode, and accordingly, the first switch element (SW_1) can be referred to as a "charge switch." The third switch element (SW_3) can be connected between the second node (ND_2) and a ground terminal (GND), and can provide a ground voltage to the second node (ND_2). An inductor element (L) can be connected between the first node (ND_1) and the second node (ND_2). The second and third switch elements (SW_2, SW_3) can be turned on alternately.

[0032] In an exemplary embodiment, in a first charging mode, the switching charger (110a) can provide a first charging current (ICH_1) to the battery device through a third node (ND_3). Additionally, in an exemplary embodiment, a battery current from the battery device can be provided to a system load (SL), and the battery current can flow in the reverse direction of the first charging current (ICH_1).

[0033] In an exemplary embodiment, the direct charger (120a) may be an example of the second charger (120) of FIG. 1. In an exemplary embodiment, the direct charger (120a) may directly charge the battery device by providing a second charging current (ICH_2) to a fourth node (ND_4) connected to the positive terminal of the first battery (211a) in a second charging mode. The direct charger (120a) may directly charge the battery device by a direct charging method in which a charging input (CHGIN) is directly connected to the battery device. The charging efficiency of this direct charging method may be higher than the charging efficiency of a switching charging method using a switching charger (110a).

[0034] In an exemplary embodiment, the connection circuit (130a) may include first and second adjustment circuits (131a, 132a) and fourth and fifth switch elements (SW_4, SW_5). The first adjustment circuit (131a) may be connected between the third node (ND_3) and the fourth node (ND_4). The second adjustment circuit (132a) may be connected between the third node (ND_3) and the positive terminal of the second battery (212a). The fourth switch element (SW_4) may be connected between the negative terminal of the first battery (211a) and the positive terminal of the second battery (212a). The fifth switch element (SW_5) may be connected between the negative terminal of the first battery (211a) and the ground terminal.

[0035] The connection circuit (130a) can turn off the fourth switch element (SW_4) and turn on the fifth switch element (SW_5) in the first charging mode or battery-only mode to connect the first and second batteries (211a, 212a) in parallel. The connection circuit (130a) can turn on the fourth switch element (SW_4) and turn off the fifth switch element (SW_5) in the second charging mode to connect the first and second batteries (211a, 212a) in series.

[0036] In an exemplary embodiment, when the voltage of the second battery (212a) is greater than the voltage of the first battery (211a), the first adjustment circuit (131a) is connected in series with the first battery (211a) to adjust the first balancing current flowing to the first battery (211a). When the voltage of the first battery (211a) is greater than the voltage of the second battery (212a), the second adjustment circuit (132a) is connected in series with the second battery (212a) to adjust the second balancing current flowing to the second battery (212a).

[0037] Referring further to FIG. 2b, the switching charger (110b) may further include a sixth switch element (SW_6) compared to the switching charger (110a) of FIG. 2a. The sixth switch element (SW_6) is connected to a terminal receiving a wireless charging input (WCIN) and may be connected in series with a second switch element (SW_2). Through this, the switching charger (110b) can perform a charging operation for a battery device or a power supply operation to a system load (SL) using either the wireless charging input (WCIN) or the charging input (CHGIN). Hereinafter, details that overlap with FIG. 2a are omitted.

[0038] FIG. 3a is a circuit diagram exemplarily showing the first switch element (SW_1) shown in FIG. 2a, and FIG. 3b is a circuit diagram exemplarily showing the direct charger (120a) shown in FIG. 2a.

[0039] Referring to FIGS. 2a and FIGS. 3a, the first switch element (SW_1) may include a transistor (TR) and a diode (D). The transistor (TR) may be an NMOS (N-channel Metal Oxide Semiconductor) transistor driven by a control signal (CS). For example, the transistor (TR) may include a source receiving a charge input (CHGIN), a gate to which the control signal (CS) is applied, and a drain connected to the second switch element (SW_2). However, the present disclosure is not limited thereto, and the transistor (TR) may be implemented as a PMOS (P-channel Metal Oxide Semiconductor) transistor. The diode (D) may be a parasitic diode of the transistor (TR) and may prevent unintended leakage current from flowing through the diode (D) even when the first switch element (SW_1) is turned off. The second to sixth switch elements (SW_2 to SW_6) exemplified in FIG. 2a and 2b may be implemented similarly or identically to the first switch element (SW_1) exemplified in FIG. 3a.

[0040] Referring further to FIG. 3a, the direct charger (120a) may include first and second transistors (TR_1, TR_2) and first and second diodes (D_1, D_2). The first and second transistors (TR_1, TR_2) may each be NMOS transistors driven by first and second control signals (CS_1, CS_2). For example, the first transistor (TR_1) may include a drain receiving a charge input (CHGIN), a gate to which the first control signal (CS_1) is applied, and a source connected to the source of the second transistor (TR_2). The second transistor (TR_2) may include a source connected to the source of the first transistor (TR_1), a gate to which the second control signal (CS_2) is applied, and a drain connected to a fourth node (ND_4). However, the present disclosure is not limited thereto, and the first and second transistors (TR_1, TR_2) may be implemented as PMOS (P-channel Metal Oxide Semiconductor) transistors. The first and second diodes (D_1, D_2) may be parasitic diodes of each of the first and second transistors (TR_1, TR_2) and may prevent unintended leakage current from flowing when the direct charger (120a) is deactivated.

[0041] FIG. 4 is a drawing showing a first charging mode of a charging integrated circuit according to an exemplary embodiment of the present disclosure.

[0042] Referring to FIG. 4, in the first charging mode, the switching charger (110a) may be activated and the direct charger (120a) may be deactivated. In the first charging mode, the first to third switching elements (SW_1 to SW_3) may be optionally turned on, and accordingly, a first charging path through which a first charging current (ICH_1) flows may be created. Through the first charging path, the first charging current (ICH_1) is provided to the third node (ND_3) to charge the first and second batteries (211a, 212a) connected in parallel.

[0043] In an exemplary embodiment, the first and second adjustment circuits (131a, 132a) can perform adjustment of the balancing current when a voltage difference occurs between the first and second batteries (131a, 132a) and a balancing current flows during the charging of the first and second batteries (131a, 132a) connected in parallel. For example, when the voltage of the second battery (212a) is greater than the voltage of the first battery (211a), the first adjustment circuit (131a) can adjust the first balancing current flowing to the first battery (211a). Conversely, when the voltage of the first battery (211a) is greater than the voltage of the second battery (212a), the second adjustment circuit (132a) can adjust the second balancing current flowing to the second battery (212a). Specific embodiments regarding this are described in FIGS. 16a and 16b.

[0044] FIG. 5 is a diagram showing a second charging mode of a charging integrated circuit according to an exemplary embodiment of the present disclosure.

[0045] Referring to FIG. 5, in the second charging mode, the switching charger (110a) may be deactivated and the direct charger (120a) may be activated. In the second charging mode, the first to third switching elements (SW_1 to SW_3) may be turned off, and accordingly, a second charging path through which a second charging current (ICH_2) flows may be created. The second charging current (ICH_2) may be supplied to the high voltage terminal of the battery device, that is, the positive terminal of the first battery (211a). In the second charging mode, the first and second batteries (211a, 212a) connected in series may be charged using the second charging current (ICH_2).

[0046] In an exemplary embodiment, the second charging mode may be a fast charging mode. For example, the charging input (CHGIN) in the second charging mode may be a high voltage compared to the charging input (CHGIN) in the first charging mode, but the present disclosure is not limited thereto, and the charging input (CHGIN) in the second charging mode may be a low voltage compared to the charging input (CHGIN) in the first charging mode. In the second charging mode, the first and second batteries (211a, 212a) can be charged at high speed using a direct charger (120a).

[0047] However, the present disclosure is not limited thereto, and in some embodiments, both the switching charger (110a) and the direct charger (120a) may be activated in the second charging mode. Additionally, in some embodiments, in the second charging mode, the direct charger (120a) may charge the first and second batteries (211a, 212a), and the switching charger (110a) may supply power (or system voltage, or system current) to the system load (SL). For example, by turning on the first switch element (SW_1), controlling the second switch element (SW_2) on / off, and turning off the third switch element (SW_3), the switching charger (110a) may supply power to the system load (SL) in buck mode. Additionally, in some embodiments, the third switch element (SW_3) may be turned on in the second charging mode, and accordingly, power (or system voltage, or system current) may be supplied to the system load (SL) through the third node (ND_3) to which the first and second batteries (211a, 212a) are connected.

[0048] In an exemplary embodiment, the first and second adjustment circuits (131a, 132a) can perform adjustment for the balancing current when a voltage difference occurs between the first and second batteries (131a, 132a) and a balancing current flows during the charging of the first and second batteries (131a, 132a) connected in series.

[0049] FIG. 6 is a diagram showing a battery-only mode of a charging integrated circuit according to an exemplary embodiment of the present disclosure.

[0050] Referring to FIG. 6, in battery-only mode, both the switching charger (110a) and the direct charger (120a) may be disabled. In battery-only mode, the third switching element (SW_3) may be turned on, and accordingly, a discharge path may be created. Battery-only mode may be a case where no power source is connected, such as when a charging input (CHGIN) is not applied. In battery-only mode, the effective battery capacity may correspond to the sum of the first battery (211a) and the second battery (212a).

[0051] System current (ISYS) can be supplied to the system load (SL) through a discharge path. Specifically, system current (ISYS) can be supplied to the system load (SL) from the voltage of the first and second batteries (211a, 212a) connected in parallel. Meanwhile, if the voltage of the first and second batteries (211a, 212a) is below a certain voltage, the third switch element (SW_3) can be turned off so that the discharge path is disconnected.

[0052] In an exemplary embodiment, the first and second adjustment circuits (131a, 132a) can perform adjustment of the balancing current when a voltage difference occurs between the first and second batteries (131a, 132a) and a balancing current flows during the discharge of the first and second batteries (131a, 132a) connected in parallel with each other. Specific embodiments regarding this are described in FIGS. 10a and 10b.

[0053] FIG. 7 is a block diagram showing a charging integrated circuit (100') according to an exemplary embodiment of the present disclosure.

[0054] Referring to FIG. 7, the electronic device (10') may include a charging integrated circuit (100') and a battery device (200). The charging integrated circuit (100') may correspond to a modified example of the charging integrated circuit (100) of FIG. 1 and may further include control logic (140) compared to the charging integrated circuit (100) of FIG. 1. The details described above with reference to FIG. 1 to 6 may be applied to the electronic device (10'). The control logic (140) may generate first to third control signals (CS_a to CS_c) to control the operation of the first and second chargers (110, 120) and the connection circuit (130). For example, the control logic (140) can generate first to third control signals (CS_a to CS_c) based on first and second charging modes or battery-only mode to drive switch elements included in the first and second chargers (110, 120) and the connection circuit (130), and furthermore, can provide signals necessary for the adjustment operation of the balancing current of the first and second adjustment circuits (131, 132) of the connection circuit (130). In addition, the control logic (140) can control the level of the charging input (CHGIN).

[0055] However, the present disclosure is not limited thereto, and instead of the control logic (140), a Micro Controller Unit (MCU) included in the electronic device (10') may generate the first to third control signals (CS_a to CS_c). Additionally, the first to third control signals (CS_a to CS_c) may be generated by a processor, a Central Processing Unit (CPU), a controller, etc., other than the MCU. For the convenience of description, the following description will focus on examples of electronic devices (10') including an MCU, and it is clear that the present disclosure is not limited thereto.

[0056] FIG. 8 is a flowchart illustrating a method for adjusting a balancing current according to an exemplary embodiment of the present disclosure. FIG. 8 is described with further reference to FIG. 2a for better understanding.

[0057] Referring to FIG. 2a and FIG. 8, in step S100, the first adjustment circuit (131a) can monitor the first balancing current flowing to the first battery (211a). The first adjustment circuit (131a) can receive the first balancing current flowing from the second battery (212a) to the first battery (211a) before the first battery (211a) and continuously monitor whether the first balancing current corresponds to or less than a reference current. In an exemplary embodiment, the first adjustment circuit (131a) can monitor the first balancing current in the first and second charging modes, battery-only mode, etc. Meanwhile, the reference current compared with the first balancing current in each of the first and second charging modes and battery-only mode may be the same or different.

[0058] In step S120, the first adjustment circuit (131a) can adjust the first balancing current based on the monitoring results. Specifically, when the first balancing current exceeds the reference current, the first adjustment circuit (131a) can adjust the first balancing current to the reference current and supply it to the first battery (211a). When the first balancing current is below the reference current, the first adjustment circuit (131a) can supply it to the first battery (211a) without adjusting the first balancing current. Meanwhile, it will be fully understood that the embodiment of the first adjustment circuit (131a) described in FIG. 8 can be applied to the second adjustment circuit (132a).

[0059] FIG. 9 is a flowchart illustrating a method for adjusting a balancing current according to an exemplary embodiment of the present disclosure. FIG. 9 is described with further reference to FIG. 2a for better understanding.

[0060] Referring to FIGS. 2a and FIGS. 9, in step S200, the voltage of the first battery (211a) and the voltage of the second battery (212a) can be sensed. The voltages of the first and second batteries (211a, 212a) can be sensed through a predetermined logic (e.g., control logic (140) of FIG. 7 or an MCU). In step S210, it can be determined whether the voltage difference between the first battery (211a) and the second battery (212a) is greater than zero. When step S210 is 'NO', the voltage of the second battery (212a) may be greater than the voltage of the first battery (211a), and accordingly, the first balancing current may flow to the first battery (211a). Step S220 follows, whereby the first adjustment circuit (131a) is activated and the first balancing current can be adjusted. When step S210 is 'YES', the voltage of the first battery (211a) may be greater than the voltage of the second battery (212a), and accordingly, the second balancing current may flow to the second battery (212a). Step S230 follows, so that the second adjustment circuit (132a) is activated and the second balancing current can be adjusted.

[0061] FIGS. 10a and FIGS. 10b are drawings for illustrating a method of adjusting a balancing current in battery-only mode according to an exemplary embodiment of the present disclosure. The equivalent circuit (EQ_CKTa) of FIGS. 10a and FIGS. 10b represents a schematic equivalent circuit of an electronic device (10a) in battery-only mode of FIG. 6.

[0062] Referring to FIG. 10a, the equivalent circuit (EQ_CKTa) may include first and second adjustment circuits (131a, 132a), first and second equivalent capacitors (EQC_1, EQC_2), and a system load (SL). The first equivalent capacitor (EQC_1) may correspond to the first battery (211a) of FIG. 6, and the second equivalent capacitor (EQC_2) may correspond to the second battery (212a) of FIG. 6. A first system current (ISYS_1) can be supplied to a system load (SL) from a second equivalent capacitor (EQC_2), and when the voltage (BV_2) of the second equivalent capacitor (EQC_2) is greater than the voltage (BV_1) of the first equivalent capacitor (EQC_1), a first balancing current (IBL_1a) can flow to the first equivalent capacitor (EQC_1). A first adjustment circuit (131a) can adjust the first balancing current (IBL_1a) when the first balancing current (IBL_1a) exceeds a reference current, and supply the adjusted first balancing current (IBL_1b) to the first equivalent capacitor (EQC_1).

[0063] Referring to FIG. 10b, a second system current (ISYS_2) can be supplied to a system load (SL) from a first equivalent capacitor (EQC_1), and when the voltage (BV_1) of the first equivalent capacitor (EQC_1) is greater than the voltage (BV_2) of the second equivalent capacitor (EQC_2), a second balancing current (IBL_2a) can flow to the second equivalent capacitor (EQC_2). A second adjustment circuit (132a) can adjust the second balancing current (IBL_2a) when the second balancing current (IBL_2a) exceeds a reference current, and supply the adjusted second balancing current (IBL_2b) to the second equivalent capacitor (EQC_2).

[0064] FIG. 11 is a flowchart illustrating an exemplary embodiment of step S220 of FIG. 9. FIG. 11 is described with further reference to FIG. 2a for better understanding.

[0065] Referring to FIG. 2a and FIG. 11, following step S210 of FIG. 9, a reference current can be determined in step S221a using a reference loss. The loss may refer to energy loss caused by the balancing current. If the balancing current is adjusted to be very small to minimize the loss, the time required for the voltage between the batteries to equalize increases, which may reduce the balancing speed; conversely, if the balancing current is adjusted to be very small to maximize the balancing speed, the loss caused by the balancing current increases. In other words, the balancing speed and the loss may be in a trade-off relationship, and a reference loss can be preset so that the balancing operation can be performed with optimized loss and balance speed in this trade-off relationship. The reference current can be determined based on the preset reference loss.

[0066] In step S222a, the first adjustment circuit (131a) can determine whether the first balancing current exceeds the reference current. When step S222a is 'YES', the first adjustment circuit (131a) can adjust the first balancing current so that it is less than or equal to the reference current and provide the adjusted first balancing current to the first battery (211a). When step S222a is 'NO', the first adjustment circuit (131a) can pass the first balancing current to the first battery (211a) without adjustment.

[0067] FIGS. 12a and 12b are flowcharts illustrating exemplary embodiments of step S220. FIGS. 12a and 12b are described with further reference to FIG. 2a for better understanding.

[0068] Referring to FIGS. 2a and FIGS. 12a, following step S210 of FIG. 9, the temperature of the electronic device (10a) may be sensed in step S221b. In some embodiments, the temperature of a battery device including first and second batteries (211a, 212a) or the temperature of a charging integrated circuit may be sensed instead of the electronic device (10a). In step S222b, it may be determined whether the sensed temperature is less than a first reference value. The entity performing step S222b may be a first adjustment circuit (131a) or a certain MCU included in the electronic device (10a). When step S222b is 'YES', the first adjustment circuit (131a) may adjust the first balancing current to a maximum reference current. In some embodiments, the first adjustment circuit (131a) may receive a predetermined signal from an external source (e.g., an MCU) to enable the first balancing current to be adjusted to a maximum reference current. When step S222b is 'NO', the first adjustment circuit (131a) may adjust the first balancing current to a minimum reference current. In some embodiments, the first adjustment circuit (131a) may receive a predetermined signal from an external source (e.g., an MCU) to enable the first balancing current to be adjusted to a minimum reference current. The maximum reference current and the minimum reference current may be preset. The first adjustment circuit (131a) may adjust the first balancing current in the form of pulses having a variable duty cycle, a maximum reference current, and a minimum reference current. This is described in detail in FIG. 13.

[0069] Referring further to FIG. 12b, unlike FIG. 12a, additional temperature conditions may be added when adjusting the first balancing current to the minimum reference current. Specifically, when step S222c is 'NO', step S224c may be followed to determine whether the sensed temperature is greater than the second reference value. When step S224c is 'YES', the first adjustment circuit (131a) may adjust the first balancing current to the minimum reference current following step S225c, and when step S224c is 'NO', step S223c may be followed.

[0070] In an exemplary embodiment, the first and second reference values ​​may be different, pre-set, and may be varied by taking into account the state of the electronic device (10a), the state of the first and second batteries (211a, 212a), etc.

[0071] FIG. 13 is a timing diagram for explaining a method for adjusting a first balancing current according to an embodiment disclosed in FIG. 12a and FIG. 12b.

[0072] Referring to FIG. 2a and FIG. 13, the first adjustment circuit (131a) can adjust the first balancing current based on the temperature of the electronic device (10a) or the battery device. Between the first time (t1) and the sixth time (t6), the first adjustment circuit (131a) can adjust the first balancing current. The first adjustment circuit (131a) can adjust the maximum reference current (IBL_MAX) and the minimum reference current (IBL_MIN) to alternately repeat based on the temperature of the electronic device (10a) or the battery device. For example, the first duty ratio (D1) of the adjusted first balancing current between the first to third times (t1 to t3) may be the same as or different from the second duty ratio (D2) between the third to fifth times (t3 to t5). The duty ratio may be variable depending on the temperature of the electronic device (10a) or the battery device.

[0073] Meanwhile, the section where the adjusted first balancing current is the maximum reference current (IBL_MAX) may be referred to as the heating section, and the section where the minimum reference current (IBL_MIN) is the cooling section. For example, the first adjustment circuit (131a) can adjust the first balancing current by alternately repeating the heating section and the cooling section, and thereby, by maintaining the temperature of the electronic device (10a) or battery device at a constant level, the effect of enabling stable operation of the electronic device (10a) or battery device is achieved.

[0074] FIGS. 14a through 14d are drawings illustrating a first adjustment circuit (131_1, 131_2) according to an exemplary embodiment of the present disclosure. An embodiment of the first adjustment circuit (131_1, 131_2) described below may also be applied to the second adjustment circuit described above. The first adjustment circuit (131_1) of FIGS. 14a and 14b can adjust the balancing current in the manner shown in FIG. 11, and the first adjustment circuit (131_2) of FIGS. 14c and 14d can adjust the balancing current in the manner shown in FIG. 12a or FIG. 12b.

[0075] Referring to FIG. 14a, the first adjustment circuit (131_1) may include a transistor (T_TR), a feedback generation circuit (131_11), and a first amplifier (131_12). The transistor (T_TR) may be a PMOS transistor. For example, the transistor (T_TR) may include a source connected to a third node (ND_3) that receives a first balancing current (IBL_1a), a gate to which a first adjustment control signal (RG_CS_1) is applied, and a drain connected to the positive terminal of the first battery through a fourth node (ND_4). However, this is merely an exemplary embodiment and is not limited thereto, and the transistor (T_TR) may be an NMOS transistor. The feedback generation circuit (131_11) may be connected between the third node (ND_3) and the fourth node (ND_4) to generate feedback (FB) corresponding to the adjusted first balancing current (IBL_1b). In an exemplary embodiment, the feedback (FB) may be proportional to the adjusted first balancing current (IBL_1b). In some embodiments, the feedback (FB) may be implemented to be inversely proportional to the adjusted first balancing current (IBL_1b). Hereinafter, the feedback (FB) is described on the premise that it is in a proportional relationship with the adjusted first balancing current (IBL_1b).

[0076] The first amplifier (131_12) receives feedback (FB) and a reference voltage (Vref) through its positive and negative terminals, respectively, and can amplify the difference between the reference voltage (Vref) and the feedback (FB) to output to the gate of the transistor (T_TR) as a first adjustment control signal (RG_CS_1). A circuit including the feedback generation circuit (131_11) and the first amplifier (131_12) may be referred to as a control circuit. The reference voltage (Vref) corresponds to the aforementioned reference current, and the control circuit generates the first adjustment control signal (RG_CS_1) based on the reference voltage (Vref) and the feedback (FB) and provides it to the gate of the transistor (T_TR), thereby allowing the transistor (T_TR) to adjust the first balancing current (IBL_1a). For example, when the first balancing current (IBL_1a) exceeds the reference current, the transistor (T_TR) can adjust the first balancing current (IBL_1a) based on the first adjustment control signal (RG_CS_1) and provide the adjusted first balancing current (IBL_1b) to the first battery. The resistance of the transistor (T_TR) can be adjusted by the first adjustment control signal (RG_CS_1). Accordingly, the adjustment operation of the first balancing current (IBL_1a) can be referred to as the resistance adjustment operation of the transistor (T_TR).

[0077] However, this is merely an exemplary embodiment and is not limited thereto, and the first adjustment circuit (131_1) may directly receive the first adjustment control signal (RG_CS_1) from an external source (e.g., an MCU). For example, the MCU of the electronic device may sense the voltage of the first battery and the voltage of the second battery and calculate the voltage difference. Subsequently, the MCU may calculate the current first balancing current (IBL_1a) by dividing the voltage difference from the reference loss, and when the first balancing current (IBL_1a) exceeds the reference current, it may generate a first adjustment control signal (RG_CS_1) to adjust the first balancing current (IBL_1a) to the reference current. Additionally, when the first balancing current is less than or equal to the reference current, the MCU may generate a first adjustment control signal (RG_CS_1) to allow the first balancing current (IBL_1a) to pass without adjustment.

[0078] Referring to FIG. 14b, the feedback generation circuit (131_11) may include a second amplifier (131_111), a resistor element (R_11), and first and second transistors (TR_11, TR_12). The first and second transistors (TR_11, TR_12) may be PMOS transistors. For example, the first transistor (TR_11) may include a source connected to a third node (ND_3), a gate to which a first adjustment control signal (RG_CS_1) is applied, and a drain connected to the negative terminal of the second amplifier (131_111) through a sensing node (ND_S). The second transistor (TR_12) may include a source connected to the negative terminal of the second amplifier (131_111) through a sensing node (ND_S), a gate to which the output of the second amplifier (131_111) is applied, and a drain connected to one end of a resistor element (R_11) and the positive terminal of the first amplifier (131_12) through a feedback node (ND_FB). The second amplifier (131_111) receives the voltage of the fourth node (ND_4) corresponding to the voltage of the first battery and the voltage of the sensing node (ND_S) corresponding to the drain voltage of the first transistor (TR_11) through the positive terminal and the negative terminal, respectively, and may continuously apply an output to the gate of the second transistor (TR_12) so that the voltage of the fourth node (ND_4) and the voltage of the sensing node (ND_S) become equal. As a result, the voltage across the resistor element (R_11), that is, the voltage of the feedback node (ND_FB), can correspond to the voltage of the fourth node (ND_4), and the voltage of the feedback node (ND_FB) can be applied to the first amplifier (131_12) as feedback (FB). According to an embodiment of the feedback generation circuit (131_11), the feedback (FB) can be scaled to a small level compared to the voltage of the fourth node (ND_4), thereby reducing power consumption and load in the first amplifier (131_12).However, this is merely an exemplary embodiment and is not limited thereto, and the first adjustment circuit (131_1) may be implemented so that the voltage of the fourth node (ND_4) is directly input to the positive terminal of the first amplifier (131_12). In the following, content that overlaps with FIG. 14a is omitted.

[0079] Referring to FIG. 14c, the first adjustment circuit (131_2) further includes a reference generation circuit (131_13) compared to FIG. 14a, and the resistor element (R_11') may be a variable resistor element whose resistance value is changed by a resistance value control signal (R_cs). Additionally, the feedback generation circuit (131_11), the first amplifier (131_12), and the reference generation circuit (131_13) may be referred to as control circuits. The reference generation circuit (131_13) may receive a selection signal (Sel_S) and generate a resistance value control signal (R_cs) to change the resistance value of the resistor element (R_11') based on the selection signal (Sel_S). In an exemplary embodiment, the selection signal (Sel_S) may correspond to the temperature of the electronic device or battery device to which the exemplary embodiments of the present disclosure are applied. Accordingly, the reference generation circuit (131_13) can control the degree of adjustment of the first balancing current (IBL_1a) by changing the resistance value of the resistor element (R_11') according to the temperature of the electronic device or battery device.

[0080] For example, the reference generation circuit (131_13) may adjust the resistance value of the resistor element (R_11') to have a first value so that the transistor (T_TR) adjusts the first balancing current (IBL_1a) to a maximum reference current according to the temperature conditions of the electronic device or battery device. The reference generation circuit (131_13) may adjust the resistance value of the resistor element (R_11') to have a second value so that the transistor (T_TR) adjusts the first balancing current (IBL_1a) to a minimum reference current according to the temperature conditions of the electronic device or battery device. However, this is merely an exemplary embodiment and is not limited thereto, and the reference generation circuit (131_13) may adjust the first balancing current (IBL_1a) in various ways by changing the resistance value of the resistor element (R_11') in various ways. In addition, the reference generation circuit (131_13) may receive a selection signal (Sel_S) from an external source (e.g., an MCU). In some embodiments, the first adjustment circuit (131_2) may also receive a first adjustment control signal (RG_CS_1) from an external source (e.g., an MCU). Hereinafter, details that overlap with FIGS. 14a and FIGS. 14b are omitted. Referring to FIGS. 14d, the first adjustment circuit (131_2) may further include a reference generation circuit (131_13) compared to FIGS. 14a. The reference generation circuit (131_13) may receive a selection signal (Sel_S) and, based on the selection signal (Sel_S), select one of a plurality of voltages of different magnitudes and provide it to the first amplifier (131_12) as a reference voltage (Vref'). In an exemplary embodiment, the selection signal (Sel_S) may correspond to the temperature of the electronic device or battery device to which the exemplary embodiments of the present disclosure are applied. Accordingly, the reference generation circuit (131_13) can control the degree of adjustment of the first balancing current (IBL_1a) by changing the magnitude (or level) of the reference voltage (Vref') according to the temperature of the electronic device or battery device.In some embodiments, the reference generation circuit (131_13) may be implemented as a multiplexer. In the following, content that overlaps with FIGS. 14a to 14c is omitted.

[0081] FIG. 15 is a flowchart for explaining the balancing operation in a high-speed charging mode according to an exemplary embodiment of the present disclosure.

[0082] Referring to FIG. 15, in step S300, the charging integrated circuit may operate in a fast charging mode. As previously described, the charging integrated circuit may charge the first and second batteries connected in series using a direct charger. In step S310, the charging integrated circuit may monitor the difference between the voltages of the first and second batteries. In some embodiments, the difference between the voltages of the first and second batteries may be monitored by the MCU of the electronic device. In step S320, the charging integrated circuit may perform a balancing operation between the voltages of the first and second batteries based on the monitoring results. In an exemplary embodiment, the charging integrated circuit may perform a balancing operation after changing the connection of the first and second batteries when the difference between the voltages of the first and second batteries in fast charging mode exceeds a reference value. In some embodiments, the charging integrated circuit may perform a balancing operation after changing the connection of the first and second batteries when a difference between the voltages of the first and second batteries occurs in fast charging mode. Specifically, the charging integrated circuit can perform a balancing operation after connecting the first and second batteries, which are connected in series, to each other in parallel. Specific embodiments thereof are described later in FIGS. 16a to 17b.

[0083] FIGS. 16a to 17b are drawings for explaining a balancing operation in a fast charging mode according to an exemplary embodiment of the present disclosure. FIGS. 16a and 16b are based on the premise that the voltage of the second battery (212a) is greater than the voltage of the first battery (211a), and FIGS. 17a and 17b are based on the premise that the voltage of the first battery (211a) is greater than the voltage of the second battery (212a).

[0084] Referring to FIG. 16a, the connection circuit (130a) can control the first and second batteries (211a, 212a), which are connected in series with each other, to be connected in parallel with each other. That is, compared to FIG. 5, the fourth switch element (SW_4) can be turned off and the fifth switch element (SW_5) can be turned on. The specific balancing operation at this time is described with reference to the equivalent circuit (EQ_CKTb_1) of FIG. 16b.

[0085] Referring further to FIG. 16b, the first equivalent capacitor (EQC_1) corresponds to the first battery (211a), the second equivalent capacitor (EQC_2) corresponds to the second battery (212a), the top transistor (T_TR) corresponds to the first adjustment circuit (131a), and the bottom transistor (B_TR) corresponds to the second adjustment circuit (132a). When the voltage (BV_2) of the second equivalent capacitor (EQC_2) is greater than the voltage (BV_1) of the first equivalent capacitor (EQC_1), the first equivalent capacitor (EQC_1) is charged with a full second charging current (ICH_2'), and current flows through the second equivalent capacitor (EQC_2) to the system load (not shown), so that the first equivalent capacitor (EQC_1) can be charged faster than the second equivalent capacitor (EQC_2). Through this, the first equivalent capacitor (EQC_1) can achieve voltage balancing with the second equivalent capacitor (EQC_2).

[0086] In an exemplary embodiment, for adjusting the third balancing current (IBL_3), the bottom transistor (B_TR) may receive a bottom adjustment control signal (B_RG_CS) and the top transistor (T_TR) may receive a top adjustment control signal (T_RG_CS). For example, the third balancing current (IBL_3) may be appropriately adjusted by the bottom transistor (B_TR), which is semi-on upon receiving the bottom adjustment control signal (B_RG_CS), and the top transistor (T_TR), which is completely turned off upon receiving the top adjustment control signal (T_RG_CS).

[0087] Referring to FIG. 17a, compared to FIG. 5, the first and second switch elements (SW_1, SW_2) can be turned on, thereby forming a balancing path for the fourth balancing current (IBL_4) input to the second battery (212a). Meanwhile, as an exemplary embodiment, the first adjustment circuit (131a) can be deactivated. A specific balancing operation is described with reference to the equivalent circuit (EQ_CKTb_2) of FIG. 17b.

[0088] Referring further to FIG. 17b, the first equivalent capacitor (EQC_1) corresponds to the first battery (211a), and the second equivalent capacitor (EQC_2) corresponds to the second battery (212a). When the voltage (BV_1) of the first equivalent capacitor (EQC_1) is greater than the voltage (BV_2) of the second equivalent capacitor (EQC_2), a fourth balancing current (IBL_4) is further applied to the second equivalent capacitor (EQC_2) through an additional current path formed in the switching charger (110a) along with the second charging current (ICH_2''), so that the second equivalent capacitor (EQC_2) can be charged faster than the first equivalent capacitor (EQC_1). Through this, the second equivalent capacitor (EQC_2) can achieve voltage balancing with the first equivalent capacitor (EQC_1).

[0089] FIGS. 18a and FIGS. 19b are drawings for illustrating a method for improving the balancing speed in a balancing operation according to an exemplary embodiment of the present disclosure. FIGS. 18a and FIGS. 18b are based on the premise that the voltage of the first battery (211a) is greater than the voltage of the second battery (212a), and FIGS. 19a and FIGS. 19b are based on the premise that the voltage of the second battery (212a) is greater than the voltage of the first battery (211a).

[0090] Referring to FIG. 18a, both the switching charger (110a) and the direct charger (120a) can be activated to create a current path through which a first current (I_1) flows. Additionally, the first and second batteries (211a, 212a) can be connected in series with the fourth switch element (SW_4) turned on and the fifth switch element (SW_5) turned off. The switching charger (110a) can operate in buck mode, and the first current (I_1) can be applied to the third node (ND_3). The specific balancing operation at this time is described with reference to the equivalent circuit (EQ_CKTc_1) of FIG. 18b.

[0091] Referring further to FIG. 18b, the first equivalent capacitor (EQC_1) corresponds to the first battery (211a), and the second equivalent capacitor (EQC_2) corresponds to the second battery (212a). When the voltage (BV_1) of the first equivalent capacitor (EQC_1) is greater than the voltage (BV_2) of the second equivalent capacitor (EQC_2), a fifth balancing current (IBL_5) flows from positive to negative in the second equivalent capacitor (EQC_2), and a first current (I_1) flows from negative to positive, so that the net current of the second equivalent capacitor (EQC_2) can approach zero, and a first current (I_1) flows from negative to positive in the first equivalent capacitor (EQC_1), so that the net current of the first equivalent capacitor (EQC_1) has a negative value, so that the voltage (BV_1) of the first equivalent capacitor (EQC_1) decreases and the voltage (BV_2) of the second equivalent capacitor (EQC_2) is maintained, so that mutual balancing can be achieved.

[0092] Referring to FIG. 19a, both the switching charger (110a) and the direct charger (120a) can be activated to create a current path through which a second current (I_2) flows. Additionally, the first and second batteries (211a, 212a) can be connected in series with the fourth switch element (SW_4) turned on and the fifth switch element (SW_5) turned off. Unlike FIG. 18a, the switching charger (110a) can operate in boost mode, and the second current (I_2) can be applied to the fourth node (ND_4). The specific balancing operation at this time is described with reference to the equivalent circuit (EQ_CKTc_2) of FIG. 19b.

[0093] Referring further to FIG. 19b, the first equivalent capacitor (EQC_1) corresponds to the first battery (211a), and the second equivalent capacitor (EQC_2) corresponds to the second battery (212a). When the voltage (BV_2) of the second equivalent capacitor (EQC_2) is greater than the voltage (BV_1) of the first equivalent capacitor (EQC_1), a second current (IBL_2) flows from positive to negative through the first equivalent capacitor (EQC_1), so that the net current has a positive value, and a sixth balancing current (IBL_6) flows from negative to positive through the second equivalent capacitor (EQC_2), so that the net current has a negative value. Consequently, the voltage (BV_1) of the first equivalent capacitor (EQC_1) increases, and the voltage (BV_2) of the second equivalent capacitor (EQC_2) decreases, thereby achieving mutual balancing.

[0094] Meanwhile, the current flow illustrated in FIGS. 18a to 19b is schematically illustrated only with the current necessary to describe the embodiments of the present disclosure, and the technical concept of the present disclosure is not limited thereto, and various additional currents may be generated to balance the voltages of the first and second batteries (211a, 212a) when both the switching charger (110a) and the direct charger (120a) are activated.

[0095] FIG. 20 is a flowchart illustrating a method for determining whether a battery device including first and second batteries is fully charged according to an exemplary embodiment of the present disclosure.

[0096] Referring to FIG. 20, in step S400, the charging integrated circuit can first charge the first and second batteries. The first charging may include pre-charging, CC (Constant Current) based charging, and CV (Constant Voltage) based charging for the first and second batteries. Subsequently, in step S401, the charging integrated circuit can determine whether the total charging current flowing through the first and second batteries is less than a third reference value. When step S401 is 'YES', the charging integrated circuit can charge only the first battery by following step S402. In this case, for example, the charging for the first battery may correspond to CV-based charging. When step S401 is 'NO', step S400 can be continued. In step S403, the charging integrated circuit can determine whether the charging current for the first battery is less than a fourth reference value. When step S403 is 'YES', the charging integrated circuit may charge only the second battery following step S404. In this case, for example, the charging of the second battery may correspond to CV-based charging. When step S403 is 'NO', step S402 may be continued. In step S405, the charging integrated circuit may determine whether the charging current for the second battery is less than the fifth reference value. When step S405 is 'YES', the charging integrated circuit may recharge only the first battery following step S406. In this case, for example, the charging of the first battery may correspond to CV-based charging. When step S405 is 'NO', step S404 may be continued. In step S407, the charging integrated circuit may determine whether the charging current for the first battery is less than the fourth reference value. When step S407 is 'YES', the charging integrated circuit can recharge the first and second batteries following step S408. At this time, for example, the charging of the first and second batteries may correspond to CV-based charging.When step S407 is 'NO', step S406 may be continued. In step S409, the charging integrated circuit may determine whether the total charging current for the first and second batteries is less than the third reference value. When step S409 is 'YES', the charging integrated circuit may complete charging for the first and second batteries following step S410. When step S409 is 'NO', step S408 may be continued. Meanwhile, the third to fifth reference values ​​may be different or identical, and may be pre-set.

[0097] FIG. 21 is a flowchart for explaining a method for controlling a charging input during a charging operation according to an exemplary embodiment of the present disclosure.

[0098] Referring to FIG. 21, in step S500, the power delivery unit may communicate with the charging integrated circuit to provide a voltage having a first initial level corresponding to the voltage of the battery device of the charging integrated circuit as a charging input. In some embodiments, the power delivery unit may correspond to the TA described in FIG. 1, etc. In step S510, the power delivery unit may continuously communicate with the charging integrated circuit to control the charging input stepwise from the first initial level to the first target level. Steps S500 and S510 may perform a charging operation corresponding to the CC (Constant Current) interval. In step S520, the power delivery unit may communicate with the charging integrated circuit to provide a current having a second initial level as a charging input. In step S530, the power delivery unit may continuously communicate with the charging integrated circuit to control the charging input stepwise from the second initial level to the second target level. Steps S520 and S530 can perform a charging operation corresponding to the CV (Constant Voltage) interval.

[0099] FIG. 22 is a block diagram showing an electronic device (1000) according to an exemplary embodiment of the present disclosure.

[0100] Referring to FIG. 22, the electronic device (1000) may include a charging integrated circuit (1100), a battery device (1200), a PMIC (1300), and an application processor (1400). The electronic device (1000) may include a charging integrated circuit (1100) for receiving power from an external source and charging the battery device (1200). The charging integrated circuit (1100) may be implemented according to various embodiments illustrated in FIGS. 1 through 21.

[0101] The PMIC (1300) can receive battery voltage and manage power required to operate the application processor (1400). Additionally, the PMIC (300) may be implemented to generate or manage voltages required for internal components of the electronic device (1000). According to embodiments, the electronic device (1000) may include a plurality of PMICs including the PMIC (1300). In one embodiment, the PMIC (1300) may receive battery voltage from the battery device (1200). In one embodiment, the PMIC (1300) may receive system voltage through the charging integrated circuit (1100). In one embodiment, the PMIC (1300) may receive the charging input (CHGIN) directly.

[0102] The application processor (1400) can control the electronic device (1000) overall. In one embodiment, the application processor (1400) can control the charging integrated circuit (1100), and, for example, can control the charging integrated circuit (1100) to a first charging mode, a second charging mode, or a battery-only mode. In one embodiment, when the electronic device (1000) is connected to a TA, the application processor (1400) may communicate with the TA to adjust the charging input (CHGIN) output from the TA. In one embodiment, the application processor (1400) may be implemented as a system-on-chip including one or more Intellectual Properties (IPs).

[0103] As described above, exemplary embodiments have been disclosed in the drawings and specification. Although specific terms have been used to describe the embodiments in this specification, they are used only for the purpose of explaining the technical concept of this disclosure and are not intended to limit the meaning or the scope of this disclosure as defined in the claims. Therefore, those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of this disclosure should be determined by the technical concept of the appended claims.

Claims

Claim 1 A charging integrated circuit comprising: a battery device configured to include a first and a second battery; a connection circuit configured such that the first battery and the second battery are connected in series or in parallel to each other; a first charger configured to charge the first and second batteries connected in parallel to each other in a first charging mode; and a second charger configured to charge the first and second batteries connected in series to each other in a second charging mode, wherein the connection circuit comprises: a first adjustment circuit connected in series to the first battery and configured to adjust a first balancing current flowing to the first battery to a reference current or less; and a second adjustment circuit connected in series to the second battery and configured to adjust a second balancing current flowing to the second battery to a reference current or less. Claim 2 A charging integrated circuit according to claim 1, wherein the first charger is configured to provide a first charging current to a node between the first adjustment circuit and the second adjustment circuit, and the second charger is configured to provide a second charging current to a high-voltage terminal of the battery device connected to one end of the first battery. Claim 3 A charging integrated circuit according to claim 1, characterized in that the first balancing current occurs when the voltage of the first battery is smaller than the voltage of the second battery, and the second balancing current occurs when the voltage of the second battery is smaller than the voltage of the first battery. Claim 4 A charging integrated circuit according to claim 1, wherein the connection circuit is configured such that the first battery and the second battery are connected in parallel in battery-only mode, and the first and second adjustment circuits are configured to monitor the first and second balancing currents and adjust the first and second balancing currents based on the monitoring results. Claim 5 A charging integrated circuit according to claim 4, wherein the first adjustment circuit comprises: a first control circuit configured to generate a first adjustment control signal based on a comparison result by comparing the first balancing current with the reference current; and a first transistor configured to adjust the first balancing current based on the first adjustment control signal received through a first gate terminal; and the second adjustment circuit comprises: a second control circuit configured to generate a second adjustment control signal based on a comparison result by comparing the second balancing current with the reference current; and a second transistor configured to adjust the first balancing current based on the second adjustment control signal received through a second gate terminal. Claim 6 A charging integrated circuit according to claim 5, wherein the first transistor is configured to output the first balancing current, which is adjusted to be less than or equal to the reference current, to the first battery in response to the first adjustment control signal, and the second transistor is configured to output the second balancing current, which is adjusted to be less than or equal to the reference current, to the second battery in response to the second adjustment control signal. Claim 7 A charging integrated circuit characterized in that, in paragraph 5, the reference current is determined based on a preset reference loss. Claim 8 A charging integrated circuit according to claim 1, wherein the connection circuit is configured such that the first battery and the second battery are connected in parallel in battery-only mode, and the first and second adjustment circuits are configured to adjust the first and second balancing currents based on the temperature of the battery device. Claim 9 A charging integrated circuit according to claim 8, wherein the first adjustment circuit is configured to adjust the first balancing current to either the maximum reference current or the minimum reference current based on the temperature of the battery device, and the second adjustment circuit is configured to adjust the second balancing current to either the maximum reference current or the minimum reference current based on the temperature of the battery device. Claim 10 A charging integrated circuit according to claim 8, wherein the first adjustment circuit is configured to adjust the first balancing current in the form of a pulse having a duty ratio, a maximum reference current, and a minimum reference current that are variable according to the temperature of the battery device, and the second adjustment circuit is configured to adjust the second balancing current in the form of a pulse having the duty ratio, the maximum reference current, and the reference current that are variable according to the temperature of the battery device. Claim 11 A charging integrated circuit according to claim 1, characterized in that, in the first charging mode, when the voltage of the first battery and the voltage of the second battery differ by more than a reference value, it is configured to perform a voltage balancing operation between the first and second batteries. Claim 12 A charging integrated circuit according to claim 1, characterized in that, in the first charging mode, when the voltage of the first battery is smaller than the voltage of the second battery by a reference value, the connection circuit is configured such that the first and second batteries are connected in parallel to form a path for a third balancing current flowing from the second battery through the second adjustment circuit and the first adjustment circuit to the first battery. Claim 13 A charging integrated circuit according to claim 1, characterized in that, in the first charging mode, when the voltage of the second battery is smaller than the voltage of the first battery by a reference value, the first charger is configured to form a path for charging the first and second batteries in the first charging mode as a path for a fourth balancing current flowing to the second battery. Claim 14 A charging integrated circuit according to claim 1, characterized in that, in the first or second charging mode, the first and second chargers are activated, and the first charger is configured to operate as a buck converter or a boost converter to perform voltage balancing operation between the first and second batteries. Claim 15 A charging integrated circuit comprising: first and second batteries; a switching charger configured to charge the first and second batteries using a first charging input received from a first input terminal in a normal charging mode; a direct charger configured to charge the first and second batteries using a second charging input received from a second input terminal in a fast charging mode; and a connection circuit configured to connect the first battery and the second battery in series or in parallel with each other, wherein the connection circuit comprises: first and second switching elements for connecting the first and second batteries in series or in parallel with each other; a first adjustment circuit configured to adjust a first balancing current flowing to the first battery to a reference current or lower; and a second adjustment circuit configured to adjust a second balancing current flowing to the second battery to a reference current or lower. Claim 16 A charging integrated circuit according to claim 15, wherein the first adjustment circuit comprises a first transistor configured to adjust the first balancing current in response to a first adjustment control signal received at a first gate terminal, and the second adjustment circuit comprises a second transistor configured to adjust the second balancing current in response to a second adjustment control signal received at a second gate terminal. Claim 17 delete Claim 18 A charging integrated circuit according to claim 16, wherein the first adjustment circuit is configured to adjust the first balancing current in a pulse form having a variable duty ratio, a maximum reference current, and a minimum reference current, and the second adjustment circuit is configured to adjust the second balancing current in a pulse form having the variable duty ratio, the maximum reference current, and the minimum reference current. Claim 19 An electronic device comprising: a charging integrated circuit for charging a battery device including first and second batteries; and a system load configured to receive power from the charging integrated circuit, wherein the charging integrated circuit comprises: a connection circuit configured such that the first battery and the second battery are connected in series or in parallel to each other; a first charger connected to the system load and configured to charge the first and second batteries connected in parallel to each other through a first charging path in a first charging mode; and a second charger configured to charge the first and second batteries connected in series to each other through a second charging path in a second charging mode, wherein the connection circuit comprises: a first adjustment circuit configured to adjust a first balancing current flowing to the first battery to a reference current or lower; and a second adjustment circuit configured to adjust a second balancing current flowing to the second battery to a reference current or lower. Claim 20 An electronic device according to claim 19, further comprising a microcontroller configured to generate a signal for controlling the balancing speed of the first and second adjustment circuits based on a reference loss.

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