ELECTRONIC DEVICE INCLUDING LIGHT SOURCE AND ToF SENSOR, AND LIDAR SYSTEM

Abstract

An electronic device according to an embodiment of the present invention comprises a time of flight (ToF) sensor including a pixel array; a light source emitting light signals; and an optical device that irradiates light signals to regions of an object corresponding to a plurality of pixel blocks, each of which includes pixels of the pixel array, wherein each pixel comprises: a plurality of taps each comprising a phototransistor, a first transfer transistor connected to the phototransistor, a storage element connected to the first transfer transistor, a second transfer transistor connected to the storage element, a floating diffusion region connected to the second transfer transistor, a reset transistor for resetting the floating diffusion region, and a readout circuit connected to the floating diffusion region; and an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage.

Description

Technology Field

[0001] The present invention relates to an electronic device and a lidar system comprising a light source and a ToF sensor. Background Technology

[0002] Recently, LADAR (light detection and ranging) systems are being used in various fields such as autonomous driving, security, sensors, and surveillance. The electronic device implementing the LADAR system may include a light source and a Time of Flight (ToF) sensor. The light source can emit a light signal toward an object, and a light signal may be reflected from the object. The ToF sensor can calculate the distance between the depth sensor and the object by measuring the arrival time of the light signal emitted toward the object and the light signal reflected from the object. Due to the limited power of the electronic device containing both the light source and the ToF sensor, the detection range of the LADAR system may be limited. The problem to be solved

[0003] The present invention is intended to solve the aforementioned technical problem, and the present invention can provide an electronic device and a lidar system including a light source and a ToF sensor. means of solving the problem

[0004] An electronic device according to an embodiment of the present invention includes a time of flight (ToF) sensor comprising a pixel array; a light source emitting light signals; and an optical device that irradiates light signals to regions of an object corresponding to a plurality of pixel blocks, each comprising pixels of the pixel array. Effects of the invention

[0005] An electronic device according to an embodiment of the present invention can detect objects at a relatively long distance with limited power through scanning operations of objects by a light source and an optical device and demodulation operations of a ToF sensor based on the scanning direction, and can eliminate shading phenomena based on the position of pixels. Brief explanation of the drawing

[0006] FIG. 1 illustrates an exemplary lidar system according to an embodiment of the present invention. FIGS. 2a to 2c illustrate examples of light sources and optical devices of the electronic device of FIG. 1. FIGS. 3a and 3b illustrate exemplary circuit diagrams of the pixel of FIG. 1. FIGS. 4a and 4b illustrate exemplary block diagrams of the ToF sensor of FIG. 1. FIGS. 4c and 4d illustrate exemplary block diagrams of the ToF sensor of FIG. 1. FIGS. 5a and 5b illustrate exemplary timing diagrams of optical signals and control signals applied to the pixel of FIG. 3a. FIGS. 6a and 6b illustrate exemplary timing diagrams of optical signals and control signals applied to the pixel of FIG. 3b. FIGS. 7a to 7i illustrate examples of one-dimensional optical scanning in the thermal direction and pixel array scanning performed by the electronic device of FIG. 1, respectively. FIGS. 8a through 8c respectively illustrate examples of one-dimensional optical scanning in the row direction and pixel array scanning performed by the electronic device of FIG. 1. FIGS. 9a through 9f respectively illustrate examples of two-dimensional optical scanning in the row and column directions and pixel array scanning performed by the electronic device of FIG. 1. FIGS. 10a through 10f respectively illustrate examples of two-dimensional optical scanning in the row and column directions and pixel array scanning performed by the electronic device of FIG. 1. FIGS. 11a through 11f respectively illustrate examples of two-dimensional optical scanning in the row and column directions and pixel array scanning performed by the electronic device of FIG. 1. FIGS. 12a through 12f respectively illustrate examples of two-dimensional optical scanning in the row and column directions and pixel array scanning performed by the electronic device of FIG. 1. FIG. 13 is a semiconductor package according to an embodiment of the present invention. A cross-sectional view of the module is illustrated as an example. FIG. 14 illustrates an example of the application of the electronic device of FIG. 1. Specific details for implementing the invention

[0007] FIG. 1 illustrates an exemplary lidar system according to an embodiment of the present invention. A lidar (light detection and ranging) system (10) may include an object (11, or may be referred to as an object, target, subject, etc.) and an electronic device (100). For example, the lidar system (10) may be implemented in an electronic device (100), and the electronic device (100) may also be referred to as a lidar device. The electronic device (100) may emit a light signal (EL) to the object (11) based on time of flight (ToF) technology, detect a light signal (RL) reflected from the object (11), and detect the distance between the electronic device (100) and the object (11). The electronic device (100) may include a light source (110), an optical device (optics; 120), a lens unit (130), a ToF sensor (140), and a controller (150).

[0008] The light source (110) may emit an optical signal (EL). The light source (110) may emit (on) or not emit (off) the optical signal (EL) according to the control of the controller (150). For example, the optical signal (EL) may have the form of a square wave (pulse) or a sinusoidal wave. The optical signal (EL) may be a signal in a band that is not detected by the user and may be a laser, laser pulse, infrared, microwave, light wave, ultrasonic wave, etc., but is not limited to the examples described above. For example, the light source (110) may be a laser light source or may include an LED (light emitting diode), LD (laser diode), OLED (organic LED), edge emitter laser, VCSEL (vertical cavity surface emitting laser), distributed feedback laser, etc. The optical device (120) can control or adjust the projection direction of the light signal (EL) according to the control of the controller (150). For example, the optical device (120) can support one-dimensional or two-dimensional scanning functions for the object (11). The light signal (EL) emitted from the light source (110) can pass through the optical device (120) and be emitted to the object (11), or it can be reflected by the optical device (120) and emitted to the object (11). The lens unit (130) can collect the light signal (RL) reflected from the object (11). The light signal (RL) can be incident on the lens unit (130) and provided to the pixels (PX) of the ToF sensor (140) through the lens unit (130). For example, the lens unit (130) is shown as a single lens, but it may be an optical system including multiple lenses. The ToF sensor (140) may also be referred to as a ToF sensor chip, an image sensor (chip), a depth sensor (chip), etc.The ToF sensor (140) may include a pixel array (141) comprising pixels (PX). The pixels (PX) may also be referred to as ToF pixels and can convert a light signal (RL) reflected from an object (11) into an electrical signal. Due to the distance between the electronic device (100) and the object (11), the light signal (RL) incident on the pixel array (141) may be delayed compared to the light signal (EL). For example, there may be a parallax or phase difference between the light signals (EL, RL), and the electrical signal converted by the pixels (PX) may exhibit a parallax or phase difference. A controller (150) can control the light source (110), the optical device (120), and the ToF sensor (140). The controller (150) can synchronize the light source (110), the optical device (120), and the ToF sensor (140) with one another and transmit control signals to the light source (110), the optical device (120), and the ToF sensor (140) to control the light source (110), the optical device (120), and the ToF sensor (140) based on the same clock signal. The controller (150) may include a clock generator that generates a clock signal. As illustrated in FIG. 1, the controller (150) may be placed or implemented separately from the ToF sensor (140) within the electronic device (100). Unlike the illustration in FIG. 1, the controller (150) may be included in or embedded within the ToF sensor (140). The controller (150) may not be included in the electronic device (100) and may communicate with the electronic device (100). The components (110–150) of the electronic device (100) may be implemented separately or at least partially integrated.

[0009] According to an embodiment of the present invention, a controller (150) can control a light source (110) and an optical device (120) to modulate a light signal (EL) or control the frequency, phase, intensity, on / off, and irradiation direction of the light signal (EL). For example, an object (11) may be divided into multiple regions, each corresponding to some pixels (PX) among the pixels (PX). The light source (110) and the optical device (120), under the control of the controller (150), can perform scanning of the object (11) by sequentially (in order) irradiating the light signals (EL) to the multiple regions of the object (11) corresponding to some pixels (PX). Some pixels (PX) of the pixel array (141) of the ToF sensor (140) can demodulate light signals (RL) reflected from the object (11) based on the direction of scanning. As scanning proceeds, some other pixels (PX) corresponding to different areas of the object (11) among the pixels (PX) can also demodulate the light signal (RL). Compared to the case where a flash-type light source is used, the electronic device (100) can detect an object (11) at a relatively long distance with limited power through the scanning operation of the object (11) by the light source (110) and the optical device (120) and the demodulation operation of the ToF sensor (140) based on the scanning direction. Compared to the case where a flash-type light source is used, the electronic device (100) can reduce the leakage current of the pixels (PX) and eliminate shading phenomena based on the position of the pixels (PX) by performing the scanning operation of the object (11) based on some of the pixels (PX).

[0010] FIGS. 2a through 2c illustrate examples of light sources and optical devices of the electronic device of FIG. 1. Referring to FIG. 2a, the light source (110a) may be one of a VCSEL, a side-emitting laser, and an LED, and the optical device (120a) may be a micro-electro-mechanical system (MEMS) mirror. Referring to FIG. 2b, the light source (110b) may be one of a VCSEL, a side-emitting laser, and an LED, and the optical device (120b) may be a rotating prism. Referring to FIG. 2c, the light source (110c) may be a VCSEL array comprising a plurality of VCSELs, and the optical device (120c) may be a projection optical device. In the VCSEL array, some VCSELs may be turned on and the remaining VCSELs may be turned off under the control of the controller (150), and scanning of the object (11) may be performed by repeating the above-described operation. For example, the electronic device (100) may further include a vibrating actuator. The vibrating actuator may vibrate the VCSEL array or the projection optical device under the control of the controller (150), and scanning of the object (11) may be performed by repeating the above-described operation.

[0011] FIGS. 3a and 3b illustrate exemplary circuit diagrams of a pixel of FIG. 1. A pixel (PX) may include two or more taps. Pixels (PXa, PXb) may each be an example of a pixel (PX). A pixel (PXa) may include a photoelectric conversion element (PD), taps (TAP1, TAP2), and an overflow transistor (OF). As the photoelectric conversion element (PD), a photodiode, a phototransistor, a photogate, a pinned photodiode, and combinations thereof may be used. Hereinafter, the photoelectric conversion element (PD) is described exemplarily as a photodiode. The photoelectric conversion element (PD) may generate and accumulate charges corresponding to an optical signal (RL). Charges generated by the photoelectric conversion element (PD) may be distributed to phototransistors (PA, PB). The amounts of charges distributed and stored by the phototransistors (PA, PB) can be determined by the phase differences between the photogate signals (PGA, PGB) and the optical signal (EL). For example, a photoelectric conversion element (PD) can be implemented within a substrate in which a pixel (PXa) is implemented so as to overlap with the phototransistors (PA, PB) in a planar view. The photoelectric conversion element (PD) can be connected between one end of the phototransistors (PA, PB) and the ground voltage (GND). The photoelectric conversion element (PD) can be shared by multiple taps (two in FIG. 3a) of a single pixel (PXa).

[0012] A tap (TAP1) may include a phototransistor (PA), a transfer transistor (TA), a storage transistor (S1), a transfer transistor (T1), a floating diffusion region (FD1), and a readout circuit (RO1), and the readout circuit (RO1) may include a reset transistor (R1), a source follower transistor (SF1), and a select transistor (SE1). One end (drain or source) of the phototransistor (PA) may be connected to one end of a photoelectric conversion element (PD) and an overflow transistor (OF). The phototransistor (PA) may accumulate charges based on a photogate signal (PGA). Charges may be generated by an optical signal (RL) incident on a pixel (PXa). The photogate signal (PGA) may be a modulation signal having the same or different phase as the optical signal (EL). The photo gate signal (PGA) can be activated (or enabled) during the exposure (or integration) period (or cycle) in which an optical signal (EL) is emitted and an optical signal (RL) is incident on the pixel (PXa), and can be deactivated (or disabled) at times other than the exposure period.

[0013] A transfer transistor (TA) can be connected between one end of a phototransistor (PA) and one end of a storage transistor (S1). Based on a transfer gate signal (TXA), the transfer transistor (TA) electrically connects one end of the phototransistor (PA) and one end of the storage transistor (S1) during the exposure period to transfer charges accumulated by the phototransistor (PA) to the storage transistor (S1), and based on the transfer gate signal (TXA), prevents charges accumulated by the phototransistor (PA) from being transferred to the storage transistor (S2) during times other than the exposure period.

[0014] A storage transistor (S1) can be connected between transfer transistors (TA, T1) and can store charges accumulated by a phototransistor (PA) based on a storage gate signal (SG). Charges accumulated by the phototransistor (PA) may not be transferred directly to a floating diffusion region (FD1). For example, the tap (TAP1) may include a storage diode instead of a storage transistor (S1). One end of the storage diode may be connected to one end of the phototransistor (PA) and one end of the transfer transistor (T1), and the other end of the storage diode may be connected to either the power supply voltage (VDD) or the ground voltage (GND). As another example, the tap (TAP1) may include both a storage transistor (S1) and a storage diode. The storage transistor (S1), the storage diode, and the combination of the storage transistor (S1) and the storage diode may each be referred to as a storage element.

[0015] A transfer transistor (T1) can be connected between one end of a storage transistor (S1) and a floating diffusion region (FD1). The transfer transistor (T1) can transfer charges stored in the storage transistor (S1) to the floating diffusion region (FD1) based on a transfer gate signal (TG).

[0016] In FIG. 3a, the tap (TAP1) is shown to include all of the transistors (TA, S1, T1). Unlike the illustration in FIG. 3a, the tap (TAP1) may include only some of the transistors (TA, T1) and the storage element (S1), or not include all of them.

[0017] A reset transistor (R1) can be connected between the floating diffusion region (FD1) and the power supply voltage (VDD). Based on a reset gate signal (RG), the reset transistor (R1) electrically connects the floating diffusion region (FD1) and the power supply voltage (VDD) to drive the voltage level of the floating diffusion region (FD1) to the power supply voltage (VDD), thereby resetting the floating diffusion region (FD1) and removing or discharging the charges stored in the floating diffusion region (FD1). A source follower transistor (SF1) can be connected between the power supply voltage (VDD) and the select transistor (SE1). The gate of the source follower transistor (SF1) can be connected to the floating diffusion region (FD1). The source follower transistor (SF1) can output an output signal (OUT1) based on the voltage level of the floating diffusion region (FD1). The select transistor (SE1) can be connected between the source follower transistor (SF1) and the output line. The select transistor (SE1) can output an output signal (OUT1) to the output line based on the select signal (SEL).

[0018] A tap (TAP2) may include a phototransistor (PB), a transfer transistor (TB), a storage transistor (S2), a transfer transistor (T2), a floating diffusion region (FD2), and a readout circuit (RO2), and the readout circuit (RO2) may include a reset transistor (R2), a source follower transistor (SF2), and a select transistor (SE2). Except for the phototransistor (PB) of the tap (TAP2) receiving a photogate signal (PG2), the tap (TAP1) may be implemented and operated substantially identically to the tap (TAP1). The photogate signals (PGA, PGB) may be activated during the exposure period and deactivated at times outside the exposure period. The photogate signals (PGA / PGB) may be modulated signals having the same or different phases as the optical signal (EL). The phases of the photogate signals (PGA, PGB) may be different from each other. Taps (TAP1, TAP2) can output output signals (OUT1, OUT2) based on photogate signals (PGA, PGB). For example, the output signals (OUT1, OUT2) can represent the distance between the electronic device (100) and the object (11). For example, a reset gate signal (RG), a transmission gate signal (TG), and a select signal (SEL) can be applied to the taps (TAP1, TAP2) in common. As illustrated in FIG. 3a, transmission gate signals (TXA, TXB) can be applied to the transmission transistors (TA, TB) of the taps (TAP1, TAP2), respectively. Unlike the illustration in FIG. 3a, the transmission gate signal (TX) may be applied to the transmission transistors (TA, TB) of the taps (TAP1, TAP2) in common.

[0019] The overflow transistor (OF) can be connected to the power supply voltage (VDD) and placed adjacent to the phototransistors (PA, PB). Due to external light outside of the exposure period, the photoelectric converter (PD) or the phototransistors (PA, PB) may accumulate charges. Based on the overflow gate signal (OG), the overflow transistor (OF) can remove the charges accumulated by the photoelectric converter (PD) or the phototransistors (PA, PB) outside of the exposure period or discharge them to the power supply voltage (VDD). For example, the overflow transistor (OF) may be divided into as many transistors as there are taps (TAP1, TPA2).

[0020] A pixel (PXb) may include a photoelectric conversion element (PD), taps (TAP1–TAP4), and an overflow transistor (OF). Differences between pixels (PXb, PXa) will be primarily described. Charges generated by the photoelectric conversion element (PD) may be distributed to phototransistors (PA–PD). The amount of charge stored in the phototransistors (PA–PD) may be determined by the phase differences between the photogate signals (PGA–PGD) and the optical signal (EL).

[0021] The taps (TAP1, TAP2) of pixel (PXb) may be substantially identical to the taps (TAP1, TAP2) of pixel (PXa). Tap (TAP3) may include a phototransistor (PC), a transfer transistor (TC), a storage transistor (S3), a transfer transistor (T3), a floating diffusion region (FD3), and a readout circuit (RO3), and the readout circuit (RO3) may include a reset transistor (R3), a source follower transistor (SF3), and a select transistor (SE3). Tap (TAP4) may include a phototransistor (PD), a transfer transistor (TD), a storage transistor (S4), a transfer transistor (T4), a floating diffusion region (FD4), and a readout circuit (RO4), and the readout circuit (RO4) may include a reset transistor (R4), a source follower transistor (SF4), and a select transistor (SE4). The taps (TAP3, TAP4) may be implemented and operate substantially identically to the taps (TAP1, TAP2).

[0022] The photogate signals (PGA~PGD) can be activated during the exposure period and deactivated at times other than the exposure period. The phases of the photogate signals (PGA~PGD) may differ from each other. The taps (TAP1~TAP4) can output output signals (OUT1~OUT4) based on the photogate signals (PGA~PGD). For example, the output signals (OUT1~OUT4) may represent the distance between the electronic device (100) and the object (11). As illustrated in FIG. 3b, the reset gate signal (RG1), the transmission gate signal (TG1), and the select signal (SEL1) can be applied in common to the taps (TAP1, TAP2), and the reset gate signal (RG2), the transmission gate signal (TG2), and the select signal (SEL2) can be applied in common to the taps (TAP3, TAP4). Unlike the illustration in FIG. 3b, the reset gate signal (RG), the transmission gate signal (TG), and the select signal (SEL) may be applied commonly to the taps (TAP1–TAP4). As illustrated in FIG. 3b, the transmission gate signals (TXA, TXB) may be applied to the transmission transistors (TA, TB) of the taps (TAP1, TAP2), respectively, and the transmission gate signals (TXC, TXD) may be applied to the transmission transistors (TC, TD) of the taps (TAP3, TAP4), respectively. Unlike the illustration in FIG. 3b, the transmission gate signal (TX) may also be applied commonly to the transmission transistors (TA–TD) of the taps (TAP1–TAP4).

[0023] For example, taps (TAP1, TAP3) can output output signals (OUT1, OUT3) through one output line, and taps (TAP2, TAP4) can output output signals (OUT2, OUT4) through another output line. When the select signal (SEL1) is activated, taps (TAP1, TAP2) can output output signals (OUT1, OUT2), respectively. Then, when the select signal (SEL2) is activated, taps (TAP3, TAP4) can output output signals (OUT3, OUT4), respectively, through the output lines to which output signals (OUT1, OUT2) are transmitted. As another example, taps (TAP1, TAP3) can output output signals (OUT1, OUT3) through two output lines, and taps (TAP2, TAP4) can output output signals (OUT2, OUT4) through two other output lines.

[0024] Although it has been described that the transistors of the pixels (PXa / PXb) are all implemented as NMOS transistors, the transistors of the pixel (PXa) may also be implemented as PMOS transistors or a combination of NMOS transistors and PMOS transistors. The types of transistors of the pixels (PXa / PXb) are not limited to those shown in FIGS. 3a and 3b.

[0025] FIGS. 4a and 4b illustrate exemplary block diagrams of the ToF sensor of FIG. 1. The ToF sensors (140a, 140b) may each be an example of the ToF sensor (140). Each of the ToF sensors (140a, 140b) may include a pixel array (141), a row driver (142), a photogate driver (143), an analog processing circuit (144; CDS / ADC), a data buffer (145), and a timing controller (146).

[0026] A pixel array (141) may include pixels (PX) of FIG. 1 arranged in a row direction (D1; first direction) and a column direction (D2; second direction) perpendicular to each other. The pixel array (141) may be implemented on a semiconductor (or silicon) substrate. The pixels (PX) may accumulate, store, transmit, or remove charges based on control signals (OG, RG, TX, SG, TG, SEL, PG) provided from a row driver (142) and a photogate driver (143).

[0027] The row driver (142) can control the pixel array (141) based on the control of the timing controller (146). The row driver (142) can transmit control signals (OG, RG, TX, SG, TG, SEL) to the pixels (PX) in the row direction (D1). Wiring that transmits the control signals (OG, RG, TX, SG, TG, SEL), connects to the pixels (PX), and forms in the row direction (D1) can be placed on the pixel array (141). The control signals (OG, RG, TX, SG, TG, SEL) may be the OG, RG, TX, SG, TG, SEL (numbers omitted) shown in FIG. 3a and 3b. The row driver (142) can control the pixels (PX) of the pixel array (141) row by row in rolling mode or control all pixels (PX) of the pixel array (141) at once in global mode.

[0028] The photo gate driver (143) can transmit control signals (PG) to the pixel array (141) based on the control of the timing controller (146). The control signals (PG) may be the PGs (numbers omitted) shown in FIGS. 3a and 3b. The photo gate driver (143) of the ToF sensor (140a) can transmit control signals (PG) to the pixels (PX) in the row direction (D1). The row driver (142) and the photo gate driver (143) may each be positioned along the row direction (D1) adjacent to the pixel array (141). The pixel array (141) may be positioned between the row driver (142) and the photo gate driver (143). Unlike the illustration in FIG. 4a, the photo gate driver (143) may be included in the row driver (142). The photogate driver (143) of the ToF sensor (140b) can transmit control signals (PG) to pixels (PX) in the column direction (D2). The photogate driver (143) and the analog processing circuit (144) can each be positioned along the column direction (D2) adjacent to the pixel array (141). The pixel array (141) can be positioned between the photogate driver (143) and the analog processing circuit (144). Unlike the illustration in FIG. 4b, the photogate driver (143) may be included in the analog processing circuit (144). Wiring that transmits the control signals (PG), connects to the pixels (PX), and forms in the row direction (D1) or column direction (D2) can be positioned on the pixel array (141).

[0029] The analog processing circuit (144) can receive, sample, and hold output signals (refer to OUT1~OUT2 / OUT1~OUT4 in FIG. 3a and 3b; may also be referred to as image signals or depth signals) output from the pixel array (141) in the column direction (D2). The analog processing circuit (144) can control output lines formed in the column direction (D2) and connected to the pixels (PX) of the pixel array (141) to which output signals (OUT1~OUT2 / OUT1~OUT4) are transmitted. The analog processing circuit (144) can perform a correlated double sampling (CDS) operation on the output signals and remove noise included in the output signals. The analog processing circuit (144) can perform an analog-to-digital conversion (ADC) operation to convert the output signals into digital signals. The analog processing circuit (144) can generate data (image data or depth data) using the digital signals. The analog processing circuit (144) may also be referred to as a data processing circuit. The analog processing circuit (144) may provide image data to a data buffer (145). The data buffer (145) may store data transmitted from the analog processing circuit (144). The data buffer (145) may output data (DATA) to the outside of the ToF sensor (140a / 140b) (e.g., an internal component of the electronic device (100) or outside the electronic device (100)).

[0030] The timing controller (146) can control the components (141–145) of the ToF sensor (140a / 140b). The timing controller (146) may also control the components (141–145) of the ToF sensor (140a / 140b) based on the control of the controller (150). The timing controller (146) may control the row driver (142) and the photo gate driver (143) based on the modulation information or phase information of the optical signal (EL). As described above, unlike the illustration in FIG. 1, the controller (150) may be embedded in the ToF sensor (140). In this case, the timing controller (146) may include the controller (150) or perform the functions of the controller (150). For example, a timing controller (146; or controller (150)) can synchronize a pixel array (141), a row driver (142), a photo gate driver (143), a light source (110), and an optical device (120) with each other.

[0031] FIGS. 4c and 4d illustrate exemplary block diagrams of the ToF sensors of FIG. 1. The ToF sensors (140c, 140d) may each be an example of the ToF sensor (140). The differences between the ToF sensors (140c, 140d) and the ToF sensors (140a, 140b), and the differences between the ToF sensors (140c, 140d) will be mainly explained.

[0032] Compared to the ToF sensors (140a, 140b), the ToF sensors (140c, 140d) may each further include a column driver (147). The column driver (147) can control the pixel array (141) based on the control of the timing controller (146). The column driver (147) can transmit control signals (OG, TX, SG) to the pixels (PX) in the column direction (D2). For example, wiring that transmits the control signals (OG, TX, SG), connects to the pixels (PX), and forms the column direction (D2) can be placed on the pixel array (141). In this case, the row driver (142) can transmit control signals (RG, TG, SEL) to the pixels (PX) in the row direction (D1). For example, control signals (RG, TG, SEL) are transmitted and connected to pixels (PX), and wiring formed in the row direction (D1) can be placed on the pixel array (141). Since the ToF sensors (140c, 140d) further include a column driver (147), they have the advantage of being able to match the driving direction of the photo gate signal (PG) with the driving directions of the overflow gate signal (OG), transmission gate signal (TX), and storage gate signal (SG) compared to the ToF sensors (140a, 140b).

[0033] The ToF sensor (140d) may include photogate drivers (143a, 143b) positioned on both sides of the pixel array (141) with respect to the column direction (D2) relative to the ToF sensor (140c). The photogate drivers (143a, 143b) may transmit photogate signals (PG) to the pixel array (141) in opposite directions and together. The operation of each of the photogate drivers (143a, 143b) may be substantially the same as the operation of the photogate driver (143). Compared to ToF sensors (140a to 140c) including a photo gate driver (143), in a ToF sensor (140d) including photo gate drivers (143a, 143b), the problem of RC delay caused by resistance and capacitance components of the wiring through which control signals (PG) are transmitted and the problem of photo gate signals (PG) being scattered in the thermal direction (D2) can be improved.

[0034] In an embodiment, the components (141–147) of the ToF sensor (140c / 140d) may be implemented and arranged on a single substrate. Alternatively, referring to FIGS. 4c and 4d, among the components (141–147) of the ToF sensor (140c / 140d), the pixel array (141) may be implemented and arranged on a first substrate (151), and the remaining components (142–147) may be implemented and arranged on a second substrate (152). For example, the first substrate (151) may be laminated on the second substrate (152). For example, compared to the case where all components (141–147) of the ToF sensor (140c / 140d) are placed on a single substrate, when the components (141–147) of the ToF sensor (140c / 140d) are placed on two or more substrates (151, 152), the complexity of the wiring through which control signals (OG, TX, SG) and output signals (OUT) are transmitted can be relatively reduced.

[0035] FIGS. 5A and 5B illustrate exemplary timing diagrams of optical signals and control signals applied to the pixel of FIG. 3A. Each of the timing diagrams of FIGS. 5A and 5B may include a reset period, an exposure period, and a readout period, and may be repeated.

[0036] During the reset period, the overflow gate signal (OG) and the reset gate signal (RG) may be enabled. Based on the enabled overflow gate signal (OG), the overflow transistor (OF) may remove charges accumulated by the photoelectric conversion element (PD) or phototransistors (PA, PB) or discharge them to the power supply voltage (VDD). The reset transistors (R1, R2) may reset the floating diffusion regions (FD1, FD2) based on the reset gate signal (RG). All remaining control signals (PGA, PGB, TXA, TXB, SEL, TG, SG) may be disabled, the optical signal (EL) may not be emitted, and the optical signal (RL) may not be incident on the pixel (PXa).

[0037] During the exposure period, an optical signal (EL) may be emitted to the object (11) and an optical signal (RL) may be incident on the pixel (PXa). The optical signal (EL) of FIG. 5a may be modulated by the controller (150) to resemble a continuous wave. For example, the duty ratio of the optical signal (EL) to the on and off may be about 50%. For example, a period in which the optical signal (EL) has a relatively high level may represent an on period in which the optical signal (EL) is emitted to the object (11), and a period in which the optical signal (EL) has a relatively low level may represent an off period in which the optical signal (EL) is not emitted to the object (11). The optical signal (EL) of FIG. 5b may be modulated by the controller (150) to resemble a gating signal; or a pulsed signal. For example, the duty ratio of the optical signal (EL) to the on and off may be less than about 50%.

[0038] During the exposure period, the photogate signals (PGA, PGB) can be synchronized with the optical signal (EL). The photogate signal (PGA) can have the same phase as the optical signal (EL). The photogate signal (PGB) can have a different phase from the photogate signal (PGA). The photogate signal (PGA) can be activated during the period when the optical signal (EL) has a relatively high level and deactivated during the period when the optical signal (EL) has a relatively low level. The photogate signal (PGB) can be deactivated during the period when the optical signal (EL) has a relatively high level and activated during the period when the optical signal (EL) has a relatively low level. The phase differences (e.g., 0 degrees and 180 degrees) between the optical signal (EL), the photogate signal (PGA), and the photogate signal (PGB) in FIG. 5a and FIG. 5b are merely exemplary. The phototransistors (PA, PB) can each accumulate charges based on the photogate signals (PGA, PGB).

[0039] Referring to FIG. 5a, the overflow gate signal (OG) may be disabled during the exposure period. Referring to FIG. 5b, the overflow gate signal (OG) may be disabled during the exposure period when the optical signal (EL) and photogate signals (PGA, PGB) are enabled, and may be enabled during the exposure period when the optical signal (EL) and photogate signals (PGA, PGB) are disabled. Compared to FIG. 5a, in FIG. 5b, the controller (150) may perform a gating operation that blocks scanning of the object (11) and demodulation of the ToF sensor (140) during some of the exposure period by enabling the overflow gate signal (OG) and disabling the optical signal (EL) and photogate signals (PGA, PGB). Compared to FIG. 5a, in FIG. 5b, the ToF sensor (140) may be exposed to external light relatively less during the exposure period.

[0040] During the exposure period, the transmission gate signal (TXA / TXB) and the storage gate signal (SG) can be activated. The transmission transistors (TA, TB) can each transfer charges accumulated by the phototransistors (PA, PB) to the storage transistors (S1, SG2) based on the activated transmission gate signals (TXA, TXB). The storage transistors (S1, SG2) can each store charges transferred through the transmission transistors (TA, TB) based on the activated storage gate signal (SG).

[0041] During the readout period, the optical signal (EL) may not be emitted to the object (11) and may be disabled. The overflow gate signal (OG) may be re-enabled and the transmission gate signal (TXA / TXB) may be re-disabled. The select signal (SEL) may be enabled and the reset gate signal (RG) may be disabled. Before the transmission gate signal (TG) is enabled during the readout period, the output signals (OUT1, OUT2) of the pixel (PXa) may have reset levels, and the analog processing circuit (144) may receive and sample the output signals (OUT1, OUT2) having reset levels. During the readout period, the transmission gate signal (TG) may be enabled and then disabled again. Additionally, the storage gate signal (SG) may be disabled and then enabled again. The transfer transistors (T1, T2) can each transfer charges stored in the storage transistors (S1, S2) to the floating diffusion regions (FD1, FD2) based on the activated transfer gate signal (TG). The storage transistors (S1, S2) may not store charges based on the deactivated storage gate signal (SG). During the readout period, if the transfer gate signal (TG) is activated and then deactivated again, and the storage gate signal (SG) is deactivated and then activated again, the output signals (OUT1, OUT2) of the pixel (PXa) may have signal levels different from the reset levels, and the analog processing circuit (144) may receive and sample the output signals (OUT1, OUT2) having signal levels. As described above, the analog processing circuit (144) may perform CDS operations and ADC operations for the reset levels and signal levels. Subsequently, when the reset gate signal (RG) is reactivated and the select signal (SEL) is reactivated, the read operation and read interval for the pixel (PXa) can be terminated.

[0042] Timing diagrams of a pixel (PXa) in FIGS. 5a and 5b are illustrated exemplarily. The control signals (PGA, PGB, OG, TXA, TXB, RG, SEL, TG, SG) of FIGS. 5a and 5b applied to the pixel (PXa) may also be applied to other pixels, and the other pixels may operate substantially the same as the pixel (PXa). For example, the pixel (PXa) and other pixels may be arranged along the row direction (D1) or row line in the pixel array (141). The pixel (PXa) and other pixels may operate together (simultaneously) according to the control signals (PGA, PGB, OG, TXA, TXB, RG, SEL, TG, SG) applied in common.

[0043] FIGS. 6A and 6B illustrate, by way of example, timing diagrams of optical signals and control signals applied to the pixel of FIG. 3B. Each of the timing diagrams of FIGS. 6A and 6B may include a reset period, an exposure period, and a readout period, and may be repeated. The optical signals (EL, RL) of FIGS. 6A and 6B may be substantially identical to the optical signals (EL, RL) of FIGS. 5A and 5B, respectively. Each of the control signals (OG, TXA, TXB, TXC, TXD, RG1, RG2, SEL1, SEL2, TG1, TG2, SG1, SG2) of FIGS. 6A and 6B may be substantially identical to a control signal having a similar name among the control signals (OG, TXA, TXB, RG, SEL, TG, SG) of FIGS. 5B. The differences between the timing diagrams of Figs. 6a and 6b and the timing diagrams of Figs. 5a and 5b will be mainly explained.

[0044] Compared to pixel (PXa), pixel (PXb) includes four taps (TAP1–TAP4), so four photogate signals (PGA–PGD) can be applied to pixel (PXb). Similar to photogate signals (PGA, PGB), photogate signals (PGA–PGD) can have different phases (e.g., 0 degrees, 90 degrees, 180 degrees, 270 degrees) and may not overlap with each other in terms of time.

[0045] For example, a pixel (PXb) can output output signals (OUT1~OUT4) to an analog processing circuit (144) through four output lines. During one readout interval, control signals (OG, TXA, TXB, TXC, TXD, RG1, RG2, SEL1, SEL2, TG1, TG2, SG1, SG2) can be applied to the pixel (PXb) as shown in FIG. 6a and FIG. 6b, and the pixel (PXb) can output output signals (OUT1~OUT4) having reset levels and output output signals (OUT1~OUT4) having signal levels during one readout interval.

[0046] In another example, the pixel (PXb) can output output signals (OUT1 to OUT4) to the analog processing circuit (144) through two output lines. During one readout interval, control signals (OG, TXA, TXB, RG1, SEL1, TG1, SG1) can be applied to the pixel (PXb) as illustrated in FIG. 6a and 6b, control signals (TXC, TXD, SEL2, TG2) can be disabled, and control signals (RG2, SG2) can be enabled. During one readout interval, the pixel (PXb) can output output signals (OUT1, OUT2) having reset levels and output output signals (OUT1, OUT2) having signal levels. After the aforementioned readout section, during another readout section, control signals (OG, TXC, TXD, RG2, SEL2, TG2, SG2) may be applied to the pixel (PXb) in a manner similar to that illustrated in FIGS. 6a and 6b, and control signals (TXA, TXB, SEL1, TG1) may be disabled, and control signals (RG1, SG1) may be enabled. During the other readout section, the pixel (PXb) may output output signals (OUT3, OUT4) having reset levels and output output signals (OUT3, OUT4) having signal levels. With respect to the output signals (OUT1~OUT4) of the pixel (PXb), the readout section illustrated in FIGS. 6a and 6b may be repeated twice, and the readout order of the output signals (OUT1~OUT4) is not limited to the example described above.

[0047] FIGS. 7a through 7i respectively illustrate examples of one-dimensional optical scanning in the column direction and pixel array scanning performed by the electronic device of FIG. 1. The pixel array (141) is illustrated as comprising 4x4 pixels (PX) or 8x4 pixels (PX) arranged in the row direction (D1) and the column direction (D2), but the number of pixels (PX) of the pixel array (141) is not limited to the examples described above. The pixels (PX) of FIGS. 7a through 7i may be any one of the pixels (PXa, PXb) of FIGS. 3a and FIGS. 3b. The photogate driver (143) of the ToF sensor (140a) of FIG. 4a may transmit photogate signals (PGA~PGB / PGA~PGD) in the row direction (D1) to the pixels (PX) of FIGS. 7a through 7i. The direction of optical scanning may correspond to the direction in which an optical signal (RL) is sequentially incident on pixel blocks (PB). The direction of optical scanning may be a column direction (D2) and may correspond to a one-dimensional direction. Pixel array scanning refers to a series of operations in which pixels (PX) of a pixel array (141) sequentially demodulate optical signals (RL) based on the direction of optical scanning. The controller (150) can perform scanning of an object (11) by controlling a light source (110) and an optical device (120) to sequentially irradiate an optical signal (EL) onto multiple regions of an object (11). The direction in which photogate signals (PGA~PGB / PGA~PGD) are transmitted may correspond to the direction of optical scanning. For example, the directions described above may be different from each other and perpendicular.

[0048] Referring to FIGS. 7a through 7d, a pixel block (PB) may include pixels (PX) placed in each of the rows (R1 through R4), that is, in a single row (which may also be referred to as a line). Although only one pixel block (PB) is illustrated in FIGS. 7a through 7d, the pixel array (141) may be divided into multiple pixel blocks (PB), and in the case of FIGS. 7a through 7d, the 4x4 pixels (PX) will be divided into multiple pixel blocks (PB), each containing 1x4 pixels (PX). For example, the pixels (PX) of a pixel block (PB) may be placed in the same row and different columns (C1 through C4). Referring to FIGS. 7e through 7i, a pixel block (PB) may include pixels (PX) placed in multiple rows (R1 through R4 / R5 through R8). For example, pixels (PX) of a pixel block (PB) may be placed in different rows (R1–R4 / R5–R8) and different columns (C1–C4). In the case of FIGS. 7e to 7i, 8x4 pixels (PX) will be divided into multiple pixel blocks (PB), each containing 4x4 pixels (PX). In either case, a pixel block (PB) is a unit that divides the pixel array (141) and may include pixels (PX) placed in one or more rows, and the pixels (PX) of the pixel block (PB) may be exposed together to light signals (RL).

[0049] Referring to FIG. 7a, an optical signal (RL) can be sequentially incident on pixels (PX) placed in row (R1), pixels (PX) placed in row (R2), pixels (PX) placed in row (R3), and pixels (PX) placed in row (R4). Depending on the direction of optical scanning (column direction (D2)) performed by the controller (150), components (142–146) can control (drive) the pixels (PX) of the pixel array (141) over time in row units (pixel block units). First, the pixels (PX) placed in row (R1) can be reset during a reset period (RST), exposed to the optical signal (RL) and accumulate charges during an exposure period (EXP), and output signals (OUT1–OUT2 / OUT1–OUT4) during a readout period (RO). The operation of the pixel (PX) during the exposure period (RST), exposure period (EXP), and readout period (RO) is described in FIGS. 5a to 6b. Then, the pixels (PX) placed in row (R2) can be reset during the reset period (RST), exposed to the light signal (RL) and accumulate charges during the exposure period (EXP), and output signals (OUT1~OUT2 / OUT1~OUT4) during the readout period (RO). The readout section (RO) of the pixels (PX) placed in row (R1) and the reset section (RST) of the pixels (PX) placed in row (R2) may overlap each other, and the exposure section (EXP) of the pixels (PX) placed in row (R2) may be located after the readout section (RO) of the pixels (PX) placed in row (R1), and the readout section (RO) of the pixels (PX) placed in row (R1) may be located between the exposure sections (EXP) of the pixels (PX) placed in rows (R1, R2). The readout section (RO) of the pixels (PX) placed in row (R2) may be located after the exposure section (EXP) of the pixels (PX) placed in row (R2).In substantially the same way as the pixels (PX) placed in rows (R1, R2), the pixels (PX) placed in rows (R3, P4) can also operate sequentially. Depending on the scanning direction in which the optical signals (RL) are incident, the pixels (PX) placed in (R1), the pixels (PX) placed in row (R2), the pixels (PX) placed in row (R3), and the pixels (PX) placed in row (R4) can sequentially demodulate the optical signals (RL).

[0050] Referring to FIG. 7b, the frequencies of the photogate signals (PGA~PGB / PGA~PGD) applied to the pixels (PX) placed in rows (R1, R3) during the exposure intervals (EXP) may be f1 (e.g., about 80 MHz), and the frequencies of the photogate signals (PGA~PGB / PGA~PGD) applied to the pixels (PX) placed in rows (R2, R4) during the exposure intervals (EXP) may be f2 (e.g., about 100 MHz). For example, some of the frequencies of the photogate signals (PGA~PGB / PGA~PGD) applied to the pixels (PX) placed in rows (R1~R4) may be the same as each other and different from the rest, or they may be different from each other. The photo gate driver (143) can adjust (set) the frequencies of the photo gate signals (PGA~PGB / PGA~PGD) differently according to the rows (R1~R4). Accordingly, compared to the case where the frequencies of the photo gate signals (PGA~PGB / PGA~PGD) according to the rows (R1~R4) are the same, the ToF sensor (140) can alleviate the burden of multi-frame depth sensing that operates the pixel array (141) multiple times and can increase the sensing distance.

[0051] Referring to FIG. 7c, unlike the normal readout operation of FIG. 7a, the pixels (PX) of the pixel array (141) can perform a rolling readout operation. The pixels (PX) placed in row (R1) can be reset during a reset period (RST) and can be exposed to an optical signal (RL) and accumulate charges during an exposure period (EXP). The reset period (RST) of the pixels (PX) placed in row (R2) can overlap with the exposure period (EXP) of the pixels (PX) placed in row (R1). Substantially identical to the pixels (PX) placed in rows (R1, R2), the pixels (PX) placed in rows (R3, P4) can also perform reset and exposure operations. When the exposure period of all pixels (PX) of the pixel array (141) ends, the readout operation of all pixels (PX) of the pixel array (141) can be initiated. Pixels (PX) placed in rows (R1 to R4) can sequentially output output signals (OUT1 to OUT2 / OUT1 to OUT4) during readout intervals (RO). The readout interval (RO) of the pixels (PX) placed in row (R1) can be located after the exposure interval (EXP) of the pixels (PX) placed in row (R4). The readout interval (RO) of the pixels (PX) placed in row (R2) can be located after the readout interval (RO) of the pixels (PX) placed in row (R1). The readout intervals (RO) of the pixels (PX) placed in rows (R1 to R4) can be located sequentially. Referring to FIG. 7d, unlike FIG. 7c, the pixels (PX) of the pixel array (141) can perform a global readout operation. The readout sections (RO) of the pixels (PX) placed in the rows (R1~R4) may overlap each other. The pixels (PX) placed in the rows (R1~R4) may output output signals (OUT1~OUT2 / OUT1~OUT4) at once during the overlapping readout sections (RO). In the case of FIG. 7d, the analog processing circuit (144) may be placed in the ToF sensor (140) so as to overlap with the pixel array (141) in a direction perpendicular to the row direction (D1) and the column direction (D2).A substrate on which a pixel array (141) is implemented can be stacked three-dimensionally on a substrate on which an analog processing circuit (144) is implemented. As described above in FIG. 7b, the photo gate driver (143) can adjust the frequencies of the photo gate signals (PGA~PGB / PGA~PGD) differently according to the rows (R1~R4) in FIG. 7c and FIG. 7d.

[0052] Referring to FIG. 7e, depending on the direction of the optical scanning performed by the controller (150), the components (142–146) can control the pixels (PX) of the pixel array (141) over time in multiple row units (pixel block units). The pixels (PX) placed in the rows (R1–R4) of the pixel block (PB) can be reset during the reset period (RST) and exposed to the optical signal (RL) and accumulate charges during the exposure period (EXP). After the exposure period (EXP), the pixels (PX) placed in the rows (R1–R4) can sequentially output output signals (OUT1–OUT2 / OUT1–OUT4) during the readout periods (RO), similar to the case of FIG. 7c. Next, the pixels (PX) placed in the rows (R5~R8) of the pixel block (PB) can be reset during the reset period (RST) and exposed to the light signal (RL) and accumulate charges during the exposure period (EXP). After the exposure period (EXP), the pixels (PX) placed in the rows (R5~R8) can sequentially output output signals (OUT1~OUT2 / OUT1~OUT4) during the readout periods (RO), similar to the case of FIG. 7c. The readout sections (RO) of pixels (PX) placed in rows (R1~R4) and the reset sections (RST) of pixels (PX) placed in rows (R5~R8) may overlap each other, and the exposure sections (EXP) of pixels (PX) placed in rows (R5~R8) may be located after the readout sections (RO) of pixels (PX) placed in rows (R1~R4), and the readout sections (RO) of pixels (PX) placed in rows (R1~R4) may be located between the exposure sections (EXP) of pixels (PX) placed in rows (R1~R4, R5~R8). Referring to FIG. 7f, the photo gate driver (143) can adjust the frequencies of the photo gate signals (PGA~PGB / PGA~PGD) differently according to the rows (R1~R4) as described above in FIG. 7b, and except for the above-mentioned point, the timing diagram of FIG. 7f may be substantially the same as the timing diagram of FIG. 7e.

[0053] Referring to FIG. 7g, the photogate driver (143) can delay the photogate signals (PGA–PGB / PGA–PGD) differently relative to the optical signal (EL) according to rows (R1–R4) within the pixel block (PB). For example, the time differences between the optical signal (EL) and the photogate signals (PGA) transmitted to the pixels (PX) during the exposure period (EXP) can be set to different TD1–TD4 (e.g., 0ns, 100ns, 200ns, 300ns) according to the rows (R1–R4). Unlike the illustration in FIG. 7g, some of the time differences between the optical signal (EL) and the photogate signals (PGA) may be the same. Additionally, the time differences between the optical signal (EL) and the photogate signals (PGA) may be set differently depending on the pixel block (PB).

[0054] Referring to FIG. 7h, unlike FIG. 7e and similar to FIG. 7c, the pixels (PX) of the pixel array (141) can perform a rolling readout operation. The pixels (PX) placed in rows (R1–R4) can be reset during a reset period (RST) and exposed to an optical signal (RL) and accumulate charges during an exposure period (EXP). The reset period (RST) of the pixels (PX) placed in rows (R5–R8) can overlap with the exposure period (EXP) of the pixels (PX) placed in rows (R1–R4). When the exposure period of all pixels (PX) of the pixel array (141) ends, the readout operation of all pixels (PX) of the pixel array (141) can be initiated. Referring to FIG. 7i, unlike FIG. 7h and similar to FIG. 7d, the pixels (PX) of the pixel array (141) can perform a global readout operation. Pixels (PX) placed in rows (R1 to R8) can output output signals (OUT1 to OUT2 / OUT1 to OUT4) at once during overlapping readout intervals (RO). Similar to FIG. 7f or 7g, FIG. 7h and 7i, the photogate driver (143) can adjust the frequencies of the photogate signals (PGA to PGB / PGA to PGD) differently according to the rows (R1 to R4) within the pixel block (PB) or delay the photogate signals (PGA to PGB / PGA to PGD) differently relative to the optical signal (EL).

[0055] FIGS. 8a through 8c respectively illustrate examples of one-dimensional optical scanning in the row direction and pixel array scanning performed by the electronic device of FIG. 1. The difference between the timing diagrams of FIGS. 8a through 8c and the timing diagrams of FIGS. 7a through 7i will be primarily explained. The photogate driver (143) of the ToF sensor (140b) of FIG. 4b can transmit photogate signals (PGA~PGB / PGA~PGD) in the column direction (D2) to the pixels (PX) of FIGS. 8a through 8c. The direction of optical scanning may be a row direction (D1) different from the column direction (D2) described in FIGS. 7a through 7i and may correspond to one dimension. An optical signal (RL) may be sequentially incident on pixel blocks (PB) in the row direction (D1), which is the direction of optical scanning. The direction in which photogate signals (PGA~PGB / PGA~PGD) are transmitted may correspond to the direction of optical scanning. For example, the directions described above may be different and perpendicular to each other. Referring to FIGS. 8a through 8c, a pixel block (PB) may include pixels (PX) placed in each of the columns (C1 through C4), that is, in a single column (which may also be referred to as a line). For example, the pixels (PX) of the pixel block (PB) may be placed in the same column and different rows (R1 through R4). Unlike the illustration in FIGS. 8a through 8c, the pixel block (PB) may include pixels placed in multiple columns. For example, the pixels (PX) of the pixel block (PB) may be placed in different rows (R1 through R4) and different columns. In any case, a pixel block (PB) may include pixels (PX) arranged in one or more columns, and the pixels of the pixel block (PB) may be exposed together to light signals (RL).

[0056] Referring to FIG. 8a, pixels (PX) placed in column (C1) can be reset during a reset period (RST), exposed to an optical signal (RL) and accumulate charges during an exposure period (EXP), and output signals (OUT1~OUT2 / OUT1~OUT4) during readout periods (RO). Pixels (PX) placed in column (C1) can sequentially output output signals (OUT1~OUT2 / OUT1~OUT4) during multiple readout periods (RO), similar to FIG. 7c. The readout period (RO) of pixels (PX) placed in column (C1) and row (R1) can be located after the exposure period (EXP) of pixels (PX) placed in column (C1). The readout section (RO) of the pixel (PX) placed in column (C1) and row (R2) may be located after the readout section (RO) of the pixel (PX) placed in column (C1) and row (R1). After the readout sections (RO) of the pixels (PX) placed in column (C1), the reset section (RST) of the pixels (PX) placed in column (C2) may be located. Substantially identical to the pixels (PX) placed in column (C1), the pixels (PX) placed in columns (C2~C4) may also operate sequentially.

[0057] Referring to FIG. 8b, unlike the normal readout operation of FIG. 8a, the pixels (PX) of the pixel array (141) can perform a rolling readout operation. The pixels (PX) placed in column (C1) can be reset during the reset interval (RST), exposed to the light signal (RL) during the exposure interval (EXP), and accumulate charges. After the exposure interval (EXP) of the pixels (PX) placed in column (C1), the pixels (PX) placed in column (C2) can be reset during the reset interval (RST), exposed to the light signal (RL) during the exposure interval (EXP), and accumulate charges. In a similar manner, the pixels (PX) placed in columns (C3, C4) can also be reset, exposed to the light signal (RL), and accumulate charges. When the exposure period of all pixels (PX) of the pixel array (141) ends, the read operation of all pixels (PX) of the pixel array (141) may be initiated. In some cases, the reset operation of each column may be executed only by controlling the overflow gate signal (OG), excluding the reset gate signal (RG). A global reset may be performed immediately before the exposure operation of the entire pixel array, and for each column, only the reset operation by the overflow gate signal (OG) may be performed. Pixels (PX) placed in columns (C1~C4) may sequentially output output signals (OUT1~OUT2 / OUT1~OUT4) during the read operation periods (RO), similar to FIG. 7c. Referring to FIG. 8c, unlike FIG. 8b and similar to FIG. 7d, the pixels (PX) of the pixel array (141) may perform a global read operation. Pixels (PX) placed in columns (C1~C4) can output output signals (OUT1~OUT2 / OUT1~OUT4) at once during overlapping readout intervals (RO).

[0058] In an embodiment, the photogate driver (143) can adjust the frequencies of the photogate signals (PGA~PGB / PGA~PGD) differently according to the rows (R1~R4) in FIG. 8a to 8c as described above in FIG. 7b. In another embodiment, the photogate driver (143) can delay the photogate signals (PGA~PGB / PGA~PGD) differently relative to the optical signal (EL) according to the rows (R1~R4) in FIG. 8a to 8c, similar to FIG. 7g.

[0059] FIGS. 9a through 9f illustrate examples of two-dimensional optical scanning in the row direction and column direction and pixel array scanning, respectively, performed by the electronic device of FIG. 1. In FIGS. 7a through 8c, the controller (150) controls the light source (110) and the optical device (120) to perform one-dimensional optical scanning. In FIGS. 9a through 9f, the light source (110) and the optical device (120), under the control of the controller (150), can perform two-dimensional optical scanning in the row direction (D1) and column direction (D2). Shades on the pixels (PX) may represent laser beams of the optical signal (RL). Laser beams may be sequentially incident on pixels (PX) placed in row and column (R1, C1), row and column (R1, C2), row and column (R1, C3), and row and column (R1, C4), and then laser beams of an optical signal (RL) may be sequentially incident on pixels (PX) placed in the next row and column (R2, C4), row and column (R2, C3), row and column (R2, C2), and row and column (R2, C1). In a similar manner, laser beams may also be sequentially incident on the remaining pixels (PX). For example, the direction of optical scanning may be serpentine. Although not illustrated, the pixels (PX) placed in each of the rows (R1–R4) may constitute the aforementioned pixel blocks.

[0060] Referring to FIG. 9a, depending on the direction of the optical scanning performed by the controller (150), the components (142–146) can control the pixels (PX) of the pixel array (141). The pixels (PX) placed in the row and column (R1, C1), row and column (R1, C2), row and column (R1, C3), and row and column (R1, C4) can be reset during the reset intervals (RST), sequentially exposed to laser beams during the exposure intervals (EXP) to accumulate charges, and output signals (OUT1–OUT2 / OUT1–OUT4) during the readout intervals (RO). For example, the exposure intervals (EXP) of pixels (PX) placed in row and column (R1, C1), row and column (R1, C2), row and column (R1, C3), and row and column (R1, C4) may not overlap with each other and may be positioned sequentially according to the direction of optical scanning. The remaining pixels (PX) may also perform reset, exposure, and read operations similarly to the pixels (PX) placed in row and column (R1, C1), row and column (R1, C2), row and column (R1, C3), and row and column (R1, C4). However, since the direction of optical scanning is a radial direction, the optical scanning directions for pixels (PX) placed in adjacent rows may be opposite to each other, and the directions in which the demodulation operations of the pixels (PX) are performed may be opposite to each other. For example, the exposure intervals (EXP) of pixels (PX) placed in row and column (R4, C4), row and column (R4, C3), row and column (R4, C2), and row and column (R4, C1) may not overlap with each other and may be sequentially positioned in a direction opposite to the direction of light scanning for row (R1).

[0061] Referring to FIG. 9b, unlike the normal readout operation of FIG. 9a, the pixels (PX) of the pixel array (141) can perform a rolling readout operation. When the exposure period of all pixels (PX) of the pixel array (141) ends, the readout operation of all pixels (PX) of the pixel array (141) can be initiated. Similar to FIG. 7c, the pixels (PX) placed in rows (R1~R4) can sequentially output output signals (OUT1~OUT2 / OUT1~OUT4) during readout periods (RO). Referring to FIG. 9c, unlike FIG. 9b, the pixels (PX) of the pixel array (141) can perform a global readout operation. The readout periods (RO) of the pixels (PX) placed in rows (R1~R4) can overlap each other. Similar to Fig. 7d, pixels (PX) placed in rows (R1~R4) can simultaneously output output signals (OUT1~OUT2 / OUT1~OUT4) during overlapping readout intervals (RO).

[0062] Referring to FIGS. 9a through 9c, the exposure intervals of the pixels (PX) may not overlap with one another. For example, the ToF sensor (140a / 140b) may further include an overflow gate driver (not shown) that transmits overflow gate signals (OG) to the pixel array (141) in the column direction (D2). As another example, the overflow gate driver may be integrated into the photo gate driver (143) of the ToF sensor (140b). When the overflow gate signals (OG) are transmitted in the column direction (D2), the photo gate signals (PGA~PGB / PGA~PGD) may be transmitted in either the row direction (D1) or the column direction (D2).

[0063] Referring to FIGS. 9d through 9f, the exposure intervals of pixels (PX) placed in the same row (R1 / R2 / R3 / R4) may overlap each other. Except for the above-mentioned point, the timing diagrams of FIGS. 9d through 9f may be similar to the timing diagrams of FIGS. 9a through 9c, respectively. For example, the row driver (142) of the ToF sensor (140a / 140b) may transmit overflow gate signals (OG) to the pixel array (141) in the row direction (R1).

[0064] FIGS. 10a through 10f respectively illustrate examples of two-dimensional optical scanning in the row direction and column direction and pixel array scanning performed by the electronic device of FIG. 1. A controller (150) can perform two-dimensional optical scanning in the row direction (D1) and column direction (D2) by controlling a light source (110) and an optical device (120). Laser beams may be sequentially incident on pixels (PX) placed in the row and column (R1, C1), row and column (R1, C2), row and column (R1, C3), and row and column (R1, C4), and then laser beams may be sequentially incident on pixels (PX) placed in the next row and column (R2, C1), row and column (R2, C2), row and column (R2, C3), and row and column (R2, C4). In a similar manner, laser beams may also be sequentially incident on the remaining pixels (PX). For example, the direction of the optical scanning may be a zigzag direction rather than the aforementioned direction in FIGS. 9a to 9f. Referring to FIG. 10a, depending on the direction of the optical scanning (i.e., the zigzag direction) performed by the controller (150), the components (142 to 146) can control the pixels (PX) of the pixel array (141). The pixels (PX) placed in the row and column (R1, C1), row and column (R1, C2), row and column (R1, C3), and row and column (R1, C4) can be reset during the reset intervals (RST), sequentially exposed to laser beams during the exposure intervals (EXP) to accumulate charges, and output signals (OUT1~OUT2 / OUT1~OUT4) during the readout intervals (RO). The remaining pixels (PX) can also perform reset, exposure, and read operations similarly to the pixels (PX) placed in row and column (R1, C1), row and column (R1, C2), row and column (R1, C3), and row and column (R1, C4). Except for the direction of optical scanning and the control direction of the pixels (PX), the timing diagrams of FIGS. 10a through 10f may be similar to the timing diagrams of FIGS. 9a through 9f.

[0065] FIGS. 11a through 11f respectively illustrate examples of two-dimensional optical scanning in the row direction and column direction and pixel array scanning performed by the electronic device of FIG. 1. In FIGS. 9a through 10f, the size of the laser beam of the optical signal (RL) may correspond to or be smaller than a single pixel (PX). On the other hand, in FIGS. 11a through 11f, the size of the laser beam may be larger than a single pixel (PX) and may correspond, for example, to 2x2 pixels (PX). The size of the laser beam is not limited to the examples described above and may correspond to mxn pixels (where m and n are integers greater than or equal to 1). Except for the size of the laser beam, similar to FIGS. 9a through 9f, the controller (150) can control the light source (110) and the optical device (120) to perform two-dimensional optical scanning in the row direction (D1) and column direction (D2). Laser beams may be sequentially incident on pixels (PX) located in rows and columns (R1, R2, C1, C2), rows and columns (R1, R2, C3, C4), rows and columns (R1, R2, C5, C6), and rows and columns (R1, R2, C7, C8), and then sequentially incident on pixels (PX) located in the next rows and columns (R3, R4, C7, C8), rows and columns (R3, R4, C5, C6), rows and columns (R3, R4, C3, C4), and rows and columns (R3, R4, C1, C2). In a similar manner, laser beams may also be sequentially incident on the remaining pixels (PX). For example, the direction of the optical scanning may be a radial direction.

[0066] Referring to FIG. 11a, depending on the direction of optical scanning (i.e., the direction of light scanning) performed by the controller (150), components (142–146) can control pixels (PX) of a pixel array (141). Pixels (PX) placed in rows (R1, R2) can be reset during reset intervals (RST) and sequentially exposed to laser beams during exposure intervals (EXP) in the row direction (D1) to accumulate charges. Pixels (PX) placed in row (R1) can output output signals (OUT1–OUT2 / OUT1–OUT4) during readout intervals (RO), and pixels (PX) placed in the next row (R2) can output output signals (OUT1–OUT2 / OUT1–OUT4) during readout intervals (RO). For example, the exposure ranges (EXP) of pixels (PX) placed in columns (C1–C8) may not overlap with each other and may be positioned sequentially according to the direction of optical scanning. As another example, unlike the illustration in FIG. 11a, the exposure ranges (EXP) of pixels (PX) placed in rows and columns (R1, R2, C1, C2) may overlap with each other, the exposure ranges (EXP) of pixels (PX) placed in rows and columns (R1, R2, C3, C4) may overlap with each other, the exposure ranges (EXP) of pixels (PX) placed in rows and columns (R1, R2, C5, C6) may overlap with each other, and the exposure ranges (EXP) of pixels (PX) placed in rows and columns (R1, R2, C7, C8) may overlap with each other. The exposure ranges (EXP) of pixels (PX) placed in rows and columns (R1, R2, C1, C2), the exposure ranges (EXP) of pixels (PX) placed in rows and columns (R1, R2, C3, C4), the exposure ranges (EXP) of pixels (PX) placed in rows and columns (R1, R2, C5, C6), and the exposure ranges (EXP) of pixels (PX) placed in rows and columns (R1, R2, C7, C8) may not overlap each other.The remaining pixels (PX) placed in rows (R3~R4) can also perform reset, exposure, and read operations similarly to the pixels (PX) placed in rows (R1, R2). The pixels (PX) placed in rows (R7, R8) can be reset during reset intervals (RST), sequentially exposed to laser beams during exposure intervals (EXP) in the direction opposite to the row direction (D1), and accumulate charges.

[0067] Referring to FIG. 11b, unlike the normal readout operation of FIG. 11a, the pixels (PX) of the pixel array (141) can perform a rolling readout operation. When the exposure period of all pixels (PX) of the pixel array (141) ends, the readout operation of all pixels (PX) of the pixel array (141) can be initiated. Similar to FIG. 7c, the pixels (PX) placed in rows (R1 to R8) can sequentially output output signals (OUT1 to OUT2 / OUT1 to OUT4) during readout periods (RO). Referring to FIG. 11c, unlike FIG. 11b, the readout periods (RO) of the pixels (PX) placed in rows (R1 to R8) can overlap each other. Similar to FIG. 7d, the pixels (PX) of the pixel array (141) can perform a global readout operation. Pixels (PX) placed in rows (R1 to R8) can output output signals (OUT1 to OUT2 / OUT1 to OUT4) at once during overlapping readout intervals (RO). As described above in FIGS. 9a to 9c, the ToF sensor (140a / 140b) may further include an overflow gate driver (not shown) that transmits overflow gate signals (OG) to the pixel array (141) in the direction (D2), or the overflow gate driver may be integrated into the photo gate driver (143) of the ToF sensor (140b).

[0068] Referring to FIGS. 11d through 11f, the exposure intervals of pixels (PX) placed in rows (e.g., any one of (R1, R2), (R3, R4), (R5, R6), and (R7, R8)) may overlap each other. Except for the above-mentioned point, the timing diagrams of FIGS. 11d through 11f may be similar to the timing diagrams of FIGS. 11a through 11c, respectively. As described above in FIGS. 9d through 9f, the row driver (142) of the ToF sensor (140a / 140b) may transmit overflow gate signals (OG) in the row direction (R1) to the pixel array (141).

[0069] FIGS. 12a through 12f respectively illustrate examples of two-dimensional optical scanning in the row direction and column direction and pixel array scanning performed by the electronic device of FIG. 1. In FIGS. 12a through 12f as well, the size of the laser beam may be larger than a single pixel (PX) and may correspond, for example, to 2x2 pixels (PX). Except for the size of the laser beam, similar to FIGS. 10a through 10f, the controller (150) can control the light source (110) and the optical device (120) to perform two-dimensional optical scanning in the row direction (D1) and column direction (D2). Laser beams may be sequentially incident on pixels (PX) placed in rows and columns (R1, R2, C1, C2), rows and columns (R1, R2, C3, C4), rows and columns (R1, R2, C5, C6), and rows and columns (R1, R2, C7, C8), and then laser beams may be sequentially incident on pixels (PX) placed in the next rows and columns (R3, R4, C1, C2), rows and columns (R3, R4, C3, C4), rows and columns (R3, R4, C5, C6), and rows and columns (R3, R4, C7, C8). In a similar manner, laser beams may also be sequentially incident on the remaining pixels (PX). For example, the direction of the optical scanning may be a zigzag direction rather than the aforementioned linear direction in FIGS. 11a to 11f. Referring to FIG. 12a, components (142–146) can control pixels (PX) of a pixel array (141) according to the direction of optical scanning (i.e., zigzag direction) performed by the controller (150). Pixels (PX) placed in rows (R1, R2) can be reset during reset intervals (RST) and sequentially exposed to laser beams during exposure intervals (EXP) in the row direction (D1) to accumulate charges.Pixels (PX) placed in row (R1) can output output signals (OUT1~OUT2 / OUT1~OUT4) during readout intervals (RO), and pixels (PX) placed in the next row (R2) can output output signals (OUT1~OUT2 / OUT1~OUT4) during readout intervals (RO). The remaining pixels (PX) can also perform reset, exposure, and readout operations similarly to the pixels (PX) placed in rows (R1, R2). Except for the direction of optical scanning and the control direction of the pixels (PX), the timing diagrams of FIGS. 12a through 12f may be similar to the timing diagrams of FIGS. 11a through 11f.

[0070] The operation of the corresponding pixel (PX) in the exposure period (RST), exposure period (EXP), and readout period (RO) illustrated in the timing diagrams of FIGS. 7a and FIGS. 12f has been described in FIGS. 5a through 6b. In the periods indicated by dashed lines in the timing diagrams of FIGS. 7a and FIGS. 12f, the overflow transistor (OF) of the corresponding pixel (PX) is turned on by the activated overflow gate signal (OF) and can remove charges accumulated by the phototransistors (PA, PB).

[0071] FIG. 13 is a semiconductor package according to an embodiment of the present invention. A cross-sectional view of the module is illustrated as an example. In the semiconductor package module (1000), a semiconductor package (1200) may be attached to a package substrate (1100) by an adhesive film (1110). The semiconductor package (1200) may include a semiconductor chip (1210), a semiconductor chip (1220) mounted below the semiconductor chip (1210), and a semiconductor chip (1230) mounted below the semiconductor chip (1220). The semiconductor chips (1210, 1220, 1230) may have different functions. The semiconductor chip (1210) and the semiconductor chip (1220) may have the same width. The side walls of the semiconductor chip (1210) and the semiconductor chip (1220) may be vertically aligned with each other. The semiconductor chip (1210) and the semiconductor chip (1220) may be in contact with each other. A rewiring pattern (1221) may be disposed below the semiconductor chip (1220). For example, the semiconductor chip (1210) may be a ToF sensor chip including the ToF sensor (140) described with reference to FIGS. 1 through 12f. The semiconductor chip (1220) may be a logic chip for driving the semiconductor chip (1210). As another example, the semiconductor chip (1210) may include a pixel array (141) of the ToF sensor (140) described with reference to FIGS. 1 through 12f, and the semiconductor chip (1220) may include the remaining components (142–146) of the ToF sensor (140). The width of the semiconductor chip (1230) may be narrower than the width of the semiconductor chip (1220). The sidewalls of the semiconductor chip (1230) may not be vertically aligned with the sidewalls of the semiconductor chip (1220). For example, the semiconductor chip (1230) may be a memory chip for storing data generated from the semiconductor chip (1210) or the semiconductor chip (1220). The side of the semiconductor chip (1230) may be covered with a mold film (1240). A logic chip may be bonded to the ToF sensor chip, and a memory chip may be bonded to the logic chip using a flip-chip bonding method.This can provide a faster reading function compared to the case where the memory chip is far from the ToF sensor chip. If the memory chip is a DRAM (Dynamic Random Access Memory), the location and specifications of the input / output terminals may be standardized to lower costs through mass production. In this case, the logic chip and the DRAM chip may differ in size, and the locations of the input / output terminals may not match each other. A semiconductor chip (1220), which may be a logic chip, can increase the degree of wiring freedom for the connection between the semiconductor chip (1220) and the semiconductor chip (1230) by including a rewiring pattern (1221). The upper conductive pad (1211) of the semiconductor chip (1210) and the package substrate (1100) may be connected by a wire (1212). A holder (1300) may be placed on the package substrate (1100). The holder (1300) may be spaced apart from the semiconductor package (1200). The holder (1300) can be attached to the package substrate (1100) by an adhesive film (1310). The holder (1300) may have a closed curve shape in a planar manner. The holder (1300) may have a hollow structure adjacent to the edge of the semiconductor package (1200). The holder (1300) may be formed from a polymer material such as polyamide. A transparent substrate (1400) may be placed on the holder (1300). The transparent substrate (1400) may be formed from transparent glass or plastic, etc. The transparent substrate (1400) may be spaced apart from the semiconductor package (1200) to provide an empty space (S). A solder bump (1120) may be attached to the bottom of the package substrate (1100). A plurality of lenses (1500, 1600) corresponding to the lens portion (130), a spacer (1700), and a blocking film (1510) may be disposed on a transparent substrate (1400). FIG. 14 illustrates an exemplary application of the electronic device of FIG. 1. The electronic device (100) of FIG. 1 may be implemented or applied as the electronic device (2000) of FIG. 14.The electronic device (2000) may also be referred to as a computing system, memory system, electronic system, communication system, etc. For example, the electronic device (2000) may be a desktop computer, laptop computer, tablet computer, mobile device, smartphone, PDA (Personal Digital Assistant), PMP (Portable Media Player), wearable device, video game console, workstation, server, data processing device capable of using or supporting interface protocols proposed by the Mobile Industry Processor Interface Alliance (MIPI Alliance), home appliance, black box, drone, etc. The electronic device (2000) may include a system-on-chip (2100), a display (2220), and an image sensor (2230). The system-on-chip (2100) may further include a DigRF master (2110), a DSI (Display Serial Interface) host (2120), a CSI (Camera Serial Interface) host (2130), and a physical layer (2140). A DSI host (2120) can communicate with a DSI device (2225) of a display (2220) according to DSI. A serializer (SER) may be implemented in the DSI host (2120), and a deserializer (DES) may be implemented in the DSI device (2225). A CSI host (2130) can communicate with a CSI device (2235) of an image sensor (2230) according to CSI. A deserializer (DES) may be implemented in the CSI host (2130), and a serializer (SER) may be implemented in the CSI device (2235). The image sensor (2230) may be the ToF sensor (140) or semiconductor package module (1000) described above in FIGS. 1 to 12f.The electronic device (2000) may further include a Radio Frequency (RF) chip (2240) that communicates with the system-on-chip (2100). The RF chip (2240) may include a physical layer (2242), a DigRF slave (2244), and an antenna (2246). For example, the physical layer (2242) and the physical layer (2140) may exchange data with each other via a DigRF interface proposed by the MIPI Alliance. The electronic device (2000) may further include a working memory (2250) and an embedded / card storage device (2255). The working memory (2250) and the embedded / card storage device (2255) may store or output data regarding the system-on-chip (2100). An embedded storage device (2255) may be built into the electronic device (2000), and a card storage device (2255) may be mounted on the electronic device (2000) as a removable device. The electronic device (2000) may communicate with an external device / system through a communication module such as WiMAX (World Interoperability for Microwave Access, 2260), WLAN (Wireless Local Area Network, 2262), UWB (Ultra Wideband, 2264), etc. The electronic device (2000) may further include a speaker (2270), a microphone (2275), a GPS (Global Positioning System) device (2280), and a bridge chip (2290).

Claims

Claim 1 A time of flight (ToF) sensor comprising a pixel array; a light source emitting optical signals; and an optical device for irradiating the optical signals onto regions of an object corresponding to a plurality of pixel blocks, each comprising pixels of the pixel array, wherein each of the pixels comprises: a plurality of taps, each comprising a phototransistor, a first transmission transistor connected to the phototransistor, a storage element connected to the first transmission transistor, a second transmission transistor connected to the storage element, a floating diffusion region connected to the second transmission transistor, and a readout circuit connected to the floating diffusion region; A LIDAR (light detection and ranging) system comprising: an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage; wherein a first pixel block among a plurality of pixel blocks comprises first pixels disposed along a first direction among the pixels, and a second pixel block among the plurality of pixel blocks comprises second pixels disposed along the first direction among the pixels, and wherein the first pixel block and the second pixel block are disposed along a second direction different from the first direction, and wherein the first pixels are synchronized with the optical signals and operate in response to a first photogate signal having a first frequency, and the second pixels are synchronized with the optical signals and operate in response to a second photogate signal having a second frequency different from the first frequency. Claim 2 delete Claim 3 A lidar system according to claim 1, wherein the second direction corresponds to the direction in which the light signals reflected from the object are sequentially incident on the pixel array. Claim 4 In claim 1, the optical device is a lidar system that performs one-dimensional optical scanning of the object by controlling the irradiation directions of the optical signals. Claim 5 delete Claim 6 A lidar system according to claim 1, wherein the first pixels are reset during a first reset period, accumulate charges during a first exposure period, and output first output signals during a first readout period, and the second pixels are reset during a second reset period, accumulate charges during a second exposure period, and output second output signals during a second readout period. Claim 7 In claim 6, the first readout section is located between the first exposure section and the second exposure section, and the second readout section is located after the second exposure section, in a lidar system. Claim 8 In claim 6, the first readout section is located after the second exposure section, and the second readout section is located after the first readout section, in a lidar system. Claim 9 In claim 6, the first readout section and the second readout section overlap each other and the lidar system is located after the second exposure section. Claim 10 delete Claim 11 In claim 6, the first time difference between the first photogate signal transmitted to the phototransistor of each of the first pixels during the first exposure period and the first optical signal among the optical signals is different from the second time difference between the second photogate signal transmitted to the phototransistor of each of the second pixels during the second exposure period and the second optical signal among the optical signals in a lidar system. Claim 12 delete Claim 13 In claim 1, the optical device is a lidar system that performs two-dimensional scanning of the object by controlling the irradiation directions of the light signals. Claim 14 delete Claim 15 delete Claim 16 A time of flight (ToF) sensor comprising a pixel array; a light source emitting a first optical signal and a second optical signal; and an optical device comprising irradiating the first optical signal onto a first region of an object corresponding to a first pixel block of the pixel array and irradiating the second optical signal onto a second region of the object corresponding to a second pixel block of the pixel array, wherein the first pixels of the first pixel block are arranged in a first direction, the second pixels of the second pixel block are arranged in the first direction, and the first and second pixel blocks are arranged in a second direction, and each of the first and second pixels comprises: a plurality of taps each comprising a phototransistor, a first transfer transistor connected to the phototransistor, a storage element connected to the first transfer transistor, a second transfer transistor connected to the storage element, a floating diffusion region connected to the second transfer transistor, and a readout circuit connected to the floating diffusion region; A LIDAR (light detection and ranging) system comprising an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage, wherein the first pixels are synchronized with the first optical signal and operate in response to a first photogate signal having a first frequency, and the second pixels are synchronized with the second optical signal and operate in response to a second photogate signal having a second frequency different from the first frequency. Claim 17 In claim 16, the optical device is a lidar system comprising one of a MEMS (micro-electro-mechanical system) mirror and a rotating prism. Claim 18 In claim 16, the light source comprises a VCSEL (vertical-cavity surface-emitting laser) array, and the optical device is a projection optical device, a lidar system. Claim 19 A light source emitting optical signals; an optical device that performs scanning of an object by controlling the irradiation directions of the optical signals; and a time of flight (ToF) sensor comprising a pixel array including a plurality of pixel blocks that demodulates the optical signals reflected from the object based on the direction of the scanning, wherein each pixel of each of the plurality of pixel blocks comprises: a plurality of taps each comprising a phototransistor, a first transmission transistor connected to the phototransistor, a storage element connected to the first transmission transistor, a second transmission transistor connected to the storage element, a floating diffusion region connected to the second transmission transistor, and a readout circuit connected to the floating diffusion region; A LIDAR (light detection and ranging) system comprising: an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage; wherein a first pixel block among a plurality of pixel blocks comprises first pixels disposed along a first direction among the pixels, a second pixel block among the plurality of pixel blocks comprises second pixels disposed along the first direction among the pixels, and the first pixel block and the second pixel block are disposed along a second direction different from the first direction, wherein the first pixels are synchronized with the optical signals and operate in response to a first photogate signal having a first frequency, and the second pixels are synchronized with the optical signals and operate in response to a second photogate signal having a second frequency different from the first frequency. Claim 20 In claim 19, a lidar system in which the pixels of each of the plurality of pixel blocks are arranged on at least one line. Claim 21 delete Claim 22 delete

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