Display device and method of manufacturing for the same

Abstract

The display device comprises a substrate portion; first banks spaced apart and disposed on the substrate portion; a first electrode and a second electrode spaced apart and disposed on the first bank and covering the first bank; and a light-emitting element disposed between the first electrode and the second electrode, wherein the light-emitting element comprises an active layer, the active layer is in a non-polarized state, and the active layer comprises cubic gallium nitride (c-GaN).

Description

Technology Field

[0001] The present invention relates to a display device and a method for manufacturing the same. Background Technology

[0002] As the information society develops, the demand for display devices for displaying images is increasing in various forms. For example, display devices are being applied to a wide range of electronic devices, such as smartphones, digital cameras, laptop computers, navigation systems, and smart televisions. Display devices may be flat panel display devices, such as Liquid Crystal Display Devices, Field Emission Display Devices, and Organic Light Emitting Display Devices. Among these flat panel display devices, light-emitting display devices include light-emitting elements in which each pixel of the display panel can emit light independently, thereby enabling the display of images without a backlight unit that provides light to the display panel.

[0003] Meanwhile, the display panel has a multilayer structure including a bank layer, a plurality of electrode layers, and a plurality of insulating layers.

[0004] In particular, when the first contact electrode and the second contact electrode are formed on different layers, the device insulating layer for covering the first contact electrode and the device insulating layer for covering the second contact electrode must be formed separately. In this case, additional costs may be incurred for equipment to form the device insulating layer.

[0005] Accordingly, a method of forming the first contact electrode and the second contact electrode on the same layer can be considered to omit the formation of an additional device insulation layer; however, in this case, there are limitations to the resolution or overlay capability of the exposure device for forming the first contact electrode and the second contact electrode. The problem to be solved

[0006] The problem that the present invention aims to solve is to provide a display device including light-emitting elements with improved light-emitting efficiency.

[0007] Another problem that the present invention aims to solve is to provide a method for manufacturing a display device including light-emitting elements with improved light-emitting efficiency.

[0008] The problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0009] A display device according to one embodiment for solving the above problem comprises: a substrate portion; first banks spaced apart and disposed on the substrate portion; a first electrode and a second electrode spaced apart and disposed on the first bank and covering the first bank; and a light-emitting element disposed between the first electrode and the second electrode, wherein the light-emitting element comprises an active layer, the active layer is in a non-polarized state, and the active layer comprises cubic gallium nitride (c-GaN).

[0010] A method for manufacturing a display device according to one embodiment for solving the above problem comprises: a substrate preparation step of preparing a substrate portion on which first banks are spaced apart and arranged; an electrode formation step of forming a first electrode and a second electrode spaced apart from each other and arranged on the first bank, covering the first bank; and a first device insulating layer formation step of forming a first device insulating layer on the first electrode and the second electrode. The method comprises a step of arranging a light-emitting element on the first element insulating layer, wherein the step of arranging a light-emitting element comprises a step of forming a light-emitting element and a step of arranging the formed light-emitting element between the first electrode and the second electrode, and the step of forming the light-emitting element comprises a step of arranging partitions on the non-etching portion of a silicon substrate including a non-etching portion and an etching portion, a step of growing hexagonal gallium nitride (h-GaN) on the etching portion, a step of growing cubic gallium nitride (c-GaN) on the grown hexagonal gallium nitride (h-GaN), and a step of growing hexagonal gallium nitride (h-GaN) and / or cubic gallium nitride (c-GaN) on the grown cubic gallium nitride (c-GaN).

[0011] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0012] According to the display device and the method for manufacturing the display device according to the embodiments, the efficiency of the light-emitting elements can be improved.

[0013] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification. Brief explanation of the drawing

[0014] FIG. 1 is a plan view showing a display device according to one embodiment. Figure 2 is a cross-sectional view taken along line II' of the enlarged view of Figure 1. FIG. 3 is a plan view showing one pixel of a display device according to one embodiment. Figure 4 is a cross-sectional view taken along the line II-II' of Figure 3. FIG. 5 is a drawing showing a light-emitting element according to one embodiment. Figures 6(a) and 6(b) are drawings showing hexagonal gallium nitride (h-GaN / Wurizite GaN) and cubic gallium nitride (c-GaN), respectively. Figures 7(a) and 7(b) are diagrams showing the energy bands of hexagonal gallium nitride (h-GaN / Wurizite GaN) and cubic gallium nitride (c-GaN), respectively. FIG. 8 is a flowchart illustrating a method for manufacturing a display device according to one embodiment. FIGS. 9 to 11 are cross-sectional views of the process steps of a method for manufacturing a display device according to one embodiment. FIG. 12 is a drawing showing a light-emitting element according to another embodiment. FIG. 13 is a drawing showing a light-emitting element according to another embodiment. Specific details for implementing the invention

[0015] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0016] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0017] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be the second component within the technical scope of the present invention.

[0018] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0019] Specific embodiments will be described below with reference to the attached drawings.

[0020] FIG. 1 is a plan view showing a display device according to one embodiment.

[0021] Referring to FIG. 1, a display device according to one embodiment may have a rectangular planar shape. However, it is not limited thereto, and the planar shape of the display device may have a square, a circle, an ellipse, or other polygon. Hereinafter, the case where a rectangle is applied as the planar shape of the display device will be described primarily.

[0022] The display device includes a display panel that provides a display screen. Examples of display panels include inorganic light-emitting diode display panels, organic light-emitting diode display panels, quantum dot light-emitting display panels, plasma display panels, field emission display panels, etc. In the following description, an example of a display panel is provided in which an inorganic light-emitting diode display panel is applied, but it is not limited thereto, and the same technical concept may be applied to other display panels if applicable.

[0023] The display device may include a display area (DA) and a non-display area (NDA). The display area (DA) may include a plurality of pixels (PX) to display an image. The plurality of pixels (PX) may be arranged in a matrix manner. The non-display area (NDA) may be placed around the display area (DA) to surround it and may not display an image. The non-display area (NDA) may completely surround the display area (DA) on a plane. The display area (DA) may also be referred to as an active area, and the non-display area (NDA) as an inactive area. The display area (DA) may generally occupy the center of the display device.

[0024] A non-display area (NDA) may be located on the other side of the first direction (DR1), on one side of the first direction (DR1), on one side of the second direction (DR2), and on the other side of the second direction (DR2), respectively, of the display area (DA). However, not limited thereto, the non-display area (NDA) may be located only on one side and the other side of the first direction (DR1) of the display area (DA), or only on one side and the other side of the second direction (DR2). Wiring or circuit drivers included in the display device may be disposed in each non-display area (NDA), or external devices may be mounted thereon.

[0025] Referring to the enlarged view of FIG. 1, a pixel (PX) of a display device may include a plurality of light-emitting regions (LA1, LA2, LA3) each defined by a pixel defining film, and may emit light having a predetermined peak wavelength through the light-emitting regions (LA1, LA2, LA3). For example, a display area (DA) of a display device may include first to third light-emitting regions (LA1, LA2, LA3). Each of the first to third light-emitting regions (LA1, LA2, LA3) may be a region where light generated from a light-emitting element of the display device is emitted to the outside of the display device.

[0026] The first to third light-emitting regions (LA1, LA2, LA3) can emit light having a predetermined peak wavelength to the outside of the display device. The first light-emitting region (LA1) can emit light of a first color, the second light-emitting region (LA2) can emit light of a second color, and the third light-emitting region (LA3) can emit light of a third color. For example, the first color light may be red light having a peak wavelength in the range of 610 nm to 650 nm, the second color light may be green light having a peak wavelength in the range of 510 nm to 550 nm, and the third color light may be blue light having a peak wavelength in the range of 440 nm to 480 nm, but is not limited thereto.

[0027] The display area (DA) of the display device may include a light-blocking area between light-emitting areas located between adjacent light-emitting areas (LA1, LA2, LA3). For example, the light-blocking area between light-emitting areas may surround the first light-emitting area (LA1) to the third light-emitting area (LA3).

[0028] Figure 2 is a cross-sectional view taken along line II' of the enlarged view of Figure 1.

[0029] Referring to FIG. 2, the display device may include a substrate portion (SUB) positioned across a display area (DA) and a non-display area (NDA), a display element layer (DEP) on the substrate portion (SUB) positioned in the display area (DA), and an encapsulation member (ENC) positioned across the display area (DA) and the non-display area (NDA) and sealing the display element layer (DEP).

[0030] The substrate portion (SUB) may be made of an insulating material such as a polymer resin. The insulating material may include, for example, polyimide (PI), but is not limited thereto. The first substrate portion (SUB1) and the second substrate portion (SUB2) may each contain the same material.

[0031] The display element layer (DEP) may include a buffer layer (BF), a thin film transistor layer (TFTL), a light-emitting element layer (EML), a second planarization layer (OC2), a first capping layer (CAP1), a first light-blocking member (BK1), a first wavelength conversion unit (WLC1), a second wavelength conversion unit (WLC2), a light-transmitting unit (LTU), a second capping layer (CAP2), a third planarization layer (OC3), a second light-blocking member (BK2), first to third color filters (CF1, CF2, CF3), a third protection layer (PAS3), and an encapsulation member (ENC).

[0032] A buffer layer (BF) may be disposed on a substrate (100). The buffer layer (BF) may be made of an inorganic film capable of preventing the penetration of air or moisture.

[0033] The thin film transistor layer (TFTL) may include a thin film transistor (TFT), a gate insulating film (GI), an interlayer insulating film (ILD), a first protection layer (PAS1), and a first planarization layer (OC1).

[0034] A thin-film transistor (TFT) can be placed on a buffer layer (BF) and can form a pixel circuit for each of a plurality of pixels.

[0035] A semiconductor layer (ACT) may be provided on a buffer layer (BF). The semiconductor layer (ACT) may overlap with a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). The semiconductor layer (ACT) may be in direct contact with the source electrode (SE) and the drain electrode (DE), and may face the gate electrode (GE) with a gate insulating film (GI) in between.

[0036] The gate electrode (GE) can be placed on top of the gate insulating film (GI). The gate electrode (GE) can overlap with the semiconductor layer (ACT) with the gate insulating film (GI) in between.

[0037] The source electrode (SE) and the drain electrode (DE) may be spaced apart from each other on the interlayer insulating film (ILD). The source electrode (SE) may be in contact with one end of the semiconductor layer (ACT) through a contact hole provided in the gate insulating film (GI) and the interlayer insulating film (ILD). The drain electrode (DE) may be in contact with the other end of the semiconductor layer (ACT) through a contact hole provided in the gate insulating film (GI) and the interlayer insulating film (ILD). The drain electrode (DE) may be connected to the first electrode (AE) of the light-emitting member (EL) through a contact hole provided in the first protective layer (PAS1) and the first planarization layer (OC1).

[0038] A gate insulating film (GI) may be provided on top of a semiconductor layer (ACT). For example, the gate insulating film (GI) may be placed on top of the semiconductor layer (ACT) and the buffer layer (BF), and may insulate the semiconductor layer (ACT) from the gate electrode (GE). The gate insulating film (GI) may include a contact hole through which a source electrode (SE) passes and a contact hole through which a drain electrode (DE) passes.

[0039] An interlayer insulating film (ILD) may be placed on top of a gate electrode (GE). For example, the interlayer insulating film (ILD) may include a contact hole through which a source electrode (SE) passes and a contact hole through which a drain electrode (DE) passes.

[0040] A first protective layer (PAS1) is provided on top of a thin-film transistor (TFT) to protect the thin-film transistor (TFT). For example, the first protective layer (PAS1) may include a contact hole through which a first electrode (AE) passes.

[0041] The first flattening layer (OC1) is provided on top of the first protection layer (PAS1) to flatten the top of the thin-film transistor (TFT). For example, the first flattening layer (OC1) may include a contact hole through which the first electrode (AE) of the light-emitting member (EL) passes.

[0042] The light-emitting element layer (EML) may include a light-emitting member (EL), a first bank (BNK1), a second bank (BNK2), a first element insulating layer (QPAS1), and a second protective layer (PAS2).

[0043] A light-emitting member (EL) may be provided on a thin-film transistor (TFT). The light-emitting member (EL) may include a first electrode (AE), a second electrode (CE), and a light-emitting element (ED).

[0044] The first electrode (AE) may be provided on the upper part of the first planarization layer (OC1). For example, the first electrode (AE) may be placed on the first bank (BNK1) disposed on the first planarization layer (OC1) to cover the first bank (BNK1). The first electrode (AE) may be placed to overlap with one of the first to third light-emitting regions (LA1, LA2, LA3) defined by the second bank (BNK2). And, the first electrode (AE) may be connected to the drain electrode (DE) of the thin-film transistor (TFT).

[0045] The second electrode (CE) may be provided on top of the first planarization layer (OC1). For example, the second electrode (CE) may be placed on the first bank (BNK1) disposed on the first planarization layer (OC1) to cover the first bank (BNK1). The second electrode (CE) may be placed to overlap with one of the first to third light-emitting regions (LA1, LA2, LA3) defined by the second bank (BNK2). For example, the second electrode (CE) may receive a common voltage supplied to the entire pixel.

[0046] The first element insulating layer (QPAS1) can cover a portion of the first electrode (AE) and a portion of the second electrode (CE) that are adjacent to each other, and can insulate the first electrode (AE) and the second electrode (CE).

[0047] A light-emitting element (ED) may be disposed between a first electrode (AE) and a second electrode (CE) on top of a first planarization layer (OC1). The light-emitting element (ED) may be disposed on a first element insulating layer (QPAS1). One end of the light-emitting element (ED) may be connected to the first electrode (AE), and the other end of the light-emitting element (ED) may be connected to the second electrode (CE). For example, a plurality of light-emitting elements (ED) may include an active layer having the same material and may emit light of the same wavelength range or light of the same color. The light emitted from each of the first to third light-emitting regions (LA1, LA2, LA3) may have the same color. For example, a plurality of light-emitting elements (ED) may emit light of the third color or blue light having a peak wavelength in the range of 440 nm to 480 nm.

[0048] A second bank (BNK2) may be disposed on the first flattening layer (OC1) to define first to third light-emitting regions (LA1, LA2, LA3). For example, the second bank (BNK2) may surround each of the first to third light-emitting regions (LA1, LA2, LA3), but is not limited thereto. The second bank (BNK2) may be disposed in a light-blocking region (BA).

[0049] The second protective layer (PAS2) may be disposed on a plurality of light-emitting members (EL) and a second bank (BNK2). The second protective layer (PAS2) may cover the plurality of light-emitting members (EL) and protect the plurality of light-emitting members (EL).

[0050] The display device may further include a second flattening layer (OC2), a first capping layer (CAP1), a first light-blocking member (BK1), a first wavelength conversion unit (WLC1), a second wavelength conversion unit (WLC2), a light-transmitting unit (LTU), a second capping layer (CAP2), a third flattening layer (OC3), a second light-blocking member (BK2), first to third color filters (CF1, CF2, CF3), a third protective layer (PAS3), and an encapsulation member (ENC).

[0051] The second flattening layer (OC2) is provided on top of the light-emitting element layer (EML) to flatten the top of the light-emitting element layer (EML). The second flattening layer (OC2) may include an organic material.

[0052] The first capping layer (CAP1) may be disposed on the second planarization layer (OC2). The first capping layer (CAP1) may seal the lower surface of the first and second wavelength conversion units (WLC1, WLC2) and the light transmission unit (LTU). The first capping layer (CAP1) may include an inorganic material.

[0053] The first light-blocking member (BK1) may be placed in a light-blocking region (BA) on the first capping layer (CAP1). The first light-blocking member (BK1) may overlap with the second bank (BNK2) in the thickness direction. The first light-blocking member (BK1) can block the transmission of light.

[0054] The first light-blocking member (BK1) may include an organic light-blocking material and a liquid-repellent component.

[0055] The first light-blocking member (BK1) includes a liquid-repellent component, thereby separating the first and second wavelength conversion parts (WLC1, WLC2) and the light-transmitting part (LTU) into corresponding light-emitting regions (LA).

[0056] A first wavelength conversion unit (WLC1) may be disposed in a first light-emitting region (LA1) on a first capping layer (CAP1). The first wavelength conversion unit (WLC1) may be surrounded by a first light-blocking member (BK1). The first wavelength conversion unit (WLC1) may include a first base resin (BS1), a first scatterer (SCT1), and a first wavelength shifter (WLS1).

[0057] The first base resin (BS1) may include a material with a relatively high light transmittance. The first base resin (BS1) may be made of a transparent organic material. For example, the first base resin (BS1) may include at least one of organic materials such as an epoxy resin, an acrylic resin, a cardo resin, and an imide resin.

[0058] The first scatterer (SCT1) may have a different refractive index from the first base resin (BS1) and may form an optical interface with the first base resin (BS1).

[0059] The first wavelength shifter (WLS1) can convert or shift the peak wavelength of incident light to the first peak wavelength. For example, the first wavelength shifter (WLS1) can convert and emit blue light provided by a display device into red light having a single peak wavelength in the range of 610 nm to 650 nm. The first wavelength shifter (WLS1) may be a quantum dot, a quantum rod, or a phosphor. A quantum dot may be a particulate material that emits a specific color as electrons transition from the conduction band to the valence band.

[0060] The light emitted by the first wavelength shifter (WLS1) may have a Full Width of Half Maximum (FWHM) of the emission wavelength spectrum of 45 nm or less, 40 nm or less, or 30 nm or less, and the color purity and color reproduction of the color displayed by the display device may be further improved.

[0061] A portion of the blue light provided by the light-emitting element layer (EML) may pass through the first wavelength conversion unit (WLC1) without being converted into red light by the first wavelength shifter (WLS1). Among the blue light provided by the light-emitting element layer (EML), the light incident on the first color filter (CF1) without being converted by the first wavelength conversion unit (WLC1) may be blocked by the first color filter (CF1). Furthermore, among the blue light provided by the display device, the red light converted by the first wavelength conversion unit (WLC1) may pass through the first color filter (CF1) and be emitted to the outside. Accordingly, the first light-emitting region (LA1) may emit red light.

[0062] The second wavelength converter (WLC2) may be disposed in the second light-emitting region (LA2) on the first capping layer (CAP1). The second wavelength converter (WLC2) may be surrounded by the first light-blocking member (BK1). The second wavelength converter (WLC2) may include a second base resin (BS2), a second scatterer (SCT2), and a second wavelength shifter (WLS2).

[0063] The second base resin (BS2) may include a material with relatively high light transmittance. The second base resin (BS2) may be made of a transparent organic material.

[0064] The second scatterer (SCT2) may have a refractive index different from that of the second base resin (BS2) and may form an optical interface with the second base resin (BS2). For example, the second scatterer (SCT2) may include a light scattering material or light scattering particles that scatter at least a portion of the transmitted light.

[0065] The second wavelength shifter (WLS2) can convert or shift the peak wavelength of incident light to a second peak wavelength different from the first peak wavelength of the first wavelength shifter (WLS1). For example, the second wavelength shifter (WLS2) can convert and emit blue light provided by a display device into green light having a single peak wavelength in the range of 510 nm to 550 nm. The second wavelength shifter (WLS2) may be a quantum dot, a quantum rod, or a phosphor. The second wavelength shifter (WLS2) may include a material of the same nature as the material exemplified in the first wavelength shifter (WLS1).

[0066] The light-transmitting unit (LTU) may be disposed in a third light-emitting region (LA3) on the first capping layer (CAP1). The light-transmitting unit (LTU) may be surrounded by a first light-blocking member (BK1). The light-transmitting unit (LTU) may transmit while maintaining the peak wavelength of the incident light. The light-transmitting unit (LTU) may include a third base resin (BS3) and a third scatterer (SCT3).

[0067] The third base resin (BS3) may include a material with relatively high light transmittance. The third base resin (BS3) may be made of a transparent organic material.

[0068] The third scatterer (SCT3) may have a refractive index different from that of the third base resin (BS3) and may form an optical interface with the third base resin (BS3). For example, the third scatterer (SCT3) may include a light-scattering material or light-scattering particles that scatter at least a portion of the transmitted light.

[0069] The first and second wavelength conversion units (WLC1, WLC2) and the light transmission unit (LTU) are disposed on the light-emitting element layer (EML) through the second planarization layer (OC2) and the first capping layer (CAP1), so that the display device may not require a separate substrate for the first and second wavelength conversion units (WLC1, WLC2) and the light transmission unit (LTU).

[0070] The second capping layer (CAP2) can cover the first and second wavelength conversion sections (WLC1, WLC2), the light transmission section (LTU), and the first light-blocking member (BK1).

[0071] The third flattening layer (OC3) is disposed on top of the second capping layer (CAP2) to flatten the top of the first and second wavelength conversion sections (WLC1, WLC2) and the light transmission section (LTU). The third flattening layer (OC3) may include an organic material.

[0072] The second light-blocking member (BK2) may be placed in a light-blocking region (BA) on the third flattening layer (OC3). The second light-blocking member (BK2) may overlap with the first light-blocking member (BK1) or the second bank (BNK2) in the thickness direction. The second light-blocking member (BK2) can block the transmission of light.

[0073] A first color filter (CF1) may be placed in a first light-emitting region (LA1) on a third planarization layer (OC3). The first color filter (CF1) may be surrounded by a second light-blocking member (BK2). The first color filter (CF1) may overlap with the first wavelength conversion unit (WLC1) in the thickness direction. The first color filter (CF1) may selectively transmit light of a first color (e.g., red light) and block or absorb light of a second color (e.g., green light) and light of a third color (e.g., blue light).

[0074] A second color filter (CF2) may be placed in a second light-emitting region (LA2) on a third planarization layer (OC3). The second color filter (CF2) may be surrounded by a second light-blocking member (BK2). The second color filter (CF2) may overlap with the second wavelength conversion unit (WLC2) in the thickness direction. The second color filter (CF2) may selectively transmit light of a second color (e.g., green light) and block or absorb light of a first color (e.g., red light) and light of a third color (e.g., blue light).

[0075] A third color filter (CF3) may be placed in a third light-emitting region (LA3) on a third planarization layer (OC3). The third color filter (CF3) may be surrounded by a second light-blocking member (BK2). The third color filter (CF3) may overlap with the light-transmitting portion (LTU) in the thickness direction. The third color filter (CF3) may selectively transmit light of a third color (e.g., blue light) and block or absorb light of a first color (e.g., red light) and light of a second color (e.g., green light).

[0076] The first to third color filters (CF1, CF2, CF3) can absorb a portion of the light entering from outside the display device to reduce reflected light caused by external light. Accordingly, the first to third color filters (CF1, CF2, CF3) can prevent color distortion caused by external light reflection.

[0077] The third protective layer (PAS3) can cover the first to third color filters (CF1, CF2, CF3). The third protective layer (PAS3) can protect the first to third color filters (CF1, CF2, CF3).

[0078] The encapsulating member (ENC) may be disposed on the third protective layer (PAS3). For example, the encapsulating member (ENC) may include at least one inorganic film to prevent the penetration of oxygen or moisture. Additionally, the encapsulating member (ENC) may include at least one organic film to protect the display device from foreign substances such as dust.

[0079] FIG. 3 is a plan view showing one pixel of a display device according to one embodiment. FIG. 4 is a cross-sectional view taken along the line II-II' of FIG. 3.

[0080] Referring to FIG. 3 and FIG. 4 together with FIG. 2, each of the plurality of pixels may include first to third subpixels. Each of the first to third subpixels may correspond to each of the first to third light-emitting regions (LA1, LA2, LA3). Each of the first to third subpixels may emit light through the first to third light-emitting regions (LA1, LA2, LA3).

[0081] Each of the first to third subpixels may emit light of the same color. For example, each of the first to third subpixels may include a light-emitting element (ED) of the same type and may emit light of the third color or blue light. As another example, the first subpixel may emit light of the first color or red light, the second subpixel may emit light of the second color or green light, and the third subpixel may emit light of the third color or blue light.

[0082] Each of the first to third subpixels may include first and second electrodes (AE, CE), a light-emitting element (ED), a plurality of contact electrodes (CTE), and a plurality of second banks (BNK2).

[0083] The first and second electrodes (AE, CE) are electrically connected to a light-emitting element (ED) and can receive a predetermined voltage, and the light-emitting element (ED) can emit light of a specific wavelength range. At least a portion of the first and second electrodes (AE, CE) can form an electric field within the pixel, and the light-emitting element (ED) can be aligned by the electric field.

[0084] For example, the first electrode (AE) may be a pixel electrode separated for each of the first to third subpixels, and the second electrode (CE) may be a common electrode connected in common to the first to third subpixels. Either the first electrode (AE) or the second electrode (CE) may be the anode electrode of the light-emitting element (ED), and the other may be the cathode electrode of the light-emitting element (ED).

[0085] The first electrode (AE) may include a first electrode stem portion (AE1) extending in a first direction (DR1), and at least one first electrode branch portion (AE2) branched from the first electrode stem portion (AE1) and extending in a second direction (DR2).

[0086] The first electrode stem portion (AE1) of each of the first to third subpixels may be spaced apart from the first electrode stem portion (AE1) of an adjacent subpixel, and the first electrode stem portion (AE1) may be positioned on a virtual extension line with the first electrode stem portion (AE1) of an adjacent subpixel in the first direction (DR1). The first electrode stem portion (AE1) of each of the first to third subpixels may receive different signals and may be driven independently.

[0087] The first electrode branch portion (AE2) may be branched from the first electrode stem portion (AE1) and extended in a second direction (DR2). One end of the first electrode branch portion (AE2) may be connected to the first electrode stem portion (AE1), and the other end of the first electrode branch portion (AE2) may be spaced apart from the second electrode stem portion (CE1) facing the first electrode stem portion (AE1).

[0088] The second electrode (CE) may include a second electrode stem portion (CE1) extending in a first direction (DR1), and a second electrode branch portion (CE2) branched from the second electrode stem portion (CE1) and extending in a second direction (DR2). Each of the first to third subpixels may be connected to the second electrode stem portion (CE1) of an adjacent subpixel. The second electrode stem portion (CE1) may extend in the first direction (DR1) and traverse a plurality of pixels. The second electrode stem portion (CE1) may be connected to an outer portion of the display area (DA) or a portion extending in one direction from the non-display area (NDA).

[0089] The second electrode branch (CE2) may be spaced apart from and opposite the first electrode branch (AE2). One end of the second electrode branch (CE2) may be connected to the second electrode stem (CE1), and the other end of the second electrode branch (CE2) may be spaced apart from the first electrode stem (AE1).

[0090] The first electrode (AE) can be electrically connected to the thin-film transistor layer (TFTL) of the display device through the first contact hole (CNT1), and the second electrode (CE) can be electrically connected to the thin-film transistor layer (TFTL) of the display device through the second contact hole (CNT2). For example, the first contact hole (CNT1) can be placed in each of the plurality of first electrode stem portions (AE1), and the second contact hole (CNT2) can be placed in the second electrode stem portion (CE1), but is not limited thereto.

[0091] The second bank (BNK2) may be placed at the boundary between multiple pixels. Multiple first electrode stem portions (AE1) may be spaced apart from each other with respect to the second bank (BNK2). The second bank (BNK2) may extend in the second direction (DR2) and may be placed at the boundary of pixels (SP) arranged in the first direction (DR1). Additionally, the second bank (BNK2) may also be placed at the boundary of pixels (SP) arranged in the second direction (DR2). The second bank (BNK2) may define the boundary of multiple pixels.

[0092] The second bank (BNK2) can prevent the ink from crossing the boundaries of the pixels (SP) when the ink in which the light-emitting elements (ED) are dispersed is sprayed during the manufacture of the display device. The second bank (BNK2) can separate the inks in which different light-emitting elements (ED) are dispersed so that they do not mix with each other.

[0093] A light-emitting element (ED) may be placed between a first electrode (AE) and a second electrode (CE). One end of the light-emitting element (ED) may be connected to the first electrode (AE), and the other end of the light-emitting element (ED) may be connected to the second electrode (CE).

[0094] Multiple light-emitting elements (EDs) may be spaced apart from each other and may be aligned substantially parallel to each other. The spacing between the light-emitting elements (EDs) is not particularly limited.

[0095] A plurality of light-emitting elements (EDs) may include an active layer having the same material and emit light of the same wavelength range or light of the same color. The first to third subpixels may emit light of the same color. For example, a plurality of light-emitting elements (EDs) may emit light of a third color or blue light having a peak wavelength in the range of 440 nm to 480 nm.

[0096] The contact electrode (CTE) may include a first and second contact electrode (CTE1, CTE2). The first contact electrode (CTE1) may cover a first electrode branch (AE2) and a part of the light-emitting element (ED), and may electrically connect the first electrode branch (AE2) and the light-emitting element (ED). The second contact electrode (CTE2) may cover a second electrode branch (CE2) and another part of the light-emitting element (ED), and may electrically connect the second electrode branch (CE2) and the light-emitting element (ED).

[0097] The first contact electrode (CTE1) may be disposed on the first electrode branch (AE2) and extend in the second direction (DR2). The first contact electrode (CTE1) may be in contact with one end of the light-emitting element (ED). The light-emitting element (ED) may be electrically connected to the first electrode (AE) through the first contact electrode (CTE1).

[0098] The second contact electrode (CTE2) may be disposed on the second electrode branch (CE2) and extend in the second direction (DR2). The second contact electrode (CTE2) may be spaced apart from the first contact electrode (CTE1) in the first direction (DR1). The second contact electrode (CTE2) may be in contact with the other end of the light-emitting element (ED). The light-emitting element (ED) may be electrically connected to the second electrode (CE) through the second contact electrode (CTE2).

[0099] The light-emitting element layer (EML) of the display device may be disposed on a thin-film transistor layer (TFTL) and may include first to third element insulating layers (QPAS1, QPAS2, QPAS3).

[0100] A plurality of first banks (BNK1) may be disposed in each of the first to third light-emitting regions (LA1, LA2, LA3). Each of the plurality of first banks (BNK1) may correspond to a first electrode (AE) or a second electrode (CE). Each of the first and second electrodes (AE, CE) may be disposed on the corresponding first bank (BNK1). For example, a plurality of first banks (BNK1) may be disposed on a first planarization layer (OC1), and the side of each of the plurality of first banks (BNK1) may be inclined away from the first planarization layer (OC1). The inclined surface of the first bank (BNK1) may reflect light emitted from the light-emitting element (ED).

[0101] The first electrode stem portion (AE1) may include a first contact hole (CNT1) penetrating the first planarization layer (OC1). The first electrode stem portion (AE1) may be electrically connected to a thin-film transistor (TFT) through the first contact hole (CNT1).

[0102] The second electrode stem portion (CE1) may extend in the first direction (DR1) and may also be placed in a non-luminous region where a light-emitting element (ED) is not placed. The second electrode stem portion (CE1) may include a second contact hole (CNT2) that penetrates the first planarization layer (OC1). The second electrode stem portion (CE1) may be electrically connected to a power electrode through the second contact hole (CNT2). The second electrode (CE) may receive a predetermined electrical signal from the power electrode.

[0103] The first and second electrodes (AE, CE) may include a transparent conductive material. The first and second electrodes (AE, CE) may include a highly reflective conductive material. The first and second electrodes (AE, CE) may each form a structure in which a transparent conductive material and a highly reflective metal are stacked in one or more layers, or may be formed as a single layer including these.

[0104] The first element insulating layer (QPAS1) may be disposed on the first planarization layer (OC1), the first electrode (AE), and the second electrode (CE). The first element insulating layer (QPAS1) may cover a portion of each of the first and second electrodes (AE, CE).

[0105] The first element insulating layer (QPAS1) can protect the first and second electrodes (AE, CE) and can insulate the first and second electrodes (AE, CE) from each other. The first element insulating layer (QPAS1) can prevent the light-emitting element (ED) from being damaged by direct contact with other components.

[0106] A light-emitting element (ED) may be disposed on a first element insulating layer (QPAS1) between a first electrode (AE) and a second electrode (CE). One end of the light-emitting element (ED) may be connected to the first electrode (AE), and the other end of the light-emitting element (ED) may be connected to the second electrode (CE).

[0107] The second element insulating layer (QPAS2) may be partially disposed on the light-emitting element (ED) positioned between the first and second electrodes (AE, CE). The second element insulating layer (QPAS2) may be disposed in the center of the upper surface of the light-emitting element (ED). The third insulating layer (QPAS3) may partially cover the outer surface of the light-emitting element (ED). The third insulating layer (QPAS3) may protect the light-emitting element (ED). The third insulating layer (QPAS3) may cover the outer surface of the light-emitting element (ED).

[0108] The contact electrode (CTE) may include a first and second contact electrode (CTE1, CTE2). The first contact electrode (CTE1) may cover a first electrode branch (AE2) and a part of the light-emitting element (ED), and may electrically connect the first electrode branch (AE2) and the light-emitting element (ED). The second contact electrode (CTE2) may cover a second electrode branch (CE2) and another part of the light-emitting element (ED), and may electrically connect the second electrode branch (CE2) and the light-emitting element (ED).

[0109] The first contact electrode (CTE1) may be disposed on the first electrode branch (AE2) and extend in the second direction (DR2). The first contact electrode (CTE1) may be in contact with one end of the light-emitting element (ED). The light-emitting element (ED) may be electrically connected to the first electrode (AE) through the first contact electrode (CTE1).

[0110] The first contact electrode (CTE1) can directly contact the upper surface of one end of the second element insulating layer (QPAS2).

[0111] The second contact electrode (CTE2) may be disposed on the second electrode branch (CE2) and extend in the second direction (DR2). The second contact electrode (CTE2) may be spaced apart from the first contact electrode (CTE1) in the first direction (DR1). The second contact electrode (CTE2) may be in contact with the other end of the light-emitting element (ED). The light-emitting element (ED) may be electrically connected to the second electrode (CE) through the second contact electrode (CTE2).

[0112] The second contact electrode (CTE2) can directly contact the upper surface of the other end of the second element insulating layer (QPAS2).

[0113] The first contact electrode (CTE1) and the second contact electrode (CTE2) may be disposed on the same layer. The first contact electrode (CTE1) and the second contact electrode (CTE2) may each expose the upper surface of the central portion of the second element insulating layer (QPAS2).

[0114] The first contact electrode (CTE1) and the second contact electrode (CTE2) may each include a conductive material. The first contact electrode (CTE1) may include a first material, and the second contact electrode (CTE2) may include a second material. However, the physical properties of the first material and the second material may differ from each other. A detailed explanation thereof will be provided later.

[0115] FIG. 5 is a drawing showing a light-emitting element according to one embodiment. FIG. 6(a) and FIG. 6(b) are drawings showing hexagonal gallium nitride (h-GaN / Wurizite GaN) and cubic gallium nitride (c-GaN), respectively.

[0116] Referring to FIGS. 5 and 6, the light-emitting element (ED) may be a light-emitting diode. For example, the light-emitting element (ED) may have a size in the micrometer or nanometer range and may be an inorganic light-emitting diode containing inorganic materials. The inorganic light-emitting diode may be aligned between two electrodes according to an electric field formed in a specific direction between two electrodes facing each other.

[0117] The light-emitting element (ED) may have a shape that extends in one direction. The light-emitting element (ED) may have a shape such as a rod, wire, or tube. The light-emitting element (ED) may include a first semiconductor layer (111), a second semiconductor layer (113), an active layer (115), an electrode layer (117), and an insulating film (118). The length (h) of the light-emitting element (ED) may be about 4 μm.

[0118] The first semiconductor layer (111) may be an n-type semiconductor. The first semiconductor layer (111) may include a semiconductor material having the chemical formula AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, it may be one or more of n-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The first semiconductor layer (111) may be doped with an n-type dopant, and the n-type dopant may be Si, Ge, Sn, etc. For example, the first semiconductor layer (111) may be n-GaN doped with n-type Si. The thickness of the first semiconductor layer (111) may be in the range of 500 nm to 1 μm, but is not limited thereto. For example, the first semiconductor layer (111) may include hexagonal gallium nitride (h-GaN) (see FIG. 6(a)) and cubic gallium nitride (c-GaN) (see FIG. 6(b)) doped with n-type Si.

[0119] The second semiconductor layer (113) may be a p-type semiconductor and may include a semiconductor material having the chemical formula AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, it may be one or more of p-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The second semiconductor layer (113) may be doped with a p-type dopant, and the p-type dopant may be Mg, Zn, Ca, Ba, etc. For example, the second semiconductor layer (113) may be p-GaN doped with p-type Mg. The second semiconductor layer (113) may have a thickness in the range of 30 nm to 200 nm. For example, the second semiconductor layer (113) may include hexagonal gallium nitride (h-GaN) and cubic gallium nitride (c-GaN) doped with p-type Si.

[0120] The active layer (115) may be disposed between the first semiconductor layer (111) and the second semiconductor layer (113). The active layer (115) may emit light through electron-hole recombination according to a light emission signal applied through the first semiconductor layer (111) and the second semiconductor layer (113). The active layer (115) may include a material having a single or multiple quantum well structure. If the active layer (115) includes a material having a multiple quantum well structure, it may have a structure in which multiple well layers and barrier layers are alternately stacked. For example, the active layer (115) may have a structure in which semiconductor materials with a large band gap energy and semiconductor materials with a small band gap energy are alternately stacked, or it may include different Group 3 to Group 5 semiconductor materials depending on the wavelength range of the emitted light.

[0121] Although not illustrated, a superlattice layer may be further disposed between the active layer (115) and the first semiconductor layer (111). The superlattice layer may relieve stress caused by the difference in lattice constants between the first semiconductor layer (111) and the active layer (115). For example, the superlattice layer may be formed of InGaN or GaN. The thickness of the superlattice layer may be approximately 50 to 200 nm.

[0122] According to one embodiment, some of the light-emitting elements (EDs) of the display device (1) may include different active layers (115) to emit light of different colors. For example, the active layer (115) of the light-emitting element (ED) in the first light-emitting region (LA1) may emit red light of the first color, the active layer (115) of the light-emitting element (ED) in the second light-emitting region (LA2) may emit green light of the second color, and the active layer (115) of the light-emitting element (ED) in the third light-emitting region (LA3) may emit blue light of the third color. Each of the light-emitting element (ED) of the first light-emitting region (LA1), the light-emitting element (ED) of the second light-emitting region (LA2), and the light-emitting element (ED) of the third light-emitting region (LA3) may have different values ​​of 'x' and 'y' in the chemical formula of AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1).

[0123] For example, if the active layer (115) contains InGaN, the color of the light emitted may vary depending on the indium (In) content. For example, as the indium (In) content increases, the wavelength band of the light emitted by the active layer shifts to a red wavelength band, and as the indium (In) content decreases, the wavelength band of the emitted light shifts to a blue wavelength band. Therefore, the indium (In) content of the active layer (115) of the light-emitting element (ED) in the first light-emitting region (LA1) may be higher than the indium (In) content of the active layer (115) of the light-emitting element (ED) in the second light-emitting region (LA2) and the active layer (115) of the light-emitting element (ED) in the third light-emitting region (LA3), respectively. Additionally, the content of indium (In) in the active layer (115) of the light-emitting element (ED) of the second light-emitting region (LA2) may be higher than the content of indium (In) in the active layer (115) of the light-emitting element (ED) of the third light-emitting region (LA3).

[0124] For example, the indium (In) content of the active layer (115) of the light-emitting element (ED) in the third light-emitting region (LA3) may be approximately 5% to 10%, the indium (In) content of the active layer (115) of the light-emitting element (ED) in the second light-emitting region (LA2) may be approximately 10% to 15%, and the indium (In) content of the active layer (115) of the light-emitting element (ED) in the first light-emitting region (LA1) may be 20% to 25%. That is, by adjusting the indium (In) content of the active layer (115), the light-emitting element (ED) can emit light of different colors.

[0125] According to one embodiment, the indium (In) content of the active layer (115) of the light-emitting element (ED) for each light-emitting region (LA1, LA2, LA3) can be achieved by the crystal structure of the active layer (115) including cubic gallium nitride (c-GaN). That is, according to one embodiment, the crystal structure of the active layer (115) of the light-emitting element (ED) for each light-emitting region (LA1, LA2, LA3) can be composed solely of cubic gallium nitride (c-GaN).

[0126] Typically, when the crystal structure of the active layer (115) of the light-emitting element (ED) for each light-emitting region (LA1, LA2, LA3) is made of hexagonal gallium nitride (h-GaN), the indium (In) content of the active layer (115) of the light-emitting element (ED) in the third light-emitting region (LA3) is approximately 15%, the indium (In) content of the active layer (115) of the light-emitting element (ED) in the second light-emitting region (LA2) is approximately 25%, and the indium (In) content of the active layer (115) of the light-emitting element (ED) in the first light-emitting region (LA1) may be 35% or more.

[0127] Figures 7(a) and 7(b) are diagrams showing the energy bands of hexagonal gallium nitride (h-GaN / Wurizite GaN) and cubic gallium nitride (c-GaN), respectively.

[0128] Referring to FIGS. 5 to 7, the energy band gap of hexagonal gallium nitride (h-GaN) may be about 3.4 eV, and the energy band gap of cubic gallium nitride (c-GaN) may be about 3.2 eV. As shown in FIG. 7(a), the conduction band (CB) and valence band (VB) of hexagonal gallium nitride (h-GaN) may have an asymmetric structure in the horizontal direction, and as shown in FIG. 7(b), the conduction band (CB) and valence band (VB) of cubic gallium nitride (c-GaN) may have a symmetric structure in the horizontal direction. Since the conduction band (CB) and valence band (VB) of hexagonal gallium nitride (h-GaN) have an asymmetric structure in the horizontal direction, the active layer having a crystal structure of hexagonal gallium nitride (h-GaN) can have a polarized state (including a polarized material). On the other hand, since the conduction band (CB) and valence band (VB) of cubic gallium nitride (c-GaN) have a symmetric structure in the horizontal direction, the active layer (115) having a crystal structure of cubic gallium nitride (c-GaN) can have a non-polarized state (including a non-polarized material). More specifically, the non-polarized material may include cubic gallium nitride (c-GaN).

[0129] Furthermore, since the conduction band (CB) and valence band (VB) of hexagonal gallium nitride (h-GaN) have an asymmetric structure in the horizontal direction, the energy band gap of the active layer may be larger than the energy band gap of the active layer (115) in which the conduction band (CB) and valence band (VB) of cubic gallium nitride (c-GaN) have a symmetric structure in the horizontal direction.

[0130] Furthermore, because the energy bandgap of cubic gallium nitride (c-GaN) is smaller than the energy bandgap of hexagonal gallium nitride (h-GaN), even with a lower indium (In) content (the indium (In) content of the active layer (115) of the light-emitting element (ED) in the third light-emitting region (LA3) is approximately 5% to 10%, the indium (In) content of the active layer (115) of the light-emitting element (ED) in the second light-emitting region (LA2) is approximately 10% to 15%, and the indium (In) content of the active layer (115) of the light-emitting element (ED) in the first light-emitting region (LA1) is 20% to 25%), the crystal structure of the active layer (115) of the light-emitting element (ED) for each light-emitting region (LA1, LA2, LA3) is composed of hexagonal gallium nitride (h-GaN) (light emission of the third light-emitting region (LA3) The indium (In) content of the active layer (115) of the element (ED) is approximately 15%, the indium (In) content of the active layer (115) of the light-emitting element (ED) in the second light-emitting region (LA2) is approximately 25%, and the indium (In) content of the active layer (115) of the light-emitting element (ED) in the first light-emitting region (LA1) is 35% or more) can emit light of the same color.

[0131] That is, since the active layer (115) composed only of cubic gallium nitride (c-GaN) requires a lower indium (In) content, it may have better luminescence efficiency compared to an active layer containing hexagonal gallium nitride (h-GaN).

[0132] Hereinafter, a method for manufacturing a display device according to one embodiment is described. In the following embodiments, components identical to those in the previously described embodiments are referred to by the same reference numerals, and their descriptions are omitted or simplified.

[0133] FIG. 8 is a flowchart illustrating a method for manufacturing a display device according to one embodiment. FIGS. 9 to 11 are cross-sectional views of process steps of a method for manufacturing a display device according to one embodiment. While describing the method for manufacturing a display device with reference to FIGS. 8 to 11, further reference is made to FIG. 4.

[0134] A method for manufacturing a display device according to one embodiment includes a substrate preparation step of preparing a substrate portion on which first banks (BNK1) are spaced apart and arranged.

[0135] Next, a method for manufacturing a display device according to one embodiment includes an electrode forming step of forming a first electrode (AE) and a second electrode (CE) that are spaced apart from each other and are disposed on a first bank (BNK1) and cover the first bank (BNK1).

[0136] Next, a method for manufacturing a display device according to one embodiment includes a step of forming a first element insulating layer (QPAS1) on a first electrode (AE) and a second electrode (CE).

[0137] Next, the method includes a step of placing a light-emitting element (ED) between a first electrode (AE) and a second electrode (CE) on a first element insulating layer (QPAS1).

[0138] The above-mentioned light-emitting element placement step may include the step of forming a light-emitting element (ED), and the step of placing the formed light-emitting element (ED) between a first electrode (AE) and a second electrode (CE).

[0139] As illustrated in FIGS. 8 and 9, the step of forming a light-emitting element (ED) includes the step (S10) of placing partitions (120) on the non-etching portion (UEP) of a silicon substrate (110) including a non-etching portion (UEP) and an etching portion (EP).

[0140] The partition (120) may include an inorganic insulating material. The inorganic insulating material may include silicon oxide (SiO2), but is not limited thereto.

[0141] The partition wall (120) may be positioned with a first inclination angle (α) with respect to the upper surface of the silicon substrate (110). The first inclination angle (α) may be, for example, 45 degrees to 90 degrees.

[0142] The pitch (P) of the partitions (120) may be about 5800 nm to about 6000 nm.

[0143] Referring to FIGS. 8 and FIGS. 10, the step of forming a light-emitting element (ED) may include the step of forming a first etched surface (110a) and a second etched surface (110b) on the etched portion (EP) after the step (S10) of placing partitions (120) on the non-etched portion (UEP) of a silicon substrate (110) including a non-etched portion (UEP) and an etched portion (EP).

[0144] The etching portion (EP) of the silicon substrate (110_1) may include a first etching surface (110a) and a second etching surface (110b) between the first etching surface (110a) and the upper surface of the non-etching portion (UEP). The second etching surface (110b) may be inclined relative to the first etching surface (110a). For example, the etching depth (td) of the first etching surface (110a) may be about 50 nm to about 150 nm.

[0145] Referring to FIGS. 8 and FIGS. 11, the step of forming a light-emitting device (ED) may include a step (S20) of growing a hexagonal gallium nitride (h-GaN) (310) on an etching portion (EP) after the step of forming a first etching surface (110a) and a second etching surface (110b) on an etching portion (EP). The step (S20) of growing the hexagonal gallium nitride (h-GaN) may involve growing the hexagonal gallium nitride (h-GaN) (310) from the first etching surface (110a) and the second etching surface (110b) of a silicon substrate (110_1) (the growth surface from the first etching surface (110a) is the (110) surface, and the growth surface from the second etching surface (110b) is the (111) surface).

[0146] Next, referring to FIGS. 8 and FIGS. 11, the step of forming a light-emitting element (ED) may include the step (S20) of growing a hexagonal gallium nitride (h-GaN) (310) on an etching portion (EP), followed by the step (S30) of growing a cubic gallium nitride (c-GaN) (320) on the grown hexagonal gallium nitride (h-GaN) (310).

[0147] Next, referring to FIGS. 8 and FIGS. 11, the step of forming a light-emitting element (ED) may include, after the step (S30) of growing a cubic gallium nitride (c-GaN) on the grown hexagonal gallium nitride (h-GaN), the step (S40) of growing a hexagonal gallium nitride (h-GaN) and / or a cubic gallium nitride (c-GaN) (330) on the grown cubic gallium nitride (c-GaN) (320). In the step of growing a cubic gallium nitride (c-GaN) (320) on the grown hexagonal gallium nitride (h-GaN) (310), the cubic gallium nitride (c-GaN) (320) may completely cover the hexagonal gallium nitride (h-GaN) (310).

[0148] As illustrated in FIG. 11, the first portion (321) of the grown hexagonal gallium nitride (h-GaN) (310) and the grown cubic gallium nitride (c-GaN) (320) forms the first semiconductor layer (111) of FIG. 5, the second portion (323) of the grown cubic gallium nitride (c-GaN) (320) forms the active layer (115) of FIG. 5, and the third portion (325) of the grown cubic gallium nitride (c-GaN) (320) and the grown hexagonal gallium nitride (h-GaN) and / or cubic gallium nitride (c-GaN) (330) may form the second semiconductor layer (113).

[0149] The height (hc) of the active layer (115) based on the upper surface of the non-etched portion of the silicon substrate (110_1) may be about 50 nm to about 100 nm.

[0150] As described above in FIG. 5, in order to manufacture the length (h) of the light-emitting element (ED) to be about 4 μm, the second part (323) can be positioned at a predetermined height (hc) based on the upper surface of the non-etched part of the silicon substrate (110_1).

[0151] A predetermined height (hc) based on the upper surface of the non-etched portion of the silicon substrate (110_1) can be calculated based on the following first formula.

[0152] [Equation 1]

[0153]

[0154] As described above, since the energy bandgap of cubic gallium nitride (c-GaN) is smaller than the energy bandgap of hexagonal gallium nitride (h-GaN), even with a lower indium (In) content (the indium (In) content of the active layer (115) of the light-emitting element (ED) in the third light-emitting region (LA3) is approximately 5% to 10%, the indium (In) content of the active layer (115) of the light-emitting element (ED) in the second light-emitting region (LA2) is approximately 10% to 15%, and the indium (In) content of the active layer (115) of the light-emitting element (ED) in the first light-emitting region (LA1) is 20% to 25%), when the crystal structure of the active layer (115) of the light-emitting element (ED) for each light-emitting region (LA1, LA2, LA3) is composed of hexagonal gallium nitride (h-GaN) (third light-emitting The indium (In) content of the active layer (115) of the light-emitting element (ED) in region (LA3) is approximately 15%, the indium (In) content of the active layer (115) of the light-emitting element (ED) in the second light-emitting region (LA2) is approximately 25%, and the indium (In) content of the active layer (115) of the light-emitting element (ED) in the first light-emitting region (LA1) is 35% or more) can emit light of the same color.

[0155] That is, since the active layer (115) composed only of cubic gallium nitride (c-GaN) requires a lower indium (In) content, it may have better luminescence efficiency compared to an active layer containing hexagonal gallium nitride (h-GaN).

[0156] A display device according to another embodiment is described below.

[0157] FIG. 12 is a drawing showing a light-emitting element according to another embodiment.

[0158] Referring to FIG. 12, the light-emitting element (ED_1) according to the present embodiment may further include an undoped semiconductor layer (119a). The undoped semiconductor layer (119a) may be spaced apart from the active layer (115) with the first semiconductor layer (111) in between. The undoped semiconductor layer (119a) may include any one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN.

[0159] Other explanations are detailed in Fig. 5, so further detailed explanations will be omitted below.

[0160] FIG. 13 is a drawing showing a light-emitting element according to another embodiment.

[0161] Referring to FIG. 13, the light-emitting element (ED_2) according to the present embodiment differs from the light-emitting element (ED) according to FIG. 5 in that it may further include an electron blocking layer (119b). The electron blocking layer (119b) may be disposed between the active layer (115) and the second semiconductor layer (113). The electron blocking layer (119b) can prevent electrons flowing into the active layer (115) from being injected into another layer without recombining with holes in the active layer (115). For example, the electron blocking layer (119b) may be p-AlGaN doped with p-type Mg. The thickness of the electron blocking layer (119b) may be in the range of 10 nm to 50 nm, but is not limited thereto.

[0162] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0163] SUB: Substrate section DEP: Display layer: ENC: Bag missing: AE: First electrode CE: Second electrode QPAS1: First element insulating layer QPAS2: Second element insulating layer QPAS3: Third element insulating layer CTE1: First contact electrode CTE2: Second contact electrode

Claims

Claim 1 A display device comprising: a substrate portion; first banks spaced apart and disposed on the substrate portion; a first electrode and a second electrode spaced apart and disposed on the first bank and covering the first bank; and a light-emitting element disposed between the first electrode and the second electrode, wherein the light-emitting element comprises an active layer and a second semiconductor layer between the active layer and the first electrode, wherein the active layer is in a non-polarized state, the active layer comprises cubic gallium nitride (c-GaN), and the second semiconductor layer comprises hexagonal gallium nitride (h-GaN) and cubic gallium nitride (c-GaN) doped with p-type Si. Claim 2 A display device according to claim 1, wherein the active layer is composed solely of cubic gallium nitride (c-GaN). Claim 3 In claim 1, the light-emitting element further comprises a first semiconductor layer between the active layer and the second electrode. Claim 4 In claim 3, the first semiconductor layer comprises n-GaN doped with n-type Si, in a display device. Claim 5 In claim 4, the first semiconductor layer comprises hexagonal gallium nitride (h-GaN) and cubic gallium nitride (c-GaN) doped with n-type Si, in a display device. Claim 6 delete Claim 7 delete Claim 8 In claim 3, the cubic gallium nitride (c-GaN) of the active layer completely covers the hexagonal gallium nitride (h-GaN) of the first semiconductor layer. Claim 9 A display device according to claim 3, further comprising a first contact electrode connected to the first electrode and in contact with the second semiconductor layer of the light-emitting element. Claim 10 A display device according to claim 9, further comprising a second contact electrode connected to the second electrode and in contact with the first semiconductor layer of the light-emitting element. Claim 11 A display device according to claim 10, further comprising the first electrode, a first element insulating layer disposed between the second electrode and the light-emitting element, and a second element insulating layer disposed on the upper surface of the light-emitting element, wherein the first contact electrode is in direct contact with one upper surface of the second element insulating layer, the second contact electrode is in direct contact with the other upper surface of the second element insulating layer, and the first contact electrode and the second contact electrode each expose the upper surface of the central portion of the second element insulating layer. Claim 12 A display device according to claim 11, further comprising a third element insulating layer that integrally covers and contacts the first contact electrode and the second contact electrode. Claim 13 A substrate preparation step for preparing a substrate portion on which first banks are arranged spaced apart; an electrode formation step for forming a first electrode and a second electrode arranged spaced apart from each other and covering the first bank on the first bank; and a first device insulating layer formation step for forming a first device insulating layer on the first electrode and the second electrode. A method for manufacturing a display device comprising a step of arranging a light-emitting element on a first element insulating layer, wherein the step of arranging a light-emitting element comprises a step of forming a light-emitting element and a step of arranging the formed light-emitting element between a first electrode and a second electrode, wherein the step of forming the light-emitting element comprises a step of arranging partitions on a non-etching portion of a silicon substrate including a non-etching portion and an etching portion, a step of growing a hexagonal gallium nitride (h-GaN) on the etching portion, a step of growing a cubic gallium nitride (c-GaN) on the grown hexagonal gallium nitride (h-GaN), and a step of growing a hexagonal gallium nitride (h-GaN) or a cubic gallium nitride (c-GaN) on the grown cubic gallium nitride (c-GaN), or growing a hexagonal gallium nitride (h-GaN) and a cubic gallium nitride (c-GaN). Claim 14 A method for manufacturing a display device according to claim 13, wherein the light-emitting element comprises an active layer, a first semiconductor layer between the active layer and the second electrode, and a second semiconductor layer between the active layer and the first electrode. Claim 15 A method for manufacturing a display device according to claim 14, wherein the active layer is composed solely of cubic gallium nitride (c-GaN). Claim 16 A method for manufacturing a display device according to claim 15, wherein the partitions comprise silicon oxide and the pitch (P) of the partitions is 5800 nm to 6000 nm. Claim 17 A method for manufacturing a display device according to claim 16, wherein the etching portion comprises a first etching surface and a second etching surface between the first etching surface and the upper surface of the non-etching portion, and the second etching surface is tilted with respect to the first etching surface. Claim 18 A method for manufacturing a display device according to claim 17, wherein the etching depth of the first etching surface is 50 nm to 150 nm. Claim 19 A method for manufacturing a display device according to claim 18, wherein the height of the active layer is 50 to 100 nm based on the upper surface of the non-etching portion. Claim 20 A method for manufacturing a display device according to claim 13, wherein, in the step of growing a cubic gallium nitride (c-GaN) on the grown hexagonal gallium nitride (h-GaN), the cubic gallium nitride (c-GaN) completely covers the hexagonal gallium nitride (h-GaN).

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