Display device

Abstract

A display device is provided. The display device comprises a substrate, a plurality of pixels disposed on the substrate and having a first light-emitting region and a second light-emitting region that emit light, a plurality of light sensors disposed on the substrate and including a light-sensing transistor having a first sensing channel that detects light, a bank disposed on the pixels and the light sensors, and a touch conductive layer disposed on the bank and having a touch electrode, wherein the touch conductive layer comprises a light-transmitting portion disposed between the first light-emitting region, the second light-emitting region, and the touch electrode, and the light-transmitting portion overlaps with the bank and the light-sensing transistor in the thickness direction of the substrate.

Description

Technology Field

[0001] The present invention relates to a display device. Background Technology

[0002] As the information society develops, the demand for display devices for displaying images is increasing in various forms. For example, display devices are being applied to various electronic devices such as smartphones, digital cameras, laptop computers, navigation systems, smartwatches, and smart televisions. Display devices may be flat panel display devices such as Liquid Crystal Display Devices, Field Emission Display Devices, and Organic Light Emitting Display Devices.

[0003] Recently, research and development are underway regarding technology that integrates touch or fingerprint recognition sensors into display panels. The problem to be solved

[0004] The problem that the present invention aims to solve is to provide a display device in which light reflected by a user's fingerprint can be incident on a light sensor without being blocked by electrodes inside the display device.

[0005] The problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0006] A display device according to one embodiment for solving the above problem comprises a substrate, a plurality of pixels disposed on the substrate and having a first light-emitting region and a second light-emitting region that emit light, a plurality of light sensors disposed on the substrate and including a light-sensing transistor having a first sensing channel that detects light, a bank disposed on the pixels and the light sensors, and a touch conductive layer disposed on the bank and having a touch electrode, wherein the touch conductive layer comprises a light-transmitting portion disposed between the first light-emitting region, the second light-emitting region, and the touch electrode, and the light-transmitting portion overlaps with the bank and the light-sensing transistor in the thickness direction of the substrate.

[0007] A display device according to one embodiment for solving the above other problems comprises a substrate, a first semiconductor layer having a first channel disposed on the substrate, a first gate layer disposed on the first semiconductor layer and having a gate electrode that overlaps with the first channel, a second gate layer disposed on the first gate layer and having a first sensing scan line, a second semiconductor layer disposed on the second gate layer and having a first sensing channel that overlaps with the first sensing scan line, and a touch conductive layer having a light-transmitting portion disposed between the touch electrode and the touch electrode and that overlaps with the first sensing channel, wherein the touch electrode does not overlap with the first sensing channel. Effects of the invention

[0008] According to the display device of the embodiments, by including a plurality of light-transmitting portions that overlap with the light sensor, external light can pass through the plurality of light-transmitting portions and reach the light sensor. Accordingly, the light sensor can detect light incident from the top of the display panel.

[0009] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification. Brief explanation of the drawing

[0010] FIG. 1 is a plan view showing a display device according to one embodiment. FIG. 2 is a schematic cross-sectional view illustrating an example of a fingerprint detection method for a display device. FIG. 3 is a circuit diagram showing in detail a pixel and a light sensor according to one embodiment. FIG. 4 is a plan view illustrating a touch sensing layer according to one embodiment. FIG. 5 is a plan view showing the mesh structure of touch electrodes according to one embodiment. Figure 6 is a cross-sectional view taken along I-I' of Figure 5. FIG. 7 is a planar arrangement diagram of a mesh structure of a pixel and a touch electrode according to one embodiment. FIG. 8 is a planar arrangement of a mesh structure of a pixel and a touch electrode according to another embodiment. FIG. 9 is a planar layout of a mesh structure of pixels and touch electrodes according to another embodiment. Figure 10 is a layout diagram showing the thin-film transistor layer of a pixel and a light sensor, enlarged from A of Figure 7. Figure 11 is a layout diagram showing the thin-film transistor layer and mesh conductive layer of a pixel and light sensor, enlarged from A of Figure 7. FIG. 12 is a cross-sectional view showing a plane cut along II-II' of FIG. 10 and FIG. 11. FIG. 13 is a cross-sectional view showing a plane cut along III-III' of FIG. 10 and FIG. 11. FIG. 14 is a cross-sectional view showing a plane cut along V-V' of FIG. 10 and FIG. 11. FIG. 15 is an example diagram schematically showing the optical path in which the user's fingerprint is recognized in FIG. 14. FIG. 16 is another example diagram schematically illustrating the optical path where the user's fingerprint is recognized in FIG. 14. FIG. 17 is a cross-sectional view taken along III-III' according to another embodiment. FIG. 18 is a cross-sectional view of a light sensor according to another embodiment. . FIG. 19 is a layout diagram showing a thin film transistor layer and a mesh conductive layer of a pixel and a light sensor according to another embodiment. FIG. 20 is a cross-sectional view showing a plane cut along VI-VI' of FIG. 19. FIG. 21 is an example cross-sectional view showing the data conductive layer and touch sensing layer of FIG. 19. FIG. 22 is a circuit diagram showing an example of a light sensor according to another embodiment. FIG. 23 is a drawing showing a display device capable of front sensing according to one embodiment. FIG. 24 is a drawing showing a fingerprint recognition area in a display device according to one embodiment. Specific details for implementing the invention

[0011] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0012] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0013] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be the second component within the technical scope of the present invention.

[0014] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0015] Specific embodiments will be described below with reference to the attached drawings.

[0016] FIG. 1 is a plan view showing a display device according to one embodiment.

[0017] Referring to FIG. 1, the display device (1) may include various electronic devices that provide a display screen. Examples of the display device (1) may include, but are not limited to, mobile phones, smartphones, tablet PCs, mobile communication terminals, electronic notebooks, e-books, PDAs (Personal Digital Assistants), PMPs (portable multimedia players), navigation systems, UMPCs (Ultra Mobile PCs), televisions, game consoles, wristwatch-type electronic devices, head-mounted displays, personal computer monitors, laptop computers, car dashboards, digital cameras, camcorders, external advertising boards, electronic display boards, various medical devices, various inspection devices, various home appliances including a display area such as refrigerators or washing machines, Internet of Things devices, etc. Representative examples of the display device (1) described below include smartphones, tablet PCs, and laptops, but are not limited thereto.

[0018] The display device (1) may include a display panel (10), a panel driving circuit (20), a circuit board (30), and a read-out circuit (40).

[0019] The display device (1) includes a display panel (10) having an active area (AAR) and an inactive area (NAR). The active area (AAR) includes a display area (DA) where a screen is displayed. The active area (AAR) may completely overlap with the display area (DA). A plurality of pixels (PX) that display an image may be arranged in the display area (DA). Each pixel (PX) may include a light-emitting element ('EL' in FIG. 3).

[0020] The active area (AAR) further includes a fingerprint detection area (FSA). The fingerprint detection area (FSA) is an area that responds to light and is configured to detect the amount or wavelength of incident light. The fingerprint detection area (FSA) may overlap with the display area. The fingerprint detection area (FSA) may be defined as an area that is exactly the same as the display area in a plan view. In this case, the front of the display area of ​​the display device (1) may be an area for fingerprint detection. As another example, the fingerprint detection area (FSA) may be placed only in a limited area necessary for fingerprint recognition. In this case, the fingerprint detection area (FSA) may overlap with a part of the display area but not with another part of the display area.

[0021] A plurality of light-responsive light sensors (PS) may be disposed in the fingerprint detection area (FSA). Each light sensor (PS) may include one or more transistors (e.g., 'LT1' in FIG. 3) that detect incident light and convert it into an electrical signal.

[0022] The non-active area (NAR) is placed around the active area (AAR). The non-active area (NAR) may be a bezel area. The non-active area (NAR) may surround all sides (4 sides in the drawing) of the active area (AAR), but is not limited thereto.

[0023] A non-active area (NAR) may be placed around an active area (AAR). A panel driving circuit (20) may be placed in the non-active area (NAR). The panel driving circuit (20) may drive a plurality of pixels (PX) and / or a plurality of light sensors (PS). The panel driving circuit (20) may output signals and voltages that drive the display panel (10). The panel driving circuit (20) may be formed as an integrated circuit (IC) and mounted on the display panel (10). Signal wiring that transmits signals between the panel driving circuit (20) and the active area (AAR) may be further placed in the non-active area (NAR). As another example, the panel driving circuit (20) may be mounted on a circuit board (30).

[0024] Additionally, signal wiring or a read-out circuit (40) for applying a signal to the fingerprint detection area (FSA) may be placed in the non-active area (NAR). The read-out circuit (40) is connected to each optical sensor (PS) via signal wiring and can detect the user's fingerprint input by receiving the current flowing through each optical sensor (PS). The read-out circuit (40) may be formed as an integrated circuit (IC) and attached to the display circuit board using a COF (chip on film) method, but is not limited thereto, and may also be attached to the non-active area (NAR) of the display panel (10) using a COG (chip on glass) method, a COP (chip on plastic) method, or an ultrasonic bonding method.

[0025] The circuit board (30) can be attached to one end of the display panel (10) using an anisotropic conductive film (ACF). The lead lines of the circuit board (30) can be electrically connected to the pad portion of the display panel (10). The circuit board (30) may be a flexible film such as a flexible printed circuit board or a chip-on-film.

[0026] FIG. 2 is a schematic cross-sectional view illustrating an example of a fingerprint detection method for a display device.

[0027] Referring to FIG. 2, the display device (1) may include a display layer (DPL), an encapsulation layer (TFEL), a touch sensing layer (TSL), and a window (WDL). The display layer (DPL), the encapsulation layer (TFEL), and the touch sensing layer (TSL) may constitute a display panel (10). The display layer (DPL) may include a substrate (SUB), a thin-film transistor layer (TFTL) disposed on the substrate (SUB), and a light-emitting element layer (EML).

[0028] The substrate (SUB) may be a rigid substrate or a flexible substrate capable of bending, folding, rolling, etc. The substrate (SUB) may be made of an insulating material such as glass, quartz, or a polymer resin. Examples of the polymer material include polyethersulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylene apthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), or combinations thereof.

[0029] A display layer (DPL) disposed on a substrate (SUB) includes a thin-film transistor layer (TFTL) and a light-emitting element layer (EML). Each pixel (PX) is driven by a plurality of thin-film transistors disposed on the thin-film transistor layer (TFTL) and a plurality of display signal lines, and can emit light by a light-emitting element ('EL' in FIG. 3) of the light-emitting element layer (EML). Each light sensor (PS) is driven by a plurality of thin-film transistors disposed on the thin-film transistor layer (TFTL) and a plurality of signal lines, and can sense light by a sensing thin-film transistor made of an oxide semiconductor.

[0030] A plurality of display signal lines that apply a signal to drive a pixel (PX) may include a scan line that transmits a scan signal to each pixel (PX) and a data line that transmits a data signal. A plurality of signal lines that apply a signal to drive each optical sensor (PS) may include a fingerprint scan line that transmits a fingerprint scan signal to each optical sensor (PS) and a read-out line that detects a current generated in the optical sensor (PS).

[0031] A light-emitting element layer (EML) disposed on one side of a thin-film transistor layer (TFTL) may include light-emitting elements (ELs) that emit light. Each of the light-emitting elements (ELs) may emit light with a predetermined brightness depending on the anode voltage and cathode voltage applied from the thin-film transistor layer (TFTL).

[0032] Pixels (PX) and light sensors (PS) may be alternately arranged in the horizontal direction (first direction (X-axis direction) or second direction (Y-axis direction)) of the display panel (10). Each pixel (PX) may include a light-emitting region that emits a color among a first color (e.g., red), a second color (e.g., green), and a third color (e.g., blue). Each light sensor (PS) may sense light emitted from the light-emitting region of an adjacent pixel (PX), convert it into an electrical signal, and output it. When light is incident on the light sensor (PS), the light sensor (PS) may generate photocharges according to the recombination of electrons and holes, and the generated photocharges may generate a photocurrent.

[0033] An encapsulation layer (TFEL) may be disposed on top of the light-emitting element layer (EML). The encapsulation layer (TFEL) may include a laminate of an inorganic or organic film to prevent moisture or oxygen from penetrating into the light-emitting elements of the light-emitting element layer (EML).

[0034] A touch sensing layer (TSL) may be disposed on top of the encapsulation layer (TFEL). The touch sensing layer (TSL) may include a plurality of touch electrodes ('SE' in FIG. 4) and a plurality of signal wires ('TL', 'RL' in FIG. 4) for detecting a user's touch. The touch sensing layer (TSL) may detect a user's touch using a self-capacitance method or a mutual capacitance method.

[0035] A window (WDL) may be disposed on the touch sensing layer (TSL). The window (WDL) may include a rigid material such as glass or quartz. The window (WDL) may include, for example, a window member. The window (WDL) may be attached to the touch sensing layer (TSL) by an optically transparent adhesive or the like.

[0036] Although not illustrated, a polarizing film ('POL' in FIG. 15) that reduces external light reflection may be additionally placed between the touch sensing layer (TSL) and the window (WDL). As another example, a color filter ('CF' in FIG. 16) and a light-blocking layer ('LS' in FIG. 16) may be additionally placed between the touch sensing layer (TSL) and the window (WDL).

[0037] Meanwhile, FIG. 2 is a cross-sectional view showing a state in which a user's finger is in contact with the window (WDL) of a display device, which consists of ridges (RID) having a specific pattern of fingerprints (F) and valleys (VAL) between the ridges (RID). When the fingerprint (F) is in contact with the upper surface of the window (WDL), the ridge (RID) portion of the fingerprint (F) contacts the upper surface of the window (WDL), whereas the valley (VAL) portion of the fingerprint (F) does not contact the window (WDL). That is, the upper surface of the window (WDL) comes into contact with air at the valley (VAL) portion.

[0038] When a fingerprint (F) comes into contact with the upper surface of a window (WDL), light emitted from the light-emitting part (EMA) of a pixel (PX) may be reflected from the ridges (RID) and valleys (VAL) of the fingerprint (F). At this time, since the refractive index of the fingerprint (F) and the refractive index of air are different, the amount of light reflected from the ridges (RID) and the amount of light reflected from the valleys (VAL) of the fingerprint (F) may be different. Accordingly, the ridge (RID) and valley (VAL) portions of the fingerprint (F) can be derived based on the difference in the amount of light of the reflected light, that is, the light incident on the light sensor (PS). Since the light sensor (PS) outputs an electrical signal according to the difference in light (or photocurrent), the fingerprint (F) pattern of the finger can be identified.

[0039] The spacing (FP) between the ridges (RID) and ridges (RID) or between the valleys (VAL) of the finger may be approximately 100 to 150 μm. The spacing between adjacent optical sensors (PS) may be smaller than the spacing (FP) between the ridges (RID) and ridges (RID) of the finger. Accordingly, this may be advantageous for increasing the accuracy of user fingerprint recognition.

[0040] In FIG. 2, a plurality of pixels (PX) and a plurality of light sensors (PS) are exemplified as being arranged alternately, but the arrangement structure of the pixels (PX) and light sensors (PS) can be varied depending on the resolution of the display panel (10), the thickness of the window (WDL) on the display panel (10), the material, etc. For example, to improve the resolution of the display panel (10), the light sensors (PS) may be placed only on a part of the display panel (10).

[0041] FIG. 3 is a circuit diagram showing in detail a pixel and a light sensor according to one embodiment.

[0042] Referring to FIG. 3, the circuit structure of a display panel (10) in which a pixel (PX) and a light sensor (PS) are integrated is illustrated as an example.

[0043] Each pixel (PX) may include a plurality of transistors, a light-emitting element (EL), and at least one capacitor. The plurality of transistors may include first to seventh transistors (T1, T2, T3, T4, T5, T6, T7). Among them, the first transistor (T1) is a driving transistor, and the second to seventh transistors (T7) may be transistors that act as switching elements that are turned on or turned off according to a scan signal applied to their respective gate electrodes. The capacitor may include a holding capacitor (Cst) and a boost capacitor (Cboost).

[0044] A pixel (PX) can be connected to a scan initialization line (GIL), a scan control line (GCL), a scan write line (GWL), an emission line (EML), and a data line (DL). Additionally, each pixel (PX) can be connected to a first driving voltage line (VDDL1) to which a driving voltage is applied, a common voltage line (VSSL) to which a common voltage is applied, a first initialization voltage line (VIL1) to which a first initialization voltage (VINT) is applied, and a second initialization voltage line (VIL2) to which a second initialization voltage (VAINT) is applied.

[0045] The scan write line (GWL) is connected to the scan driver and transmits the scan signal to the second transistor (T2). The scan control line (GCL) may have a voltage of opposite polarity to the voltage applied to the scan write line (GWL) at the same timing as the signal of the scan write line (GWL). For example, when a high voltage is applied to the scan write line (GWL), a low voltage may be applied to the scan control line (GCL). The scan control line (GCL) transmits the scan control signal to the third transistor (T3).

[0046] The scan initialization line (GIL) transmits a scan initialization signal to the fourth transistor (T4). The light emission line (EML) transmits a light emission signal to the fifth transistor (T5) and the sixth transistor (T6).

[0047] The data line (DL) transmits the data voltage generated by the data driver to the pixel (PX). The brightness of the light-emitting element (EL) changes according to the data voltage applied to the pixel (PX).

[0048] The first driving voltage line (VDDL1) applies a driving voltage to each pixel (PX). The common voltage line (VSLL) applies a common voltage to the cathode electrode of the light-emitting element (EL). The driving voltage may be a high potential voltage for driving the light-emitting element (EL), and the common voltage may be a low potential voltage for driving the light-emitting element (EL). That is, the driving voltage may have a higher potential than the common voltage. The first initialization voltage line (VIL1) applies a first initialization voltage (VINT). The second initialization voltage line (VIL2) applies a second initialization voltage (VAINT). The driving voltage, the first initialization voltage (VINT), the second initialization voltage (VAINT), and the common voltage may each be a constant voltage.

[0049] Below, we will examine in detail the structure and connection relationships of multiple transistors.

[0050] The first transistor (T1) may have p-type transistor characteristics and may include a polycrystalline semiconductor. The first transistor (T1) may include a gate electrode, a first electrode, and a second electrode. The first transistor (T1) can control the source-drain current (Isd, hereinafter referred to as “driving current (Isd)”) according to the data voltage applied to the gate electrode. The driving current (Isd) flowing through the channel of the first transistor (T1) is proportional to the square of the difference between the absolute value of the voltage between the source electrode and the gate electrode of the first transistor (T1) and the threshold voltage (Vth), as shown in Equation 1.

[0051]

[0052] In mathematical formula 1, k' represents a proportionality constant determined by the structure and physical characteristics of the first transistor (T1), Vsg represents the source-gate voltage of the first transistor (T1), and Vth represents the threshold voltage of the first transistor (T1).

[0053] The gate electrode of the first transistor (T1) is connected to the first electrode of the third transistor (T3) and the first electrode of the holding capacitor (Cst), the first electrode is connected to the second electrode of the second transistor (T2) and the second electrode of the fifth transistor (T5), and the second electrode can be connected to the second electrode of the third transistor (T3) and the first electrode of the sixth transistor (T6).

[0054] The light-emitting element (EL) emits light according to the driving current (Isd). The amount of light emitted by the light-emitting element (EL) can be proportional to the driving current (Isd).

[0055] Each of the light-emitting elements (EL) may be an organic light-emitting diode comprising an anode electrode, a cathode electrode, and an organic light-emitting layer disposed between the anode electrode and the cathode electrode. Alternatively, each of the light-emitting elements may be an inorganic light-emitting element comprising an anode electrode, a cathode electrode, and an inorganic semiconductor disposed between the anode electrode and the cathode electrode. Alternatively, each of the light-emitting elements may be a quantum dot light-emitting element comprising an anode electrode, a cathode electrode, and a quantum dot light-emitting layer disposed between the anode electrode and the cathode electrode. Alternatively, each of the light-emitting elements may be a micro light-emitting diode. In FIG. 12, the anode electrode of the light-emitting element (EL) corresponds to the pixel electrode (171), and the cathode electrode corresponds to the common electrode (173).

[0056] The anode electrode of the light-emitting element (EL) is connected to the second electrode of the sixth transistor (T6) and the second electrode of the seventh transistor (T7), and the cathode electrode can be connected to the common voltage line (VSSL).

[0057] The second transistor (T2) may have p-type transistor characteristics and may include a polycrystalline semiconductor. The second transistor (T2) may be turned on by a scan signal of a scan write line (GWL) to connect the first electrode of the first transistor (T1) to the data line (DL). The gate electrode of the second transistor (T2) may be connected to the scan write line (GWL), the first electrode may be connected to the data line (DL), and the second electrode may be connected to the first electrode of the first transistor (T1).

[0058] The third transistor (T3) may have n-type transistor characteristics and may include an oxide semiconductor. The third transistor (T3) can be turned on by a scan signal from a scan control line (GCL) to connect the gate electrode of the first transistor (T1) and the second electrode. That is, when the third transistor (T3) is turned on, the gate electrode of the first transistor (T1) and the second electrode are connected, so the first transistor (T1) can be driven as a diode. The gate electrode of the third transistor (T3) is connected to the scan control line (GCL), the first electrode is connected to the second electrode of the first transistor (T1), and the second electrode can be connected to the gate electrode of the first transistor (T1).

[0059] The fourth transistor (T4) may have n-type transistor characteristics and may include an oxide semiconductor. The fourth transistor (T4) may be turned on by a scan signal of the scan initialization line (GIL) to connect the gate electrode of the first transistor (T1) to the first initialization voltage line (VIL1). In this case, the gate electrode of the first transistor (T1) may be discharged to the first initialization voltage (VINT) of the first initialization voltage line (VIL1). The gate electrode of the fourth transistor (T4) may be connected to the scan initialization line (GIL), the first electrode may be connected to the first initialization voltage line (VIL1), and the second electrode may be connected to the gate electrode of the first transistor (T1).

[0060] The fifth transistor (T5) may have p-type transistor characteristics and may include a polycrystalline semiconductor. The fifth transistor (T5) may be turned on by a light emission signal from a light emission line (EML) to connect the first electrode of the first transistor (T1) and the first driving voltage line (VDDL1). The gate electrode of the fifth transistor (T5) may be connected to the light emission line (EML), the first electrode may be connected to the first driving voltage line (VDDL1), and the second electrode may be connected to the first electrode of the first transistor (T1).

[0061] The sixth transistor (T6) may have p-type transistor characteristics and may include a polycrystalline semiconductor. The sixth transistor (T6) may be turned on by a light emission signal from a light emission line (EML) to connect the second electrode of the first transistor (T1) and the anode electrode of the light emission element (EL). The gate electrode of the sixth transistor (T6) may be connected to the light emission line (EML), the first electrode may be connected to the second electrode of the first transistor (T1), and the second electrode may be connected to the anode electrode of the light emission element (EL).

[0062] When both the fifth transistor (T5) and the sixth transistor (T6) are turned on, the driving current (Isd) can be supplied to the light-emitting element (EL).

[0063] The seventh transistor (T7) may have p-type transistor characteristics and may include a polycrystalline semiconductor. The seventh transistor (T7) may be turned on by a scan signal of the scan write line (GWL) to connect the second initialization voltage line (VIL2) and the anode electrode of the light-emitting element (EL). In this case, the anode electrode of the light-emitting element (EL) may be discharged to the second initialization voltage (VAINT). The gate electrode of the seventh transistor (T7) may be connected to the scan write line (GWL), the first electrode may be connected to the second initialization voltage line (VIL2), and the second electrode may be connected to the anode electrode of the light-emitting element (EL).

[0064] A holding capacitor (Cst) can be formed between the gate electrode of the first transistor (T1) and the first driving voltage line (VDDL1). One electrode of the holding capacitor (Cst) can be connected to the gate electrode of the first transistor (T1), and the other electrode can be connected to the first driving voltage line (VDDL1). As a result, the holding capacitor (Cst) can maintain the potential difference between the gate electrode of the first transistor (T1) and the first driving voltage line (VDDL1).

[0065] One electrode of the boost capacitor (Cboost) is connected to the gate electrode of the first transistor (T1) and the second electrode of the third transistor (T3), and the other electrode can be connected to the scan write line (GWL). By forming the boost capacitor (Cboost) between the scan write line (GWL) and the gate electrode of the first transistor (T1), the gate voltage of the first transistor (T1) can be increased to stably output a black voltage. For example, when a high voltage is applied to the scan write line (GWL), a low voltage is applied to the scan control line (GCL), and when a low voltage is applied to the scan write line (GWL), a high voltage is applied to the scan control line (GCL). Therefore, when a black voltage is applied to the gate voltage of the first transistor (T1), the black voltage can be reduced. The boost capacitor (Cboost) can increase the gate voltage of the first transistor (T1) to stably output a black voltage.

[0066] If the first electrode of each of the first to seventh transistors (T1, T2, T3, T4, T5, T6, T7) is a source electrode, the second electrode may be a drain electrode. Alternatively, if the first electrode of each of the first to seventh transistors (T1, T2, T3, T4, T5, T6, T7) is a drain electrode, the second electrode may be a source electrode.

[0067] In FIG. 3, the first transistor (T1), the second transistor (T2), the fifth transistor (T5), the sixth transistor (T6), and the seventh transistor (T7) are P-type transistors formed from polycrystalline semiconductors, such as polycrystalline silicon or amorphous silicon, and the third transistor (T3) and the fourth transistor (T4) are N-type transistors formed from oxide semiconductors, but are not limited thereto. For example, one or more of the second transistor (T2), the fifth transistor (T5), the sixth transistor (T6), and the seventh transistor (T7) may include an oxide semiconductor.

[0068] Each optical sensor (PS) may include a plurality of sensing transistors. The plurality of sensing transistors may include an optical sensing transistor (LT1) for detecting incident light and a sensing switch transistor (LT2) for outputting sensing data from the optical sensing transistor (LT1). The optical sensing transistor (LT1) and the sensing switch transistor (LT2) may be connected in series with each other. The plurality of sensing transistors may be turned on or turned off according to a sensing scan signal applied to each gate electrode.

[0069] Each optical sensor (PS) can be connected to a first sensing scan line (RSL1), a second sensing scan line (RSL2), a second driving voltage line (VDDL2) to which a second driving voltage is applied, and a read-out line (ROL).

[0070] The first sensing scan line (RSL1) is connected to the sensing scan driver and transmits the first sensing scan signal to the sensing switch transistor (LT2). The second sensing scan line (RSL2) is connected to the sensing scan driver and transmits the second sensing scan signal to the optical sensing transistor (LT2). The sensing scan driver may provide the sensing scan signal to the optical sensor (PS) independently of the scan driver that applies the scan signal to the pixel (PX). Not limited thereto, the sensing scan driver may be shared with the scan driver. The second driving voltage line (VDDL2) applies a driving voltage to the optical sensor (PS). The second driving voltage line (VDDL2) may be a high potential voltage for driving the optical sensor (PS), and may be wired separately from the first driving voltage line (VDDL1) connected to the pixel (PX), but is not limited thereto, and may be wired shared with the first driving voltage line (VDDL1). The read-out line (ROL) transmits a current signal flowing according to the photocharge generated by the photo sensor (PS) to the read-out circuit ('40' in FIG. 1). By measuring the amount of current flowing through the read-out line (ROL), the read-out circuit (40) can identify the user's fingerprint pattern.

[0071] The light sensing transistor (LT1) may be an amplification transistor that generates a drain-source current upon the application of light. The light sensing transistor (LT1) may be turned on by a second sensing scan signal of a second sensing scan line (RSL2) applied to the gate electrode to connect the second driving voltage line (VDDL2) and the second electrode of the sensing switch transistor (LT2). Accordingly, the drain-source current may be accumulated at the second electrode of the sensing switch transistor (LT2). The light sensing transistor (LT1) may be an N-type transistor using a light-sensitive oxide semiconductor material to sense external light. That is, the semiconductor layer of the light sensing transistor (LT1) may detect light incident from the outside and generate a photocurrent.

[0072] The sensing switch transistor (LT2) may be a switch transistor that always has constant electrical characteristics regardless of the application of light. The sensing switch transistor (LT2) may be turned on by the first sensing scan signal of the first sensing scan line (RSL1) applied to the gate electrode to connect the first electrode of the light sensing transistor (LT1) and the read-out line (ROL). In this case, the drain-source current generated by the light sensing transistor (LT1) may be transmitted to the read-out circuit (40) through the read-out line (ROL). The sensing switch transistor (LT2) may be an N-type transistor using an oxide semiconductor material, or a P-type transistor formed of polycrystalline silicon or amorphous silicon. Additionally, the sensing switch transistor (LT2) may use a material that is not sensitive to light in the semiconductor layer. Accordingly, instability of electrical characteristics caused by light penetrating from the back of the substrate ('SUB' in FIG. 12) can be prevented.

[0073] If the first electrode of the optical sensing transistor (LT1) and the sensing switch transistor (LT2) is a source electrode, the second electrode may be a drain electrode. Alternatively, if the first electrode of the optical sensing transistor (LT1) and the sensing switch transistor (LT2) is a drain electrode, the second electrode may be a source electrode.

[0074] FIG. 4 is a plan view illustrating a touch sensing layer according to one embodiment.

[0075] Referring to FIG. 4, the touch sensing layer (TSL) includes a touch sensing area that detects a user's touch and a touch surrounding area disposed around the touch sensing area. The touch sensing area corresponds to the active area (AAR) described above, and the touch surrounding area may correspond to the inactive area (NAR) described above.

[0076] The active area (AAR) may include a plurality of touch electrodes (SE). The plurality of touch electrodes (SE) may include two types of electrodes, for example, driving electrodes (TE) and sensing electrodes (RE), and after applying a touch driving signal to the driving electrodes (TE), may detect the amount of charge change of the mutual capacitance of the unit sensing area (SUT) through the sensing electrodes (RE). Alternatively, the plurality of touch electrodes (SE) may recognize a touch in a self-capacitance manner that includes one type of electrode. The present specification describes touch members based on the mutual capacitance method, but is not limited thereto.

[0077] The touch sensing layer (TSL) may include a plurality of driving electrodes (TE), a plurality of sensing electrodes (RE), a plurality of driving wires (TL), and a plurality of sensing wires (RL).

[0078] Multiple driving electrodes (TE) are electrically connected in a second direction (Y-axis direction) and can be spaced apart in a first direction (X-axis direction). Driving electrodes (TE) adjacent to each other in the second direction (Y-axis direction) can be connected to each other through a first connection part (CE1).

[0079] Multiple sensing electrodes (RE) are electrically connected in a first direction (X-axis direction) and can be spaced apart in a second direction (Y-axis direction). Sensing electrodes (RE) adjacent to each other in the first direction (X-axis direction) can be connected to each other through a second connection part (CE2).

[0080] In the touch sensing layer (TSL) according to the present embodiment, a plurality of driving electrodes (TE) and a first connection part (CE1) and a plurality of sensing electrodes (RE) and a second connection part (CE2) are disposed on different touch conductive layers, so they can be electrically insulated in the intersection regions.

[0081] Multiple signal wires may be placed in an inactive area (NAR). The multiple signal wires may include multiple driving wires (TL) connected to each of the multiple driving electrodes (TE) and multiple sensing wires (RL) connected to each of the multiple sensing electrodes (RE).

[0082] A plurality of driving wires (TL) may include a first driving wire (TL1) connected to a driving electrode (TE) positioned at one end among driving electrodes (TE) electrically connected in a second direction (Y-axis direction), and a second driving wire (TL2) connected to a driving electrode (TE) positioned at the other end. For example, the first driving wire (TL1) may be connected to a driving electrode (TE) at the lower side of the active area (AAR), and the second driving wire (TL2) may be connected to a driving electrode (TE) at the upper side of the active area (AAR). In this case, the second driving wire (TL2) may be connected to a driving electrode (TE) at the upper side of the active area (AAR) via the right or left edge of the active area (AAR). The first driving wire (TL1) and the second driving wire (TL2) may be connected to a touch driving circuit through a touch pad portion.

[0083] Multiple sensing wires (RL) can be connected to a sensing electrode (RE) positioned at one end of a sensing electrode (RE) electrically connected in a first direction (X-axis direction). The sensing wires (RL) can be connected to a touch driving circuit through a touch pad portion.

[0084] When the touch electrode (SE) is driven in a mutual capacitance manner, driving signals are supplied to the driving electrodes (TE) through the first driving wire (TL1) and the second driving wire (TL2) to charge the mutual capacitances formed in the intersection regions of the sensing electrodes (RE) and the driving electrodes (TE). Then, the change in charge amount of the sensing electrodes (RE) is measured through the sensing wire (RL), and the presence of a touch input is determined based on the change in charge amount of the sensing electrodes (RE).

[0085] Hereinafter, the planar arrangement and cross-sectional structure of the touch electrodes (SE) will be described with reference to FIGS. 5 and FIGS. 6.

[0086] FIG. 5 is a plan view showing a mesh structure of touch electrodes according to one embodiment. FIG. 6 is a cross-sectional view taken along I-I' of FIG. 5.

[0087] In FIG. 5, for convenience of explanation, only two sensing electrodes (RE) adjacent in the first direction (X-axis direction) and two driving electrodes (TE) adjacent in the second direction (Y-axis direction) of the touch sensing layer (TSL) are shown.

[0088] Referring to FIG. 5, the touch electrode (SE) may further include dummy patterns (DE) arranged to be surrounded by a driving electrode (TE) or a sensing electrode (RE), respectively. The driving electrodes (TE), the sensing electrodes (RE), and the dummy patterns (DE) may be electrically separated from each other. The driving electrodes (TE), the sensing electrodes (RE), and the dummy patterns (DE) may be spaced apart from each other.

[0089] In order for the sensing electrodes (RE) and the driving electrodes (TE) to be electrically separated at their intersections, driving electrodes (TE) adjacent to each other in a second direction (Y-axis direction) may be connected through first connection portions (CE1), and sensing electrodes (RE) adjacent to each other in a first direction (X-axis direction) may be connected through second connection portions (CE2). For insulating intersection, the first connection portions (CE1) are formed on a different layer from the sensing electrodes (RE) and the driving electrodes (TE), and may be connected to the driving electrodes (TE) through first contact holes (CNT1).

[0090] The driving electrodes (TE), sensing electrodes (RE), first connection parts (CE1), and second connection parts (CE2) may be formed as a planar mesh structure or a net structure. The dummy patterns (DE) may also be formed as a planar mesh structure or a net structure.

[0091] When a touch sensing layer (TSL) including a touch electrode (SE) is formed directly on an encapsulation layer (TFEL), a parasitic capacitance is formed between the common electrode (173) of the light-emitting element layer (EML) and the touch electrode (SE). Since the parasitic capacitance is proportional to the overlapping area between the common electrode (173) and the touch electrode (SE), the parasitic capacitance may be reduced when the touch electrodes (SE) are formed in a planar mesh structure or a net structure.

[0092] Referring to FIG. 6, the touch sensing layer (TSL) may include a base layer (205), a first touch conductive layer (210) on the base layer (205), a first touch insulating layer (215) on the first touch conductive layer (210), a second touch conductive layer (220) on the first touch insulating layer (215), and a second touch insulating layer (230) covering the second touch conductive layer (220).

[0093] Specifically, a first touch conductive layer (210) is disposed on the base layer (205). The first touch conductive layer (210) is covered by a first touch insulating layer (215). The first touch insulating layer (215) insulates the first touch conductive layer (210) from the second touch conductive layer (220). A second touch conductive layer (220) is disposed on the first touch insulating layer (215). The second touch insulating layer (230) can cover and protect the second touch conductive layer (220).

[0094] The base layer (205) may include an inorganic insulating material. For example, the base layer (205) may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The base layer (205) may also be an inorganic film constituting a thin film encapsulation layer described later.

[0095] In one embodiment, the first connection portion (CE1) is formed of a first touch conductive layer (210), and the driving electrode (TE), the sensing electrode (RE), and the second connection portion (CE2) may be formed of a second touch conductive layer (220) positioned between the first touch conductive layer (210) and the first touch insulating layer (215). Through such a structure, mutual insulation can be secured at the intersection of the driving electrode (TE) and the sensing electrode (RE). However, it is not limited thereto, and the second connection portion (CE2) may be formed of the first touch conductive layer (210), and the driving electrode (TE), the sensing electrode (RE), and the first connection portion (CE1) may be formed of the second touch conductive layer (220).

[0096] When the touch electrode (SE) has a mesh structure, the first touch conductive layer (210) and the second touch conductive layer (220) may be made of low-resistance materials such as aluminum (Al), molybdenum (Mo), gold (Au), titanium (Ti), nickel (Ni), and copper (Cu).

[0097] The first touch insulating layer (215) and the second touch insulating layer (230) may include an inorganic insulating material or an organic insulating material. In one embodiment, either the first touch insulating layer (215) or the second touch insulating layer (230) may include an inorganic material, and the other may include an organic material.

[0098] The first touch insulating layer (215) may include a first contact hole (CNT1). Through the first contact hole (CNT1), the first touch conductive layer (210) (e.g., the first connecting part (CE1)) and a part of the second touch conductive layer (220) (e.g., the driving electrode (TE)) may be electrically connected.

[0099] When the touch electrodes (SE) each have a mesh structure, the second touch conductive layer (220) constituting them can be placed on a non-luminous area of ​​the display panel. When the second touch conductive layer (220) is placed on a non-luminous area, even if an opaque low-resistance metal is applied as the second touch conductive layer (220), light emission is not hindered and may not be visible to the user.

[0100] Hereinafter, with reference to FIG. 7, the relative arrangement relationship of the mesh structure of the pixel (PX) of the display layer (DPL) and the touch electrode (SE) of the touch sensing layer (TSL) according to one embodiment will be explained.

[0101] FIG. 7 is a planar arrangement diagram of a mesh structure of a pixel and a touch electrode according to one embodiment.

[0102] In FIG. 7, a pixel (PX) may include a first color pixel (R), a second color pixel (G), and a third color pixel (B). For example, the first color may be red, the second color may be green, and the third color may be blue. Each of the pixels (PX) may include a plurality of light-emitting regions (EA: EA1, EA2, EA3) that emit light. The first color pixel (R) may include a first light-emitting region (EA1), the second color pixel (G) may include a second light-emitting region (EA2), and the third color pixel (B) may include a third light-emitting region (EA3). The plurality of light-emitting regions (EA) may be defined as regions where the pixel electrode (171) is exposed by the opening of the bank (180) in the cross-sectional view, and regions where the exposed pixel electrode (171) and the organic light-emitting layer (172) overlap. A non-light-emitting region (NEA) is disposed between the light-emitting regions (EA) of each pixel (PX).

[0103] Each pixel (PX) and its light-emitting region (EA) can be arranged in various ways. The first color pixel (R) and the third color pixel (B) can be spaced apart from each other in the first direction (X-axis direction) and the second direction (Y-axis direction). The second color pixel (G) can be repeatedly arranged in the first direction (X-axis direction) and the second direction (Y-axis direction).

[0104] Multiple light-emitting regions (EA) may be arranged alternately in diagonal directions (DD1, DD2) between a first direction (X-axis direction) and a second direction (Y-axis direction). The first diagonal direction (DD1) is a direction tilted at 45° relative to the first direction (DR1) and the second direction (DR2), and the second diagonal direction (DD2) may be a direction orthogonal to the first diagonal direction (DD1). For example, a first color pixel (R) and a second color pixel (G) may be arranged alternately in the first diagonal direction (DD1) and the second diagonal direction (DD2). A third color pixel (B) and a second color pixel (G) may be arranged alternately in the first diagonal direction (DD1) and the second diagonal direction (DD2). The number of first color pixels (R) and third color pixels (B) belonging to the nth row may be twice the number of second color pixels (G) belonging to the n+1th row.

[0105] The size of the light-emitting region (EA) of each color pixel (R, G, B) may differ. For example, the size of the third light-emitting region (EA3) may be the largest and the size of the second light-emitting region (EA2) may be the smallest, but is not limited thereto. When the size of the second light-emitting region (EA2) is the smallest, the size of the non-light-emitting region (NEA) of the second color pixel (G) may be the largest. In other words, the width of the bank (180) constituting the non-light-emitting region (NEA) of the second color pixel (G) may be the largest.

[0106] In FIG. 7, the first light-emitting region (EA1), the second light-emitting region (EA2), and the third light-emitting region (EA3) are illustrated as having a rhombus shape, but are not limited thereto. The light-emitting regions (EA) may have a planar shape other than a square, such as a polygon, a circle, or an ellipse.

[0107] A pixel unit (PXU) may include one first color pixel (R), two second color pixels (G), and one third color pixel (B). The pixel unit (PXU) refers to a group of color pixels capable of expressing a gradation.

[0108] The second touch conductive layer (220) may include a touch electrode (SE) forming a mesh structure, a plurality of light-emitting apertures (OP) exposing light-emitting regions (EA), and a plurality of light-transmitting portions (PH) for light reflected by a user's fingerprint to be incident. FIG. 7 illustrates a touch electrode (SE) and a light-transmitting portion (PH) disposed on the second touch conductive layer (220) of the touch sensing layer (TSL), but is not limited thereto. For example, the first touch conductive layer (210) including a first connecting portion (CE1) and a second connecting portion (CE2) may also include a light-transmitting portion (PH).

[0109] A touch electrode (SE) can be placed along the boundary of a pixel (PX) in a non-emissive region (NEA). The touch electrode (SE) can be non-overlapping with emissive regions (EA). The width of the touch electrode (SE) can be smaller than the width of one direction of the non-emissive region (NEA). For example, the width of the touch electrode (SE) can be about 5 μm.

[0110] The light-emitting apertures (OPs) may be apertures that expose light-emitting regions (EAs) and emit light generated in the light-emitting regions (EAs). The light-emitting apertures (OPs) may overlap with the light-emitting regions (EAs) and may overlap with at least a portion of the non-light-emitting regions (NEAs). The light-emitting apertures (OPs) may detect a decrease in the brightness of light emitted from the light-emitting regions (EAs) as the light is blocked by the touch electrode (SE).

[0111] The light-emitting openings (OP) may have a substantial rhombus shape, but are not limited thereto. Since they are formed to have an area corresponding to or larger than the light-emitting region (EA) of the light-emitting opening (OP), the width in one direction may be 30 to 40 μm. Meanwhile, the width in one direction of the light-emitting opening (OP) may be the same for each of the multiple light-emitting regions (EA). Therefore, even if the size of the first light-emitting region (EA1) is larger than the size of the second light-emitting region (EA2), the size of the light-emitting opening (OP) exposing the first light-emitting region (EA1) may be the same as the size of the light-emitting opening (OP) exposing the second light-emitting region (EA2).

[0112] A plurality of light-transmitting portions (PH) may be formed between adjacent pixels (PX) and touch electrodes (SE). For example, a light-transmitting portion (PH) may be formed between a first color pixel (R), a second color pixel (G), and a touch electrode (SE). As another example, a light-transmitting portion (PH) may be formed between a second color pixel (G), a third color pixel (B), and a touch electrode (SE). A plurality of light-transmitting portions (PH) may expose a plurality of light sensors ('PS' in FIG. 11) disposed in a non-emissive region (NEA). A plurality of light-transmitting portions (PH) may be formed such that a plurality of light sensors (PS) and a touch electrode (SE) are non-overlapping in the second touch conductive layer (220).

[0113] Multiple light-transmitting portions (PH) may not overlap with the light-emitting region (EA). For example, the multiple light-transmitting portions (PH) may be placed in a non-light-emitting region (NEA) between a first light-emitting region (EA1) and a second light-emitting region (EA2). Additionally, the multiple light-transmitting portions (PH) may be placed between the second light-emitting region (EA2) and the second light-emitting region (EA2), or between the second light-emitting region (EA2) and the third light-emitting region (EA3).

[0114] That is, according to one embodiment, in order to prevent light reflected by a user's fingerprint from being blocked by a touch electrode (SE), touch electrodes (SE) placed in an area overlapping with a light sensor (PS) in a third direction (Z-axis direction) are removed, and a plurality of light-transmitting portions (PH) may be formed. The plurality of light-transmitting portions (PH) may overlap with the first sensing channel ('LA1' in FIG. 11) of the light sensing transistor ('LT1' in FIG. 11) of the light sensor (PS) in the third direction (Z-axis direction). By placing the plurality of light-transmitting portions (PH) in an area overlapping with the first sensing channel (LA1) of the plurality of light sensors (PS) in the third direction (Z-axis direction), light reflected from the user's fingerprint is not blocked by the touch electrodes (SE) and can pass through the light-transmitting portions (PH). Accordingly, light reflected by the touch electrode (SE) can be incident on the first sensing channel (LA1) without being blocked or interfered with. Since the valleys and ridges of the user's fingerprint (F) can be distinguished through the reflected light incident on the first sensing channel (LA1) without interference from the touch electrode (SE), the recognition rate of the user's fingerprint can be increased.

[0115] As described above, when the size of the second light-emitting region (EA2) is smaller than that of the first light-emitting region (EA1) or the third light-emitting region (EA3), a plurality of light-transmitting portions (PH) may be positioned closest to the second color pixel (G) that includes the second light-emitting region (EA2). The area of ​​the non-light-emitting region (NEA) included in the second color pixel (G) is larger than the area of ​​the non-light-emitting region (NEA) included in the first color pixel (R) or the third color pixel (B), and in the same way, the width of the bank (180) that overlaps with the second color pixel (G) may be larger than the width of the bank (180) that overlaps with the first color pixel (R) or the third color pixel (B). Accordingly, the light-transmitting portion (PH) may be formed with a maximum width when it is close to the second color pixel (G).

[0116] Meanwhile, the number of light-transmitting parts (PH) may be less than the number of light-emitting apertures (OP). The number of light-emitting apertures (OP) corresponds to the number of light-emitting regions (EA), and the number of light-transmitting parts (PH) may be smaller than the number of light-emitting regions (EA). That is, the light-transmitting parts (PH) can be designed with an appropriate number and spacing so that light reflected by the user's fingerprint does not scatter and act as noise during the incident process. The maximum size of the light-transmitting parts (PH) may correspond to 5 μm, which is one width of the touch electrode (SE). The maximum size of the light-transmitting parts (PH) may be smaller than the size of the light-emitting apertures (OP). The light-transmitting parts (PH) may have a polygonal, circular, or elliptical planar shape.

[0117] FIG. 8 is a planar arrangement of a mesh structure of a pixel and a touch electrode according to another embodiment.

[0118] Referring to FIG. 8, the second touch conductive layer (220) may further include an incision (SLT) that exposes the space between each pixel (PX). The incision (SLT) may overlap with the non-emissive region (NEA) and the bank (BK) and may be located between each emissive region (EA). One width of the incision (SLT) may be smaller than one width of the light-transmitting region (PH). The incision (SLT) is placed between each pixel (PX) to prevent external light visibility and may be placed independently of the position of the light sensor (PS). For example, the incision (SLT) may not overlap with the light sensor (PS) in a planar view.

[0119] FIG. 9 is a planar layout of a mesh structure of pixels and touch electrodes according to another embodiment.

[0120] Referring to FIG. 9, the pixel (PX) and the touch electrode (SE) may have a rectangular shape. The pixel (PX) is identical to previous embodiments in that it includes a second color pixel (G) that is repeatedly arranged along a first direction (X-axis direction) and a second direction (Y-axis direction), and includes a first color pixel (R) and a third color pixel (B) that are alternately arranged along the first direction (X-axis direction) and the second direction (Y-axis direction).

[0121] FIG. 10 is a layout diagram showing the thin-film transistor layer of a pixel and a light sensor, enlarged from A of FIG. 7. FIG. 11 is a layout diagram showing the thin-film transistor layer and mesh conductive layer of a pixel and a light sensor, enlarged from A of FIG. 7. FIG. 10 and FIG. 11 schematically illustrate the positions of multiple thin-film transistors and capacitors placed in two adjacent pixels (PXi, PXi+1). FIG. 10 corresponds to a diagram in which a first semiconductor layer (ACT1), a first gate layer (GTL1), a second gate layer (GTL2), a second semiconductor layer (ACT2), a third gate layer (GTL3), and a first data conductive layer (DTL1) are stacked in order. FIG. 11 corresponds to a diagram in which the touch electrode (SE), light-emitting aperture (OP), and light-transmitting portion (PH) of the second touch conductive layer (220) in FIG. 10 are illustrated.

[0122] The first semiconductor layer (ACT1) may include a first channel (A1), a first electrode (S1), and a second electrode (D1) of a first transistor (T1), and may include channels (A2, A5, A6, A7), first electrodes (S2, S5, S6, S7), and second electrodes (D2, D5, D6, D7) of a second transistor (T2), a fifth transistor (T5), a sixth transistor (T6), and a seventh transistor (T7). For example, the first semiconductor layer (ACT1) may be made of low-temperature polycrystalline silicon (LTPS).

[0123] The first gate layer (GTL1) may include a scan write line (GWL), a gate electrode (G1) of the first transistor (T1), and an emission line (EML). The scan write line (GWL) and the emission line (EML) may extend in a first direction (X-axis direction). The gate electrode (G1) of the first transistor (T1) may be positioned between the scan write line (GWL) and the emission line (EML).

[0124] The second gate layer (GTL2) may include a second sensing scan line (RSL2) and a second capacitor electrode (CE2). The second sensing scan line (RSL2) may extend in a first direction (X-axis direction).

[0125] The second semiconductor layer (ACT2) may include channels (A3, A4) of the third transistor (T3) and the fourth transistor (T4), first electrodes (D3, D4), and second electrodes (S3, S4). Additionally, it may include channels (LA1, LA2) of the optical sensing transistor (LT1) and the sensing switch transistor (LT2), first electrodes (LD1, LD2), and second electrodes (LS1, LS2). For example, the second semiconductor layer (ACT2) may be made of an oxide semiconductor.

[0126] The third gate layer (GTL3) may include a scan initialization line (GIL), a scan control line (GCL), a first initialization voltage line (VIL1), a second initialization voltage line (VIL2), and a first sensing scan line (RSL1). The scan initialization line (GIL), the scan control line (GCL), the first initialization voltage line (VIL1), the second initialization voltage line (VIL2), and the first sensing scan line (RSL1) may extend in a first direction (X-axis direction).

[0127] The first data conductive layer (DTL1) may include a first connecting electrode (BE1), a second connecting electrode (BE2), a third connecting electrode (BE3), a data line (DL), a first driving voltage line (VDDL1), a second driving voltage line (VDDL2), and a read-out line (ROL). The data line (DL), the first driving voltage line (VDDL1), the second driving voltage line (VDDL2), and the read-out line (ROL) may extend in a first direction (Y-axis direction).

[0128] In FIGS. 10 and 11, the read-out line (ROL) is placed at the i-th pixel (PXi) (i is a positive integer) and may not be placed at the i+1-th pixel (PXi+1). The second driving voltage line (VDDL2) is placed at the i+1-th pixel (PXi+1) and may not be placed at the i-th pixel (PXi).

[0129] The first transistor (T1) may include a first channel (A1), a gate electrode (G1), a first electrode (S1), and a second electrode (D1). The first channel (A1) of the first transistor (T1) may be placed on a first semiconductor layer (ACT1) and may overlap with the gate electrode (G1) of the first transistor (T1). For example, the first semiconductor layer (ACT1) may be made of low-temperature polycrystalline silicon (LTPS).

[0130] The gate electrode (G1) of the first transistor (T1) may overlap with the first connection electrode (BE1). The gate electrode (G1) of the first transistor (T1) may be connected to the first connection electrode (BE1) through the first contact hole (CNT1), and the first connection electrode (BE1) may be connected to the second electrode (S3) of the third transistor (T3) through the second contact hole (CNT2). Additionally, the region of the gate electrode (G1) of the first transistor (T1) that overlaps with the second capacitor electrode (CE2) may correspond to the first capacitor electrode (CE1) of the holding capacitor (Cst).

[0131] The first electrode (S1) of the first transistor (T1) can be connected to the second electrode (D5) of the fifth transistor (T5) and the second electrode (D2) of the second transistor (T2). The second electrode (D1) of the first transistor (T1) can be connected to the first electrode (S6) of the sixth transistor (T6).

[0132] The second transistor (T2) may include a second channel (A2), a gate electrode (G2), a first electrode (S2), and a second electrode (D2). The second channel (A2) of the second transistor (T2) may be placed on the first semiconductor layer (ACT1). The gate electrode (G2) of the second transistor (T2) may be part of the scan write line (GWL) and may be an overlapping region between the second channel (A2) of the second transistor (T2) and the scan write line (GWL).

[0133] The first electrode (S2) of the second transistor (T2) can be connected to the data line (DL) through the fifth contact hole (CNT5). The second electrode (D2) of the second transistor (T2) can be connected to the first electrode (S1) of the first transistor (T1) and the second electrode (D5) of the fifth transistor (T5).

[0134] The third transistor (T3) may include a third channel (A3), a gate electrode (G3), a first electrode (D3), and a second electrode (S3). The third channel (A3) of the third transistor (T3) may be placed on the second semiconductor layer (ACT2). The third channel (A3) of the third transistor (T3) may be part of the scan control line (GCL), and may be an overlapping region between the third channel (A3) of the third transistor (T3) and the scan control line (GCL).

[0135] The first electrode (D3) of the third transistor (T3) can be connected to the second electrode (S4) of the fourth transistor (T4) and can be connected to the first connection electrode (BE1) through the second contact hole (CNT2). The second electrode (S3) of the third transistor (T3) can be connected to the second electrode (D2) of the first transistor (T1) through the contact hole.

[0136] The fourth transistor (T4) may include a fourth channel (A4), a gate electrode (G4), a first electrode (D4), and a second electrode (S4). The fourth channel (A4) of the fourth transistor (T4) may be placed on the second semiconductor layer (ACT2). The fourth channel (A4) of the fourth transistor (T4) may be part of the scan initialization line (GIL), and may be an overlapping region between the fourth channel (A4) of the fourth transistor (T4) and the scan initialization line (GIL).

[0137] The first electrode (D4) of the fourth transistor (T4) can be connected to the first initialization voltage line (VIL1) through the sixth contact hole (CNT6). The second electrode (S4) of the fourth transistor (T4) can be connected to the first electrode (D3) of the third transistor (T3) and can be connected to the first connection electrode (BE1) through the second contact hole (CNT2).

[0138] The fifth transistor (T5) may include a fifth channel (A5), a gate electrode (G5), a first electrode (S5), and a second electrode (D5). The fifth channel (A5) of the fifth transistor (T5) may be placed on the first semiconductor layer (ACT1). The gate electrode (G5) of the fifth transistor (T5) may be a part of the light-emitting line (EML) and may be an overlapping region of the fifth channel (A5) of the fifth transistor (T5) and the light-emitting line (EML).

[0139] The first electrode (S5) of the fifth transistor (T5) can be connected to the first driving voltage line (VDDL1) through the seventh contact hole (CNT7). The second electrode (D5) of the fifth transistor (T5) can be connected to the first electrode (S1) of the first transistor (T1) and the second electrode (D2) of the second transistor (T2).

[0140] The sixth transistor (T6) may include a sixth channel (A6), a gate electrode (G6), a first electrode (S6), and a second electrode (D6). The sixth channel (A6) of the sixth transistor (T6) may be placed on the first semiconductor layer (ACT1). The gate electrode (G6) of the sixth transistor (T6) may be part of the light-emitting line (EML) and may be an overlapping region of the sixth channel (A6) of the sixth transistor (T6) and the light-emitting line (EML).

[0141] The first electrode (S6) of the sixth transistor (T6) can be connected to the second electrode (D1) of the first transistor (T1). The second electrode (D6) of the sixth transistor (T6) can be connected to the third connection electrode (BE3) through the tenth contact hole (CNT10). The anode connection electrode (ANDE) can be connected to the anode connection electrode (ANDE) through the first anode contact hole (CNT_A) (see FIG. 12).

[0142] The seventh transistor (T7) may include a seventh channel (A7), a gate electrode (G7), a first electrode (S7), and a second electrode (D7). The seventh channel (A7) of the seventh transistor (T7) may be placed on the first semiconductor layer (ACT1). The gate electrode (G7) of the seventh transistor (T7) may be part of the scan write line (GWL) and may be an overlapping region of the seventh channel (A7) of the seventh transistor (T7) and the scan write line (GWL).

[0143] The first electrode (S7) of the seventh transistor (T7) can be connected to the second connection electrode (BE2) through the fourth contact hole (CNT4), and the second connection electrode (BE2) can be connected to the second initialization voltage line (VIL2) through the third contact hole (CNT3). That is, the first electrode (S7) of the seventh transistor (T7) can be connected to the second initialization voltage line (VIL2) via the second connection electrode (BE2). The second electrode (D7) of the seventh transistor (T7) can be connected to the second electrode (D6) of the sixth transistor (T6) placed in the previous subpixel.

[0144] The holding capacitor (Cst) may include a first capacitor electrode (CE1) and a second capacitor electrode (CE2). The first capacitor electrode (CE1) is a part of the gate electrode (G1) of the first transistor (T1) and may correspond to an area of ​​the gate electrode (G1) of the first transistor (T1) that overlaps with the first capacitor electrode (CE1) of the holding capacitor (Cst). The second capacitor electrode (CE2) may be connected to the first driving voltage line (VDDL1) through a contact hole.

[0145] The boost capacitor (Cboost) may include a third capacitor electrode (CE3) and a fourth capacitor electrode (CE4). The third capacitor electrode (CE3) may be part of the scan write line (GWL), and the fourth capacitor electrode (CE4) may be part of the first connection electrode (BE1). The boost capacitor (Cboost) may be formed in the area where the scan write line (GWL) and the first connection electrode (BE1) overlap.

[0146] The optical sensing transistor (LT1) may include a first sensing channel (LA1), a gate electrode (LG1), a first electrode (LD1), and a second electrode (LS1). The first sensing channel (LA1) of the optical sensing transistor (LT1) may be placed on a second semiconductor layer (ACT2). The gate electrode (LG1) of the optical sensing transistor (LT1) may be a part of the second sensing scan line (RSL2) and may be an overlapping region between the first sensing channel (LA1) of the optical sensing transistor (LT1) and the second sensing scan line (RSL2).

[0147] The first electrode (LD1) of the optical sensing transistor (LT1) can be connected to the second driving voltage line (VDDL2) through the eighth contact hole (CNT8). The second electrode (LS1) of the optical sensing transistor (LT1) can be connected to the first electrode (LD2) of the sensing switch transistor (LT2).

[0148] The sensing switch transistor (LT2) may include a second sensing channel (LA2), a gate electrode (LG2), a first electrode (LD2), and a second electrode (LS2). The second sensing channel (LA2) of the sensing switch transistor (LT2) may be placed on a second semiconductor layer (ACT2). The gate electrode (LG2) of the sensing switch transistor (LT2) may be a part of the first sensing scan line (RSL1) and may be an overlapping region between the second sensing channel (LA2) of the sensing switch transistor (LT2) and the first sensing scan line (RSL1).

[0149] The first electrode (LD2) of the sensing switch transistor (LT2) can be connected to the first electrode (LD2) of the optical sensing transistor (LT1). The second electrode (LS2) of the sensing switch transistor (LT2) can be connected to the lead-out line (ROL) through the ninth contact hole (CNT9).

[0150] Meanwhile, a plurality of sensing transistors (e.g., LT1, LT2) forming the optical sensor (PS) may be placed between adjacent i-th pixel (PXi) and i+1-th pixel (PXi+1). For example, the plurality of sensing transistors may sense light by connecting a read-out line (ROL) placed in the i-th pixel (PXi) and a second driving voltage line (VDDL2) placed in the i+1-th pixel (PXi+1). As the number of wires placed in one pixel (PX) decreases, the area occupied by one pixel (PX) can be secured. As shown in FIG. 10, the read-out line (ROL) and the second driving voltage line (VDDL2) connected to the optical sensor (PS) are divided and placed between two adjacent pixels (PXi, PXi+1), thereby securing the area occupied by one pixel (PX). However, this is not limited to this, and one optical sensor (PS) may be placed for each pixel (PX).

[0151] Referring to FIG. 11, the second touch conductive layer (220) may include a touch electrode (SE) having a mesh structure, a light-emitting aperture (OP), and a light-transmitting portion (PH). A plurality of light-emitting regions (EA1, EA2, EA3) may be disposed in the light-emitting aperture (OP) for each pixel (R, G, B). Although the i-th pixel (PXi) is exemplified as a first color pixel (R) and the i+1-th pixel (PXi+1) is a third color pixel (B), it is not limited thereto.

[0152] The touch electrode (SE) may be arranged in the first diagonal direction (DD1) and the second diagonal direction (DD2) so as not to overlap with the light-emitting regions (EA1, EA2, EA3). The light-emitting opening (OP) is formed to expose the first light-emitting region (EA1), the second light-emitting region (EA2), and the third light-emitting region (EA3), respectively.

[0153] The light-transmitting portion (PH) may be formed at a location where the touch electrode (SE) is removed and the area overlapping with the first sensing channel (LA1) of the light-sensing transistor (LT1) is placed. In the drawing, the light-transmitting portion (PH) is illustrated as being placed between the first color pixel (R) and the second color pixel (G), but is not limited thereto. The light-transmitting portion (PH) may be formed without positional limitations depending on the area exposing the first sensing channel (LA1).

[0154] FIG. 12 is a cross-sectional view showing a plane cut along II-II' of FIG. 10 and 11. FIG. 13 is a cross-sectional view showing a plane cut along III-III' of FIG. 10 and 11. FIG. 14 is a cross-sectional view showing a plane cut along V-V' of FIG. 10 and 11.

[0155] Referring to FIGS. 12 to 14, the display device (1) may include a substrate (SUB), a buffer layer (BF), a display layer (DPL) including a thin film transistor layer (TFTL) and a light-emitting element layer (EML), an encapsulation layer (TFEL), and a touch sensing layer (TSL). The thin film transistor layer (TFTL) may include a first semiconductor layer (ACT1), a first gate insulating layer (131), a first gate layer (GTL1), a second gate insulating layer (132), a second gate layer (GTL2), a first interlayer insulating layer (141), a second semiconductor layer (ACT2), a third gate insulating layer (133), a third gate layer (GTL3), a second interlayer insulating layer (142), a first data conductive layer (DTL1), a first planarization layer (150), a second data conductive layer, and a second planarization layer (160).

[0156] The substrate (SUB) may be a base substrate and may be made of an insulating material such as a polymer resin. For example, the substrate (SUB) may be a flexible substrate capable of bending, folding, rolling, etc.

[0157] A buffer layer (BF) may be formed on one side of the substrate (SUB). The buffer layer (BF) may be formed on one side of the substrate (SUB) to protect the organic light-emitting layer (172) of the thin-film transistors and the light-emitting element layer (EML) from moisture penetrating through the substrate (SUB), which is susceptible to moisture permeability.

[0158] The first semiconductor layer (ACT1) may be disposed on a substrate (SUB) or a buffer layer (BF). The first semiconductor layer (ACT1) may be made of a silicon-based material. For example, the first semiconductor layer (ACT1) may be made of low-temperature polycrystalline silicon (LTPS). It may include a first channel (A1), a first electrode (S1), and a second electrode (D1) of a first transistor (T1), and may include channels (A2, A5, A6, A7), first electrodes (S2, S5, S6, S7), and second electrodes (D2, D5, D6, D7) of a second transistor (T2), a fifth transistor (T5), a sixth transistor (T6), and a seventh transistor (T7). A light-blocking layer may be formed below the first semiconductor layer (ACT1) to block external light incident on the first semiconductor layer (ACT1).

[0159] The first gate insulating film (131) can cover the buffer layer (BF) and the first semiconductor layer (ACT1), and can insulate the first semiconductor layer (ACT1) from the first gate layer (GTL1). The first gate insulating film (131) can be formed of an inorganic film, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0160] A first gate layer (GTL1) may be disposed on a first gate insulating film (131). The first gate layer (GTL1) may include gate electrodes (G1, G2, G5, G6, G7) of a first transistor (T1), a second transistor (T2), a fifth transistor (T5), a sixth transistor (T6), and a seventh transistor (T7), as well as scan write lines (GWL) and light-emitting lines (EML). The first gate layer (GTL1) may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0161] The second gate insulating film (132) can cover the first gate layer (GTL1) and the first gate insulating film (131). The second gate insulating film (132) can insulate the first gate layer (GTL1) and the second gate layer (GTL2). The second gate insulating film (132) may contain the same material as the first gate insulating film (131) described above.

[0162] The second gate layer (GTL2) may be disposed on the second gate insulating film (132). The second gate layer (GTL2) may include a second sensing scan line (RSL2), a second capacitor electrode (CE2), and a gate electrode (LG1) of a light sensing transistor (LT1). The second gate layer (GTL2) may also include a light-blocking layer (BML). The light-blocking layer (BML) may serve to prevent light incident from the lower direction of the display panel (10) from entering the second semiconductor layer (ACT2) located above. The second gate layer (GTL2) may include the same material as the first gate layer (GTL1) described above.

[0163] The first interlayer insulating film (141) can cover the second gate layer (GTL2) and the second gate insulating film (132). The first interlayer insulating film (141) can insulate the second gate layer (GTL2) and the second semiconductor layer (ACT2). The first interlayer insulating film (141) can be formed of an inorganic film, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0164] The second semiconductor layer (ACT2) may be disposed on the first interlayer insulating film (141). For example, the second semiconductor layer (ACT2) may be made of an oxide-based material. The channels (A3, A4), first electrodes (D3, D4), and second electrodes (S3, S4) of the third transistor (T3) and the fourth transistor (T4), respectively, may be disposed on the second semiconductor layer (ACT2). Additionally, the channels (LA1, LA2), first electrodes (LD1, LD2), and second electrodes (LS1, LS2) of the light sensing transistor (LT1) and the sensing switch transistor (LT2), respectively, may be disposed on the second semiconductor layer (ACT2).

[0165] In this embodiment, the first sensing channel (LA1) of the light-sensing transistor (LT1) may include a light-sensitive oxide semiconductor material with high sensitivity to light in order to sense external light. For example, the light-sensitive oxide semiconductor material may include ZnO, InO, SnO, InZnO, ZnSnO, InSnO, etc. Since the light-sensitive oxide semiconductor has the characteristic that its threshold voltage changes depending on the wavelength or amount of incident light, it can be utilized as a light sensor. For example, when light is applied to a transistor containing a light-sensitive oxide semiconductor, the threshold voltage shifts in the negative direction and the drain current increases. In the case of an oxide semiconductor transistor, since the ratio of the drain current (Id2) when light is applied to the drain current (Id1) when light is not applied is very large, it can be utilized as a light sensor with high sensitivity. In particular, the current ratio appears largest near the threshold voltage when light is not applied.

[0166] The first sensing channel (LA1) may be formed as a single layer including a photosensitive oxide semiconductor material, but is not limited thereto and various stacked structures may be applied. The light absorption rate of the first sensing channel (LA1) may be higher than the light absorption rate of the first semiconductor layer (ACT1).

[0167] Meanwhile, the second sensing channel (LA2) may also include a photosensitive oxide semiconductor material. As another example, the second sensing channel (LA2) may include a photosensitive oxide semiconductor material that is not sensitive to light. For example, as a photosensitive oxide semiconductor material, at least one material selected from Hf, Zr, Ti, Ta, Ga, Nb, V, Al, Ga, and Sn may be further included in ZnO, InO, SnO, InZnO, ZnSnO, or InSnO. In this case, the sensing switch transistor (LT2) can function as a switch transistor that always has constant electrical characteristics regardless of the application of light.

[0168] The third gate insulating film (133) can cover the first interlayer insulating film (141) and the second semiconductor layer (ACT2), and can insulate the second semiconductor layer (ACT2) from the third gate layer (GTL3). The third gate insulating film (133) may include the same material as the first gate insulating film (131) described above.

[0169] A third gate layer (GTL3) may be disposed on a third gate insulating film (133). The third gate layer (GTL3) may include a scan initialization line (GIL), a scan control line (GCL), a first initialization voltage line (VIL1), a second initialization voltage line (VIL2), and a first sensing scan line (RSL1). Additionally, the third gate layer (GIL3) may include gate electrodes (G3, G4) of a third transistor (T3) and a fourth transistor (T4), respectively, and may include a gate electrode (LG2) of a sensing switch transistor (LT2). The third gate layer (GTL3) may include the same material as the first gate layer (GTL1) described above.

[0170] The first data conductive layer (DTL1) may be disposed on the second interlayer insulating film (142). The first data conductive layer (DTL1) may include a first connecting electrode (BE1), a second connecting electrode (BE2), a third connecting electrode (BE3), a data line (DL), a first driving voltage line (VDDL1), a second driving voltage line (VDDL2), and a read-out line (ROL). The data line (DL), the first driving voltage line (VDDL1), the second driving voltage line (VDDL2), and the read-out line (ROL) may extend in a first direction (Y-axis direction). The first data conductive layer (DTL1) may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0171] The first planarization film (150) can cover the first data conductive layer (DTL1) and the second interlayer insulating film (142). The first planarization film (150) can flatten the step difference caused by the first semiconductor layer (ACT1), the first gate layer (GTL1), the second gate layer (GTL2), the second semiconductor layer (ACT2), the third gate layer (GTL3), and the first data conductive layer (DTL1). The first planarization film (150) can be formed from an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0172] A second data conductive layer may be disposed on the first planarization film (150). The second data conductive layer may include an anode connection electrode (ANDE). The second data conductive layer may include the same material as the first data conductive layer (DTL1) described above.

[0173] The second planarization film (160) can cover the second data conductive layer and the first planarization film (150). The second planarization film (160) can flatten the step difference caused by the second data conductive layer. The second planarization film (160) may include the same material as the first planarization film (150) described above.

[0174] The first to seventh transistors (T1 to T7) and the sensing switch transistor (LT2) are exemplified as being formed in a top gate configuration where the gate electrode is located on the upper side of the semiconductor layer as shown in FIGS. 12 to 14, but are not limited thereto. That is, the first to seventh transistors (T1 to T7) and the sensing switch transistor (LT2) may be formed in a bottom gate configuration where the gate electrode is located on the lower side of the active layer, or in a double gate configuration where the gate electrode is located on both the upper and lower sides of the active layer. For example, the light-blocking layer (BML) placed on the second gate layer (GTL2) may be the bottom gate electrode of the third transistor (T3) and the fourth transistor (T4). In this case, the third transistor (T3) and the fourth transistor (T4) may have a double gate structure.

[0175] In contrast, the light sensing transistor (LT1) is a transistor that receives light reflected from the user's fingerprint, and there must be no film obstructing light reception above the first sensing channel (LA1). For example, the light sensing transistor (LT1) can be formed in a bottom-gate configuration where the gate electrode is located below the semiconductor layer. For example, as the first sensing channel (LA1) is positioned on the gate electrode (LG1), light reflected from the user's fingerprint can reach the first sensing channel (LA1) directly. Since the threshold voltage characteristics of the light sensing transistor (LT1) change depending on the wavelength or amount of incident light that reaches the first sensing channel (LA1) directly, it can be used as a light sensor (PS) with improved light efficiency.

[0176] The first contact hole (CNT1) may be a hole that penetrates the second gate insulating film (132), the first interlayer insulating film (141), the third gate insulating film (133), and the second interlayer insulating film (142) to expose the gate electrode (G1) of the first transistor (T1). The first connection electrode (BE1) may be connected to the gate electrode (G1) of the first transistor (T1) through the first contact hole (CNT1).

[0177] The second contact hole (CNT2) may be a hole that penetrates the third gate insulating film (133) and the second interlayer insulating film (142) to expose the first electrode (D3) of the third transistor (T3) and the second electrode (S4) of the fourth transistor (T4). The first connecting electrode (BE1) may be connected to the first electrode (D3) of the third transistor (T3) and the second electrode (S4) of the fourth transistor (T4) through the second contact hole (CNT2).

[0178] The third contact hole (CNT3) may be a hole that penetrates the second interlayer insulating film (142) to expose the second initialization voltage line (VIL2). The second connecting electrode (BE2) may be connected to the second initialization voltage line (VIL2) through the third contact hole (CNT3).

[0179] The fourth contact hole (CNT4) may be a hole that penetrates the first gate insulating film (131), the second gate insulating film (132), the first interlayer insulating film (141), the third gate insulating film (133), and the second interlayer insulating film (142) to expose the first electrode (S7) of the seventh transistor (T7). The second connection electrode (BE2) may be connected to the first electrode (S7) of the seventh transistor (T7) through the fourth contact hole (CNT4).

[0180] The fifth contact hole (CNT5) may be a hole that penetrates the first gate insulating film (131), the second gate insulating film (132), the first interlayer insulating film (141), the third gate insulating film (133), and the second interlayer insulating film (142) to expose the first electrode (S2) of the second transistor (T2). A data line (DL) may be connected to the first electrode (S2) of the second transistor (T2) through the fifth contact hole (CNT5).

[0181] The sixth contact hole (CNT6) may be a hole that penetrates the third gate insulating film (133) and the second interlayer insulating film (142) to expose the first electrode (D4) of the fourth transistor (T4). The first initialization voltage line (VIL1) may be connected to the first initialization voltage line (VIL1) through the sixth contact hole (CNT6).

[0182] The seventh contact hole (CNT7) may be a hole that penetrates the first gate insulating film (131), the second gate insulating film (132), the first interlayer insulating film (141), the third gate insulating film (133), and the second interlayer insulating film (142) to expose the first electrode (S5) of the fifth transistor (T5). The first driving voltage line (VDDL1) may be connected to the first electrode (S5) of the fifth transistor (T5) through the seventh contact hole (CNT7).

[0183] The eighth contact hole (CNT8) may be a hole that penetrates the third gate insulating film (133) and the second interlayer insulating film (142) to expose the first electrode (LD1) of the optical sensing transistor (LT1). The second driving voltage line (VDDL2) may be connected to the first electrode (LD1) of the optical sensing transistor (LT1) through the eighth contact hole (CNT8).

[0184] The ninth contact hole (CNT9) may be a hole that penetrates the third gate insulating film (133) and the second interlayer insulating film (142) to expose the second electrode (LS2) of the sensing switch transistor (LT2). A lead-out line (ROL) may be connected to the second electrode (LS2) of the sensing switch transistor (LT2) through the ninth contact hole (CNT9).

[0185] The 10th contact hole (CNT10) may be a hole that penetrates the 1st gate insulating film (131), the 2nd gate insulating film (132), the 1st interlayer insulating film (141), the 3rd gate insulating film (133), and the 2nd interlayer insulating film (142) to expose the 2nd electrode (D6) of the 6th transistor (T6). The 3rd connection electrode (BE3) may be connected to the 2nd electrode (D6) of the 6th transistor (T6) through the 10th contact hole (CNT10). The 1st anode contact hole (CNT_A) may be a hole that penetrates the 1st planarization film (150) to expose the 3rd connection electrode (BE3). The anode connection electrode (ANDE) may be connected to the 3rd connection electrode (BE3) through the 1st anode contact hole (CNT_A). The second anode contact hole (AND_CNT) may be a hole that penetrates the second planarization film (160) to expose the anode connection electrode (ANDE). The pixel electrode (171) may be connected to the anode connection electrode (ANDE) through the second anode contact hole (AND_CNT).

[0186] A light-emitting element layer (EML) is formed on the thin-film transistor layer (TFTL). The light-emitting element layer (EML) includes light-emitting elements (EL) and a bank (180).

[0187] The light-emitting elements (ELs) and the bank (180) are formed on the second planarization film (160). Each of the light-emitting elements (ELs) may include a pixel electrode (171), an organic light-emitting layer (172), and a common electrode (173).

[0188] A pixel electrode (171) can be formed on the second planarization film (160). A pixel electrode (171) can be provided for each pixel (PX). The pixel electrode (171) can be connected to an anode connection electrode (ANDE) through a second anode contact hole (AND_CNT).

[0189] The pixel electrode (171) may have a single-layer structure of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), although it is not limited thereto, or a multilayer structure such as indium-tin-oxide (ITO), indium-zinc-oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), and silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), or nickel (Ni), such as ITO / Mg, ITO / MgF, ITO / Ag, or ITO / Ag / ITO.

[0190] A bank (180) may be formed on a pixel electrode (171) to serve to define the light-emitting regions (EA: EA1, EA2, EA3) of each pixel (PX: R, G, B). The bank (180) may be formed to cover the edges of the pixel electrode (171). The bank (180) may be formed from an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0191] Each light-emitting region (EA) of the pixels (PX) represents a region in which a pixel electrode (171), an organic light-emitting layer (172), and a common electrode (173) are sequentially stacked, and holes from the pixel electrode (171) and electrons from the common electrode (173) combine with each other in the organic light-emitting layer (172) to emit light.

[0192] An organic light-emitting layer (172) is formed on the pixel electrode (171) and the bank (180). The organic light-emitting layer (172) may include an organic material and emit a predetermined color. For example, the organic light-emitting layer (172) may include a hole transporting layer, an organic material layer, and an electron transporting layer. Among the pixels (PX), the organic light-emitting layer (172) of the first color pixel (R) emits light of the first color, the organic light-emitting layer (172) of the second color pixel (G) emits light of the second color, and the organic light-emitting layer (172) of the third color pixel (B) emits light of the third color. For example, the first color may be red, the second color may be green, and the third color may be blue, but is not limited thereto. The light emitted from the organic light-emitting layer (172) may contribute to image display or function as a light source incident on the light sensor (PS).

[0193] A common electrode (173) is formed on an organic light-emitting layer (172). The common electrode (173) may be arranged across a plurality of pixels (PX) in a manner that covers the bank (180) and the organic light-emitting layer (172). The common electrode (173) may include a conductive material with a low work function, for example, Li, Ca, LiF / Ca, LiF / Al, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, BaF, Ba, or a compound or mixture thereof (for example, a mixture of Ag and Mg). Or it may include a transparent metal oxide, for example, indium-tin-oxide (ITO), indium-zinc-oxide (IZO), zinc oxide (ZnO), etc.

[0194] An encapsulation layer (TFEL) may be disposed on top of the light-emitting element layer (EML). The encapsulation layer (TFEL) may include at least one inorganic film to prevent oxygen or moisture from penetrating into the organic light-emitting layer (172). Additionally, the encapsulation layer (TFEL) may include at least one organic film to protect the organic light-emitting layer (172) from foreign substances such as dust. For example, the encapsulation layer (TFEL) may be formed in a structure in which a first inorganic film, an organic film, and a second inorganic film are sequentially stacked. The first inorganic film and the second inorganic film may be formed as a multilayer in which one or more inorganic films selected from a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately stacked. The organic film may be an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0195] A base layer (205) of a touch sensing layer (TSL), a first touch insulating layer (215), a second touch conductive layer (220), and a second touch insulating layer (230) may be sequentially arranged on the encapsulation layer (TFEL). Since FIGS. 13 and 14 are cross-sectional views of a touch electrode (SE), the first touch conductive layer (210) is not shown in the cross-sectional views. The arrangement of the first touch conductive layer (210), including the first connection portion (CE1), may be the same as the arrangement of the second touch conductive layer (220).

[0196] The second touch conductive layer (220) may be placed overlapping with the bank (180). The second touch conductive layer (220) may form a mesh structure of the touch electrode (SE) and may include a light-emitting aperture (OP) that overlaps with the light-emitting region (EA). Additionally, the second touch conductive layer (220) may include a light-transmitting portion (PH) that overlaps with the first sensing channel (LA1) of the light-sensing transistor (LT1). The light-emitting aperture (OP) of the second touch conductive layer (220) may not interfere with the light emitted from the light-emitting region (EA). Light reflected by the user's fingerprint can pass through the light-transmitting portion (PH) of the second touch conductive layer (220) without interference from the touch electrode (SE). Accordingly, the reflected light can reach the first sensing channel (LA1) of the light-sensing transistor (LT1).

[0197] FIG. 15 is an example diagram schematically showing the optical path in which the user's fingerprint is recognized in FIG. 14.

[0198] Referring to FIG. 15, the display device (1) may further include a polarizing film (POL) and a window (WDL) disposed on a touch sensing layer (TSL).

[0199] A polarizing film (POL) can be placed on a touch sensing layer (TSL) to prevent external light reflection, and a window (WDL) can be placed on the polarizing film (POL) to protect the configuration of the display device (1).

[0200] When a user's fingerprint (F) comes into contact with the window (WDL) of the display device (1), light emitted from the organic light-emitting layer (172) may be reflected from the ridges (RID) or valleys (VAL) of the user's fingerprint (F). The light reflected from the ridges (RID) or valleys (VAL) of the user's fingerprint (F) may be incident on the light-sensing transistor (LT1) of the light sensor (PS) through the light-transmitting portion (PH). Therefore, the light-sensing transistor (LT1) can detect the incident light and identify the user's fingerprint pattern.

[0201] FIG. 16 is another example diagram schematically illustrating the optical path where the user's fingerprint is recognized in FIG. 14.

[0202] Referring to FIG. 16, in a display device (1) according to another embodiment, a light-blocking layer (LS) and a color filter (CF) may be disposed between a touch sensing layer (TSL) and a window (WDL) instead of a polarizing film (POL).

[0203] The light-blocking layer (LS) may use a material that blocks light emission from the light-emitting region (EA). The light-blocking layer (LS) may include a black matrix that absorbs visible light. The light-blocking layer (LS) can prevent color mixing between color pixels included in each pixel (PX).

[0204] A color filter (CF) can be formed on a light-blocking layer (LS) and positioned to cover the light-blocking layer (LS). The color filter (CF) may include a material that is positioned on each pixel (PX) and converts it into light of the same wavelength range.

[0205] The light-blocking layer (LS) may include a light-blocking aperture (OP_LS) that allows light reflected by the user's fingerprint (F) to pass through. The light-blocking aperture (OP_LS) overlaps with the light-transmitting portion (PH) of the second touch conductive layer (220) and may overlap with the first sensing channel (LA1) of the light-sensing transistor (LT1). Accordingly, the light-blocking aperture (OP_LS) can provide a path for reflected light to pass through and be incident on the first sensing channel (LA1).

[0206] Light reflected from the ridges (RID) or valleys (VAL) of the user's fingerprint (F) can be incident on the light-sensing transistor (LT1) of the light sensor (PS) through the light-blocking aperture (OP_LS) and the light-transmitting part (PH). Therefore, the light-sensing transistor (LT1) can detect the incident light and identify the user's fingerprint pattern.

[0207] In summary, in the display device according to the present embodiment, the light sensing transistor (LT1) has a lower gate structure and includes a light-sensitive first sensing channel (LA1), thereby receiving light reflected by the user's fingerprint to generate a photocurrent. Additionally, the second touch conductive layer (220) includes a plurality of light-transmitting portions (PH) that overlap the first sensing channel (LA1) of the light sensing transistor (LT1), so that light incident on the substrate (SUB) side can pass through the plurality of light-transmitting portions (PH). Therefore, the incident light passing through the plurality of light-transmitting portions (PH) can reach the first sensing channel (LA1) of the light sensor (PS) without being blocked by the touch electrode (SE). Accordingly, the light sensor (PS) can recognize the fingerprint (F) based on the amount of light incident from the top of the display device (1).

[0208] FIG. 17 is a cross-sectional view taken along III-III' according to another embodiment.

[0209] In the display device (1_2) according to the present embodiment, the first sensing channel (LA1) of the optical sensing transistor (LT1) may form a multilayer structure, unlike the second sensing channel (LA2) of the sensing switch transistor (LT2). The first sensing channel (LA1) may include an upper first sub-sensing channel (LA11) and a lower second sub-sensing channel (LA12).

[0210] The upper first sub-sensing channel (LA11) may include a photosensitive oxide semiconductor with a high light absorption rate. Since the first sub-sensing channel (LA11) is placed directly on the upper surface when external light is incident through the light-transmitting portion (PH), the light detection rate can be improved when sensitive to external light. For example, the first sub-sensing channel (LA11) may include ZnO, InO, SnO, InZnO, ZnSnO, InSnO, etc.

[0211] The lower second sub-sensing channel (LA12) may include a photosensitive oxide semiconductor with a low light absorption rate. By including the photosensitive oxide semiconductor, the second sub-sensing channel (LA12) can prevent instability in electrical characteristics that may occur due to light penetrating from the rear of the substrate (SUB). For example, the second sub-sensing channel (LA12) may include at least one material selected from Hf, Zr, Ti, Ta, Ga, Nb, V, Al, Ga, and Sn in addition to ZnO, InO, SnO, InZnO, ZnSnO, or InSnO.

[0212] Accordingly, the light absorption efficiency of the light sensing transistor (LT1) including the first sensing channel (LA1) is improved, and the electrical characteristics can be prevented from being changed by the outside.

[0213] FIG. 18 is a cross-sectional view of a light sensor according to another embodiment.

[0214] The first sensing channel (LA1) may be formed as a single layer including a photosensitive oxide semiconductor material, but is not limited thereto and various stacked structures may be applied. The light absorption rate of the first sensing channel (LA1) may be higher than the light absorption rate of the first semiconductor layer (ACT1).

[0215] Meanwhile, the second sensing channel (LA2) may also include a photosensitive oxide semiconductor material. As another example, the second sensing channel (LA2) may include a photosensitive oxide semiconductor material that is not sensitive to light. For example, as a photosensitive oxide semiconductor material, at least one material selected from Hf, Zr, Ti, Ta, Ga, Nb, V, Al, Ga, and Sn may be further included in ZnO, InO, SnO, InZnO, ZnSnO, or InSnO. In this case, the sensing switch transistor (LT2) can function as a switch transistor that always has constant electrical characteristics regardless of the application of light.

[0216] FIG. 18 is a cross-sectional view of a light sensor according to another embodiment.

[0217] Referring to FIG. 18, the optical sensor (PS) according to the present embodiment may have a stacked structure of a first semiconductor layer (ACT1) and a second semiconductor layer (ACT2).

[0218] For example, the first sensing channel (LA1) of the optical sensing transistor (LT1) may be placed on the second semiconductor layer (ACT2) and may be placed on the gate electrode (LG1). The first sensing channel (LA1) may have its top and side surfaces covered by the first electrode (LD1) and the second electrode (LS2). The gate electrode (LG1) may be placed overlappingly below the first sensing channel (LA1). In this case, the optical sensing transistor (LT1) may form a bottom gate structure. The first electrode (LD1) and the second electrode (LS1) may each cover the top and side surfaces of the first sensing channel (LA1). The first electrode (LD1) and the second electrode (LS2) may each be connected to the third source / drain electrode (SD3) and the fourth source / drain electrode (SD4), which are placed on the first data conductive layer (DTL1).

[0219] The second sensing channel (LA2) of the sensing switch transistor (LT2) is placed on the first semiconductor layer (ACT1) and can be placed below the gate electrode (LG2). The gate electrode (LG2) can be placed superimposed on the second sensing channel (LA2). The first electrode (LS2) is connected to the first source / drain electrode (SD1) placed on the first data conductive layer (DTL1), and the second electrode (LD2) can be connected to the second source / drain electrode (SD2) placed on the first data conductive layer (DTL1).

[0220] A display device according to one embodiment can minimize the area occupied by a light sensor (PS) adjacent to a pixel (PX) by stacking and arranging the light sensor (PS) in a direction perpendicular to the substrate (SUB).

[0221] Hereinafter, a display device (1_3) according to another embodiment will be described with reference to FIGS. 19 and 20.

[0222] FIG. 19 is a layout diagram showing a thin-film transistor layer and a mesh conductive layer of a pixel and a light sensor according to another embodiment. FIG. 20 is a cross-sectional view showing a plane cut along VI-VI' of FIG. 19.

[0223] The display device (1_3) of FIGS. 19 and 20 differs from the previous embodiment in that it further includes an auxiliary touch electrode (PE) that overlaps with the touch electrode (SE). Specifically, the auxiliary touch electrode (PE) may be placed on the first touch conductive layer (210), which is the same layer as the first connection portion (CE1). The auxiliary touch electrode (PE) is overlapped and placed below the touch electrode (SE) where the light-transmitting portion (PH) is formed, and may include a first hole (H1) that overlaps with the light-transmitting portion (PH). The one-directional width of the first hole (H1) may be smaller than the one-directional width of the light-transmitting portion (PH).

[0224] When the first hole (H1) of the first touch conductive layer (210) and the light-transmitting portion (PH) of the second touch conductive layer (220) overlap, light reflected from the user's fingerprint can be incident on the light-sensing transistor (LT1) of the light sensor (PS) through the light-transmitting portion (PH) and the first hole (H1). When reflected light passes through multiple holes and is incident on the light-sensing transistor (LT1), the pinhole effect may be increased. That is, as the incident light approaches the object, the incident area becomes narrower, and thus the focus of the incident light is aligned to a single point, allowing clearer light to be incident. For example, the incident light entering the light-sensing transistor (LT1) passes through the light-transmitting portion (PH) and the first hole (H1), which has a width smaller than that of the light-transmitting portion (PH), thereby narrowing the area of ​​the incident light. Accordingly, the focus of the incident light is aligned to a single point, allowing clearer light to be incident on the light-sensing transistor (LT1).

[0225] FIG. 21 is an example cross-sectional view showing the data conductive layer and touch sensing layer of FIG. 19.

[0226] Referring to FIG. 21, the area of ​​the incident light is illustrated when light reflected from a fingerprint is incident on the first sensing channel (LA1) of a light-sensing transistor (LT1). In the same manner as FIG. 19 and FIG. 20, a touch electrode (SE) having a light-transmitting portion (PH) and an auxiliary touch electrode (PE) having a first hole (H1) may be disposed on the first sensing channel (LA1). Additionally, the pinhole effect can be maximized by including a second hole (H2) having a smaller width in the area where the light-transmitting portion (PH) and the first hole (H1) overlap in the data conductive layer (DTL). The data conductive layer (DTL) may be, for example, a first connecting electrode (BE1), a second connecting electrode (BE2), a third connecting electrode (BE3), etc. disposed on the first data conductive layer (DTL1), and may be a signal wiring (for example, a first sensing scan line (RSL1)) or a voltage wiring (for example, a first initialization voltage line (VIL1)) disposed on the first to third gate layers (GTL1, GTL2, GTL3).

[0227] Accordingly, the incident light entering the optical sensing transistor (LT1) passes through the light transmission portion (PH), passes through the first hole (H1) having a width smaller than the light transmission portion (PH), and passes through the second hole (H2) having a width smaller than the first hole (H1), thereby narrowing the area of ​​the incident light. As a result, the focus of the incident light is aligned to a single point, allowing clearer light to be incident on the first sensing channel (LA1) of the optical sensing transistor (LT1).

[0228] FIG. 22 is a circuit diagram showing an example of a light sensor according to another embodiment.

[0229] Referring to FIG. 22, the light sensor (PS) includes a photodiode (PD), first to third sensing transistors (RT1, RT2, RT3), and a sensing capacitor (RC1).

[0230] The first sensing transistor (RT1) may be a reset transistor that resets the potential (V1) of the first electrode of the sensing capacitor (RC1) according to the reset signal of the reset signal line (RSL). The gate electrode of the first sensing transistor (RT1) may be connected to the reset signal line (RSL), the source electrode may be connected to the cathode electrode of the photodiode (PD) and the first electrode of the sensing capacitor (RC1), and the drain electrode may be connected to the second driving voltage line (VDDL2) to which the first sensing driving voltage is applied.

[0231] The second sensing transistor (RT2) may be an amplifying transistor that converts the potential (V1) of the first electrode of the sensing capacitor (RC1) into a current signal and simultaneously amplifies the current signal. The gate electrode of the second sensing transistor (RT2) is connected to the cathode electrode of the photodiode (PD) and the first electrode of the sensing capacitor (RC1), the source electrode is connected to the drain electrode of the third sensing transistor (RT3), and the drain electrode may be connected to the second driving voltage line (VDDL2).

[0232] The third sensing transistor (RT3) may be a selector transistor that transmits a current signal to the lead-out line (ROL) when a sensing scan signal is applied to the sensing scan line (RSL), and the potential (V1) of the first electrode of the sensing capacitor (RC1), amplified by the second sensing transistor (RT2), is applied to the lead-out line (ROL). The gate electrode of the third sensing transistor (RT3) may be connected to the sensing scan line (RSL), the source electrode may be connected to the lead-out line (ROL), and the drain electrode may be connected to the source electrode of the second sensing transistor (RT2).

[0233] The photodiode (PD) may include an anode electrode, a PIN semiconductor layer, and a cathode electrode. The anode electrode of the photodiode (PD) is connected to a first electrode of a sensing capacitor (RC1), and the cathode electrode may be connected to a sensing common voltage line (RVSSL) to which a second sensing driving voltage lower than a first sensing driving voltage is applied. The PIN semiconductor layer of the photodiode (PD) may include a P-type semiconductor layer connected to the anode electrode, an N-type semiconductor layer connected to the cathode electrode, and an I-type semiconductor layer disposed between the P-type semiconductor layer and the N-type semiconductor layer.

[0234] In FIG. 22, the first to third sensing transistors (RT1, RT2, RT3) are described as being formed as N-type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), but are not limited thereto and may be formed as P-type MOSFETs.

[0235] Below, the operation of the optical sensor (PS) illustrated in FIG. 22 will be described in detail.

[0236] First, when the first sensing transistor (RT1) is turned on by the reset signal of the reset signal line (RSL), the potential (V1) of the first electrode of the sensing capacitor (RC1) is reset to the potential of the first sensing driving voltage of the second driving voltage line (VDDL2).

[0237] Secondly, when light reflected by a person's fingerprint is incident on the photodiode (PD), a leakage current may flow in the photodiode (PD). Charge may be charged in the sensing capacitor (RC1) by the leakage current.

[0238] As the sensing capacitor (RC1) is charged, the potential of the gate electrode of the second sensing transistor (RT2) connected to the first electrode of the sensing capacitor (RC1) increases. When the potential of the gate electrode of the second sensing transistor (RT2) becomes greater than the threshold voltage, the second sensing transistor (RT2) can be turned on.

[0239] Thirdly, when a detection scan signal is applied to the sensing scan line (RSL), the third sensing transistor (RT3) can be turned on. When the third sensing transistor (RT3) is turned on, a current signal flowing through the second sensing transistor (RT2) by the potential (V1) of the first electrode of the sensing capacitor (RC1) can be transmitted to the read-out line (ROL). As a result, the potential (V2) of the read-out line (ROL) rises, and the potential (V2) of the read-out line (ROL) can be transmitted to the fingerprint sensor IC. The fingerprint sensor IC can convert the potential (V2) of the read-out line (ROL) into a digital signal through an analog-to-digital converter (ADC).

[0240] The potential (V2) of the read-out line (ROL) is proportional to the first electrode potential (V1) of the sensing capacitor (RC1), that is, the amount of charge stored in the sensing capacitor (RC1), and the amount of charge stored in the sensing capacitor (RC1) is proportional to the amount of light supplied to the photodiode (PD). Therefore, it is possible to determine how much light is incident on the photodiode (PD) of the light sensor (PS) through the potential (V2) of the read-out line (ROL). Since the fingerprint sensor IC can detect the amount of incident light for each light sensor (PS), it is possible to recognize the user's fingerprint pattern.

[0241] FIG. 23 is a drawing showing a display device capable of front sensing according to one embodiment. When the display device (1) forms a plurality of pixels ('PX' in FIG. 1) and a plurality of light sensors ('PS' in FIG. 1) within a single display panel ('10' in FIG. 1), the front of the active area ('AAR' in FIG. 1) may correspond to a fingerprint detection area ('FSA' in FIG. 1).

[0242] Even if the user touches an unrestricted portion of the display panel (10), the light sensor (PS) can generate a photocurrent according to a change in the amount of light received. The read-out circuit ('40' in FIG. 1) generates fingerprint detection data based on the magnitude of the current from the light sensor (PS) and transmits it to a processor. The processor can determine whether the fingerprint detection data matches the user's fingerprint by analyzing the fingerprint detection data and comparing it with a pre-set fingerprint. If the fingerprint detection data transmitted from the read-out circuit (40) is identical to the pre-set fingerprint, the set functions can be performed. The set functions may include various functions such as unlocking the screen of the display device and / or an application, or approving a purchase.

[0243] FIG. 24 is a diagram showing a fingerprint recognition area in a display device according to one embodiment. The display device (1) may place light sensors (PS) adjacent to only some pixels (PX) to increase resolution. Generally, since the area of ​​light incident on a display panel (10) including light sensors (PS) is larger than the area occupied by a single pixel (PX), it is possible to determine the location where light is incident relatively accurately even if light sensors (PS) are placed adjacent to only some pixels (PX) as in FIG. 24.

[0244] For example, when the width of the first direction (X-axis direction) of the user's fingerprint (F) is 16 mm and the width of the second direction (Y-axis direction) is 20 mm, the distance between ridges (RID) and between valleys (VAL) may be 100 to 150 μm. Accordingly, the fingerprint (F) may be composed of multiple valleys (VAL) and ridges (RID), and each line extended in the first direction (X-axis direction) and the second direction (Y-axis direction) in the drawing represents a ridge (RID).

[0245] In the present specification, the area for sensing a user's fingerprint (F) can be adjusted according to the number and location of light-transmitting portions (PH) formed in the area overlapping with the light sensor (PS). As illustrated, when the area formed with light-transmitting portions (PH) overlapping with the light sensor (PS) is defined as the sensing area (SB), the total area of ​​the sensing area (SB) may occupy 25% of the area of ​​the fingerprint (F). Even if the sensing area (SB) is formed to be 25% of the area of ​​the fingerprint (F) in this way, the display device (1) can identify whether the fingerprint (F) matches by combining information from a part of the fingerprint (F). Therefore, front sensing as shown in FIG. 23 may be possible even if the light-transmitting portions (PH) overlapping with the light sensor (PS) are not placed across the entire area of ​​the display panel (10). When the number of light-transmitting portions (PH) is appropriately designed, the resolution of the display panel (10) can be improved.

[0246] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0247] 1: Display device 10: Display panel PX: Pixel PS: Light sensor EL: Light-emitting element LT1: Optical sensing transistor LT2: Sensing switch transistor T1~T7: 1st to 7th transistors

Claims

Claim 1 A display device comprising: a substrate; a plurality of pixels disposed on the substrate and having a first light-emitting region and a second light-emitting region that emit light; a plurality of light sensors disposed on the substrate and including a light-sensing transistor having a first sensing channel that detects light; a bank disposed on the pixels and the light sensors; and a touch conductive layer disposed on the bank and having a touch electrode, wherein the touch conductive layer includes a light-transmitting portion disposed between the first light-emitting region, the second light-emitting region, and the touch electrode, and the light-transmitting portion overlaps with the bank and the light-sensing transistor in the thickness direction of the substrate, and each of the light sensors further includes a sensing switch transistor having a gate electrode connected to a first sensing scan line and a second sensing channel, and the light-sensing transistor has a gate electrode connected to a second sensing scan line. Claim 2 In claim 1, the touch electrode is a display device that does not overlap with the light sensing transistor. Claim 3 In claim 1, the light-transmitting portion is a display device that overlaps with the first sensing channel in the thickness direction of the substrate. Claim 4 A display device according to claim 1, wherein each of the plurality of pixels comprises: a light-emitting element; a first transistor having a first channel that provides a driving current to the light-emitting element; and a second transistor having a second channel that is electrically connected to either the first electrode or the second electrode of the first transistor, and wherein the first channel and the second channel comprise different materials. Claim 5 A display device according to claim 4, wherein the first channel comprises polysilicon, and the second channel and the first sensing channel comprise oxide semiconductor. Claim 6 delete Claim 7 In claim 4, the gate electrode of the light-sensing transistor is a display device disposed on the first sensing channel. Claim 8 In claim 7, the second sensing channel is a display device disposed on the same layer as the first sensing channel. Claim 9 In claim 4, the light-transmitting part is a display device that does not overlap with the second sensing channel. Claim 10 A display device according to claim 1, wherein the plurality of pixels includes an i-th pixel and an i+1-th pixel adjacent to each other (i is a positive integer), a read-out line disposed at the i-th pixel and outputting a light sensing voltage; and a driving voltage line disposed at the i+1-th pixel and outputting a driving voltage, wherein each of the light sensors is connected to the read-out line and the driving voltage line. Claim 11 In claim 1, the touch conductive layer defines a light-emitting opening that exposes the first light-emitting region and the second light-emitting region, and the size of the light-emitting opening is larger than the size of the light-transmitting portion. Claim 12 In claim 11, the touch conductive layer further includes an incision that cuts the touch electrode, and the incision overlaps with the bank and does not overlap with the light sensing transistor, forming a display device. Claim 13 A display device according to claim 3, further comprising a light-shielding layer disposed on the touch electrode and including a light-shielding opening into which light is incident, wherein the light-shielding opening overlaps the light-transmitting portion, the bank, and the first sensing channel in the thickness direction of the substrate. Claim 14 A display device comprising: a substrate; a plurality of pixels disposed on the substrate and having a first light-emitting region and a second light-emitting region that emit light; a plurality of light sensors disposed on the substrate and including a light-sensing transistor having a first sensing channel that detects light; a bank disposed on the pixels and the light sensors; and a touch conductive layer disposed on the bank and having a touch electrode, wherein the touch conductive layer includes a light-transmitting portion disposed between the first light-emitting region, the second light-emitting region, and the touch electrode, wherein the light-transmitting portion overlaps with the bank and the light-sensing transistor in the thickness direction of the substrate, and the light-transmitting portion overlaps with the first sensing channel in the thickness direction of the substrate, and a connecting portion that connects the touch electrodes adjacent in one direction through a contact hole; and an auxiliary touch electrode disposed on the same layer as the connecting portion, wherein the auxiliary touch electrode includes a first hole that overlaps with the light-transmitting portion in the thickness direction of the substrate. Claim 15 In claim 14, a display device in which the width of the light-transmitting portion is smaller than the width of the first hole. Claim 16 A display device comprising: a substrate; a first semiconductor layer having a first channel disposed on the substrate; a first gate layer disposed on the first semiconductor layer and having a gate electrode that overlaps the first channel; a second gate layer disposed on the first gate layer and having a first sensing scan line; a second semiconductor layer disposed on the second gate layer and having a first sensing channel that overlaps the first sensing scan line; and a touch conductive layer having a light-transmitting portion disposed between a touch electrode disposed on the second semiconductor layer and a touch electrode that overlaps the first sensing channel, wherein the touch electrode does not overlap the first sensing channel, and the second gate layer further comprises a scan line and a second sensing scan line disposed spaced apart from the first sensing scan line, wherein the scan line overlaps the second channel of the second semiconductor layer and the second sensing scan line overlaps the second sensing channel of the second semiconductor layer. Claim 17 delete Claim 18 A display device according to claim 16, wherein the first semiconductor layer comprises polysilicon and the second semiconductor layer comprises an oxide semiconductor. Claim 19 In claim 18, the second semiconductor layer comprises a photosensitive oxide semiconductor. Claim 20 A display device according to claim 19, wherein the first sensing channel comprises a first sub-sensing channel and a second sub-sensing channel disposed on the lower surface of the first sub-sensing channel, the first sub-sensing channel comprises a photosensitive oxide semiconductor, and the second sub-sensing channel comprises a photoinsensitive oxide semiconductor.

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