Apparatus and method of vision inspection with adaptive illumination control
Patent Information
- Application Number
- KR1020250079319
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-06-17
- Publication Date
- 2026-08-14
- Estimated Expiration
- 2045-06-17
Smart Images

Figure 112025067419851-PAT00001_ABST
Abstract
Description
Technology Field
[0001] The present disclosure relates to a vision inspection apparatus and method, and more specifically, to a vision inspection apparatus and method capable of adjusting the illumination angle for a wafer. Background Technology
[0002] In the semiconductor manufacturing process, accurate inspection of various devices formed on the wafer surface is a critical factor that directly affects product quality and yield. In particular, the technology to accurately detect multiple devices arranged on the wafer and correct theta (rotation angle) errors serves as a key element in determining the precision of subsequent processes.
[0003] Conventional wafer inspection devices have adopted methods that use a fixed illumination angle or simply adjust the angle manually, which has resulted in a problem of being unable to effectively respond to various characteristics of the wafer surface and changes in stage height. In particular, when device patterns are diversely distributed on the wafer surface, image quality is degraded due to shadows and reflections caused by the angle of incidence of the illumination, frequently leading to reduced device detection accuracy. Prior art literature
[0004] Korean Published Patent 10-2025-0039956(2025.03.21) The problem to be solved
[0005] An embodiment disclosed in the present disclosure discloses a vision inspection device that dynamically adjusts the angle of illumination light provided to a wafer surface based on the height of the wafer.
[0006] The problems that this disclosure aims to solve are not limited to those mentioned above, and other unmentioned problems will be clearly understood by a person skilled in the art from the description below. means of solving the problem
[0007] An apparatus according to the present disclosure for achieving the above-described technical problem comprises: a stage on which a wafer having a plurality of devices arranged thereon is mounted; a photographing module for acquiring an image of the wafer; a lighting module for providing lighting light to the wafer; and a processor for performing a process for detecting the plurality of devices on the wafer using the image, wherein the processor acquires the height of the stage and controls the lighting module so that the angle of the lighting light provided to the wafer can be adjusted based on the height of the stage.
[0008] Meanwhile, the lighting module may be rotatably installed to have an angle of up to 45° with respect to the surface of the wafer.
[0009] In addition, the processor can correct theta of the wafer based on the position of any one of the plurality of devices.
[0010] In addition, the processor can detect a first device placed at a preset position among the plurality of devices in the image, calculate a theta correction value of the wafer based on the first device, and correct the position of the wafer using the theta correction value.
[0011] In addition, the processor can obtain the first coordinates of the first device, obtain the second coordinates of the second device positioned in a predetermined direction relative to the first device, and calculate the theta correction value by comparing the first coordinates and the second coordinates.
[0012] In addition, the processor can detect the device positioned at the top left among the plurality of devices arranged in a grid on the surface of the wafer as the first device.
[0013] In addition, the processor can detect a device arranged horizontally relative to the first device as the second device.
[0014] In addition, the processor can sequentially detect a plurality of devices arranged from the first device to the top right as the second device.
[0015] In addition, the processor can detect the plurality of devices in the image after correcting theta of the wafer.
[0016] A method according to the present disclosure comprises, in a method performed by a vision inspection device capable of adjusting the illumination angle, the step of obtaining the height of a stage on which a wafer is mounted; the step of adjusting the angle of the illumination light provided to the wafer based on the height of the stage; the step of obtaining an image of the wafer; and the step of detecting the positions of a plurality of devices arranged on the wafer in the image. Effects of the invention
[0017] According to the above-described means for solving the problem of the present disclosure, by dynamically adjusting the angle of illumination light provided to the wafer surface based on the height of the wafer, the occurrence of shadows on the wafer surface can be minimized and optimal image quality can be secured, thereby increasing the accuracy of device detection.
[0018] In addition, it is possible to minimize false detection of the device caused by foreign substances or wrinkles on the wafer surface resulting from various variables such as hillocks, cracks, and dust during the wafer sputtering stage, which is the preceding process.
[0019] The effects of the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by a person skilled in the art from the description below. Brief explanation of the drawing
[0020] FIG. 1 is a control block diagram of a vision inspection device according to one embodiment of the present disclosure. Figure 2 is a drawing illustrating an example of the shooting module and lighting module shown in Figure 1. FIG. 3 is a diagram illustrating a device detection process according to one embodiment of the present disclosure. FIGS. 4 and FIGS. 5 are flowcharts of a vision inspection method according to one embodiment of the present disclosure. Specific details for implementing the invention
[0021] Throughout this disclosure, the same reference numerals denote the same components. This disclosure does not describe all elements of the embodiments, and general content in the art to which this disclosure pertains or content that overlaps between embodiments is omitted. The terms 'part, module, component, block' as used in the specification may be implemented in software or hardware, and depending on the embodiments, a plurality of 'parts, modules, components, blocks' may be implemented as a single component, or a single 'part, module, component, block' may include a plurality of components.
[0022] Throughout the specification, when a part is described as being "connected" to another part, this includes not only cases where they are directly connected but also cases where they are indirectly connected, and indirect connections include connections made via a wireless communication network.
[0023] Furthermore, when it is stated that a part "includes" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components.
[0024] Throughout the specification, when it is stated that a component is located "on" another component, this includes not only cases where a component is in contact with another component, but also cases where another component exists between the two components.
[0025] The terms first, second, etc. are used to distinguish one component from another, and the components are not limited by the aforementioned terms.
[0026] Singular expressions include plural expressions unless there is an obvious exception in the context.
[0027] In each step, identification codes are used for convenience of explanation and do not describe the order of the steps; the steps may be performed differently from the specified order unless a specific order is clearly indicated in the context.
[0028] The operating principles and embodiments of the present disclosure will be described below with reference to the attached drawings.
[0029] In this specification, the term "device according to the present disclosure" includes all various devices capable of performing computational processing and providing results to a user. For example, the device according to the present disclosure may include all of a computer, a server device, and a portable terminal, or may be in the form of any one of these.
[0030] Here, the computer may include, for example, a notebook, desktop, laptop, tablet PC, slate PC, etc. equipped with a web browser.
[0031] The above server device is a server that processes information by communicating with an external device, and may include an application server, a computing server, a database server, a file server, a game server, a mail server, a proxy server, and a web server.
[0032] The above portable terminal may include, for example, all types of handheld-based wireless communication devices such as PCS (Personal Communication System), GSM (Global System for Mobile communications), PDC (Personal Digital Cellular), PHS (Personal Handyphone System), PDA (Personal Digital Assistant), IMT (International Mobile Telecommunication)-2000, CDMA (Code Division Multiple Access)-2000, W-CDMA (W-Code Division Multiple Access), WiBro (Wireless Broadband Internet) terminals, smartphones, etc., as well as wearable devices such as watches, rings, bracelets, anklets, necklaces, glasses, contact lenses, or head-mounted devices (HMDs).
[0033] Functions related to artificial intelligence according to the present disclosure are operated through a processor and memory. The processor may be composed of one or more processors. In this case, the one or more processors may be general-purpose processors such as CPUs, APs, and DSPs (Digital Signal Processors), graphics-dedicated processors such as GPUs and VPUs (Vision Processing Units), or artificial intelligence-dedicated processors such as NPUs. The one or more processors control the processing of input data according to predefined operation rules or artificial intelligence models stored in memory. Alternatively, if the one or more processors are artificial intelligence-dedicated processors, the artificial intelligence-dedicated processors may be designed with a hardware structure specialized for processing a specific artificial intelligence model.
[0035] FIG. 1 is a control block diagram of a vision inspection device according to one embodiment of the present disclosure.
[0036] Referring to FIG. 1, a vision inspection device (1) according to one embodiment of the present disclosure includes a stage (10), a shooting module (30), a lighting module (50), and a processor (100), and can detect a plurality of semiconductor material devices on a wafer and perform theta correction of the wafer, and further, can perform defect inspection on the upper surface of the plurality of detected semiconductor material devices.
[0037] The components illustrated in FIG. 1 are not essential for implementing the device (1) according to the present disclosure, so the device (1) described in this specification may have more or fewer components than the components listed above.
[0038] The stage (10) can be fitted with a wafer.
[0039] For example, the stage (10) may include an XYZ movement mechanism capable of precise position control. The stage (10) may include a function to automatically adjust the center position according to the size of the wafer and may include a theta rotation mechanism capable of adjusting the rotation angle of the wafer.
[0040] The shooting module (30) can acquire an image of the wafer.
[0041] In this embodiment, the wafer may be in a state where a plurality of devices are arranged in a grid shape.
[0042] The lighting module (50) can provide lighting light to the wafer for image acquisition.
[0043] The lighting module (50) may be rotatably arranged to provide lighting light at a preset angle with respect to the surface of the wafer. This is explained with reference to FIG. 2.
[0044] Figure 2 is a drawing illustrating an example of the shooting module and lighting module shown in Figure 1.
[0045] Referring to FIG. 2, the imaging module (30) is for capturing an image of a wafer and may be composed of an imaging element such as a CCD (Charge Coupled Device) or CMOS (Complementary Metal Oxide Semiconductor).
[0046] For example, the shooting module (30) can be installed in a vertical direction of the stage (10) on which the wafer is mounted.
[0047] A lighting module (50) can be installed to irradiate light from the side of the wafer.
[0048] For example, the lighting module (50) may include a light source (51), an installation housing (53), and a rotating member (55).
[0049] The light source (51) may be composed of a plurality of light-emitting diodes or metal halide lamps, and may emit light.
[0050] The installation housing (53) provides an installation space for the light source (51), and can be installed so that the light source (51) can rotate through the rotating member (55).
[0051] The rotating member (55) can be installed in the installation housing (53) in a state axially coupled to the light source (51), and is configured to include a motor that generates rotational force to rotate the light source (51) in the forward or reverse direction, so that the light source (51) can be rotated according to a control signal from the processor (100).
[0052] In this embodiment, the rotating member (55) can rotate the light source (51) to have an angle of up to 45° with respect to the surface of the wafer. If the angle of the illumination light irradiated from the light source (51) to the wafer is outside the 45° range, a phenomenon such as a shadow may appear on the wafer image.
[0053] The processor (100) can perform a process for detecting multiple devices on a wafer.
[0054] Additionally, the processor (100) can perform a process to check for defects in each of the detected multiple devices.
[0055] The processor (100) may be implemented with a memory (not shown) that stores data for an algorithm or a program that reproduces the algorithm for controlling the operation of components within the device (1), and at least one processor (not shown) that performs the aforementioned operation using the data stored in the memory (not shown). In this case, the memory (not shown) and the processor (not shown) may each be implemented as separate chips. Alternatively, the memory (not shown) and the processor (not shown) may be implemented as a single chip.
[0056] In addition, the processor (100) can control one or more of the components described above in combination to implement various embodiments according to the present disclosure described in the drawings below on the device (1).
[0057] Hereinafter, a process for detecting a plurality of devices on a wafer performed by a processor (100) will be described in detail with reference to FIG. 3.
[0058] FIG. 3 is a diagram illustrating a device detection process according to one embodiment of the present disclosure.
[0059] Referring to FIG. 39 (a), the processor (100) can obtain an image of a wafer (3) in which a plurality of devices (5) are arranged, through a shooting module (30).
[0060] The processor (100) can perform an initial theta correction on the wafer (3) so that the arrangement of multiple devices (5) approaches a parallel state.
[0061] For example, the processor (100) can measure the theta value of the wafer (3) through an image processing system to check the initial state, and perform initial theta correction for the wafer (3) by adjusting the rotation of the stage (10) so that there is no difference between the measured theta value and the reference theta value.
[0062] Meanwhile, the processor (100) can obtain the height of the stage (10). To this end, the stage (10) may include a displacement sensor for height measurement. The processor (100) can control the lighting module (50) so that the angle of the lighting light provided to the wafer (3) can be adjusted based on the height of the stage (10).
[0063] For example, the processor (100) can control the lighting module (50) so that as the height of the stage (10) increases within an angle range of 45° with respect to the surface of the wafer (3), the angle of the lighting light with respect to the surface of the wafer (3) increases.
[0064] Referring to FIG. 3(b), the processor (100) can detect a first device (5') placed at a preset position among a plurality of devices in an image.
[0065] Referring to FIG. 3 (c), the processor (100) can detect at least one second device (5'') positioned in a preset direction based on the first device (5') detected in the image.
[0066] The processor (100) can extract the coordinates of the first device (5') and at least one second device (5'') detected in the image, and calculate the theta correction value of the wafer (3) by comparing the extracted coordinates.
[0067] For example, the processor (100) can calculate a relative rotation angle between the first coordinate of the first device (5') and the second coordinate of at least one second device (5''), and calculate the average of the at least one calculated rotation angle as a theta correction value.
[0068] The processor (100) can perform theta correction for the wafer (3) by adjusting the rotation of the stage (10) using the calculated theta correction value.
[0069] Referring to FIG. 3 (d), the processor (100) performs theta correction on the wafer (3), detects all of the plurality of devices (5) arranged on the wafer (3) in the image, and can determine the position coordinates of each of the detected plurality of devices (5).
[0070] A vision inspection device (1) according to one embodiment of the present disclosure detects a plurality of devices on an image and performs theta correction on a wafer. By dynamically adjusting the angle of the illumination light provided to the wafer surface based on the height of the wafer, the occurrence of shadows on the wafer surface can be minimized and optimal image quality can be secured, thereby increasing the accuracy of device detection.
[0071] In addition, a vision inspection device (1) according to one embodiment of the present disclosure includes a detailed theta correction algorithm, such as detecting one device and detecting the remaining devices based on the detected device to perform theta correction of the wafer, thereby minimizing the false detection of a device that may occur due to foreign substances or wrinkles on the wafer surface caused by various variables such as hillocks, cracks, and dust during the wafer sputtering step, which is the preceding process.
[0073] FIGS. 4 and FIGS. 5 are flowcharts of a vision inspection method according to one embodiment of the present disclosure.
[0074] A vision inspection method according to one embodiment of the present disclosure can be performed by a vision inspection device (1) illustrated in FIG. 1.
[0075] First, referring to FIG. 4, the processor (100) may include the step of obtaining the height of the stage (10) (S11), the step of adjusting the angle of the lighting module (50) (S13), and the step of obtaining an image of the wafer (3) through the shooting module (30) (S15).
[0076] The processor (100) first obtains the height of the stage (10) (S11).
[0077] The height of the stage (10) can be measured through a laser displacement sensor mounted on the stage (10).
[0078] The processor (100) adjusts the angle of the lighting module (50) based on the acquired stage height (S13).
[0079] The angle of the illumination light irradiated from the illumination module (50) can be calculated using a preset formula according to the height of the stage (10), for example, within an angle range of 45°, the angle of the illumination light with respect to the surface of the wafer (3) can be calculated to increase as the height of the stage (10) increases. That is, the illumination module (50) will be rotated to have a maximum angle of 45° with respect to the surface of the wafer (3).
[0080] The processor (100) controls the shooting module (30) to acquire an image of the wafer (3) (S15).
[0081] Meanwhile, the processor (100) can detect a plurality of devices (5) arranged on the wafer (3) in an image of the acquired wafer (3). This will be explained with reference to FIG. 5.
[0082] Referring to FIG. 5, the processor (100) detects a first device (5') in the image (S21). The first device (5') is generally set as a device located at the top left on the wafer (3).
[0083] For example, the processor (100) can detect the second device (5') in the image using a template matching algorithm.
[0084] The processor (100) detects the second device (5'') based on the first device (5)' (S23). The second device (5'') is set as a device arranged in a horizontal direction (X-axis direction) based on the first device (5').
[0085] For example, the processor (100) detects the second device (5'') using a template matching algorithm, but the search area is limited to a 200×200 pixel area around the expected location of the second device (5'') based on the location of the first device (5) to increase search efficiency.
[0086] The processor (100) calculates a theta correction value using the first coordinate of the first device (5') and the second coordinate of the second device (5'') (S25).
[0087] To increase the accuracy of theta correction values, the processor (100) sequentially detects a plurality of devices arranged from the first device (5') to the top right as the second device (5''), calculates theta correction values for each case, and uses the average value of these as the final theta correction value. This minimizes the impact of individual device detection errors on the overall theta correction accuracy.
[0088] The processor (100) corrects theta of the wafer (3) using the calculated theta correction value (S27).
[0089] For example, the processor (100) can perform theta correction by selectively using one of the following methods: physically rotating the wafer by controlling the rotation mechanism of the stage (10), or correcting the rotation software-wise through image processing.
[0090] The processor (100) detects multiple devices in the image (S29).
[0091] For example, the processor (100) may perform detection of multiple devices using a grid pattern matching method that utilizes the spacing information between devices in a theta-corrected image.
[0093] Meanwhile, the disclosed embodiments may be implemented in the form of a recording medium that stores instructions executable by a computer. The instructions may be stored in the form of program code and, when executed by a processor, may generate a program module to perform the operation of the disclosed embodiments. The recording medium may be implemented as a computer-readable recording medium.
[0094] Computer-readable recording media include all types of recording media that store instructions that can be decoded by a computer. Examples include ROM (Read Only Memory), RAM (Random Access Memory), magnetic tape, magnetic disk, flash memory, optical data storage devices, etc.
[0095] As described above, the disclosed embodiments have been explained with reference to the attached drawings. Those skilled in the art will understand that the present disclosure may be practiced in forms different from the disclosed embodiments without changing the technical spirit or essential features of the present disclosure. The disclosed embodiments are illustrative and should not be interpreted restrictively. Explanation of the symbols
[0097] 1: Vision inspection device 10: Stage 30: Shooting module 50: Lighting Module 100: Processor
Claims
Claim 1 A vision inspection device capable of adjusting the illumination angle, comprising: a stage on which a wafer having a plurality of devices arranged thereon is mounted; a shooting module for acquiring an image of the wafer; a lighting module for providing illumination light to the wafer; and a processor for performing a process for detecting the plurality of devices on the wafer using the image, wherein the processor acquires the height of the stage and controls the lighting module so that the angle of the illumination light provided to the wafer can be adjusted based on the height of the stage, and corrects the theta of the wafer based on the position of any one of the plurality of devices, wherein the processor detects a first device placed at a preset position among the plurality of devices in the image, acquires the first coordinate of the first device, acquires the second coordinate of a second device placed in a preset direction based on the first device, calculates a theta correction value of the wafer by comparing the first coordinate and the second coordinate, and corrects the position of the wafer using the theta correction value. Claim 2 In claim 1, the lighting module is a vision inspection device capable of adjusting the lighting angle, which is rotatably installed to have an angle of up to 45° with respect to the surface of the wafer. Claim 3 delete Claim 4 delete Claim 5 delete Claim 6 In claim 1, the processor is a vision inspection device capable of adjusting the illumination angle, which detects the device positioned at the top left among the plurality of devices arranged in a grid on the surface of the wafer as the first device. Claim 7 In claim 6, the processor is a vision inspection device capable of adjusting the lighting angle, which detects a device arranged horizontally with respect to the first device as the second device. Claim 8 In claim 6, the processor is a vision inspection device capable of adjusting the lighting angle, which sequentially detects a plurality of devices arranged from the first device to the upper right corner as the second device. Claim 9 In claim 1, the processor is a vision inspection device capable of adjusting the illumination angle, which detects the plurality of devices in the image after correcting the theta of the wafer. Claim 10 A vision inspection method capable of adjusting the illumination angle, comprising: a step of obtaining the height of a stage on which a wafer is mounted; a step of adjusting the angle of illumination light provided to the wafer based on the height of the stage; a step of obtaining an image of the wafer; a step of detecting the position of a plurality of devices arranged on the wafer in the image; and a step of correcting the theta of the wafer based on the position of any one of the plurality of devices; wherein the step of correcting the theta of the wafer comprises: a step of detecting a first device placed at a preset position among the plurality of devices in the image; a step of obtaining a first coordinate of the first device; a step of obtaining a second coordinate of a second device placed in a preset direction based on the first device; a step of calculating a theta correction value of the wafer by comparing the first coordinate and the second coordinate; and a step of correcting the position of the wafer using the theta correction value.
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