Hybrid manufacturing process of tgv and ipd based on glass substrate

Abstract

A glass substrate-based TGV and IPD composite manufacturing process is disclosed. This manufacturing process includes the steps of: forming a TGV inside a glass substrate (100) through a TGV (Through Glass Via) process; forming a metal thin film layer (101) on the glass substrate (100); forming a dielectric thin film layer (102) covering the upper portion of the TGV and the metal thin film layer (101); etching the dielectric thin film layer (102) so that the upper portion of the TGV is exposed to the top; and forming a passive device including the metal thin film layer (101) and the dielectric thin film layer (102) on the dielectric thin film layer (102) through an IPD (Integrated Passive Device) process.

Description

Technology Field

[0001] The present invention relates to semiconductor packaging technology, and more specifically, to semiconductor packaging technology including a TGV and IPD composite manufacturing process based on a glass substrate. Background Technology

[0003] Glass substrates enable large-area processing compared to silicon substrates and possess excellent price competitiveness and low signal loss characteristics, so their utilization as materials for semiconductor packaging and interposers is gradually expanding.

[0004] Figure 1 is a cross-sectional view of a through glass via (TGV) formed on a glass substrate.

[0005] Referring to Fig. 1, the TGV formed on the glass substrate can be classified into a full-filled type (A) of Fig. 1 and a conformal type (B) of Fig. 1 depending on how the metal (e.g., copper (Cu), etc.) is filled inside it.

[0006] The fully filled type (A) is a structure in which the interior of the TGV is completely filled with metal (e.g., copper (Cu), etc.). The wall plating type (B) is a structure in which a thin layer of metal is plated on the interior wall of the TGV. In the case of the wall plating type (B), a dielectric material such as ABF (Ajinomoto Build-up Film) is filled into the interior of the TGV to form a flat cross-section (upper cross-section) of the TGV. Since the difficulty of the metal filling process is high for the fully filled type (A), the application of the wall plating type (B) is being considered as an alternative.

[0007] Meanwhile, on glass substrates, capacitors can be formed by depositing a dielectric thin film layer through the Integrated Passive Device (IPD) process. The IPD process on glass substrates refers to a process of forming passive components, such as resistors, capacitors, and inductors, by high-density integration on the glass substrate.

[0008] Figure 2 is a cross-sectional view of a capacitor formed on a glass substrate.

[0009] Referring to FIG. 2, a capacitor formed through an IPD process on a glass substrate may include a first metal layer (101) in the form of a thin film formed on a glass substrate (100), a dielectric thin film layer (102) formed on the entire surface of the glass substrate (100) and on the surface of the first metal layer (101), a second metal layer (103) formed on the first metal layer (101) with the dielectric thin film layer (102) in between, and a third metal layer (105) formed on the upper part of the second metal layer (103) and connected to the second metal layer (103) through a via (104). Here, the first metal layer (101) in the form of a thin film serves as the lower electrode of the capacitor, and the second metal layer (103) and the third metal layer (105) serve as the upper electrodes. The dielectric thin film layer (102) serves as a dielectric that stores an electric field between the lower electrode (101) and the upper electrodes (103 and 105) of the capacitor and determines the size of the capacitance. The dielectric thin film layer (102) may be formed of silicon nitride (SiNx) or a similar inorganic dielectric material.

[0010] Figure 3 is a diagram illustrating the problems that occur when the process of forming a wall-plated type (Conformal type) TGV on a glass substrate and the IPD process are performed simultaneously.

[0011] Referring to Fig. 3, if the TGV and IPD processes of the aforementioned wall plating type (Conformal type) are carried out simultaneously, the following problems may occur.

[0012] The coefficient of thermal expansion (CTE) of a dielectric material, such as ABF (Ajinomoto Build-up Film), filling the interior of a conformal type TGV is different from the CTE of the metal formed along the walls of the glass substrate and the conformal type TGV. Due to this difference in CTE, the dielectric of the TGV beneath the dielectric thin film layer (e.g., SiNx thin film) expands / contracts depending on the temperature change that occurs during the IPD process, causing a lifting phenomenon of the dielectric thin film layer (e.g., SiNx).

[0013] This lifting phenomenon acts as a factor causing a delamination phenomenon in which the dielectric thin film layer (e.g., SiNx thin film) of the capacitor detaches from the first metal layer (101) in the form of a thin film that constitutes the lower electrode of the capacitor. As a result, problems arise during capacitor formation on the glass substrate and the overall IPD process, making it difficult to achieve a stable process. The problem to be solved

[0015] The present invention, aimed at solving the aforementioned problems, is intended to provide a glass substrate-based TGV and IPD composite manufacturing process that solves the problems that occur when a process of forming a wall-plated type TGV on a glass substrate and an IPD process are performed simultaneously. means of solving the problem

[0017] A glass substrate-based TGV and IPD composite manufacturing process according to one aspect of the present invention for achieving the above-described purpose comprises: a step of forming a TGV inside a glass substrate (100) through a TGV (Through Glass Via) process; a step of forming a metal thin film layer (101) on the glass substrate (100); a step of forming a dielectric thin film layer (102) covering the upper portion of the TGV and the metal thin film layer (101); a step of etching the dielectric thin film layer (102) so that the upper portion of the TGV is exposed to the top; and a step of forming a passive device including the metal thin film layer (101) and the dielectric thin film layer (102) on the dielectric thin film layer (102) through an IPD (Integrated Passive Device) process.

[0018] A semiconductor package according to another aspect of the present invention comprises: a TGV formed inside a glass substrate (100); a metal thin film layer (101) formed on the glass substrate (100); a dielectric thin film layer (102) covering the upper portion of the TGV and the metal thin film layer (101); and a passive element formed on the dielectric thin film layer (102), the passive element comprising the metal thin film layer (101) and the dielectric thin film layer (102), wherein the dielectric thin film layer (102) has an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV at the location where the TGV is located. Effects of the invention

[0020] According to the present invention, by etching a dielectric thin film (e.g., SiNx thin film) to form an opening (10) having an area larger than the upper cross-sectional area of ​​the wall-plated type TGV at a location where the wall-plated type TGV is located, the delamination phenomenon of the dielectric thin film (e.g., SiNx thin film) of the capacitor can be prevented from detaching from the thin film-shaped metal layer (101) constituting the lower electrode of the capacitor. Brief explanation of the drawing

[0022] Figure 1 is a cross-sectional view of a through glass via (TGV) formed on a glass substrate. Figure 2 is a cross-sectional view of a capacitor formed on a glass substrate. Figure 3 is a diagram illustrating the problems that occur when the process of forming a wall-plated type (Conformal type) TGV on a glass substrate and the IPD process are performed simultaneously. FIG. 4 is a cross-sectional view of a TGV and an IPD formed according to a glass substrate-based TGV and IPD composite manufacturing process according to a first embodiment of the present invention. Figure 5 is a drawing showing the case where the opening of Figure 4 is designed to be smaller than the upper cross-sectional area of ​​the TGV. FIG. 6 is a cross-sectional view of a TGV and an IPD formed according to a glass substrate-based TGV and IPD composite manufacturing process according to a second embodiment of the present invention. Figure 7 is a diagram showing a structure in which a TGV and a capacitor are connected without etching the dielectric thin film of Figure 6. FIG. 8 is a flowchart illustrating a glass substrate-based TGV and IPD composite manufacturing process according to an embodiment of the present invention. Specific details for implementing the invention

[0023] The terms used in this specification are used merely to describe specific embodiments and are not intended to limit the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, terms such as “comprising” or “having” are intended to indicate the presence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0024] FIG. 4 is a cross-sectional view of a TGV and an IPD formed according to a glass substrate-based TGV and IPD composite manufacturing process according to a first embodiment of the present invention, and FIG. 5 is a drawing showing the case where the opening of FIG. 4 is designed to be smaller than the upper cross-sectional area of ​​the TGV.

[0025] Referring to FIG. 4, this is a case where the TGV and capacitor formed according to the TGV and IPD process according to the first embodiment of the present invention are not connected. That is, this is a case where the TGV is connected to another circuit formed on the glass substrate (100) through a metal layer (103') formed on the same layer as the second metal layer (103) forming the upper electrode of the capacitor.

[0026] To this end, a pad (P) is formed on the upper part of the TGV, and this pad (P) can be connected to another circuit (not shown) formed on the glass substrate (100) through a metal layer (103'). Here, the capacitor includes a first metal layer (101) in the form of a thin film, a dielectric thin film layer (102) formed on the first metal layer (100) and formed on the front surface of the glass substrate (100) (e.g., SiNx thin film, acting as the dielectric of the capacitor), a second metal layer (103) formed on the first metal layer (101) with the dielectric thin film layer (102) in between, and a third metal layer (105) connected to the second metal layer (103) through a via (104). Here, in the claims of this specification, the first metal layer (101) is described as a metal thin film layer.

[0027] Meanwhile, the core of the present invention lies in etching a dielectric thin film layer (102) formed on the front surface of a glass substrate (100) to form an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV at a location where a wall-plated type TGV is located. At this time, a pad (P) corresponding to the upper surface area of ​​the TGV exists in the opening (10). Accordingly, the pad (P) acts as an anti-pad.

[0028] In this way, by etching the dielectric thin film layer (102) formed on the front surface of the glass substrate (100) so as to have an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV at the location where the wall-plated type TGV is located, direct contact between the upper part of the TGV and the dielectric thin film layer (102) is completely eliminated, thereby preventing the phenomenon in which the dielectric (e.g., ABF) formed inside the TGV expands upward due to temperature changes occurring in the IPD process performed after the process of forming the TGV, and the dielectric thin film layer (102) is lifted by the upper part of the TGV and detached into the first metal layer (101).

[0029] If the dielectric thin film layer (102) is etched to have an opening (10') having an area smaller than the upper cross-sectional area of ​​the TGV at the location of the TGV as shown in FIG. 5, direct contact between the upper part of the TGV and the dielectric thin film layer (102) is not completely eliminated, so the phenomenon of detachment due to lifting of the dielectric thin film layer (102) may still exist. Therefore, it is important to etch the dielectric thin film layer (102) to have an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV at the location of the TGV.

[0030] FIG. 6 is a cross-sectional view of a TGV and an IPD formed according to a glass substrate-based TGV and IPD composite manufacturing process according to a second embodiment of the present invention, and FIG. 7 is a drawing showing a structure in which a TGV and a capacitor are connected without etching the dielectric thin film of FIG. 6.

[0031] Referring to FIG. 6, this is a case where a TGV and a capacitor are connected according to the TGV and IPD composite manufacturing process according to the second embodiment of the present invention.

[0032] In FIG. 6, (A) shown above is a structure in which the TGV is directly connected to the first metal layer (101) in the form of a thin film that forms the lower electrode of the capacitor. In FIG. 6, (B) shown below is a structure in which the TGV is connected to the first metal layer (101) that forms the lower electrode of the capacitor through a pad (P) formed on the top of the TGV, another metal layer (103'') formed in the same layer as the second metal layer (103) constituting the capacitor, and a via (V) penetrating the dielectric thin film layer (102).

[0033] The key to the second embodiment of the present invention is also, in the same way as the first embodiment described above, to etch a dielectric thin film layer (102) formed on the front surface of a glass substrate (100) so as to have an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV at the location where the wall-plated type TGV is located.

[0034] If the TGV and the capacitor are directly connected without etching the dielectric thin film layer (102) to have an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV as shown in FIG. 7, the problem described in FIG. 3 cannot be resolved, and thus a delamination phenomenon will occur in which the dielectric thin film layer (102) of the capacitor detaches from the first metal layer (101) in the form of a thin film that constitutes the lower electrode of the capacitor.

[0035] FIG. 8 is a flowchart illustrating a glass substrate-based TGV and IPD composite manufacturing process according to an embodiment of the present invention.

[0036] Referring to FIG. 8, in step 810, a step of forming a TGV inside a glass substrate (100) is performed through a TGV (Through Glass Via) process. For example, the TGV formation can be performed according to the following procedure. A through hole is formed in the glass substrate through laser drilling or chemical etching, and the inner wall of the hole is cleaned to remove impurities. Then, a seed layer is formed on the inner wall of the hole, and the wall surface is metallized by electroplating or electroless plating. Afterward, a low-viscosity liquid dielectric (e.g., ABF, polyimide, epoxy, etc.) is dispensed or spin-coated onto the substrate and then infiltrated into the TGV under vacuum or centrifugal conditions. Afterward, it is cured by thermal curing to solidify.

[0037] Next, in step 820, a step of forming a metal thin film layer (101) on the glass substrate (100) is performed. As a method for forming the metal thin film layer (101), a PVD (physical vapor deposition) method or a CVD (chemical vapor deposition) method may be used. For the PVD method, sputtering or thermal evaporation (E-beam) methods may be used. For the CVD method, inkjet printing or ALD (atomic layer deposition) may be used. The metal thin film layer (101) may be formed by selecting various materials such as Cu, Al, Au, Ag, Ni, etc. Additionally, the metal thin film layer (101) may be patterned through photolithography and etching processes, etc., and electrically connected to the TGV.

[0038] Next, in step 830, a step of forming a dielectric thin film layer (102) covering the upper part of the TGV and the metal thin film layer (101) is performed. A Plasma Enhanced CVD (PECVD) method may be used to form the dielectric thin film layer (102).

[0039] Next, in step 840, a step of etching the dielectric thin film layer (102) is performed so that the upper part of the TGV is exposed to the top. Plasma etching (Dry Etching), wet etching, etc., may be used for etching the dielectric thin film layer (102). At this time, in the photolithography process of each etching process, etching is performed based on a mask pattern set so that the area of ​​the opening (10) is larger than the upper area of ​​the TGV.

[0040] Next, in step 850, a step of forming a passive device including the metal thin film layer (101) and the dielectric thin film layer (102) on the dielectric thin film layer (102) is performed through an Integrated Passive Device (IPD) process. Here, the passive device includes a resistor, a capacitor, an inductor, etc., and a capacitor is exemplified in this specification.

[0041] In an embodiment, step 840 includes the step of etching the dielectric thin film layer (102) to form an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV. As for the etching, in the photolithography process included in the etching process as described above, the etching is performed based on a mask pattern set so that the area of ​​the opening (10) is larger than the upper area of ​​the TGV.

[0042] In the example, the TGV may be a wall-plated type (Conformal type).

[0043] In an embodiment, step 820 includes the step of forming the metal thin film layer so as to be directly connected to the metal plated on the inner wall of the TGV.

[0044] In an embodiment, step 850 further includes, between the step of etching the dielectric thin film layer (102) and the step of forming the passive element, the step of forming a pad (P) on the upper portion of the TGV exposed by the etching of the dielectric thin film layer (102) and the step of forming a via (V) on the dielectric thin film layer (102) formed on the metal thin film layer (101). Here, the pad (P) acts as an anti-pad.

[0045] In an embodiment, step 850 further includes the step of forming a metal layer (103'') connecting the pad (P) and the via (V) on the dielectric thin film layer (102), and the TGV and the passive element are connected by the metal layer (103'').

[0046] The embodiments disclosed in this specification should be considered in an exemplary sense for the sake of illustration rather than in a limiting sense. The scope of the invention is defined by the claims, not by the foregoing description, and all variations within the scope of the claims should be interpreted as being included in the invention.

Claims

Claim 1 A step of forming a wall-plated type (conformal type) TGV inside a glass substrate (100) through a TGV (Through Glass Via) process; a step of forming a metal thin film layer (101) on the glass substrate (100); a step of forming a dielectric thin film layer (102) covering the upper portion of the TGV and the metal thin film layer (101); a step of etching the dielectric thin film layer (102) to form an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV at the location of the TGV so that direct contact between the upper portion of the TGV and the dielectric thin film layer (102) is completely eliminated; a step of forming a pad (P) functioning as an anti-pad on the upper portion of the TGV exposed upward by the etching of the dielectric thin film layer (102); a step of forming a via (V) in the dielectric thin film layer (102) formed on the metal thin film layer (101); A glass substrate-based TGV and IPD composite manufacturing process comprising the step of forming a passive device including the metal thin film layer (101) and the dielectric thin film layer (102) connected to the TGV by forming a metal layer connecting the pad (P) and the via (V) on the dielectric thin film layer (102) through an IPD (Integrated Passive Device) process. Claim 2 delete Claim 3 delete Claim 4 In claim 1, the step of forming the metal thin film layer (101) comprises forming the metal thin film layer so as to be directly connected to the metal plated on the inner wall surface of the TGV, in a glass substrate-based TGV and IPD composite manufacturing process. Claim 5 delete Claim 6 delete Claim 7 A wall-plated type (conformal type) TGV formed inside a glass substrate (100); a metal thin film layer (101) formed on the glass substrate (100); a dielectric thin film layer (102) covering the upper portion of the TGV and the metal thin film layer (101); a pad (P) formed on the upper portion of the TGV exposed upward by etching of the dielectric thin film layer (102) and functioning as an anti-pad; and a via (V) formed in the dielectric thin film layer (102) formed on the metal thin film layer (101). A semiconductor package having a passive element formed on the dielectric thin film layer (102), comprising the metal thin film layer (101) and the dielectric thin film layer (102), and the passive element connected to the TGV through a metal layer connecting the pad (P) and the via (V), wherein the dielectric thin film layer (102) has an opening (10) having an area larger than the upper cross-sectional area of ​​the TGV at the location where the TGV is located, and the opening (10) has an area larger than the upper cross-sectional area of ​​the TGV formed such that direct contact between the upper part of the TGV and the dielectric thin film layer (102) is completely eliminated.

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