Display device and tiled display device including the same

Abstract

A display device is provided. The display device includes a first substrate comprising a display area having a plurality of pixels and a non-display area surrounding the display area; a thin-film transistor layer disposed on the first substrate and comprising a thin-film transistor; a second substrate disposed on the thin-film transistor layer and facing the first substrate; a sealing member disposed between the first substrate and the second substrate in the non-display area and bonding the first and second substrates; a metal wiring disposed on the non-display area on the thin-film transistor layer and covered by the sealing member; a support member supported by the metal wiring; a first receiver protruding from the upper part of the support member to the outer edge of the sealing member; and a second receiver protruding from the lower part of the support member to the outer edge of the sealing member and facing the first receiver.

Description

Technology Field

[0001] The present invention relates to a display device and a tile-type display device including the same. Background Technology

[0002] As the information society develops, the demand for display devices to display images is increasing in various forms. For example, display devices are being installed in various electronic devices such as smartphones, digital cameras, laptop computers, navigation systems, smart televisions, digital photo frames, and electronic display boards, or similar applications are on the rise. Display devices can be of various types, such as Liquid Crystal Display Devices, Field Emission Display Devices, Organic Light Emitting Display Devices, and Light-Emitting Diode Display Devices, and can convey visual information in various ways. A display device may include a display area that displays and conveys images and information, and a non-display area (or bezel) that provides driving voltage and reference voltage to the display area but does not emit light.

[0003] Tile-type display devices are future-oriented display devices that offer the groundbreaking advantage of reducing the specifications and time invested in achieving clear image quality and enhanced driving performance during the development of a single large display device. By driving individual display units developed with excellent high-definition performance to display only a portion of the entire screen, they can provide an integrated, full-scale high-definition screen without being constrained by size or installation location.

[0004] Meanwhile, the internal components of the display device and the circuits driving it may be damaged by static electricity introduced from the outside, and static electricity transmitted through the outer periphery of the display device being manufactured may destroy the circuits in the light-emitting and non-light-emitting regions.

[0005] Tile-type display devices are manufactured by placing a filler between individual bezels in the internal area, which creates a boundary area called a seam that is wider than the bezel width. This can hinder immersion by making it difficult to understand the content being conveyed on the screen when watching videos. Accordingly, while reducing the bezel width can improve eye strain during video viewing, static electricity generated during the connection process of individual display devices may affect the reliability of the product. The problem to be solved

[0006] The problem that the present invention aims to solve is to provide a display device and a tile-type display device including the same, which can prevent defects in the display device and improve reliability by electromagnetically detecting static electricity introduced from the outside of the display device within the bezel, neutralizing it, and dissipating and dispersing it through charging and discharging phenomena, thereby blocking static electricity from entering the display layer.

[0007] The problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0008] A display device according to one embodiment for solving the above problem comprises: a first substrate including a display area having a plurality of pixels and a non-display area surrounding the display area; a thin-film transistor layer including a thin-film transistor disposed on the first substrate; a second substrate disposed on the thin-film transistor layer and facing the first substrate; a sealing member disposed between the first substrate and the second substrate in the non-display area and bonding the first and second substrates; a metal wiring disposed in the non-display area on the thin-film transistor layer and covered by the sealing member; a support member supported by the metal wiring; a first receiver protruding from the upper part of the support member to the outer edge of the sealing member; and a second receiver protruding from the lower part of the support member to the outer edge of the sealing member and facing the first receiver.

[0009] The metal wiring may include a pad portion connected to the anti-static member, comprising a plurality of contact holes, and a plurality of slits extending in a first direction on a plane, spaced apart by the pad portion, and penetrating in the thickness direction. By including a plurality of slits, the metal wiring can reduce wiring resistance.

[0010] The above anti-static member may further include a plurality of insertion parts that protrude from the lower end of the support member and are inserted into a plurality of contact holes of the pad member.

[0011] The first receiver and the second receiver can be implemented as metal plates facing each other at a distance to form a capacitor.

[0012] The metal wiring can be extended along the non-marked area and grounded to a specific voltage or grounded.

[0013] The above display device may further include a substrate insulating layer that directly covers the entire upper surface of the first substrate.

[0014] The above display device may further include a light-emitting element layer disposed on the thin-film transistor layer and including a light-emitting element, a wavelength conversion layer disposed on the light-emitting element layer and including a wavelength conversion unit corresponding to each of the plurality of pixels, and a color filter layer disposed between the wavelength conversion layer and the second substrate and including a color filter corresponding to each of the plurality of pixels.

[0015] The thin-film transistor layer may further include an anti-static electrode surrounding each of the plurality of pixels.

[0016] The above antistatic electrode may include a first antistatic electrode disposed on a first substrate, and a second antistatic electrode disposed on the first antistatic electrode and facing the first antistatic electrode at a distance from each other.

[0017] The thin film transistor layer further includes a connecting electrode that connects the thin film transistor and the light-emitting element, the first electrostatic discharge prevention electrode is disposed on the same layer as the gate electrode of the thin film transistor, and the second electrostatic discharge prevention electrode may be disposed on the same layer as the connecting electrode.

[0018] A display device according to one embodiment for solving the above problem comprises: a first substrate including a display area having a plurality of pixels and a non-display area surrounding the display area; a thin-film transistor layer disposed on the first substrate and including a plurality of thin-film transistors; a pixel electrode disposed on the thin-film transistor layer; a common electrode facing the pixel electrode at a distance; a second substrate disposed on the common electrode and facing the first substrate; a sealing member disposed between the first substrate and the second substrate in the non-display area to bond the first and second substrates; a metal wiring disposed in the non-display area on the thin-film transistor layer and covered by the sealing member; a support member supported by the metal wiring and connected to the common electrode; and a receiving member protruding from the lower part of the support member to the outer edge of the sealing member and facing the common electrode.

[0019] The above common electrode and the above receiver can be implemented as metal plates facing each other with a gap between them to form a capacitor.

[0020] A display device according to one embodiment for solving the above problem comprises: a first substrate including a display area having a plurality of pixels and a non-display area surrounding the display area; a thin-film transistor layer disposed on the first substrate and including a plurality of thin-film transistors; a second substrate disposed on the thin-film transistor layer and facing the first substrate; a sealing member disposed between the first substrate and the second substrate in the non-display area and bonding the first and second substrates; a metal wiring disposed in the non-display area on the thin-film transistor layer and covered by the sealing member; at least one plate connected to the metal wiring and facing the metal wiring; and a receiving member connected to the at least one plate, facing the at least one plate, and protruding outward from the sealing member.

[0021] The above anti-static member may include a first anti-static member having a receiving portion and a first insertion portion protruding from the receiving portion toward the metal wiring, a first plate connected to the first insertion portion and facing the receiving portion, a second anti-static member having a second insertion portion protruding from the first plate toward the metal wiring, and a second plate connected to the second insertion portion and facing the first plate, and a third anti-static member having a third insertion portion protruding from the second plate and connected to the metal wiring.

[0022] The above antistatic member may further include a plurality of plates and a plurality of inserts disposed between the second antistatic member and the third antistatic member.

[0023] The first insertion part is provided on one side of the receiving part, and the second insertion part is provided on the other side of the first plate, so that the first and second insertion parts may be spaced apart from each other on a plane.

[0024] The receiver and the first plate may face each other spaced apart to form a first capacitor, the first plate and the second plate may face each other spaced apart to form a second capacitor, and the second plate and the metal wiring may face each other spaced apart to form a third capacitor.

[0025] The above display device may further include a substrate insulating layer that directly covers the entire upper surface of the first substrate.

[0026] A tile-type display device according to one embodiment for solving the above problem comprises a first display device including a first display area having pixels, a second display device including a second display area adjacent to the first display area, and a coupling member for coupling the first display device and the second display device, wherein each of the first and second display devices comprises a first substrate including a display area and a non-display area, a thin-film transistor layer disposed on the first substrate, a second substrate disposed on the thin-film transistor layer and facing the first substrate, a sealing member disposed between the first substrate and the second substrate in the non-display area to bond the first and second substrates, a metal wiring disposed in the non-display area on the thin-film transistor layer and covered by the sealing member, and an electrostatic discharge prevention member comprising a support member supported by the metal wiring, a first receiver protruding from the upper part of the support member to the outer edge of the sealing member, and a second receiver protruding from the lower part of the support member to the outer edge of the sealing member and facing the first receiver. The anti-static members of the display device face each other with the coupling member in between.

[0027] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0028] According to the display device and the tile-type display device including the same according to the embodiments, by including first and second receiving units that form capacitors at the edge between the first substrate and the second substrate, a portion of the static electricity introduced from the outside is dissipated through the capacitor, and another portion of the static electricity is dispersed and consumed along the metal wiring, thereby preventing static electricity from entering the display layer. Accordingly, the display device and the tile-type display device including the same can improve the reliability of the display device by preventing defects in the display device through the absorption of static energy by improving the static electricity reception sensitivity.

[0029] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification. Brief explanation of the drawing

[0030] FIG. 1 is a plan view showing a tile-type display device according to one embodiment. FIG. 2 is a plan view showing a display device according to one embodiment. Figure 3 is a cross-sectional view of one example cut along line I-I' of Figure 2. Figure 4 is an enlarged view of area A1 of Figure 3, illustrating an example of an electrostatic discharge process. Figure 5 is an enlarged view of area A1 of Figure 3, illustrating another example of the electrostatic discharge process. FIG. 6 is a perspective view showing an anti-static member in the display device of FIG. 3. FIG. 7 is a perspective view showing metal wiring in the display device of FIG. 3. FIG. 8 is a plan view showing the combined relationship between the anti-static member and the metal wiring in the display device of FIG. 3. Figure 9 is a cross-sectional view of another example cut along line I-I' of Figure 2. Figure 10 is a cross-sectional view of another example cut along line I-I' of Figure 2. FIG. 11 is a side view showing an anti-static member in the display device of FIG. 10. FIG. 12 is a plan view showing the combined relationship between the anti-static member and the metal wiring in the display device of FIG. 10. Figure 13 is a cross-sectional view of another example cut along line I-I' of Figure 2. FIG. 14 is a plan view showing a unit pixel and an anti-static electrode in the display device of FIG. 13. FIG. 15 is a plan view showing the combined structure of a tile-type display device according to one embodiment. Figure 16 is a cross-sectional view taken along line II-II' of Figure 15. Specific details for implementing the invention

[0031] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0032] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0033] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be the second component within the technical scope of the present invention.

[0034] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0035] Specific embodiments will be described below with reference to the attached drawings.

[0036] FIG. 1 is a plan view showing a tile-type display device according to one embodiment.

[0037] Referring to FIG. 1, a tile-type display device (TD) may include a plurality of display devices (10). The plurality of display devices (10) may be arranged in a grid pattern, but are not limited thereto. The plurality of display devices (10) may be connected in a first direction (X-axis direction) or a second direction (Y-axis direction), and the tile-type display device (TD) may have a specific shape. For example, each of the plurality of display devices (10) may have the same size as each other, but is not limited thereto. As another example, the plurality of display devices (10) may have different sizes.

[0038] Each of the plurality of display devices (10) may have a rectangular shape including a long side and a short side. The plurality of display devices (10) may be arranged such that their long sides or short sides are connected to one another. Some of the display devices (10) may be placed at the edges of the tile-type display device (TD) to form one side of the tile-type display device (TD). Other of the display devices (10) may be placed at the corners of the tile-type display device (TD) to form two adjacent sides of the tile-type display device (TD). Still other of the display devices (10) may be placed inside the tile-type display device (TD) and surrounded by other display devices (10).

[0039] Each of the plurality of display devices (10) may include a display area (DA) and a non-display area (NDA). The display area (DA) may include a plurality of pixels to display an image. For example, each of the plurality of pixels may include an organic light-emitting diode (OLED) including an organic light-emitting layer, a micro light-emitting diode (Micro LED), a quantum dot light-emitting diode (QD) including a quantum dot light-emitting layer, or an inorganic light-emitting diode including an inorganic semiconductor. As another example, each of the plurality of display devices (10) may include a liquid crystal display panel having a liquid crystal layer disposed between a first substrate and a second substrate. The non-display area (NDA) may be disposed around the display area (DA) to surround the display area (DA) and may not display an image.

[0040] The tile-type display device (TD) may have a planar shape overall, but is not limited thereto. The tile-type display device (TD) may have a three-dimensional shape to provide a sense of three-dimensionality to the user. For example, when the tile-type display device (TD) has a three-dimensional shape, at least some of the display devices (10) among the plurality of display devices (10) may have a curved shape. As another example, the tile-type display device (TD) may have a three-dimensional shape by each of the plurality of display devices (10) having a planar shape and being connected to each other at a predetermined angle.

[0041] A tile-type display device (TD) may include a bonding area (SM) positioned between a plurality of display areas (DA). The tile-type display device (TD) may be formed by connecting the non-display areas (NDA) of each adjacent display device (10). A plurality of display devices (10) may be connected to each other through a bonding member or an adhesive member positioned in the bonding area (SM). A bonding area (SM) of each of the plurality of display devices (10) may not include a pad portion and a flexible film attached to the pad portion. Accordingly, the distance between the display areas (DA) of each of the plurality of display devices (10) may be close enough that the bonding area (SM) between the plurality of display devices (10) is not perceived by the user. Additionally, the external light reflectance of the display area (DA) of each of the plurality of display devices (10) and the external light reflectance of the bonding area (SM) between the plurality of display devices (10) may be substantially the same. Accordingly, the tile-type display device (TD) can improve the sense of disconnection between the multiple display devices (10) and enhance the immersion of the image by preventing the user from perceiving the combined area (SM) between the multiple display devices (10).

[0042] FIG. 2 is a plan view showing a display device according to one embodiment.

[0043] Referring to FIG. 2, a display device (10) may include a plurality of pixels arranged along a plurality of rows and columns in a display area (DA). Each of the plurality of pixels may include a light-emitting region (LA) defined by a pixel defining film or bank, and may emit light having a predetermined peak wavelength through the light-emitting region (LA). For example, the display area (DA) of the display device (10) may include first to third light-emitting regions (LA1, LA2, LA3). Each of the first to third light-emitting regions (LA1, LA2, LA3) may be a region where light generated from a light-emitting element of the display device (10) is emitted to the outside of the display device (10).

[0044] The first to third light-emitting regions (LA1, LA2, LA3) can emit light having a predetermined peak wavelength to the outside of the display device (10). The first light-emitting region (LA1) can emit light of a first color, the second light-emitting region (LA2) can emit light of a second color, and the third light-emitting region (LA3) can emit light of a third color. For example, the first color light may be red light having a peak wavelength in the range of 610 nm to 650 nm, the second color light may be green light having a peak wavelength in the range of 510 nm to 550 nm, and the third color light may be blue light having a peak wavelength in the range of 440 nm to 480 nm, but is not limited thereto.

[0045] The first to third light-emitting regions (LA1, LA2, LA3) may be sequentially and repeatedly arranged along the first direction (X-axis direction) of the display area (DA). For example, the area of ​​the first light-emitting region (LA1) may be larger than the area of ​​the second light-emitting region (LA2), and the area of ​​the second light-emitting region (LA2) may be larger than the area of ​​the third light-emitting region (LA3). As another example, the area of ​​the first light-emitting region (LA1), the area of ​​the second light-emitting region (LA2), and the area of ​​the third light-emitting region (LA3) may be substantially the same.

[0046] The display area (DA) of the display device (10) may include a light-blocking area (BA) surrounding a plurality of light-emitting areas (LA). The light-blocking area (BA) can prevent the mixing of light emitted from the first to third light-emitting areas (LA1, LA2, LA3).

[0047] Figure 3 is a cross-sectional view of one example cut along line I-I' of Figure 2.

[0048] Referring to FIG. 3, the display area (DA) of the display device (10) may include first to third light-emitting areas (LA1, LA2, LA3). Each of the first to third light-emitting areas (LA1, LA2, LA3) may be an area where light generated from a light-emitting diode (ED) of the display device (10) is emitted to the outside of the display device (10).

[0049] The display device (10) may include a first substrate (SUB1), a substrate insulating layer (SDL), a display layer (DPL), a filler (FIL), a sealing member (AM), a second substrate (SUB2), a metal wiring (GNL), and an anti-static member (ESD).

[0050] The first substrate (SUB1) may be a base substrate and may be made of an insulating material such as a polymer resin. For example, the first substrate (SUB1) may be a rigid substrate. If the first substrate (SUB1) is a rigid substrate, the first substrate (SUB1) may include a glass material or a metal material, but is not limited thereto. As another example, the first substrate (SUB1) may be a flexible substrate capable of bending, folding, rolling, etc. If the first substrate (SUB1) is a flexible substrate, the first substrate (SUB1) may include polyimide (PI), but is not limited thereto.

[0051] The substrate insulating layer (SDL) can directly cover the upper surface of the first substrate (SUB1). The substrate insulating layer (SDL) can be placed between the first substrate (SUB1) and the thin-film transistor layer (TFTL). The substrate insulating layer (SDL) can insulate the upper surface of the first substrate (SUB1) by being formed first before the thin-film transistor layer (TFTL) is laminated on the first substrate (SUB1). The substrate insulating layer (SDL) can prevent a metal material from being directly placed on the first substrate (SUB1). Therefore, the substrate insulating layer (SDL) can prevent static electricity from flowing along the upper surface of the first substrate (SUB1). For example, the substrate insulating layer (SDL) may include at least one of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride.

[0052] A display layer (DPL) may be disposed on a substrate insulating layer (SDL). The display layer (DPL) may include a thin-film transistor layer (TFTL), a light-emitting element layer (EML), a wavelength conversion layer (WLCL), and a color filter layer (CFL). The thin-film transistor layer (TFTL) may include a light-blocking layer (BML), a buffer layer (BF), a thin-film transistor (TFT), a gate insulating layer (GI), an interlayer insulating layer (ILD), first and second connecting electrodes (CNE1, CNE2), a first protection layer (PAS1), and a first planarization layer (OC1).

[0053] A light-blocking layer (BML) may be disposed on a substrate insulating layer (SDL). The light-blocking layer (BML) can block external light incident on a thin-film transistor (TFT). For example, the light-blocking layer (BML) may be formed as a single layer or a multilayer composed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof. As another example, the light-blocking layer (BML) may be an organic film containing a black pigment.

[0054] The buffer layer (BF) can cover the substrate insulating layer (SDL) and the light-blocking layer (BML). The buffer layer (BF) may include an inorganic material capable of preventing the penetration of air or moisture. For example, the buffer layer (BF) may include a plurality of alternately stacked inorganic films.

[0055] A thin-film transistor (TFT) can be placed on a buffer layer (BF) and can constitute a pixel circuit for each of a plurality of pixels. For example, the thin-film transistor (TFT) may be a driving transistor or a switching transistor of a pixel circuit. The thin-film transistor (TFT) may include a semiconductor region (ACT), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE).

[0056] A semiconductor region (ACT), a source electrode (SE), and a drain electrode (DE) may be disposed on a buffer layer (BF). The semiconductor region (ACT) may overlap with the gate electrode (GE) in the thickness direction and may be insulated from the gate electrode (GE) by a gate insulating film (GI). The source electrode (SE) and the drain electrode (DE) may be formed by making the material of the semiconductor region (ACT) conductive.

[0057] The gate electrode (GE) can be placed on the gate insulating film (GI). The gate electrode (GE) can overlap with the semiconductor region (ACT) with the gate insulating film (GI) in between.

[0058] A gate insulating film (GI) may be provided on top of a semiconductor region (ACT), a source electrode (SE), and a drain electrode (DE). For example, the gate insulating film (GI) may cover the semiconductor region (ACT), the source electrode (SE), the drain electrode (DE), and a buffer layer (BF), and may insulate the semiconductor region (ACT) from the gate electrode (GE). The gate insulating film (GI) may include a contact hole through which each of the first and second connecting electrodes (CNE1, CNE2) passes.

[0059] The interlayer insulating film (ILD) may cover the gate electrode (GE) and the gate insulating film (GI). The interlayer insulating film (ILD) may include a contact hole through which the first and second connecting electrodes (CNE1, CNE2) each pass. The contact hole of the interlayer insulating film (ILD) may be connected to the contact hole of the gate insulating film (GI).

[0060] The first and second connecting electrodes (CNE1, CNE2) may be spaced apart from each other on the interlayer insulating film (ILD). The first connecting electrode (CNE1) may connect a data line or power line to the source electrode (SE) of the thin-film transistor (TFT). The first connecting electrode (CNE1) may be contacted to the source electrode (SE) through a contact hole provided in the interlayer insulating film (ILD) and the gate insulating film (GI).

[0061] The second connecting electrode (CNE2) can connect the drain electrode (DE) of the thin-film transistor (TFT) and the first electrode (AE) of the light-emitting element (EL). The second connecting electrode (CNE2) can be contacted to the drain electrode (DE) through contact holes provided in the interlayer insulating film (ILD) and the gate insulating film (GI).

[0062] The first protective layer (PAS1) can cover the first and second connecting electrodes (CNE1, CNE2) and the interlayer insulating film (ILD). The first protective layer (PAS1) can protect the thin-film transistor (TFT). The first protective layer (PAS1) may include a contact hole through which the first electrode (AE) of the light-emitting element (EL) passes.

[0063] A first planarization layer (OC1) is provided on a first protection layer (PAS1) to planarize the top of a thin-film transistor layer (TFTL). For example, the first planarization layer (OC1) may include a contact hole through which a first electrode (AE) of a light-emitting element (EL) passes. Here, the contact hole of the first planarization layer (OC1) may be connected to the contact hole of the first protection layer (PAS1). The first planarization layer (OC1) may include an organic material.

[0064] The light-emitting element layer (EML) may include a light-emitting element (EL), a first bank (BNK1), a second bank (BNK2), a second protective layer (PAS2), and a second planarization layer (OC2).

[0065] A light-emitting element (EL) may be disposed on a thin-film transistor layer (TFTL). The light-emitting element (EL) may include a first electrode (AE), a second electrode (CE), and a light-emitting diode (ED).

[0066] The first electrode (AE) may be disposed on the first planarization layer (OC1). For example, the first electrode (AE) may be disposed on the first bank (BNK1) provided on the first planarization layer (OC1) to cover the first bank (BNK1). The first electrode (AE) may be disposed to overlap with one of the first to third light-emitting regions (LA1, LA2, LA3) defined by the second bank (BNK2). The first electrode (AE) may be connected to the drain electrode (DE) of the thin-film transistor (TFT) through the second connecting electrode (CNE2). The first electrode (AE) may be the anode electrode of the light-emitting element (EL), but is not limited thereto.

[0067] The second electrode (CE) may be spaced apart from the first electrode (AE) on the first planarization layer (OC1). For example, the second electrode (CE) may be placed on the first bank (BNK1) placed on the first planarization layer (OC1) to cover the first bank (BNK1). The second electrode (CE) may be placed to overlap with one of the first to third light-emitting regions (LA1, LA2, LA3) defined by the second bank (BNK2). The second electrode (CE) may be the cathode electrode of the light-emitting element (EL), but is not limited thereto.

[0068] A light-emitting diode (ED) may be disposed between a first electrode (AE) and a second electrode (CE) on a first planarization layer (OC1). One end of the light-emitting diode (ED) may be connected to the first electrode (AE), and the other end of the light-emitting diode (ED) may be connected to the second electrode (CE). For example, a plurality of light-emitting diodes (ED) may include an active layer having the same material and may emit light of the same wavelength range or light of the same color. The light emitted from each of the first to third light-emitting regions (LA1, LA2, LA3) may have the same color. For example, a plurality of light-emitting diodes (ED) may emit light of the third color or blue light having a peak wavelength in the range of 440 nm to 480 nm. Accordingly, the light-emitting element layer (EML) may emit light of the third color or blue light.

[0069] The second bank (BNK2) may be placed in the light-blocking region (BA) on the first planarization layer (OC1). The second bank (BNK2) may define the first to third light-emitting regions (LA1, LA2, LA3). For example, the second bank (BNK2) may surround each of the first to third light-emitting regions (LA1, LA2, LA3), but is not limited thereto. The second bank (BNK2) may separate and insulate the first electrode (AE) or the second electrode (CE) of each of the plurality of light-emitting elements (EL).

[0070] The second protective layer (PAS2) may be disposed on a plurality of light-emitting elements (EL) and a second bank (BNK2). The second protective layer (PAS2) may cover the plurality of light-emitting elements (EL) and protect the plurality of light-emitting elements (EL). The second protective layer (PAS2) may prevent damage to the plurality of light-emitting elements (EL) by preventing the penetration of impurities, such as moisture or air, from the outside.

[0071] The second flattening layer (OC2) is provided on the second protective layer (PAS2) to flatten the top of the light-emitting element layer (EML). For example, the second flattening layer (OC2) may include an organic material.

[0072] The filler (FIL) can fill the space between the light-emitting diode layer (EML) and the wavelength conversion layer (WLCL) and can be surrounded by a sealing member (AM). For example, the filler (FIL) can be made of an organic material and can transmit light. The filler (FIL) can be made of silicon-based organic materials, epoxy-based organic materials, etc., but is not limited thereto. As another example, the filler (FIL) may be omitted.

[0073] A sealing member (AM) may be positioned between the edge of the first substrate (SUB) and the edge of the second substrate (SUB2) in the non-display area (NDA). The sealing member (AM) may be positioned along the edges of the first substrate (SUB1) and the second substrate (SUB2) in the non-display area (NDA) to seal a filler (FIL). The sealing member (AM) may bond the first substrate (SUB1) and the second substrate (SUB2). For example, the sealing member (AM) may include an organic material. The sealing member (AM) may be made of an epoxy resin, but is not limited thereto.

[0074] A wavelength conversion layer (WLCL) may be disposed between sealing members (AM). The wavelength conversion layer (WLCL) may include a second light-blocking member (BK2), a first wavelength conversion unit (WLC1), a second wavelength conversion unit (WLC2), a light-transmitting unit (LTU), and a second capping layer (CAP2).

[0075] The second light-blocking member (BK2) may be placed in a light-blocking region (BA) on the second capping layer (CAP2). The second light-blocking member (BK2) may overlap with the second bank (BNK2) in the thickness direction. The second light-blocking member (BK2) can block the transmission of light. The second light-blocking member (BK2) can improve the color reproduction rate of the display device (10) by preventing light from intruding and mixing between the first to third light-emitting regions (LA1, LA2, LA3). The second light-blocking member (BK2) may be arranged in a grid shape surrounding the first to third light-emitting regions (LA1, LA2, LA3) on a plane.

[0076] A first wavelength conversion unit (WLC1) may be disposed in a first light-emitting region (LA1) on a second capping layer (CAP2). The first wavelength conversion unit (WLC1) may be surrounded by a second light-blocking member (BK2). The first wavelength conversion unit (WLC1) may include a first base resin (BS1), a first scatterer (SCT1), and a first wavelength shifter (WLS1).

[0077] The first base resin (BS1) may include a material with a relatively high light transmittance. The first base resin (BS1) may be made of a transparent organic material. For example, the first base resin (BS1) may include at least one of organic materials such as an epoxy resin, an acrylic resin, a cardo resin, and an imide resin.

[0078] The first scatterer (SCT1) may have a refractive index different from that of the first base resin (BS1) and may form an optical interface with the first base resin (BS1). For example, the first scatterer (SCT1) may include a light-scattering material or light-scattering particles that scatter at least a portion of the transmitted light. For example, the first scatterer (SCT1) may include metal oxides such as titanium oxide (TiO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), indium oxide (In2O3), zinc oxide (ZnO), or tin oxide (SnO2), or may include organic particles such as acrylic resin or urethane resin. The first scatterer (SCT1) may scatter light in random directions regardless of the incident direction of the incident light without substantially changing the peak wavelength of the incident light.

[0079] The first wavelength shifter (WLS1) can convert or shift the peak wavelength of incident light to the first peak wavelength. For example, the first wavelength shifter (WLS1) can convert and emit blue light provided by the display device (10) into red light having a single peak wavelength in the range of 610 nm to 650 nm. The first wavelength shifter (WLS1) may be a quantum dot, a quantum rod, or a phosphor. A quantum dot may be a particulate material that emits a specific color as electrons transition from the conduction band to the valence band.

[0080] A portion of the blue light provided by the light-emitting element layer (EML) may pass through the first wavelength conversion unit (WLC1) without being converted into red light by the first wavelength shifter (WLS1). Among the blue light provided by the light-emitting element layer (EML), the light incident on the first color filter (CF1) without being converted by the first wavelength conversion unit (WLC1) may be blocked by the first color filter (CF1). Furthermore, among the blue light provided by the light-emitting element layer (EML), the red light converted by the first wavelength conversion unit (WLC1) may pass through the first color filter (CF1) and be emitted to the outside. Therefore, the first light-emitting region (LA1) may emit red light.

[0081] The second wavelength converter (WLC2) may be disposed in the second light-emitting region (LA2) on the second capping layer (CAP2). The second wavelength converter (WLC2) may be surrounded by a second light-blocking member (BK2). The second wavelength converter (WLC2) may include a second base resin (BS2), a second scatterer (SCT2), and a second wavelength shifter (WLS2).

[0082] The second base resin (BS2) may include a material with relatively high light transmittance. The second base resin (BS2) may be made of a transparent organic material. For example, the second base resin (BS2) may be made of the same material as the first base resin (BS1) or may be made of the material exemplified in the first base resin (BS1).

[0083] The second scatterer (SCT2) may have a refractive index different from that of the second base resin (BS2) and may form an optical interface with the second base resin (BS2). For example, the second scatterer (SCT2) may include a light-scattering material or light-scattering particles that scatter at least a portion of the transmitted light. For example, the second scatterer (SCT2) may be made of the same material as the first scatterer (SCT1) or may be made of the material exemplified in the first scatterer (SCT1).

[0084] The second wavelength shifter (WLS2) can convert or shift the peak wavelength of incident light to a second peak wavelength different from the first peak wavelength of the first wavelength shifter (WLS1). For example, the second wavelength shifter (WLS2) can convert and emit blue light provided by the display device (10) into green light having a single peak wavelength in the range of 510 nm to 550 nm. The second wavelength shifter (WLS2) may be a quantum dot, a quantum rod, or a phosphor. The second wavelength shifter (WLS2) may include a material of the same nature as the material exemplified in the first wavelength shifter (WLS1). The wavelength conversion range of the second wavelength shifter (WLS2) may be made of a quantum dot, a quantum rod, or a phosphor such that it is different from the wavelength conversion range of the first wavelength shifter (WLS1).

[0085] The light-transmitting portion (LTU) may be disposed in a third light-emitting region (LA3) on the second capping layer (CAP2). The light-transmitting portion (LTU) may be surrounded by a second light-blocking member (BK2). The light-transmitting portion (LTU) may transmit while maintaining the peak wavelength of the incident light. The light-transmitting portion (LTU) may include a third base resin (BS3) and a third scatterer (SCT3).

[0086] The third base resin (BS3) may include a material with relatively high light transmittance. The third base resin (BS3) may be made of a transparent organic material. For example, the third base resin (BS3) may be made of the same material as the first or second base resin (BS1, BS2), or may be made of the material exemplified in the first or second base resin (BS1, BS2).

[0087] The third scatterer (SCT3) may have a refractive index different from that of the third base resin (BS3) and may form an optical interface with the third base resin (BS3). For example, the third scatterer (SCT3) may include a light-scattering material or light-scattering particles that scatter at least a portion of the transmitted light. For example, the third scatterer (SCT3) may be made of the same material as the first or second scatterer (SCT1, SCT2) or may be made of the material exemplified in the first or second scatterer (SCT1, SCT2).

[0088] The second capping layer (CAP2) can cover the lower surface of the first and second wavelength conversion sections (WLC1, WLC2), the light transmission section (LTU), and the first light-blocking member (BK1). For example, the second capping layer (CAP2) can seal the first and second wavelength conversion sections (WLC1, WLC2) and the light transmission section (LTU) to prevent damage or contamination of the first and second wavelength conversion sections (WLC1, WLC2) and the light transmission section (LTU). For example, the second capping layer (CAP2) may include an inorganic material.

[0089] The color filter layer (CFL) may include a first capping layer (CAP1), a first light-blocking member (BK1), and first to third color filters (CF1, CF2, CF3).

[0090] The first capping layer (CAP1) may be disposed on the wavelength conversion layer (WLCL). The first capping layer (CAP1) may seal the lower surface of the first to third color filters (CF1, CF2, CF3). For example, the first capping layer (CAP1) may include an inorganic material.

[0091] The first light-blocking member (BK1) may be placed in the light-blocking region (BA) at the bottom of the second substrate (SUB2). The first light-blocking member (BK1) may overlap with the second light-blocking member (BK2) or the second bank (BNK2) in the thickness direction. The first light-blocking member (BK1) can block the transmission of light. The first light-blocking member (BK1) can improve the color reproduction rate of the display device (10) by preventing light from intruding and mixing between the first to third light-emitting regions (LA1, LA2, LA3). The first light-blocking member (BK1) may be arranged in a grid shape surrounding the first to third light-emitting regions (LA1, LA2, LA3) on a plane.

[0092] A first color filter (CF1) may be placed in a first light-emitting region (LA1) on the lower side of a second substrate (SUB2). The first color filter (CF1) may be surrounded by a first light-blocking member (BK1). The first color filter (CF1) may overlap with a first wavelength conversion unit (WLC1) in the thickness direction. The first color filter (CF1) may selectively transmit light of a first color (e.g., red light) and block or absorb light of a second color (e.g., green light) and light of a third color (e.g., blue light). For example, the first color filter (CF1) may be a red color filter and may include a red colorant.

[0093] A second color filter (CF2) may be placed in a second light-emitting region (LA2) on the lower side of a second substrate (SUB2). The second color filter (CF2) may be surrounded by a first light-blocking member (BK1). The second color filter (CF2) may overlap with the second wavelength conversion unit (WLC2) in the thickness direction. The second color filter (CF2) may selectively transmit light of a second color (e.g., green light) and block or absorb light of a first color (e.g., red light) and light of a third color (e.g., blue light). For example, the second color filter (CF2) may be a green color filter and may include a green colorant.

[0094] A third color filter (CF3) may be placed in a third light-emitting region (LA3) on the lower side of the second substrate (SUB2). The third color filter (CF3) may be surrounded by a first light-blocking member (BK1). The third color filter (CF3) may overlap with the light-transmitting portion (LTU) in the thickness direction. The third color filter (CF3) may selectively transmit light of a third color (e.g., blue light) and block or absorb light of a first color (e.g., red light) and light of a second color (e.g., green light). For example, the third color filter (CF3) may be a blue color filter and may include a blue colorant.

[0095] The first to third color filters (CF1, CF2, CF3) can absorb a portion of the light entering from outside the display device (10) to reduce reflected light caused by external light. Accordingly, the first to third color filters (CF1, CF2, CF3) can prevent color distortion caused by external light reflection.

[0096] The second substrate (SUB2) may be placed on a color filter layer (CFL). The second substrate (SUB2) may support and protect the display device (10). The second substrate (SUB2) may be a base substrate and may be made of an insulating material such as a polymer resin. For example, the second substrate (SUB2) may be a rigid substrate. If the second substrate (SUB2) is a rigid substrate, the second substrate (SUB2) may include a glass material or a metal material, but is not limited thereto. As another example, the second substrate (SUB2) may be a flexible substrate capable of bending, folding, rolling, etc. If the second substrate (SUB2) is a flexible substrate, the second substrate (SUB2) may include polyimide (PI), but is not limited thereto.

[0097] A metal wiring (GNL) may be placed in a non-display area (NDA) on a thin-film transistor layer (TFTL). The metal wiring (GNL) may extend along at least one edge of the first substrate (SUB1). The metal wiring (GNL) may be covered by a sealing member (AM). For example, the metal wiring (GNL) may be placed on the first protection layer (PAS1), but is not limited thereto. The metal wiring (GNL) may be connected to a ground pad portion (not shown) placed on one side of the first substrate (SUB1) via the non-display area (NDA). The metal wiring (GNL) may be inserted into a contact hole penetrating the first protection layer (PAS1), the interlayer insulating film (ILD), the gate insulating film (GI), and the buffer layer (BF) and connected to a light-blocking layer (BML).

[0098] The metal wiring (GNL) can be grounded to a specific voltage or grounded through the ground pad portion. By being grounded or grounded, the metal wiring (GNL) can guide static electricity introduced from the outside to the outer periphery of the display device (10). The metal wiring (GNL) can prevent static electricity introduced from the outside from entering the display layer (DPL).

[0099] An electrostatic discharge (ESD) can be placed in a non-display area (NDA) between a first substrate (SUB1) and a second substrate (SUB2). One end of the electrostatic discharge (ESD) can be exposed toward the outside of the display device (10), and the other end of the electrostatic discharge (ESD) can be connected to a metal wiring (GNL). The electrostatic discharge (ESD) can dissipate a portion of the static electricity introduced from the outside and guide another portion of the static electricity to the metal wiring (GNL). For example, the amount of static electricity dissipated by the electrostatic discharge (ESD) can be significantly greater than the amount of static electricity induced to the metal wiring (GNL). Therefore, the electrostatic discharge (ESD) can prevent static electricity from entering the display layer (DPL) by guiding only a minute amount of static electricity to the metal wiring (GNL).

[0100] The electrostatic discharge (ESD) member may include a support member (SPT), a first receiver member (RCV1), a second receiver member (RCV2), and an insertion member (IST).

[0101] A support member (SPT) may be disposed on a metal wiring (GNL) and supported by the metal wiring (GNL), and may support the first and second receivers (RCV1, RCV2). The support member (SPT) may extend from the upper part of the metal wiring (GNL) to the lower part of the second substrate (SUB2). For example, the support member (SPT) may extend along at least one edge of the first substrate (SUB1) together with the metal wiring (GNL). The support member (SPT) may be wrapped by a sealing member (AM).

[0102] The first receiver (RCV1) may protrude from the upper part of the support member (SPT) to the outer edge of the sealing member (AM). The first receiver (RCV1) may protrude toward the outside of the first substrate (SUB1). The end of the first receiver (RCV1) may be parallel to the end of the first substrate (SUB1) or the end of the second substrate (SUB2), but is not limited thereto. A portion of the first receiver (RCV1) may be connected to the support member (SPT) and wrapped by the sealing member (AM), and another portion of the first receiver (RCV1) may protrude from the sealing member (AM). The first receiver (RCV1) may be a metal plate extending along at least one edge of the first substrate (SUB1). For example, the first receiver (RCV1) may be in contact with the lower surface of the wavelength conversion layer (WLCL) or the color filter layer (CFL), but is not limited thereto. As another example, the first receiver (RCV1) may be spaced apart from the lower surface of the wavelength conversion layer (WLCL) or color filter layer (CFL) by a predetermined distance.

[0103] The second receiver (RCV2) may protrude from the lower part of the support member (SPT) to the outer edge of the sealing member (AM). The second receiver (RCV2) may protrude toward the outside of the first substrate (SUB1). The second receiver (RCV2) may protrude in a direction parallel to the first receiver (RCV1). The end of the second receiver (RCV2) may be parallel to, but is not limited to, the end of the first receiver (RCV1), the end of the first substrate (SUB1), or the end of the second substrate (SUB2). A portion of the second receiver (RCV2) may be connected to the support member (SPT) and wrapped by the sealing member (AM), and another portion of the second receiver (RCV2) may protrude from the sealing member (AM). The second receiver (RCV2) may be a metal plate extending along at least one edge of the first substrate (SUB1). The second receiver (RCV2) may be spaced apart from the first receiver (RCV1) by a predetermined distance. The first and second receivers (RCV1, RCV2) may form a capacitor by facing each other.

[0104] The insertion part (IST) may protrude from the bottom of the support part (SPT) toward the metal wiring (GNL). The insertion part (IST) may be inserted into a plurality of contact holes (CNT) of the metal wiring (GNL) and connected to the metal wiring (GNL).

[0105] FIG. 4 is an enlarged view of area A1 in FIG. 3, illustrating one example of an electrostatic discharge process, and FIG. 5 is an enlarged view of area A1 in FIG. 3, illustrating another example of an electrostatic discharge process.

[0106] Referring to FIGS. 4 and 5, an electrostatic discharge (ESD) member may be placed in a non-display area (NDA) between a first substrate (SUB1) and a second substrate (SUB2). One end of the electrostatic discharge (ESD) member may be exposed toward the outside of the display device (10), and the other end of the electrostatic discharge (ESD) member may be connected to a metal wiring (GNL). The electrostatic discharge (ESD) member may dissipate a portion of the static electricity introduced from the outside and guide another portion of the static electricity to the metal wiring (GNL). For example, the amount of static electricity dissipated by the electrostatic discharge (ESD) member may be significantly greater than the amount of static electricity induced to the metal wiring (GNL). Therefore, the electrostatic discharge (ESD) member may prevent static electricity from entering the display layer (DPL) by guiding only a minute amount of static electricity to the metal wiring (GNL).

[0107] In FIG. 4, the first electrostatic energy (ESS1) can be introduced into the first receiver (RCV1) of the electrostatic discharge member (ESD). A portion (ESS1a) of the first electrostatic energy (ESS1) can be discharged into a capacitor (CAP) formed between the first and second receivers (RCV1, RCV2) and consume energy. Thus, the electrostatic discharge member (ESD) can dissipate a portion of the first electrostatic energy (ESS1) through the capacitor (CAP).

[0108] Another portion (ESS1b) of the first electrostatic energy (ESS1) can be induced into the metal wiring (GNL) through the support portion (SPT) and the insertion portion (IST). The other portion (ESS1b) of the first electrostatic energy (ESS1) can flow along the metal wiring (GNL) and can be discharged and neutralized to the outside of the display device (10) through the ground pad portion. For example, the amount of electrostatic energy (ESS1a) relieved by the electrostatic prevention member (ESD) can be significantly greater than the amount of electrostatic energy (ESS1b) induced into the metal wiring (GNL) (ESS1a≫ESS1b). Therefore, the electrostatic prevention member (ESD) can prevent electrostatic energy from entering the display layer (DPL) by inducing only a minute amount of electrostatic energy (ESS1b) into the metal wiring (GNL).

[0109] In FIG. 5, the second electrostatic energy (ESS2) can be introduced into the second receiver (RCV2) of the electrostatic discharge member (ESD). A portion (ESS2a) of the second electrostatic energy (ESS2) can be discharged into a capacitor (CAP) formed between the first and second receivers (RCV1, RCV2) to consume energy. Thus, the electrostatic discharge member (ESD) can dissipate a portion of the second electrostatic energy (ESS2) through the capacitor (CAP).

[0110] Another portion (ESS2b) of the second electrostatic energy (ESS2) can be induced into the metal wiring (GNL) through the support portion (SPT) and the insertion portion (IST). The other portion (ESS2b) of the second electrostatic energy (ESS2) can flow along the metal wiring (GNL) and can be discharged and neutralized to the outside of the display device (10) through the ground pad portion. For example, the amount of electrostatic energy (ESS2a) relieved by the electrostatic prevention member (ESD) can be significantly greater than the amount of electrostatic energy (ESS2b) induced into the metal wiring (GNL) (ESS2a≫ESS2b). Therefore, the electrostatic prevention member (ESD) can prevent electrostatic energy from flowing into the display layer (DPL) by inducing only a minute amount of electrostatic energy (ESS2b) into the metal wiring (GNL). The display device (10) can improve the reliability of the display device (10) by preventing electrostatic energy from flowing into the display layer (DPL) by improving the electrostatic reception sensitivity in the non-display area (NDA).

[0111] FIG. 6 is a perspective view showing an anti-static member in the display device of FIG. 3, FIG. 7 is a perspective view showing metal wiring in the display device of FIG. 3, and FIG. 8 is a plan view showing the combined relationship between the anti-static member and the metal wiring in the display device of FIG. 3.

[0112] Referring to FIGS. 6 to 8, the electrostatic discharge (ESD) member may include a support member (SPT), a first receiver member (RCV1), a second receiver member (RCV2), and an insertion member (IST).

[0113] A support member (SPT) may be disposed on a metal wiring (GNL) and supported by the metal wiring (GNL), and may support the first and second receivers (RCV1, RCV2). The support member (SPT) may extend from the upper part of the metal wiring (GNL) to the lower part of the second substrate (SUB2). For example, the support member (SPT) may extend along at least one edge of the first substrate (SUB1) together with the metal wiring (GNL).

[0114] The first receiver (RCV1) may protrude from the upper part of the support (SPT) toward the outside of the first substrate (SUB1). The end of the first receiver (RCV1) may be parallel to the end of the first substrate (SUB1) or the end of the second substrate (SUB2), but is not limited thereto. The first receiver (RCV1) may be a metal plate extending along at least one edge of the first substrate (SUB1).

[0115] The second receiver (RCV2) may protrude from the lower part of the support (SPT) toward the outside of the first substrate (SUB1). The second receiver (RCV2) may protrude in a direction parallel to the first receiver (RCV1). The end of the second receiver (RCV2) may be parallel to, but is not limited to, the end of the first receiver (RCV1), the end of the first substrate (SUB1), or the end of the second substrate (SUB2). The second receiver (RCV2) may be a metal plate extending along at least one edge of the first substrate (SUB1). The second receiver (RCV2) may be spaced apart from the first receiver (RCV1) by a predetermined distance. The first and second receivers (RCV1, RCV2) may form a capacitor (CAP) by facing each other.

[0116] The insertion part (IST) may protrude from the bottom of the support part (SPT) toward the metal wiring (GNL). The insertion part (IST) may be inserted into a plurality of contact holes (CNT) of the metal wiring (GNL) and connected to the metal wiring (GNL).

[0117] The metal wiring (GNL) may include a pad portion (CTP) and a plurality of slits (SLT).

[0118] The pad portion (CTP) may be connected to an anti-static member (ESD) by including a plurality of contact holes (CNT). The pad portion (CTP) may be connected to the anti-static member (ESD) through an insertion portion (IST) inserted into the plurality of contact holes (CNT). The pad portion (CTP) may be surrounded by a plurality of slits (SLT).

[0119] Multiple slits (SLT) may extend along the extension direction of the metal wiring (GNL). For example, multiple slits (SLT) may extend along a second direction (Y-axis direction) and be spaced apart from each other in a first direction (X-axis direction). Multiple slits (SLT) may be spaced apart from each other by a pad portion (CTP). To minimize contact resistance between the pad portion (CTP) and the anti-static member (ESD), the metal wiring (GNL) may not form multiple slits (SLT) in the area of ​​the pad portion (CTP). Multiple slits (SLT) may penetrate at least a portion of the metal wiring (GNL) in the thickness direction (Z-axis direction) to control the resistance of the metal wiring (GNL).

[0120] Figure 9 is a cross-sectional view of another example cut along line I-I' of Figure 2.

[0121] Referring to FIG. 9, the display device (10) may include a first substrate (SUB1), a substrate insulating layer (SDL), a thin film transistor (TFT), a storage electrode (STE), a gate insulating film (GI), a protective layer (PAS), a color filter (CF), a planarization layer (OC), a pixel electrode (PE), a liquid crystal layer (LC), a common electrode (CE), and a second substrate (SUB2).

[0122] The first substrate (SUB1) may be a base substrate and may be made of an insulating material such as a polymer resin. For example, the first substrate (SUB1) may include a glass material or a metal material, but is not limited thereto.

[0123] The substrate insulating layer (SDL) can directly cover the upper surface of the first substrate (SUB1). The substrate insulating layer (SDL) can be placed between the first substrate (SUB1) and the thin-film transistor layer (TFTL). The substrate insulating layer (SDL) can insulate the upper surface of the first substrate (SUB1) by being formed first before the thin-film transistor layer (TFTL) is laminated on the first substrate (SUB1). The substrate insulating layer (SDL) can prevent a metal material from being directly placed on the first substrate (SUB1). Therefore, the substrate insulating layer (SDL) can prevent static electricity from flowing along the upper surface of the first substrate (SUB1). For example, the substrate insulating layer (SDL) may include at least one of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride.

[0124] A thin-film transistor (TFT) can be placed on a substrate insulating layer (SDL) and can form a pixel circuit for each of a plurality of pixels. For example, the thin-film transistor (TFT) may be a driving transistor or a switching transistor of a pixel circuit. The thin-film transistor (TFT) may include a semiconductor region (ACT), a gate electrode (GE), a drain electrode (DE), and a source electrode (SE).

[0125] The gate electrode (GE) can be placed on the substrate insulating layer (SDL). The gate electrode (GE) can overlap with the semiconductor region (ACT) with the gate insulating film (GI) in between.

[0126] A storage electrode (STE) can be placed on a substrate insulating layer (SDL). The storage electrode (STE) and the source electrode (SE) can face each other with a gap between them. The storage electrode (STE) and the source electrode (SE) can form a storage capacitor (Cst).

[0127] The gate insulating film (GI) can cover the gate electrode (GE), storage electrode (STE), and substrate insulating layer (SDL).

[0128] A semiconductor region (ACT), a drain electrode (DE), and a source electrode (SE) can be placed on a gate insulating film (GI). The semiconductor region (ACT) can overlap with the gate electrode (GE) in the thickness direction and can be insulated from the gate electrode (GE) by the gate insulating film (GI). The drain electrode (DE) can cover one end of the semiconductor region (ACT), and the source electrode (SE) can cover the other end of the semiconductor region. The source electrode (SE) of the thin-film transistor (TFT) can be connected to a pixel electrode (PE) and can receive a data voltage when the thin-film transistor (TFT) is turned on.

[0129] A protective layer (PAS) can be placed on a semiconductor region (ACT), a drain electrode (DE), and a source electrode (SE) to protect the thin-film transistor (TFT).

[0130] A color filter (CF) may be placed on a protective layer (PAS) so as to overlap with a pixel electrode (PE). The color filter (CF) may provide a specific color to the transmitted light. The color filter (CF) may include first to third color filters that transmit different colors. For example, each of the first to third color filters may be one of a red color filter, a green color filter, and a blue color filter.

[0131] The planarization layer (OC) can cover the color filter (CF) and the protection layer (PAS), and can planarize the top of the first substrate (SUB1).

[0132] The pixel electrode (PE) can be placed on the planarization layer (OC). The pixel electrode (PE) can be connected to the source electrode (SE) of the thin-film transistor (TFT). The pixel electrode (PE) can be opposed to the common electrode (CE) on the second substrate (SUB2).

[0133] A liquid crystal layer (LC) can be filled between a first substrate (SUB1) and a second substrate (SUB2). The liquid crystal layer (LC) can be placed between a pixel electrode (PE) and a common electrode (CE). A liquid crystal capacitor is formed between the pixel electrode (PE) and the common electrode (CE) to maintain the voltage between the pixel electrode (PE) and the common electrode (CE). Accordingly, the liquid crystal layer (LC) can change the transmittance of light passing through the liquid crystal layer (LC) by varying its arrangement according to the voltage difference between the pixel electrode (PE) and the common electrode (CE).

[0134] A common electrode (CE) can be placed on a second substrate (SUB2). By bonding the second substrate (SUB2) with the first substrate (SUB1), the common electrode (CE) on the second substrate (SUB2) and the pixel electrode (PE) on the first substrate (SUB1) can face each other.

[0135] A sealing member (AM) may be positioned between the edge of the first substrate (SUB) and the edge of the second substrate (SUB2). The sealing member (AM) may be positioned along the edges of the first substrate (SUB1) and the second substrate (SUB2) to seal the liquid crystal layer (LC). The sealing member (AM) may bond the first substrate (SUB1) and the second substrate (SUB2). For example, the sealing member (AM) may include an organic material. The sealing member (AM) may be made of an epoxy resin, but is not limited thereto.

[0136] Metal wiring (GNL) may be placed on the edge of the first substrate (SUB1). Metal wiring (GNL) may be covered by a sealing member (AM). For example, metal wiring (GNL) may be placed on a flattening layer (OC), but is not limited thereto. Metal wiring (GNL) may be connected to a ground pad portion (not shown) placed on one side of the first substrate (SUB1) via the edge of the first substrate (SUB1).

[0137] The metal wiring (GNL) can be grounded to a specific voltage or grounded through the ground pad portion. By being grounded or grounded, the metal wiring (GNL) can guide static electricity introduced from the outside to the outer periphery of the display device (10). The metal wiring (GNL) can prevent static electricity introduced from the outside from entering the display layer.

[0138] An electrostatic discharge (ESD) can be positioned between the edge of the first substrate (SUB1) and the edge of the second substrate (SUB2). One end of the electrostatic discharge (ESD) can be exposed toward the outside of the display device (10), and the other end of the electrostatic discharge (ESD) can be connected to the metal wiring (GNL). The electrostatic discharge (ESD) can dissipate a portion of the static electricity introduced from the outside and guide another portion of the static electricity to the metal wiring (GNL). For example, the amount of static electricity dissipated by the electrostatic discharge (ESD) can be significantly greater than the amount of static electricity induced to the metal wiring (GNL). Therefore, the electrostatic discharge (ESD) can prevent static electricity from entering the display layer by guiding only a minute amount of static electricity to the metal wiring (GNL). The display device (10) can improve the electrostatic discharge sensitivity and prevent defects in the display device (10) by preventing static electricity from entering the display layer, thereby improving the reliability of the display device (10).

[0139] The electrostatic discharge (ESD) member may include a support member (SPT), a receiving member (RCV), and an insertion member (IST).

[0140] The support member (SPT) may be placed on the metal wiring (GNL) and supported by the metal wiring (GNL), and may support the receiver (RCV). The support member (SPT) may extend from the upper part of the metal wiring (GNL) to the lower part of the common electrode (CE). For example, the support member (SPT) may extend along at least one edge of the first substrate (SUB1) together with the metal wiring (GNL). The support member (SPT) may be wrapped by a sealing member (AM).

[0141] The receiver (RCV) may protrude from the lower part of the support member (SPT) to the outer edge of the sealing member (AM). The receiver (RCV) may protrude toward the outside of the first substrate (SUB1). The end of the receiver (RCV) may be parallel to, but is not limited to, the end of the common electrode (CE), the end of the first substrate (SUB1), or the end of the second substrate (SUB2). A part of the receiver (RCV) may be connected to the support member (SPT) and wrapped by the sealing member (AM), and another part of the receiver (RCV) may protrude from the sealing member (AM). The receiver (RCV) may be a metal plate extending along at least one edge of the first substrate (SUB1). The receiver (RCV) may be spaced apart from the common electrode (CE) by a predetermined distance. The common electrode (CE) and the receiver (RCV) may form a capacitor (CAP) by facing each other.

[0142] The insertion part (IST) may protrude from the bottom of the support part (SPT) toward the metal wiring (GNL). The insertion part (IST) may be inserted into a plurality of contact holes (CNT) of the metal wiring (GNL) and connected to the metal wiring (GNL).

[0143] FIG. 10 is a cross-sectional view of another example cut along line I-I' of FIG. 2, FIG. 11 is a side view showing an anti-static member in the display device of FIG. 10, and FIG. 12 is a plan view showing the combined relationship between the anti-static member and the metal wiring in the display device of FIG. 10. The display device of FIG. 10 differs from the display device of FIG. 3 in the configuration of the anti-static member (ESD), and configurations identical to the aforementioned configuration will be briefly described or omitted.

[0144] Referring to FIGS. 10 to 12, the display device (10) may include a first substrate (SUB1), a substrate insulating layer (SDL), a display layer (DPL), a filler (FIL), a sealing member (AM), a second substrate (SUB2), a metal wiring (GNL), and an anti-static member (ESD).

[0145] A sealing member (AM) may be positioned between the edge of the first substrate (SUB) and the edge of the second substrate (SUB2) in the non-display area (NDA). The sealing member (AM) may be positioned along the edges of the first substrate (SUB1) and the second substrate (SUB2) in the non-display area (NDA) to seal a filler (FIL). The sealing member (AM) may bond the first substrate (SUB1) and the second substrate (SUB2). For example, the sealing member (AM) may include an organic material. The sealing member (AM) may be made of an epoxy resin, but is not limited thereto.

[0146] A metal wiring (GNL) may be placed in a non-display area (NDA) on a thin-film transistor layer (TFTL). The metal wiring (GNL) may extend along at least one edge of the first substrate (SUB1). The metal wiring (GNL) may be covered by a sealing member (AM). For example, the metal wiring (GNL) may be placed on a first protective layer (PAS1), but is not limited thereto. The metal wiring (GNL) may be connected to a ground pad portion (not shown) placed on one side of the first substrate (SUB1) via the non-display area (NDA).

[0147] The metal wiring (GNL) can be grounded to a specific voltage or grounded through the ground pad portion. By being grounded or grounded, the metal wiring (GNL) can guide static electricity introduced from the outside to the outer periphery of the display device (10). The metal wiring (GNL) can prevent static electricity introduced from the outside from entering the display layer (DPL).

[0148] An electrostatic discharge (ESD) member may be placed in a non-display area (NDA) between a first substrate (SUB1) and a second substrate (SUB2). One end of the electrostatic discharge (ESD) member may be exposed toward the outside of the display device (10), and the other end of the electrostatic discharge (ESD) member may be connected to a metal wiring (GNL). The electrostatic discharge (ESD) member may include a receiver (RCV) and first to fourth plates (PLT1 to PLT4), and may dissipate a portion of static electricity introduced from the outside through first to fifth capacitors (CAP1 to CAP5) formed between the receiver (RCV), the first to fourth plates (PLT1 to PLT4), and the metal wiring (GNL). The electrostatic discharge (ESD) member may direct another portion of static electricity to the metal wiring (GNL). For example, the amount of static electricity dissipated by the anti-static device (ESD) can be significantly greater than the amount of static electricity induced in the metal wiring (GNL). Therefore, the anti-static device (ESD) can prevent static electricity from entering the display layer (DPL) by inducing only a minute amount of static electricity into the metal wiring (GNL).

[0149] In FIG. 11, the anti-static member (ESD) may include first to fifth anti-static members (ESM1 to ESM5).

[0150] The first electrostatic discharge prevention member (ESM1) may include a receiving part (RCV) and a first insertion part (IST1).

[0151] The receiver (RCV) may protrude outward from the outer edge of the sealing member (AM). The receiver (RCV) may protrude outward toward the outside of the first substrate (SUB1). The end of the receiver (RCV) may be parallel to the end of the first substrate (SUB1) or the end of the second substrate (SUB2), but is not limited thereto. A portion of the receiver (RCV) may be connected to the first insertion portion (IST1) and enclosed by the sealing member (AM), and another portion of the receiver (RCV) may protrude from the sealing member (AM). The receiver (RCV) may be a metal plate extending along at least one edge of the first substrate (SUB1). For example, the receiver (RCV) may be in contact with the lower surface of the wavelength conversion layer (WLCL) or the color filter layer (CFL), but is not limited thereto. As another example, the receiver (RCV) may be spaced a predetermined distance from the lower surface of the wavelength conversion layer (WLCL) or the color filter layer (CFL).

[0152] The first insertion part (IST1) may protrude from the lower side of one side of the receiver (RCV) toward the metal wiring (GNL) or the first plate (PLT1). The first insertion part (IST1) may be inserted into the first plate (PLT1) of the second electrostatic discharge member (ESM2) so that the first and second electrostatic discharge members (ESM1, ESM2) can be connected to each other. Accordingly, the first electrostatic discharge member (ESM1) can dissipate a portion of the static electricity introduced through the receiver (RCV) through the first capacitor (CAP1), and can provide another portion of the static electricity to the first plate (PLT1) through the first insertion part (IST1).

[0153] The second anti-static member (ESM2) may include a first plate (PLT1) and a second insert (IST2).

[0154] The first plate (PLT1) may be positioned below the receiver (RCV) and may be connected to the receiver (RCV) by a first insertion part (IST1) inserted into a contact hole (CNT). The first plate (PLT1) may be spaced apart from the receiver (RCV) by a predetermined distance. The first plate (PLT1) may be a metal plate extending along at least one edge of the first substrate (SUB1). The receiver (RCV) and the first plate (PLT1) may face each other to form a first capacitor (CAP1). The first plate (PLT1) may be wrapped by a sealing member (AM). Accordingly, the length of the first direction (X-axis direction) of the first plate (PLT1) may be shorter than the length of the first direction (X-axis direction) of the receiver (RCV).

[0155] The second insert (IST2) may protrude from the lower side of the first plate (PLT1) toward the metal wiring (GNL) or the second plate (PLT2). The second insert (IST2) may be inserted into the second plate (PLT2) of the third electrostatic discharge member (ESM3) so that the second and third electrostatic discharge members (ESM2, ESM3) can be connected to each other. Accordingly, the second electrostatic discharge member (ESM2) can dissipate a portion of the static electricity introduced through the first electrostatic discharge member (ESM1) through the second capacitor (CAP2), and can provide another portion of the static electricity to the second plate (PLT2) through the second insert (IST2).

[0156] The third anti-static member (ESM3) may include a second plate (PLT2) and a third insert (IST3).

[0157] The second plate (PLT2) may be positioned below the first plate (PLT1) and may be connected to the first plate (PLT1) by a second insertion part (IST2) inserted into a contact hole (CNT). The second plate (PLT2) may be spaced apart from the first plate (PLT1) by a predetermined distance. The second plate (PLT2) may be a metal plate extending along at least one edge of the first substrate (SUB1). The first and second plates (PLT1, PLT2) may form a second capacitor (CAP2) by facing each other. The second plate (PLT2) may be wrapped by a sealing member (AM).

[0158] The third insert (IST3) may protrude from the lower side of one side of the second plate (PLT2) toward the metal wiring (GNL) or the third plate (PLT3). The third insert (IST3) may overlap with the first insert (IST1) in the thickness direction (Z-axis direction). The third insert (IST3) is inserted into the third plate (PLT3) of the fourth anti-static member (ESM4), so that the third and fourth anti-static members (ESM3, ESM4) can be connected to each other. Accordingly, the third anti-static member (ESM3) can dissipate a portion of the static electricity introduced through the second anti-static member (ESM2) through the third capacitor (CAP3), and can provide another portion of the static electricity to the third plate (PLT3) through the third insert (IST3).

[0159] The fourth anti-static member (ESM4) may include a third plate (PLT3) and a fourth insert (IST4).

[0160] The third plate (PLT3) may be positioned below the second plate (PLT2) and may be connected to the second plate (PLT2) by a third insert (IST3) inserted into a contact hole (CNT). The third plate (PLT3) may be spaced apart from the second plate (PLT2) by a predetermined distance. The third plate (PLT3) may be a metal plate extending along at least one edge of the first substrate (SUB1). The second and third plates (PLT2, PLT3) may form a third capacitor (CAP3) by facing each other. The third plate (PLT3) may be wrapped by a sealing member (AM).

[0161] The fourth insert (IST4) may protrude from the lower side of the third plate (PLT3) toward the metal wiring (GNL) or the fourth plate (PLT4). The fourth insert (IST4) may overlap with the second insert (IST2) in the thickness direction (Z-axis direction). The fourth insert (IST4) is inserted into the fourth plate (PLT4) of the fifth anti-static member (ESM5), so that the fourth and fifth anti-static members (ESM4, ESM5) can be connected to each other. Accordingly, the fourth anti-static member (ESM4) can dissipate a portion of the static electricity introduced through the third anti-static member (ESM3) through the fourth capacitor (CAP4), and can provide another portion of the static electricity to the fourth plate (PLT4) through the fourth insert (IST4).

[0162] The fifth anti-static member (ESM5) may include a fourth plate (PLT4) and a fifth insert (IST5).

[0163] The fourth plate (PLT4) may be positioned below the fourth plate (PLT4) and connected to the third plate (PLT3) by a fourth insert (IST4) inserted into a contact hole (CNT). The fourth plate (PLT4) may be spaced apart from the third plate (PLT3) by a predetermined distance. The fourth plate (PLT4) may be a metal plate extending along at least one edge of the first substrate (SUB1). The third and fourth plates (PLT3, PLT4) may form a fourth capacitor (CAP4) by facing each other. The fourth plate (PLT4) may be wrapped by a sealing member (AM).

[0164] The fifth insert (IST5) may protrude toward the metal wiring (GNL) from the lower side of one side of the fourth plate (PLT4). The fifth insert (IST5) may overlap with the first and third inserts (IST1, IST3) in the thickness direction (Z-axis direction). The fifth insert (IST5) may be inserted into the contact hole (CNT) of the metal wiring (GNL) so that the fifth anti-static member (ESM5) and the metal wiring (GNL) can be connected to each other. Accordingly, the fifth anti-static member (ESM5) can dissipate a portion of the static electricity introduced through the fourth anti-static member (ESM4) through the fifth capacitor (CAP5), and can provide another portion of the static electricity to the metal wiring (GNL) through the fifth insert (IST5).

[0165] The electrostatic discharge (ESD) can dissipate a portion of static electricity introduced from the outside through the first to fifth capacitors (CAP1 to CAP5) formed between the receiver (RCV), the first to fourth plates (PLT1 to PLT4), and the metal wiring (GNL). The electrostatic discharge (ESD) can induce another portion of static electricity into the metal wiring (GNL). For example, the amount of static electricity dissipated by the first to fifth capacitors (CAP1 to CAP5) may be significantly greater than the amount of static electricity induced into the metal wiring (GNL). Therefore, the electrostatic discharge (ESD) can prevent static electricity from entering the display layer (DPL) by inducing only a minute amount of static electricity into the metal wiring (GNL). By preventing static electricity from entering the display layer (DPL), the display device (10) can improve the electrostatic discharge sensitivity and prevent defects in the display device (10), thereby improving the reliability of the display device (10).

[0166] The metal wiring (GNL) may include a pad portion (CTP) and a plurality of slits (SLT).

[0167] The pad portion (CTP) may be connected to an anti-static member (ESD) by including a plurality of contact holes (CNT). The pad portion (CTP) may be connected to the anti-static member (ESD) through a fifth insertion portion (IST5) inserted into the plurality of contact holes (CNT). The pad portion (CTP) may be surrounded by a plurality of slits (SLT).

[0168] Multiple slits (SLT) may extend along the extension direction of the metal wiring (GNL). For example, multiple slits (SLT) may extend along a second direction (Y-axis direction) and be spaced apart from each other in a first direction (X-axis direction). Multiple slits (SLT) may be spaced apart from each other by a pad portion (CTP). To minimize contact resistance between the pad portion (CTP) and the anti-static member (ESD), the metal wiring (GNL) may not form multiple slits (SLT) in the area of ​​the pad portion (CTP). Multiple slits (SLT) may penetrate at least a portion of the metal wiring (GNL) in the thickness direction (Z-axis direction) to control the resistance of the metal wiring (GNL).

[0169] FIG. 13 is a cross-sectional view of another example cut along line I-I' of FIG. 2, and FIG. 14 is a plan view showing a unit pixel and an anti-static electrode in the display device of FIG. 13. The display device of FIG. 13 further includes an anti-static electrode (ESD2) in addition to the display device of FIG. 3, and configurations identical to the above-described configuration are to be briefly described or omitted.

[0170] Referring to FIGS. 13 and 14, the display device (10) may include a first substrate (SUB1), a substrate insulating layer (SDL), a display layer (DPL), a filler (FIL), a sealing member (AM), a second substrate (SUB2), a metal wiring (GNL), an anti-static member (ESD1), and an anti-static electrode (ESD2).

[0171] The electrostatic discharge member (ESD1) may be placed in a non-display area (NDA) between the first substrate (SUB1) and the second substrate (SUB2). One end of the electrostatic discharge member (ESD1) may be exposed toward the outside of the display device (10), and the other end of the electrostatic discharge member (ESD1) may be connected to a metal wiring (GNL). The electrostatic discharge member (ESD1) may discharge and consume a portion of the electrostatic energy introduced from the outside, and may guide another portion of the electrostatic energy to the metal wiring (GNL). For example, the amount of electrostatic discharge dissipated by the electrostatic discharge member (ESD1) may be significantly greater than the amount of electrostatic discharge induced to the metal wiring (GNL). Therefore, the electrostatic discharge member (ESD1) can prevent electrostatic energy from flowing into the display layer (DPL) by guiding only a minute amount of electrostatic discharge to the metal wiring (GNL).

[0172] The electrostatic discharge prevention member (ESD1) may include a support portion (SPT), a first receiver portion (RCV1), a second receiver portion (RCV2), and a first insertion portion (IST1). The first and second receiver portions (RCV1, RCV2) may form a first capacitor (CAP1) by facing each other while spaced apart.

[0173] The anti-static electrode (ESD2) may be placed on the thin-film transistor layer (TFTL). The anti-static electrode (ESD2) may surround each of the first and second unit pixels (UP1, UP2). Here, each of the first and second unit pixels (UP1, UP2) may include one first pixel (SP1), two second pixels (SP2), and one third pixel (SP3), but the configuration of the first to third pixels (SP1, SP2, SP3) is not limited thereto. The first to third pixels (SP1, SP2, SP3) may emit light of different colors.

[0174] The anti-static electrode (ESD2) may include a first anti-static electrode (ESE1), a second anti-static electrode (ESE2), and a second insertion part (IST2).

[0175] The first anti-static electrode (ESE1) may be placed on the first substrate (SUB1). The first anti-static electrode (ESE1) may be placed on the gate insulating film (GI). The first anti-static electrode (ESE1) may be placed on the same layer as the gate electrode (GE) of the thin-film transistor (TFT), but the stacking position of the first anti-static electrode (ESE1) is not limited thereto. The first anti-static electrode (ESE1) may be connected to a metal wiring (GNL). The metal wiring (GNL) may provide another portion of the static electricity introduced through the anti-static member (ESD1) to the first anti-static electrode (ESE1).

[0176] The second anti-static electrode (ESE2) may be placed on the first anti-static electrode (ESE1). The second anti-static electrode (ESE2) may be placed on the interlayer insulating film (ILD). The second anti-static electrode (ESE2) may be placed on the same layer as the first and second connecting electrodes (CNE1, CNE2), but the stacking position of the second anti-static electrode (ESE2) is not limited thereto. The second anti-static electrode (ESE2) may be spaced apart from the first anti-static electrode (ESE1) with the interlayer insulating film (ILD) in between. The first and second anti-static electrodes (ESE1, ESE2) may form a second capacitor (CAP2) by facing each other while spaced apart.

[0177] The second anti-static electrode (ESE2) can be connected to the first anti-static electrode (ESE1) through a second insertion part (IST2) inserted into a contact hole of the interlayer insulating film (ILD). In FIG. 14, the anti-static electrode (ESD2) may include a plurality of second insertion parts (IST2) surrounding the first and second unit pixels (UP1, UP2), and the first and second anti-static electrodes (ESE1, ESE2) may be connected to each other.

[0178] The electrostatic discharge prevention electrode (ESD2) can dissipate static electricity introduced from the metal wiring (GNL) through the second capacitor (CAP2). Accordingly, the display device (10) can dissipate a significant amount of static electricity introduced from the outside by including an electrostatic discharge prevention member (ESD1), and can prevent the remaining static electricity from entering the first and second unit pixels (UP1, UP2) by further including an electrostatic discharge prevention electrode (ESD2). By preventing static electricity from entering multiple pixels, the display device (10) can improve electrostatic discharge sensitivity and prevent defects in the display device (10), thereby improving the reliability of the display device (10).

[0179] FIG. 15 is a plan view showing the combined structure of a tile-type display device according to one embodiment, and FIG. 16 is a cross-sectional view taken along line II-II' of FIG. 15. Hereinafter, configurations identical to the above-described configuration will be briefly described or omitted.

[0180] Referring to FIGS. 15 and 16, the tile-type display device (TD) may include a plurality of display devices (10). The plurality of display devices (10) may be arranged in a grid pattern, but are not limited thereto. The plurality of display devices (10) may be connected in a first direction (X-axis direction) or a second direction (Y-axis direction), and the tile-type display device (TD) may have a specific shape.

[0181] The display device (10) may include a display area (DA) and a non-display area (NDA). The display area (DA) may include a plurality of pixels to display an image. The non-display area (NDA) may be placed around the display area (DA) to surround the display area (DA) and may not display an image.

[0182] A tile-type display device (TD) may include a coupling area (SM) positioned between a plurality of display areas (DA). The tile-type display device (TD) may be formed by connecting the non-display areas (NDA) of each adjacent display device (10). A plurality of display devices (10) may be connected to each other through a coupling member (20) positioned in the coupling area (SM). The spacing between the display areas (DA) of each of the plurality of display devices (10) may be close enough that the coupling area (SM) between the plurality of display devices (10) is not perceived by the user. Additionally, the external light reflectance of the display area (DA) of each of the plurality of display devices (10) and the external light reflectance of the coupling area (SM) between the plurality of display devices (10) may be substantially the same. Therefore, by preventing the coupling area (SM) between the plurality of display devices (10) from being perceived by the user, the tile-type display device (TD) can eliminate the sense of disconnection between the plurality of display devices (10) and enhance the immersion of the image.

[0183] The tile-type display device (TD) may include first to fourth display devices (10-1 to 10-4). The number and combination relationship of the display devices (10) are not limited to the embodiment of FIG. 15. The number of display devices (10) may be determined according to the size of each of the display device (10) and the tile-type display device (TD).

[0184] A connecting member (20) is positioned between each of the plurality of display devices (10) to connect the sides of adjacent display devices (10) to each other. By connecting the sides of the first to fourth display devices (10-1 to 10-4) arranged in a grid shape, the connecting member (20) can implement a tile-type display device (TD). The connecting member (20) can connect the sides of the first substrate (SUB1) and the second substrate (SUB2) of each of the adjacent display devices (10).

[0185] For example, the connecting member (20) may be made of an adhesive or double-sided tape having a relatively thin thickness, thereby minimizing the gap between multiple display devices (10). As another example, the connecting member (20) may be made of a connecting frame having a relatively thin thickness, thereby minimizing the width of the connecting area (SM) or the gap between multiple display devices (10). Accordingly, the tile-type display device (TD) can eliminate the sense of disconnection between multiple display devices (10) and improve the immersion of the image by preventing the connecting area (SM) between multiple display devices (10) from being perceived by the user.

[0186] A flexible film (FPCB) may be placed in a non-display area (NDA) provided on one side of a tile-type display device (TD). For example, the flexible film (FPCB) may be placed in the non-display area (NDA) on the upper side of the first and second display devices (10-1, 10-2) and the non-display area (NDA) on the lower side of the third and fourth display devices (10-3, 10-4). The flexible film (FPCB) may be attached to a pad portion (not shown) placed on the first substrate (SUB1) of each of the first to fourth display devices (10-1, 10-2, 10-3, 10-4). One side of the flexible film (FPCB) may be connected to the pad portion, and the other side of the flexible film (FPCB) may be connected to a source circuit board (not shown). The flexible film (FPCB) can transmit the source voltage or data voltage of the source driver (SIC) to the display device (10).

[0187] The source driver (SIC) can be placed on a flexible film (FPCB) and connected to a plurality of pixels of the display device (10). For example, the source driver (SIC) can be an integrated circuit (IC). The source driver (SIC) can convert digital video data into an analog data voltage based on a source control signal from a timing control unit and supply it to a data line of a display area (DA) through the flexible film (FPCB).

[0188] In FIG. 16, the anti-static member (ESD) of the first display device (10-1) and the anti-static member (ESD) of the second display device (10-2) may face each other with a connecting member (20) in between. The anti-static member (ESD) of each of the first and second display devices (10-1, 10-2) may be insulated by the connecting member (20).

[0189] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0190] TD: Tile display 10: Display device 20: Connecting member SUB1: First substrate SDL: Substrate insulating layer DPL: Display layer TFTL: Thin film transistor layer EML: Light-emitting diode layer FIL: Filler material WLCL: Wavelength conversion layer CFL: Color filter layer AM: Sealing member SUB2: Second substrate GNL: Metal wiring CTP: Pad section SLT: Multiple slit ESD, ESD1: Antistatic member SPT: Support unit RCV1, RCV2: First and second receiver units IST: Insertion section RCV: Reception section ESM1~ESM5: 1st to 5th anti-static members PLT1~PLT4: 1st to 4th plates IST1~IST5: 1st to 5th inserts ESD2: Antistatic electrode ESE1, ESE2: 1st and 2nd prevention electrodes

Claims

Claim 1 A display device comprising: a first substrate including a display area having a plurality of pixels and a non-display area surrounding the display area; a thin-film transistor layer including a thin-film transistor disposed on the first substrate; a second substrate disposed on the thin-film transistor layer and facing the first substrate; a sealing member disposed between the first substrate and the second substrate in the non-display area to bond the first and second substrates; metal wiring disposed in the non-display area on the thin-film transistor layer and covered by the sealing member; and an electrostatic discharge prevention member comprising a support member supported by the metal wiring, a first receiver member protruding from the upper part of the support member to the outer edge of the sealing member, and a second receiver member protruding from the lower part of the support member to the outer edge of the sealing member and facing the first receiver member. Claim 2 A display device according to claim 1, wherein the metal wiring comprises: a pad portion connected to the anti-static member including a plurality of contact holes; and a plurality of slits extending in a first direction on a plane, spaced apart by the pad portion, and penetrating in the thickness direction. Claim 3 In claim 2, the display device further comprises a plurality of insertion parts that protrude from the lower end of the support part and are inserted into a plurality of contact holes of the pad part. Claim 4 A display device according to claim 1, wherein the first receiver and the second receiver are implemented as metal plates facing each other spaced apart to form a capacitor. Claim 5 In claim 1, the metal wiring extends along the non-display area and is grounded to a specific voltage or grounded to a display device. Claim 6 A display device according to claim 1, further comprising a substrate insulating layer that directly covers the entire upper surface of the first substrate. Claim 7 A display device according to claim 1, further comprising: a light-emitting element layer disposed on the thin-film transistor layer and including a light-emitting element; a wavelength conversion layer disposed on the light-emitting element layer and including a wavelength conversion unit corresponding to each of the plurality of pixels; and a color filter layer disposed between the wavelength conversion layer and the second substrate and including a color filter corresponding to each of the plurality of pixels. Claim 8 A display device according to claim 1, wherein the thin film transistor layer further comprises an anti-static electrode surrounding each of the plurality of pixels. Claim 9 In claim 8, the electrostatic discharge prevention electrode comprises: a first electrostatic discharge prevention electrode disposed on a first substrate; and a second electrostatic discharge prevention electrode disposed on the first electrostatic discharge prevention electrode and facing the first electrostatic discharge prevention electrode at a distance from each other. Claim 10 A display device according to claim 9, wherein a light-emitting element layer comprising a light-emitting element disposed on the thin-film transistor layer; and the thin-film transistor layer further comprises a connecting electrode connecting the thin-film transistor and the light-emitting element, wherein the first electrostatic discharge prevention electrode is disposed on the same layer as the gate electrode of the thin-film transistor, and the second electrostatic discharge prevention electrode is disposed on the same layer as the connecting electrode. Claim 11 A display device comprising: a first substrate including a display area having a plurality of pixels and a non-display area surrounding the display area; a thin-film transistor layer disposed on the first substrate and including a plurality of thin-film transistors; a pixel electrode disposed on the thin-film transistor layer; a common electrode facing the pixel electrode at a distance; a second substrate disposed on the common electrode and facing the first substrate; a sealing member disposed between the first substrate and the second substrate in the non-display area to bond the first and second substrates; metal wiring disposed in the non-display area on the thin-film transistor layer and covered by the sealing member; and an electrostatic discharge prevention member comprising a support member supported by the metal wiring and connected to the common electrode, and a receiving member protruding from the lower part of the support member to the outer edge of the sealing member and facing the common electrode. Claim 12 In claim 11, a display device in which the common electrode and the receiver are implemented as metal plates facing each other spaced apart to form a capacitor. Claim 13 A display device comprising: a first substrate including a display area having a plurality of pixels and a non-display area surrounding the display area; a thin-film transistor layer disposed on the first substrate and including a plurality of thin-film transistors; a second substrate disposed on the thin-film transistor layer and facing the first substrate; a sealing member disposed between the first substrate and the second substrate in the non-display area to bond the first and second substrates; a metal wiring disposed in the non-display area on the thin-film transistor layer and covered by the sealing member; and at least one plate connected to the metal wiring and facing the metal wiring, and a receiving member connected to the at least one plate and facing the at least one plate and protruding outward from the sealing member. Claim 14 In claim 13, the electrostatic discharge member comprises: a first electrostatic discharge member having a receiving portion and a first insertion portion protruding from the receiving portion toward the metal wiring; a second electrostatic discharge member having a first plate connected to the first insertion portion and facing the receiving portion, and a second insertion portion protruding from the first plate toward the metal wiring; and a third electrostatic discharge member having a second plate connected to the second insertion portion and facing the first plate, and a third insertion portion protruding from the second plate and connected to the metal wiring. Claim 15 In claim 14, the display device further comprises a plurality of plates and a plurality of inserts disposed between the second anti-static member and the third anti-static member. Claim 16 In claim 14, the first insertion part is provided on one side of the receiving part, and the second insertion part is provided on the other side of the first plate, so that the first and second insertion parts are spaced apart from each other on a plane. Claim 17 A display device according to claim 14, wherein the receiving part and the first plate face each other spaced apart to form a first capacitor, the first plate and the second plate face each other spaced apart to form a second capacitor, and the second plate and the metal wiring face each other spaced apart to form a third capacitor. Claim 18 A display device according to claim 13, further comprising a substrate insulating layer that directly covers the entire upper surface of the first substrate. Claim 19 A first display device comprising a first display area having pixels; a second display device comprising a second display area adjacent to the first display area; and a coupling member for coupling the first display device and the second display device, wherein each of the first and second display devices comprises: a first substrate comprising a display area and a non-display area; a thin film transistor layer disposed on the first substrate; a second substrate disposed on the thin film transistor layer and facing the first substrate; a sealing member disposed between the first substrate and the second substrate in the non-display area to bond the first and second substrates; and a metal wiring disposed in the non-display area on the thin film transistor layer and covered by the sealing member. A tile-type display device comprising a support member supported by the metal wiring, a first receiving member protruding from the upper part of the support member to the outer edge of the sealing member, and a second receiving member protruding from the lower part of the support member to the outer edge of the sealing member and facing the first receiving member, wherein the electrostatic discharge member of the first display device and the electrostatic discharge member of the second display device face each other with the coupling member in between. Claim 20 In claim 19, the first receiver and the second receiver are implemented as metal plates facing each other spaced apart to form a capacitor, forming a tile-type display device.

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